[LLVMdev] Operand constraints

[Vladimir Prus]

Vladimir Prus wrote:
> On my target, the multiplication can involve all general purpose registers,
> but there's are still some restrictions: the first and the second operand
> as well as the result must be in different registers, and neither register
> can be gr7. How can I enforce this restriction on the register allocator?

And the other side of the question is now to inform register allocator that 
mul instruction clobbers gr7? I see some support for getting "implicit 
operands" in MachineInstr.cpp, but the only method which can set them:

   MachineInstr::SetRegForImplicitRef

is marked as SPARC-specific and is not documented.

- Volodya