[LLVMdev] Basic Blocks: Bytecode -> Native Code

[Vikram S. Adve]

-----Original Message-----
From: Vikram S. Adve [mailto:vadve at cs.uiuc.edu]
Sent: Sunday, January 25, 2004 7:16 AM
To: Joseph E. Grzywacz
Subject: RE: [LLVMdev] Basic Blocks: Bytecode -> Native Code


[Joseph, I'm sending this again because I didn't copy the list the first
time.]

Yes, this is true for the Sparc back-end.  In fact, it is a fundamental
assumption that is relied on by the runtime tracing framework for dynamic
optimization (not part of 1.1 yet).  I believe it is also true for x86 but I
am not sure.

There is one small violation of that rule, but it should not matter in
practice.  An LLVM conditional branch directly specifies both the true and
the false branch target.  Since that isn't possible with machine code, the
machine code sequence for Sparc (for an LLVM BB ending in a conditional
branch) becomes:

	<code for bb>
	conditional branch to label 1
	nop    ;; delay slot
	unconditional branch to label 2   ;; may be eliminated if fall-through
	nop    ;; delay slot

Technically this is 2 basic blocks, but it is not difficult to recognize and
treat as as special case (and safe).

--Vikram
http://www.cs.uiuc.edu/~vadve
http://llvm.cs.uiuc.edu/


> -----Original Message-----
> From: llvmdev-admin at cs.uiuc.edu [mailto:llvmdev-admin at cs.uiuc.edu]On
> Behalf Of Joseph E. Grzywacz
> Sent: Saturday, January 24, 2004 9:12 PM
> To: llvmdev at cs.uiuc.edu
> Subject: [LLVMdev] Basic Blocks: Bytecode -> Native Code
>
>
> Using llc, is it possible to guarantee a 1 to 1 mapping of basic blocks
> from LLVM bytecode to native machine code (either in sparc or x86) after
> compilation? Optimizations during the compilation are of no concern to
> me, I simply require this 1 to 1 mapping.
>
> Thanks.
>
> --
> jeg
>