[LLVMdev] I got problem in BranchInst+SetCondInst

Reid Spencer reid at x10sys.com
Thu Aug 12 15:58:10 PDT 2004


Valery,

Looks to me like you forgot to put the SetCondInst into a basic block.
You should ALWAYS verify your module before emitting code. The verifier
would have caught this (instruction not in basic block). I suggest you
insert the verifier call into your program and see if your module
passes. If it does, let me know. If not, you'll know what the problem
is. See Stacker for an example use of the Verifier.

Reid.

On Thu, 2004-08-12 at 14:29, Valery A.Khamenya wrote:
> Hi all,
> 
> the small test modeling my problem is attached. 
> (see comments in file attached)
> 
> the problem is that both
> 
>     SetCondInst* CondInst 
>       = new SetCondInst( Instruction::SetLE, One, Two );
> 
> and
> 
>     SetCondInst* CondInst 
>       = new SetCondInst( Instruction::SetLE, Two, One );
> 
> have the same output...
> 
> Anyone have a sharper eye?..
> ---
> Valery A.Khamenya
> 
> 
> 
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