[llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)

[Pierre van Houtryve via llvm-commits]

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@@ -7348,6 +7348,19 @@ bool AMDGPUInstructionSelector::selectSGetBarrierState(
   return true;
 }
 
+/// Return the barrier ID for \p BarOp if it's statically known, mapping poison
+/// to 0 and making off the high bits.
+static std::optional<uint32_t>
+getConstantNamedBarrierNumber(const MachineOperand &BarOp,
+                              const MachineRegisterInfo &MRI) {
+  Register BarReg = BarOp.getReg();
+  if (std::optional<int64_t> BarValImm = getIConstantVRegSExtVal(BarReg, MRI))
+    return *BarValImm & 0x3F;
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Pierre-vh wrote:

I mean, what is the masking doing ?
I am fine if there is masking but it's not to decode something and just as a validation thing to discard useless bits, I guess that fits within the UB that's documented.

The problem is if we still have lingering cases where the `!absolute_symbol` of the barrier GV doesn't map to what is used for the `s_barrier` instruction operands

https://github.com/llvm/llvm-project/pull/191506