[llvm] [SelectionDAG] Make `AND`/`OR` demanded-bit simplification symmetric (PR #230700)

[Alan Li via llvm-commits]

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@@ -435,8 +435,12 @@ define void @ccmp64rr_of(i64 %a, i64 %b, i64 %c) {
 ; CHECK-LABEL: ccmp64rr_of:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    cmpq %rdx, %rdi # encoding: [0x48,0x39,0xd7]
-; CHECK-NEXT:    ccmpbq {dfv=of} %rsi, %rdi # encoding: [0x62,0xf4,0xc4,0x02,0x39,0xf7]
-; CHECK-NEXT:    jno .LBB6_1 # encoding: [0x71,A]
+; CHECK-NEXT:    setb %al # encoding: [0x0f,0x92,0xc0]
+; CHECK-NEXT:    cmpq %rsi, %rdi # encoding: [0x48,0x39,0xf7]
+; CHECK-NEXT:    seto %cl # encoding: [0x0f,0x90,0xc1]
+; CHECK-NEXT:    notb %cl # encoding: [0xf6,0xd1]
+; CHECK-NEXT:    testb %cl, %al # encoding: [0x84,0xc8]
+; CHECK-NEXT:    jne .LBB6_1 # encoding: [0x75,A]
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lialan wrote:

X86 downstream issue (SETCC folding in x86 not handling new case), my agent has a fix. I will push to this PR stack in a bit.

https://github.com/llvm/llvm-project/pull/230700