[llvm] [AArch64][RegAlloc] Enable callee-saved register optimization for AArch64 (PR #214773)

[Shreeyash Pandey via llvm-commits]

bojle wrote:

@weiguozhi here are the numbers across different max-vreg values for spec2017 (intrate):
```
Benchmark          vreg20    vreg30    vreg40    vreg50    vreg60    vreg70    vreg80    vreg90
500.perlbench_r    +2.99%    +3.81%    +3.31%    +2.94%    +3.72%    +3.39%    +3.16%    +2.90%
502.gcc_r          +3.39%    +4.32%    +1.93%    +2.28%    +2.85%    +2.72%    +2.22%    +2.35%
505.mcf_r          +0.13%    +1.16%    +0.15%    +0.27%    -0.61%    +0.26%    -0.41%    -0.11%
520.omnetpp_r      -0.16%    +2.56%    +0.04%    +0.13%    +0.66%    -1.18%    +0.24%    -0.19%
523.xalancbmk_r    +0.84%    +0.68%    +0.04%    +0.21%    +0.27%    +0.46%    +0.22%    -1.50%
525.x264_r         -1.64%    -1.76%    -1.89%    -1.78%    -1.84%    -1.71%    -1.82%    -1.77%
531.deepsjeng_r    +0.71%    +0.44%    -0.18%    -0.34%    -0.08%    -0.29%    -0.51%    -0.21%
541.leela_r        -1.10%    -1.17%    -1.23%    -1.23%    -1.23%    -1.20%    -1.21%    -1.28%
557.xz_r           +2.10%    +3.94%    -0.09%    +0.08%    -0.10%    +0.63%    -0.03%    -0.03%
```
Percentage with respect to baseline. Positive indicates improvement; negative indicates regression.



https://github.com/llvm/llvm-project/pull/214773