[llvm] [AMDGPU] Explicit instruction prefetch for large entry functions (PR #227995)

[Matt Arsenault via llvm-commits]

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@@ -455,6 +455,8 @@
 ; GCN-O1-NEXT:        AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-NEXT:        AMDGPU Lower VGPR Encoding
 ; GCN-O1-NEXT:        AMDGPU Insert Delay ALU
+; GCN-O1-NEXT:        MachinePostDominator Tree Construction
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arsenm wrote:

Should try harder to not add a new dominator tree compute 

https://github.com/llvm/llvm-project/pull/227995