[llvm] [AArch64] Preserve store width for ptr32 address spaces (PR #229181)

[Eli Friedman via llvm-commits]

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@@ -27951,6 +27951,9 @@ static SDValue performSTORECombine(SDNode *N,
     MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());
     if (PtrVT != Ptr.getSimpleValueType()) {
       SDValue Cast = DAG.getAddrSpaceCast(DL, PtrVT, Ptr, AddrSpace, 0);
+      if (ST->isTruncatingStore())
+        return DAG.getTruncStore(Chain, DL, Value, Cast, MemVT,
+                                 ST->getMemOperand());
       return DAG.getStore(Chain, DL, Value, Cast, ST->getPointerInfo(),
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efriedma-quic wrote:

It's kind of confusing to have one call passing a MachineMemOperand right next to a call passing the decomposed version.  (I think it ends up being equivalent here.)

https://github.com/llvm/llvm-project/pull/229181