[llvm] [NFC][SLP] Precommit tests for the phantom load saving (PR #228901)

[Dmitry Sidorov via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -mtriple=amdgpu9.0a-amd-amdhsa -passes=slp-vectorizer < %s | llc -mtriple=amdgpu9.0a-amd-amdhsa | FileCheck -check-prefix=GFX90A %s
+; RUN: opt -mtriple=amdgpu10.30-amd-amdhsa -passes=slp-vectorizer < %s | llc -mtriple=amdgpu10.30-amd-amdhsa | FileCheck -check-prefix=GFX1030 %s
+; RUN: opt -mtriple=amdgpu12.50-amd-amdhsa -passes=slp-vectorizer < %s | llc -mtriple=amdgpu12.50-amd-amdhsa | FileCheck -check-prefix=GFX1250 %s
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MrSidims wrote:

Yes, there are few examples in Aarch64, X86, AMDGPU and WebAssembly codegens. The latter actually have slp-vectorizer run and was modified in https://github.com/llvm/llvm-project/pull/196825 .

> I think better to have a pattern after SLP as input IR

I believe otherwise - IR to IR tests for SLP with separate CostModel tests can not always express performance impact of a change in TTI or SLP. IR to asm test does.

https://github.com/llvm/llvm-project/pull/228901