[llvm] AMDGPU/GlobalISel: Legalize bf16 fdiv (PR #227136)

Petar Avramovic via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 5 01:56:47 PDT 2026


================
@@ -1,205 +1,743 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc -mtriple=amdgpu12.50 -mattr=+real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GFX1250-TRUE16 %s
-; RUN: llc -mtriple=amdgpu12.50 -mattr=-real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GFX1250-FAKE16 %s
+; RUN: llc -global-isel=0 -mtriple=amdgpu12.50 -mattr=+real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GFX1250-TRUE16-SDAG %s
+; RUN: llc -global-isel=1 -mtriple=amdgpu12.50 -mattr=+real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GFX1250-TRUE16-GISEL %s
+; RUN: llc -global-isel=0 -mtriple=amdgpu12.50 -mattr=-real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GFX1250-FAKE16-SDAG %s
+; RUN: llc -global-isel=1 -mtriple=amdgpu12.50 -mattr=-real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GFX1250-FAKE16-GISEL %s
 
 define bfloat @v_fdiv_bf16(bfloat %x, bfloat %y) {
-; GFX1250-TRUE16-LABEL: v_fdiv_bf16:
-; GFX1250-TRUE16:       ; %bb.0:
-; GFX1250-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-TRUE16-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT:    v_dual_lshlrev_b32 v1, 16, v1 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX1250-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-TRUE16-NEXT:    v_div_scale_f32 v2, null, v1, v1, v0
-; GFX1250-TRUE16-NEXT:    v_div_scale_f32 v4, vcc_lo, v0, v1, v0
-; GFX1250-TRUE16-NEXT:    v_rcp_f32_e32 v3, v2
-; GFX1250-TRUE16-NEXT:    s_denorm_mode 15
-; GFX1250-TRUE16-NEXT:    v_nop
-; GFX1250-TRUE16-NEXT:    s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT:    v_fma_f32 v5, -v2, v3, 1.0
-; GFX1250-TRUE16-NEXT:    v_fmac_f32_e32 v3, v5, v3
-; GFX1250-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT:    v_mul_f32_e32 v5, v4, v3
-; GFX1250-TRUE16-NEXT:    v_fma_f32 v6, -v2, v5, v4
-; GFX1250-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT:    v_fmac_f32_e32 v5, v6, v3
-; GFX1250-TRUE16-NEXT:    v_fma_f32 v2, -v2, v5, v4
-; GFX1250-TRUE16-NEXT:    s_denorm_mode 12
-; GFX1250-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT:    v_div_fmas_f32 v2, v2, v3, v5
-; GFX1250-TRUE16-NEXT:    v_div_fixup_f32 v0, v2, v1, v0
-; GFX1250-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-TRUE16-NEXT:    s_set_pc_i64 s[30:31]
-;
-; GFX1250-FAKE16-LABEL: v_fdiv_bf16:
-; GFX1250-FAKE16:       ; %bb.0:
-; GFX1250-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT:    v_dual_lshlrev_b32 v1, 16, v1 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX1250-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-FAKE16-NEXT:    v_div_scale_f32 v2, null, v1, v1, v0
-; GFX1250-FAKE16-NEXT:    v_div_scale_f32 v4, vcc_lo, v0, v1, v0
-; GFX1250-FAKE16-NEXT:    v_rcp_f32_e32 v3, v2
-; GFX1250-FAKE16-NEXT:    s_denorm_mode 15
-; GFX1250-FAKE16-NEXT:    v_nop
-; GFX1250-FAKE16-NEXT:    s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT:    v_fma_f32 v5, -v2, v3, 1.0
-; GFX1250-FAKE16-NEXT:    v_fmac_f32_e32 v3, v5, v3
-; GFX1250-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT:    v_mul_f32_e32 v5, v4, v3
-; GFX1250-FAKE16-NEXT:    v_fma_f32 v6, -v2, v5, v4
-; GFX1250-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT:    v_fmac_f32_e32 v5, v6, v3
-; GFX1250-FAKE16-NEXT:    v_fma_f32 v2, -v2, v5, v4
-; GFX1250-FAKE16-NEXT:    s_denorm_mode 12
-; GFX1250-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT:    v_div_fmas_f32 v2, v2, v3, v5
-; GFX1250-FAKE16-NEXT:    v_div_fixup_f32 v0, v2, v1, v0
-; GFX1250-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-FAKE16-NEXT:    s_set_pc_i64 s[30:31]
+; GFX1250-TRUE16-SDAG-LABEL: v_fdiv_bf16:
+; GFX1250-TRUE16-SDAG:       ; %bb.0:
+; GFX1250-TRUE16-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-TRUE16-SDAG-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-TRUE16-SDAG-NEXT:    v_dual_lshlrev_b32 v1, 16, v1 :: v_dual_lshlrev_b32 v0, 16, v0
+; GFX1250-TRUE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-SDAG-NEXT:    v_div_scale_f32 v2, null, v1, v1, v0
+; GFX1250-TRUE16-SDAG-NEXT:    v_div_scale_f32 v4, vcc_lo, v0, v1, v0
+; GFX1250-TRUE16-SDAG-NEXT:    v_rcp_f32_e32 v3, v2
+; GFX1250-TRUE16-SDAG-NEXT:    s_denorm_mode 15
+; GFX1250-TRUE16-SDAG-NEXT:    v_nop
+; GFX1250-TRUE16-SDAG-NEXT:    s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-SDAG-NEXT:    v_fma_f32 v5, -v2, v3, 1.0
+; GFX1250-TRUE16-SDAG-NEXT:    v_fmac_f32_e32 v3, v5, v3
+; GFX1250-TRUE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-SDAG-NEXT:    v_mul_f32_e32 v5, v4, v3
+; GFX1250-TRUE16-SDAG-NEXT:    v_fma_f32 v6, -v2, v5, v4
+; GFX1250-TRUE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-SDAG-NEXT:    v_fmac_f32_e32 v5, v6, v3
+; GFX1250-TRUE16-SDAG-NEXT:    v_fma_f32 v2, -v2, v5, v4
+; GFX1250-TRUE16-SDAG-NEXT:    s_denorm_mode 12
+; GFX1250-TRUE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-SDAG-NEXT:    v_div_fmas_f32 v2, v2, v3, v5
+; GFX1250-TRUE16-SDAG-NEXT:    v_div_fixup_f32 v0, v2, v1, v0
+; GFX1250-TRUE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-TRUE16-SDAG-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
+; GFX1250-TRUE16-SDAG-NEXT:    s_set_pc_i64 s[30:31]
+;
+; GFX1250-TRUE16-GISEL-LABEL: v_fdiv_bf16:
+; GFX1250-TRUE16-GISEL:       ; %bb.0:
+; GFX1250-TRUE16-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-TRUE16-GISEL-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-TRUE16-GISEL-NEXT:    v_dual_lshlrev_b32 v0, 16, v0 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-GISEL-NEXT:    v_div_scale_f32 v2, null, v1, v1, v0
+; GFX1250-TRUE16-GISEL-NEXT:    v_div_scale_f32 v4, vcc_lo, v0, v1, v0
+; GFX1250-TRUE16-GISEL-NEXT:    v_rcp_f32_e32 v3, v2
+; GFX1250-TRUE16-GISEL-NEXT:    s_denorm_mode 15
+; GFX1250-TRUE16-GISEL-NEXT:    v_nop
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-GISEL-NEXT:    v_fma_f32 v5, -v2, v3, 1.0
+; GFX1250-TRUE16-GISEL-NEXT:    v_fmac_f32_e32 v3, v5, v3
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-GISEL-NEXT:    v_mul_f32_e32 v5, v4, v3
+; GFX1250-TRUE16-GISEL-NEXT:    v_fma_f32 v6, -v2, v5, v4
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-GISEL-NEXT:    v_fmac_f32_e32 v5, v6, v3
+; GFX1250-TRUE16-GISEL-NEXT:    v_fma_f32 v2, -v2, v5, v4
+; GFX1250-TRUE16-GISEL-NEXT:    s_denorm_mode 12
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-GISEL-NEXT:    v_div_fmas_f32 v2, v2, v3, v5
+; GFX1250-TRUE16-GISEL-NEXT:    v_div_fixup_f32 v0, v2, v1, v0
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-GISEL-NEXT:    v_bfe_u32 v1, v0, 16, 1
+; GFX1250-TRUE16-GISEL-NEXT:    v_or_b32_e32 v2, 0x400000, v0
+; GFX1250-TRUE16-GISEL-NEXT:    v_cmp_u_f32_e32 vcc_lo, 0, v0
+; GFX1250-TRUE16-GISEL-NEXT:    v_add3_u32 v1, v1, v0, 0x7fff
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-GISEL-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc_lo
+; GFX1250-TRUE16-GISEL-NEXT:    v_mov_b16_e32 v0.l, v0.h
+; GFX1250-TRUE16-GISEL-NEXT:    s_set_pc_i64 s[30:31]
+;
+; GFX1250-FAKE16-SDAG-LABEL: v_fdiv_bf16:
+; GFX1250-FAKE16-SDAG:       ; %bb.0:
+; GFX1250-FAKE16-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-FAKE16-SDAG-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-FAKE16-SDAG-NEXT:    v_dual_lshlrev_b32 v1, 16, v1 :: v_dual_lshlrev_b32 v0, 16, v0
+; GFX1250-FAKE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-FAKE16-SDAG-NEXT:    v_div_scale_f32 v2, null, v1, v1, v0
+; GFX1250-FAKE16-SDAG-NEXT:    v_div_scale_f32 v4, vcc_lo, v0, v1, v0
+; GFX1250-FAKE16-SDAG-NEXT:    v_rcp_f32_e32 v3, v2
+; GFX1250-FAKE16-SDAG-NEXT:    s_denorm_mode 15
+; GFX1250-FAKE16-SDAG-NEXT:    v_nop
+; GFX1250-FAKE16-SDAG-NEXT:    s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-SDAG-NEXT:    v_fma_f32 v5, -v2, v3, 1.0
+; GFX1250-FAKE16-SDAG-NEXT:    v_fmac_f32_e32 v3, v5, v3
+; GFX1250-FAKE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-SDAG-NEXT:    v_mul_f32_e32 v5, v4, v3
+; GFX1250-FAKE16-SDAG-NEXT:    v_fma_f32 v6, -v2, v5, v4
+; GFX1250-FAKE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-SDAG-NEXT:    v_fmac_f32_e32 v5, v6, v3
+; GFX1250-FAKE16-SDAG-NEXT:    v_fma_f32 v2, -v2, v5, v4
+; GFX1250-FAKE16-SDAG-NEXT:    s_denorm_mode 12
+; GFX1250-FAKE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-SDAG-NEXT:    v_div_fmas_f32 v2, v2, v3, v5
+; GFX1250-FAKE16-SDAG-NEXT:    v_div_fixup_f32 v0, v2, v1, v0
+; GFX1250-FAKE16-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-FAKE16-SDAG-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
+; GFX1250-FAKE16-SDAG-NEXT:    s_set_pc_i64 s[30:31]
+;
+; GFX1250-FAKE16-GISEL-LABEL: v_fdiv_bf16:
+; GFX1250-FAKE16-GISEL:       ; %bb.0:
+; GFX1250-FAKE16-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-FAKE16-GISEL-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-FAKE16-GISEL-NEXT:    v_dual_lshlrev_b32 v0, 16, v0 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-FAKE16-GISEL-NEXT:    v_div_scale_f32 v2, null, v1, v1, v0
+; GFX1250-FAKE16-GISEL-NEXT:    v_div_scale_f32 v4, vcc_lo, v0, v1, v0
+; GFX1250-FAKE16-GISEL-NEXT:    v_rcp_f32_e32 v3, v2
+; GFX1250-FAKE16-GISEL-NEXT:    s_denorm_mode 15
+; GFX1250-FAKE16-GISEL-NEXT:    v_nop
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-GISEL-NEXT:    v_fma_f32 v5, -v2, v3, 1.0
+; GFX1250-FAKE16-GISEL-NEXT:    v_fmac_f32_e32 v3, v5, v3
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-GISEL-NEXT:    v_mul_f32_e32 v5, v4, v3
+; GFX1250-FAKE16-GISEL-NEXT:    v_fma_f32 v6, -v2, v5, v4
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-GISEL-NEXT:    v_fmac_f32_e32 v5, v6, v3
+; GFX1250-FAKE16-GISEL-NEXT:    v_fma_f32 v2, -v2, v5, v4
+; GFX1250-FAKE16-GISEL-NEXT:    s_denorm_mode 12
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-GISEL-NEXT:    v_div_fmas_f32 v2, v2, v3, v5
+; GFX1250-FAKE16-GISEL-NEXT:    v_div_fixup_f32 v0, v2, v1, v0
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX1250-FAKE16-GISEL-NEXT:    v_bfe_u32 v1, v0, 16, 1
+; GFX1250-FAKE16-GISEL-NEXT:    v_or_b32_e32 v2, 0x400000, v0
+; GFX1250-FAKE16-GISEL-NEXT:    v_cmp_u_f32_e32 vcc_lo, 0, v0
+; GFX1250-FAKE16-GISEL-NEXT:    v_add3_u32 v1, v1, v0, 0x7fff
+; GFX1250-FAKE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-FAKE16-GISEL-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc_lo
+; GFX1250-FAKE16-GISEL-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
+; GFX1250-FAKE16-GISEL-NEXT:    s_set_pc_i64 s[30:31]
   %fdiv = fdiv bfloat %x, %y
   ret bfloat %fdiv
 }
 
 define bfloat @v_rcp_bf16(bfloat %x) {
-; GFX1250-TRUE16-LABEL: v_rcp_bf16:
-; GFX1250-TRUE16:       ; %bb.0:
-; GFX1250-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-TRUE16-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT:    v_rcp_bf16_e32 v0.l, v0.l
-; GFX1250-TRUE16-NEXT:    s_set_pc_i64 s[30:31]
-;
-; GFX1250-FAKE16-LABEL: v_rcp_bf16:
-; GFX1250-FAKE16:       ; %bb.0:
-; GFX1250-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT:    v_rcp_bf16_e32 v0, v0
-; GFX1250-FAKE16-NEXT:    s_set_pc_i64 s[30:31]
+; GFX1250-TRUE16-SDAG-LABEL: v_rcp_bf16:
+; GFX1250-TRUE16-SDAG:       ; %bb.0:
+; GFX1250-TRUE16-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-TRUE16-SDAG-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-TRUE16-SDAG-NEXT:    v_rcp_bf16_e32 v0.l, v0.l
+; GFX1250-TRUE16-SDAG-NEXT:    s_set_pc_i64 s[30:31]
+;
+; GFX1250-TRUE16-GISEL-LABEL: v_rcp_bf16:
+; GFX1250-TRUE16-GISEL:       ; %bb.0:
+; GFX1250-TRUE16-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-TRUE16-GISEL-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-TRUE16-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
+; GFX1250-TRUE16-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-GISEL-NEXT:    v_div_scale_f32 v1, null, v0, v0, 1.0
+; GFX1250-TRUE16-GISEL-NEXT:    v_div_scale_f32 v3, vcc_lo, 1.0, v0, 1.0
+; GFX1250-TRUE16-GISEL-NEXT:    v_rcp_f32_e32 v2, v1
----------------
petar-avramovic wrote:

regression on 1250? there is v_rcp_bf16_e32 which sdag selects

https://github.com/llvm/llvm-project/pull/227136


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