[llvm] [RISCV] Ensure Shadow Stack checks correct RA (PR #226309)

[Nemanja Ivanovic via llvm-commits]

================
@@ -200,13 +194,19 @@ static void emitSCSEpilogue(MachineFunction &MF, MachineBasicBlock &MBB,
       (MI->getOpcode() == RISCV::CM_POP || MI->getOpcode() == RISCV::QC_CM_POP))
     ++MI;
   const RISCVInstrInfo *TII = STI.getInstrInfo();
-  if (HasHWShadowStack) {
+  if (SSK == RISCVMachineFunctionInfo::ShadowStackKind::Hardware) {
+    // `sspopchk x5` is the only compressible form, but this would require using
----------------
nemanjai wrote:

Ah, sorry. I just realized this simply moves and updates an existing comment.

https://github.com/llvm/llvm-project/pull/226309