[llvm] [llvm] Fix enum-enum bitwise and arithmetic conversions for C++26 (PR #228945)
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Sun Oct 4 15:33:27 PDT 2026
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp llvm/lib/CodeGen/SelectionDAG/FastISel.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/MC/MCObjectFileInfo.cpp llvm/lib/MC/MCParser/DarwinAsmParser.cpp llvm/lib/Target/AMDGPU/SIFrameLowering.cpp llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp --diff_from_common_commit
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diff --git a/llvm/lib/MC/MCObjectFileInfo.cpp b/llvm/lib/MC/MCObjectFileInfo.cpp
index 86d238814..546ac7caa 100644
--- a/llvm/lib/MC/MCObjectFileInfo.cpp
+++ b/llvm/lib/MC/MCObjectFileInfo.cpp
@@ -158,10 +158,10 @@ void MCObjectFileInfo::initMachOMCObjectFileInfo(const Triple &T) {
SectionKind::getReadOnlyWithRel());
if (ArchTy == Triple::ppc || ArchTy == Triple::ppc64) {
- TextCoalSection
- = Ctx->getMachOSection("__TEXT", "__textcoal_nt",
+ TextCoalSection =
+ Ctx->getMachOSection("__TEXT", "__textcoal_nt",
llvm::to_underlying(MachO::S_COALESCED) |
- MachO::S_ATTR_PURE_INSTRUCTIONS,
+ MachO::S_ATTR_PURE_INSTRUCTIONS,
SectionKind::getText());
ConstTextCoalSection
= Ctx->getMachOSection("__TEXT", "__const_coal",
diff --git a/llvm/lib/MC/MCParser/DarwinAsmParser.cpp b/llvm/lib/MC/MCParser/DarwinAsmParser.cpp
index 25e6cab7d..dd0e4dd68 100644
--- a/llvm/lib/MC/MCParser/DarwinAsmParser.cpp
+++ b/llvm/lib/MC/MCParser/DarwinAsmParser.cpp
@@ -268,17 +268,18 @@ public:
}
bool parseSectionDirectiveSymbolStub(StringRef, SMLoc) {
- return parseSectionSwitch("__TEXT","__symbol_stub",
+ return parseSectionSwitch("__TEXT", "__symbol_stub",
llvm::to_underlying(MachO::S_SYMBOL_STUBS) |
- MachO::S_ATTR_PURE_INSTRUCTIONS,
+ MachO::S_ATTR_PURE_INSTRUCTIONS,
// FIXME: Different on PPC and ARM.
0, 16);
}
bool parseSectionDirectivePICSymbolStub(StringRef, SMLoc) {
- return parseSectionSwitch("__TEXT","__picsymbol_stub",
+ return parseSectionSwitch("__TEXT", "__picsymbol_stub",
llvm::to_underlying(MachO::S_SYMBOL_STUBS) |
- MachO::S_ATTR_PURE_INSTRUCTIONS, 0, 26);
+ MachO::S_ATTR_PURE_INSTRUCTIONS,
+ 0, 26);
}
bool parseSectionDirectiveData(StringRef, SMLoc) {
@@ -363,15 +364,19 @@ public:
}
bool parseSectionDirectiveObjCClsRefs(StringRef, SMLoc) {
- return parseSectionSwitch("__OBJC", "__cls_refs",
- MachO::S_ATTR_NO_DEAD_STRIP |
- llvm::to_underlying(MachO::S_LITERAL_POINTERS), 4);
+ return parseSectionSwitch(
+ "__OBJC", "__cls_refs",
+ MachO::S_ATTR_NO_DEAD_STRIP |
+ llvm::to_underlying(MachO::S_LITERAL_POINTERS),
+ 4);
}
bool parseSectionDirectiveObjCMessageRefs(StringRef, SMLoc) {
- return parseSectionSwitch("__OBJC", "__message_refs",
- MachO::S_ATTR_NO_DEAD_STRIP |
- llvm::to_underlying(MachO::S_LITERAL_POINTERS), 4);
+ return parseSectionSwitch(
+ "__OBJC", "__message_refs",
+ MachO::S_ATTR_NO_DEAD_STRIP |
+ llvm::to_underlying(MachO::S_LITERAL_POINTERS),
+ 4);
}
bool parseSectionDirectiveObjCSymbols(StringRef, SMLoc) {
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index eff041737..2f1581c98 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -80,8 +80,9 @@ static MCCFIInstruction createScaledCFAInPrivateWave(const GCNSubtarget &ST,
OSBlock << uint8_t(dwarf::DW_OP_deref_size) << uint8_t(SGPRByteSize)
<< uint8_t(dwarf::DW_OP_lit0 + WavefrontSizeLog2)
<< uint8_t(dwarf::DW_OP_shl)
- << uint8_t(dwarf::DW_OP_lit0 +
- llvm::to_underlying(dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave))
+ << uint8_t(
+ dwarf::DW_OP_lit0 +
+ llvm::to_underlying(dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave))
<< uint8_t(dwarf::DW_OP_LLVM_user)
<< uint8_t(dwarf::DW_OP_LLVM_form_aspace_address);
@@ -779,8 +780,9 @@ void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF,
dwarf::DW_CFA_def_cfa_expression,
4, // length
static_cast<char>(dwarf::DW_OP_lit0),
- static_cast<char>(dwarf::DW_OP_lit0 +
- llvm::to_underlying(dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave)),
+ static_cast<char>(
+ dwarf::DW_OP_lit0 +
+ llvm::to_underlying(dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave)),
static_cast<char>(dwarf::DW_OP_LLVM_user),
static_cast<char>(dwarf::DW_OP_LLVM_form_aspace_address)};
static StringRef CFAEncodedInstUserOps =
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
index 088cebe1d..4cc6abb80 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
@@ -628,7 +628,9 @@ struct OpRef {
assert(!R.isValue());
return OpRef(R.OpN & (Undef | Index | HiHalf));
}
- static OpRef undef(MVT Ty) { return OpRef(Undef | llvm::to_underlying(Ty.SimpleTy)); }
+ static OpRef undef(MVT Ty) {
+ return OpRef(Undef | llvm::to_underlying(Ty.SimpleTy));
+ }
// Direct value.
SDValue OpV = SDValue();
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index 1895fa2eb..633d3b32e 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -251,8 +251,9 @@ bool LoongArchAsmBackend::relaxAlign(MCFragment &F, unsigned &Size) {
Ctx),
Ctx);
}
- MCFixup Fixup =
- MCFixup::create(0, Expr, FirstLiteralRelocationKind + llvm::to_underlying(ELF::R_LARCH_ALIGN));
+ MCFixup Fixup = MCFixup::create(0, Expr,
+ FirstLiteralRelocationKind +
+ llvm::to_underlying(ELF::R_LARCH_ALIGN));
F.setVarFixups({Fixup});
F.setLinkerRelaxable();
return true;
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
index 3a77bd154..3f66cd062 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
@@ -166,7 +166,8 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO,
// `la.abs`.
Fixups.push_back(
MCFixup::create(0, MCConstantExpr::create(0, Ctx),
- FirstLiteralRelocationKind + llvm::to_underlying(ELF::R_LARCH_MARK_LA)));
+ FirstLiteralRelocationKind +
+ llvm::to_underlying(ELF::R_LARCH_MARK_LA)));
[[fallthrough]];
case ELF::R_LARCH_ABS_HI20:
FixupKind = LoongArch::fixup_loongarch_abs_hi20;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
index 0a64998a2..5a77b57cf 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
@@ -155,9 +155,9 @@ void PPCELFStreamer::emitGOTToPCRelReloc(const MCInst &Inst) {
MCBinaryExpr::createSub(CurrentLocationExpr, SubExpr, getContext());
MCFragment *F = LabelSym->getFragment();
- F->addFixup(
- MCFixup::create(LabelSym->getOffset() - 8, SubExpr2,
- FirstLiteralRelocationKind + llvm::to_underlying(ELF::R_PPC64_PCREL_OPT)));
+ F->addFixup(MCFixup::create(LabelSym->getOffset() - 8, SubExpr2,
+ FirstLiteralRelocationKind +
+ llvm::to_underlying(ELF::R_PPC64_PCREL_OPT)));
emitLabel(CurrentLocation, Inst.getLoc());
}
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h
index cd7317927..850eee52f 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h
@@ -72,9 +72,7 @@ namespace PPC {
return llvm::to_underlying(P) & llvm::to_underlying(B);
}
- inline unsigned operator&(BranchHintBit B, Predicate P) {
- return P & B;
- }
+ inline unsigned operator&(BranchHintBit B, Predicate P) { return P & B; }
/// Invert the specified predicate. != -> ==, < -> >=.
Predicate InvertPredicate(Predicate Opcode);
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 9c9fb6796..820f5886c 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -349,8 +349,9 @@ bool RISCVAsmBackend::relaxAlign(MCFragment &F, unsigned &Size) {
Size = F.getAlignment().value() - MinNopLen;
auto *Expr = MCConstantExpr::create(Size, getContext());
- MCFixup Fixup =
- MCFixup::create(0, Expr, FirstLiteralRelocationKind + llvm::to_underlying(ELF::R_RISCV_ALIGN));
+ MCFixup Fixup = MCFixup::create(0, Expr,
+ FirstLiteralRelocationKind +
+ llvm::to_underlying(ELF::R_RISCV_ALIGN));
F.setVarFixups({Fixup});
F.setLinkerRelaxable();
return true;
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
index bd0bcabb0..6b8716767 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
@@ -171,8 +171,9 @@ uint64_t SystemZMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNum,
if (MO.isExpr()) {
unsigned MIBitSize = MCII.get(MI.getOpcode()).getSize() * 8;
uint32_t RawBitOffset = getOperandBitOffset(MI, OpNum, STI);
- unsigned OpBitSize =
- SystemZ::MCFixupKindInfos[llvm::to_underlying(Kind) - FirstTargetFixupKind].TargetSize;
+ unsigned OpBitSize = SystemZ::MCFixupKindInfos[llvm::to_underlying(Kind) -
+ FirstTargetFixupKind]
+ .TargetSize;
uint32_t BitOffset = MIBitSize - RawBitOffset - OpBitSize;
addFixup(Fixups, BitOffset >> 3, MO.getExpr(), Kind);
return 0;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 8f2374426..dcf052fa3 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -542,7 +542,8 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
assert(ImmOffset == 0);
if (Size == 8) {
- FixupKind = FirstLiteralRelocationKind + llvm::to_underlying(ELF::R_X86_64_GOTPC64);
+ FixupKind = FirstLiteralRelocationKind +
+ llvm::to_underlying(ELF::R_X86_64_GOTPC64);
} else {
assert(Size == 4);
FixupKind = X86::reloc_global_offset_table;
``````````
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https://github.com/llvm/llvm-project/pull/228945
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