[llvm] [CodeGenPrepare] Reuse free wider zero extensions (PR #228750)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Oct 4 00:36:49 PDT 2026


=?utf-8?q?D=C3=A1vid_Bolvansk=C3=BD?= <david.bolvansky at gmail.com>,
=?utf-8?q?D=C3=A1vid_Bolvansk=C3=BD?= <david.bolvansky at gmail.com>,
=?utf-8?q?D=C3=A1vid_Bolvansk=C3=BD?= <david.bolvansky at gmail.com>,
=?utf-8?q?D=C3=A1vid_Bolvansk=C3=BD?= <david.bolvansky at gmail.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/228750 at github.com>


================
@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64 -verify-machineinstrs < %s | FileCheck %s
+
+; Reusing the extending load's register avoids a redundant 32-bit copy before
+; the indexed memory operand, even when the value survives a call.
+declare void @consume(i32)
+
+define i64 @zext_i8(ptr %p, ptr %table, i1 %cold) {
----------------
RKSimon wrote:

```suggestion
define i64 @zext_i8(ptr %p, ptr %table, i1 %cold) nounwind {
```

https://github.com/llvm/llvm-project/pull/228750


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