[llvm] [AggressiveInstCombine] Check profitability of low-bits mask table folds (PR #228736)

[Chris Kennelly via llvm-commits]

=?utf-8?q?Dávid_Bolvanský?= <david.bolvansky at gmail.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/228736 at github.com>


ckennelly wrote:

I put together a quick-and-dirty microbenchmark for the different sequences in question, and got [data points for Zen3/V2/M5 Pro](https://github.com/ckennelly/snippets/blob/main/llvm/pr228736/results/SUMMARY.md).  The table has a slight edge in throughput situations on the AArch64 platforms I tried, but does not in latency-bound situations.

Looking at zstd, it looks like there's a zero extension issue that crops up (rough [prototype](https://github.com/ckennelly/llvm-project/tree/dag-and-zext-lowmask) for fixing it).  Zstd decode has interleaved streams which makes it more throughput-oriented, so port pressure means we might prefer `ldr; and` to `lsl; bic`.  But I'm not sure that's a generically profitable conclusion elsewhere?

https://github.com/llvm/llvm-project/pull/228736