[llvm] [AArch64][LSR] Prefer pointer IVs for SVE accesses that need splitting (PR #228510)

via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 3 07:13:47 PDT 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h --diff_from_common_commit
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 49cb2e514..c1e65c627 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -7482,7 +7482,7 @@ bool AArch64TTIImpl::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
     EVT VT = getTLI()->getValueType(DL, Ty);
     uint64_t AccessNumBytes = VT.getStoreSize().getKnownMinValue();
     if (AccessNumBytes > 16 && getTLI()->getTypeAction(Ty->getContext(), VT) ==
-                                    TargetLowering::TypeSplitVector) {
+                                   TargetLowering::TypeSplitVector) {
       EVT LegalVT = getTLI()->getLegalTypeToTransformTo(Ty->getContext(), VT);
       uint64_t VecNumBytes = LegalVT.getStoreSize().getKnownMinValue();
       if (LegalVT.getVectorElementType() == VT.getVectorElementType() &&

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https://github.com/llvm/llvm-project/pull/228510


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