[llvm] [SystemZ] Fix type mismatch in the creation of VSUM nodes in lowerCTPOP. (PR #228667)

[Craig Topper via llvm-commits]

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/228667

Both operands of VSUM should have the same type. Bitcast the v16i8 zero vector to v4i32 to make the types match.

Found while adding SDTCisSameAs to SDNodeInfo::verifyNode.

>From 9f56c044f46a307f0933a77c5aadd19925d64567 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 2 Oct 2026 23:34:21 -0700
Subject: [PATCH] [SystemZ] Fix type mismatch in the creation of VSUM nodes in
 lowerCTPOP.

Both operands of VSUM should have the same type. Bitcast the v16i8
zero vector to v4i32 to make the types match.

Found while adding SDTCisSameAs to SDNodeInfo::verifyNode.
---
 llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index a6cc3e94b7e7d72..c05fae6146e9c4d 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -5108,6 +5108,7 @@ SDValue SystemZTargetLowering::lowerCTPOP(SDValue Op,
       SDValue Tmp = DAG.getSplatBuildVector(MVT::v16i8, DL,
                                             DAG.getConstant(0, DL, MVT::i32));
       Op = DAG.getNode(SystemZISD::VSUM, DL, MVT::v4i32, Op, Tmp);
+      Tmp = DAG.getNode(ISD::BITCAST, DL, MVT::v4i32, Tmp);
       Op = DAG.getNode(SystemZISD::VSUM, DL, VT, Op, Tmp);
       break;
     }