[llvm] [SelectionDAG] Avoid unrolling vector scmp/ucmp when widening a narrow result (PR #228568)
Konstantin Bogdanov via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 13:03:07 PDT 2026
https://github.com/thevar1able created https://github.com/llvm/llvm-project/pull/228568
When a vector `scmp`/`ucmp` result gets widened to a different element count than its operands, `WidenVecRes_CMP` used to fall back to `UnrollVectorOp`. For example, a `<4 x i8>` result widens to `<16 x i8>` on x86 while its `<4 x i32>` operands are already legal.
InstCombine now produces this pattern from `trunc((x >> (BW-1)) | zext(x != 0))` (#196828, #196847). On x86 it gets scalarized into `sets`/`setg`/`pinsrb` chains. x86 has no `ISD::SCMP` lowering, and the integer-promotion change in #198554 (reverted in #204978) doesn't help here.
This patch instead does the comparison in the operand type, then sign-extends or truncates to the result element type, which keeps the values `-1/0/1`. If the target expands the comparison, it's expanded right away so the truncate is combined with the setccs and x86 can use `PACKSS`.
```
scmp <4 x i8> (<4 x i32> %x, zeroinitializer), -mcpu=x86-64-v3
before: 25 instructions (vpextrd/testl/sets/setg/subb/vpinsrb x4)
after: vpxor, vpcmpgtd, vpcmpgtd, vpsubd, vpshufb
```
Reproducer (trunk, without this patch): https://godbolt.org/z/dfEaPsYvr
```c
void sign(const int *restrict x, signed char *restrict out, int n) {
for (int i = 0; i < n; i++)
out[i] = (x[i] >> 31) | (x[i] != 0);
}
```
The vector loop body goes from 57 to 19 instructions with this patch.
It also adds a `TargetLowering::shouldUnrollVectorCMP` hook so targets can keep unrolling where vector compares are too expensive. X86 uses it for vXi64 before SSE4.2, where an i64 compare is emulated with several vXi32 compares and shuffles. llvm-mca throughput with SSE2 only, in cycles:
| | scalar | vector |
|---|---|---|
| `scmp <16 x i64> → <16 x i8>` (x86-64 / skylake / znver3) | 38.3 / 39.0 / 32.0 | 39.5 / 47.0 / 25.3 |
| `scmp <2 x i64> → <2 x i8>` (x86-64 / skylake / znver3) | 5.0 / 4.0 / 5.0 | 6.0 / 8.0 / 4.0 |
With the hook in place, no X86 test gets worse. Some examples:
| test | before | after |
|---|---|---|
| `scmp_wide_vec_op` (SSE4 / AVX2 / AVX512) | 114 / 123 / 127 | 50 / 24 / 16 |
| `ucmp_wide_vec_op` (SSE2 / SSE4 / AVX2) | 115 / 169 / 103 | 29 / 31 / 18 |
(Counts are lines in the CHECK output.)
Non-simple operand types (e.g. `<17 x i71>`), scalable vectors, and i1 operands keep the existing unrolling.
The first commit adds the new tests with the current codegen (NFC); the second contains the change and its test diff.
>From e65016a63fd91e944413bba621ba1bfefdb23aae Mon Sep 17 00:00:00 2001
From: Konstantin Bogdanov <konstantin at clickhouse.com>
Date: Fri, 2 Oct 2026 21:32:25 +0200
Subject: [PATCH 1/2] [X86] Add tests for vector scmp with a narrow result
(NFC)
---
llvm/test/CodeGen/X86/scmp.ll | 777 ++++++++++++++++++++++++++++++++++
1 file changed, 777 insertions(+)
diff --git a/llvm/test/CodeGen/X86/scmp.ll b/llvm/test/CodeGen/X86/scmp.ll
index 393e05bfd0cc6..481c03cda088c 100644
--- a/llvm/test/CodeGen/X86/scmp.ll
+++ b/llvm/test/CodeGen/X86/scmp.ll
@@ -1019,6 +1019,783 @@ define <4 x i8> @scmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind {
ret <4 x i8> %1
}
+; scmp(x, 0) with a narrow result, as formed by InstCombine from
+; trunc((x >> (BW-1)) | zext(x != 0)).
+define <4 x i8> @scmp_zero_narrow_vec_result(<4 x i32> %x) nounwind {
+; SSE2-LABEL: scmp_zero_narrow_vec_result:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: sets %al
+; SSE2-NEXT: setg %cl
+; SSE2-NEXT: subb %al, %cl
+; SSE2-NEXT: movzbl %cl, %eax
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SSE2-NEXT: movd %xmm1, %ecx
+; SSE2-NEXT: testl %ecx, %ecx
+; SSE2-NEXT: sets %cl
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %cl, %dl
+; SSE2-NEXT: movzbl %dl, %ecx
+; SSE2-NEXT: shll $8, %ecx
+; SSE2-NEXT: orl %eax, %ecx
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSE2-NEXT: movd %xmm1, %eax
+; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: sets %al
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %al, %dl
+; SSE2-NEXT: movzbl %dl, %eax
+; SSE2-NEXT: shll $16, %eax
+; SSE2-NEXT: orl %ecx, %eax
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
+; SSE2-NEXT: movd %xmm0, %ecx
+; SSE2-NEXT: testl %ecx, %ecx
+; SSE2-NEXT: sets %cl
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %cl, %dl
+; SSE2-NEXT: movzbl %dl, %ecx
+; SSE2-NEXT: shll $24, %ecx
+; SSE2-NEXT: orl %eax, %ecx
+; SSE2-NEXT: movd %ecx, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE4-LABEL: scmp_zero_narrow_vec_result:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pextrd $1, %xmm0, %eax
+; SSE4-NEXT: testl %eax, %eax
+; SSE4-NEXT: sets %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: movd %xmm0, %ecx
+; SSE4-NEXT: testl %ecx, %ecx
+; SSE4-NEXT: sets %cl
+; SSE4-NEXT: setg %dl
+; SSE4-NEXT: subb %cl, %dl
+; SSE4-NEXT: movzbl %dl, %ecx
+; SSE4-NEXT: movd %ecx, %xmm1
+; SSE4-NEXT: pinsrb $1, %eax, %xmm1
+; SSE4-NEXT: pextrd $2, %xmm0, %eax
+; SSE4-NEXT: testl %eax, %eax
+; SSE4-NEXT: sets %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $2, %eax, %xmm1
+; SSE4-NEXT: pextrd $3, %xmm0, %eax
+; SSE4-NEXT: testl %eax, %eax
+; SSE4-NEXT: sets %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $3, %eax, %xmm1
+; SSE4-NEXT: movdqa %xmm1, %xmm0
+; SSE4-NEXT: retq
+;
+; AVX-LABEL: scmp_zero_narrow_vec_result:
+; AVX: # %bb.0:
+; AVX-NEXT: vpextrd $1, %xmm0, %eax
+; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: sets %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vmovd %xmm0, %eax
+; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: sets %al
+; AVX-NEXT: setg %dl
+; AVX-NEXT: subb %al, %dl
+; AVX-NEXT: vmovd %edx, %xmm1
+; AVX-NEXT: vpinsrb $1, %ecx, %xmm1, %xmm1
+; AVX-NEXT: vpextrd $2, %xmm0, %eax
+; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: sets %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1
+; AVX-NEXT: vpextrd $3, %xmm0, %eax
+; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: sets %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $3, %ecx, %xmm1, %xmm0
+; AVX-NEXT: retq
+;
+; X86-LABEL: scmp_zero_narrow_vec_result:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: sets %dl
+; X86-NEXT: setg %cl
+; X86-NEXT: subb %dl, %cl
+; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: sets %dl
+; X86-NEXT: setg %ch
+; X86-NEXT: subb %dl, %ch
+; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: sets %dl
+; X86-NEXT: setg %dh
+; X86-NEXT: subb %dl, %dh
+; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: sets %dl
+; X86-NEXT: setg %bl
+; X86-NEXT: subb %dl, %bl
+; X86-NEXT: movb %bl, 3(%eax)
+; X86-NEXT: movb %dh, 2(%eax)
+; X86-NEXT: movb %ch, 1(%eax)
+; X86-NEXT: movb %cl, (%eax)
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl $4
+;
+; SETZUCC-LABEL: scmp_zero_narrow_vec_result:
+; SETZUCC: # %bb.0:
+; SETZUCC-NEXT: movd %xmm0, %eax
+; SETZUCC-NEXT: testl %eax, %eax
+; SETZUCC-NEXT: setzus %al
+; SETZUCC-NEXT: setzug %cl
+; SETZUCC-NEXT: subb %al, %cl
+; SETZUCC-NEXT: movzbl %cl, %eax
+; SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SETZUCC-NEXT: movd %xmm1, %ecx
+; SETZUCC-NEXT: testl %ecx, %ecx
+; SETZUCC-NEXT: setzus %cl
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %cl, %dl
+; SETZUCC-NEXT: movzbl %dl, %ecx
+; SETZUCC-NEXT: shll $8, %ecx
+; SETZUCC-NEXT: orl %eax, %ecx
+; SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SETZUCC-NEXT: movd %xmm1, %eax
+; SETZUCC-NEXT: testl %eax, %eax
+; SETZUCC-NEXT: setzus %al
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %al, %dl
+; SETZUCC-NEXT: movzbl %dl, %eax
+; SETZUCC-NEXT: shll $16, %eax
+; SETZUCC-NEXT: orl %ecx, %eax
+; SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
+; SETZUCC-NEXT: movd %xmm0, %ecx
+; SETZUCC-NEXT: testl %ecx, %ecx
+; SETZUCC-NEXT: setzus %cl
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %cl, %dl
+; SETZUCC-NEXT: movzbl %dl, %ecx
+; SETZUCC-NEXT: shll $24, %ecx
+; SETZUCC-NEXT: orl %eax, %ecx
+; SETZUCC-NEXT: movd %ecx, %xmm0
+; SETZUCC-NEXT: retq
+;
+; NO-SETZUCC-LABEL: scmp_zero_narrow_vec_result:
+; NO-SETZUCC: # %bb.0:
+; NO-SETZUCC-NEXT: movd %xmm0, %eax
+; NO-SETZUCC-NEXT: testl %eax, %eax
+; NO-SETZUCC-NEXT: sets %al
+; NO-SETZUCC-NEXT: setg %cl
+; NO-SETZUCC-NEXT: subb %al, %cl
+; NO-SETZUCC-NEXT: movzbl %cl, %eax
+; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; NO-SETZUCC-NEXT: movd %xmm1, %ecx
+; NO-SETZUCC-NEXT: testl %ecx, %ecx
+; NO-SETZUCC-NEXT: sets %cl
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %cl, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %ecx
+; NO-SETZUCC-NEXT: shll $8, %ecx
+; NO-SETZUCC-NEXT: orl %eax, %ecx
+; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; NO-SETZUCC-NEXT: movd %xmm1, %eax
+; NO-SETZUCC-NEXT: testl %eax, %eax
+; NO-SETZUCC-NEXT: sets %al
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %al, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %eax
+; NO-SETZUCC-NEXT: shll $16, %eax
+; NO-SETZUCC-NEXT: orl %ecx, %eax
+; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
+; NO-SETZUCC-NEXT: movd %xmm0, %ecx
+; NO-SETZUCC-NEXT: testl %ecx, %ecx
+; NO-SETZUCC-NEXT: sets %cl
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %cl, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %ecx
+; NO-SETZUCC-NEXT: shll $24, %ecx
+; NO-SETZUCC-NEXT: orl %eax, %ecx
+; NO-SETZUCC-NEXT: movd %ecx, %xmm0
+; NO-SETZUCC-NEXT: retq
+ %1 = call <4 x i8> @llvm.scmp(<4 x i32> %x, <4 x i32> zeroinitializer)
+ ret <4 x i8> %1
+}
+
+define <8 x i8> @scmp_narrow_vec_result_v8i16(<8 x i16> %x, <8 x i16> %y) nounwind {
+; SSE2-LABEL: scmp_narrow_vec_result_v8i16:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pextrw $4, %xmm1, %eax
+; SSE2-NEXT: pextrw $4, %xmm0, %ecx
+; SSE2-NEXT: cmpw %ax, %cx
+; SSE2-NEXT: setl %al
+; SSE2-NEXT: setg %cl
+; SSE2-NEXT: subb %al, %cl
+; SSE2-NEXT: movzbl %cl, %ecx
+; SSE2-NEXT: pextrw $5, %xmm1, %eax
+; SSE2-NEXT: pextrw $5, %xmm0, %edx
+; SSE2-NEXT: cmpw %ax, %dx
+; SSE2-NEXT: setl %al
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %al, %dl
+; SSE2-NEXT: movzbl %dl, %eax
+; SSE2-NEXT: shll $8, %eax
+; SSE2-NEXT: orl %ecx, %eax
+; SSE2-NEXT: movd %xmm1, %ecx
+; SSE2-NEXT: movd %xmm0, %edx
+; SSE2-NEXT: cmpw %cx, %dx
+; SSE2-NEXT: setl %cl
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %cl, %dl
+; SSE2-NEXT: movzbl %dl, %ecx
+; SSE2-NEXT: pextrw $1, %xmm1, %edx
+; SSE2-NEXT: pextrw $1, %xmm0, %esi
+; SSE2-NEXT: cmpw %dx, %si
+; SSE2-NEXT: setl %dl
+; SSE2-NEXT: setg %sil
+; SSE2-NEXT: subb %dl, %sil
+; SSE2-NEXT: movzbl %sil, %edx
+; SSE2-NEXT: shll $8, %edx
+; SSE2-NEXT: pextrw $2, %xmm1, %esi
+; SSE2-NEXT: orl %ecx, %edx
+; SSE2-NEXT: pextrw $2, %xmm0, %ecx
+; SSE2-NEXT: cmpw %si, %cx
+; SSE2-NEXT: setl %cl
+; SSE2-NEXT: setg %sil
+; SSE2-NEXT: subb %cl, %sil
+; SSE2-NEXT: movzbl %sil, %ecx
+; SSE2-NEXT: shll $16, %ecx
+; SSE2-NEXT: orl %edx, %ecx
+; SSE2-NEXT: pextrw $3, %xmm1, %edx
+; SSE2-NEXT: pextrw $3, %xmm0, %esi
+; SSE2-NEXT: cmpw %dx, %si
+; SSE2-NEXT: setl %dl
+; SSE2-NEXT: setg %sil
+; SSE2-NEXT: subb %dl, %sil
+; SSE2-NEXT: movzbl %sil, %edx
+; SSE2-NEXT: shll $24, %edx
+; SSE2-NEXT: orl %ecx, %edx
+; SSE2-NEXT: movd %edx, %xmm2
+; SSE2-NEXT: pinsrw $2, %eax, %xmm2
+; SSE2-NEXT: pextrw $6, %xmm1, %eax
+; SSE2-NEXT: pextrw $6, %xmm0, %ecx
+; SSE2-NEXT: cmpw %ax, %cx
+; SSE2-NEXT: setl %al
+; SSE2-NEXT: setg %cl
+; SSE2-NEXT: subb %al, %cl
+; SSE2-NEXT: movzbl %cl, %eax
+; SSE2-NEXT: pextrw $7, %xmm1, %ecx
+; SSE2-NEXT: pextrw $7, %xmm0, %edx
+; SSE2-NEXT: cmpw %cx, %dx
+; SSE2-NEXT: setl %cl
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %cl, %dl
+; SSE2-NEXT: movzbl %dl, %ecx
+; SSE2-NEXT: shll $8, %ecx
+; SSE2-NEXT: orl %eax, %ecx
+; SSE2-NEXT: pinsrw $3, %ecx, %xmm2
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE4-LABEL: scmp_narrow_vec_result_v8i16:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pextrw $1, %xmm1, %eax
+; SSE4-NEXT: pextrw $1, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: movd %xmm1, %ecx
+; SSE4-NEXT: movd %xmm0, %edx
+; SSE4-NEXT: cmpw %cx, %dx
+; SSE4-NEXT: setl %cl
+; SSE4-NEXT: setg %dl
+; SSE4-NEXT: subb %cl, %dl
+; SSE4-NEXT: movzbl %dl, %ecx
+; SSE4-NEXT: movd %ecx, %xmm2
+; SSE4-NEXT: pinsrb $1, %eax, %xmm2
+; SSE4-NEXT: pextrw $2, %xmm1, %eax
+; SSE4-NEXT: pextrw $2, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $2, %eax, %xmm2
+; SSE4-NEXT: pextrw $3, %xmm1, %eax
+; SSE4-NEXT: pextrw $3, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $3, %eax, %xmm2
+; SSE4-NEXT: pextrw $4, %xmm1, %eax
+; SSE4-NEXT: pextrw $4, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $4, %eax, %xmm2
+; SSE4-NEXT: pextrw $5, %xmm1, %eax
+; SSE4-NEXT: pextrw $5, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $5, %eax, %xmm2
+; SSE4-NEXT: pextrw $6, %xmm1, %eax
+; SSE4-NEXT: pextrw $6, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $6, %eax, %xmm2
+; SSE4-NEXT: pextrw $7, %xmm1, %eax
+; SSE4-NEXT: pextrw $7, %xmm0, %ecx
+; SSE4-NEXT: cmpw %ax, %cx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: pinsrb $7, %eax, %xmm2
+; SSE4-NEXT: movdqa %xmm2, %xmm0
+; SSE4-NEXT: retq
+;
+; AVX-LABEL: scmp_narrow_vec_result_v8i16:
+; AVX: # %bb.0:
+; AVX-NEXT: vpextrw $1, %xmm1, %eax
+; AVX-NEXT: vpextrw $1, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vmovd %xmm1, %eax
+; AVX-NEXT: vmovd %xmm0, %edx
+; AVX-NEXT: cmpw %ax, %dx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %dl
+; AVX-NEXT: subb %al, %dl
+; AVX-NEXT: vmovd %edx, %xmm2
+; AVX-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $2, %xmm1, %eax
+; AVX-NEXT: vpextrw $2, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $2, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $3, %xmm1, %eax
+; AVX-NEXT: vpextrw $3, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $3, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $4, %xmm1, %eax
+; AVX-NEXT: vpextrw $4, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $4, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $5, %xmm1, %eax
+; AVX-NEXT: vpextrw $5, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $5, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $6, %xmm1, %eax
+; AVX-NEXT: vpextrw $6, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $6, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $7, %xmm1, %eax
+; AVX-NEXT: vpextrw $7, %xmm0, %ecx
+; AVX-NEXT: cmpw %ax, %cx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vpinsrb $7, %ecx, %xmm2, %xmm0
+; AVX-NEXT: retq
+;
+; X86-LABEL: scmp_narrow_vec_result_v8i16:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: pushl %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ebp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %cx
+; X86-NEXT: setl %ch
+; X86-NEXT: setg %al
+; X86-NEXT: subb %ch, %al
+; X86-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %dx
+; X86-NEXT: setl %ch
+; X86-NEXT: setg %al
+; X86-NEXT: subb %ch, %al
+; X86-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %bx
+; X86-NEXT: setl %dh
+; X86-NEXT: setg %ch
+; X86-NEXT: subb %dh, %ch
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %di
+; X86-NEXT: setl %bl
+; X86-NEXT: setg %dh
+; X86-NEXT: subb %bl, %dh
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %di
+; X86-NEXT: setl %bh
+; X86-NEXT: setg %bl
+; X86-NEXT: subb %bh, %bl
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %si
+; X86-NEXT: setl %al
+; X86-NEXT: setg %bh
+; X86-NEXT: subb %al, %bh
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %ax
+; X86-NEXT: setl %al
+; X86-NEXT: setg %dl
+; X86-NEXT: subb %al, %dl
+; X86-NEXT: cmpw {{[0-9]+}}(%esp), %bp
+; X86-NEXT: setl %al
+; X86-NEXT: setg %cl
+; X86-NEXT: subb %al, %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movb %cl, 7(%eax)
+; X86-NEXT: movb %dl, 6(%eax)
+; X86-NEXT: movb %bh, 5(%eax)
+; X86-NEXT: movb %bl, 4(%eax)
+; X86-NEXT: movb %dh, 3(%eax)
+; X86-NEXT: movb %ch, 2(%eax)
+; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
+; X86-NEXT: movb %cl, 1(%eax)
+; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
+; X86-NEXT: movb %cl, (%eax)
+; X86-NEXT: addl $4, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl $4
+;
+; SETZUCC-LABEL: scmp_narrow_vec_result_v8i16:
+; SETZUCC: # %bb.0:
+; SETZUCC-NEXT: pextrw $4, %xmm1, %eax
+; SETZUCC-NEXT: pextrw $4, %xmm0, %ecx
+; SETZUCC-NEXT: cmpw %ax, %cx
+; SETZUCC-NEXT: setzul %al
+; SETZUCC-NEXT: setzug %cl
+; SETZUCC-NEXT: subb %al, %cl
+; SETZUCC-NEXT: movzbl %cl, %ecx
+; SETZUCC-NEXT: pextrw $5, %xmm1, %eax
+; SETZUCC-NEXT: pextrw $5, %xmm0, %edx
+; SETZUCC-NEXT: cmpw %ax, %dx
+; SETZUCC-NEXT: setzul %al
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %al, %dl
+; SETZUCC-NEXT: movzbl %dl, %eax
+; SETZUCC-NEXT: shll $8, %eax
+; SETZUCC-NEXT: orl %ecx, %eax
+; SETZUCC-NEXT: movd %xmm1, %ecx
+; SETZUCC-NEXT: movd %xmm0, %edx
+; SETZUCC-NEXT: cmpw %cx, %dx
+; SETZUCC-NEXT: setzul %cl
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %cl, %dl
+; SETZUCC-NEXT: movzbl %dl, %ecx
+; SETZUCC-NEXT: pextrw $1, %xmm1, %edx
+; SETZUCC-NEXT: pextrw $1, %xmm0, %esi
+; SETZUCC-NEXT: cmpw %dx, %si
+; SETZUCC-NEXT: setzul %dl
+; SETZUCC-NEXT: setzug %sil
+; SETZUCC-NEXT: subb %dl, %sil
+; SETZUCC-NEXT: movzbl %sil, %edx
+; SETZUCC-NEXT: shll $8, %edx
+; SETZUCC-NEXT: orl %ecx, %edx
+; SETZUCC-NEXT: pextrw $2, %xmm1, %ecx
+; SETZUCC-NEXT: pextrw $2, %xmm0, %esi
+; SETZUCC-NEXT: cmpw %cx, %si
+; SETZUCC-NEXT: setzul %cl
+; SETZUCC-NEXT: setzug %sil
+; SETZUCC-NEXT: subb %cl, %sil
+; SETZUCC-NEXT: movzbl %sil, %ecx
+; SETZUCC-NEXT: shll $16, %ecx
+; SETZUCC-NEXT: orl %edx, %ecx
+; SETZUCC-NEXT: pextrw $3, %xmm1, %edx
+; SETZUCC-NEXT: pextrw $3, %xmm0, %esi
+; SETZUCC-NEXT: cmpw %dx, %si
+; SETZUCC-NEXT: setzul %dl
+; SETZUCC-NEXT: setzug %sil
+; SETZUCC-NEXT: subb %dl, %sil
+; SETZUCC-NEXT: movzbl %sil, %edx
+; SETZUCC-NEXT: shll $24, %edx
+; SETZUCC-NEXT: orl %ecx, %edx
+; SETZUCC-NEXT: movd %edx, %xmm2
+; SETZUCC-NEXT: pinsrw $2, %eax, %xmm2
+; SETZUCC-NEXT: pextrw $6, %xmm1, %eax
+; SETZUCC-NEXT: pextrw $6, %xmm0, %ecx
+; SETZUCC-NEXT: cmpw %ax, %cx
+; SETZUCC-NEXT: setzul %al
+; SETZUCC-NEXT: setzug %cl
+; SETZUCC-NEXT: subb %al, %cl
+; SETZUCC-NEXT: movzbl %cl, %eax
+; SETZUCC-NEXT: pextrw $7, %xmm1, %ecx
+; SETZUCC-NEXT: pextrw $7, %xmm0, %edx
+; SETZUCC-NEXT: cmpw %cx, %dx
+; SETZUCC-NEXT: setzul %cl
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %cl, %dl
+; SETZUCC-NEXT: movzbl %dl, %ecx
+; SETZUCC-NEXT: shll $8, %ecx
+; SETZUCC-NEXT: orl %eax, %ecx
+; SETZUCC-NEXT: pinsrw $3, %ecx, %xmm2
+; SETZUCC-NEXT: movdqa %xmm2, %xmm0
+; SETZUCC-NEXT: retq
+;
+; NO-SETZUCC-LABEL: scmp_narrow_vec_result_v8i16:
+; NO-SETZUCC: # %bb.0:
+; NO-SETZUCC-NEXT: pextrw $4, %xmm1, %eax
+; NO-SETZUCC-NEXT: pextrw $4, %xmm0, %ecx
+; NO-SETZUCC-NEXT: cmpw %ax, %cx
+; NO-SETZUCC-NEXT: setl %al
+; NO-SETZUCC-NEXT: setg %cl
+; NO-SETZUCC-NEXT: subb %al, %cl
+; NO-SETZUCC-NEXT: movzbl %cl, %ecx
+; NO-SETZUCC-NEXT: pextrw $5, %xmm1, %eax
+; NO-SETZUCC-NEXT: pextrw $5, %xmm0, %edx
+; NO-SETZUCC-NEXT: cmpw %ax, %dx
+; NO-SETZUCC-NEXT: setl %al
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %al, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %eax
+; NO-SETZUCC-NEXT: shll $8, %eax
+; NO-SETZUCC-NEXT: orl %ecx, %eax
+; NO-SETZUCC-NEXT: movd %xmm1, %ecx
+; NO-SETZUCC-NEXT: movd %xmm0, %edx
+; NO-SETZUCC-NEXT: cmpw %cx, %dx
+; NO-SETZUCC-NEXT: setl %cl
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %cl, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %ecx
+; NO-SETZUCC-NEXT: pextrw $1, %xmm1, %edx
+; NO-SETZUCC-NEXT: pextrw $1, %xmm0, %esi
+; NO-SETZUCC-NEXT: cmpw %dx, %si
+; NO-SETZUCC-NEXT: setl %dl
+; NO-SETZUCC-NEXT: setg %sil
+; NO-SETZUCC-NEXT: subb %dl, %sil
+; NO-SETZUCC-NEXT: movzbl %sil, %edx
+; NO-SETZUCC-NEXT: shll $8, %edx
+; NO-SETZUCC-NEXT: orl %ecx, %edx
+; NO-SETZUCC-NEXT: pextrw $2, %xmm1, %ecx
+; NO-SETZUCC-NEXT: pextrw $2, %xmm0, %esi
+; NO-SETZUCC-NEXT: cmpw %cx, %si
+; NO-SETZUCC-NEXT: setl %cl
+; NO-SETZUCC-NEXT: setg %sil
+; NO-SETZUCC-NEXT: subb %cl, %sil
+; NO-SETZUCC-NEXT: movzbl %sil, %ecx
+; NO-SETZUCC-NEXT: shll $16, %ecx
+; NO-SETZUCC-NEXT: orl %edx, %ecx
+; NO-SETZUCC-NEXT: pextrw $3, %xmm1, %edx
+; NO-SETZUCC-NEXT: pextrw $3, %xmm0, %esi
+; NO-SETZUCC-NEXT: cmpw %dx, %si
+; NO-SETZUCC-NEXT: setl %dl
+; NO-SETZUCC-NEXT: setg %sil
+; NO-SETZUCC-NEXT: subb %dl, %sil
+; NO-SETZUCC-NEXT: movzbl %sil, %edx
+; NO-SETZUCC-NEXT: shll $24, %edx
+; NO-SETZUCC-NEXT: orl %ecx, %edx
+; NO-SETZUCC-NEXT: movd %edx, %xmm2
+; NO-SETZUCC-NEXT: pinsrw $2, %eax, %xmm2
+; NO-SETZUCC-NEXT: pextrw $6, %xmm1, %eax
+; NO-SETZUCC-NEXT: pextrw $6, %xmm0, %ecx
+; NO-SETZUCC-NEXT: cmpw %ax, %cx
+; NO-SETZUCC-NEXT: setl %al
+; NO-SETZUCC-NEXT: setg %cl
+; NO-SETZUCC-NEXT: subb %al, %cl
+; NO-SETZUCC-NEXT: movzbl %cl, %eax
+; NO-SETZUCC-NEXT: pextrw $7, %xmm1, %ecx
+; NO-SETZUCC-NEXT: pextrw $7, %xmm0, %edx
+; NO-SETZUCC-NEXT: cmpw %cx, %dx
+; NO-SETZUCC-NEXT: setl %cl
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %cl, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %ecx
+; NO-SETZUCC-NEXT: shll $8, %ecx
+; NO-SETZUCC-NEXT: orl %eax, %ecx
+; NO-SETZUCC-NEXT: pinsrw $3, %ecx, %xmm2
+; NO-SETZUCC-NEXT: movdqa %xmm2, %xmm0
+; NO-SETZUCC-NEXT: retq
+ %1 = call <8 x i8> @llvm.scmp(<8 x i16> %x, <8 x i16> %y)
+ ret <8 x i8> %1
+}
+
+define <2 x i8> @scmp_narrow_vec_result_v2i64(<2 x i64> %x, <2 x i64> %y) nounwind {
+; SSE2-LABEL: scmp_narrow_vec_result_v2i64:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movq %xmm1, %rax
+; SSE2-NEXT: movq %xmm0, %rcx
+; SSE2-NEXT: cmpq %rax, %rcx
+; SSE2-NEXT: setl %al
+; SSE2-NEXT: setg %cl
+; SSE2-NEXT: subb %al, %cl
+; SSE2-NEXT: movzbl %cl, %eax
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
+; SSE2-NEXT: movq %xmm1, %rcx
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SSE2-NEXT: movq %xmm0, %rdx
+; SSE2-NEXT: cmpq %rcx, %rdx
+; SSE2-NEXT: setl %cl
+; SSE2-NEXT: setg %dl
+; SSE2-NEXT: subb %cl, %dl
+; SSE2-NEXT: movzbl %dl, %ecx
+; SSE2-NEXT: shll $8, %ecx
+; SSE2-NEXT: orl %eax, %ecx
+; SSE2-NEXT: movd %ecx, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE4-LABEL: scmp_narrow_vec_result_v2i64:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pextrq $1, %xmm1, %rax
+; SSE4-NEXT: pextrq $1, %xmm0, %rcx
+; SSE4-NEXT: cmpq %rax, %rcx
+; SSE4-NEXT: setl %al
+; SSE4-NEXT: setg %cl
+; SSE4-NEXT: subb %al, %cl
+; SSE4-NEXT: movzbl %cl, %eax
+; SSE4-NEXT: movq %xmm1, %rcx
+; SSE4-NEXT: movq %xmm0, %rdx
+; SSE4-NEXT: cmpq %rcx, %rdx
+; SSE4-NEXT: setl %cl
+; SSE4-NEXT: setg %dl
+; SSE4-NEXT: subb %cl, %dl
+; SSE4-NEXT: movzbl %dl, %ecx
+; SSE4-NEXT: movd %ecx, %xmm0
+; SSE4-NEXT: pinsrb $1, %eax, %xmm0
+; SSE4-NEXT: retq
+;
+; AVX-LABEL: scmp_narrow_vec_result_v2i64:
+; AVX: # %bb.0:
+; AVX-NEXT: vpextrq $1, %xmm1, %rax
+; AVX-NEXT: vpextrq $1, %xmm0, %rcx
+; AVX-NEXT: cmpq %rax, %rcx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %cl
+; AVX-NEXT: subb %al, %cl
+; AVX-NEXT: vmovq %xmm1, %rax
+; AVX-NEXT: vmovq %xmm0, %rdx
+; AVX-NEXT: cmpq %rax, %rdx
+; AVX-NEXT: setl %al
+; AVX-NEXT: setg %dl
+; AVX-NEXT: subb %al, %dl
+; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0
+; AVX-NEXT: retq
+;
+; X86-LABEL: scmp_narrow_vec_result_v2i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: cmpl %eax, %esi
+; X86-NEXT: movl %edi, %ecx
+; X86-NEXT: sbbl %edx, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: setl %bl
+; X86-NEXT: cmpl %esi, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
+; X86-NEXT: sbbl %edi, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: setl %al
+; X86-NEXT: subb %bl, %al
+; X86-NEXT: cmpl %ecx, %ebp
+; X86-NEXT: movl %edx, %edi
+; X86-NEXT: sbbl %esi, %edi
+; X86-NEXT: setl %ah
+; X86-NEXT: cmpl %ebp, %ecx
+; X86-NEXT: sbbl %edx, %esi
+; X86-NEXT: setl %dl
+; X86-NEXT: subb %ah, %dl
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl
+;
+; SETZUCC-LABEL: scmp_narrow_vec_result_v2i64:
+; SETZUCC: # %bb.0:
+; SETZUCC-NEXT: movq %xmm1, %rax
+; SETZUCC-NEXT: movq %xmm0, %rcx
+; SETZUCC-NEXT: cmpq %rax, %rcx
+; SETZUCC-NEXT: setzul %al
+; SETZUCC-NEXT: setzug %cl
+; SETZUCC-NEXT: subb %al, %cl
+; SETZUCC-NEXT: movzbl %cl, %eax
+; SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
+; SETZUCC-NEXT: movq %xmm1, %rcx
+; SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SETZUCC-NEXT: movq %xmm0, %rdx
+; SETZUCC-NEXT: cmpq %rcx, %rdx
+; SETZUCC-NEXT: setzul %cl
+; SETZUCC-NEXT: setzug %dl
+; SETZUCC-NEXT: subb %cl, %dl
+; SETZUCC-NEXT: movzbl %dl, %ecx
+; SETZUCC-NEXT: shll $8, %ecx
+; SETZUCC-NEXT: orl %eax, %ecx
+; SETZUCC-NEXT: movd %ecx, %xmm0
+; SETZUCC-NEXT: retq
+;
+; NO-SETZUCC-LABEL: scmp_narrow_vec_result_v2i64:
+; NO-SETZUCC: # %bb.0:
+; NO-SETZUCC-NEXT: movq %xmm1, %rax
+; NO-SETZUCC-NEXT: movq %xmm0, %rcx
+; NO-SETZUCC-NEXT: cmpq %rax, %rcx
+; NO-SETZUCC-NEXT: setl %al
+; NO-SETZUCC-NEXT: setg %cl
+; NO-SETZUCC-NEXT: subb %al, %cl
+; NO-SETZUCC-NEXT: movzbl %cl, %eax
+; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
+; NO-SETZUCC-NEXT: movq %xmm1, %rcx
+; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; NO-SETZUCC-NEXT: movq %xmm0, %rdx
+; NO-SETZUCC-NEXT: cmpq %rcx, %rdx
+; NO-SETZUCC-NEXT: setl %cl
+; NO-SETZUCC-NEXT: setg %dl
+; NO-SETZUCC-NEXT: subb %cl, %dl
+; NO-SETZUCC-NEXT: movzbl %dl, %ecx
+; NO-SETZUCC-NEXT: shll $8, %ecx
+; NO-SETZUCC-NEXT: orl %eax, %ecx
+; NO-SETZUCC-NEXT: movd %ecx, %xmm0
+; NO-SETZUCC-NEXT: retq
+ %1 = call <2 x i8> @llvm.scmp(<2 x i64> %x, <2 x i64> %y)
+ ret <2 x i8> %1
+}
+
define <4 x i32> @scmp_narrow_vec_op(<4 x i8> %x, <4 x i8> %y) nounwind {
; SSE2-LABEL: scmp_narrow_vec_op:
; SSE2: # %bb.0:
>From ec786839d5777ff2c8d71c8befe33b6a8871730a Mon Sep 17 00:00:00 2001
From: Konstantin Bogdanov <konstantin at clickhouse.com>
Date: Fri, 2 Oct 2026 21:32:25 +0200
Subject: [PATCH 2/2] [SelectionDAG] Avoid unrolling vector scmp/ucmp when
widening a narrow result
---
llvm/include/llvm/CodeGen/TargetLowering.h | 6 +
.../SelectionDAG/LegalizeVectorTypes.cpp | 14 +-
llvm/lib/Target/X86/X86ISelLowering.cpp | 4 +
llvm/lib/Target/X86/X86ISelLowering.h | 4 +
llvm/test/CodeGen/X86/scmp.ll | 1466 +++--------------
llvm/test/CodeGen/X86/ucmp.ll | 581 ++-----
6 files changed, 382 insertions(+), 1693 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 46521fa8c544a..f2e7bc88f9116 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -3692,6 +3692,12 @@ class LLVM_ABI TargetLoweringBase {
return isOperationLegalOrCustom(Op, VT);
}
+ /// Should a vector SCMP/UCMP with operands of type OpVT be unrolled
+ /// rather than computed in the operand type, when its result type needs to
+ /// be widened to a different element count. Return true if vector
+ /// comparisons of OpVT are expensive enough that scalar code is faster.
+ virtual bool shouldUnrollVectorCMP(EVT OpVT) const { return false; }
+
/// Should we prefer selects to doing arithmetic on boolean types
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const {
return false;
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index ef88647a16dee..31937bb322c0b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -5680,7 +5680,19 @@ SDValue DAGTypeLegalizer::WidenVecRes_CMP(SDNode *N) {
return DAG.getNode(N->getOpcode(), dl, WidenResVT, LHS, RHS);
}
- return DAG.UnrollVectorOp(N, WidenResVT.getVectorNumElements());
+ if (!OpVT.isSimple() || OpVT.isScalableVector() ||
+ OpVT.getScalarSizeInBits() < 2 || TLI.shouldUnrollVectorCMP(OpVT))
+ return DAG.UnrollVectorOp(N, WidenResVT.getVectorNumElements());
+
+ SDValue Cmp = DAG.getNode(N->getOpcode(), dl, OpVT, LHS, RHS);
+ if (TLI.getOperationAction(N->getOpcode(), OpVT) == TargetLowering::Expand)
+ Cmp = TLI.expandCMP(Cmp.getNode(), DAG);
+ EVT ResEltVT = WidenResVT.getVectorElementType();
+ Cmp =
+ DAG.getSExtOrTrunc(Cmp, dl, OpVT.changeVectorElementType(Ctxt, ResEltVT));
+ if (OpVT.getVectorNumElements() < WidenResVT.getVectorNumElements())
+ return DAG.getInsertSubvector(dl, DAG.getUNDEF(WidenResVT), Cmp, 0);
+ return DAG.getExtractSubvector(dl, WidenResVT, Cmp, 0);
}
SDValue DAGTypeLegalizer::WidenVecRes_BinaryWithExtraScalarOp(SDNode *N) {
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a84d017d9c6cd..3bd1d701591d1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3699,6 +3699,10 @@ X86TargetLowering::getExtractSubvectorCost(EVT ResVT, EVT SrcVT,
return ExtractSubvectorCost::Expensive;
}
+bool X86TargetLowering::shouldUnrollVectorCMP(EVT OpVT) const {
+ return OpVT.getScalarType() == MVT::i64 && !Subtarget.hasSSE42();
+}
+
bool X86TargetLowering::shouldScalarizeBinop(SDValue VecOp) const {
unsigned Opc = VecOp.getOpcode();
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index ba04080573c42..c72c160a05217 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -590,6 +590,10 @@ namespace llvm {
/// supported.
bool shouldScalarizeBinop(SDValue) const override;
+ /// Pre-SSE42 vXi64 comparisons have to be emulated with multiple vXi32
+ /// comparisons and shuffles, which is slower than scalar code.
+ bool shouldUnrollVectorCMP(EVT OpVT) const override;
+
/// Extract of a scalar FP value from index 0 of a vector is free.
bool isExtractVecEltCheap(EVT VT, unsigned Index) const override {
EVT EltVT = VT.getScalarType();
diff --git a/llvm/test/CodeGen/X86/scmp.ll b/llvm/test/CodeGen/X86/scmp.ll
index 481c03cda088c..f6893fc439ded 100644
--- a/llvm/test/CodeGen/X86/scmp.ll
+++ b/llvm/test/CodeGen/X86/scmp.ll
@@ -777,119 +777,34 @@ define <4 x i32> @scmp_normal_vectors(<4 x i32> %x, <4 x i32> %y) nounwind {
}
define <4 x i8> @scmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind {
-; SSE2-LABEL: scmp_narrow_vec_result:
-; SSE2: # %bb.0:
-; SSE2-NEXT: movd %xmm1, %eax
-; SSE2-NEXT: movd %xmm0, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: setl %al
-; SSE2-NEXT: setg %cl
-; SSE2-NEXT: subb %al, %cl
-; SSE2-NEXT: movzbl %cl, %eax
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
-; SSE2-NEXT: movd %xmm2, %ecx
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]
-; SSE2-NEXT: movd %xmm2, %edx
-; SSE2-NEXT: cmpl %ecx, %edx
-; SSE2-NEXT: setl %cl
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %cl, %dl
-; SSE2-NEXT: movzbl %dl, %ecx
-; SSE2-NEXT: shll $8, %ecx
-; SSE2-NEXT: orl %eax, %ecx
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
-; SSE2-NEXT: movd %xmm2, %eax
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
-; SSE2-NEXT: movd %xmm2, %edx
-; SSE2-NEXT: cmpl %eax, %edx
-; SSE2-NEXT: setl %al
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %al, %dl
-; SSE2-NEXT: movzbl %dl, %eax
-; SSE2-NEXT: shll $16, %eax
-; SSE2-NEXT: orl %ecx, %eax
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
-; SSE2-NEXT: movd %xmm1, %ecx
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; SSE2-NEXT: movd %xmm0, %edx
-; SSE2-NEXT: cmpl %ecx, %edx
-; SSE2-NEXT: setl %cl
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %cl, %dl
-; SSE2-NEXT: movzbl %dl, %ecx
-; SSE2-NEXT: shll $24, %ecx
-; SSE2-NEXT: orl %eax, %ecx
-; SSE2-NEXT: movd %ecx, %xmm0
-; SSE2-NEXT: retq
+; SSE-LABEL: scmp_narrow_vec_result:
+; SSE: # %bb.0:
+; SSE-NEXT: movdqa %xmm0, %xmm2
+; SSE-NEXT: pcmpgtd %xmm1, %xmm2
+; SSE-NEXT: pcmpgtd %xmm0, %xmm1
+; SSE-NEXT: psubd %xmm2, %xmm1
+; SSE-NEXT: packssdw %xmm1, %xmm1
+; SSE-NEXT: packsswb %xmm1, %xmm1
+; SSE-NEXT: movdqa %xmm1, %xmm0
+; SSE-NEXT: retq
;
-; SSE4-LABEL: scmp_narrow_vec_result:
-; SSE4: # %bb.0:
-; SSE4-NEXT: pextrd $1, %xmm1, %eax
-; SSE4-NEXT: pextrd $1, %xmm0, %ecx
-; SSE4-NEXT: cmpl %eax, %ecx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movd %xmm1, %ecx
-; SSE4-NEXT: movd %xmm0, %edx
-; SSE4-NEXT: cmpl %ecx, %edx
-; SSE4-NEXT: setl %cl
-; SSE4-NEXT: setg %dl
-; SSE4-NEXT: subb %cl, %dl
-; SSE4-NEXT: movzbl %dl, %ecx
-; SSE4-NEXT: movd %ecx, %xmm2
-; SSE4-NEXT: pinsrb $1, %eax, %xmm2
-; SSE4-NEXT: pextrd $2, %xmm1, %eax
-; SSE4-NEXT: pextrd $2, %xmm0, %ecx
-; SSE4-NEXT: cmpl %eax, %ecx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $2, %eax, %xmm2
-; SSE4-NEXT: pextrd $3, %xmm1, %eax
-; SSE4-NEXT: pextrd $3, %xmm0, %ecx
-; SSE4-NEXT: cmpl %eax, %ecx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $3, %eax, %xmm2
-; SSE4-NEXT: movdqa %xmm2, %xmm0
-; SSE4-NEXT: retq
+; AVX2-LABEL: scmp_narrow_vec_result:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm2
+; AVX2-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vpsubd %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
+; AVX2-NEXT: retq
;
-; AVX-LABEL: scmp_narrow_vec_result:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrd $1, %xmm1, %eax
-; AVX-NEXT: vpextrd $1, %xmm0, %ecx
-; AVX-NEXT: cmpl %eax, %ecx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vmovd %xmm1, %eax
-; AVX-NEXT: vmovd %xmm0, %edx
-; AVX-NEXT: cmpl %eax, %edx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %dl
-; AVX-NEXT: subb %al, %dl
-; AVX-NEXT: vmovd %edx, %xmm2
-; AVX-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrd $2, %xmm1, %eax
-; AVX-NEXT: vpextrd $2, %xmm0, %ecx
-; AVX-NEXT: cmpl %eax, %ecx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $2, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrd $3, %xmm1, %eax
-; AVX-NEXT: vpextrd $3, %xmm0, %ecx
-; AVX-NEXT: cmpl %eax, %ecx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $3, %ecx, %xmm2, %xmm0
-; AVX-NEXT: retq
+; AVX512-LABEL: scmp_narrow_vec_result:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpcmpgtd %xmm0, %xmm1, %k1
+; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %k2
+; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm0 {%k2} {z} = [1,1,1,1]
+; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vmovdqa32 %xmm1, %xmm0 {%k1}
+; AVX512-NEXT: vpmovdb %xmm0, %xmm0
+; AVX512-NEXT: retq
;
; X86-LABEL: scmp_narrow_vec_result:
; X86: # %bb.0:
@@ -925,96 +840,6 @@ define <4 x i8> @scmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind {
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
; X86-NEXT: retl $4
-;
-; SETZUCC-LABEL: scmp_narrow_vec_result:
-; SETZUCC: # %bb.0:
-; SETZUCC-NEXT: movd %xmm1, %eax
-; SETZUCC-NEXT: movd %xmm0, %ecx
-; SETZUCC-NEXT: cmpl %eax, %ecx
-; SETZUCC-NEXT: setzul %al
-; SETZUCC-NEXT: setzug %cl
-; SETZUCC-NEXT: subb %al, %cl
-; SETZUCC-NEXT: movzbl %cl, %eax
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
-; SETZUCC-NEXT: movd %xmm2, %ecx
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]
-; SETZUCC-NEXT: movd %xmm2, %edx
-; SETZUCC-NEXT: cmpl %ecx, %edx
-; SETZUCC-NEXT: setzul %cl
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %cl, %dl
-; SETZUCC-NEXT: movzbl %dl, %ecx
-; SETZUCC-NEXT: shll $8, %ecx
-; SETZUCC-NEXT: orl %eax, %ecx
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
-; SETZUCC-NEXT: movd %xmm2, %eax
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
-; SETZUCC-NEXT: movd %xmm2, %edx
-; SETZUCC-NEXT: cmpl %eax, %edx
-; SETZUCC-NEXT: setzul %al
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %al, %dl
-; SETZUCC-NEXT: movzbl %dl, %eax
-; SETZUCC-NEXT: shll $16, %eax
-; SETZUCC-NEXT: orl %ecx, %eax
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
-; SETZUCC-NEXT: movd %xmm1, %ecx
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; SETZUCC-NEXT: movd %xmm0, %edx
-; SETZUCC-NEXT: cmpl %ecx, %edx
-; SETZUCC-NEXT: setzul %cl
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %cl, %dl
-; SETZUCC-NEXT: movzbl %dl, %ecx
-; SETZUCC-NEXT: shll $24, %ecx
-; SETZUCC-NEXT: orl %eax, %ecx
-; SETZUCC-NEXT: movd %ecx, %xmm0
-; SETZUCC-NEXT: retq
-;
-; NO-SETZUCC-LABEL: scmp_narrow_vec_result:
-; NO-SETZUCC: # %bb.0:
-; NO-SETZUCC-NEXT: movd %xmm1, %eax
-; NO-SETZUCC-NEXT: movd %xmm0, %ecx
-; NO-SETZUCC-NEXT: cmpl %eax, %ecx
-; NO-SETZUCC-NEXT: setl %al
-; NO-SETZUCC-NEXT: setg %cl
-; NO-SETZUCC-NEXT: subb %al, %cl
-; NO-SETZUCC-NEXT: movzbl %cl, %eax
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
-; NO-SETZUCC-NEXT: movd %xmm2, %ecx
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]
-; NO-SETZUCC-NEXT: movd %xmm2, %edx
-; NO-SETZUCC-NEXT: cmpl %ecx, %edx
-; NO-SETZUCC-NEXT: setl %cl
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %cl, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %ecx
-; NO-SETZUCC-NEXT: shll $8, %ecx
-; NO-SETZUCC-NEXT: orl %eax, %ecx
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
-; NO-SETZUCC-NEXT: movd %xmm2, %eax
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
-; NO-SETZUCC-NEXT: movd %xmm2, %edx
-; NO-SETZUCC-NEXT: cmpl %eax, %edx
-; NO-SETZUCC-NEXT: setl %al
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %al, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %eax
-; NO-SETZUCC-NEXT: shll $16, %eax
-; NO-SETZUCC-NEXT: orl %ecx, %eax
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
-; NO-SETZUCC-NEXT: movd %xmm1, %ecx
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; NO-SETZUCC-NEXT: movd %xmm0, %edx
-; NO-SETZUCC-NEXT: cmpl %ecx, %edx
-; NO-SETZUCC-NEXT: setl %cl
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %cl, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %ecx
-; NO-SETZUCC-NEXT: shll $24, %ecx
-; NO-SETZUCC-NEXT: orl %eax, %ecx
-; NO-SETZUCC-NEXT: movd %ecx, %xmm0
-; NO-SETZUCC-NEXT: retq
%1 = call <4 x i8> @llvm.scmp(<4 x i32> %x, <4 x i32> %y)
ret <4 x i8> %1
}
@@ -1022,104 +847,35 @@ define <4 x i8> @scmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind {
; scmp(x, 0) with a narrow result, as formed by InstCombine from
; trunc((x >> (BW-1)) | zext(x != 0)).
define <4 x i8> @scmp_zero_narrow_vec_result(<4 x i32> %x) nounwind {
-; SSE2-LABEL: scmp_zero_narrow_vec_result:
-; SSE2: # %bb.0:
-; SSE2-NEXT: movd %xmm0, %eax
-; SSE2-NEXT: testl %eax, %eax
-; SSE2-NEXT: sets %al
-; SSE2-NEXT: setg %cl
-; SSE2-NEXT: subb %al, %cl
-; SSE2-NEXT: movzbl %cl, %eax
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE2-NEXT: movd %xmm1, %ecx
-; SSE2-NEXT: testl %ecx, %ecx
-; SSE2-NEXT: sets %cl
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %cl, %dl
-; SSE2-NEXT: movzbl %dl, %ecx
-; SSE2-NEXT: shll $8, %ecx
-; SSE2-NEXT: orl %eax, %ecx
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE2-NEXT: movd %xmm1, %eax
-; SSE2-NEXT: testl %eax, %eax
-; SSE2-NEXT: sets %al
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %al, %dl
-; SSE2-NEXT: movzbl %dl, %eax
-; SSE2-NEXT: shll $16, %eax
-; SSE2-NEXT: orl %ecx, %eax
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; SSE2-NEXT: movd %xmm0, %ecx
-; SSE2-NEXT: testl %ecx, %ecx
-; SSE2-NEXT: sets %cl
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %cl, %dl
-; SSE2-NEXT: movzbl %dl, %ecx
-; SSE2-NEXT: shll $24, %ecx
-; SSE2-NEXT: orl %eax, %ecx
-; SSE2-NEXT: movd %ecx, %xmm0
-; SSE2-NEXT: retq
+; SSE-LABEL: scmp_zero_narrow_vec_result:
+; SSE: # %bb.0:
+; SSE-NEXT: pxor %xmm1, %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm2
+; SSE-NEXT: pcmpgtd %xmm1, %xmm2
+; SSE-NEXT: pcmpgtd %xmm0, %xmm1
+; SSE-NEXT: psubd %xmm2, %xmm1
+; SSE-NEXT: packssdw %xmm1, %xmm1
+; SSE-NEXT: packsswb %xmm1, %xmm1
+; SSE-NEXT: movdqa %xmm1, %xmm0
+; SSE-NEXT: retq
;
-; SSE4-LABEL: scmp_zero_narrow_vec_result:
-; SSE4: # %bb.0:
-; SSE4-NEXT: pextrd $1, %xmm0, %eax
-; SSE4-NEXT: testl %eax, %eax
-; SSE4-NEXT: sets %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movd %xmm0, %ecx
-; SSE4-NEXT: testl %ecx, %ecx
-; SSE4-NEXT: sets %cl
-; SSE4-NEXT: setg %dl
-; SSE4-NEXT: subb %cl, %dl
-; SSE4-NEXT: movzbl %dl, %ecx
-; SSE4-NEXT: movd %ecx, %xmm1
-; SSE4-NEXT: pinsrb $1, %eax, %xmm1
-; SSE4-NEXT: pextrd $2, %xmm0, %eax
-; SSE4-NEXT: testl %eax, %eax
-; SSE4-NEXT: sets %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $2, %eax, %xmm1
-; SSE4-NEXT: pextrd $3, %xmm0, %eax
-; SSE4-NEXT: testl %eax, %eax
-; SSE4-NEXT: sets %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $3, %eax, %xmm1
-; SSE4-NEXT: movdqa %xmm1, %xmm0
-; SSE4-NEXT: retq
+; AVX2-LABEL: scmp_zero_narrow_vec_result:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX2-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm2
+; AVX2-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vpsubd %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
+; AVX2-NEXT: retq
;
-; AVX-LABEL: scmp_zero_narrow_vec_result:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrd $1, %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: sets %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vmovd %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: sets %al
-; AVX-NEXT: setg %dl
-; AVX-NEXT: subb %al, %dl
-; AVX-NEXT: vmovd %edx, %xmm1
-; AVX-NEXT: vpinsrb $1, %ecx, %xmm1, %xmm1
-; AVX-NEXT: vpextrd $2, %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: sets %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1
-; AVX-NEXT: vpextrd $3, %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: sets %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $3, %ecx, %xmm1, %xmm0
-; AVX-NEXT: retq
+; AVX512-LABEL: scmp_zero_narrow_vec_result:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %k1
+; AVX512-NEXT: vpsrad $31, %xmm0, %xmm0
+; AVX512-NEXT: vpord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: vpmovdb %xmm0, %xmm0
+; AVX512-NEXT: retq
;
; X86-LABEL: scmp_zero_narrow_vec_result:
; X86: # %bb.0:
@@ -1147,289 +903,38 @@ define <4 x i8> @scmp_zero_narrow_vec_result(<4 x i32> %x) nounwind {
; X86-NEXT: movb %cl, (%eax)
; X86-NEXT: popl %ebx
; X86-NEXT: retl $4
-;
-; SETZUCC-LABEL: scmp_zero_narrow_vec_result:
-; SETZUCC: # %bb.0:
-; SETZUCC-NEXT: movd %xmm0, %eax
-; SETZUCC-NEXT: testl %eax, %eax
-; SETZUCC-NEXT: setzus %al
-; SETZUCC-NEXT: setzug %cl
-; SETZUCC-NEXT: subb %al, %cl
-; SETZUCC-NEXT: movzbl %cl, %eax
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SETZUCC-NEXT: movd %xmm1, %ecx
-; SETZUCC-NEXT: testl %ecx, %ecx
-; SETZUCC-NEXT: setzus %cl
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %cl, %dl
-; SETZUCC-NEXT: movzbl %dl, %ecx
-; SETZUCC-NEXT: shll $8, %ecx
-; SETZUCC-NEXT: orl %eax, %ecx
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SETZUCC-NEXT: movd %xmm1, %eax
-; SETZUCC-NEXT: testl %eax, %eax
-; SETZUCC-NEXT: setzus %al
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %al, %dl
-; SETZUCC-NEXT: movzbl %dl, %eax
-; SETZUCC-NEXT: shll $16, %eax
-; SETZUCC-NEXT: orl %ecx, %eax
-; SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; SETZUCC-NEXT: movd %xmm0, %ecx
-; SETZUCC-NEXT: testl %ecx, %ecx
-; SETZUCC-NEXT: setzus %cl
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %cl, %dl
-; SETZUCC-NEXT: movzbl %dl, %ecx
-; SETZUCC-NEXT: shll $24, %ecx
-; SETZUCC-NEXT: orl %eax, %ecx
-; SETZUCC-NEXT: movd %ecx, %xmm0
-; SETZUCC-NEXT: retq
-;
-; NO-SETZUCC-LABEL: scmp_zero_narrow_vec_result:
-; NO-SETZUCC: # %bb.0:
-; NO-SETZUCC-NEXT: movd %xmm0, %eax
-; NO-SETZUCC-NEXT: testl %eax, %eax
-; NO-SETZUCC-NEXT: sets %al
-; NO-SETZUCC-NEXT: setg %cl
-; NO-SETZUCC-NEXT: subb %al, %cl
-; NO-SETZUCC-NEXT: movzbl %cl, %eax
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; NO-SETZUCC-NEXT: movd %xmm1, %ecx
-; NO-SETZUCC-NEXT: testl %ecx, %ecx
-; NO-SETZUCC-NEXT: sets %cl
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %cl, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %ecx
-; NO-SETZUCC-NEXT: shll $8, %ecx
-; NO-SETZUCC-NEXT: orl %eax, %ecx
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; NO-SETZUCC-NEXT: movd %xmm1, %eax
-; NO-SETZUCC-NEXT: testl %eax, %eax
-; NO-SETZUCC-NEXT: sets %al
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %al, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %eax
-; NO-SETZUCC-NEXT: shll $16, %eax
-; NO-SETZUCC-NEXT: orl %ecx, %eax
-; NO-SETZUCC-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; NO-SETZUCC-NEXT: movd %xmm0, %ecx
-; NO-SETZUCC-NEXT: testl %ecx, %ecx
-; NO-SETZUCC-NEXT: sets %cl
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %cl, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %ecx
-; NO-SETZUCC-NEXT: shll $24, %ecx
-; NO-SETZUCC-NEXT: orl %eax, %ecx
-; NO-SETZUCC-NEXT: movd %ecx, %xmm0
-; NO-SETZUCC-NEXT: retq
%1 = call <4 x i8> @llvm.scmp(<4 x i32> %x, <4 x i32> zeroinitializer)
ret <4 x i8> %1
}
define <8 x i8> @scmp_narrow_vec_result_v8i16(<8 x i16> %x, <8 x i16> %y) nounwind {
-; SSE2-LABEL: scmp_narrow_vec_result_v8i16:
-; SSE2: # %bb.0:
-; SSE2-NEXT: pextrw $4, %xmm1, %eax
-; SSE2-NEXT: pextrw $4, %xmm0, %ecx
-; SSE2-NEXT: cmpw %ax, %cx
-; SSE2-NEXT: setl %al
-; SSE2-NEXT: setg %cl
-; SSE2-NEXT: subb %al, %cl
-; SSE2-NEXT: movzbl %cl, %ecx
-; SSE2-NEXT: pextrw $5, %xmm1, %eax
-; SSE2-NEXT: pextrw $5, %xmm0, %edx
-; SSE2-NEXT: cmpw %ax, %dx
-; SSE2-NEXT: setl %al
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %al, %dl
-; SSE2-NEXT: movzbl %dl, %eax
-; SSE2-NEXT: shll $8, %eax
-; SSE2-NEXT: orl %ecx, %eax
-; SSE2-NEXT: movd %xmm1, %ecx
-; SSE2-NEXT: movd %xmm0, %edx
-; SSE2-NEXT: cmpw %cx, %dx
-; SSE2-NEXT: setl %cl
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %cl, %dl
-; SSE2-NEXT: movzbl %dl, %ecx
-; SSE2-NEXT: pextrw $1, %xmm1, %edx
-; SSE2-NEXT: pextrw $1, %xmm0, %esi
-; SSE2-NEXT: cmpw %dx, %si
-; SSE2-NEXT: setl %dl
-; SSE2-NEXT: setg %sil
-; SSE2-NEXT: subb %dl, %sil
-; SSE2-NEXT: movzbl %sil, %edx
-; SSE2-NEXT: shll $8, %edx
-; SSE2-NEXT: pextrw $2, %xmm1, %esi
-; SSE2-NEXT: orl %ecx, %edx
-; SSE2-NEXT: pextrw $2, %xmm0, %ecx
-; SSE2-NEXT: cmpw %si, %cx
-; SSE2-NEXT: setl %cl
-; SSE2-NEXT: setg %sil
-; SSE2-NEXT: subb %cl, %sil
-; SSE2-NEXT: movzbl %sil, %ecx
-; SSE2-NEXT: shll $16, %ecx
-; SSE2-NEXT: orl %edx, %ecx
-; SSE2-NEXT: pextrw $3, %xmm1, %edx
-; SSE2-NEXT: pextrw $3, %xmm0, %esi
-; SSE2-NEXT: cmpw %dx, %si
-; SSE2-NEXT: setl %dl
-; SSE2-NEXT: setg %sil
-; SSE2-NEXT: subb %dl, %sil
-; SSE2-NEXT: movzbl %sil, %edx
-; SSE2-NEXT: shll $24, %edx
-; SSE2-NEXT: orl %ecx, %edx
-; SSE2-NEXT: movd %edx, %xmm2
-; SSE2-NEXT: pinsrw $2, %eax, %xmm2
-; SSE2-NEXT: pextrw $6, %xmm1, %eax
-; SSE2-NEXT: pextrw $6, %xmm0, %ecx
-; SSE2-NEXT: cmpw %ax, %cx
-; SSE2-NEXT: setl %al
-; SSE2-NEXT: setg %cl
-; SSE2-NEXT: subb %al, %cl
-; SSE2-NEXT: movzbl %cl, %eax
-; SSE2-NEXT: pextrw $7, %xmm1, %ecx
-; SSE2-NEXT: pextrw $7, %xmm0, %edx
-; SSE2-NEXT: cmpw %cx, %dx
-; SSE2-NEXT: setl %cl
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %cl, %dl
-; SSE2-NEXT: movzbl %dl, %ecx
-; SSE2-NEXT: shll $8, %ecx
-; SSE2-NEXT: orl %eax, %ecx
-; SSE2-NEXT: pinsrw $3, %ecx, %xmm2
-; SSE2-NEXT: movdqa %xmm2, %xmm0
-; SSE2-NEXT: retq
+; SSE-LABEL: scmp_narrow_vec_result_v8i16:
+; SSE: # %bb.0:
+; SSE-NEXT: movdqa %xmm0, %xmm2
+; SSE-NEXT: pcmpgtw %xmm1, %xmm2
+; SSE-NEXT: pcmpgtw %xmm0, %xmm1
+; SSE-NEXT: psubw %xmm2, %xmm1
+; SSE-NEXT: packsswb %xmm1, %xmm1
+; SSE-NEXT: movdqa %xmm1, %xmm0
+; SSE-NEXT: retq
;
-; SSE4-LABEL: scmp_narrow_vec_result_v8i16:
-; SSE4: # %bb.0:
-; SSE4-NEXT: pextrw $1, %xmm1, %eax
-; SSE4-NEXT: pextrw $1, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movd %xmm1, %ecx
-; SSE4-NEXT: movd %xmm0, %edx
-; SSE4-NEXT: cmpw %cx, %dx
-; SSE4-NEXT: setl %cl
-; SSE4-NEXT: setg %dl
-; SSE4-NEXT: subb %cl, %dl
-; SSE4-NEXT: movzbl %dl, %ecx
-; SSE4-NEXT: movd %ecx, %xmm2
-; SSE4-NEXT: pinsrb $1, %eax, %xmm2
-; SSE4-NEXT: pextrw $2, %xmm1, %eax
-; SSE4-NEXT: pextrw $2, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $2, %eax, %xmm2
-; SSE4-NEXT: pextrw $3, %xmm1, %eax
-; SSE4-NEXT: pextrw $3, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $3, %eax, %xmm2
-; SSE4-NEXT: pextrw $4, %xmm1, %eax
-; SSE4-NEXT: pextrw $4, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $4, %eax, %xmm2
-; SSE4-NEXT: pextrw $5, %xmm1, %eax
-; SSE4-NEXT: pextrw $5, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $5, %eax, %xmm2
-; SSE4-NEXT: pextrw $6, %xmm1, %eax
-; SSE4-NEXT: pextrw $6, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $6, %eax, %xmm2
-; SSE4-NEXT: pextrw $7, %xmm1, %eax
-; SSE4-NEXT: pextrw $7, %xmm0, %ecx
-; SSE4-NEXT: cmpw %ax, %cx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $7, %eax, %xmm2
-; SSE4-NEXT: movdqa %xmm2, %xmm0
-; SSE4-NEXT: retq
+; AVX2-LABEL: scmp_narrow_vec_result_v8i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm2
+; AVX2-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vpsubw %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: retq
;
-; AVX-LABEL: scmp_narrow_vec_result_v8i16:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $1, %xmm1, %eax
-; AVX-NEXT: vpextrw $1, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vmovd %xmm1, %eax
-; AVX-NEXT: vmovd %xmm0, %edx
-; AVX-NEXT: cmpw %ax, %dx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %dl
-; AVX-NEXT: subb %al, %dl
-; AVX-NEXT: vmovd %edx, %xmm2
-; AVX-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $2, %xmm1, %eax
-; AVX-NEXT: vpextrw $2, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $2, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $3, %xmm1, %eax
-; AVX-NEXT: vpextrw $3, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $3, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $4, %xmm1, %eax
-; AVX-NEXT: vpextrw $4, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $4, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $5, %xmm1, %eax
-; AVX-NEXT: vpextrw $5, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $5, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $6, %xmm1, %eax
-; AVX-NEXT: vpextrw $6, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $6, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $7, %xmm1, %eax
-; AVX-NEXT: vpextrw $7, %xmm0, %ecx
-; AVX-NEXT: cmpw %ax, %cx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vpinsrb $7, %ecx, %xmm2, %xmm0
-; AVX-NEXT: retq
+; AVX512-LABEL: scmp_narrow_vec_result_v8i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpcmpgtw %xmm0, %xmm1, %k1
+; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %k2
+; AVX512-NEXT: vmovdqu16 {{.*#+}} xmm0 {%k2} {z} = [1,1,1,1,1,1,1,1]
+; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vmovdqu16 %xmm1, %xmm0 {%k1}
+; AVX512-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
+; AVX512-NEXT: retq
;
; X86-LABEL: scmp_narrow_vec_result_v8i16:
; X86: # %bb.0:
@@ -1477,174 +982,26 @@ define <8 x i8> @scmp_narrow_vec_result_v8i16(<8 x i16> %x, <8 x i16> %y) nounwi
; X86-NEXT: setg %dl
; X86-NEXT: subb %al, %dl
; X86-NEXT: cmpw {{[0-9]+}}(%esp), %bp
-; X86-NEXT: setl %al
-; X86-NEXT: setg %cl
-; X86-NEXT: subb %al, %cl
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movb %cl, 7(%eax)
-; X86-NEXT: movb %dl, 6(%eax)
-; X86-NEXT: movb %bh, 5(%eax)
-; X86-NEXT: movb %bl, 4(%eax)
-; X86-NEXT: movb %dh, 3(%eax)
-; X86-NEXT: movb %ch, 2(%eax)
-; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
-; X86-NEXT: movb %cl, 1(%eax)
-; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
-; X86-NEXT: movb %cl, (%eax)
-; X86-NEXT: addl $4, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: popl %ebx
-; X86-NEXT: popl %ebp
-; X86-NEXT: retl $4
-;
-; SETZUCC-LABEL: scmp_narrow_vec_result_v8i16:
-; SETZUCC: # %bb.0:
-; SETZUCC-NEXT: pextrw $4, %xmm1, %eax
-; SETZUCC-NEXT: pextrw $4, %xmm0, %ecx
-; SETZUCC-NEXT: cmpw %ax, %cx
-; SETZUCC-NEXT: setzul %al
-; SETZUCC-NEXT: setzug %cl
-; SETZUCC-NEXT: subb %al, %cl
-; SETZUCC-NEXT: movzbl %cl, %ecx
-; SETZUCC-NEXT: pextrw $5, %xmm1, %eax
-; SETZUCC-NEXT: pextrw $5, %xmm0, %edx
-; SETZUCC-NEXT: cmpw %ax, %dx
-; SETZUCC-NEXT: setzul %al
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %al, %dl
-; SETZUCC-NEXT: movzbl %dl, %eax
-; SETZUCC-NEXT: shll $8, %eax
-; SETZUCC-NEXT: orl %ecx, %eax
-; SETZUCC-NEXT: movd %xmm1, %ecx
-; SETZUCC-NEXT: movd %xmm0, %edx
-; SETZUCC-NEXT: cmpw %cx, %dx
-; SETZUCC-NEXT: setzul %cl
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %cl, %dl
-; SETZUCC-NEXT: movzbl %dl, %ecx
-; SETZUCC-NEXT: pextrw $1, %xmm1, %edx
-; SETZUCC-NEXT: pextrw $1, %xmm0, %esi
-; SETZUCC-NEXT: cmpw %dx, %si
-; SETZUCC-NEXT: setzul %dl
-; SETZUCC-NEXT: setzug %sil
-; SETZUCC-NEXT: subb %dl, %sil
-; SETZUCC-NEXT: movzbl %sil, %edx
-; SETZUCC-NEXT: shll $8, %edx
-; SETZUCC-NEXT: orl %ecx, %edx
-; SETZUCC-NEXT: pextrw $2, %xmm1, %ecx
-; SETZUCC-NEXT: pextrw $2, %xmm0, %esi
-; SETZUCC-NEXT: cmpw %cx, %si
-; SETZUCC-NEXT: setzul %cl
-; SETZUCC-NEXT: setzug %sil
-; SETZUCC-NEXT: subb %cl, %sil
-; SETZUCC-NEXT: movzbl %sil, %ecx
-; SETZUCC-NEXT: shll $16, %ecx
-; SETZUCC-NEXT: orl %edx, %ecx
-; SETZUCC-NEXT: pextrw $3, %xmm1, %edx
-; SETZUCC-NEXT: pextrw $3, %xmm0, %esi
-; SETZUCC-NEXT: cmpw %dx, %si
-; SETZUCC-NEXT: setzul %dl
-; SETZUCC-NEXT: setzug %sil
-; SETZUCC-NEXT: subb %dl, %sil
-; SETZUCC-NEXT: movzbl %sil, %edx
-; SETZUCC-NEXT: shll $24, %edx
-; SETZUCC-NEXT: orl %ecx, %edx
-; SETZUCC-NEXT: movd %edx, %xmm2
-; SETZUCC-NEXT: pinsrw $2, %eax, %xmm2
-; SETZUCC-NEXT: pextrw $6, %xmm1, %eax
-; SETZUCC-NEXT: pextrw $6, %xmm0, %ecx
-; SETZUCC-NEXT: cmpw %ax, %cx
-; SETZUCC-NEXT: setzul %al
-; SETZUCC-NEXT: setzug %cl
-; SETZUCC-NEXT: subb %al, %cl
-; SETZUCC-NEXT: movzbl %cl, %eax
-; SETZUCC-NEXT: pextrw $7, %xmm1, %ecx
-; SETZUCC-NEXT: pextrw $7, %xmm0, %edx
-; SETZUCC-NEXT: cmpw %cx, %dx
-; SETZUCC-NEXT: setzul %cl
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %cl, %dl
-; SETZUCC-NEXT: movzbl %dl, %ecx
-; SETZUCC-NEXT: shll $8, %ecx
-; SETZUCC-NEXT: orl %eax, %ecx
-; SETZUCC-NEXT: pinsrw $3, %ecx, %xmm2
-; SETZUCC-NEXT: movdqa %xmm2, %xmm0
-; SETZUCC-NEXT: retq
-;
-; NO-SETZUCC-LABEL: scmp_narrow_vec_result_v8i16:
-; NO-SETZUCC: # %bb.0:
-; NO-SETZUCC-NEXT: pextrw $4, %xmm1, %eax
-; NO-SETZUCC-NEXT: pextrw $4, %xmm0, %ecx
-; NO-SETZUCC-NEXT: cmpw %ax, %cx
-; NO-SETZUCC-NEXT: setl %al
-; NO-SETZUCC-NEXT: setg %cl
-; NO-SETZUCC-NEXT: subb %al, %cl
-; NO-SETZUCC-NEXT: movzbl %cl, %ecx
-; NO-SETZUCC-NEXT: pextrw $5, %xmm1, %eax
-; NO-SETZUCC-NEXT: pextrw $5, %xmm0, %edx
-; NO-SETZUCC-NEXT: cmpw %ax, %dx
-; NO-SETZUCC-NEXT: setl %al
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %al, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %eax
-; NO-SETZUCC-NEXT: shll $8, %eax
-; NO-SETZUCC-NEXT: orl %ecx, %eax
-; NO-SETZUCC-NEXT: movd %xmm1, %ecx
-; NO-SETZUCC-NEXT: movd %xmm0, %edx
-; NO-SETZUCC-NEXT: cmpw %cx, %dx
-; NO-SETZUCC-NEXT: setl %cl
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %cl, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %ecx
-; NO-SETZUCC-NEXT: pextrw $1, %xmm1, %edx
-; NO-SETZUCC-NEXT: pextrw $1, %xmm0, %esi
-; NO-SETZUCC-NEXT: cmpw %dx, %si
-; NO-SETZUCC-NEXT: setl %dl
-; NO-SETZUCC-NEXT: setg %sil
-; NO-SETZUCC-NEXT: subb %dl, %sil
-; NO-SETZUCC-NEXT: movzbl %sil, %edx
-; NO-SETZUCC-NEXT: shll $8, %edx
-; NO-SETZUCC-NEXT: orl %ecx, %edx
-; NO-SETZUCC-NEXT: pextrw $2, %xmm1, %ecx
-; NO-SETZUCC-NEXT: pextrw $2, %xmm0, %esi
-; NO-SETZUCC-NEXT: cmpw %cx, %si
-; NO-SETZUCC-NEXT: setl %cl
-; NO-SETZUCC-NEXT: setg %sil
-; NO-SETZUCC-NEXT: subb %cl, %sil
-; NO-SETZUCC-NEXT: movzbl %sil, %ecx
-; NO-SETZUCC-NEXT: shll $16, %ecx
-; NO-SETZUCC-NEXT: orl %edx, %ecx
-; NO-SETZUCC-NEXT: pextrw $3, %xmm1, %edx
-; NO-SETZUCC-NEXT: pextrw $3, %xmm0, %esi
-; NO-SETZUCC-NEXT: cmpw %dx, %si
-; NO-SETZUCC-NEXT: setl %dl
-; NO-SETZUCC-NEXT: setg %sil
-; NO-SETZUCC-NEXT: subb %dl, %sil
-; NO-SETZUCC-NEXT: movzbl %sil, %edx
-; NO-SETZUCC-NEXT: shll $24, %edx
-; NO-SETZUCC-NEXT: orl %ecx, %edx
-; NO-SETZUCC-NEXT: movd %edx, %xmm2
-; NO-SETZUCC-NEXT: pinsrw $2, %eax, %xmm2
-; NO-SETZUCC-NEXT: pextrw $6, %xmm1, %eax
-; NO-SETZUCC-NEXT: pextrw $6, %xmm0, %ecx
-; NO-SETZUCC-NEXT: cmpw %ax, %cx
-; NO-SETZUCC-NEXT: setl %al
-; NO-SETZUCC-NEXT: setg %cl
-; NO-SETZUCC-NEXT: subb %al, %cl
-; NO-SETZUCC-NEXT: movzbl %cl, %eax
-; NO-SETZUCC-NEXT: pextrw $7, %xmm1, %ecx
-; NO-SETZUCC-NEXT: pextrw $7, %xmm0, %edx
-; NO-SETZUCC-NEXT: cmpw %cx, %dx
-; NO-SETZUCC-NEXT: setl %cl
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %cl, %dl
-; NO-SETZUCC-NEXT: movzbl %dl, %ecx
-; NO-SETZUCC-NEXT: shll $8, %ecx
-; NO-SETZUCC-NEXT: orl %eax, %ecx
-; NO-SETZUCC-NEXT: pinsrw $3, %ecx, %xmm2
-; NO-SETZUCC-NEXT: movdqa %xmm2, %xmm0
-; NO-SETZUCC-NEXT: retq
+; X86-NEXT: setl %al
+; X86-NEXT: setg %cl
+; X86-NEXT: subb %al, %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movb %cl, 7(%eax)
+; X86-NEXT: movb %dl, 6(%eax)
+; X86-NEXT: movb %bh, 5(%eax)
+; X86-NEXT: movb %bl, 4(%eax)
+; X86-NEXT: movb %dh, 3(%eax)
+; X86-NEXT: movb %ch, 2(%eax)
+; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
+; X86-NEXT: movb %cl, 1(%eax)
+; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
+; X86-NEXT: movb %cl, (%eax)
+; X86-NEXT: addl $4, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl $4
%1 = call <8 x i8> @llvm.scmp(<8 x i16> %x, <8 x i16> %y)
ret <8 x i8> %1
}
@@ -1675,41 +1032,35 @@ define <2 x i8> @scmp_narrow_vec_result_v2i64(<2 x i64> %x, <2 x i64> %y) nounwi
;
; SSE4-LABEL: scmp_narrow_vec_result_v2i64:
; SSE4: # %bb.0:
-; SSE4-NEXT: pextrq $1, %xmm1, %rax
-; SSE4-NEXT: pextrq $1, %xmm0, %rcx
-; SSE4-NEXT: cmpq %rax, %rcx
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movq %xmm1, %rcx
-; SSE4-NEXT: movq %xmm0, %rdx
-; SSE4-NEXT: cmpq %rcx, %rdx
-; SSE4-NEXT: setl %cl
-; SSE4-NEXT: setg %dl
-; SSE4-NEXT: subb %cl, %dl
-; SSE4-NEXT: movzbl %dl, %ecx
-; SSE4-NEXT: movd %ecx, %xmm0
-; SSE4-NEXT: pinsrb $1, %eax, %xmm0
+; SSE4-NEXT: movdqa %xmm0, %xmm2
+; SSE4-NEXT: pcmpgtq %xmm1, %xmm2
+; SSE4-NEXT: pcmpgtq %xmm0, %xmm1
+; SSE4-NEXT: psubq %xmm2, %xmm1
+; SSE4-NEXT: packssdw %xmm1, %xmm1
+; SSE4-NEXT: packssdw %xmm1, %xmm1
+; SSE4-NEXT: packsswb %xmm1, %xmm1
+; SSE4-NEXT: movdqa %xmm1, %xmm0
; SSE4-NEXT: retq
;
-; AVX-LABEL: scmp_narrow_vec_result_v2i64:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrq $1, %xmm1, %rax
-; AVX-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX-NEXT: cmpq %rax, %rcx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: vmovq %xmm1, %rax
-; AVX-NEXT: vmovq %xmm0, %rdx
-; AVX-NEXT: cmpq %rax, %rdx
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %dl
-; AVX-NEXT: subb %al, %dl
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX2-LABEL: scmp_narrow_vec_result_v2i64:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2
+; AVX2-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vpsubq %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: scmp_narrow_vec_result_v2i64:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpcmpgtq %xmm0, %xmm1, %k1
+; AVX512-NEXT: vpcmpgtq %xmm1, %xmm0, %k2
+; AVX512-NEXT: vpbroadcastq {{.*#+}} xmm0 {%k2} {z} = [1,1]
+; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1}
+; AVX512-NEXT: vpmovqb %xmm0, %xmm0
+; AVX512-NEXT: retq
;
; X86-LABEL: scmp_narrow_vec_result_v2i64:
; X86: # %bb.0:
@@ -2388,371 +1739,97 @@ define <16 x i8> @scmp_wide_vec_op(<16 x i64> %x, <16 x i64> %y) nounwind {
;
; SSE4-LABEL: scmp_wide_vec_op:
; SSE4: # %bb.0:
-; SSE4-NEXT: pextrq $1, %xmm0, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movq %xmm0, %rcx
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rcx
-; SSE4-NEXT: setl %cl
-; SSE4-NEXT: setg %dl
-; SSE4-NEXT: subb %cl, %dl
-; SSE4-NEXT: movzbl %dl, %ecx
-; SSE4-NEXT: movd %ecx, %xmm0
-; SSE4-NEXT: pinsrb $1, %eax, %xmm0
-; SSE4-NEXT: movq %xmm1, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $2, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm1, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $3, %eax, %xmm0
-; SSE4-NEXT: movq %xmm2, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $4, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm2, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $5, %eax, %xmm0
-; SSE4-NEXT: movq %xmm3, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $6, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm3, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $7, %eax, %xmm0
-; SSE4-NEXT: movq %xmm4, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $8, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm4, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $9, %eax, %xmm0
-; SSE4-NEXT: movq %xmm5, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $10, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm5, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $11, %eax, %xmm0
-; SSE4-NEXT: movq %xmm6, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $12, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm6, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $13, %eax, %xmm0
-; SSE4-NEXT: movq %xmm7, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $14, %eax, %xmm0
-; SSE4-NEXT: pextrq $1, %xmm7, %rax
-; SSE4-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: pinsrb $15, %eax, %xmm0
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
+; SSE4-NEXT: movdqa %xmm7, %xmm9
+; SSE4-NEXT: pcmpgtq %xmm8, %xmm9
+; SSE4-NEXT: pcmpgtq %xmm7, %xmm8
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm7
+; SSE4-NEXT: psubq %xmm9, %xmm8
+; SSE4-NEXT: movdqa %xmm6, %xmm9
+; SSE4-NEXT: pcmpgtq %xmm7, %xmm9
+; SSE4-NEXT: pcmpgtq %xmm6, %xmm7
+; SSE4-NEXT: psubq %xmm9, %xmm7
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm6
+; SSE4-NEXT: packssdw %xmm8, %xmm7
+; SSE4-NEXT: movdqa %xmm5, %xmm8
+; SSE4-NEXT: pcmpgtq %xmm6, %xmm8
+; SSE4-NEXT: pcmpgtq %xmm5, %xmm6
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm5
+; SSE4-NEXT: psubq %xmm8, %xmm6
+; SSE4-NEXT: movdqa %xmm4, %xmm8
+; SSE4-NEXT: pcmpgtq %xmm5, %xmm8
+; SSE4-NEXT: pcmpgtq %xmm4, %xmm5
+; SSE4-NEXT: psubq %xmm8, %xmm5
+; SSE4-NEXT: packssdw %xmm6, %xmm5
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm4
+; SSE4-NEXT: packssdw %xmm7, %xmm5
+; SSE4-NEXT: movdqa %xmm3, %xmm6
+; SSE4-NEXT: pcmpgtq %xmm4, %xmm6
+; SSE4-NEXT: pcmpgtq %xmm3, %xmm4
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm3
+; SSE4-NEXT: psubq %xmm6, %xmm4
+; SSE4-NEXT: movdqa %xmm2, %xmm6
+; SSE4-NEXT: pcmpgtq %xmm3, %xmm6
+; SSE4-NEXT: pcmpgtq %xmm2, %xmm3
+; SSE4-NEXT: psubq %xmm6, %xmm3
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm2
+; SSE4-NEXT: packssdw %xmm4, %xmm3
+; SSE4-NEXT: movdqa %xmm1, %xmm4
+; SSE4-NEXT: pcmpgtq %xmm2, %xmm4
+; SSE4-NEXT: pcmpgtq %xmm1, %xmm2
+; SSE4-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm1
+; SSE4-NEXT: psubq %xmm4, %xmm2
+; SSE4-NEXT: movdqa %xmm0, %xmm4
+; SSE4-NEXT: pcmpgtq %xmm1, %xmm4
+; SSE4-NEXT: pcmpgtq %xmm0, %xmm1
+; SSE4-NEXT: psubq %xmm4, %xmm1
+; SSE4-NEXT: packssdw %xmm2, %xmm1
+; SSE4-NEXT: packssdw %xmm3, %xmm1
+; SSE4-NEXT: packsswb %xmm5, %xmm1
+; SSE4-NEXT: movdqa %xmm1, %xmm0
; SSE4-NEXT: retq
;
; AVX2-LABEL: scmp_wide_vec_op:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpextrq $1, %xmm4, %rax
-; AVX2-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vmovq %xmm4, %rax
-; AVX2-NEXT: vmovq %xmm0, %rdx
-; AVX2-NEXT: cmpq %rax, %rdx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %dl
-; AVX2-NEXT: subb %al, %dl
-; AVX2-NEXT: vmovd %edx, %xmm8
-; AVX2-NEXT: vpinsrb $1, %ecx, %xmm8, %xmm8
-; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm4
-; AVX2-NEXT: vmovq %xmm4, %rax
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
-; AVX2-NEXT: vmovq %xmm0, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $2, %ecx, %xmm8, %xmm8
-; AVX2-NEXT: vpextrq $1, %xmm4, %rax
-; AVX2-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $3, %ecx, %xmm8, %xmm0
-; AVX2-NEXT: vmovq %xmm5, %rax
-; AVX2-NEXT: vmovq %xmm1, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vpextrq $1, %xmm5, %rax
-; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm4
-; AVX2-NEXT: vmovq %xmm4, %rax
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm1
-; AVX2-NEXT: vmovq %xmm1, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vpextrq $1, %xmm4, %rax
-; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vmovq %xmm6, %rax
-; AVX2-NEXT: vmovq %xmm2, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vpextrq $1, %xmm6, %rax
-; AVX2-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vextracti128 $1, %ymm6, %xmm1
-; AVX2-NEXT: vmovq %xmm1, %rax
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm2
-; AVX2-NEXT: vmovq %xmm2, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vpextrq $1, %xmm1, %rax
-; AVX2-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vmovq %xmm7, %rax
-; AVX2-NEXT: vmovq %xmm3, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vpextrq $1, %xmm7, %rax
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vextracti128 $1, %ymm7, %xmm1
-; AVX2-NEXT: vmovq %xmm1, %rax
-; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm2
-; AVX2-NEXT: vmovq %xmm2, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
-; AVX2-NEXT: vpextrq $1, %xmm1, %rax
-; AVX2-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX2-NEXT: cmpq %rax, %rcx
-; AVX2-NEXT: setl %al
-; AVX2-NEXT: setg %cl
-; AVX2-NEXT: subb %al, %cl
-; AVX2-NEXT: vpinsrb $15, %ecx, %xmm0, %xmm0
+; AVX2-NEXT: vpcmpgtq %ymm7, %ymm3, %ymm8
+; AVX2-NEXT: vpcmpgtq %ymm3, %ymm7, %ymm3
+; AVX2-NEXT: vpsubq %ymm8, %ymm3, %ymm3
+; AVX2-NEXT: vpcmpgtq %ymm6, %ymm2, %ymm7
+; AVX2-NEXT: vpcmpgtq %ymm2, %ymm6, %ymm2
+; AVX2-NEXT: vpsubq %ymm7, %ymm2, %ymm2
+; AVX2-NEXT: vpackssdw %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,2,1,3]
+; AVX2-NEXT: vpcmpgtq %ymm5, %ymm1, %ymm3
+; AVX2-NEXT: vpcmpgtq %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpsubq %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpcmpgtq %ymm4, %ymm0, %ymm3
+; AVX2-NEXT: vpcmpgtq %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpsubq %ymm3, %ymm0, %ymm0
+; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
+; AVX2-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: scmp_wide_vec_op:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrq $1, %xmm2, %rax
-; AVX512-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vmovq %xmm2, %rax
-; AVX512-NEXT: vmovq %xmm0, %rdx
-; AVX512-NEXT: cmpq %rax, %rdx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %dl
-; AVX512-NEXT: subb %al, %dl
-; AVX512-NEXT: vmovd %edx, %xmm4
-; AVX512-NEXT: vpinsrb $1, %ecx, %xmm4, %xmm4
-; AVX512-NEXT: vextracti128 $1, %ymm2, %xmm5
-; AVX512-NEXT: vmovq %xmm5, %rax
-; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm6
-; AVX512-NEXT: vmovq %xmm6, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $2, %ecx, %xmm4, %xmm4
-; AVX512-NEXT: vpextrq $1, %xmm5, %rax
-; AVX512-NEXT: vpextrq $1, %xmm6, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $3, %ecx, %xmm4, %xmm4
-; AVX512-NEXT: vextracti32x4 $2, %zmm2, %xmm5
-; AVX512-NEXT: vmovq %xmm5, %rax
-; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm6
-; AVX512-NEXT: vmovq %xmm6, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $4, %ecx, %xmm4, %xmm4
-; AVX512-NEXT: vpextrq $1, %xmm5, %rax
-; AVX512-NEXT: vpextrq $1, %xmm6, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $5, %ecx, %xmm4, %xmm4
-; AVX512-NEXT: vextracti32x4 $3, %zmm2, %xmm2
-; AVX512-NEXT: vmovq %xmm2, %rax
-; AVX512-NEXT: vextracti32x4 $3, %zmm0, %xmm0
-; AVX512-NEXT: vmovq %xmm0, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $6, %ecx, %xmm4, %xmm4
-; AVX512-NEXT: vpextrq $1, %xmm2, %rax
-; AVX512-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $7, %ecx, %xmm4, %xmm0
-; AVX512-NEXT: vmovq %xmm3, %rax
-; AVX512-NEXT: vmovq %xmm1, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vpextrq $1, %xmm3, %rax
-; AVX512-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vextracti128 $1, %ymm3, %xmm2
-; AVX512-NEXT: vmovq %xmm2, %rax
-; AVX512-NEXT: vextracti128 $1, %ymm1, %xmm4
-; AVX512-NEXT: vmovq %xmm4, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vpextrq $1, %xmm2, %rax
-; AVX512-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vextracti32x4 $2, %zmm3, %xmm2
-; AVX512-NEXT: vmovq %xmm2, %rax
-; AVX512-NEXT: vextracti32x4 $2, %zmm1, %xmm4
-; AVX512-NEXT: vmovq %xmm4, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vpextrq $1, %xmm2, %rax
-; AVX512-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vextracti32x4 $3, %zmm3, %xmm2
-; AVX512-NEXT: vmovq %xmm2, %rax
-; AVX512-NEXT: vextracti32x4 $3, %zmm1, %xmm1
-; AVX512-NEXT: vmovq %xmm1, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
-; AVX512-NEXT: vpextrq $1, %xmm2, %rax
-; AVX512-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX512-NEXT: cmpq %rax, %rcx
-; AVX512-NEXT: setl %al
-; AVX512-NEXT: setg %cl
-; AVX512-NEXT: subb %al, %cl
-; AVX512-NEXT: vpinsrb $15, %ecx, %xmm0, %xmm0
+; AVX512-NEXT: vpcmpgtq %zmm1, %zmm3, %k1
+; AVX512-NEXT: vpcmpgtq %zmm3, %zmm1, %k2
+; AVX512-NEXT: vpbroadcastq {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1]
+; AVX512-NEXT: vmovdqa64 %zmm1, %zmm3 {%k2} {z}
+; AVX512-NEXT: vpternlogd {{.*#+}} zmm4 = -1
+; AVX512-NEXT: vmovdqa64 %zmm4, %zmm3 {%k1}
+; AVX512-NEXT: vpmovqb %zmm3, %xmm3
+; AVX512-NEXT: vpcmpgtq %zmm0, %zmm2, %k1
+; AVX512-NEXT: vpcmpgtq %zmm2, %zmm0, %k2
+; AVX512-NEXT: vmovdqa64 %zmm1, %zmm0 {%k2} {z}
+; AVX512-NEXT: vmovdqa64 %zmm4, %zmm0 {%k1}
+; AVX512-NEXT: vpmovqb %zmm0, %xmm0
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -4551,65 +3628,40 @@ define <2 x i8> @scmp_bool_operands(<2 x i1> %x, <2 x i1> %y) nounwind {
define <2 x i16> @scmp_ret_wider_than_operands(<2 x i8> %x, <2 x i8> %y) nounwind {
; SSE2-LABEL: scmp_ret_wider_than_operands:
; SSE2: # %bb.0:
-; SSE2-NEXT: movd %xmm1, %eax
-; SSE2-NEXT: movl %eax, %ecx
-; SSE2-NEXT: shrl $8, %ecx
-; SSE2-NEXT: movd %xmm0, %edx
-; SSE2-NEXT: movl %edx, %esi
-; SSE2-NEXT: shrl $8, %esi
-; SSE2-NEXT: cmpb %cl, %sil
-; SSE2-NEXT: setl %cl
-; SSE2-NEXT: setg %sil
-; SSE2-NEXT: subb %cl, %sil
-; SSE2-NEXT: movsbl %sil, %ecx
-; SSE2-NEXT: cmpb %al, %dl
-; SSE2-NEXT: setl %al
-; SSE2-NEXT: setg %dl
-; SSE2-NEXT: subb %al, %dl
-; SSE2-NEXT: movsbl %dl, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: pinsrw $1, %ecx, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pcmpgtb %xmm1, %xmm2
+; SSE2-NEXT: pcmpgtb %xmm0, %xmm1
+; SSE2-NEXT: psubb %xmm2, %xmm1
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SSE2-NEXT: psraw $8, %xmm0
; SSE2-NEXT: retq
;
; SSE4-LABEL: scmp_ret_wider_than_operands:
; SSE4: # %bb.0:
-; SSE4-NEXT: pextrb $1, %xmm1, %eax
-; SSE4-NEXT: pextrb $1, %xmm0, %ecx
-; SSE4-NEXT: cmpb %al, %cl
-; SSE4-NEXT: setl %al
-; SSE4-NEXT: setg %cl
-; SSE4-NEXT: subb %al, %cl
-; SSE4-NEXT: movsbl %cl, %eax
-; SSE4-NEXT: movd %xmm1, %ecx
-; SSE4-NEXT: movd %xmm0, %edx
-; SSE4-NEXT: cmpb %cl, %dl
-; SSE4-NEXT: setl %cl
-; SSE4-NEXT: setg %dl
-; SSE4-NEXT: subb %cl, %dl
-; SSE4-NEXT: movsbl %dl, %ecx
-; SSE4-NEXT: movd %ecx, %xmm0
-; SSE4-NEXT: pinsrw $1, %eax, %xmm0
+; SSE4-NEXT: movdqa %xmm0, %xmm2
+; SSE4-NEXT: pcmpgtb %xmm1, %xmm2
+; SSE4-NEXT: pcmpgtb %xmm0, %xmm1
+; SSE4-NEXT: psubb %xmm2, %xmm1
+; SSE4-NEXT: pmovsxbw %xmm1, %xmm0
; SSE4-NEXT: retq
;
-; AVX-LABEL: scmp_ret_wider_than_operands:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrb $1, %xmm1, %eax
-; AVX-NEXT: vpextrb $1, %xmm0, %ecx
-; AVX-NEXT: cmpb %al, %cl
-; AVX-NEXT: setl %al
-; AVX-NEXT: setg %cl
-; AVX-NEXT: subb %al, %cl
-; AVX-NEXT: movsbl %cl, %eax
-; AVX-NEXT: vmovd %xmm1, %ecx
-; AVX-NEXT: vmovd %xmm0, %edx
-; AVX-NEXT: cmpb %cl, %dl
-; AVX-NEXT: setl %cl
-; AVX-NEXT: setg %dl
-; AVX-NEXT: subb %cl, %dl
-; AVX-NEXT: movsbl %dl, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX2-LABEL: scmp_ret_wider_than_operands:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm2
+; AVX2-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vpsubb %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpmovsxbw %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: scmp_ret_wider_than_operands:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpcmpgtb %xmm0, %xmm1, %k1
+; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k2
+; AVX512-NEXT: vmovdqu8 {{.*#+}} xmm0 {%k2} {z} = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vmovdqu8 %xmm1, %xmm0 {%k1}
+; AVX512-NEXT: vpmovsxbw %xmm0, %xmm0
+; AVX512-NEXT: retq
;
; X86-LABEL: scmp_ret_wider_than_operands:
; X86: # %bb.0:
@@ -4631,46 +3683,22 @@ define <2 x i16> @scmp_ret_wider_than_operands(<2 x i8> %x, <2 x i8> %y) nounwin
;
; SETZUCC-LABEL: scmp_ret_wider_than_operands:
; SETZUCC: # %bb.0:
-; SETZUCC-NEXT: movd %xmm1, %eax
-; SETZUCC-NEXT: movl %eax, %ecx
-; SETZUCC-NEXT: shrl $8, %ecx
-; SETZUCC-NEXT: movd %xmm0, %edx
-; SETZUCC-NEXT: movl %edx, %esi
-; SETZUCC-NEXT: shrl $8, %esi
-; SETZUCC-NEXT: cmpb %cl, %sil
-; SETZUCC-NEXT: setzul %cl
-; SETZUCC-NEXT: setzug %sil
-; SETZUCC-NEXT: subb %cl, %sil
-; SETZUCC-NEXT: movsbl %sil, %ecx
-; SETZUCC-NEXT: cmpb %al, %dl
-; SETZUCC-NEXT: setzul %al
-; SETZUCC-NEXT: setzug %dl
-; SETZUCC-NEXT: subb %al, %dl
-; SETZUCC-NEXT: movsbl %dl, %eax
-; SETZUCC-NEXT: movd %eax, %xmm0
-; SETZUCC-NEXT: pinsrw $1, %ecx, %xmm0
+; SETZUCC-NEXT: movdqa %xmm0, %xmm2
+; SETZUCC-NEXT: pcmpgtb %xmm1, %xmm2
+; SETZUCC-NEXT: pcmpgtb %xmm0, %xmm1
+; SETZUCC-NEXT: psubb %xmm2, %xmm1
+; SETZUCC-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SETZUCC-NEXT: psraw $8, %xmm0
; SETZUCC-NEXT: retq
;
; NO-SETZUCC-LABEL: scmp_ret_wider_than_operands:
; NO-SETZUCC: # %bb.0:
-; NO-SETZUCC-NEXT: movd %xmm1, %eax
-; NO-SETZUCC-NEXT: movl %eax, %ecx
-; NO-SETZUCC-NEXT: shrl $8, %ecx
-; NO-SETZUCC-NEXT: movd %xmm0, %edx
-; NO-SETZUCC-NEXT: movl %edx, %esi
-; NO-SETZUCC-NEXT: shrl $8, %esi
-; NO-SETZUCC-NEXT: cmpb %cl, %sil
-; NO-SETZUCC-NEXT: setl %cl
-; NO-SETZUCC-NEXT: setg %sil
-; NO-SETZUCC-NEXT: subb %cl, %sil
-; NO-SETZUCC-NEXT: movsbl %sil, %ecx
-; NO-SETZUCC-NEXT: cmpb %al, %dl
-; NO-SETZUCC-NEXT: setl %al
-; NO-SETZUCC-NEXT: setg %dl
-; NO-SETZUCC-NEXT: subb %al, %dl
-; NO-SETZUCC-NEXT: movsbl %dl, %eax
-; NO-SETZUCC-NEXT: movd %eax, %xmm0
-; NO-SETZUCC-NEXT: pinsrw $1, %ecx, %xmm0
+; NO-SETZUCC-NEXT: movdqa %xmm0, %xmm2
+; NO-SETZUCC-NEXT: pcmpgtb %xmm1, %xmm2
+; NO-SETZUCC-NEXT: pcmpgtb %xmm0, %xmm1
+; NO-SETZUCC-NEXT: psubb %xmm2, %xmm1
+; NO-SETZUCC-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; NO-SETZUCC-NEXT: psraw $8, %xmm0
; NO-SETZUCC-NEXT: retq
%1 = call <2 x i16> @llvm.scmp(<2 x i8> %x, <2 x i8> %y)
ret <2 x i16> %1
diff --git a/llvm/test/CodeGen/X86/ucmp.ll b/llvm/test/CodeGen/X86/ucmp.ll
index 3d8b6bac3c859..660d11b604017 100644
--- a/llvm/test/CodeGen/X86/ucmp.ll
+++ b/llvm/test/CodeGen/X86/ucmp.ll
@@ -506,105 +506,49 @@ define <4 x i32> @ucmp_normal_vectors(<4 x i32> %x, <4 x i32> %y) nounwind {
define <4 x i8> @ucmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind {
; SSE4-LABEL: ucmp_narrow_vec_result:
; SSE4: # %bb.0:
-; SSE4-NEXT: movd %xmm1, %eax
-; SSE4-NEXT: movd %xmm0, %ecx
-; SSE4-NEXT: cmpl %eax, %ecx
-; SSE4-NEXT: seta %al
-; SSE4-NEXT: sbbb $0, %al
-; SSE4-NEXT: movzbl %al, %eax
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
-; SSE4-NEXT: movd %xmm2, %ecx
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]
-; SSE4-NEXT: movd %xmm2, %edx
-; SSE4-NEXT: cmpl %ecx, %edx
-; SSE4-NEXT: seta %cl
-; SSE4-NEXT: sbbb $0, %cl
-; SSE4-NEXT: movzbl %cl, %ecx
-; SSE4-NEXT: shll $8, %ecx
-; SSE4-NEXT: orl %eax, %ecx
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
-; SSE4-NEXT: movd %xmm2, %eax
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
-; SSE4-NEXT: movd %xmm2, %edx
-; SSE4-NEXT: cmpl %eax, %edx
-; SSE4-NEXT: seta %al
-; SSE4-NEXT: sbbb $0, %al
-; SSE4-NEXT: movzbl %al, %eax
-; SSE4-NEXT: shll $16, %eax
-; SSE4-NEXT: orl %ecx, %eax
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
-; SSE4-NEXT: movd %xmm1, %ecx
-; SSE4-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; SSE4-NEXT: movd %xmm0, %edx
-; SSE4-NEXT: cmpl %ecx, %edx
-; SSE4-NEXT: seta %cl
-; SSE4-NEXT: sbbb $0, %cl
-; SSE4-NEXT: movzbl %cl, %ecx
-; SSE4-NEXT: shll $24, %ecx
-; SSE4-NEXT: orl %eax, %ecx
-; SSE4-NEXT: movd %ecx, %xmm0
+; SSE4-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
+; SSE4-NEXT: pxor %xmm2, %xmm1
+; SSE4-NEXT: pxor %xmm2, %xmm0
+; SSE4-NEXT: movdqa %xmm0, %xmm2
+; SSE4-NEXT: pcmpgtd %xmm1, %xmm2
+; SSE4-NEXT: pcmpgtd %xmm0, %xmm1
+; SSE4-NEXT: psubd %xmm2, %xmm1
+; SSE4-NEXT: packssdw %xmm1, %xmm1
+; SSE4-NEXT: packsswb %xmm1, %xmm1
+; SSE4-NEXT: movdqa %xmm1, %xmm0
; SSE4-NEXT: retq
;
; SSE2-LABEL: ucmp_narrow_vec_result:
; SSE2: # %bb.0:
-; SSE2-NEXT: pextrd $1, %xmm1, %eax
-; SSE2-NEXT: pextrd $1, %xmm0, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: movd %xmm1, %ecx
-; SSE2-NEXT: movd %xmm0, %edx
-; SSE2-NEXT: cmpl %ecx, %edx
-; SSE2-NEXT: seta %cl
-; SSE2-NEXT: sbbb $0, %cl
-; SSE2-NEXT: movzbl %cl, %ecx
-; SSE2-NEXT: movd %ecx, %xmm2
-; SSE2-NEXT: pinsrb $1, %eax, %xmm2
-; SSE2-NEXT: pextrd $2, %xmm1, %eax
-; SSE2-NEXT: pextrd $2, %xmm0, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $2, %eax, %xmm2
-; SSE2-NEXT: pextrd $3, %xmm1, %eax
-; SSE2-NEXT: pextrd $3, %xmm0, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $3, %eax, %xmm2
-; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pmaxud %xmm1, %xmm2
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm2
+; SSE2-NEXT: pminud %xmm0, %xmm1
+; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
+; SSE2-NEXT: psubd %xmm2, %xmm0
+; SSE2-NEXT: packssdw %xmm0, %xmm0
+; SSE2-NEXT: packsswb %xmm0, %xmm0
; SSE2-NEXT: retq
;
-; AVX-LABEL: ucmp_narrow_vec_result:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrd $1, %xmm1, %eax
-; AVX-NEXT: vpextrd $1, %xmm0, %ecx
-; AVX-NEXT: cmpl %eax, %ecx
-; AVX-NEXT: seta %al
-; AVX-NEXT: sbbb $0, %al
-; AVX-NEXT: vmovd %xmm1, %ecx
-; AVX-NEXT: vmovd %xmm0, %edx
-; AVX-NEXT: cmpl %ecx, %edx
-; AVX-NEXT: seta %cl
-; AVX-NEXT: sbbb $0, %cl
-; AVX-NEXT: vmovd %ecx, %xmm2
-; AVX-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrd $2, %xmm1, %eax
-; AVX-NEXT: vpextrd $2, %xmm0, %ecx
-; AVX-NEXT: cmpl %eax, %ecx
-; AVX-NEXT: seta %al
-; AVX-NEXT: sbbb $0, %al
-; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrd $3, %xmm1, %eax
-; AVX-NEXT: vpextrd $3, %xmm0, %ecx
-; AVX-NEXT: cmpl %eax, %ecx
-; AVX-NEXT: seta %al
-; AVX-NEXT: sbbb $0, %al
-; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm0
-; AVX-NEXT: retq
+; AVX2-LABEL: ucmp_narrow_vec_result:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmaxud %xmm1, %xmm0, %xmm2
+; AVX2-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm2
+; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm1
+; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpsubd %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: ucmp_narrow_vec_result:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpcmpltud %xmm1, %xmm0, %k1
+; AVX512-NEXT: vpcmpnleud %xmm1, %xmm0, %k2
+; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm0 {%k2} {z} = [1,1,1,1]
+; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vmovdqa32 %xmm1, %xmm0 {%k1}
+; AVX512-NEXT: vpmovdb %xmm0, %xmm0
+; AVX512-NEXT: retq
;
; X86-LABEL: ucmp_narrow_vec_result:
; X86: # %bb.0:
@@ -954,394 +898,85 @@ define <16 x i32> @ucmp_wide_vec_result(<16 x i8> %x, <16 x i8> %y) nounwind {
define <16 x i8> @ucmp_wide_vec_op(<16 x i32> %x, <16 x i32> %y) nounwind {
; SSE4-LABEL: ucmp_wide_vec_op:
; SSE4: # %bb.0:
-; SSE4-NEXT: pushq %rbp
-; SSE4-NEXT: pushq %r15
-; SSE4-NEXT: pushq %r14
-; SSE4-NEXT: pushq %r13
-; SSE4-NEXT: pushq %r12
-; SSE4-NEXT: pushq %rbx
-; SSE4-NEXT: pshufd {{.*#+}} xmm8 = xmm7[3,3,3,3]
-; SSE4-NEXT: movd %xmm8, %eax
-; SSE4-NEXT: pshufd {{.*#+}} xmm8 = xmm3[3,3,3,3]
-; SSE4-NEXT: movd %xmm8, %ecx
-; SSE4-NEXT: cmpl %eax, %ecx
-; SSE4-NEXT: seta %al
-; SSE4-NEXT: sbbb $0, %al
-; SSE4-NEXT: pshufd {{.*#+}} xmm8 = xmm7[2,3,2,3]
-; SSE4-NEXT: movd %xmm8, %ecx
-; SSE4-NEXT: pshufd {{.*#+}} xmm8 = xmm3[2,3,2,3]
-; SSE4-NEXT: movd %xmm8, %edx
-; SSE4-NEXT: cmpl %ecx, %edx
-; SSE4-NEXT: seta %cl
-; SSE4-NEXT: sbbb $0, %cl
-; SSE4-NEXT: movd %xmm7, %edx
-; SSE4-NEXT: movd %xmm3, %esi
-; SSE4-NEXT: cmpl %edx, %esi
-; SSE4-NEXT: seta %dl
-; SSE4-NEXT: sbbb $0, %dl
-; SSE4-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,1,1]
-; SSE4-NEXT: movd %xmm7, %esi
-; SSE4-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,1,1]
-; SSE4-NEXT: movd %xmm3, %edi
-; SSE4-NEXT: cmpl %esi, %edi
-; SSE4-NEXT: seta %sil
-; SSE4-NEXT: movzbl %al, %eax
-; SSE4-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; SSE4-NEXT: sbbb $0, %sil
-; SSE4-NEXT: pshufd {{.*#+}} xmm3 = xmm6[3,3,3,3]
-; SSE4-NEXT: movd %xmm3, %edi
-; SSE4-NEXT: pshufd {{.*#+}} xmm3 = xmm2[3,3,3,3]
-; SSE4-NEXT: movd %xmm3, %r8d
-; SSE4-NEXT: cmpl %edi, %r8d
-; SSE4-NEXT: seta %dil
-; SSE4-NEXT: sbbb $0, %dil
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; SSE4-NEXT: pshufd {{.*#+}} xmm3 = xmm6[2,3,2,3]
-; SSE4-NEXT: movd %xmm3, %r8d
-; SSE4-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
-; SSE4-NEXT: movd %xmm3, %r9d
-; SSE4-NEXT: cmpl %r8d, %r9d
-; SSE4-NEXT: seta %r8b
-; SSE4-NEXT: movzbl %dl, %edx
-; SSE4-NEXT: sbbb $0, %r8b
-; SSE4-NEXT: movd %xmm6, %r9d
-; SSE4-NEXT: movd %xmm2, %r10d
-; SSE4-NEXT: cmpl %r9d, %r10d
-; SSE4-NEXT: seta %r9b
-; SSE4-NEXT: movzbl %sil, %esi
-; SSE4-NEXT: sbbb $0, %r9b
-; SSE4-NEXT: pshufd {{.*#+}} xmm3 = xmm6[1,1,1,1]
-; SSE4-NEXT: movd %xmm3, %r10d
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,1,1]
-; SSE4-NEXT: movd %xmm2, %r11d
-; SSE4-NEXT: cmpl %r10d, %r11d
-; SSE4-NEXT: seta %r10b
-; SSE4-NEXT: sbbb $0, %r10b
-; SSE4-NEXT: movzbl %dil, %edi
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm5[3,3,3,3]
-; SSE4-NEXT: movd %xmm2, %r11d
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; SSE4-NEXT: movd %xmm2, %ebx
-; SSE4-NEXT: cmpl %r11d, %ebx
-; SSE4-NEXT: seta %r11b
-; SSE4-NEXT: movzbl %r8b, %r8d
-; SSE4-NEXT: sbbb $0, %r11b
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm5[2,3,2,3]
-; SSE4-NEXT: movd %xmm2, %ebx
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
-; SSE4-NEXT: movd %xmm2, %ebp
-; SSE4-NEXT: cmpl %ebx, %ebp
-; SSE4-NEXT: seta %bpl
-; SSE4-NEXT: sbbb $0, %bpl
-; SSE4-NEXT: movzbl %r9b, %r9d
-; SSE4-NEXT: movd %xmm5, %ebx
-; SSE4-NEXT: movd %xmm1, %r14d
-; SSE4-NEXT: cmpl %ebx, %r14d
-; SSE4-NEXT: seta %r14b
-; SSE4-NEXT: sbbb $0, %r14b
-; SSE4-NEXT: movzbl %r10b, %r10d
-; SSE4-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,1,1]
-; SSE4-NEXT: movd %xmm2, %ebx
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
-; SSE4-NEXT: movd %xmm1, %r15d
-; SSE4-NEXT: cmpl %ebx, %r15d
-; SSE4-NEXT: seta %bl
-; SSE4-NEXT: movzbl %r11b, %r11d
-; SSE4-NEXT: sbbb $0, %bl
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm4[3,3,3,3]
-; SSE4-NEXT: movd %xmm1, %r15d
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SSE4-NEXT: movd %xmm1, %r12d
-; SSE4-NEXT: cmpl %r15d, %r12d
-; SSE4-NEXT: seta %r12b
-; SSE4-NEXT: sbbb $0, %r12b
-; SSE4-NEXT: movzbl %bpl, %ebp
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm4[2,3,2,3]
-; SSE4-NEXT: movd %xmm1, %r15d
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE4-NEXT: movd %xmm1, %r13d
-; SSE4-NEXT: cmpl %r15d, %r13d
-; SSE4-NEXT: seta %r13b
-; SSE4-NEXT: movzbl %r14b, %r15d
-; SSE4-NEXT: sbbb $0, %r13b
-; SSE4-NEXT: movd %xmm4, %r14d
-; SSE4-NEXT: movd %xmm0, %eax
-; SSE4-NEXT: cmpl %r14d, %eax
-; SSE4-NEXT: seta %r14b
-; SSE4-NEXT: sbbb $0, %r14b
-; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,1,1,1]
-; SSE4-NEXT: movd %xmm1, %eax
-; SSE4-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; SSE4-NEXT: movd %xmm0, %ecx
-; SSE4-NEXT: cmpl %eax, %ecx
-; SSE4-NEXT: movzbl %bl, %eax
-; SSE4-NEXT: movzbl %r12b, %ecx
-; SSE4-NEXT: movzbl %r13b, %ebx
-; SSE4-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
-; SSE4-NEXT: # xmm0 = mem[0],zero,zero,zero
-; SSE4-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 4-byte Folded Reload
-; SSE4-NEXT: # xmm2 = mem[0],zero,zero,zero
-; SSE4-NEXT: movd %edx, %xmm3
-; SSE4-NEXT: movd %esi, %xmm4
-; SSE4-NEXT: movd %edi, %xmm5
-; SSE4-NEXT: movd %r8d, %xmm6
-; SSE4-NEXT: movd %r9d, %xmm1
-; SSE4-NEXT: movd %r10d, %xmm7
-; SSE4-NEXT: movd %r11d, %xmm8
-; SSE4-NEXT: movd %ebp, %xmm9
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
-; SSE4-NEXT: movd %r15d, %xmm10
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
-; SSE4-NEXT: movd %eax, %xmm0
-; SSE4-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; SSE4-NEXT: movd %ecx, %xmm2
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3],xmm1[4],xmm7[4],xmm1[5],xmm7[5],xmm1[6],xmm7[6],xmm1[7],xmm7[7]
-; SSE4-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3]
-; SSE4-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm9 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3],xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0],xmm0[0],xmm10[1],xmm0[1],xmm10[2],xmm0[2],xmm10[3],xmm0[3],xmm10[4],xmm0[4],xmm10[5],xmm0[5],xmm10[6],xmm0[6],xmm10[7],xmm0[7]
-; SSE4-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
-; SSE4-NEXT: movd %ebx, %xmm3
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; SSE4-NEXT: movzbl %r14b, %eax
-; SSE4-NEXT: seta %cl
-; SSE4-NEXT: sbbb $0, %cl
-; SSE4-NEXT: movd %eax, %xmm0
-; SSE4-NEXT: movzbl %cl, %eax
-; SSE4-NEXT: movd %eax, %xmm2
-; SSE4-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
-; SSE4-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
-; SSE4-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1]
-; SSE4-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE4-NEXT: popq %rbx
-; SSE4-NEXT: popq %r12
-; SSE4-NEXT: popq %r13
-; SSE4-NEXT: popq %r14
-; SSE4-NEXT: popq %r15
-; SSE4-NEXT: popq %rbp
+; SSE4-NEXT: movdqa {{.*#+}} xmm8 = [2147483648,2147483648,2147483648,2147483648]
+; SSE4-NEXT: pxor %xmm8, %xmm7
+; SSE4-NEXT: pxor %xmm8, %xmm3
+; SSE4-NEXT: movdqa %xmm3, %xmm9
+; SSE4-NEXT: pcmpgtd %xmm7, %xmm9
+; SSE4-NEXT: pcmpgtd %xmm3, %xmm7
+; SSE4-NEXT: psubd %xmm9, %xmm7
+; SSE4-NEXT: pxor %xmm8, %xmm6
+; SSE4-NEXT: pxor %xmm8, %xmm2
+; SSE4-NEXT: movdqa %xmm2, %xmm3
+; SSE4-NEXT: pcmpgtd %xmm6, %xmm3
+; SSE4-NEXT: pcmpgtd %xmm2, %xmm6
+; SSE4-NEXT: psubd %xmm3, %xmm6
+; SSE4-NEXT: packssdw %xmm7, %xmm6
+; SSE4-NEXT: pxor %xmm8, %xmm5
+; SSE4-NEXT: pxor %xmm8, %xmm1
+; SSE4-NEXT: movdqa %xmm1, %xmm2
+; SSE4-NEXT: pcmpgtd %xmm5, %xmm2
+; SSE4-NEXT: pcmpgtd %xmm1, %xmm5
+; SSE4-NEXT: psubd %xmm2, %xmm5
+; SSE4-NEXT: pxor %xmm8, %xmm4
+; SSE4-NEXT: pxor %xmm8, %xmm0
+; SSE4-NEXT: movdqa %xmm0, %xmm1
+; SSE4-NEXT: pcmpgtd %xmm4, %xmm1
+; SSE4-NEXT: pcmpgtd %xmm0, %xmm4
+; SSE4-NEXT: psubd %xmm1, %xmm4
+; SSE4-NEXT: packssdw %xmm5, %xmm4
+; SSE4-NEXT: packsswb %xmm6, %xmm4
+; SSE4-NEXT: movdqa %xmm4, %xmm0
; SSE4-NEXT: retq
;
; SSE2-LABEL: ucmp_wide_vec_op:
; SSE2: # %bb.0:
-; SSE2-NEXT: pextrd $1, %xmm4, %eax
-; SSE2-NEXT: movdqa %xmm0, %xmm8
-; SSE2-NEXT: pextrd $1, %xmm0, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: movd %xmm4, %ecx
-; SSE2-NEXT: movd %xmm0, %edx
-; SSE2-NEXT: cmpl %ecx, %edx
-; SSE2-NEXT: seta %cl
-; SSE2-NEXT: sbbb $0, %cl
-; SSE2-NEXT: movzbl %cl, %ecx
-; SSE2-NEXT: movd %ecx, %xmm0
-; SSE2-NEXT: pinsrb $1, %eax, %xmm0
-; SSE2-NEXT: pextrd $2, %xmm4, %eax
-; SSE2-NEXT: pextrd $2, %xmm8, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $2, %eax, %xmm0
-; SSE2-NEXT: pextrd $3, %xmm4, %eax
-; SSE2-NEXT: pextrd $3, %xmm8, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $3, %eax, %xmm0
-; SSE2-NEXT: movd %xmm5, %eax
-; SSE2-NEXT: movd %xmm1, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $4, %eax, %xmm0
-; SSE2-NEXT: pextrd $1, %xmm5, %eax
-; SSE2-NEXT: pextrd $1, %xmm1, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $5, %eax, %xmm0
-; SSE2-NEXT: pextrd $2, %xmm5, %eax
-; SSE2-NEXT: pextrd $2, %xmm1, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $6, %eax, %xmm0
-; SSE2-NEXT: pextrd $3, %xmm5, %eax
-; SSE2-NEXT: pextrd $3, %xmm1, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $7, %eax, %xmm0
-; SSE2-NEXT: movd %xmm6, %eax
-; SSE2-NEXT: movd %xmm2, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $8, %eax, %xmm0
-; SSE2-NEXT: pextrd $1, %xmm6, %eax
-; SSE2-NEXT: pextrd $1, %xmm2, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $9, %eax, %xmm0
-; SSE2-NEXT: pextrd $2, %xmm6, %eax
-; SSE2-NEXT: pextrd $2, %xmm2, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $10, %eax, %xmm0
-; SSE2-NEXT: pextrd $3, %xmm6, %eax
-; SSE2-NEXT: pextrd $3, %xmm2, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $11, %eax, %xmm0
-; SSE2-NEXT: movd %xmm7, %eax
-; SSE2-NEXT: movd %xmm3, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $12, %eax, %xmm0
-; SSE2-NEXT: pextrd $1, %xmm7, %eax
-; SSE2-NEXT: pextrd $1, %xmm3, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $13, %eax, %xmm0
-; SSE2-NEXT: pextrd $2, %xmm7, %eax
-; SSE2-NEXT: pextrd $2, %xmm3, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $14, %eax, %xmm0
-; SSE2-NEXT: pextrd $3, %xmm7, %eax
-; SSE2-NEXT: pextrd $3, %xmm3, %ecx
-; SSE2-NEXT: cmpl %eax, %ecx
-; SSE2-NEXT: seta %al
-; SSE2-NEXT: sbbb $0, %al
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: pinsrb $15, %eax, %xmm0
+; SSE2-NEXT: movdqa %xmm3, %xmm8
+; SSE2-NEXT: pmaxud %xmm7, %xmm8
+; SSE2-NEXT: pcmpeqd %xmm3, %xmm8
+; SSE2-NEXT: pminud %xmm3, %xmm7
+; SSE2-NEXT: pcmpeqd %xmm3, %xmm7
+; SSE2-NEXT: psubd %xmm8, %xmm7
+; SSE2-NEXT: movdqa %xmm2, %xmm3
+; SSE2-NEXT: pmaxud %xmm6, %xmm3
+; SSE2-NEXT: pcmpeqd %xmm2, %xmm3
+; SSE2-NEXT: pminud %xmm2, %xmm6
+; SSE2-NEXT: pcmpeqd %xmm2, %xmm6
+; SSE2-NEXT: psubd %xmm3, %xmm6
+; SSE2-NEXT: packssdw %xmm7, %xmm6
+; SSE2-NEXT: movdqa %xmm1, %xmm2
+; SSE2-NEXT: pmaxud %xmm5, %xmm2
+; SSE2-NEXT: pcmpeqd %xmm1, %xmm2
+; SSE2-NEXT: pminud %xmm1, %xmm5
+; SSE2-NEXT: pcmpeqd %xmm1, %xmm5
+; SSE2-NEXT: psubd %xmm2, %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: pmaxud %xmm4, %xmm1
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: pminud %xmm0, %xmm4
+; SSE2-NEXT: pcmpeqd %xmm4, %xmm0
+; SSE2-NEXT: psubd %xmm1, %xmm0
+; SSE2-NEXT: packssdw %xmm5, %xmm0
+; SSE2-NEXT: packsswb %xmm6, %xmm0
; SSE2-NEXT: retq
;
; AVX2-LABEL: ucmp_wide_vec_op:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpextrd $1, %xmm2, %eax
-; AVX2-NEXT: vpextrd $1, %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vmovd %xmm2, %ecx
-; AVX2-NEXT: vmovd %xmm0, %edx
-; AVX2-NEXT: cmpl %ecx, %edx
-; AVX2-NEXT: seta %cl
-; AVX2-NEXT: sbbb $0, %cl
-; AVX2-NEXT: vmovd %ecx, %xmm4
-; AVX2-NEXT: vpinsrb $1, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $2, %xmm2, %eax
-; AVX2-NEXT: vpextrd $2, %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $2, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $3, %xmm2, %eax
-; AVX2-NEXT: vpextrd $3, %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $3, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm2
-; AVX2-NEXT: vmovd %xmm2, %eax
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
-; AVX2-NEXT: vmovd %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $4, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $1, %xmm2, %eax
-; AVX2-NEXT: vpextrd $1, %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $5, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $2, %xmm2, %eax
-; AVX2-NEXT: vpextrd $2, %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $6, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $3, %xmm2, %eax
-; AVX2-NEXT: vpextrd $3, %xmm0, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $7, %eax, %xmm4, %xmm0
-; AVX2-NEXT: vmovd %xmm3, %eax
-; AVX2-NEXT: vmovd %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vpextrd $1, %xmm3, %eax
-; AVX2-NEXT: vpextrd $1, %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vpextrd $2, %xmm3, %eax
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vpextrd $3, %xmm3, %eax
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm2
-; AVX2-NEXT: vmovd %xmm2, %eax
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm1
-; AVX2-NEXT: vmovd %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vpextrd $1, %xmm2, %eax
-; AVX2-NEXT: vpextrd $1, %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vpextrd $2, %xmm2, %eax
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
-; AVX2-NEXT: vpextrd $3, %xmm2, %eax
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: cmpl %eax, %ecx
-; AVX2-NEXT: seta %al
-; AVX2-NEXT: sbbb $0, %al
-; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+; AVX2-NEXT: vpmaxud %ymm3, %ymm1, %ymm4
+; AVX2-NEXT: vpcmpeqd %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpcmpeqd %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpsubd %ymm4, %ymm1, %ymm1
+; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
+; AVX2-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
+; AVX2-NEXT: vpmaxud %ymm2, %ymm0, %ymm3
+; AVX2-NEXT: vpcmpeqd %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpminud %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpcmpeqd %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpsubd %ymm3, %ymm0, %ymm0
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
+; AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
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