[llvm] Fix SystemZ TableGen crashing when GlobalISel is enabled (PR #228227)
Dennis Wang via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 11:46:12 PDT 2026
https://github.com/denniwang updated https://github.com/llvm/llvm-project/pull/228227
>From 55aa541d06a0cf856d28f04895844d7ef148d04d Mon Sep 17 00:00:00 2001
From: denniswang <denniswang812 at gmail.com>
Date: Thu, 1 Oct 2026 12:53:15 -0700
Subject: [PATCH] [SystenZ] Fix SystemZ TableGen crashing when GlobalISel is
enabled
---
llvm/lib/Target/SystemZ/SystemZInstrVector.td | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrVector.td b/llvm/lib/Target/SystemZ/SystemZInstrVector.td
index c614af8b295c4..5aefa823ab7aa 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrVector.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrVector.td
@@ -2426,27 +2426,27 @@ let Predicates = [FeatureVector, FeatureNNPAssist] in {
let Uses = [FPC], mayRaiseFPException = 1 in
def VCFN : UnaryVRRaFloatGeneric<"vcfn", 0xE65D>;
def : Pat<(int_s390_vcfn VR128:$x, imm32zx4_timm:$m),
- (VCFN VR128:$x, 1, imm32zx4:$m)>;
+ (VCFN VR128:$x, 1, imm32zx4_timm:$m)>;
let Uses = [FPC], mayRaiseFPException = 1 in
def VCLFNL : UnaryVRRaFloatGeneric<"vclfnl", 0xE65E>;
def : Pat<(int_s390_vclfnls VR128:$x, imm32zx4_timm:$m),
- (VCLFNL VR128:$x, 2, imm32zx4:$m)>;
+ (VCLFNL VR128:$x, 2, imm32zx4_timm:$m)>;
let Uses = [FPC], mayRaiseFPException = 1 in
def VCLFNH : UnaryVRRaFloatGeneric<"vclfnh", 0xE656>;
def : Pat<(int_s390_vclfnhs VR128:$x, imm32zx4_timm:$m),
- (VCLFNH VR128:$x, 2, imm32zx4:$m)>;
+ (VCLFNH VR128:$x, 2, imm32zx4_timm:$m)>;
let Uses = [FPC], mayRaiseFPException = 1 in
def VCNF : UnaryVRRaFloatGeneric<"vcnf", 0xE655>;
def : Pat<(int_s390_vcnf VR128:$x, imm32zx4_timm:$m),
- (VCNF VR128:$x, imm32zx4:$m, 1)>;
+ (VCNF VR128:$x, imm32zx4_timm:$m, 1)>;
let Uses = [FPC], mayRaiseFPException = 1 in
def VCRNF : BinaryVRRcFloatGeneric<"vcrnf", 0xE675>;
def : Pat<(int_s390_vcrnfs VR128:$x, VR128:$y, imm32zx4_timm:$m),
- (VCRNF VR128:$x, VR128:$y, imm32zx4:$m, 2)>;
+ (VCRNF VR128:$x, VR128:$y, imm32zx4_timm:$m, 2)>;
}
//===----------------------------------------------------------------------===//
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