[llvm] [X86] Convert FP compares split by a nested logic op to FP logic (PR #226222)

[Tim Besard via llvm-commits]

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@@ -0,0 +1,78 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512fp16 | FileCheck %s --check-prefixes=CHECK,NOVL
+; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=CHECK,VL
+
+define i1 @olt_ole_and_f16(half %w, half %x, half %y, half %z) {
+; NOVL-LABEL: olt_ole_and_f16:
+; NOVL:       # %bb.0:
+; NOVL-NEXT:    vucomish %xmm0, %xmm1
+; NOVL-NEXT:    seta %cl
+; NOVL-NEXT:    vucomish %xmm2, %xmm3
+; NOVL-NEXT:    setae %al
+; NOVL-NEXT:    andb %cl, %al
+; NOVL-NEXT:    retq
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maleadt wrote:

VCMPSH itself doesn't need VL, but AFAIU this combine goes through a v8f16 SETCC, which only gets custom lowering with AVX512VL. I'm not familiar with this code though, so maybe this ought to happen in a follow-up?

https://github.com/llvm/llvm-project/pull/226222