[llvm] [AMDGPU] Relax long branches in the assembler on gfx1251 (PR #228363)

[Jay Foad via llvm-commits]

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@@ -3089,6 +3089,11 @@ bool SIInstrInfo::isBranchOffsetInRange(unsigned BranchOp,
   // because its dest block is unanalyzable.
   assert(isSOPP(BranchOp) || isSOPK(BranchOp));
 
+  // With s_add_pc_i64, out of range branches are relaxed by the assembler
+  // without needing any registers.
+  if (ST.useAddPC64Inst())
+    return true;
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jayfoad wrote:

I didn't know that was an option with MC based relaxation. Is there a reason to prefer it? It has a slight theoretical disadvantage that you might end up with longer code overall in pathological cases where there are lots of branches over other branches.

https://github.com/llvm/llvm-project/pull/228363