[llvm] llc: Verify MIR outputs by default (PR #228248)

Arthur Eubanks via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 1 14:55:42 PDT 2026


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@@ -270,8 +270,9 @@ Error CodeGenPassBuilder::buildPipeline(
   if (auto Err = addMachinePasses(PMW))
     return Err;
 
-  if (!Opt.DisableVerify && TM.Options.EnableDefaultMachineVerifier)
-    addMachineFunctionPass(MachineVerifierPass(), PMW);
+  if (!PrintAsm ? !Opt.DisableMIROutputVerify
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aeubanks wrote:

`PrintAsm` and swap arms for easier reading

https://github.com/llvm/llvm-project/pull/228248


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