[llvm] [RISCV] Don't truncate MaxAlignment to int when realigning the stack (PR #228225)

[Divyansh Yadav via llvm-commits]

https://github.com/schizophrenicmaniac updated https://github.com/llvm/llvm-project/pull/228225

>From a78031382bd865db7298bdc7eb6efbacff2afa86 Mon Sep 17 00:00:00 2001
From: Divyansh Yadav <anshmcs at gmail.com>
Date: Fri, 2 Oct 2026 02:22:56 +0530
Subject: [PATCH 1/2] [RISCV] Add test for realigning the stack to 2^32. NFC

---
 llvm/test/CodeGen/RISCV/pr228084.ll | 39 +++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 llvm/test/CodeGen/RISCV/pr228084.ll

diff --git a/llvm/test/CodeGen/RISCV/pr228084.ll b/llvm/test/CodeGen/RISCV/pr228084.ll
new file mode 100644
index 0000000000000..f9e4a8f2835da
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/pr228084.ll
@@ -0,0 +1,39 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
+
+;; Check that stack alignment >= 2^32 works correctly.
+; FIXME: sp is realigned with `andi sp, sp, 0`, which sets it to zero.
+
+define void @f() {
+; CHECK-LABEL: f:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    addi sp, sp, -2032
+; CHECK-NEXT:    .cfi_def_cfa_offset 2032
+; CHECK-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
+; CHECK-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
+; CHECK-NEXT:    .cfi_offset ra, -8
+; CHECK-NEXT:    .cfi_offset s0, -16
+; CHECK-NEXT:    addi s0, sp, 2032
+; CHECK-NEXT:    .cfi_def_cfa s0, 0
+; CHECK-NEXT:    li a0, 1
+; CHECK-NEXT:    slli a0, a0, 33
+; CHECK-NEXT:    addi a0, a0, -2032
+; CHECK-NEXT:    sub sp, sp, a0
+; CHECK-NEXT:    andi sp, sp, 0
+; CHECK-NEXT:    li a0, 1
+; CHECK-NEXT:    slli a0, a0, 32
+; CHECK-NEXT:    add a0, sp, a0
+; CHECK-NEXT:    sd zero, 0(a0)
+; CHECK-NEXT:    addi sp, s0, -2032
+; CHECK-NEXT:    .cfi_def_cfa sp, 2032
+; CHECK-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
+; CHECK-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
+; CHECK-NEXT:    .cfi_restore ra
+; CHECK-NEXT:    .cfi_restore s0
+; CHECK-NEXT:    addi sp, sp, 2032
+; CHECK-NEXT:    .cfi_def_cfa_offset 0
+; CHECK-NEXT:    ret
+  %1 = alloca i64, align 4294967296
+  store i64 0, ptr %1, align 4294967296
+  ret void
+}

>From 28dd467f0b611ded5bd03b4eb80beb5e0d61597e Mon Sep 17 00:00:00 2001
From: Divyansh Yadav <anshmcs at gmail.com>
Date: Fri, 2 Oct 2026 02:24:54 +0530
Subject: [PATCH 2/2] [RISCV] Don't truncate MaxAlignment to int when
 realigning the stack

---
 llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 ++--
 llvm/test/CodeGen/RISCV/pr228084.ll          | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 7d2539ab3f2da..ac31c070242d8 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1258,10 +1258,10 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
       Align MaxAlignment = MFI.getMaxAlign();
 
       const RISCVInstrInfo *TII = STI.getInstrInfo();
-      if (isInt<12>(-(int)MaxAlignment.value())) {
+      if (isInt<12>(-(int64_t)MaxAlignment.value())) {
         BuildMI(MBB, MBBI, DL, TII->get(RISCV::ANDI), SPReg)
             .addReg(SPReg)
-            .addImm(-(int)MaxAlignment.value())
+            .addImm(-(int64_t)MaxAlignment.value())
             .setMIFlag(MachineInstr::FrameSetup);
       } else {
         unsigned ShiftAmount = Log2(MaxAlignment);
diff --git a/llvm/test/CodeGen/RISCV/pr228084.ll b/llvm/test/CodeGen/RISCV/pr228084.ll
index f9e4a8f2835da..3949ab44486fa 100644
--- a/llvm/test/CodeGen/RISCV/pr228084.ll
+++ b/llvm/test/CodeGen/RISCV/pr228084.ll
@@ -2,7 +2,6 @@
 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
 
 ;; Check that stack alignment >= 2^32 works correctly.
-; FIXME: sp is realigned with `andi sp, sp, 0`, which sets it to zero.
 
 define void @f() {
 ; CHECK-LABEL: f:
@@ -19,7 +18,8 @@ define void @f() {
 ; CHECK-NEXT:    slli a0, a0, 33
 ; CHECK-NEXT:    addi a0, a0, -2032
 ; CHECK-NEXT:    sub sp, sp, a0
-; CHECK-NEXT:    andi sp, sp, 0
+; CHECK-NEXT:    srli a0, sp, 32
+; CHECK-NEXT:    slli sp, a0, 32
 ; CHECK-NEXT:    li a0, 1
 ; CHECK-NEXT:    slli a0, a0, 32
 ; CHECK-NEXT:    add a0, sp, a0