[llvm] [AMDGPU] Truncate BF16 literals to 16 bits when printing (PR #225117)

[Arseniy Obolenskiy via llvm-commits]

https://github.com/aobolensk updated https://github.com/llvm/llvm-project/pull/225117

>From 17371643376f9c9d737a4a0a8be52235225a6538 Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Mon, 21 Sep 2026 17:34:02 +0200
Subject: [PATCH] [AMDGPU] Truncate BF16 literals to 16 bits when printing

The printer emitted the full 32-bit value, so a literal with high bits set printed as text the assembler rejects

Match printImmediateF16/Int16
---
 llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 2 +-
 llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s             | 3 +++
 llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s                    | 3 +++
 llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt    | 4 ++++
 4 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 12880e669291833..660dda565fb725d 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -598,7 +598,7 @@ void AMDGPUInstPrinter::printImmediateBF16(uint32_t Imm,
   if (printImmediateBFloat16(static_cast<uint16_t>(Imm), STI, O))
     return;
 
-  O << formatHex(static_cast<uint64_t>(Imm));
+  O << formatHex(static_cast<uint64_t>(Imm & 0xffff));
 }
 
 void AMDGPUInstPrinter::printImmediateF16(uint32_t Imm,
diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
index d0476d439ba4ef9..5b29fe895d11507 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
@@ -241,6 +241,9 @@ v_rcp_bf16 v5, src_scc
 v_rcp_bf16 v127, 0x8000
 // GFX1250: v_rcp_bf16_e32 v127, 0x8000             ; encoding: [0xff,0xf2,0xfe,0x7e,0x00,0x80,0x00,0x00]
 
+v_rcp_bf16 v5, -17
+// GFX1250: v_rcp_bf16_e32 v5, 0xffef               ; encoding: [0xff,0xf2,0x0a,0x7e,0xef,0xff,0x00,0x00]
+
 v_sqrt_bf16 v5, v1
 // GFX1250: v_sqrt_bf16_e32 v5, v1                  ; encoding: [0x01,0xf5,0x0a,0x7e]
 
diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
index 131432652055b6b..cf08791380d8b95 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
@@ -250,6 +250,9 @@ v_rcp_bf16 v5.l, src_scc
 v_rcp_bf16 v127.l, 0x8000
 // GFX1250: v_rcp_bf16_e32 v127.l, 0x8000           ; encoding: [0xff,0xf2,0xfe,0x7e,0x00,0x80,0x00,0x00]
 
+v_rcp_bf16 v5.l, -17
+// GFX1250: v_rcp_bf16_e32 v5.l, 0xffef             ; encoding: [0xff,0xf2,0x0a,0x7e,0xef,0xff,0x00,0x00]
+
 v_rcp_bf16 v5.h, v1.h
 // GFX1250: v_rcp_bf16_e32 v5.h, v1.h               ; encoding: [0x81,0xf3,0x0a,0x7f]
 
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
index 92cd2f5bb2b4b83..bd6bc866e8fa6fa 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
@@ -249,6 +249,10 @@
 # GFX1250-FAKE16: v_rcp_bf16_e32 v127, 0x8000             ; encoding: [0xff,0xf2,0xfe,0x7e,0x00,0x80,0x00,0x00]
 # GFX1250-REAL16: v_rcp_bf16_e32 v127.l, 0x8000           ; encoding: [0xff,0xf2,0xfe,0x7e,0x00,0x80,0x00,0x00]
 
+0xff,0xf2,0x02,0x7e,0x34,0x12,0xcd,0xab
+# GFX1250-FAKE16: v_rcp_bf16_e32 v1, 0x1234               ; encoding: [0xff,0xf2,0x02,0x7e,0x34,0x12,0x00,0x00]
+# GFX1250-REAL16: v_rcp_bf16_e32 v1.l, 0x1234             ; encoding: [0xff,0xf2,0x02,0x7e,0x34,0x12,0x00,0x00]
+
 0xc1,0xf2,0x0a,0x7e
 # GFX1250-FAKE16: v_rcp_bf16_e32 v5, -1                   ; encoding: [0xc1,0xf2,0x0a,0x7e]
 # GFX1250-REAL16: v_rcp_bf16_e32 v5.l, -1                 ; encoding: [0xc1,0xf2,0x0a,0x7e]