[llvm] [InstCombine] SimplifyDemandedVectorElts - add smulh/umulh handling (PR #228027)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-transforms

Author: Simon Pilgrim (RKSimon)

<details>
<summary>Changes</summary>

Not sure why there aren't more generic intrinsic binops handled here?

---
Full diff: https://github.com/llvm/llvm-project/pull/228027.diff


3 Files Affected:

- (modified) llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (+6) 
- (modified) llvm/test/Transforms/InstCombine/smulh.ll (+1-3) 
- (modified) llvm/test/Transforms/InstCombine/umulh.ll (+1-3) 


``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index bcd30323ce9a3c..1f3107900dcd54 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -1995,6 +1995,12 @@ Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V,
       PoisonElts = PoisonElts2 & PoisonElts3;
       break;
     }
+    case Intrinsic::smulh:
+    case Intrinsic::umulh:
+      simplifyAndSetOp(II, 0, DemandedElts, PoisonElts);
+      simplifyAndSetOp(II, 1, DemandedElts, PoisonElts);
+      PoisonElts = PoisonElts2 | PoisonElts3;
+      break;
     default: {
       // Handle target specific intrinsics
       std::optional<Value *> V = targetSimplifyDemandedVectorEltsIntrinsic(
diff --git a/llvm/test/Transforms/InstCombine/smulh.ll b/llvm/test/Transforms/InstCombine/smulh.ll
index a04d9faa0ddd58..f1ee17aeddeb35 100644
--- a/llvm/test/Transforms/InstCombine/smulh.ll
+++ b/llvm/test/Transforms/InstCombine/smulh.ll
@@ -191,9 +191,7 @@ define <32 x i16> @fold_smulh_v32i16() {
 
 define <8 x i64> @elts_smulh_v8i64(<8 x i64> %a0, <8 x i64> %a1) {
 ; CHECK-LABEL: @elts_smulh_v8i64(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> <i32 0, i32 1, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2>
-; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <8 x i64> [[A1:%.*]], <8 x i64> poison, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
-; CHECK-NEXT:    [[TMP3:%.*]] = call <8 x i64> @llvm.smulh.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP2]])
+; CHECK-NEXT:    [[TMP3:%.*]] = call <8 x i64> @llvm.smulh.v8i64(<8 x i64> [[TMP1:%.*]], <8 x i64> [[TMP2:%.*]])
 ; CHECK-NEXT:    [[TMP4:%.*]] = shufflevector <8 x i64> [[TMP3]], <8 x i64> poison, <8 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <8 x i64> [[TMP4]]
 ;
diff --git a/llvm/test/Transforms/InstCombine/umulh.ll b/llvm/test/Transforms/InstCombine/umulh.ll
index f2e2c3f54df2e6..85b069a518520f 100644
--- a/llvm/test/Transforms/InstCombine/umulh.ll
+++ b/llvm/test/Transforms/InstCombine/umulh.ll
@@ -187,9 +187,7 @@ define <32 x i16> @fold_umulh_v32i16() {
 
 define <8 x i64> @elts_umulh_v8i64(<8 x i64> %a0, <8 x i64> %a1) {
 ; CHECK-LABEL: @elts_umulh_v8i64(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> <i32 0, i32 1, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2>
-; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <8 x i64> [[A1:%.*]], <8 x i64> poison, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
-; CHECK-NEXT:    [[TMP3:%.*]] = call <8 x i64> @llvm.umulh.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP2]])
+; CHECK-NEXT:    [[TMP3:%.*]] = call <8 x i64> @llvm.umulh.v8i64(<8 x i64> [[TMP1:%.*]], <8 x i64> [[TMP2:%.*]])
 ; CHECK-NEXT:    [[TMP4:%.*]] = shufflevector <8 x i64> [[TMP3]], <8 x i64> poison, <8 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <8 x i64> [[TMP4]]
 ;

``````````

</details>


https://github.com/llvm/llvm-project/pull/228027