[llvm] [AMDGPU] Turn tablegen tables with single bool into filtered lists. NFC (PR #227746)
Mirko BrkuĊĦanin via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 1 02:25:59 PDT 2026
https://github.com/mbrkusanin updated https://github.com/llvm/llvm-project/pull/227746
>From 7754c9c2279ceb0848befe84b27f5d376bc7488e Mon Sep 17 00:00:00 2001
From: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Date: Wed, 30 Sep 2026 17:16:10 +0200
Subject: [PATCH 1/2] [AMDGPU] Turn tablegen tables with single bool into
filtered lists. NFC
---
llvm/lib/Target/AMDGPU/SMInstructions.td | 5 +++--
.../Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 22 +++++--------------
llvm/lib/Target/AMDGPU/VOPInstructions.td | 15 ++++++++-----
3 files changed, 18 insertions(+), 24 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SMInstructions.td b/llvm/lib/Target/AMDGPU/SMInstructions.td
index 19aeafe9b30cc..4dbd5ebee0a2f 100644
--- a/llvm/lib/Target/AMDGPU/SMInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SMInstructions.td
@@ -1399,11 +1399,12 @@ defm S_DCACHE_DISCARD_X2 : SM_Real_Discard_gfx10 <0x29>;
def SMInfoTable : GenericTable {
let FilterClass = "SM_Real";
+ let FilterClassField = "is_buffer";
let CppTypeName = "SMInfo";
- let Fields = ["Opcode", "is_buffer"];
+ let Fields = ["Opcode"];
let PrimaryKey = ["Opcode"];
- let PrimaryKeyName = "getSMEMOpcodeHelper";
+ let PrimaryKeyName = "isSMEMOpcodeHelper";
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index e45359719d6c9..b4484b2b8de5a 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -383,12 +383,10 @@ struct MTBUFInfo {
struct SMInfo {
uint32_t Opcode;
- bool IsBuffer;
};
struct VOPInfo {
uint32_t Opcode;
- bool IsSingle;
};
struct VOPC64DPPInfo {
@@ -418,7 +416,6 @@ struct VOPDInfo {
struct VOPTrue16Info {
uint32_t Opcode;
- bool IsTrue16;
};
struct VOPDXYInfo {
@@ -432,7 +429,6 @@ struct VOPDXYInfo {
struct DPMACCInstructionInfo {
uint32_t Opcode;
- bool IsDPMACCInstruction;
};
struct FP4FP8DstByteSelInfo {
@@ -556,23 +552,19 @@ bool getMUBUFTfe(unsigned Opc) {
}
bool getSMEMIsBuffer(unsigned Opc) {
- const SMInfo *Info = getSMEMOpcodeHelper(Opc);
- return Info && Info->IsBuffer;
+ return isSMEMOpcodeHelper(Opc) != nullptr;
}
bool getVOP1IsSingle(unsigned Opc) {
- const VOPInfo *Info = getVOP1OpcodeHelper(Opc);
- return !Info || Info->IsSingle;
+ return isVOP1SingleOpcodeHelper(Opc) != nullptr;
}
bool getVOP2IsSingle(unsigned Opc) {
- const VOPInfo *Info = getVOP2OpcodeHelper(Opc);
- return !Info || Info->IsSingle;
+ return isVOP2SingleOpcodeHelper(Opc) != nullptr;
}
bool getVOP3IsSingle(unsigned Opc) {
- const VOPInfo *Info = getVOP3OpcodeHelper(Opc);
- return !Info || Info->IsSingle;
+ return isVOP3SingleOpcodeHelper(Opc) != nullptr;
}
bool isVOPC64DPP(unsigned Opc) {
@@ -833,8 +825,7 @@ unsigned getTemporalHintType(const MCInstrDesc TID) {
}
bool isTrue16Inst(unsigned Opc) {
- const VOPTrue16Info *Info = getTrue16OpcodeHelper(Opc);
- return Info && Info->IsTrue16;
+ return isTrue16Opcode(Opc) != nullptr;
}
FPType getFPDstSelType(unsigned Opc) {
@@ -850,8 +841,7 @@ FPType getFPDstSelType(unsigned Opc) {
}
bool isDPMACCInstruction(unsigned Opc) {
- const DPMACCInstructionInfo *Info = getDPMACCInstructionHelper(Opc);
- return Info && Info->IsDPMACCInstruction;
+ return isDPMACCInstructionHelper(Opc) != nullptr;
}
unsigned mapWMMA2AddrTo3AddrOpcode(unsigned Opc) {
diff --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td
index ee02bdcc3975f..23fb417519c7f 100644
--- a/llvm/lib/Target/AMDGPU/VOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td
@@ -2443,11 +2443,12 @@ def : ClassPat<V_CMP_CLASS_F64_e64, f64>;
class VOPInfoTable <string Format> : GenericTable {
let FilterClass = Format # "_Real";
+ let FilterClassField = "IsSingle";
let CppTypeName = "VOPInfo";
- let Fields = ["Opcode", "IsSingle"];
+ let Fields = ["Opcode"];
let PrimaryKey = ["Opcode"];
- let PrimaryKeyName = "get" # Format # "OpcodeHelper";
+ let PrimaryKeyName = "is" # Format # "SingleOpcodeHelper";
}
def VOP1InfoTable : VOPInfoTable<"VOP1">;
@@ -2480,20 +2481,22 @@ def VOPCAsmOnlyInfoTable : AsmOnlyInfoTable <"VOPC", "VOPC_DPPe_Common">;
def VOPTrue16Table : GenericTable {
let FilterClass = "VOP_Pseudo";
+ let FilterClassField = "IsTrue16";
let CppTypeName = "VOPTrue16Info";
- let Fields = ["Opcode", "IsTrue16"];
+ let Fields = ["Opcode"];
let PrimaryKey = ["Opcode"];
- let PrimaryKeyName = "getTrue16OpcodeHelper";
+ let PrimaryKeyName = "isTrue16Opcode";
}
def DPMACCInstructionTable : GenericTable {
let FilterClass = "VOP_Pseudo";
+ let FilterClassField = "IsDPMACCInstruction";
let CppTypeName = "DPMACCInstructionInfo";
- let Fields = ["Opcode", "IsDPMACCInstruction"];
+ let Fields = ["Opcode"];
let PrimaryKey = ["Opcode"];
- let PrimaryKeyName = "getDPMACCInstructionHelper";
+ let PrimaryKeyName = "isDPMACCInstructionHelper";
}
// BlockingCycles indicates how many cycles until a new instruction can acquire
>From 1b7152302bbc2d64319163a6eb1431505bb6b5d5 Mon Sep 17 00:00:00 2001
From: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Date: Wed, 30 Sep 2026 17:16:18 +0200
Subject: [PATCH 2/2] clang-format
---
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index b4484b2b8de5a..3d6d806de0b19 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -824,9 +824,7 @@ unsigned getTemporalHintType(const MCInstrDesc TID) {
return CPol::TH_TYPE_LOAD;
}
-bool isTrue16Inst(unsigned Opc) {
- return isTrue16Opcode(Opc) != nullptr;
-}
+bool isTrue16Inst(unsigned Opc) { return isTrue16Opcode(Opc) != nullptr; }
FPType getFPDstSelType(unsigned Opc) {
const FP4FP8DstByteSelInfo *Info = getFP4FP8DstByteSelHelper(Opc);
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