[llvm] dd1d329 - [AMDGPU] Restore the EXEC-write assert in SIPostRA16BitMovFolding (#227890)

[via llvm-commits]

Author: Larry Meadows
Date: 2026-10-01T00:01:16-07:00
New Revision: dd1d329d7b693a01f492324dbd1eedf20325f5ae

URL: https://github.com/llvm/llvm-project/commit/dd1d329d7b693a01f492324dbd1eedf20325f5ae
DIFF: https://github.com/llvm/llvm-project/commit/dd1d329d7b693a01f492324dbd1eedf20325f5ae.diff

LOG: [AMDGPU] Restore the EXEC-write assert in SIPostRA16BitMovFolding (#227890)

#227502 turned the assert into a bail-out. The backend assumes EXEC is
not written in the middle of a basic block, so restore the assert and
drop the test that wrote EXEC between the movs.

Assisted-by: Cursor

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
    llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp b/llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
index c9ea66ec568d5..1b5f96e2904f8 100644
--- a/llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
@@ -164,9 +164,10 @@ bool SIPostRA16BitMovFolding::mergeSingleMovB16Pair(MachineInstr &Lo,
        drop_begin(make_range(FirstMI.getIterator(), SecondMI.getIterator()))) {
     if (Scan.isDebugInstr())
       continue;
-    if (Scan.modifiesRegister(Dst32, TRI) ||
-        Scan.modifiesRegister(AMDGPU::EXEC, TRI))
+    if (Scan.modifiesRegister(Dst32, TRI))
       return false;
+    assert(!Scan.modifiesRegister(AMDGPU::EXEC, TRI) &&
+           "Expect no write on EXEC!");
     LoopCnt++;
     if (LoopCnt < UpperBoundCnt &&
         ((FirstSrc16 && Scan.modifiesRegister(FirstSrc16, TRI)) ||

diff  --git a/llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir b/llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
index 8bae15a895d51..a857740a5f0d2 100644
--- a/llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
@@ -481,24 +481,3 @@ body: |
     $vgpr0_hi16 = V_MOV_B16_t16_e32 $vgpr1_lo16, implicit $exec
     S_ENDPGM 0, implicit $vgpr0
 ...
-
----
-# Negative: EXEC is written between the movs — must NOT merge.
-name: no_merge_exec_write_between
-tracksRegLiveness: true
-body: |
-  bb.0:
-    liveins: $vgpr2, $vgpr3, $sgpr0
-
-    ; CHECK-LABEL: name: no_merge_exec_write_between
-    ; CHECK: liveins: $vgpr2, $vgpr3, $sgpr0
-    ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: $vgpr0_lo16 = V_MOV_B16_t16_e32 $vgpr2_lo16, implicit $exec
-    ; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
-    ; CHECK-NEXT: $vgpr0_hi16 = V_MOV_B16_t16_e32 $vgpr3_hi16, implicit $exec
-    ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0
-    $vgpr0_lo16 = V_MOV_B16_t16_e32 $vgpr2_lo16, implicit $exec
-    $exec_lo = S_MOV_B32 $sgpr0
-    $vgpr0_hi16 = V_MOV_B16_t16_e32 $vgpr3_hi16, implicit $exec
-    S_ENDPGM 0, implicit $vgpr0
-...