[llvm] [AArch64] Add CSEL for canCreateUndefOrPoisonForTargetNode (PR #226946)

David Green via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 30 23:52:04 PDT 2026


https://github.com/davemgreen updated https://github.com/llvm/llvm-project/pull/226946

>From 015386d8a3e05b371b12d2ecfcc1211a828abca4 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Mon, 28 Sep 2026 10:56:52 +0100
Subject: [PATCH] [AArch64] Add CSEL for canCreateUndefOrPoisonForTargetNode

These nodes cannot create posion, so we can push freeze up through them like
elsewhere in DAG.
---
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp     | 4 ++++
 llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll | 6 ++----
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index c98d607c4a22c..bf5211de7c9d3 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -36193,6 +36193,10 @@ bool AArch64TargetLowering::canCreateUndefOrPoisonForTargetNode(
   case AArch64ISD::VASHR:
   case AArch64ISD::VLSHR:
   case AArch64ISD::VSHL:
+  case AArch64ISD::CSEL:
+  case AArch64ISD::CSNEG:
+  case AArch64ISD::CSINC:
+  case AArch64ISD::CSINV:
     return false;
   }
   return TargetLowering::canCreateUndefOrPoisonForTargetNode(
diff --git a/llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll b/llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
index 26eda6c60a1b1..290a3e3b63b44 100644
--- a/llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
+++ b/llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
@@ -268,8 +268,7 @@ define i64 @test_or_select_fast (float %a, float %b) {
 ; CHECK-SD-NEXT:    fcmp s0, #0.0
 ; CHECK-SD-NEXT:    cset w8, ne
 ; CHECK-SD-NEXT:    fcmp s1, #0.0
-; CHECK-SD-NEXT:    cset w9, ne
-; CHECK-SD-NEXT:    orr w8, w8, w9
+; CHECK-SD-NEXT:    csinc w8, w8, wzr, eq
 ; CHECK-SD-NEXT:    tbz w8, #0, .LBB5_2
 ; CHECK-SD-NEXT:  // %bb.1:
 ; CHECK-SD-NEXT:    mov x0, xzr
@@ -371,8 +370,7 @@ define i64 @test_and_select_fast(float %a, float %b) {
 ; CHECK-SD-NEXT:    fcmp s0, #0.0
 ; CHECK-SD-NEXT:    cset w8, eq
 ; CHECK-SD-NEXT:    fcmp s1, #0.0
-; CHECK-SD-NEXT:    cset w9, eq
-; CHECK-SD-NEXT:    and w8, w8, w9
+; CHECK-SD-NEXT:    csel w8, wzr, w8, ne
 ; CHECK-SD-NEXT:    tbz w8, #0, .LBB7_2
 ; CHECK-SD-NEXT:  // %bb.1: // %bb4
 ; CHECK-SD-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill



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