[llvm] [NFC][SPIR-V] Fix more CHECK lines that never fire in tests (PR #227962)
Arseniy Obolenskiy via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 22:53:20 PDT 2026
https://github.com/aobolensk created https://github.com/llvm/llvm-project/pull/227962
Follow-up to #227332
FileCheck ignores these lines, so the behavior they describe was untested
- Typo `-NO:`, `-:`, `ACHECK:` and `OpCabilitity` (discard.ll, inline_asm.ll, intel-usm-addrspaces.ll, merge-exit-break.ll, SPV_KHR_bit_instructions.ll)
- Invalid directive `CHECK-4` (fp-simple-hierarchy.ll)
- Prefix no RUN line enables (cl_intel_sub_groups.ll, cl_intel_subgroup_local_block_io.ll, negative.ll)
>From db99b5e7145c4bfcf95d18fe28947269c9ffc25a Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Thu, 1 Oct 2026 07:51:25 +0200
Subject: [PATCH] [NFC][SPIR-V] Fix more CHECK lines that never fire in tests
Follow-up to #227332
FileCheck ignores these lines, so the behavior they describe was untested
- Typo `-NO:`, `-:`, `ACHECK:` and `OpCabilitity` (discard.ll, inline_asm.ll, intel-usm-addrspaces.ll, merge-exit-break.ll, SPV_KHR_bit_instructions.ll)
- Invalid directive `CHECK-4` (fp-simple-hierarchy.ll)
- Prefix no RUN line enables (cl_intel_sub_groups.ll, cl_intel_subgroup_local_block_io.ll, negative.ll)
---
.../SPV_INTEL_function_pointers/fp-simple-hierarchy.ll | 2 +-
.../extensions/SPV_INTEL_inline_assembly/inline_asm.ll | 6 +++---
.../CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll | 4 ++--
.../extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll | 6 +++---
.../cl_intel_subgroup_local_block_io.ll | 6 +++---
.../SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll | 4 ++--
.../CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll | 2 +-
llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll | 8 ++++----
llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll | 2 +-
9 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
index 87bb9f95709d9f0..88ea89fe918f904 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
@@ -25,7 +25,7 @@
; CHECK-DAG: %[[I89]] = OpFunction
; CHECK: %[[Foo]] = OpFunction
-; CHECK-4: OpFunctionParameter
+; CHECK-COUNT-4: OpFunctionParameter
; CHECK: %[[Arg1:.*]] = OpPhi %[[TyPtrStruct2]]
; CHECK: %[[VTbl:.*]] = OpBitcast %[[TyPtrPtrFun]] %[[#]]
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
index 47d232aab304916..ffb39e50477869f 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
@@ -38,7 +38,7 @@
; CHECK-DAG: %[[#Const42:]] = OpConstant %[[#DoubleTy:]] 42
; CHECK-DAG: %[[#Dialect:]] = OpAsmTargetINTEL "spirv64-unknown-unknown"
-; CHECK-NO: OpAsmTargetINTEL
+; CHECK-NOT: OpAsmTargetINTEL
; CHECK-DAG: %[[#Asm1:]] = OpAsmINTEL %[[#VoidTy]] %[[#Fun1Ty]] %[[#Dialect]] "" ""
; CHECK-DAG: %[[#Asm2:]] = OpAsmINTEL %[[#VoidTy]] %[[#Fun1Ty]] %[[#Dialect]] "nop" ""
@@ -54,7 +54,7 @@
; CHECK-DAG: %[[#Asm12:]] = OpAsmINTEL %[[#StructTy]] %[[#Fun9Ty]] %[[#Dialect]] "cmdext $0 $4 $5\n cmdext $1 $5 $6\n cmdext $2 $4 $6" "=&r,=&r,=&r,r,r,r"
; CHECK-DAG: %[[#Asm13:]] = OpAsmINTEL %[[#Int32Ty]] %[[#Fun10Ty]] %[[#Dialect]] "icmdext $0 $2 $3"
; CHECK-DAG: %[[#Asm14:]] = OpAsmINTEL %[[#StructTy1]] %[[#Fun11Ty]] %[[#Dialect]] "cmdext $0 $3 $4\n cmdext $1 $3 $4\n $2 $3 $4" "=r,=&r,=*m, r, r"
-; CHECK-NO: OpAsmINTEL
+; CHECK-NOT: OpAsmINTEL
; CHECK: OpFunction
; CHECK: OpAsmCallINTEL %[[#VoidTy]] %[[#Asm1]]
@@ -76,7 +76,7 @@
; CHECK: %[[#StructRet1:]] = OpAsmCallINTEL %[[#StructTy1]] %[[#Asm14]]
; CHECK-NEXT: OpCompositeExtract %[[#Int32Ty]] %[[#StructRet1]] 0
; CHECK-NEXT: OpCompositeExtract %[[#FloatTy]] %[[#StructRet1]] 1
-; CHECK-NO: OpAsmCallINTEL
+; CHECK-NOT: OpAsmCallINTEL
define spir_kernel void @foo(ptr addrspace(1) %_arg_int, ptr addrspace(1) %_arg_float, ptr addrspace(1) %_arg_half, i64 %_lng) {
%i1 = load i32, ptr addrspace(1) %_arg_int
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
index 2d65415eec1748d..23cb0b27c87c6bb 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
@@ -5,8 +5,8 @@
; No error would be reported in comparison to Khronos llvm-spirv, because type adjustments to integer size are made
; in case no appropriate extension is enabled. Here we expect that the type is adjusted to 8 bits.
-; CHECK-SPIRV: Capability ArbitraryPrecisionIntegersALTERA
-; CHECK-SPIRV: Extension "SPV_ALTERA_arbitrary_precision_integers"
+; CHECK-INT-4: OpCapability ArbitraryPrecisionIntegersALTERA
+; CHECK-INT-4: OpExtension "SPV_ALTERA_arbitrary_precision_integers"
; CHECK-INT-4: %[[#Int4:]] = OpTypeInt 4 0
; CHECK-INT-8: %[[#Int4:]] = OpTypeInt 8 0
; CHECK: OpTypeFunction %[[#]] %[[#Int4]]
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
index 2bf8ef05c1cdbce..25ea49190e0c872 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
@@ -47,8 +47,8 @@
; CHECK-DAG: Capability SubgroupImageBlockIOINTEL
; CHECK: Extension "SPV_INTEL_subgroups"
-; CHECK-SPIRV-LABEL: Function
-; CHECK-SPIRV-LABEL: Label
+; CHECK: OpFunction
+; CHECK: OpLabel
; CHECK: SubgroupShuffleINTEL
; CHECK: SubgroupShuffleDownINTEL
@@ -75,7 +75,7 @@
; CHECK: SubgroupBlockReadINTEL
; CHECK: SubgroupBlockWriteINTEL
-; CHECK-SPIRV-LABEL: Return
+; CHECK: OpReturn
%opencl.image2d_ro_t = type opaque
%opencl.image2d_wo_t = type opaque
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
index 8274c917bbe2161..74145562d05f58d 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
@@ -42,8 +42,8 @@
; CHECK-DAG: Capability SubgroupImageBlockIOINTEL
; CHECK: Extension "SPV_INTEL_subgroups"
-; CHECK-SPIRV-LABEL: Function
-; CHECK-SPIRV-LABEL: Label
+; CHECK: OpFunction
+; CHECK: OpLabel
; CHECK: SubgroupImageBlockReadINTEL
; CHECK: SubgroupImageBlockWriteINTEL
@@ -65,7 +65,7 @@
; CHECK: SubgroupBlockReadINTEL
; CHECK: SubgroupBlockWriteINTEL
-; CHECK-SPIRV-LABEL: Return
+; CHECK: OpReturn
%opencl.image2d_ro_t = type opaque
%opencl.image2d_wo_t = type opaque
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
index e963e3035be4d78..58ea25354cbcce4 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
@@ -6,8 +6,8 @@
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV,CHECK-SPIRV-WITHOUT
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
-; CHECK-: Capability USMStorageClassesINTEL
-; CHECK-SPIRV-WITHOUT-NO: Capability USMStorageClassesINTEL
+; CHECK-SPIRV-EXT: Capability USMStorageClassesINTEL
+; CHECK-SPIRV-WITHOUT-NOT: Capability USMStorageClassesINTEL
; CHECK-SPIRV-EXT-DAG: %[[DevTy:[0-9]+]] = OpTypePointer DeviceOnlyINTEL %[[#]]
; CHECK-SPIRV-EXT-DAG: %[[HostTy:[0-9]+]] = OpTypePointer HostOnlyINTEL %[[#]]
; CHECK-SPIRV-DAG: %[[CrsWrkTy:[0-9]+]] = OpTypePointer CrossWorkgroup %[[#]]
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
index a114b40e5810c62..ffd919d2050fd88 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
@@ -1,9 +1,9 @@
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s --spirv-ext=+SPV_KHR_bit_instructions -o - | FileCheck %s --check-prefix=CHECK-EXTENSION
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64v1.2-unknown-unknown %s --spirv-ext=+SPV_KHR_bit_instructions -o - -filetype=obj | spirv-val --target-env opencl2.2 %}
+; CHECK-EXTENSION-NOT: OpCapability Shader
; CHECK-EXTENSION: OpCapability BitInstructions
; CHECK-EXTENSION-NEXT: OpExtension "SPV_KHR_bit_instructions"
-; CHECK-EXTENSION-NOT: OpCabilitity Shader
; CHECK-EXTENSION: %[[#int:]] = OpTypeInt 32
; CHECK-EXTENSION: OpBitReverse %[[#int]]
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
index fb13464010115b8..d139f9b5362f49b 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
@@ -27,8 +27,8 @@ entry:
; CHECK: OpBranchConditional %[[#cmplt]] %[[#truel:]] %[[#endl:]]
; CHECK: %[[#truel]] = OpLabel
; SPIRV15: OpKill
-; SPIRV16-NO: OpKill
-; SPIRV15-NO: OpBranch %[[#endl]]
+; SPIRV16-NOT: OpKill
+; SPIRV15-NOT: OpBranch %[[#endl]]
; SPIRV16: OpDemoteToHelperInvocation
; SPIRV16: OpBranch %[[#endl]]
; CHECK: %[[#endl]] = OpLabel
@@ -82,8 +82,8 @@ entry:
; CHECK: OpBranchConditional %[[#opany]] %[[#truel:]] %[[#endl:]]
; CHECK: %[[#truel]] = OpLabel
; SPIRV15: OpKill
-; SPIRV16-NO: OpKill
-; SPIRV15-NO: OpBranch %[[#endl]]
+; SPIRV16-NOT: OpKill
+; SPIRV15-NOT: OpBranch %[[#endl]]
; SPIRV16: OpDemoteToHelperInvocation
; SPIRV16: OpBranch %[[#endl]]
; CHECK: %[[#endl]] = OpLabel
diff --git a/llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll b/llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
index bdb0181a560b62a..b02d71e84ce5acf 100644
--- a/llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
+++ b/llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
@@ -17,7 +17,7 @@ define internal spir_func void @main() #0 {
; CHECK: %[[#entry:]] = OpLabel
; CHECK: %[[#idx]] = OpVariable %[[#]] Function
-; ACHECK: OpStore %[[#idx]] %[[#int_0]]
+; CHECK: OpStore %[[#idx]] %[[#int_0]]
; CHECK: OpBranch %[[#while_cond:]]
entry:
%0 = call token @llvm.experimental.convergence.entry()
More information about the llvm-commits
mailing list