[lld] [lld][AArch64] Support R_AARCH64_TLSLE_LDST*_TPREL_LO12 (PR #227629)
dong jianqiang via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 20:59:14 PDT 2026
================
@@ -337,16 +337,27 @@ void AArch64::scanSectionImpl(InputSectionBase &sec, Relocs<RelTy> rels,
case R_AARCH64_TLSLE_ADD_TPREL_HI12:
case R_AARCH64_TLSLE_ADD_TPREL_LO12:
case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+ case R_AARCH64_TLSLE_LDST8_TPREL_LO12:
case R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
+ case R_AARCH64_TLSLE_LDST16_TPREL_LO12:
case R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+ case R_AARCH64_TLSLE_LDST32_TPREL_LO12:
case R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+ case R_AARCH64_TLSLE_LDST64_TPREL_LO12:
case R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+ case R_AARCH64_TLSLE_LDST128_TPREL_LO12:
case R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC:
case R_AARCH64_TLSLE_MOVW_TPREL_G0:
case R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case R_AARCH64_TLSLE_MOVW_TPREL_G1:
case R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
case R_AARCH64_TLSLE_MOVW_TPREL_G2:
+ if (LLVM_UNLIKELY(!sym.isTls())) {
----------------
dongjianqiang2 wrote:
Agreed, that makes sense. I'll remove the non-STT_TLS check from this patch so it only contains the AArch64 LDST relocation support, and send the generalized check as a separate follow-up patch. Thanks for the review!
https://github.com/llvm/llvm-project/pull/227629
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