[llvm] [AMDGPU] Do not update livein when splitting SI_KILL (PR #227932)
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Wed Sep 30 19:15:49 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Syadus Sefat (mssefat)
<details>
<summary>Changes</summary>
#<!-- -->227604 restored the dropped EXEC/SCC defs on the SI_KILL. This makes sure that ISel now sinks compares that defined SCC past the SI_KILL. So, SCC will not live across the SI_KILL. The livein update in #<!-- -->134718 added to the splitKillBlock to satisfy the verifier is not needed and now splitAt goes back to UpdateLiveIns=false.
I deliberately did not revert the change in finalizeLowering() that invokes TargetLowering::finalizeLowering() before the pseudo expansion loop. A later PR #<!-- -->203911 for AArch64 now depend on that ordering (in EmitLoweredSetFpmr). Moving the finalizeLowering() below the pseudo expansion loop asserts in llvm/test/CodeGen/AArch64/arm64-fpenv.ll.
---
Full diff: https://github.com/llvm/llvm-project/pull/227932.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+1-1)
- (removed) llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir (-73)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index be0424dc379b46..893b6edd88800b 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -5192,7 +5192,7 @@ Register SITargetLowering::getRegisterByName(const char *RegName, LLT VT,
MachineBasicBlock *
SITargetLowering::splitKillBlock(MachineInstr &MI,
MachineBasicBlock *BB) const {
- MachineBasicBlock *SplitBB = BB->splitAt(MI, /*UpdateLiveIns=*/true);
+ MachineBasicBlock *SplitBB = BB->splitAt(MI, /*UpdateLiveIns=*/false);
const SIInstrInfo *TII = getSubtarget()->getInstrInfo();
MI.setDesc(TII->getKillTerminatorFromPseudo(MI.getOpcode()));
return SplitBB;
diff --git a/llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir b/llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir
deleted file mode 100644
index 6344ac034d87f0..00000000000000
--- a/llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir
+++ /dev/null
@@ -1,73 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=amdgpu10.10 -run-pass finalize-isel -verify-machineinstrs %s -o - | FileCheck %s
----
-name: phi_use_def_before_kill
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: phi_use_def_before_kill
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.3(0x80000000)
- ; CHECK-NEXT: liveins: $sgpr0, $sgpr1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr1
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0
- ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 1065353216
- ; CHECK-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY1]], 0, killed [[S_MOV_B32_]], 0, 0, implicit $mode, implicit $exec
- ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 0
- ; CHECK-NEXT: [[V_CMP_GT_F32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_GT_F32_e64 0, [[V_ADD_F32_e64_]], 0, [[S_MOV_B32_1]], 0, implicit $mode, implicit $exec
- ; CHECK-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 -1082130432
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed [[S_MOV_B32_2]]
- ; CHECK-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[S_MOV_B32_1]], 0, [[COPY2]], killed [[V_CMP_GT_F32_e64_]], implicit $exec
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY [[V_CNDMASK_B32_e64_]]
- ; CHECK-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; CHECK-NEXT: S_CMP_LG_U32 [[COPY]], killed [[S_MOV_B32_3]], implicit-def $scc
- ; CHECK-NEXT: SI_KILL_F32_COND_IMM_TERMINATOR [[V_ADD_F32_e64_]], 0, 2, implicit-def $exec, implicit-def $scc, implicit-def $vcc_lo, implicit $exec
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
- ; CHECK-NEXT: liveins: $vcc_lo, $scc
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc
- ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
- ; CHECK-NEXT: S_BRANCH %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 0
- ; CHECK-NEXT: [[V_CMP_EQ_F32_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_EQ_F32_e64 0, [[COPY]], 0, killed [[S_MOV_B32_4]], 0, implicit $mode, implicit $exec
- ; CHECK-NEXT: S_ENDPGM 0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 0
- ; CHECK-NEXT: [[V_CMP_EQ_F32_e64_1:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_EQ_F32_e64 0, [[COPY]], 0, killed [[S_MOV_B32_5]], 0, implicit $mode, implicit $exec
- ; CHECK-NEXT: S_ENDPGM 0
-
- bb.0:
- liveins: $sgpr0, $sgpr1
- %3:sgpr_32 = COPY $sgpr1
- %2:sgpr_32 = COPY $sgpr0
- %5:sgpr_32 = S_MOV_B32 1065353216
- %6:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %2:sgpr_32, 0, killed %5:sgpr_32, 0, 0, implicit $mode, implicit $exec
- %7:sgpr_32 = S_MOV_B32 0
- %8:sreg_32_xm0_xexec = nofpexcept V_CMP_GT_F32_e64 0, %6:vgpr_32, 0, %7:sgpr_32, 0, implicit $mode, implicit $exec
- %9:sgpr_32 = S_MOV_B32 -1082130432
- %11:vgpr_32 = COPY killed %9:sgpr_32
- %10:vgpr_32 = V_CNDMASK_B32_e64 0, %7:sgpr_32, 0, %11:vgpr_32, killed %8:sreg_32_xm0_xexec, implicit $exec
- %0:sgpr_32 = COPY %10:vgpr_32
- %12:sreg_32 = S_MOV_B32 0
- S_CMP_LG_U32 %3:sgpr_32, killed %12:sreg_32, implicit-def $scc
- SI_KILL_F32_COND_IMM_PSEUDO %6:vgpr_32, 0, 2, implicit-def $exec, implicit-def $scc, implicit-def $vcc, implicit $exec
- S_CBRANCH_SCC1 %bb.1, implicit $scc
- S_CBRANCH_VCCNZ %bb.2, implicit $vcc
- S_BRANCH %bb.2
-
- bb.1:
- %13:sgpr_32 = S_MOV_B32 0
- %14:sreg_32 = nofpexcept V_CMP_EQ_F32_e64 0, %3:sgpr_32, 0, killed %13:sgpr_32, 0, implicit $mode, implicit $exec
- S_ENDPGM 0
-
- bb.2:
- %15:sgpr_32 = S_MOV_B32 0
- %16:sreg_32 = nofpexcept V_CMP_EQ_F32_e64 0, %3:sgpr_32, 0, killed %15:sgpr_32, 0, implicit $mode, implicit $exec
- S_ENDPGM 0
-
-...
``````````
</details>
https://github.com/llvm/llvm-project/pull/227932
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