[llvm] [RISCV][P-ext] Prevent accidental matches in riscv_packed_simd.c. NFC (PR #227830)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 19:04:45 PDT 2026
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/227830
>From 4c9e294d14566bf49fe38f8d8051bc423dae97cd Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 30 Sep 2026 12:09:41 -0700
Subject: [PATCH] [RISCV][P-ext] Prevent accidental matches in
riscv_packed_simd.c.
The function name is printeded multiple times in the output. We
need to make sure we are matching an instruction mnemonic. The way
other existing test cases do this is by checking for a space after
the instruction name.
---
.../riscv_packed_simd.c | 148 +++++++++---------
1 file changed, 72 insertions(+), 76 deletions(-)
diff --git a/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c b/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
index 54d7022dac80b..aa24288599928 100644
--- a/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+++ b/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
@@ -2709,250 +2709,250 @@ uint16x2_t test_pncvth_u16x2(uint32x2_t rs1) {
}
// CHECK-LABEL: test_pmerge_merge_u8x4:
-// CHECK: merge
+// CHECK: merge{{[[:space:]]}}
uint8x4_t test_pmerge_merge_u8x4(uint8x4_t rd, uint8x4_t rs1, uint8x4_t rs2) {
return __riscv_pmerge_u8x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u8x4:
-// CHECK: mvm
+// CHECK: mvm{{[[:space:]]}}
uint8x4_t test_pmerge_mvm_u8x4(uint8x4_t rs1, uint8x4_t rd, uint8x4_t rs2) {
return __riscv_pmerge_u8x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u8x4:
-// CHECK: mvmn
+// CHECK: mvmn{{[[:space:]]}}
uint8x4_t test_pmerge_mvmn_u8x4(uint8x4_t rs2, uint8x4_t rs1, uint8x4_t rd) {
return __riscv_pmerge_u8x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_i8x4:
-// CHECK: merge
+// CHECK: merge{{[[:space:]]}}
int8x4_t test_pmerge_merge_i8x4(uint8x4_t rd, int8x4_t rs1, int8x4_t rs2) {
return __riscv_pmerge_i8x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_i8x4:
-// CHECK: mvm
+// CHECK: mvm{{[[:space:]]}}
int8x4_t test_pmerge_mvm_i8x4(int8x4_t rs1, uint8x4_t rd, int8x4_t rs2) {
return __riscv_pmerge_i8x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_i8x4:
-// CHECK: mvmn
+// CHECK: mvmn{{[[:space:]]}}
int8x4_t test_pmerge_mvmn_i8x4(int8x4_t rs2, int8x4_t rs1, uint8x4_t rd) {
return __riscv_pmerge_i8x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_u16x2:
-// CHECK: merge
+// CHECK: merge{{[[:space:]]}}
uint16x2_t test_pmerge_merge_u16x2(uint16x2_t rd, uint16x2_t rs1,
uint16x2_t rs2) {
return __riscv_pmerge_u16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u16x2:
-// CHECK: mvm
+// CHECK: mvm{{[[:space:]]}}
uint16x2_t test_pmerge_mvm_u16x2(uint16x2_t rs1, uint16x2_t rd,
uint16x2_t rs2) {
return __riscv_pmerge_u16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u16x2:
-// CHECK: mvmn
+// CHECK: mvmn{{[[:space:]]}}
uint16x2_t test_pmerge_mvmn_u16x2(uint16x2_t rs2, uint16x2_t rs1,
uint16x2_t rd) {
return __riscv_pmerge_u16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_i16x2:
-// CHECK: merge
+// CHECK: merge{{[[:space:]]}}
int16x2_t test_pmerge_merge_i16x2(uint16x2_t rd, int16x2_t rs1, int16x2_t rs2) {
return __riscv_pmerge_i16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_i16x2:
-// CHECK: mvm
+// CHECK: mvm{{[[:space:]]}}
int16x2_t test_pmerge_mvm_i16x2(int16x2_t rs1, uint16x2_t rd, int16x2_t rs2) {
return __riscv_pmerge_i16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_i16x2:
-// CHECK: mvmn
+// CHECK: mvmn{{[[:space:]]}}
int16x2_t test_pmerge_mvmn_i16x2(int16x2_t rs2, int16x2_t rs1, uint16x2_t rd) {
return __riscv_pmerge_i16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_u8x8:
-// RV32-COUNT-2: merge
-// RV64: merge
+// RV32-COUNT-2: merge{{[[:space:]]}}
+// RV64: merge{{[[:space:]]}}
uint8x8_t test_pmerge_merge_u8x8(uint8x8_t rd, uint8x8_t rs1, uint8x8_t rs2) {
return __riscv_pmerge_u8x8(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u8x8:
-// RV32-COUNT-2: mvm
-// RV64: mvm
+// RV32-COUNT-2: mvm{{[[:space:]]}}
+// RV64: mvm{{[[:space:]]}}
uint8x8_t test_pmerge_mvm_u8x8(uint8x8_t rs1, uint8x8_t rd, uint8x8_t rs2) {
return __riscv_pmerge_u8x8(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u8x8:
-// RV32-COUNT-2: mvmn
-// RV64: mvmn
+// RV32-COUNT-2: mvmn{{[[:space:]]}}
+// RV64: mvmn{{[[:space:]]}}
uint8x8_t test_pmerge_mvmn_u8x8(uint8x8_t rs2, uint8x8_t rs1, uint8x8_t rd) {
return __riscv_pmerge_u8x8(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_i8x8:
-// RV32-COUNT-2: merge
-// RV64: merge
+// RV32-COUNT-2: merge{{[[:space:]]}}
+// RV64: merge{{[[:space:]]}}
int8x8_t test_pmerge_merge_i8x8(uint8x8_t rd, int8x8_t rs1, int8x8_t rs2) {
return __riscv_pmerge_i8x8(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_i8x8:
-// RV32-COUNT-2: mvm
-// RV64: mvm
+// RV32-COUNT-2: mvm{{[[:space:]]}}
+// RV64: mvm{{[[:space:]]}}
int8x8_t test_pmerge_mvm_i8x8(int8x8_t rs1, uint8x8_t rd, int8x8_t rs2) {
return __riscv_pmerge_i8x8(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_i8x8:
-// RV32-COUNT-2: mvmn
-// RV64: mvmn
+// RV32-COUNT-2: mvmn{{[[:space:]]}}
+// RV64: mvmn{{[[:space:]]}}
int8x8_t test_pmerge_mvmn_i8x8(int8x8_t rs2, int8x8_t rs1, uint8x8_t rd) {
return __riscv_pmerge_i8x8(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_u16x4:
-// RV32-COUNT-2: merge
-// RV64: merge
+// RV32-COUNT-2: merge{{[[:space:]]}}
+// RV64: merge{{[[:space:]]}}
uint16x4_t test_pmerge_merge_u16x4(uint16x4_t rd, uint16x4_t rs1,
uint16x4_t rs2) {
return __riscv_pmerge_u16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u16x4:
-// RV32-COUNT-2: mvm
-// RV64: mvm
+// RV32-COUNT-2: mvm{{[[:space:]]}}
+// RV64: mvm{{[[:space:]]}}
uint16x4_t test_pmerge_mvm_u16x4(uint16x4_t rs1, uint16x4_t rd,
uint16x4_t rs2) {
return __riscv_pmerge_u16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u16x4:
-// RV32-COUNT-2: mvmn
-// RV64: mvmn
+// RV32-COUNT-2: mvmn{{[[:space:]]}}
+// RV64: mvmn{{[[:space:]]}}
uint16x4_t test_pmerge_mvmn_u16x4(uint16x4_t rs2, uint16x4_t rs1,
uint16x4_t rd) {
return __riscv_pmerge_u16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_i16x4:
-// RV32-COUNT-2: merge
-// RV64: merge
+// RV32-COUNT-2: merge{{[[:space:]]}}
+// RV64: merge{{[[:space:]]}}
int16x4_t test_pmerge_merge_i16x4(uint16x4_t rd, int16x4_t rs1, int16x4_t rs2) {
return __riscv_pmerge_i16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_i16x4:
-// RV32-COUNT-2: mvm
-// RV64: mvm
+// RV32-COUNT-2: mvm{{[[:space:]]}}
+// RV64: mvm{{[[:space:]]}}
int16x4_t test_pmerge_mvm_i16x4(int16x4_t rs1, uint16x4_t rd, int16x4_t rs2) {
return __riscv_pmerge_i16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_i16x4:
-// RV32-COUNT-2: mvmn
-// RV64: mvmn
+// RV32-COUNT-2: mvmn{{[[:space:]]}}
+// RV64: mvmn{{[[:space:]]}}
int16x4_t test_pmerge_mvmn_i16x4(int16x4_t rs2, int16x4_t rs1, uint16x4_t rd) {
return __riscv_pmerge_i16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_u32x2:
-// RV32-COUNT-2: merge
-// RV64: merge
+// RV32-COUNT-2: merge{{[[:space:]]}}
+// RV64: merge{{[[:space:]]}}
uint32x2_t test_pmerge_merge_u32x2(uint32x2_t rd, uint32x2_t rs1,
uint32x2_t rs2) {
return __riscv_pmerge_u32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u32x2:
-// RV32-COUNT-2: mvm
-// RV64: mvm
+// RV32-COUNT-2: mvm{{[[:space:]]}}
+// RV64: mvm{{[[:space:]]}}
uint32x2_t test_pmerge_mvm_u32x2(uint32x2_t rs1, uint32x2_t rd,
uint32x2_t rs2) {
return __riscv_pmerge_u32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u32x2:
-// RV32-COUNT-2: mvmn
-// RV64: mvmn
+// RV32-COUNT-2: mvmn{{[[:space:]]}}
+// RV64: mvmn{{[[:space:]]}}
uint32x2_t test_pmerge_mvmn_u32x2(uint32x2_t rs2, uint32x2_t rs1,
uint32x2_t rd) {
return __riscv_pmerge_u32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_merge_i32x2:
-// RV32-COUNT-2: merge
-// RV64: merge
+// RV32-COUNT-2: merge{{[[:space:]]}}
+// RV64: merge{{[[:space:]]}}
int32x2_t test_pmerge_merge_i32x2(uint32x2_t rd, int32x2_t rs1, int32x2_t rs2) {
return __riscv_pmerge_i32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_i32x2:
-// RV32-COUNT-2: mvm
-// RV64: mvm
+// RV32-COUNT-2: mvm{{[[:space:]]}}
+// RV64: mvm{{[[:space:]]}}
int32x2_t test_pmerge_mvm_i32x2(int32x2_t rs1, uint32x2_t rd, int32x2_t rs2) {
return __riscv_pmerge_i32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_i32x2:
-// RV32-COUNT-2: mvmn
-// RV64: mvmn
+// RV32-COUNT-2: mvmn{{[[:space:]]}}
+// RV64: mvmn{{[[:space:]]}}
int32x2_t test_pmerge_mvmn_i32x2(int32x2_t rs2, int32x2_t rs1, uint32x2_t rd) {
return __riscv_pmerge_i32x2(rs1, rs2, rd);
}
// Scalar multiply high
// CHECK-LABEL: test_mulh_i32:
-// RV32: mulh
+// RV32: mulh{{[[:space:]]}}
// RV64: pmulh.w
int32_t test_mulh_i32(int32_t rs1, int32_t rs2) {
return __riscv_mulh_i32(rs1, rs2);
}
// CHECK-LABEL: test_mulhr_i32:
-// RV32: mulhr
+// RV32: mulhr{{[[:space:]]}}
// RV64: pmulhr.w
int32_t test_mulhr_i32(int32_t rs1, int32_t rs2) {
return __riscv_mulhr_i32(rs1, rs2);
}
// CHECK-LABEL: test_mulhu_u32:
-// RV32: mulhu
+// RV32: mulhu{{[[:space:]]}}
// RV64: pmulhu.w
uint32_t test_mulhu_u32(uint32_t rs1, uint32_t rs2) {
return __riscv_mulhu_u32(rs1, rs2);
}
// CHECK-LABEL: test_mulhru_u32:
-// RV32: mulhru
+// RV32: mulhru{{[[:space:]]}}
// RV64: pmulhru.w
uint32_t test_mulhru_u32(uint32_t rs1, uint32_t rs2) {
return __riscv_mulhru_u32(rs1, rs2);
}
// CHECK-LABEL: test_mulhsu_i32:
-// RV32: mulhsu
+// RV32: mulhsu{{[[:space:]]}}
// RV64: pmulhsu.w
int32_t test_mulhsu_i32(int32_t rs1, uint32_t rs2) {
return __riscv_mulhsu_i32(rs1, rs2);
}
// CHECK-LABEL: test_mulhrsu_i32:
-// RV32: mulhrsu
+// RV32: mulhrsu{{[[:space:]]}}
// RV64: pmulhrsu.w
int32_t test_mulhrsu_i32(int32_t rs1, uint32_t rs2) {
return __riscv_mulhrsu_i32(rs1, rs2);
@@ -3037,28 +3037,28 @@ int16x4_t test_pmulhrsu_i16x4(int16x4_t rs1, uint16x4_t rs2) {
}
// CHECK-LABEL: test_pmulh_i32x2:
-// RV32-COUNT-2: mulh
+// RV32-COUNT-2: mulh{{[[:space:]]}}
// RV64: pmulh.w
int32x2_t test_pmulh_i32x2(int32x2_t rs1, int32x2_t rs2) {
return __riscv_pmulh_i32x2(rs1, rs2);
}
// CHECK-LABEL: test_pmulhr_i32x2:
-// RV32-COUNT-2: mulhr
+// RV32-COUNT-2: mulhr{{[[:space:]]}}
// RV64: pmulhr.w
int32x2_t test_pmulhr_i32x2(int32x2_t rs1, int32x2_t rs2) {
return __riscv_pmulhr_i32x2(rs1, rs2);
}
// CHECK-LABEL: test_pmulhu_u32x2:
-// RV32-COUNT-2: mulhu
+// RV32-COUNT-2: mulhu{{[[:space:]]}}
// RV64: pmulhu.w
uint32x2_t test_pmulhu_u32x2(uint32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmulhu_u32x2(rs1, rs2);
}
// CHECK-LABEL: test_pmulhru_u32x2:
-// RV32-COUNT-2: mulhru
+// RV32-COUNT-2: mulhru{{[[:space:]]}}
// RV64: pmulhru.w
uint32x2_t test_pmulhru_u32x2(uint32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmulhru_u32x2(rs1, rs2);
@@ -3072,7 +3072,7 @@ int32x2_t test_pmulhsu_i32x2(int32x2_t rs1, uint32x2_t rs2) {
}
// CHECK-LABEL: test_pmulhrsu_i32x2:
-// RV32-COUNT-2: mulhrsu
+// RV32-COUNT-2: mulhrsu{{[[:space:]]}}
// RV64: pmulhrsu.w
int32x2_t test_pmulhrsu_i32x2(int32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmulhrsu_i32x2(rs1, rs2);
@@ -3157,42 +3157,42 @@ int16x4_t test_pmhraccsu_i16x4(int16x4_t rd, int16x4_t rs1, uint16x4_t rs2) {
}
// CHECK-LABEL: test_pmhacc_i32x2:
-// RV32-COUNT-2: mhacc
+// RV32-COUNT-2: mhacc{{[[:space:]]}}
// RV64: pmhacc.w
int32x2_t test_pmhacc_i32x2(int32x2_t rd, int32x2_t rs1, int32x2_t rs2) {
return __riscv_pmhacc_i32x2(rd, rs1, rs2);
}
// CHECK-LABEL: test_pmhracc_i32x2:
-// RV32-COUNT-2: mhracc
+// RV32-COUNT-2: mhracc{{[[:space:]]}}
// RV64: pmhracc.w
int32x2_t test_pmhracc_i32x2(int32x2_t rd, int32x2_t rs1, int32x2_t rs2) {
return __riscv_pmhracc_i32x2(rd, rs1, rs2);
}
// CHECK-LABEL: test_pmhaccu_u32x2:
-// RV32-COUNT-2: mhaccu
+// RV32-COUNT-2: mhaccu{{[[:space:]]}}
// RV64: pmhaccu.w
uint32x2_t test_pmhaccu_u32x2(uint32x2_t rd, uint32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmhaccu_u32x2(rd, rs1, rs2);
}
// CHECK-LABEL: test_pmhraccu_u32x2:
-// RV32-COUNT-2: mhraccu
+// RV32-COUNT-2: mhraccu{{[[:space:]]}}
// RV64: pmhraccu.w
uint32x2_t test_pmhraccu_u32x2(uint32x2_t rd, uint32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmhraccu_u32x2(rd, rs1, rs2);
}
// CHECK-LABEL: test_pmhaccsu_i32x2:
-// RV32-COUNT-2: mhaccsu
+// RV32-COUNT-2: mhaccsu{{[[:space:]]}}
// RV64: pmhaccsu.w
int32x2_t test_pmhaccsu_i32x2(int32x2_t rd, int32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmhaccsu_i32x2(rd, rs1, rs2);
}
// CHECK-LABEL: test_pmhraccsu_i32x2:
-// RV32-COUNT-2: mhraccsu
+// RV32-COUNT-2: mhraccsu{{[[:space:]]}}
// RV64: pmhraccsu.w
int32x2_t test_pmhraccsu_i32x2(int32x2_t rd, int32x2_t rs1, uint32x2_t rs2) {
return __riscv_pmhraccsu_i32x2(rd, rs1, rs2);
@@ -3325,33 +3325,29 @@ int16x2_t test_pmulqr_i16x2(int16x2_t a, int16x2_t b) {
}
// CHECK-LABEL: test_pmulq_i16x4:
-// RV32: pmulq.h
-// RV32: pmulq.h
-// RV64: pmulq.h
+// RV32-COUNT-2: pmulq.h
+// RV64: pmulq.h
int16x4_t test_pmulq_i16x4(int16x4_t a, int16x4_t b) {
return __riscv_pmulq_i16x4(a, b);
}
// CHECK-LABEL: test_pmulqr_i16x4:
-// RV32: pmulqr.h
-// RV32: pmulqr.h
+// RV32-COUNT-2: pmulqr.h
// RV64: pmulqr.h
int16x4_t test_pmulqr_i16x4(int16x4_t a, int16x4_t b) {
return __riscv_pmulqr_i16x4(a, b);
}
// CHECK-LABEL: test_pmulq_i32x2:
-// RV32: mulq
-// RV32: mulq
-// RV64: pmulq.w
+// RV32-COUNT-2: mulq{{[[:space:]]}}
+// RV64: pmulq.w
int32x2_t test_pmulq_i32x2(int32x2_t a, int32x2_t b) {
return __riscv_pmulq_i32x2(a, b);
}
// CHECK-LABEL: test_pmulqr_i32x2:
-// RV32: mulqr
-// RV32: mulqr
-// RV64: pmulqr.w
+// RV32-COUNT-2: mulqr{{[[:space:]]}}
+// RV64: pmulqr.w
int32x2_t test_pmulqr_i32x2(int32x2_t a, int32x2_t b) {
return __riscv_pmulqr_i32x2(a, b);
}
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