[llvm] [AMDGPU] Use isGFX125xOnly as the assembler predicate for tensor load… (PR #227887)

[Changpeng Fang via llvm-commits]

https://github.com/changpeng created https://github.com/llvm/llvm-project/pull/227887

…/store

The VIMAGE_TENSOR gfx1250 real instructions are only available on GFX125x, so predicate the assembler on isGFX125xOnly rather than on the HasTDMInsts feature.

>From 4d4d02f6d693b46702e5f7936a4539e991acceea Mon Sep 17 00:00:00 2001
From: Changpeng Fang <changpeng.fang at amd.com>
Date: Wed, 30 Sep 2026 15:01:22 -0700
Subject: [PATCH] [AMDGPU] Use isGFX125xOnly as the assembler predicate for
 tensor load/store

The VIMAGE_TENSOR gfx1250 real instructions are only available on GFX125x,
so predicate the assembler on isGFX125xOnly rather than on the HasTDMInsts
feature.
---
 llvm/lib/Target/AMDGPU/MIMGInstructions.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/MIMGInstructions.td b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
index f32ecdb200c96..f863e10e2b0cf 100644
--- a/llvm/lib/Target/AMDGPU/MIMGInstructions.td
+++ b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
@@ -2346,7 +2346,7 @@ class VIMAGE_TENSOR_Real <bits<8> op, VIMAGE_TENSOR_Pseudo ps, string opName = p
 }
 
 multiclass VIMAGE_TENSOR_Real_gfx1250<bits<8> op> {
-  let AssemblerPredicate = HasTDMInsts, DecoderNamespace = "GFX1250" in {
+  let AssemblerPredicate = isGFX125xOnly, DecoderNamespace = "GFX1250" in {
     foreach DSuffix = ["_d2", "_d4"] in {
       defvar ps = !cast<VIMAGE_TENSOR_Pseudo>(NAME # DSuffix);
       def DSuffix # _gfx1250 : VIMAGE_TENSOR_Real<op, ps, ps.Mnemonic>,