[llvm] [Hexagon] Fix duplicate A2_tfr check in HexagonGlobalScheduler (PR #227762)

[Fateme Hosseini via llvm-commits]

https://github.com/fhossein-quic created https://github.com/llvm/llvm-project/pull/227762

Fix a typo where both sides of a logical AND checked the same opcode (A2_tfr). The second check should be A2_tfrsi.

>From 5b8a9a1c861b8fd6e7f8bde2245a3912fb2cc0a0 Mon Sep 17 00:00:00 2001
From: Fateme Hosseini <fhossein at qti.qualcomm.com>
Date: Wed, 30 Sep 2026 08:41:04 -0700
Subject: [PATCH] [Hexagon] Fix duplicate A2_tfr check in
 HexagonGlobalScheduler

Fix a typo where both sides of a logical AND checked the same opcode
(A2_tfr). The second check should be A2_tfrsi.
---
 llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp b/llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
index 452ef6a5facbf..aeab8d83ca100 100644
--- a/llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
@@ -4161,7 +4161,7 @@ bool HexagonGlobalSchedulerImpl::pullUpPeelBBLoop(MachineBasicBlock *PredBB,
   if (RegMI->isBundle())
     return false;
   int TfrOpcode = RegMI->getOpcode();
-  if (TfrOpcode != Hexagon::A2_tfr && TfrOpcode != Hexagon::A2_tfr)
+  if (TfrOpcode != Hexagon::A2_tfr && TfrOpcode != Hexagon::A2_tfrsi)
     return false;
   if (!(RegMI->getOperand(0).isReg() && RegMI->getOperand(1).isReg()))
     return false;