[llvm] Mips/GlobalISel: Fix adding $gp to calls as a def instead of a use (PR #227679)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-mips

Author: Matt Arsenault (arsenm)

<details>
<summary>Changes</summary>

A PIC call needs $gp to point at the GOT for the lazy binding stub.
SelectionDAG adds it as an ordinary argument register. GlobalISel
instead added it as an implicit def, which killed the $gp copy set up
right before the call.

Co-authored-by: Claude Opus 5 <noreply@<!-- -->anthropic.com>

---
Full diff: https://github.com/llvm/llvm-project/pull/227679.diff


3 Files Affected:

- (modified) llvm/lib/Target/Mips/MipsCallLowering.cpp (+1-1) 
- (modified) llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll (+3-3) 
- (modified) llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll (+2-2) 


``````````diff
diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp
index c1407917fbb21..13c740ed1991d 100644
--- a/llvm/lib/Target/Mips/MipsCallLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp
@@ -477,7 +477,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
     MIRBuilder.buildCopy(
       Register(Mips::GP),
       MF.getInfo<MipsFunctionInfo>()->getGlobalBaseRegForGlobalISel(MF));
-    MIB.addDef(Mips::GP, RegState::Implicit);
+    MIB.addUse(Mips::GP, RegState::Implicit);
   }
   MIRBuilder.insertInstr(MIB);
   if (MIB->getOpcode() == Mips::JALRPseudo) {
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
index fb8e47e10b12f..34fedf4e866a2 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
+++ b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
@@ -34,7 +34,7 @@ define i32 @call_global(i32 %a0, i32 %a1, i32 %x, i32 %y) {
   ; MIPS32_PIC:   $a0 = COPY [[COPY2]](s32)
   ; MIPS32_PIC:   $a1 = COPY [[COPY3]](s32)
   ; MIPS32_PIC:   $gp = COPY [[ADDu]]
-  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
+  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $gp, implicit-def $v0
   ; MIPS32_PIC:   [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
   ; MIPS32_PIC:   ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32_PIC:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY4]], [[COPY4]]
@@ -98,7 +98,7 @@ define i32 @call_global_with_local_linkage(i32 %a0, i32 %a1, i32 %x, i32 %y) {
   ; MIPS32_PIC:   $a0 = COPY [[COPY2]](s32)
   ; MIPS32_PIC:   $a1 = COPY [[COPY3]](s32)
   ; MIPS32_PIC:   $gp = COPY [[ADDu]]
-  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
+  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $gp, implicit-def $v0
   ; MIPS32_PIC:   [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
   ; MIPS32_PIC:   ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32_PIC:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY4]], [[COPY4]]
@@ -184,7 +184,7 @@ define void @call_f_with_void_ret() {
   ; MIPS32_PIC:   ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32_PIC:   [[GV:%[0-9]+]]:gpr32(p0) = G_GLOBAL_VALUE target-flags(mips-got-call) @f_with_void_ret
   ; MIPS32_PIC:   $gp = COPY [[ADDu]]
-  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $gp
+  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $gp
   ; MIPS32_PIC:   ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32_PIC:   RetRA
 entry:
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
index a61e24610292d..06af014751d14 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
+++ b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
@@ -29,7 +29,7 @@ define i32 @call_global(i32 %a, i32 %b) {
   ; MIPS32_PIC:   $a0 = COPY [[COPY]](s32)
   ; MIPS32_PIC:   $a1 = COPY [[COPY1]](s32)
   ; MIPS32_PIC:   $gp = COPY [[ADDu]]
-  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
+  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $gp, implicit-def $v0
   ; MIPS32_PIC:   [[COPY2:%[0-9]+]]:_(s32) = COPY $v0
   ; MIPS32_PIC:   ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32_PIC:   $v0 = COPY [[COPY2]](s32)
@@ -51,7 +51,7 @@ define i32 @call_global_with_local_linkage(i32 %a, i32 %b) {
   ; MIPS32_PIC:   $a0 = COPY [[COPY]](s32)
   ; MIPS32_PIC:   $a1 = COPY [[COPY1]](s32)
   ; MIPS32_PIC:   $gp = COPY [[ADDu]]
-  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
+  ; MIPS32_PIC:   JALRPseudo [[GV]](p0), csr_o32, implicit-def dead $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $gp, implicit-def $v0
   ; MIPS32_PIC:   [[COPY2:%[0-9]+]]:_(s32) = COPY $v0
   ; MIPS32_PIC:   ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32_PIC:   $v0 = COPY [[COPY2]](s32)

``````````

</details>


https://github.com/llvm/llvm-project/pull/227679