[llvm] [RISCV] Add Zilx loads to getJumpTableIndex. (PR #227557)

via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 29 22:04:43 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/227557.diff


2 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+10-1) 
- (modified) llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll (+89) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index e7aaeb0ac9e97..691884f6b8c58 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -1908,7 +1908,6 @@ int RISCVInstrInfo::getJumpTableIndex(const MachineInstr &MI) const {
   case RISCV::LW:
   case RISCV::LWU:
   case RISCV::LD:
-    // TODO: Zilx
     if (!isJumpTableLoad(*Def))
       return -1;
 
@@ -1916,6 +1915,16 @@ int RISCVInstrInfo::getJumpTableIndex(const MachineInstr &MI) const {
     if (JTI >= 0)
       return JTI;
     break;
+  case RISCV::LXSW:
+  case RISCV::LXWU:
+  case RISCV::LXSD:
+    if (!isJumpTableLoad(*Def))
+      return -1;
+
+    JTI = getJumpTableIndexFromBase(MRI, Def->getOperand(1).getReg());
+    if (JTI >= 0)
+      return JTI;
+    break;
   case RISCV::ADD:
     JTI = getJumpTableIndexFromBase(MRI, Def->getOperand(1).getReg());
     if (JTI >= 0)
diff --git a/llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll b/llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll
index b6c98e469940d..3606492b82792 100644
--- a/llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll
+++ b/llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll
@@ -6,6 +6,7 @@
 ; RUN: llc -mtriple=riscv64 -code-model=small -mattr=+zba -O3 < %s | FileCheck %s --check-prefixes=RV64I-SMALL,CHECK
 ; RUN: llc -mtriple=riscv64 -code-model=medium -mattr=+zba -O3 < %s | FileCheck %s --check-prefix=RV64I-MEDIUM
 ; RUN: llc -mtriple=riscv64 -relocation-model=pic -mattr=+zba -O3 < %s | FileCheck %s --check-prefix=RV64I-PIC
+; RUN: llc -mtriple=riscv64 -code-model=small -mattr=+experimental-zilx -O3 < %s | FileCheck %s --check-prefixes=RV64ZILX-SMALL,CHECK
 
 declare void @use(i32)
 
@@ -637,6 +638,94 @@ define void @sink_through_jt(ptr %p) {
 ; RV64I-PIC-NEXT:    # in Loop: Header=BB0_3 Depth=1
 ; RV64I-PIC-NEXT:    li a0, 107
 ; RV64I-PIC-NEXT:    j .LBB0_2
+;
+; RV64ZILX-SMALL-LABEL: sink_through_jt:
+; RV64ZILX-SMALL:       # %bb.0: # %entry
+; RV64ZILX-SMALL-NEXT:    addi sp, sp, -32
+; RV64ZILX-SMALL-NEXT:    .cfi_def_cfa_offset 32
+; RV64ZILX-SMALL-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
+; RV64ZILX-SMALL-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
+; RV64ZILX-SMALL-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
+; RV64ZILX-SMALL-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
+; RV64ZILX-SMALL-NEXT:    .cfi_offset ra, -8
+; RV64ZILX-SMALL-NEXT:    .cfi_offset s0, -16
+; RV64ZILX-SMALL-NEXT:    .cfi_offset s1, -24
+; RV64ZILX-SMALL-NEXT:    .cfi_offset s2, -32
+; RV64ZILX-SMALL-NEXT:    li s0, 12
+; RV64ZILX-SMALL-NEXT:    addi s1, a0, 1
+; RV64ZILX-SMALL-NEXT:    lui s2, %hi(.LJTI0_0)
+; RV64ZILX-SMALL-NEXT:    addi s2, s2, %lo(.LJTI0_0)
+; RV64ZILX-SMALL-NEXT:    j .LBB0_3
+; RV64ZILX-SMALL-NEXT:  .LBB0_1: # %c10
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 110
+; RV64ZILX-SMALL-NEXT:  .LBB0_2: # %m
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    call use
+; RV64ZILX-SMALL-NEXT:    addi s1, s1, 1
+; RV64ZILX-SMALL-NEXT:  .LBB0_3: # %disp
+; RV64ZILX-SMALL-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64ZILX-SMALL-NEXT:    lbu a0, -1(s1)
+; RV64ZILX-SMALL-NEXT:    addi a0, a0, -1
+; RV64ZILX-SMALL-NEXT:    bltu s0, a0, .LBB0_14
+; RV64ZILX-SMALL-NEXT:  # %bb.4: # %disp
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    lxsw a0, (s2), a0
+; RV64ZILX-SMALL-NEXT:    jr a0
+; RV64ZILX-SMALL-NEXT:  .LBB0_5: # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    lw a0, 0(s1)
+; RV64ZILX-SMALL-NEXT:    addiw a0, a0, 7
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_6: # %c3
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 103
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_7: # %c11
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 111
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_8: # %c8
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 108
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_9: # %c1
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 101
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_10: # %c2
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 102
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_11: # %c6
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 106
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_12: # %other
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 55
+; RV64ZILX-SMALL-NEXT:    call use
+; RV64ZILX-SMALL-NEXT:    li a0, 0
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_13: # %c4
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 104
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_14: # %c0
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 100
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_15: # %c5
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 105
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_16: # %c9
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 109
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
+; RV64ZILX-SMALL-NEXT:  .LBB0_17: # %c7
+; RV64ZILX-SMALL-NEXT:    # in Loop: Header=BB0_3 Depth=1
+; RV64ZILX-SMALL-NEXT:    li a0, 107
+; RV64ZILX-SMALL-NEXT:    j .LBB0_2
 entry:
   br label %disp
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/227557


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