[llvm] [NVPTX] Support native 64-bit atomic add/sub pre-SM32 (PR #222471)

[Akshay Deodhar via llvm-commits]

https://github.com/akshayrdeodhar approved this pull request.

LGTM! A couple of nits:
- Do we not need an sm20 check because that is the lowest supported version? 
- The point of this PR is to have the first switch case be independent of any checks, and only have the _second_ switch case depend on the minmax/bitwise check, simplifying the code.

https://github.com/llvm/llvm-project/pull/222471