[llvm] [AMDGPU] Prefer a safe V_PERM_PK16 follower in the scheduler (gfx1250/gfx1251) (PR #214597)

via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 29 09:57:51 PDT 2026


================
@@ -292,6 +299,21 @@ void GCNHazardRecognizer::updateMultiCycleVALUState(const MachineInstr &MI) {
   }
 }
 
+void GCNHazardRecognizer::updateVPermPk16State(const MachineInstr &MI) {
+  if (!ST.hasVPermPk16Hazard())
+    return;
+  if (!SIInstrInfo::isVPermPk16(MI.getOpcode()))
+    return;
+
+  // V_PERM_PK16 must be immediately followed by a safe instruction to clear
+  // the V_PERM_PK16 hazard. Seed to 2: schedulerAdvanceCycle decrements once
+  // before the next pick's hazard check (same convention as CyclesUntilTRANS),
----------------
hidekisaito wrote:

Not in the manual (yet), but it's been reported.

https://github.com/llvm/llvm-project/pull/214597


More information about the llvm-commits mailing list