[llvm] [DAGCombiner] `visitSIGN_EXTEND_INREG` - fold `(sext_inreg (freeze (extload x)))` -> `(freeze (sextload x))` (PR #226208)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 29 05:26:58 PDT 2026
https://github.com/VachanVY updated https://github.com/llvm/llvm-project/pull/226208
>From daf557c81c5600a4be98eb0453bf1bc2cd8fa6c7 Mon Sep 17 00:00:00 2001
From: Vachan V Y <vachanvy05 at gmail.com>
Date: Fri, 25 Sep 2026 22:05:45 +0530
Subject: [PATCH 1/4] Squashed commit of the following:
commit 3eb925780c594130fe63027bef094d4d3377c0b8
Author: Vachan V Y <vachanvy05 at gmail.com>
Date: Wed Aug 26 22:51:50 2026 +0530
[DAGCombine] Freeze = Op == Freeze && Load is used once
`visitANY_EXTEND` - fold `(aext (freeze (load x)))` -> `(aext (truncate (freeze (extload x))))`
commit 4f5b1e7f3b2441bb75bdeac00a793a2ff3bd0242
Author: Vachan V Y <vachanvy05 at gmail.com>
Date: Wed Aug 26 22:16:02 2026 +0530
Revert "[DAGCombine] add tests"
This reverts commit 0dfaba5979dc6be8c542c9b0d62692b05bd96a8c.
commit 035bced366cb5e7b4583c78fefdc881d4d8ac862
Author: Vachan V Y <vachanvy05 at gmail.com>
Date: Mon Aug 24 21:46:16 2026 +0530
[DAGCombine] run llc through merge conflict resolved files; fix tests
commit d8aae06f636381b09892481dea92d1da217a8b41
Merge: c42649171d48 2ed0f89b61bb
Author: Vachan <vachanvy05 at gmail.com>
Date: Tue Aug 25 00:54:38 2026 +0530
Merge branch 'main' into dagcombiner-anyextend-fold
commit c42649171d48be5b1923eaca0d9c4490940cad0c
Author: Vachan V Y <vachanvy05 at gmail.com>
Date: Mon Aug 24 21:49:37 2026 +0530
[DAGCombine] check diff + optimization
`visitANY_EXTEND` - fold `(aext (freeze (load x)))` -> `(aext (truncate (freeze (extload x))))`
commit 0dfaba5979dc6be8c542c9b0d62692b05bd96a8c
Author: Vachan V Y <vachanvy05 at gmail.com>
Date: Mon Aug 24 21:46:16 2026 +0530
[DAGCombine] add tests
`visitANY_EXTEND` - fold `(aext (freeze (load x)))` -> `(aext (truncate (freeze (extload x))))`
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 62 +-
llvm/test/CodeGen/X86/bit-manip-i512.ll | 28 +-
llvm/test/CodeGen/X86/iabs.ll | 4 +-
llvm/test/CodeGen/X86/icmp-abs-C.ll | 4 +-
.../test/CodeGen/X86/icmp-pow2-logic-npow2.ll | 4 +-
llvm/test/CodeGen/X86/midpoint-int.ll | 22 +-
llvm/test/CodeGen/X86/neg-abs.ll | 8 +-
llvm/test/CodeGen/X86/shift-i512.ll | 50 +-
llvm/test/CodeGen/X86/var-permute-128.ll | 36 +-
llvm/test/CodeGen/X86/vector-compress.ll | 964 ++++++++----------
.../Inputs/basic.ll.expected | 4 +-
11 files changed, 541 insertions(+), 645 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 28a8cb9409648..46c39f2669b4a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -16710,6 +16710,7 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) {
}
// fold (aext (load x)) -> (aext (truncate (extload x)))
+ // fold (aext (freeze (load x))) -> (aext (truncate (freeze (extload x))))
// None of the supported targets knows how to perform load and any_ext
// on vectors in one instruction, so attempt to fold to zext instead.
if (VT.isVector()) {
@@ -16718,33 +16719,42 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) {
tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0,
ISD::ZEXTLOAD, ISD::ZERO_EXTEND))
return foldedExt;
- } else if (ISD::isNON_EXTLoad(N0.getNode()) &&
- ISD::isUNINDEXEDLoad(N0.getNode())) {
- LoadSDNode *LN0 = cast<LoadSDNode>(N0);
- if (TLI.isLoadLegalOrCustom(VT, N0.getValueType(), LN0->getAlign(),
- LN0->getAddressSpace(), ISD::EXTLOAD, false)) {
- bool DoXform = true;
- SmallVector<SDNode *, 4> SetCCs;
- if (!N0.hasOneUse())
- DoXform =
- ExtendUsesToFormExtLoad(VT, N, N0, ISD::ANY_EXTEND, SetCCs, TLI);
- if (DoXform) {
- SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, DL, VT, LN0->getChain(),
- LN0->getBasePtr(), N0.getValueType(),
- LN0->getMemOperand());
- ExtendSetCCUses(SetCCs, N0, ExtLoad, ISD::ANY_EXTEND);
- // If the load value is used only by N, replace it via CombineTo N.
- bool NoReplaceTrunc = N0.hasOneUse();
- CombineTo(N, ExtLoad);
- if (NoReplaceTrunc) {
- DAG.ReplaceAllUsesOfValueWith(SDValue(LN0, 1), ExtLoad.getValue(1));
- recursivelyDeleteUnusedNodes(LN0);
- } else {
- SDValue Trunc =
- DAG.getNode(ISD::TRUNCATE, SDLoc(N0), N0.getValueType(), ExtLoad);
- CombineTo(LN0, Trunc, ExtLoad.getValue(1));
+ } else {
+ // TODO: Support multiple uses of the load when frozen.
+ bool Frozen = N0.getOpcode() == ISD::FREEZE && N0.getOperand(0).hasOneUse();
+ SDValue LoadOp = Frozen ? N0.getOperand(0) : N0;
+ EVT LoadVT = LoadOp.getValueType();
+ if (ISD::isNON_EXTLoad(LoadOp.getNode()) &&
+ ISD::isUNINDEXEDLoad(LoadOp.getNode())) {
+ LoadSDNode *LN0 = cast<LoadSDNode>(LoadOp);
+ if (TLI.isLoadLegalOrCustom(VT, LoadVT, LN0->getAlign(),
+ LN0->getAddressSpace(), ISD::EXTLOAD,
+ false)) {
+ bool DoXform = true;
+ SmallVector<SDNode *, 4> SetCCs;
+ // N0 is a Load and has multiple uses.
+ if (!Frozen && !N0.hasOneUse())
+ DoXform =
+ ExtendUsesToFormExtLoad(VT, N, N0, ISD::ANY_EXTEND, SetCCs, TLI);
+ if (DoXform) {
+ SDValue ExtLoad =
+ DAG.getExtLoad(ISD::EXTLOAD, DL, VT, LN0->getChain(),
+ LN0->getBasePtr(), LoadVT, LN0->getMemOperand());
+ SDValue Res = Frozen ? DAG.getFreeze(ExtLoad) : ExtLoad;
+ ExtendSetCCUses(SetCCs, N0, Res, ISD::ANY_EXTEND);
+ // If the load or freeze value is used only by N, replace it via
+ // CombineTo N.
+ bool NoReplaceTrunc = N0.hasOneUse();
+ CombineTo(N, Res);
+ if (NoReplaceTrunc) {
+ DAG.ReplaceAllUsesOfValueWith(SDValue(LN0, 1), ExtLoad.getValue(1));
+ recursivelyDeleteUnusedNodes(N0.getNode());
+ } else {
+ SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SDLoc(N0), LoadVT, Res);
+ CombineTo(LN0, Trunc, ExtLoad.getValue(1));
+ }
+ return SDValue(N, 0); // Return N so it doesn't get rechecked!
}
- return SDValue(N, 0); // Return N so it doesn't get rechecked!
}
}
}
diff --git a/llvm/test/CodeGen/X86/bit-manip-i512.ll b/llvm/test/CodeGen/X86/bit-manip-i512.ll
index 9e4d00650e613..fb1fd173a7d22 100644
--- a/llvm/test/CodeGen/X86/bit-manip-i512.ll
+++ b/llvm/test/CodeGen/X86/bit-manip-i512.ll
@@ -459,31 +459,31 @@ define i512 @bext_i512(i512 %a0, i512 %idx, i512 %len) nounwind {
; AVX512VBMI-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX512VBMI-NEXT: vmovdqu %ymm0, -{{[0-9]+}}(%rsp)
; AVX512VBMI-NEXT: vmovdqu %ymm0, -{{[0-9]+}}(%rsp)
-; AVX512VBMI-NEXT: movl %edi, %ecx
+; AVX512VBMI-NEXT: vpbroadcastq %rdi, %zmm1
+; AVX512VBMI-NEXT: # kill: def $edi killed $edi killed $rdi def $rdi
; AVX512VBMI-NEXT: shrl $3, %edi
; AVX512VBMI-NEXT: andl $56, %edi
-; AVX512VBMI-NEXT: vmovdqu64 -128(%rsp,%rdi), %zmm1
-; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm1[1,2,3,4,5,6,7],zmm0[0]
-; AVX512VBMI-NEXT: vpbroadcastq %rcx, %zmm3
-; AVX512VBMI-NEXT: vpshrdvq %zmm3, %zmm0, %zmm1
+; AVX512VBMI-NEXT: vmovdqu64 -128(%rsp,%rdi), %zmm3
+; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm3[1,2,3,4,5,6,7],zmm0[0]
+; AVX512VBMI-NEXT: vpshrdvq %zmm1, %zmm0, %zmm3
; AVX512VBMI-NEXT: vextracti128 $1, %ymm2, %xmm0
; AVX512VBMI-NEXT: vpextrq $1, %xmm0, %rdx
-; AVX512VBMI-NEXT: vextracti32x4 $3, %zmm1, %xmm3
-; AVX512VBMI-NEXT: vpextrq $1, %xmm3, %rcx
+; AVX512VBMI-NEXT: vextracti32x4 $3, %zmm3, %xmm1
+; AVX512VBMI-NEXT: vpextrq $1, %xmm1, %rcx
; AVX512VBMI-NEXT: vmovq %xmm2, %rsi
; AVX512VBMI-NEXT: andq %r11, %rcx
-; AVX512VBMI-NEXT: vmovq %xmm3, %rdi
-; AVX512VBMI-NEXT: vextracti32x4 $2, %zmm1, %xmm2
-; AVX512VBMI-NEXT: vpextrq $1, %xmm2, %r11
+; AVX512VBMI-NEXT: vmovq %xmm1, %rdi
+; AVX512VBMI-NEXT: vextracti32x4 $2, %zmm3, %xmm1
+; AVX512VBMI-NEXT: vpextrq $1, %xmm1, %r11
; AVX512VBMI-NEXT: andq %r10, %rdi
; AVX512VBMI-NEXT: andq %rbx, %r11
-; AVX512VBMI-NEXT: vmovq %xmm2, %r10
+; AVX512VBMI-NEXT: vmovq %xmm1, %r10
; AVX512VBMI-NEXT: andq %r9, %r10
-; AVX512VBMI-NEXT: vpextrq $1, %xmm1, %r9
+; AVX512VBMI-NEXT: vpextrq $1, %xmm3, %r9
; AVX512VBMI-NEXT: andq %r8, %r9
-; AVX512VBMI-NEXT: vmovq %xmm1, %r8
+; AVX512VBMI-NEXT: vmovq %xmm3, %r8
; AVX512VBMI-NEXT: andq %rsi, %r8
-; AVX512VBMI-NEXT: vextracti128 $1, %ymm1, %xmm1
+; AVX512VBMI-NEXT: vextracti128 $1, %ymm3, %xmm1
; AVX512VBMI-NEXT: vpextrq $1, %xmm1, %rsi
; AVX512VBMI-NEXT: vmovq %xmm0, %rbx
; AVX512VBMI-NEXT: andq %rdx, %rsi
diff --git a/llvm/test/CodeGen/X86/iabs.ll b/llvm/test/CodeGen/X86/iabs.ll
index 3c3171032451a..f18f49e342962 100644
--- a/llvm/test/CodeGen/X86/iabs.ll
+++ b/llvm/test/CodeGen/X86/iabs.ll
@@ -37,8 +37,8 @@ define i8 @test_i8(i8 %a) nounwind {
define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV-LABEL: test_i16:
; X86-NO-CMOV: # %bb.0:
-; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X86-NO-CMOV-NEXT: movl %eax, %ecx
+; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NO-CMOV-NEXT: movswl %ax, %ecx
; X86-NO-CMOV-NEXT: sarl $15, %ecx
; X86-NO-CMOV-NEXT: xorl %ecx, %eax
; X86-NO-CMOV-NEXT: subl %ecx, %eax
diff --git a/llvm/test/CodeGen/X86/icmp-abs-C.ll b/llvm/test/CodeGen/X86/icmp-abs-C.ll
index 4773a369326f7..5c88909de9eb6 100644
--- a/llvm/test/CodeGen/X86/icmp-abs-C.ll
+++ b/llvm/test/CodeGen/X86/icmp-abs-C.ll
@@ -161,8 +161,8 @@ define i16 @ne_and_with_dom_abs(i16 %x) nounwind {
; X86-LABEL: ne_and_with_dom_abs:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
-; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movswl %ax, %ecx
; X86-NEXT: sarl $15, %ecx
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
diff --git a/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll b/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
index b14fedeaae57d..0a85a395895dc 100644
--- a/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
+++ b/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
@@ -196,8 +196,8 @@ define i1 @abs_ne_pow2(i64 %0) nounwind {
define i1 @abs_ne_nonpow2(i16 %0) nounwind {
; X86-LABEL: abs_ne_nonpow2:
; X86: # %bb.0:
-; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movswl %ax, %ecx
; X86-NEXT: sarl $15, %ecx
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
diff --git a/llvm/test/CodeGen/X86/midpoint-int.ll b/llvm/test/CodeGen/X86/midpoint-int.ll
index 4de448a099b30..9d1141e1128ba 100644
--- a/llvm/test/CodeGen/X86/midpoint-int.ll
+++ b/llvm/test/CodeGen/X86/midpoint-int.ll
@@ -653,9 +653,9 @@ define i16 @scalar_i16_signed_reg_reg(i16 %a1, i16 %a2) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebx
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: xorl %ebx, %ebx
-; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl %ecx, %eax
; X86-NEXT: subw %dx, %ax
; X86-NEXT: setle %bl
; X86-NEXT: leal -1(%ebx,%ebx), %edx
@@ -761,9 +761,9 @@ define i16 @scalar_i16_signed_mem_reg(ptr %a1_addr, i16 %a2) nounwind {
; X86-NEXT: pushl %ebx
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzwl (%eax), %eax
+; X86-NEXT: movzwl (%eax), %ecx
; X86-NEXT: xorl %ebx, %ebx
-; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl %ecx, %eax
; X86-NEXT: subw %dx, %ax
; X86-NEXT: setle %bl
; X86-NEXT: leal -1(%ebx,%ebx), %edx
@@ -813,11 +813,11 @@ define i16 @scalar_i16_signed_reg_mem(i16 %a1, ptr %a2_addr) nounwind {
; X86-LABEL: scalar_i16_signed_reg_mem:
; X86: # %bb.0:
; X86-NEXT: pushl %ebx
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movzwl (%ecx), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl (%eax), %edx
; X86-NEXT: xorl %ebx, %ebx
-; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl %ecx, %eax
; X86-NEXT: subw %dx, %ax
; X86-NEXT: setle %bl
; X86-NEXT: leal -1(%ebx,%ebx), %edx
@@ -867,12 +867,12 @@ define i16 @scalar_i16_signed_mem_mem(ptr %a1_addr, ptr %a2_addr) nounwind {
; X86-LABEL: scalar_i16_signed_mem_mem:
; X86: # %bb.0:
; X86-NEXT: pushl %ebx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzwl (%eax), %eax
-; X86-NEXT: movzwl (%ecx), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl (%ecx), %ecx
+; X86-NEXT: movzwl (%eax), %edx
; X86-NEXT: xorl %ebx, %ebx
-; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl %ecx, %eax
; X86-NEXT: subw %dx, %ax
; X86-NEXT: setle %bl
; X86-NEXT: leal -1(%ebx,%ebx), %edx
diff --git a/llvm/test/CodeGen/X86/neg-abs.ll b/llvm/test/CodeGen/X86/neg-abs.ll
index 050610426e6bd..47c95e1c0943c 100644
--- a/llvm/test/CodeGen/X86/neg-abs.ll
+++ b/llvm/test/CodeGen/X86/neg-abs.ll
@@ -34,8 +34,8 @@ define i8 @neg_abs_i8(i8 %x) nounwind {
define i16 @neg_abs_i16(i16 %x) nounwind {
; X86-LABEL: neg_abs_i16:
; X86: # %bb.0:
-; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movswl %cx, %eax
; X86-NEXT: sarl $15, %eax
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %ecx, %eax
@@ -182,8 +182,8 @@ define i8 @sub_abs_i8(i8 %x, i8 %y) nounwind {
define i16 @sub_abs_i16(i16 %x, i16 %y) nounwind {
; X86-LABEL: sub_abs_i16:
; X86: # %bb.0:
-; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movswl %cx, %eax
; X86-NEXT: sarl $15, %eax
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %ecx, %eax
diff --git a/llvm/test/CodeGen/X86/shift-i512.ll b/llvm/test/CodeGen/X86/shift-i512.ll
index 4f1adab266822..c58b576bf05f8 100644
--- a/llvm/test/CodeGen/X86/shift-i512.ll
+++ b/llvm/test/CodeGen/X86/shift-i512.ll
@@ -220,17 +220,17 @@ define i512 @shl_i512(i512 %a0, i512 %a1) nounwind {
; AVX512VBMI-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX512VBMI-NEXT: vmovdqu %ymm0, -{{[0-9]+}}(%rsp)
; AVX512VBMI-NEXT: vmovdqu %ymm0, -{{[0-9]+}}(%rsp)
+; AVX512VBMI-NEXT: vpbroadcastq %rdi, %zmm1
; AVX512VBMI-NEXT: movl %edi, %ecx
-; AVX512VBMI-NEXT: shrl $3, %edi
-; AVX512VBMI-NEXT: andl $56, %edi
-; AVX512VBMI-NEXT: negl %edi
-; AVX512VBMI-NEXT: movslq %edi, %rdx
-; AVX512VBMI-NEXT: vmovdqu64 -64(%rsp,%rdx), %zmm1
-; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm0[7],zmm1[0,1,2,3,4,5,6]
-; AVX512VBMI-NEXT: vpbroadcastq %rcx, %zmm2
-; AVX512VBMI-NEXT: vpshldvq %zmm2, %zmm0, %zmm1
-; AVX512VBMI-NEXT: vextracti64x4 $1, %zmm1, 32(%rax)
-; AVX512VBMI-NEXT: vmovdqu %ymm1, (%rax)
+; AVX512VBMI-NEXT: shrl $3, %ecx
+; AVX512VBMI-NEXT: andl $56, %ecx
+; AVX512VBMI-NEXT: negl %ecx
+; AVX512VBMI-NEXT: movslq %ecx, %rcx
+; AVX512VBMI-NEXT: vmovdqu64 -64(%rsp,%rcx), %zmm2
+; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm0[7],zmm2[0,1,2,3,4,5,6]
+; AVX512VBMI-NEXT: vpshldvq %zmm1, %zmm0, %zmm2
+; AVX512VBMI-NEXT: vextracti64x4 $1, %zmm2, 32(%rax)
+; AVX512VBMI-NEXT: vmovdqu %ymm2, (%rax)
; AVX512VBMI-NEXT: popq %rcx
; AVX512VBMI-NEXT: vzeroupper
; AVX512VBMI-NEXT: retq
@@ -434,15 +434,15 @@ define i512 @lshr_i512(i512 %a0, i512 %a1) nounwind {
; AVX512VBMI-NEXT: vmovdqu %ymm0, -{{[0-9]+}}(%rsp)
; AVX512VBMI-NEXT: vmovdqu %ymm0, -{{[0-9]+}}(%rsp)
; AVX512VBMI-NEXT: movl {{[0-9]+}}(%rsp), %ecx
-; AVX512VBMI-NEXT: movl %ecx, %edx
+; AVX512VBMI-NEXT: vpbroadcastq %rcx, %zmm1
+; AVX512VBMI-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX512VBMI-NEXT: shrl $3, %ecx
; AVX512VBMI-NEXT: andl $56, %ecx
-; AVX512VBMI-NEXT: vmovdqu64 -128(%rsp,%rcx), %zmm1
-; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm1[1,2,3,4,5,6,7],zmm0[0]
-; AVX512VBMI-NEXT: vpbroadcastq %rdx, %zmm2
-; AVX512VBMI-NEXT: vpshrdvq %zmm2, %zmm0, %zmm1
-; AVX512VBMI-NEXT: vextracti64x4 $1, %zmm1, 32(%rax)
-; AVX512VBMI-NEXT: vmovdqu %ymm1, (%rax)
+; AVX512VBMI-NEXT: vmovdqu64 -128(%rsp,%rcx), %zmm2
+; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm2[1,2,3,4,5,6,7],zmm0[0]
+; AVX512VBMI-NEXT: vpshrdvq %zmm1, %zmm0, %zmm2
+; AVX512VBMI-NEXT: vextracti64x4 $1, %zmm2, 32(%rax)
+; AVX512VBMI-NEXT: vmovdqu %ymm2, (%rax)
; AVX512VBMI-NEXT: popq %rcx
; AVX512VBMI-NEXT: vzeroupper
; AVX512VBMI-NEXT: retq
@@ -676,16 +676,16 @@ define i512 @ashr_i512(i512 %a0, i512 %a1) nounwind {
; AVX512VBMI-NEXT: movq %r10, -{{[0-9]+}}(%rsp)
; AVX512VBMI-NEXT: movq %r10, -{{[0-9]+}}(%rsp)
; AVX512VBMI-NEXT: movq %r10, -{{[0-9]+}}(%rsp)
-; AVX512VBMI-NEXT: movl %edi, %ecx
+; AVX512VBMI-NEXT: vpbroadcastq %rdi, %zmm0
+; AVX512VBMI-NEXT: # kill: def $edi killed $edi killed $rdi def $rdi
; AVX512VBMI-NEXT: shrl $3, %edi
; AVX512VBMI-NEXT: andl $56, %edi
-; AVX512VBMI-NEXT: vpsraq $63, -72(%rsp,%rdi){1to2}, %xmm0
-; AVX512VBMI-NEXT: vmovdqu64 -128(%rsp,%rdi), %zmm1
-; AVX512VBMI-NEXT: valignq {{.*#+}} zmm0 = zmm1[1,2,3,4,5,6,7],zmm0[0]
-; AVX512VBMI-NEXT: vpbroadcastq %rcx, %zmm2
-; AVX512VBMI-NEXT: vpshrdvq %zmm2, %zmm0, %zmm1
-; AVX512VBMI-NEXT: vextracti64x4 $1, %zmm1, 32(%rax)
-; AVX512VBMI-NEXT: vmovdqu %ymm1, (%rax)
+; AVX512VBMI-NEXT: vpsraq $63, -72(%rsp,%rdi){1to2}, %xmm1
+; AVX512VBMI-NEXT: vmovdqu64 -128(%rsp,%rdi), %zmm2
+; AVX512VBMI-NEXT: valignq {{.*#+}} zmm1 = zmm2[1,2,3,4,5,6,7],zmm1[0]
+; AVX512VBMI-NEXT: vpshrdvq %zmm0, %zmm1, %zmm2
+; AVX512VBMI-NEXT: vextracti64x4 $1, %zmm2, 32(%rax)
+; AVX512VBMI-NEXT: vmovdqu %ymm2, (%rax)
; AVX512VBMI-NEXT: popq %rcx
; AVX512VBMI-NEXT: vzeroupper
; AVX512VBMI-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/var-permute-128.ll b/llvm/test/CodeGen/X86/var-permute-128.ll
index dbfad9562d65a..d1dc25989b3f5 100644
--- a/llvm/test/CodeGen/X86/var-permute-128.ll
+++ b/llvm/test/CodeGen/X86/var-permute-128.ll
@@ -501,39 +501,39 @@ define <8 x i16> @var_shuffle_zero_v8i16(<8 x i16> %v, <8 x i16> %indices) nounw
; SSE3-NEXT: pextrw $0, %xmm1, %eax
; SSE3-NEXT: pextrw $1, %xmm1, %ecx
; SSE3-NEXT: pextrw $2, %xmm1, %edx
-; SSE3-NEXT: pextrw $3, %xmm1, %edi
-; SSE3-NEXT: pextrw $4, %xmm1, %r8d
-; SSE3-NEXT: pextrw $5, %xmm1, %r9d
-; SSE3-NEXT: pextrw $6, %xmm1, %r10d
-; SSE3-NEXT: pextrw $7, %xmm1, %esi
+; SSE3-NEXT: pextrw $3, %xmm1, %esi
+; SSE3-NEXT: pextrw $4, %xmm1, %edi
+; SSE3-NEXT: pextrw $5, %xmm1, %r8d
+; SSE3-NEXT: pextrw $6, %xmm1, %r9d
+; SSE3-NEXT: pextrw $7, %xmm1, %r10d
; SSE3-NEXT: movdqa %xmm2, -24(%rsp)
; SSE3-NEXT: andl $7, %eax
-; SSE3-NEXT: movzwl -24(%rsp,%rax,2), %eax
; SSE3-NEXT: andl $7, %ecx
-; SSE3-NEXT: movzwl -24(%rsp,%rcx,2), %ecx
; SSE3-NEXT: andl $7, %edx
-; SSE3-NEXT: movzwl -24(%rsp,%rdx,2), %edx
+; SSE3-NEXT: andl $7, %esi
; SSE3-NEXT: andl $7, %edi
-; SSE3-NEXT: movzwl -24(%rsp,%rdi,2), %edi
; SSE3-NEXT: andl $7, %r8d
-; SSE3-NEXT: movzwl -24(%rsp,%r8,2), %r8d
; SSE3-NEXT: andl $7, %r9d
-; SSE3-NEXT: movzwl -24(%rsp,%r9,2), %r9d
; SSE3-NEXT: andl $7, %r10d
; SSE3-NEXT: movzwl -24(%rsp,%r10,2), %r10d
-; SSE3-NEXT: andl $7, %esi
-; SSE3-NEXT: movzwl -24(%rsp,%rsi,2), %esi
-; SSE3-NEXT: movd %esi, %xmm1
-; SSE3-NEXT: movd %r10d, %xmm2
+; SSE3-NEXT: movd %r10d, %xmm1
+; SSE3-NEXT: movzwl -24(%rsp,%r9,2), %r9d
+; SSE3-NEXT: movd %r9d, %xmm2
; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
-; SSE3-NEXT: movd %r9d, %xmm1
-; SSE3-NEXT: movd %r8d, %xmm3
+; SSE3-NEXT: movzwl -24(%rsp,%r8,2), %r8d
+; SSE3-NEXT: movd %r8d, %xmm1
+; SSE3-NEXT: movzwl -24(%rsp,%rdi,2), %edi
+; SSE3-NEXT: movd %edi, %xmm3
; SSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
; SSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; SSE3-NEXT: movd %edi, %xmm1
+; SSE3-NEXT: movzwl -24(%rsp,%rsi,2), %esi
+; SSE3-NEXT: movd %esi, %xmm1
+; SSE3-NEXT: movzwl -24(%rsp,%rdx,2), %edx
; SSE3-NEXT: movd %edx, %xmm2
; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
+; SSE3-NEXT: movzwl -24(%rsp,%rcx,2), %ecx
; SSE3-NEXT: movd %ecx, %xmm1
+; SSE3-NEXT: movzwl -24(%rsp,%rax,2), %eax
; SSE3-NEXT: movd %eax, %xmm4
; SSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
; SSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
diff --git a/llvm/test/CodeGen/X86/vector-compress.ll b/llvm/test/CodeGen/X86/vector-compress.ll
index 39ef06af99340..90e3a81385112 100644
--- a/llvm/test/CodeGen/X86/vector-compress.ll
+++ b/llvm/test/CodeGen/X86/vector-compress.ll
@@ -2068,74 +2068,74 @@ define <64 x i8> @test_compress_v64i8(<64 x i8> %vec, <64 x i1> %mask, <64 x i8>
; AVX2-NEXT: pushq %rbx
; AVX2-NEXT: andq $-32, %rsp
; AVX2-NEXT: subq $96, %rsp
-; AVX2-NEXT: movzbl 360(%rbp), %eax
-; AVX2-NEXT: movzbl 352(%rbp), %r10d
+; AVX2-NEXT: movl 360(%rbp), %eax
+; AVX2-NEXT: movl 352(%rbp), %r10d
; AVX2-NEXT: vmovd %r10d, %xmm4
; AVX2-NEXT: vpinsrb $1, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 368(%rbp), %eax
+; AVX2-NEXT: movl 368(%rbp), %eax
; AVX2-NEXT: vpinsrb $2, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 376(%rbp), %eax
+; AVX2-NEXT: movl 376(%rbp), %eax
; AVX2-NEXT: vpinsrb $3, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 384(%rbp), %eax
+; AVX2-NEXT: movl 384(%rbp), %eax
; AVX2-NEXT: vpinsrb $4, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 392(%rbp), %eax
+; AVX2-NEXT: movl 392(%rbp), %eax
; AVX2-NEXT: vpinsrb $5, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 400(%rbp), %eax
+; AVX2-NEXT: movl 400(%rbp), %eax
; AVX2-NEXT: vpinsrb $6, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 408(%rbp), %eax
+; AVX2-NEXT: movl 408(%rbp), %eax
; AVX2-NEXT: vpinsrb $7, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 416(%rbp), %eax
+; AVX2-NEXT: movl 416(%rbp), %eax
; AVX2-NEXT: vpinsrb $8, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 424(%rbp), %eax
+; AVX2-NEXT: movl 424(%rbp), %eax
; AVX2-NEXT: vpinsrb $9, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 432(%rbp), %eax
+; AVX2-NEXT: movl 432(%rbp), %eax
; AVX2-NEXT: vpinsrb $10, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 440(%rbp), %eax
+; AVX2-NEXT: movl 440(%rbp), %eax
; AVX2-NEXT: vpinsrb $11, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 448(%rbp), %eax
+; AVX2-NEXT: movl 448(%rbp), %eax
; AVX2-NEXT: vpinsrb $12, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 456(%rbp), %eax
+; AVX2-NEXT: movl 456(%rbp), %eax
; AVX2-NEXT: vpinsrb $13, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 464(%rbp), %eax
+; AVX2-NEXT: movl 464(%rbp), %eax
; AVX2-NEXT: vpinsrb $14, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 472(%rbp), %eax
+; AVX2-NEXT: movl 472(%rbp), %eax
; AVX2-NEXT: vpinsrb $15, %eax, %xmm4, %xmm4
-; AVX2-NEXT: movzbl 224(%rbp), %eax
+; AVX2-NEXT: movl 224(%rbp), %eax
; AVX2-NEXT: vmovd %eax, %xmm5
-; AVX2-NEXT: movzbl 232(%rbp), %eax
+; AVX2-NEXT: movl 232(%rbp), %eax
; AVX2-NEXT: vpinsrb $1, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 240(%rbp), %eax
+; AVX2-NEXT: movl 240(%rbp), %eax
; AVX2-NEXT: vpinsrb $2, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 248(%rbp), %eax
+; AVX2-NEXT: movl 248(%rbp), %eax
; AVX2-NEXT: vpinsrb $3, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 256(%rbp), %eax
+; AVX2-NEXT: movl 256(%rbp), %eax
; AVX2-NEXT: vpinsrb $4, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 264(%rbp), %eax
+; AVX2-NEXT: movl 264(%rbp), %eax
; AVX2-NEXT: vpinsrb $5, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 272(%rbp), %eax
+; AVX2-NEXT: movl 272(%rbp), %eax
; AVX2-NEXT: vpinsrb $6, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 280(%rbp), %eax
+; AVX2-NEXT: movl 280(%rbp), %eax
; AVX2-NEXT: vpinsrb $7, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 288(%rbp), %eax
+; AVX2-NEXT: movl 288(%rbp), %eax
; AVX2-NEXT: vpinsrb $8, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 296(%rbp), %eax
+; AVX2-NEXT: movl 296(%rbp), %eax
; AVX2-NEXT: vpinsrb $9, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 304(%rbp), %eax
+; AVX2-NEXT: movl 304(%rbp), %eax
; AVX2-NEXT: vpinsrb $10, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 312(%rbp), %eax
+; AVX2-NEXT: movl 312(%rbp), %eax
; AVX2-NEXT: vpinsrb $11, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 320(%rbp), %eax
+; AVX2-NEXT: movl 320(%rbp), %eax
; AVX2-NEXT: vpinsrb $12, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 328(%rbp), %eax
+; AVX2-NEXT: movl 328(%rbp), %eax
; AVX2-NEXT: vpinsrb $13, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 336(%rbp), %eax
+; AVX2-NEXT: movl 336(%rbp), %eax
; AVX2-NEXT: vpinsrb $14, %eax, %xmm5, %xmm5
-; AVX2-NEXT: movzbl 344(%rbp), %eax
+; AVX2-NEXT: movl 344(%rbp), %eax
; AVX2-NEXT: vpinsrb $15, %eax, %xmm5, %xmm5
; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
; AVX2-NEXT: # kill: def $edx killed $edx def $rdx
; AVX2-NEXT: # kill: def $esi killed $esi def $rsi
-; AVX2-NEXT: # kill: def $edi killed $edi def $rdi
+; AVX2-NEXT: movl %edi, %r14d
; AVX2-NEXT: # kill: def $r9d killed $r9d def $r9
; AVX2-NEXT: # kill: def $r8d killed $r8d def $r8
; AVX2-NEXT: vmovd %edi, %xmm6
@@ -2144,58 +2144,58 @@ define <64 x i8> @test_compress_v64i8(<64 x i8> %vec, <64 x i1> %mask, <64 x i8>
; AVX2-NEXT: vpinsrb $3, %ecx, %xmm6, %xmm6
; AVX2-NEXT: vpinsrb $4, %r8d, %xmm6, %xmm6
; AVX2-NEXT: vpinsrb $5, %r9d, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 16(%rbp), %r10d
-; AVX2-NEXT: vpinsrb $6, %r10d, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 24(%rbp), %r11d
-; AVX2-NEXT: vpinsrb $7, %r11d, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 32(%rbp), %ebx
-; AVX2-NEXT: vpinsrb $8, %ebx, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 40(%rbp), %r14d
-; AVX2-NEXT: vpinsrb $9, %r14d, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 48(%rbp), %r15d
+; AVX2-NEXT: movl 16(%rbp), %edi
+; AVX2-NEXT: vpinsrb $6, %edi, %xmm6, %xmm6
+; AVX2-NEXT: movl 24(%rbp), %r10d
+; AVX2-NEXT: vpinsrb $7, %r10d, %xmm6, %xmm6
+; AVX2-NEXT: movl 32(%rbp), %r11d
+; AVX2-NEXT: vpinsrb $8, %r11d, %xmm6, %xmm6
+; AVX2-NEXT: movl 40(%rbp), %ebx
+; AVX2-NEXT: vpinsrb $9, %ebx, %xmm6, %xmm6
+; AVX2-NEXT: movl 48(%rbp), %r15d
; AVX2-NEXT: vpinsrb $10, %r15d, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 56(%rbp), %r12d
+; AVX2-NEXT: movl 56(%rbp), %r12d
; AVX2-NEXT: vpinsrb $11, %r12d, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 64(%rbp), %eax
+; AVX2-NEXT: movl 64(%rbp), %eax
; AVX2-NEXT: vpinsrb $12, %eax, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 72(%rbp), %eax
+; AVX2-NEXT: movl 72(%rbp), %eax
; AVX2-NEXT: vpinsrb $13, %eax, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 80(%rbp), %eax
+; AVX2-NEXT: movl 80(%rbp), %eax
; AVX2-NEXT: vpinsrb $14, %eax, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 88(%rbp), %eax
+; AVX2-NEXT: movl 88(%rbp), %eax
; AVX2-NEXT: vpinsrb $15, %eax, %xmm6, %xmm6
-; AVX2-NEXT: movzbl 96(%rbp), %eax
+; AVX2-NEXT: movl 96(%rbp), %eax
; AVX2-NEXT: vmovd %eax, %xmm7
-; AVX2-NEXT: movzbl 104(%rbp), %eax
+; AVX2-NEXT: movl 104(%rbp), %eax
; AVX2-NEXT: vpinsrb $1, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 112(%rbp), %eax
+; AVX2-NEXT: movl 112(%rbp), %eax
; AVX2-NEXT: vpinsrb $2, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 120(%rbp), %eax
+; AVX2-NEXT: movl 120(%rbp), %eax
; AVX2-NEXT: vpinsrb $3, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 128(%rbp), %eax
+; AVX2-NEXT: movl 128(%rbp), %eax
; AVX2-NEXT: vpinsrb $4, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 136(%rbp), %eax
+; AVX2-NEXT: movl 136(%rbp), %eax
; AVX2-NEXT: vpinsrb $5, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 144(%rbp), %eax
+; AVX2-NEXT: movl 144(%rbp), %eax
; AVX2-NEXT: vpinsrb $6, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 152(%rbp), %eax
+; AVX2-NEXT: movl 152(%rbp), %eax
; AVX2-NEXT: vpinsrb $7, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 160(%rbp), %eax
+; AVX2-NEXT: movl 160(%rbp), %eax
; AVX2-NEXT: vpinsrb $8, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 168(%rbp), %eax
+; AVX2-NEXT: movl 168(%rbp), %eax
; AVX2-NEXT: vpinsrb $9, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 176(%rbp), %eax
+; AVX2-NEXT: movl 176(%rbp), %eax
; AVX2-NEXT: vpinsrb $10, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 184(%rbp), %eax
+; AVX2-NEXT: movl 184(%rbp), %eax
; AVX2-NEXT: vpinsrb $11, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 192(%rbp), %eax
+; AVX2-NEXT: movl 192(%rbp), %eax
; AVX2-NEXT: vpinsrb $12, %eax, %xmm7, %xmm7
-; AVX2-NEXT: movzbl 200(%rbp), %eax
+; AVX2-NEXT: movl 200(%rbp), %eax
; AVX2-NEXT: vpinsrb $13, %eax, %xmm7, %xmm7
; AVX2-NEXT: vinserti128 $1, %xmm4, %ymm5, %ymm4
-; AVX2-NEXT: movzbl 208(%rbp), %eax
+; AVX2-NEXT: movl 208(%rbp), %eax
; AVX2-NEXT: vpinsrb $14, %eax, %xmm7, %xmm5
-; AVX2-NEXT: movzbl 216(%rbp), %eax
+; AVX2-NEXT: movl 216(%rbp), %eax
; AVX2-NEXT: vpinsrb $15, %eax, %xmm5, %xmm5
; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm6, %ymm5
; AVX2-NEXT: vmovaps %ymm3, {{[0-9]+}}(%rsp)
@@ -2219,10 +2219,10 @@ define <64 x i8> @test_compress_v64i8(<64 x i8> %vec, <64 x i1> %mask, <64 x i8>
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: movzbl (%rsp,%rax), %r13d
; AVX2-NEXT: vpextrb $0, %xmm0, (%rsp)
-; AVX2-NEXT: andl $1, %edi
-; AVX2-NEXT: vpextrb $1, %xmm0, (%rsp,%rdi)
+; AVX2-NEXT: andl $1, %r14d
+; AVX2-NEXT: vpextrb $1, %xmm0, (%rsp,%r14)
; AVX2-NEXT: andl $1, %esi
-; AVX2-NEXT: addq %rdi, %rsi
+; AVX2-NEXT: addq %r14, %rsi
; AVX2-NEXT: vpextrb $2, %xmm0, (%rsp,%rsi)
; AVX2-NEXT: andl $1, %edx
; AVX2-NEXT: addq %rsi, %rdx
@@ -2236,415 +2236,359 @@ define <64 x i8> @test_compress_v64i8(<64 x i8> %vec, <64 x i1> %mask, <64 x i8>
; AVX2-NEXT: vpextrb $5, %xmm0, (%rsp,%rax)
; AVX2-NEXT: andl $1, %r9d
; AVX2-NEXT: addq %r8, %r9
-; AVX2-NEXT: movzbl %r10b, %eax
-; AVX2-NEXT: andl $1, %eax
-; AVX2-NEXT: addq %r9, %rax
-; AVX2-NEXT: # kill: def $r9d killed $r9d killed $r9 def $r9
-; AVX2-NEXT: andl $63, %r9d
-; AVX2-NEXT: vpextrb $6, %xmm0, (%rsp,%r9)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $7, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl %r11b, %ecx
-; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl %bl, %eax
-; AVX2-NEXT: andl $1, %eax
-; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $8, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $9, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl %r14b, %ecx
-; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl %r15b, %eax
-; AVX2-NEXT: andl $1, %eax
-; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $10, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $11, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl %r12b, %ecx
-; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 64(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %r9d, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $6, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: andl $1, %edi
+; AVX2-NEXT: addq %r9, %rdi
+; AVX2-NEXT: andl $1, %r10d
+; AVX2-NEXT: addq %rdi, %r10
+; AVX2-NEXT: # kill: def $edi killed $edi killed $rdi def $rdi
+; AVX2-NEXT: andl $63, %edi
+; AVX2-NEXT: vpextrb $7, %xmm0, (%rsp,%rdi)
+; AVX2-NEXT: movl %r10d, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $8, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: andl $1, %r11d
+; AVX2-NEXT: addq %r10, %r11
+; AVX2-NEXT: andl $1, %ebx
+; AVX2-NEXT: addq %r11, %rbx
+; AVX2-NEXT: # kill: def $r11d killed $r11d killed $r11 def $r11
+; AVX2-NEXT: andl $63, %r11d
+; AVX2-NEXT: vpextrb $9, %xmm0, (%rsp,%r11)
+; AVX2-NEXT: movl %ebx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $10, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: andl $1, %r15d
+; AVX2-NEXT: addq %rbx, %r15
+; AVX2-NEXT: andl $1, %r12d
+; AVX2-NEXT: addq %r15, %r12
+; AVX2-NEXT: # kill: def $r15d killed $r15d killed $r15 def $r15
+; AVX2-NEXT: andl $63, %r15d
+; AVX2-NEXT: vpextrb $11, %xmm0, (%rsp,%r15)
+; AVX2-NEXT: movl %r12d, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $12, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 64(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
-; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $12, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $13, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 72(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: addq %r12, %rax
+; AVX2-NEXT: movl 72(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 80(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $13, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $14, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 80(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $14, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 88(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
-; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addq %rax, %rcx
+; AVX2-NEXT: movl 88(%rbp), %edx
+; AVX2-NEXT: andl $1, %edx
+; AVX2-NEXT: addq %rax, %rdx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vpextrb $15, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: movl 96(%rbp), %ecx
+; AVX2-NEXT: andl $1, %ecx
+; AVX2-NEXT: addq %rdx, %rcx
+; AVX2-NEXT: movl %edx, %eax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
; AVX2-NEXT: vpextrb $0, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 96(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $1, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 104(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 104(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 112(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $1, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $2, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $2, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 112(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $3, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 120(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 120(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 128(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $3, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $4, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $4, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 128(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $5, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 136(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 136(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 144(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $5, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $6, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $6, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 144(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $7, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 152(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 152(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 160(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $7, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $8, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $8, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 160(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $9, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 168(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 168(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 176(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $9, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $10, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $10, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 176(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $11, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 184(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 184(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 192(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $11, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $12, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $12, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 192(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $13, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 200(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 200(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 208(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $13, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $14, %xmm0, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $14, %xmm0, (%rsp,%rax)
-; AVX2-NEXT: movzbl 208(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $15, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 216(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 216(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 224(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $15, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $0, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $0, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 224(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $1, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 232(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 232(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 240(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $1, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $2, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $2, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 240(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $3, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 248(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 248(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 256(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $3, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $4, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $4, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 256(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $5, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 264(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 264(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 272(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $5, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $6, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $6, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 272(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $7, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 280(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 280(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 288(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $7, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $8, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $8, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 288(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $9, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 296(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 296(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 304(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $9, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $10, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $10, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 304(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $11, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 312(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 312(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 320(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $11, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $12, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $12, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 320(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $13, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 328(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 328(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 336(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $13, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: vpextrb $14, %xmm1, (%rsp,%rax)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $14, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 336(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $15, %xmm1, (%rsp,%rax)
+; AVX2-NEXT: movl 344(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: movzbl 344(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 352(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vpextrb $15, %xmm1, (%rsp,%rax)
-; AVX2-NEXT: movzbl 352(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
-; AVX2-NEXT: andl $1, %eax
-; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm0
-; AVX2-NEXT: vpextrb $0, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $1, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 360(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
-; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 368(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: vpextrb $0, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $1, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 360(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $2, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $3, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 376(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 368(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 384(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $2, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $3, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 376(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $4, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $5, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 392(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 384(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 400(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $4, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $5, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 392(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $6, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $7, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 408(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 400(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 416(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $6, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $7, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 408(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $8, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $9, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 424(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 416(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 432(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $8, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $9, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 424(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $10, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $11, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 440(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 432(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 448(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $10, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $11, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 440(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $12, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $13, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 456(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 448(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addq %rax, %rcx
-; AVX2-NEXT: movzbl 464(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $12, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $13, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 456(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addq %rcx, %rax
-; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $14, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vpextrb $15, %xmm0, (%rsp,%rcx)
-; AVX2-NEXT: movzbl 472(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 464(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: vpextrb $15, %xmm0, %edx
; AVX2-NEXT: addq %rax, %rcx
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $14, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: movq %rcx, %rdx
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vpextrb $15, %xmm0, (%rsp,%rax)
+; AVX2-NEXT: movl 472(%rbp), %ecx
+; AVX2-NEXT: andl $1, %ecx
+; AVX2-NEXT: vpextrb $15, %xmm0, %eax
+; AVX2-NEXT: addq %rdx, %rcx
; AVX2-NEXT: cmpq $64, %rcx
-; AVX2-NEXT: cmovbl %r13d, %edx
+; AVX2-NEXT: cmovbl %r13d, %eax
; AVX2-NEXT: cmpq $63, %rcx
-; AVX2-NEXT: movl $63, %eax
-; AVX2-NEXT: cmovbq %rcx, %rax
-; AVX2-NEXT: movb %dl, (%rsp,%rax)
+; AVX2-NEXT: movq %rcx, %rdx
+; AVX2-NEXT: movl $63, %ecx
+; AVX2-NEXT: cmovbq %rdx, %rcx
+; AVX2-NEXT: movb %al, (%rsp,%rcx)
; AVX2-NEXT: vmovaps (%rsp), %ymm0
; AVX2-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm1
; AVX2-NEXT: leaq -40(%rbp), %rsp
@@ -3975,413 +3919,355 @@ define <64 x i32> @test_compress_large(<64 x i1> %mask, <64 x i32> %vec, <64 x i
; AVX2-NEXT: andl $1, %r9d
; AVX2-NEXT: addl %r8d, %r9d
; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%r9,4)
-; AVX2-NEXT: movzbl 16(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 16(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %r9d, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 24(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 24(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 32(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 32(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: movzbl 40(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 40(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vmovss %xmm1, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 48(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm1, (%rsp,%rax,4)
+; AVX2-NEXT: movl 48(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm1, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 56(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 56(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm1, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 64(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm1, (%rsp,%rax,4)
+; AVX2-NEXT: movl 64(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm1, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 72(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 72(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm0
; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 80(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rax,4)
+; AVX2-NEXT: movl 80(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 88(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 88(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movl %ecx, %eax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 96(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 96(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: movzbl 104(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
+; AVX2-NEXT: andl $63, %ecx
+; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rcx,4)
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: andl $63, %ecx
+; AVX2-NEXT: vmovss %xmm2, (%rsp,%rcx,4)
+; AVX2-NEXT: movl 104(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vmovss %xmm2, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 112(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 112(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextractps $1, %xmm2, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 120(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 120(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm2, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 128(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm2, (%rsp,%rax,4)
+; AVX2-NEXT: movl 128(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm2, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 136(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: vextractf128 $1, %ymm2, %xmm0
+; AVX2-NEXT: vmovss %xmm0, (%rsp,%rcx,4)
+; AVX2-NEXT: movl 136(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vextractf128 $1, %ymm2, %xmm0
-; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 144(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 144(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 152(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 152(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 160(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 160(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: movzbl 168(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 168(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vmovss %xmm3, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 176(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm3, (%rsp,%rax,4)
+; AVX2-NEXT: movl 176(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm3, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 184(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 184(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm3, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 192(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm3, (%rsp,%rax,4)
+; AVX2-NEXT: movl 192(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm3, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 200(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 200(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractf128 $1, %ymm3, %xmm0
; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 208(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rax,4)
+; AVX2-NEXT: movl 208(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 216(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 216(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movl %ecx, %eax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 224(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 224(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: movzbl 232(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
+; AVX2-NEXT: andl $63, %ecx
+; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rcx,4)
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: andl $63, %ecx
+; AVX2-NEXT: vmovss %xmm4, (%rsp,%rcx,4)
+; AVX2-NEXT: movl 232(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vmovss %xmm4, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 240(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 240(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextractps $1, %xmm4, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 248(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 248(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm4, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 256(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm4, (%rsp,%rax,4)
+; AVX2-NEXT: movl 256(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm4, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 264(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: vextractf128 $1, %ymm4, %xmm0
+; AVX2-NEXT: vmovss %xmm0, (%rsp,%rcx,4)
+; AVX2-NEXT: movl 264(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vextractf128 $1, %ymm4, %xmm0
-; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 272(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 272(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 280(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 280(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 288(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 288(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: movzbl 296(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 296(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vmovss %xmm5, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 304(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm5, (%rsp,%rax,4)
+; AVX2-NEXT: movl 304(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm5, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 312(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 312(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm5, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 320(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm5, (%rsp,%rax,4)
+; AVX2-NEXT: movl 320(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm5, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 328(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 328(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractf128 $1, %ymm5, %xmm0
; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 336(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rax,4)
+; AVX2-NEXT: movl 336(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 344(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 344(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movl %ecx, %eax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 352(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 352(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: movzbl 360(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
+; AVX2-NEXT: andl $63, %ecx
+; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rcx,4)
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: andl $63, %ecx
+; AVX2-NEXT: vmovss %xmm6, (%rsp,%rcx,4)
+; AVX2-NEXT: movl 360(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vmovss %xmm6, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 368(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 368(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextractps $1, %xmm6, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 376(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 376(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm6, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 384(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm6, (%rsp,%rax,4)
+; AVX2-NEXT: movl 384(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm6, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 392(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: vextractf128 $1, %ymm6, %xmm0
+; AVX2-NEXT: vmovss %xmm0, (%rsp,%rcx,4)
+; AVX2-NEXT: movl 392(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
-; AVX2-NEXT: andl $63, %eax
-; AVX2-NEXT: vextractf128 $1, %ymm6, %xmm0
-; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movzbl 400(%rbp), %eax
-; AVX2-NEXT: movzbl %al, %eax
+; AVX2-NEXT: movl 400(%rbp), %eax
; AVX2-NEXT: andl $1, %eax
; AVX2-NEXT: addl %ecx, %eax
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; AVX2-NEXT: # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT: andl $63, %ecx
; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 408(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 408(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %eax, %ecx
-; AVX2-NEXT: # kill: def $eax killed $eax def $rax
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rax,4)
; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractps $3, %xmm0, (%rsp,%rax,4)
-; AVX2-NEXT: movq %rdi, %rax
-; AVX2-NEXT: movzbl 416(%rbp), %edx
-; AVX2-NEXT: movzbl %dl, %edx
-; AVX2-NEXT: andl $1, %edx
-; AVX2-NEXT: addl %ecx, %edx
-; AVX2-NEXT: movzbl 424(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 416(%rbp), %eax
+; AVX2-NEXT: andl $1, %eax
+; AVX2-NEXT: addl %ecx, %eax
+; AVX2-NEXT: movl 424(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addl %edx, %ecx
-; AVX2-NEXT: # kill: def $edx killed $edx def $rdx
-; AVX2-NEXT: andl $63, %edx
-; AVX2-NEXT: vmovss %xmm7, (%rsp,%rdx,4)
-; AVX2-NEXT: movzbl 432(%rbp), %edx
-; AVX2-NEXT: movzbl %dl, %edx
-; AVX2-NEXT: andl $1, %edx
-; AVX2-NEXT: addl %ecx, %edx
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm7, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 440(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: addl %eax, %ecx
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vmovss %xmm7, (%rsp,%rax,4)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm7, (%rsp,%rax,4)
+; AVX2-NEXT: movl 432(%rbp), %eax
+; AVX2-NEXT: andl $1, %eax
+; AVX2-NEXT: addl %ecx, %eax
+; AVX2-NEXT: movl 440(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addl %edx, %ecx
-; AVX2-NEXT: # kill: def $edx killed $edx def $rdx
-; AVX2-NEXT: andl $63, %edx
-; AVX2-NEXT: vextractps $2, %xmm7, (%rsp,%rdx,4)
-; AVX2-NEXT: movzbl 448(%rbp), %edx
-; AVX2-NEXT: movzbl %dl, %edx
-; AVX2-NEXT: andl $1, %edx
-; AVX2-NEXT: addl %ecx, %edx
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $3, %xmm7, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 456(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: addl %eax, %ecx
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $2, %xmm7, (%rsp,%rax,4)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $3, %xmm7, (%rsp,%rax,4)
+; AVX2-NEXT: movl 448(%rbp), %eax
+; AVX2-NEXT: andl $1, %eax
+; AVX2-NEXT: addl %ecx, %eax
+; AVX2-NEXT: movl 456(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
-; AVX2-NEXT: addl %edx, %ecx
-; AVX2-NEXT: # kill: def $edx killed $edx def $rdx
-; AVX2-NEXT: andl $63, %edx
+; AVX2-NEXT: addl %eax, %ecx
+; AVX2-NEXT: # kill: def $eax killed $eax killed $rax def $rax
+; AVX2-NEXT: andl $63, %eax
; AVX2-NEXT: vextractf128 $1, %ymm7, %xmm0
-; AVX2-NEXT: vmovss %xmm0, (%rsp,%rdx,4)
-; AVX2-NEXT: movzbl 464(%rbp), %edx
-; AVX2-NEXT: movzbl %dl, %edx
+; AVX2-NEXT: vmovss %xmm0, (%rsp,%rax,4)
+; AVX2-NEXT: movl %ecx, %eax
+; AVX2-NEXT: andl $63, %eax
+; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rax,4)
+; AVX2-NEXT: movq %rdi, %rax
+; AVX2-NEXT: movl 464(%rbp), %edx
; AVX2-NEXT: andl $1, %edx
; AVX2-NEXT: addl %ecx, %edx
-; AVX2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; AVX2-NEXT: andl $63, %ecx
-; AVX2-NEXT: vextractps $1, %xmm0, (%rsp,%rcx,4)
-; AVX2-NEXT: movzbl 472(%rbp), %ecx
-; AVX2-NEXT: movzbl %cl, %ecx
+; AVX2-NEXT: movl 472(%rbp), %ecx
; AVX2-NEXT: andl $1, %ecx
; AVX2-NEXT: addl %edx, %ecx
-; AVX2-NEXT: # kill: def $edx killed $edx def $rdx
+; AVX2-NEXT: # kill: def $edx killed $edx killed $rdx def $rdx
; AVX2-NEXT: andl $63, %edx
; AVX2-NEXT: vextractps $2, %xmm0, (%rsp,%rdx,4)
; AVX2-NEXT: andl $63, %ecx
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
index 33dce3ca920a3..dd9b78e0c7351 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
@@ -31,8 +31,8 @@ define i8 @test_i8(i8 %a) nounwind {
define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV-LABEL: test_i16:
; X86-NO-CMOV: # %bb.0:
-; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X86-NO-CMOV-NEXT: movl %eax, %ecx
+; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NO-CMOV-NEXT: movswl %ax, %ecx
; X86-NO-CMOV-NEXT: sarl $15, %ecx
; X86-NO-CMOV-NEXT: xorl %ecx, %eax
; X86-NO-CMOV-NEXT: subl %ecx, %eax
>From d40c6e09f427af1d91ae2503abccf2b513721dcd Mon Sep 17 00:00:00 2001
From: Vachan V Y <vachanvy05 at gmail.com>
Date: Mon, 28 Sep 2026 14:30:58 +0530
Subject: [PATCH 2/4] [DAGCombiner] visitSIGN_EXTEND_INREG - fold (sext_inreg
(freeze (extload x))) -> (freeze (sextload x))
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 21 ++++++++++++-------
llvm/test/CodeGen/X86/iabs.ll | 6 +++---
llvm/test/CodeGen/X86/icmp-abs-C.ll | 6 +++---
.../test/CodeGen/X86/icmp-pow2-logic-npow2.ll | 6 +++---
llvm/test/CodeGen/X86/neg-abs.ll | 12 +++++------
.../Inputs/basic.ll.expected | 6 +++---
6 files changed, 31 insertions(+), 26 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 46c39f2669b4a..3f9b8ffc02425 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17381,21 +17381,26 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
}
}
+ bool Frozen = N0.getOpcode() == ISD::FREEZE;
+
// fold (sext_inreg (extload x)) -> (sextload x)
+ // fold (sext_inreg (freeze (extload x))) -> (freeze (sextload x))
// If sextload is not supported by target, we can only do the combine when
// load has one use. Doing otherwise can block folding the extload with other
// extends that the target does support.
- if (ISD::isEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode())) {
- auto *LN0 = cast<LoadSDNode>(N0);
+ SDValue LoadOp = Frozen ? N0.getOperand(0) : N0;
+ if (ISD::isEXTLoad(LoadOp.getNode()) &&
+ ISD::isUNINDEXEDLoad(LoadOp.getNode())) {
+ auto *LN0 = cast<LoadSDNode>(LoadOp);
if (ExtVT == LN0->getMemoryVT() &&
- ((!LegalOperations && LN0->isSimple() && N0.hasOneUse()) ||
+ ((!LegalOperations && LN0->isSimple() && LoadOp.hasOneUse()) ||
TLI.isLoadLegal(VT, ExtVT, LN0->getAlign(), LN0->getAddressSpace(),
ISD::SEXTLOAD, false))) {
SDValue ExtLoad =
DAG.getExtLoad(ISD::SEXTLOAD, DL, VT, LN0->getChain(),
LN0->getBasePtr(), ExtVT, LN0->getMemOperand());
- CombineTo(N, ExtLoad);
- CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1));
+ CombineTo(N, Frozen ? N0 : ExtLoad);
+ CombineTo(LN0, ExtLoad, ExtLoad.getValue(1));
AddToWorklist(ExtLoad.getNode());
return SDValue(N, 0); // Return N so it doesn't get rechecked!
}
@@ -17420,8 +17425,8 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
// fold (sext_inreg (masked_load x)) -> (sext_masked_load x)
// ignore it if the masked load is already sign extended
- bool Frozen = N0.getOpcode() == ISD::FREEZE && N0.hasOneUse();
- if (auto *Ld = dyn_cast<MaskedLoadSDNode>(Frozen ? N0.getOperand(0) : N0)) {
+ if (auto *Ld = dyn_cast<MaskedLoadSDNode>(
+ Frozen && N0.hasOneUse() ? N0.getOperand(0) : N0)) {
if (ExtVT == Ld->getMemoryVT() && Ld->hasNUsesOfValue(1, 0) &&
Ld->getExtensionType() != ISD::LoadExtType::NON_EXTLOAD &&
TLI.isLoadLegal(VT, ExtVT, Ld->getAlign(), Ld->getAddressSpace(),
@@ -17430,7 +17435,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
VT, DL, Ld->getChain(), Ld->getBasePtr(), Ld->getOffset(),
Ld->getMask(), Ld->getPassThru(), ExtVT, Ld->getMemOperand(),
Ld->getAddressingMode(), ISD::SEXTLOAD, Ld->isExpandingLoad());
- CombineTo(N, Frozen ? N0 : ExtMaskedLoad);
+ CombineTo(N, Frozen && N0.hasOneUse() ? N0 : ExtMaskedLoad);
CombineTo(Ld, ExtMaskedLoad, ExtMaskedLoad.getValue(1));
return SDValue(N, 0); // Return N so it doesn't get rechecked!
}
diff --git a/llvm/test/CodeGen/X86/iabs.ll b/llvm/test/CodeGen/X86/iabs.ll
index f18f49e342962..dcd0ca141fed5 100644
--- a/llvm/test/CodeGen/X86/iabs.ll
+++ b/llvm/test/CodeGen/X86/iabs.ll
@@ -37,9 +37,9 @@ define i8 @test_i8(i8 %a) nounwind {
define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV-LABEL: test_i16:
; X86-NO-CMOV: # %bb.0:
-; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NO-CMOV-NEXT: movswl %ax, %ecx
-; X86-NO-CMOV-NEXT: sarl $15, %ecx
+; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NO-CMOV-NEXT: movl %eax, %ecx
+; X86-NO-CMOV-NEXT: shrl $15, %ecx
; X86-NO-CMOV-NEXT: xorl %ecx, %eax
; X86-NO-CMOV-NEXT: subl %ecx, %eax
; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
diff --git a/llvm/test/CodeGen/X86/icmp-abs-C.ll b/llvm/test/CodeGen/X86/icmp-abs-C.ll
index 5c88909de9eb6..dcbbc1ef84d8e 100644
--- a/llvm/test/CodeGen/X86/icmp-abs-C.ll
+++ b/llvm/test/CodeGen/X86/icmp-abs-C.ll
@@ -161,9 +161,9 @@ define i16 @ne_and_with_dom_abs(i16 %x) nounwind {
; X86-LABEL: ne_and_with_dom_abs:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movswl %ax, %ecx
-; X86-NEXT: sarl $15, %ecx
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: shrl $15, %ecx
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: movl %eax, %edx
diff --git a/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll b/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
index 0a85a395895dc..f2ada080dba0d 100644
--- a/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
+++ b/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
@@ -196,9 +196,9 @@ define i1 @abs_ne_pow2(i64 %0) nounwind {
define i1 @abs_ne_nonpow2(i16 %0) nounwind {
; X86-LABEL: abs_ne_nonpow2:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movswl %ax, %ecx
-; X86-NEXT: sarl $15, %ecx
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: shrl $15, %ecx
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: movzwl %ax, %eax
diff --git a/llvm/test/CodeGen/X86/neg-abs.ll b/llvm/test/CodeGen/X86/neg-abs.ll
index 47c95e1c0943c..47c1541ade8a6 100644
--- a/llvm/test/CodeGen/X86/neg-abs.ll
+++ b/llvm/test/CodeGen/X86/neg-abs.ll
@@ -34,9 +34,9 @@ define i8 @neg_abs_i8(i8 %x) nounwind {
define i16 @neg_abs_i16(i16 %x) nounwind {
; X86-LABEL: neg_abs_i16:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movswl %cx, %eax
-; X86-NEXT: sarl $15, %eax
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: shrl $15, %eax
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -182,9 +182,9 @@ define i8 @sub_abs_i8(i8 %x, i8 %y) nounwind {
define i16 @sub_abs_i16(i16 %x, i16 %y) nounwind {
; X86-LABEL: sub_abs_i16:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movswl %cx, %eax
-; X86-NEXT: sarl $15, %eax
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: shrl $15, %eax
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
index dd9b78e0c7351..fcdea7de72947 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
@@ -31,9 +31,9 @@ define i8 @test_i8(i8 %a) nounwind {
define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV-LABEL: test_i16:
; X86-NO-CMOV: # %bb.0:
-; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NO-CMOV-NEXT: movswl %ax, %ecx
-; X86-NO-CMOV-NEXT: sarl $15, %ecx
+; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NO-CMOV-NEXT: movl %eax, %ecx
+; X86-NO-CMOV-NEXT: shrl $15, %ecx
; X86-NO-CMOV-NEXT: xorl %ecx, %eax
; X86-NO-CMOV-NEXT: subl %ecx, %eax
; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
>From 79ea7ce871b7c8a993e19e8530c04502a0e0606b Mon Sep 17 00:00:00 2001
From: Vachan V Y <vachanvy05 at gmail.com>
Date: Tue, 29 Sep 2026 17:00:52 +0530
Subject: [PATCH 3/4] [DAGCombiner] address review comments - use `assertsext`
visitSIGN_EXTEND_INREG - fold (sext_inreg (freeze (extload x))) -> (freeze (sextload x))
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 +-
llvm/test/CodeGen/AArch64/sve-ldst-sext.ll | 15 +--
llvm/test/CodeGen/AArch64/sve-ldst-zext.ll | 18 +--
llvm/test/CodeGen/WebAssembly/PR41149.ll | 3 +-
llvm/test/CodeGen/X86/iabs.ll | 2 +-
llvm/test/CodeGen/X86/icmp-abs-C.ll | 2 +-
.../test/CodeGen/X86/icmp-pow2-logic-npow2.ll | 2 +-
llvm/test/CodeGen/X86/neg-abs.ll | 4 +-
llvm/test/CodeGen/X86/pr38539.ll | 106 +++++++++---------
.../Inputs/basic.ll.expected | 2 +-
10 files changed, 83 insertions(+), 80 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3f9b8ffc02425..dc2f8ff505826 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17384,7 +17384,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
bool Frozen = N0.getOpcode() == ISD::FREEZE;
// fold (sext_inreg (extload x)) -> (sextload x)
- // fold (sext_inreg (freeze (extload x))) -> (freeze (sextload x))
+ // fold (sext_inreg (freeze (extload x))) -> (assertsext (freeze (sextload x)))
// If sextload is not supported by target, we can only do the combine when
// load has one use. Doing otherwise can block folding the extload with other
// extends that the target does support.
@@ -17399,7 +17399,12 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
SDValue ExtLoad =
DAG.getExtLoad(ISD::SEXTLOAD, DL, VT, LN0->getChain(),
LN0->getBasePtr(), ExtVT, LN0->getMemOperand());
- CombineTo(N, Frozen ? N0 : ExtLoad);
+ SDValue Res = ExtLoad;
+ if (Frozen)
+ // Allow value tracking to see the sign extension through the freeze.
+ Res = DAG.getNode(ISD::AssertSext, DL, VT, DAG.getFreeze(ExtLoad),
+ DAG.getValueType(ExtVT.getScalarType()));
+ CombineTo(N, Res);
CombineTo(LN0, ExtLoad, ExtLoad.getValue(1));
AddToWorklist(ExtLoad.getNode());
return SDValue(N, 0); // Return N so it doesn't get rechecked!
diff --git a/llvm/test/CodeGen/AArch64/sve-ldst-sext.ll b/llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
index 78abf3239343c..6fc98e46892bd 100644
--- a/llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
+++ b/llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
@@ -272,10 +272,8 @@ define <vscale x 2 x i64> @load_frozen_before_sext_multiuse(ptr %src) {
; CHECK-LABEL: load_frozen_before_sext_multiuse:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: ld1b { z1.d }, p0/z, [x0]
-; CHECK-NEXT: movprfx z0, z1
-; CHECK-NEXT: sxtb z0.d, p0/m, z1.d
-; CHECK-NEXT: // fake_use: $z1
+; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]
+; CHECK-NEXT: // fake_use: $z0
; CHECK-NEXT: ret
%load = load <vscale x 2 x i8>, ptr %src, align 1
%load.frozen = freeze <vscale x 2 x i8> %load
@@ -289,10 +287,9 @@ define <vscale x 2 x i64> @load_frozen_before_sext_multiuse2(ptr %src) {
; CHECK-LABEL: load_frozen_before_sext_multiuse2:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: ld1b { z0.d }, p0/z, [x0]
+; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]
; CHECK-NEXT: movprfx z1, z0
; CHECK-NEXT: mul z1.d, z1.d, #13
-; CHECK-NEXT: sxtb z0.d, p0/m, z0.d
; CHECK-NEXT: and z1.d, z1.d, #0xff
; CHECK-NEXT: add z0.d, z0.d, z1.d
; CHECK-NEXT: ret
@@ -310,10 +307,9 @@ define <vscale x 2 x i64> @load_frozen_before_sext_multiuse3(ptr %src, ptr %dst1
; CHECK-LABEL: load_frozen_before_sext_multiuse3:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: ld1b { z0.d }, p0/z, [x0]
+; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]
; CHECK-NEXT: movprfx z1, z0
; CHECK-NEXT: and z1.d, z1.d, #0xff
-; CHECK-NEXT: sxtb z0.d, p0/m, z0.d
; CHECK-NEXT: movprfx z2, z1
; CHECK-NEXT: mul z2.d, z2.d, #49
; CHECK-NEXT: mul z1.d, z1.d, #33
@@ -343,11 +339,10 @@ define <vscale x 2 x i64> @load_frozen_before_sext_multiuse4(ptr %src1, ptr %src
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: mov w8, #1234 // =0x4d2
; CHECK-NEXT: mov z3.d, #27 // =0x1b
-; CHECK-NEXT: ld1b { z0.d }, p0/z, [x0]
+; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]
; CHECK-NEXT: ld1b { z2.d }, p0/z, [x1]
; CHECK-NEXT: movprfx z1, z0
; CHECK-NEXT: and z1.d, z1.d, #0xff
-; CHECK-NEXT: sxtb z0.d, p0/m, z0.d
; CHECK-NEXT: cmpeq p1.d, p0/z, z1.d, #3
; CHECK-NEXT: mov z1.d, x8
; CHECK-NEXT: add z0.d, z0.d, z1.d
diff --git a/llvm/test/CodeGen/AArch64/sve-ldst-zext.ll b/llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
index 0a1cf0cacbf2f..b060b33666cc1 100644
--- a/llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
+++ b/llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
@@ -310,16 +310,16 @@ define <vscale x 2 x i64> @load_frozen_before_sext_multiuse3(ptr %src, ptr %dst1
; CHECK-LABEL: load_frozen_before_sext_multiuse3:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: ld1b { z0.d }, p0/z, [x0]
+; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]
; CHECK-NEXT: movprfx z1, z0
-; CHECK-NEXT: sxtb z1.d, p0/m, z0.d
-; CHECK-NEXT: and z0.d, z0.d, #0xff
-; CHECK-NEXT: movprfx z2, z1
-; CHECK-NEXT: mul z2.d, z2.d, #49
-; CHECK-NEXT: mul z1.d, z1.d, #33
-; CHECK-NEXT: add z0.d, z0.d, z2.d
-; CHECK-NEXT: st1w { z1.d }, p0, [x1]
-; CHECK-NEXT: st1h { z2.d }, p0, [x2]
+; CHECK-NEXT: mul z1.d, z1.d, #49
+; CHECK-NEXT: movprfx z2, z0
+; CHECK-NEXT: and z2.d, z2.d, #0xff
+; CHECK-NEXT: movprfx z3, z0
+; CHECK-NEXT: mul z3.d, z3.d, #33
+; CHECK-NEXT: add z0.d, z2.d, z1.d
+; CHECK-NEXT: st1w { z3.d }, p0, [x1]
+; CHECK-NEXT: st1h { z1.d }, p0, [x2]
; CHECK-NEXT: ret
%load = load <vscale x 2 x i8>, ptr %src, align 1
%load.frozen = freeze <vscale x 2 x i8> %load
diff --git a/llvm/test/CodeGen/WebAssembly/PR41149.ll b/llvm/test/CodeGen/WebAssembly/PR41149.ll
index a31fd5e830820..d8864053ba61b 100644
--- a/llvm/test/CodeGen/WebAssembly/PR41149.ll
+++ b/llvm/test/CodeGen/WebAssembly/PR41149.ll
@@ -10,10 +10,9 @@ define void @mod() {
; CHECK-NEXT: # %bb.0:
; CHECK-NEXT: local.get 0
; CHECK-NEXT: local.get 0
-; CHECK-NEXT: i32.load8_u 0
+; CHECK-NEXT: i32.load8_s 0
; CHECK-NEXT: local.tee 0
; CHECK-NEXT: local.get 0
-; CHECK-NEXT: i32.extend8_s
; CHECK-NEXT: i32.const 7
; CHECK-NEXT: i32.shr_s
; CHECK-NEXT: local.tee 0
diff --git a/llvm/test/CodeGen/X86/iabs.ll b/llvm/test/CodeGen/X86/iabs.ll
index dcd0ca141fed5..3c3171032451a 100644
--- a/llvm/test/CodeGen/X86/iabs.ll
+++ b/llvm/test/CodeGen/X86/iabs.ll
@@ -39,7 +39,7 @@ define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV: # %bb.0:
; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
; X86-NO-CMOV-NEXT: movl %eax, %ecx
-; X86-NO-CMOV-NEXT: shrl $15, %ecx
+; X86-NO-CMOV-NEXT: sarl $15, %ecx
; X86-NO-CMOV-NEXT: xorl %ecx, %eax
; X86-NO-CMOV-NEXT: subl %ecx, %eax
; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
diff --git a/llvm/test/CodeGen/X86/icmp-abs-C.ll b/llvm/test/CodeGen/X86/icmp-abs-C.ll
index dcbbc1ef84d8e..4773a369326f7 100644
--- a/llvm/test/CodeGen/X86/icmp-abs-C.ll
+++ b/llvm/test/CodeGen/X86/icmp-abs-C.ll
@@ -163,7 +163,7 @@ define i16 @ne_and_with_dom_abs(i16 %x) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: shrl $15, %ecx
+; X86-NEXT: sarl $15, %ecx
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: movl %eax, %edx
diff --git a/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll b/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
index f2ada080dba0d..b14fedeaae57d 100644
--- a/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
+++ b/llvm/test/CodeGen/X86/icmp-pow2-logic-npow2.ll
@@ -198,7 +198,7 @@ define i1 @abs_ne_nonpow2(i16 %0) nounwind {
; X86: # %bb.0:
; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: shrl $15, %ecx
+; X86-NEXT: sarl $15, %ecx
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: movzwl %ax, %eax
diff --git a/llvm/test/CodeGen/X86/neg-abs.ll b/llvm/test/CodeGen/X86/neg-abs.ll
index 47c1541ade8a6..050610426e6bd 100644
--- a/llvm/test/CodeGen/X86/neg-abs.ll
+++ b/llvm/test/CodeGen/X86/neg-abs.ll
@@ -36,7 +36,7 @@ define i16 @neg_abs_i16(i16 %x) nounwind {
; X86: # %bb.0:
; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: shrl $15, %eax
+; X86-NEXT: sarl $15, %eax
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -184,7 +184,7 @@ define i16 @sub_abs_i16(i16 %x, i16 %y) nounwind {
; X86: # %bb.0:
; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: shrl $15, %eax
+; X86-NEXT: sarl $15, %eax
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
diff --git a/llvm/test/CodeGen/X86/pr38539.ll b/llvm/test/CodeGen/X86/pr38539.ll
index eecd15dd2afe9..cfff4ffbe5578 100644
--- a/llvm/test/CodeGen/X86/pr38539.ll
+++ b/llvm/test/CodeGen/X86/pr38539.ll
@@ -22,20 +22,20 @@ define void @f() nounwind {
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
-; X86-NEXT: subl $176, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: subl $160, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shll $30, %ecx
+; X86-NEXT: sarl $30, %ecx
; X86-NEXT: movzbl (%eax), %eax
-; X86-NEXT: movzbl (%eax), %ecx
+; X86-NEXT: movzbl (%eax), %edx
; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
-; X86-NEXT: divb %cl
-; X86-NEXT: movl %edi, %eax
-; X86-NEXT: shll $30, %eax
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: sarl $30, %ecx
+; X86-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
+; X86-NEXT: divb %dl
+; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sarl $31, %eax
+; X86-NEXT: movl %ecx, %edi
; X86-NEXT: xorl %eax, %edi
; X86-NEXT: xorl %eax, %ebx
; X86-NEXT: shrdl $1, %eax, %ecx
@@ -48,6 +48,7 @@ define void @f() nounwind {
; X86-NEXT: movl %esi, %edx
; X86-NEXT: shrdl $2, %ebx, %edx
; X86-NEXT: testl %ecx, %ecx
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: jne .LBB0_1
; X86-NEXT: # %bb.2: # %BB_udiv-special-cases
@@ -77,8 +78,8 @@ define void @f() nounwind {
; X86-NEXT: movl %esi, %eax
; X86-NEXT: .LBB0_8: # %BB_udiv-special-cases
; X86-NEXT: addl $-66, %eax
-; X86-NEXT: movl $0, %ebx
-; X86-NEXT: adcl $-1, %ebx
+; X86-NEXT: movl $0, %edi
+; X86-NEXT: adcl $-1, %edi
; X86-NEXT: movl $0, %esi
; X86-NEXT: adcl $3, %esi
; X86-NEXT: andl $3, %esi
@@ -90,26 +91,26 @@ define void @f() nounwind {
; X86-NEXT: movl $65, %edx
; X86-NEXT: cmpl %eax, %edx
; X86-NEXT: movl $0, %edx
-; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %edi, %edx
; X86-NEXT: movl $0, %edx
; X86-NEXT: sbbl %esi, %edx
; X86-NEXT: sbbl %ecx, %ecx
; X86-NEXT: setb %cl
; X86-NEXT: .LBB0_10: # %select.end
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: testb %cl, %cl
; X86-NEXT: jne .LBB0_15
; X86-NEXT: # %bb.11: # %select.end
+; X86-NEXT: movl %edi, %edx
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $65, %ecx
; X86-NEXT: orl %esi, %ecx
-; X86-NEXT: orl %ebx, %ecx
+; X86-NEXT: orl %edi, %ecx
; X86-NEXT: je .LBB0_15
; X86-NEXT: # %bb.12: # %udiv-bb1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: addl $1, %ecx
-; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: adcl $0, %ebx
+; X86-NEXT: movl %eax, %edi
+; X86-NEXT: addl $1, %edi
+; X86-NEXT: adcl $0, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %esi
; X86-NEXT: andl $3, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
@@ -128,23 +129,25 @@ define void @f() nounwind {
; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 128(%esp,%edx), %eax
-; X86-NEXT: movl 132(%esp,%edx), %edi
-; X86-NEXT: movl 136(%esp,%edx), %edx
-; X86-NEXT: shldl %cl, %edi, %edx
+; X86-NEXT: movl 112(%esp,%edx), %ebx
+; X86-NEXT: movl 116(%esp,%edx), %eax
+; X86-NEXT: movl 120(%esp,%edx), %edx
+; X86-NEXT: shldl %cl, %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shldl %cl, %eax, %edi
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shll %cl, %eax
+; X86-NEXT: shldl %cl, %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT: orl %esi, %eax
+; X86-NEXT: shll %cl, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: orl %ebx, %eax
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edi, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: orl %esi, %eax
+; X86-NEXT: orl %edi, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: je .LBB0_15
; X86-NEXT: # %bb.13: # %udiv-preheader
-; X86-NEXT: andl $3, %esi
+; X86-NEXT: andl $3, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: andl $3, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
@@ -159,14 +162,15 @@ define void @f() nounwind {
; X86-NEXT: shrb $3, %al
; X86-NEXT: andb $12, %al
; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movl 88(%esp,%eax), %edi
-; X86-NEXT: movl 80(%esp,%eax), %ebx
-; X86-NEXT: movl 84(%esp,%eax), %eax
-; X86-NEXT: movl %eax, %edx
-; X86-NEXT: shrdl %cl, %edi, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl 72(%esp,%eax), %ebx
+; X86-NEXT: movl 64(%esp,%eax), %edx
+; X86-NEXT: movl 68(%esp,%eax), %esi
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: shrdl %cl, %ebx, %eax
+; X86-NEXT: movl %eax, %ebx
; X86-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-NEXT: shrdl %cl, %eax, %ebx
+; X86-NEXT: shrdl %cl, %esi, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl $-1, %eax
@@ -174,17 +178,19 @@ define void @f() nounwind {
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl $-1, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: adcl $3, %esi
-; X86-NEXT: andl $3, %esi
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: adcl $3, %eax
+; X86-NEXT: andl $3, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_14: # %udiv-do-while
; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT: shldl $1, %edx, %ecx
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %ebx, %edx
+; X86-NEXT: shldl $1, %ebx, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-NEXT: shldl $1, %ebx, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-NEXT: movl %edi, %esi
@@ -223,22 +229,20 @@ define void @f() nounwind {
; X86-NEXT: subl %esi, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: sbbl %edi, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-NEXT: sbbl %eax, %ecx
; X86-NEXT: andl $3, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl $-1, %eax
+; X86-NEXT: adcl $-1, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: adcl $-1, %esi
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
-; X86-NEXT: adcl $3, %ebx
-; X86-NEXT: andl $3, %ebx
+; X86-NEXT: adcl $3, %esi
+; X86-NEXT: andl $3, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: orl %ebx, %eax
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: orl %esi, %eax
+; X86-NEXT: orl %edi, %eax
; X86-NEXT: jne .LBB0_14
; X86-NEXT: .LBB0_15: # %udiv-end
; X86-NEXT: cmpb $0, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
index fcdea7de72947..33dce3ca920a3 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/basic.ll.expected
@@ -33,7 +33,7 @@ define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV: # %bb.0:
; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
; X86-NO-CMOV-NEXT: movl %eax, %ecx
-; X86-NO-CMOV-NEXT: shrl $15, %ecx
+; X86-NO-CMOV-NEXT: sarl $15, %ecx
; X86-NO-CMOV-NEXT: xorl %ecx, %eax
; X86-NO-CMOV-NEXT: subl %ecx, %eax
; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
>From 8a646b5c010cc0fc735f30c22300f8c76c91f27c Mon Sep 17 00:00:00 2001
From: Vachan V Y <vachanvy05 at gmail.com>
Date: Tue, 29 Sep 2026 17:56:34 +0530
Subject: [PATCH 4/4] [DAGCombiner] fix merge conflict + clang format
visitSIGN_EXTEND_INREG - fold (sext_inreg (freeze (extload x))) -> (freeze (sextload x))
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 10 +-
llvm/test/CodeGen/X86/midpoint-int.ll | 74 ++++----
llvm/test/CodeGen/X86/pr38539.ll | 177 +++++++++---------
3 files changed, 131 insertions(+), 130 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 5ddb55e34888a..f46fe4843ed23 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17501,11 +17501,11 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
bool Frozen = N0.getOpcode() == ISD::FREEZE;
// fold (sext_inreg (extload x)) -> (sextload x)
- // fold (sext_inreg (freeze (extload x))) -> (assertsext (freeze (sextload x)))
- // If sextload is not supported by target, we can only do the combine when
- // load has one use. Doing otherwise can block folding the extload with other
- // extends that the target does support.
- SDValue LoadOp = Frozen ? N0.getOperand(0) : N0;
+ // fold (sext_inreg (freeze (extload x))) -> (assertsext (freeze (sextload
+ // x))) If sextload is not supported by target, we can only do the combine
+ // when load has one use. Doing otherwise can block folding the extload with
+ // other extends that the target does support.
+SDValue LoadOp = Frozen ? N0.getOperand(0) : N0;
if (ISD::isEXTLoad(LoadOp.getNode()) &&
ISD::isUNINDEXEDLoad(LoadOp.getNode())) {
auto *LN0 = cast<LoadSDNode>(LoadOp);
diff --git a/llvm/test/CodeGen/X86/midpoint-int.ll b/llvm/test/CodeGen/X86/midpoint-int.ll
index 3c4d985f51bd4..632f71d7864d3 100644
--- a/llvm/test/CodeGen/X86/midpoint-int.ll
+++ b/llvm/test/CodeGen/X86/midpoint-int.ll
@@ -651,14 +651,14 @@ define i16 @scalar_i16_signed_reg_reg(i16 %a1, i16 %a2) nounwind {
;
; X86-LABEL: scalar_i16_signed_reg_reg:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: subw %si, %ax
-; X86-NEXT: setle %dl
-; X86-NEXT: leal -1(%edx,%edx), %edx
+; X86-NEXT: pushl %ebx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: subw %dx, %ax
+; X86-NEXT: setle %bl
+; X86-NEXT: leal -1(%ebx,%ebx), %edx
; X86-NEXT: jg .LBB10_2
; X86-NEXT: # %bb.1:
; X86-NEXT: negl %eax
@@ -668,7 +668,7 @@ define i16 @scalar_i16_signed_reg_reg(i16 %a1, i16 %a2) nounwind {
; X86-NEXT: imull %edx, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
+; X86-NEXT: popl %ebx
; X86-NEXT: retl
%t3 = icmp sgt i16 %a1, %a2 ; signed
%t4 = select i1 %t3, i16 -1, i16 1
@@ -755,15 +755,15 @@ define i16 @scalar_i16_signed_mem_reg(ptr %a1_addr, i16 %a2) nounwind {
;
; X86-LABEL: scalar_i16_signed_mem_reg:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: pushl %ebx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzwl (%eax), %eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: subw %si, %ax
-; X86-NEXT: setle %dl
-; X86-NEXT: leal -1(%edx,%edx), %edx
+; X86-NEXT: movzwl (%eax), %ecx
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: subw %dx, %ax
+; X86-NEXT: setle %bl
+; X86-NEXT: leal -1(%ebx,%ebx), %edx
; X86-NEXT: jg .LBB12_2
; X86-NEXT: # %bb.1:
; X86-NEXT: negl %eax
@@ -773,7 +773,7 @@ define i16 @scalar_i16_signed_mem_reg(ptr %a1_addr, i16 %a2) nounwind {
; X86-NEXT: imull %edx, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
+; X86-NEXT: popl %ebx
; X86-NEXT: retl
%a1 = load i16, ptr %a1_addr
%t3 = icmp sgt i16 %a1, %a2 ; signed
@@ -809,15 +809,15 @@ define i16 @scalar_i16_signed_reg_mem(i16 %a1, ptr %a2_addr) nounwind {
;
; X86-LABEL: scalar_i16_signed_reg_mem:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movzwl (%ecx), %esi
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: subw %si, %ax
-; X86-NEXT: setle %dl
-; X86-NEXT: leal -1(%edx,%edx), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl (%eax), %edx
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: subw %dx, %ax
+; X86-NEXT: setle %bl
+; X86-NEXT: leal -1(%ebx,%ebx), %edx
; X86-NEXT: jg .LBB13_2
; X86-NEXT: # %bb.1:
; X86-NEXT: negl %eax
@@ -827,7 +827,7 @@ define i16 @scalar_i16_signed_reg_mem(i16 %a1, ptr %a2_addr) nounwind {
; X86-NEXT: imull %edx, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
+; X86-NEXT: popl %ebx
; X86-NEXT: retl
%a2 = load i16, ptr %a2_addr
%t3 = icmp sgt i16 %a1, %a2 ; signed
@@ -863,16 +863,16 @@ define i16 @scalar_i16_signed_mem_mem(ptr %a1_addr, ptr %a2_addr) nounwind {
;
; X86-LABEL: scalar_i16_signed_mem_mem:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: pushl %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzwl (%eax), %eax
-; X86-NEXT: movzwl (%ecx), %esi
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: subw %si, %ax
-; X86-NEXT: setle %dl
-; X86-NEXT: leal -1(%edx,%edx), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl (%ecx), %ecx
+; X86-NEXT: movzwl (%eax), %edx
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: subw %dx, %ax
+; X86-NEXT: setle %bl
+; X86-NEXT: leal -1(%ebx,%ebx), %edx
; X86-NEXT: jg .LBB14_2
; X86-NEXT: # %bb.1:
; X86-NEXT: negl %eax
@@ -882,7 +882,7 @@ define i16 @scalar_i16_signed_mem_mem(ptr %a1_addr, ptr %a2_addr) nounwind {
; X86-NEXT: imull %edx, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
+; X86-NEXT: popl %ebx
; X86-NEXT: retl
%a1 = load i16, ptr %a1_addr
%a2 = load i16, ptr %a2_addr
diff --git a/llvm/test/CodeGen/X86/pr38539.ll b/llvm/test/CodeGen/X86/pr38539.ll
index ca24715fd432c..221e6699c08a2 100644
--- a/llvm/test/CodeGen/X86/pr38539.ll
+++ b/llvm/test/CodeGen/X86/pr38539.ll
@@ -24,44 +24,43 @@ define void @f() nounwind {
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $96, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shll $30, %ecx
+; X86-NEXT: sarl $30, %ecx
; X86-NEXT: movzbl (%eax), %eax
-; X86-NEXT: movzbl (%eax), %edx
+; X86-NEXT: movzbl (%eax), %ebx
; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
-; X86-NEXT: divb %cl
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: shll $30, %eax
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: sarl $30, %ecx
+; X86-NEXT: movb %bl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
+; X86-NEXT: divb %bl
+; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %edx
+; X86-NEXT: movl %ecx, %esi
; X86-NEXT: xorl %eax, %esi
+; X86-NEXT: xorl %eax, %edi
; X86-NEXT: shrdl $1, %eax, %ecx
-; X86-NEXT: xorl %ecx, %ebx
-; X86-NEXT: subl %ecx, %ebx
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: subl %ecx, %edx
+; X86-NEXT: sbbl %eax, %edi
; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: shldl $30, %esi, %eax
-; X86-NEXT: movl %ebx, %edi
-; X86-NEXT: movl %ebx, %ecx
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shrdl $2, %esi, %ecx
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: shldl $30, %edi, %eax
+; X86-NEXT: movl %edx, %ecx
+; X86-NEXT: shrdl $2, %edi, %ecx
; X86-NEXT: testl %eax, %eax
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: jne .LBB0_1
; X86-NEXT: # %bb.2: # %BB_udiv-special-cases
-; X86-NEXT: bsrl %ecx, %esi
-; X86-NEXT: xorl $31, %esi
-; X86-NEXT: orl $32, %esi
+; X86-NEXT: bsrl %ecx, %ebx
+; X86-NEXT: xorl $31, %ebx
+; X86-NEXT: orl $32, %ebx
; X86-NEXT: jmp .LBB0_3
; X86-NEXT: .LBB0_1:
-; X86-NEXT: bsrl %eax, %esi
-; X86-NEXT: xorl $31, %esi
+; X86-NEXT: bsrl %eax, %ebx
+; X86-NEXT: xorl $31, %ebx
; X86-NEXT: .LBB0_3: # %BB_udiv-special-cases
-; X86-NEXT: movl %edi, %edx
+; X86-NEXT: movl %edx, %edi
; X86-NEXT: shll $30, %edx
; X86-NEXT: jne .LBB0_4
; X86-NEXT: # %bb.5: # %BB_udiv-special-cases
@@ -76,15 +75,15 @@ define void @f() nounwind {
; X86-NEXT: jne .LBB0_8
; X86-NEXT: .LBB0_7: # %BB_udiv-special-cases
; X86-NEXT: addl $64, %edx
-; X86-NEXT: movl %edx, %esi
+; X86-NEXT: movl %edx, %ebx
; X86-NEXT: .LBB0_8: # %BB_udiv-special-cases
-; X86-NEXT: movl %esi, %edx
+; X86-NEXT: movl %ebx, %edx
; X86-NEXT: addl $-66, %edx
-; X86-NEXT: movl $0, %ebx
-; X86-NEXT: adcl $-1, %ebx
; X86-NEXT: movl $0, %esi
-; X86-NEXT: adcl $3, %esi
-; X86-NEXT: andl $3, %esi
+; X86-NEXT: adcl $-1, %esi
+; X86-NEXT: movl $0, %ebx
+; X86-NEXT: adcl $3, %ebx
+; X86-NEXT: andl $3, %ebx
; X86-NEXT: movb $1, %al
; X86-NEXT: testb %al, %al
; X86-NEXT: jne .LBB0_10
@@ -93,9 +92,9 @@ define void @f() nounwind {
; X86-NEXT: movl $65, %ecx
; X86-NEXT: cmpl %edx, %ecx
; X86-NEXT: movl $0, %ecx
-; X86-NEXT: sbbl %ebx, %ecx
-; X86-NEXT: movl $0, %ecx
; X86-NEXT: sbbl %esi, %ecx
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: sbbl %eax, %eax
; X86-NEXT: setb %al
; X86-NEXT: .LBB0_10: # %select.end
@@ -104,26 +103,27 @@ define void @f() nounwind {
; X86-NEXT: # %bb.11: # %select.end
; X86-NEXT: movl %edx, %eax
; X86-NEXT: xorl $65, %eax
-; X86-NEXT: orl %esi, %eax
; X86-NEXT: orl %ebx, %eax
+; X86-NEXT: orl %esi, %eax
; X86-NEXT: je .LBB0_15
; X86-NEXT: # %bb.12: # %udiv-bb1
; X86-NEXT: addl $1, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: adcl $0, %ebx
; X86-NEXT: adcl $0, %esi
-; X86-NEXT: andl $3, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: adcl $0, %ebx
+; X86-NEXT: andl $3, %ebx
; X86-NEXT: movl %edx, %eax
-; X86-NEXT: orl %esi, %eax
; X86-NEXT: orl %ebx, %eax
+; X86-NEXT: orl %esi, %eax
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: je .LBB0_15
; X86-NEXT: # %bb.13: # %udiv-preheader
+; X86-NEXT: movl %edx, %edi
; X86-NEXT: andl $3, %eax
; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: movl %edi, %edx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: addl $-1, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
@@ -134,70 +134,71 @@ define void @f() nounwind {
; X86-NEXT: andl $3, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: xorl %edx, %edx
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: xorl %esi, %esi
-; X86-NEXT: xorl %eax, %eax
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_14: # %udiv-do-while
; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shldl $1, %esi, %eax
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: shldl $1, %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: movl %ecx, %edx
-; X86-NEXT: andl $2, %edx
-; X86-NEXT: shrl %edx
-; X86-NEXT: leal (%edx,%esi,2), %esi
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; X86-NEXT: shldl $1, %edi, %ecx
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT: orl %edx, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: shldl $1, %eax, %esi
+; X86-NEXT: shldl $1, %edx, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %ecx, %edi
+; X86-NEXT: andl $2, %edi
+; X86-NEXT: shrl %edi
+; X86-NEXT: leal (%edi,%edx,2), %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
-; X86-NEXT: shldl $1, %ebx, %edi
-; X86-NEXT: orl %edx, %edi
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: addl %ebx, %ebx
-; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
+; X86-NEXT: shldl $1, %ebx, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: shldl $1, %edi, %ebx
+; X86-NEXT: orl %eax, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: andl $3, %ecx
-; X86-NEXT: cmpl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT: sbbl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: shll $30, %edx
-; X86-NEXT: movl %edx, %ebx
-; X86-NEXT: sarl $31, %ebx
-; X86-NEXT: sarl $30, %edx
-; X86-NEXT: shrdl $1, %ebx, %edx
-; X86-NEXT: movl %edx, %edi
-; X86-NEXT: andl $1, %edi
+; X86-NEXT: addl %edi, %edi
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT: andl $3, %ecx
+; X86-NEXT: cmpl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: sbbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
+; X86-NEXT: sbbl %esi, %ebx
+; X86-NEXT: shll $30, %ebx
; X86-NEXT: movl %ebx, %edi
-; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
+; X86-NEXT: sarl $31, %edi
+; X86-NEXT: sarl $30, %ebx
+; X86-NEXT: shrdl $1, %edi, %ebx
+; X86-NEXT: movl %ebx, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
-; X86-NEXT: subl %edx, %esi
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: sbbl %ebx, %esi
-; X86-NEXT: sbbl %edi, %eax
-; X86-NEXT: andl $3, %eax
+; X86-NEXT: movl %edi, %eax
+; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
+; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
+; X86-NEXT: subl %ebx, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT: addl $-1, %edx
-; X86-NEXT: adcl $-1, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: sbbl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: sbbl %eax, %esi
+; X86-NEXT: andl $3, %esi
+; X86-NEXT: addl $-1, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
-; X86-NEXT: adcl $3, %ebx
-; X86-NEXT: andl $3, %ebx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: adcl $-1, %ebx
+; X86-NEXT: adcl $3, %edx
+; X86-NEXT: andl $3, %edx
+; X86-NEXT: movl %edi, %eax
+; X86-NEXT: orl %edx, %eax
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: orl %ebx, %edx
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
-; X86-NEXT: orl %ebx, %edx
+; X86-NEXT: orl %ebx, %eax
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: jne .LBB0_14
; X86-NEXT: .LBB0_15: # %udiv-end
; X86-NEXT: cmpb $0, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
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