[llvm] [AArch64] Increase fixed-length SVE scalarization costs (PR #226120)

[Utpal Bora via llvm-commits]

================
@@ -0,0 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=slp-vectorizer -mtriple=aarch64-none-linux-gnu \
+; RUN:   -mattr=+sve -S %s | FileCheck %s
+
+; Check that the scalarization overhead for fixed-length SVE vectors prevents
+; SLP from selecting an unprofitable wide reduction tree.
+define double @insert_into_wider_vector(double %x, double %y) vscale_range(2, 0) {
+;
+; CHECK-LABEL: @insert_into_wider_vector(
+; CHECK-NEXT:    [[MUL0:%.*]] = fmul fast double [[X:%.*]], 0.000000e+00
+; CHECK-NEXT:    [[ADD0:%.*]] = fadd reassoc nsz double 0.000000e+00, [[MUL0]]
+; CHECK-NEXT:    [[MUL1:%.*]] = fmul fast double 0.000000e+00, [[Y:%.*]]
+; CHECK-NEXT:    [[TMP13:%.*]] = fadd reassoc nsz double [[ADD0]], [[MUL1]]
+; CHECK-NEXT:    [[TMP14:%.*]] = fmul fast double 1.000000e+00, [[X]]
+; CHECK-NEXT:    [[OP_RDX19:%.*]] = fadd reassoc nsz double [[TMP13]], [[TMP14]]
+; CHECK-NEXT:    [[MUL3:%.*]] = fmul fast double 0.000000e+00, 0.000000e+00
+; CHECK-NEXT:    [[ADD3:%.*]] = fadd reassoc nsz double [[OP_RDX19]], [[MUL3]]
+; CHECK-NEXT:    [[MUL4:%.*]] = fmul fast double 1.000000e+00, 1.000000e+00
+; CHECK-NEXT:    [[ADD4:%.*]] = fadd reassoc nsz double [[ADD3]], [[MUL4]]
+; CHECK-NEXT:    [[MUL5:%.*]] = fmul fast double [[X]], [[Y]]
+; CHECK-NEXT:    [[ADD5:%.*]] = fadd reassoc nsz double [[ADD4]], [[MUL5]]
+; CHECK-NEXT:    [[ADD6:%.*]] = fadd reassoc nsz double [[ADD5]], 0.000000e+00
+; CHECK-NEXT:    [[ADD7:%.*]] = fadd reassoc nsz double [[ADD6]], 0.000000e+00
+; CHECK-NEXT:    [[MUL8:%.*]] = fmul fast double [[X]], 0.000000e+00
+; CHECK-NEXT:    [[ADD8:%.*]] = fadd reassoc nsz double [[ADD7]], [[MUL8]]
+; CHECK-NEXT:    [[MUL9:%.*]] = fmul fast double 0.000000e+00, [[Y]]
+; CHECK-NEXT:    [[ADD9:%.*]] = fadd reassoc nsz double [[ADD8]], [[MUL9]]
+; CHECK-NEXT:    [[MUL10:%.*]] = fmul fast double 1.000000e+00, [[X]]
+; CHECK-NEXT:    [[ADD10:%.*]] = fadd reassoc nsz double [[ADD9]], [[MUL10]]
+; CHECK-NEXT:    [[ADD11:%.*]] = fadd reassoc nsz double [[ADD10]], 0.000000e+00
+; CHECK-NEXT:    [[ADD12:%.*]] = fadd reassoc nsz double [[ADD11]], 1.000000e+00
+; CHECK-NEXT:    [[MUL13:%.*]] = fmul fast double [[X]], [[Y]]
+; CHECK-NEXT:    [[ADD13:%.*]] = fadd reassoc nsz double [[ADD12]], [[MUL13]]
+; CHECK-NEXT:    [[ADD14:%.*]] = fadd reassoc nsz double [[ADD13]], 0.000000e+00
+; CHECK-NEXT:    [[OP_RDX20:%.*]] = fadd reassoc nsz double [[ADD14]], 0.000000e+00
+; CHECK-NEXT:    ret double [[OP_RDX20]]
+;
+  %mul0 = fmul fast double %x, 0.0
----------------
utpalbora wrote:

Updated the test.

https://github.com/llvm/llvm-project/pull/226120