[llvm] [AMDGPU] Keep divergent i64 mul feeding an add for the mad64 fold (PR #226963)
Pankaj Dwivedi via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 29 05:10:36 PDT 2026
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@@ -1175,51 +1175,45 @@ define i64 @dot4_acc64_not_dot4(i8 %a0, i8 %a1, i8 %b0, i8 %b1, i64 %acc) {
; GFX9-DL-LABEL: dot4_acc64_not_dot4:
; GFX9-DL: ; %bb.0:
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-DL-NEXT: v_mul_hi_i32_i24_sdwa v6, sext(v0), sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
-; GFX9-DL-NEXT: v_mul_i32_i24_sdwa v0, sext(v0), sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
-; GFX9-DL-NEXT: v_mul_hi_i32_i24_sdwa v2, sext(v1), sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
-; GFX9-DL-NEXT: v_mul_i32_i24_sdwa v1, sext(v1), sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
-; GFX9-DL-NEXT: v_add_co_u32_e32 v1, vcc, v1, v4
-; GFX9-DL-NEXT: v_addc_co_u32_e32 v2, vcc, v2, v5, vcc
-; GFX9-DL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v1
-; GFX9-DL-NEXT: v_addc_co_u32_e32 v1, vcc, v6, v2, vcc
+; GFX9-DL-NEXT: v_bfe_i32 v3, v3, 0, 8
+; GFX9-DL-NEXT: v_bfe_i32 v1, v1, 0, 8
+; GFX9-DL-NEXT: v_mad_i64_i32 v[3:4], s[4:5], v1, v3, v[4:5]
+; GFX9-DL-NEXT: v_bfe_i32 v1, v2, 0, 8
+; GFX9-DL-NEXT: v_bfe_i32 v0, v0, 0, 8
+; GFX9-DL-NEXT: v_mad_i64_i32 v[0:1], s[4:5], v0, v1, v[3:4]
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PankajDwivedi-25 wrote:
Unsure which version is efficient here.
https://github.com/llvm/llvm-project/pull/226963
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