[llvm] [AMDGPU] Keep divergent i64 mul feeding an add for the mad64 fold (PR #226963)

[Pankaj Dwivedi via llvm-commits]

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@@ -1446,14 +1450,26 @@ bool AMDGPUCodeGenPrepareImpl::tryNarrowMathIfNoOverflow(Instruction *I) {
   return true;
 }
 
+// Mul24 or narrowing would hide the ISD::MUL that tryFoldToMad64_32 matches.
+bool AMDGPUCodeGenPrepareImpl::shouldKeepMulForMad64(
+    const BinaryOperator &I) const {
+  if (I.getOpcode() != Instruction::Mul || !I.getType()->isIntegerTy(64))
+    return false;
+  if (ST.getGeneration() < AMDGPUSubtarget::GFX9 || UA.isUniformAtDef(&I))
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PankajDwivedi-25 wrote:

UA.IsUniformAtUse()?

https://github.com/llvm/llvm-project/pull/226963