[llvm] [X86] LowerStore - peek through oneuse bitcasts to see if vector is freely splittable. (PR #227282)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 29 04:49:25 PDT 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/227282
Peek through bitcasts when seeing if we can avoid an unnecessary concat_vectors and store the subvectors directly - if the concat had been worth it, combineConcatVectorOps would have moved the concat further up.
Helps avoid more cases of unnecessary vzeroupper, 256-bit usage etc. in particular on AVX1 targets (Sandybridge, Jaguar and Bulldozer all benefit from this), but AVX2/512 targets as well.
>From f47b58b0399de77777231fa0d2a7c61f8b1fd842 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Tue, 29 Sep 2026 12:48:00 +0100
Subject: [PATCH] [X86] LowerStore - peek through oneuse bitcasts to see if
vector is freely splittable.
Peek through bitcasts when seeing if we can avoid an unnecessary concat_vectors and store the subvectors directly - if the concat had been worth it, combineConcatVectorOps would have moved the concat further up.
Helps avoid more cases of unnecessary vzeroupper, 256-bit usage etc. in particular on AVX1 targets (Sandybridge, Jaguar and Bulldozer all benefit from this), but AVX2/512 targets as well.
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +-
llvm/test/CodeGen/X86/frem.ll | 335 ++--
llvm/test/CodeGen/X86/half.ll | 47 +-
llvm/test/CodeGen/X86/i64-mem-copy.ll | 8 +-
llvm/test/CodeGen/X86/oddshuffles.ll | 56 +-
.../subvectorwise-store-of-vector-splat.ll | 50 +-
.../CodeGen/X86/vector-half-conversions.ll | 73 +-
.../vector-interleaved-load-i16-stride-3.ll | 1727 +++++++++--------
.../vector-interleaved-load-i16-stride-4.ll | 1284 ++++++------
.../vector-interleaved-load-i8-stride-2.ll | 134 +-
.../vector-interleaved-load-i8-stride-4.ll | 516 ++---
.../vector-interleaved-store-i16-stride-4.ll | 196 +-
.../vector-interleaved-store-i16-stride-6.ll | 838 ++++----
.../vector-interleaved-store-i16-stride-8.ll | 547 +++---
.../vector-interleaved-store-i32-stride-5.ll | 11 +-
.../vector-interleaved-store-i32-stride-6.ll | 13 +-
.../vector-interleaved-store-i32-stride-8.ll | 44 +-
.../vector-interleaved-store-i8-stride-4.ll | 146 +-
.../vector-interleaved-store-i8-stride-6.ll | 96 +-
.../vector-interleaved-store-i8-stride-8.ll | 442 +++--
.../CodeGen/X86/vector-shuffle-512-v64.ll | 4 +-
.../X86/vector-shuffle-concatenation.ll | 5 +-
.../CodeGen/X86/x86-interleaved-access.ll | 173 +-
23 files changed, 3371 insertions(+), 3377 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index ddf9241ef7956..5d0ff149337d4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26481,7 +26481,8 @@ static SDValue LowerStore(SDValue Op, const X86Subtarget &Subtarget,
// split the op into halves anyway, so the concat is purely an extra op.
MVT StoreVT = StoredVal.getSimpleValueType();
if (StoreVT.is256BitVector() || StoreVT.is512BitVector()) {
- if (StoredVal.hasOneUse() && isFreeToSplitVector(StoredVal, DAG))
+ if (StoredVal.hasOneUse() &&
+ isFreeToSplitVector(peekThroughOneUseBitcasts(StoredVal), DAG))
return splitVectorStore(St, DAG);
return SDValue();
}
diff --git a/llvm/test/CodeGen/X86/frem.ll b/llvm/test/CodeGen/X86/frem.ll
index c259a1c65d9e5..138349f1783a0 100644
--- a/llvm/test/CodeGen/X86/frem.ll
+++ b/llvm/test/CodeGen/X86/frem.ll
@@ -533,127 +533,13 @@ define void @frem_v32f16(<32 x half> %a0, <32 x half> %a1, ptr%p3) nounwind {
; CHECK-LABEL: frem_v32f16:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: subq $224, %rsp
+; CHECK-NEXT: subq $192, %rsp
; CHECK-NEXT: movq %rdi, %rbx
-; CHECK-NEXT: vmovups %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; CHECK-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; CHECK-NEXT: vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; CHECK-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; CHECK-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; CHECK-NEXT: vextractf128 $1, %ymm2, %xmm0
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; CHECK-NEXT: vzeroupper
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovd %xmm0, (%rsp) # 4-byte Folded Spill
-; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; CHECK-NEXT: vzeroupper
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
-; CHECK-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = mem[3,3,3,3]
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; CHECK-NEXT: vpshufd $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = mem[3,3,3,3]
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = mem[1,0]
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; CHECK-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = mem[1,0]
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; CHECK-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
-; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm0
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm0
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; CHECK-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: vpsrld $16, %xmm0, %xmm0
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: vpsrld $16, %xmm0, %xmm0
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq fmodf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
-; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; CHECK-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
-; CHECK-NEXT: vpunpcklqdq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
-; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
@@ -669,11 +555,11 @@ define void @frem_v32f16(<32 x half> %a0, <32 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = mem[3,3,3,3]
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
+; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: vpshufd $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = mem[3,3,3,3]
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
@@ -684,28 +570,28 @@ define void @frem_v32f16(<32 x half> %a0, <32 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovd %xmm0, (%rsp) # 4-byte Folded Spill
+; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
; CHECK-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = mem[1,0]
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
; CHECK-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = mem[1,0]
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
@@ -714,44 +600,44 @@ define void @frem_v32f16(<32 x half> %a0, <32 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm0
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovd %xmm0, (%rsp) # 4-byte Folded Spill
+; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
; CHECK-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm0
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
; CHECK-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; CHECK-NEXT: vpsrld $16, %xmm0, %xmm0
; CHECK-NEXT: vzeroupper
@@ -765,14 +651,13 @@ define void @frem_v32f16(<32 x half> %a0, <32 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf at PLT
; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; CHECK-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; CHECK-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
-; CHECK-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload
-; CHECK-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
@@ -1006,28 +891,9 @@ define void @frem_v32f16(<32 x half> %a0, <32 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
-; CHECK-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload
-; CHECK-NEXT: vmovaps %ymm0, 32(%rbx)
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; CHECK-NEXT: vmovaps %ymm0, (%rbx)
-; CHECK-NEXT: addq $224, %rsp
-; CHECK-NEXT: popq %rbx
-; CHECK-NEXT: vzeroupper
-; CHECK-NEXT: retq
- %frem = frem <32 x half> %a0, %a1
- store <32 x half> %frem, ptr%p3
- ret void
-}
-
-define void @frem_v16f16(<16 x half> %a0, <16 x half> %a1, ptr%p3) nounwind {
-; CHECK-LABEL: frem_v16f16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: subq $144, %rsp
-; CHECK-NEXT: movq %rdi, %rbx
-; CHECK-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; CHECK-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm0
+; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vzeroupper
@@ -1139,9 +1005,30 @@ define void @frem_v16f16(<16 x half> %a0, <16 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
-; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; CHECK-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: vmovdqa %xmm0, 16(%rbx)
+; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vmovaps %xmm0, (%rbx)
+; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vmovaps %xmm0, 48(%rbx)
+; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vmovaps %xmm0, 32(%rbx)
+; CHECK-NEXT: addq $192, %rsp
+; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: retq
+ %frem = frem <32 x half> %a0, %a1
+ store <32 x half> %frem, ptr%p3
+ ret void
+}
+
+define void @frem_v16f16(<16 x half> %a0, <16 x half> %a1, ptr%p3) nounwind {
+; CHECK-LABEL: frem_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pushq %rbx
+; CHECK-NEXT: addq $-128, %rsp
+; CHECK-NEXT: movq %rdi, %rbx
+; CHECK-NEXT: vmovdqu %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; CHECK-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq __extendhfsf2 at PLT
; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
@@ -1259,11 +1146,125 @@ define void @frem_v16f16(<16 x half> %a0, <16 x half> %a1, ptr%p3) nounwind {
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
-; CHECK-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload
-; CHECK-NEXT: vmovaps %ymm0, (%rbx)
-; CHECK-NEXT: addq $144, %rsp
-; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
+; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: vzeroupper
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
+; CHECK-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
+; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vzeroupper
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = mem[3,3,3,3]
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
+; CHECK-NEXT: vpshufd $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = mem[3,3,3,3]
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovd %xmm0, (%rsp) # 4-byte Folded Spill
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = mem[1,0]
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = mem[1,0]
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
+; CHECK-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
+; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm0
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovd %xmm0, (%rsp) # 4-byte Folded Spill
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm0
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
+; CHECK-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vpsrld $16, %xmm0, %xmm0
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vpsrld $16, %xmm0, %xmm0
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
+; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: callq fmodf at PLT
+; CHECK-NEXT: callq __truncsfhf2 at PLT
+; CHECK-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; CHECK-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
+; CHECK-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
+; CHECK-NEXT: vmovdqa %xmm0, 16(%rbx)
+; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; CHECK-NEXT: vmovaps %xmm0, (%rbx)
+; CHECK-NEXT: subq $-128, %rsp
+; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq
%frem = frem <16 x half> %a0, %a1
store <16 x half> %frem, ptr%p3
diff --git a/llvm/test/CodeGen/X86/half.ll b/llvm/test/CodeGen/X86/half.ll
index f9db31b6842d9..4ba14b30d4958 100644
--- a/llvm/test/CodeGen/X86/half.ll
+++ b/llvm/test/CodeGen/X86/half.ll
@@ -2027,30 +2027,29 @@ define void @pr63114() {
; BWON-F16C-LABEL: pr63114:
; BWON-F16C: # %bb.0:
; BWON-F16C-NEXT: vmovdqu (%rax), %xmm0
-; BWON-F16C-NEXT: vpsrld $16, %xmm0, %xmm1
-; BWON-F16C-NEXT: vbroadcastss (%rax), %xmm2
-; BWON-F16C-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; BWON-F16C-NEXT: vshufps {{.*#+}} xmm2 = xmm2[0,0],xmm3[0,0]
-; BWON-F16C-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm3
-; BWON-F16C-NEXT: vpsllq $48, %xmm3, %xmm4
-; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2],xmm4[3],xmm2[4,5,6,7]
-; BWON-F16C-NEXT: vpslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1]
-; BWON-F16C-NEXT: vpor %xmm3, %xmm2, %xmm2
-; BWON-F16C-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,3],xmm1[2,0]
-; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[3],xmm1[4,5,6,7]
-; BWON-F16C-NEXT: vpor %xmm3, %xmm1, %xmm1
-; BWON-F16C-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; BWON-F16C-NEXT: vpshuflw {{.*#+}} xmm2 = xmm0[0,1,3,3,4,5,6,7]
-; BWON-F16C-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,1]
-; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2],xmm4[3],xmm2[4,5,6,7]
-; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,5,6],xmm3[7]
-; BWON-F16C-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,5,5,5]
-; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2],xmm4[3],xmm0[4,5,6,7]
-; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,6],xmm3[7]
-; BWON-F16C-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; BWON-F16C-NEXT: vmovups %ymm0, 0
-; BWON-F16C-NEXT: vmovups %ymm1, 32
-; BWON-F16C-NEXT: vzeroupper
+; BWON-F16C-NEXT: vbroadcastss (%rax), %xmm1
+; BWON-F16C-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; BWON-F16C-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[0,0]
+; BWON-F16C-NEXT: vpsrld $16, %xmm0, %xmm2
+; BWON-F16C-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[0,1,3,3,4,5,6,7]
+; BWON-F16C-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,0,2,1]
+; BWON-F16C-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm4
+; BWON-F16C-NEXT: vpsllq $48, %xmm4, %xmm5
+; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2],xmm5[3],xmm3[4,5,6,7]
+; BWON-F16C-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1]
+; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,5,6],xmm4[7]
+; BWON-F16C-NEXT: vpshufhw {{.*#+}} xmm6 = xmm0[0,1,2,3,5,5,5,5]
+; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2],xmm5[3],xmm6[4,5,6,7]
+; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4,5,6],xmm4[7]
+; BWON-F16C-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,3],xmm2[2,0]
+; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2],xmm5[3],xmm0[4,5,6,7]
+; BWON-F16C-NEXT: vpor %xmm4, %xmm0, %xmm0
+; BWON-F16C-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2],xmm5[3],xmm1[4,5,6,7]
+; BWON-F16C-NEXT: vpor %xmm4, %xmm1, %xmm1
+; BWON-F16C-NEXT: vmovdqu %xmm1, 48
+; BWON-F16C-NEXT: vmovdqu %xmm0, 32
+; BWON-F16C-NEXT: vmovdqu %xmm6, 0
+; BWON-F16C-NEXT: vmovdqu %xmm3, 16
; BWON-F16C-NEXT: retq
;
; CHECK-I686-LABEL: pr63114:
diff --git a/llvm/test/CodeGen/X86/i64-mem-copy.ll b/llvm/test/CodeGen/X86/i64-mem-copy.ll
index 4cdb079d43993..9b866183d88ed 100644
--- a/llvm/test/CodeGen/X86/i64-mem-copy.ll
+++ b/llvm/test/CodeGen/X86/i64-mem-copy.ll
@@ -148,13 +148,13 @@ define void @PR23476(<5 x i64> %in, ptr %out, i32 %index) nounwind {
; X86AVX-NEXT: movl %esp, %ebp
; X86AVX-NEXT: andl $-32, %esp
; X86AVX-NEXT: subl $96, %esp
-; X86AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; X86AVX-NEXT: movl 52(%ebp), %eax
; X86AVX-NEXT: andl $7, %eax
; X86AVX-NEXT: movl 48(%ebp), %ecx
-; X86AVX-NEXT: vmovups 8(%ebp), %ymm1
-; X86AVX-NEXT: vmovaps %ymm1, (%esp)
-; X86AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp)
+; X86AVX-NEXT: vmovups 8(%ebp), %ymm0
+; X86AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; X86AVX-NEXT: vmovaps %xmm1, {{[0-9]+}}(%esp)
+; X86AVX-NEXT: vmovaps %ymm0, (%esp)
; X86AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; X86AVX-NEXT: vmovsd %xmm0, (%ecx)
; X86AVX-NEXT: movl %ebp, %esp
diff --git a/llvm/test/CodeGen/X86/oddshuffles.ll b/llvm/test/CodeGen/X86/oddshuffles.ll
index b58c319f6f506..63104b75b900d 100644
--- a/llvm/test/CodeGen/X86/oddshuffles.ll
+++ b/llvm/test/CodeGen/X86/oddshuffles.ll
@@ -2412,22 +2412,22 @@ define void @D107009(ptr %input, ptr %output) {
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,1,1,3]
-; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,1,3,3]
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
-; AVX1-NEXT: vshufps {{.*#+}} ymm3 = ymm0[3,3,3,3,7,7,7,7]
-; AVX1-NEXT: vshufpd {{.*#+}} ymm4 = ymm0[0,0,3,2]
-; AVX1-NEXT: vmovshdup {{.*#+}} ymm5 = ymm0[1,1,3,3,5,5,7,7]
-; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm1[3,3,3,3]
-; AVX1-NEXT: vpshufd {{.*#+}} xmm7 = xmm1[1,1,1,1]
+; AVX1-NEXT: vshufps {{.*#+}} ymm2 = ymm0[3,3,3,3,7,7,7,7]
+; AVX1-NEXT: vshufpd {{.*#+}} ymm3 = ymm0[0,0,3,2]
+; AVX1-NEXT: vmovshdup {{.*#+}} ymm4 = ymm0[1,1,3,3,5,5,7,7]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm1[2,1,3,3]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm1[0,1,1,3]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm7 = xmm1[3,3,3,3]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[1,1,1,1]
; AVX1-NEXT: vmovdqa %xmm1, 16(%rsi)
-; AVX1-NEXT: vmovdqa %xmm7, 48(%rsi)
-; AVX1-NEXT: vmovdqa %xmm6, 112(%rsi)
+; AVX1-NEXT: vmovdqa %xmm8, 48(%rsi)
+; AVX1-NEXT: vmovdqa %xmm7, 112(%rsi)
+; AVX1-NEXT: vmovdqa %xmm6, 64(%rsi)
+; AVX1-NEXT: vmovdqa %xmm5, 80(%rsi)
; AVX1-NEXT: vmovups %ymm0, 128(%rsi)
-; AVX1-NEXT: vmovups %ymm5, 160(%rsi)
-; AVX1-NEXT: vmovupd %ymm4, 192(%rsi)
-; AVX1-NEXT: vmovupd %ymm3, 224(%rsi)
-; AVX1-NEXT: vmovups %ymm2, 64(%rsi)
+; AVX1-NEXT: vmovups %ymm4, 160(%rsi)
+; AVX1-NEXT: vmovupd %ymm3, 192(%rsi)
+; AVX1-NEXT: vmovupd %ymm2, 224(%rsi)
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -2480,22 +2480,22 @@ define void @D107009(ptr %input, ptr %output) {
; XOP-NEXT: vextractf128 $1, %ymm0, %xmm0
; XOP-NEXT: vpsrld $16, %xmm0, %xmm0
; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; XOP-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,1,1,3]
-; XOP-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,1,3,3]
-; XOP-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
-; XOP-NEXT: vshufps {{.*#+}} ymm3 = ymm0[3,3,3,3,7,7,7,7]
-; XOP-NEXT: vshufpd {{.*#+}} ymm4 = ymm0[0,0,3,2]
-; XOP-NEXT: vmovshdup {{.*#+}} ymm5 = ymm0[1,1,3,3,5,5,7,7]
-; XOP-NEXT: vpshufd {{.*#+}} xmm6 = xmm1[3,3,3,3]
-; XOP-NEXT: vpshufd {{.*#+}} xmm7 = xmm1[1,1,1,1]
+; XOP-NEXT: vshufps {{.*#+}} ymm2 = ymm0[3,3,3,3,7,7,7,7]
+; XOP-NEXT: vshufpd {{.*#+}} ymm3 = ymm0[0,0,3,2]
+; XOP-NEXT: vmovshdup {{.*#+}} ymm4 = ymm0[1,1,3,3,5,5,7,7]
+; XOP-NEXT: vpshufd {{.*#+}} xmm5 = xmm1[2,1,3,3]
+; XOP-NEXT: vpshufd {{.*#+}} xmm6 = xmm1[0,1,1,3]
+; XOP-NEXT: vpshufd {{.*#+}} xmm7 = xmm1[3,3,3,3]
+; XOP-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[1,1,1,1]
; XOP-NEXT: vmovdqa %xmm1, 16(%rsi)
-; XOP-NEXT: vmovdqa %xmm7, 48(%rsi)
-; XOP-NEXT: vmovdqa %xmm6, 112(%rsi)
+; XOP-NEXT: vmovdqa %xmm8, 48(%rsi)
+; XOP-NEXT: vmovdqa %xmm7, 112(%rsi)
+; XOP-NEXT: vmovdqa %xmm6, 64(%rsi)
+; XOP-NEXT: vmovdqa %xmm5, 80(%rsi)
; XOP-NEXT: vmovups %ymm0, 128(%rsi)
-; XOP-NEXT: vmovups %ymm5, 160(%rsi)
-; XOP-NEXT: vmovupd %ymm4, 192(%rsi)
-; XOP-NEXT: vmovupd %ymm3, 224(%rsi)
-; XOP-NEXT: vmovups %ymm2, 64(%rsi)
+; XOP-NEXT: vmovups %ymm4, 160(%rsi)
+; XOP-NEXT: vmovupd %ymm3, 192(%rsi)
+; XOP-NEXT: vmovupd %ymm2, 224(%rsi)
; XOP-NEXT: vzeroupper
; XOP-NEXT: retq
%i = load <64 x i32>, ptr %input, align 16
diff --git a/llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll b/llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
index dfd08cbe7baec..18afb8e4d8752 100644
--- a/llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
+++ b/llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
@@ -817,9 +817,8 @@ define void @vec256_v2i8(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.p
; AVX1-NEXT: vpextrw $0, %xmm0, (%rsi)
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT: vmovaps %ymm0, (%rdx)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: retq
;
; AVX2-LABEL: vec256_v2i8:
@@ -984,9 +983,8 @@ define void @vec256_v2i32(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT: vmovaps %ymm0, (%rdx)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec256_v2i32:
@@ -1060,9 +1058,8 @@ define void @vec256_v2f32(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT: vmovaps %ymm0, (%rdx)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec256_v2f32:
@@ -1336,9 +1333,8 @@ define void @vec256_v4i16(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT: vmovaps %ymm0, (%rdx)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec256_v4i16:
@@ -1531,9 +1527,8 @@ define void @vec256_v8i8(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.p
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT: vmovaps %ymm0, (%rdx)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec256_v8i8:
@@ -1940,10 +1935,9 @@ define void @vec384_v2i8(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.p
; AVX1-NEXT: vpextrw $0, %xmm0, (%rsi)
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
-; AVX1-NEXT: vmovaps %ymm1, (%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: vmovdqa %xmm0, 32(%rdx)
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: vec384_v2i8:
@@ -2149,10 +2143,9 @@ define void @vec384_v2i32(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
-; AVX1-NEXT: vmovaps %ymm1, (%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: vmovdqa %xmm0, 32(%rdx)
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec384_v2i32:
@@ -2237,10 +2230,9 @@ define void @vec384_v2f32(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
-; AVX1-NEXT: vmovaps %ymm1, (%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: vmovdqa %xmm0, 32(%rdx)
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec384_v2f32:
@@ -3576,10 +3568,9 @@ define void @vec384_v4i16(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
-; AVX1-NEXT: vmovaps %ymm1, (%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: vmovdqa %xmm0, 32(%rdx)
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec384_v4i16:
@@ -4307,10 +4298,9 @@ define void @vec384_v8i8(ptr %in.subvec.ptr, ptr %out.subvec.ptr, ptr %out.vec.p
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovq %xmm0, (%rsi)
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
-; AVX1-NEXT: vmovaps %ymm1, (%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rdx)
+; AVX1-NEXT: vmovdqa %xmm0, (%rdx)
; AVX1-NEXT: vmovdqa %xmm0, 32(%rdx)
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-ONLY-LABEL: vec384_v8i8:
diff --git a/llvm/test/CodeGen/X86/vector-half-conversions.ll b/llvm/test/CodeGen/X86/vector-half-conversions.ll
index 8048985ccb1ff..61a0a098faf28 100644
--- a/llvm/test/CodeGen/X86/vector-half-conversions.ll
+++ b/llvm/test/CodeGen/X86/vector-half-conversions.ll
@@ -2853,7 +2853,7 @@ define void @store_cvt_16f32_to_16i16(<16 x float> %a0, ptr %a1) nounwind {
; AVX1-NEXT: movq %rdi, %rbx
; AVX1-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX1-NEXT: vzeroupper
@@ -2949,11 +2949,11 @@ define void @store_cvt_16f32_to_16i16(<16 x float> %a0, ptr %a1) nounwind {
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX1-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0]
-; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload
-; AVX1-NEXT: vmovaps %ymm0, (%rbx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rbx)
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vmovaps %xmm0, (%rbx)
; AVX1-NEXT: addq $112, %rsp
; AVX1-NEXT: popq %rbx
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: store_cvt_16f32_to_16i16:
@@ -4500,7 +4500,7 @@ define void @store_cvt_32f32_to_32f16(<32 x float> %a0, ptr %a1) nounwind {
; AVX1-NEXT: vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX1-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
+; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm0
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX1-NEXT: vzeroupper
@@ -4596,53 +4596,52 @@ define void @store_cvt_32f32_to_32f16(<32 x float> %a0, ptr %a1) nounwind {
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX1-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0]
-; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload
-; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,0]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; AVX1-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[3,3,3,3]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,0]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; AVX1-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX1-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0]
@@ -4653,55 +4652,57 @@ define void @store_cvt_32f32_to_32f16(<32 x float> %a0, ptr %a1) nounwind {
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,0]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; AVX1-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[3,3,3,3]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,0]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpcklwd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
-; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq __truncsfhf2 at PLT
-; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; AVX1-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX1-NEXT: vpunpckldq (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX1-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX1-NEXT: # xmm0 = xmm0[0],mem[0]
-; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload
-; AVX1-NEXT: vmovaps %ymm0, 32(%rbx)
-; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; AVX1-NEXT: vmovaps %ymm0, (%rbx)
+; AVX1-NEXT: vmovdqa %xmm0, 16(%rbx)
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vmovaps %xmm0, (%rbx)
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vmovaps %xmm0, 48(%rbx)
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vmovaps %xmm0, 32(%rbx)
; AVX1-NEXT: addq $176, %rsp
; AVX1-NEXT: popq %rbx
-; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: store_cvt_32f32_to_32f16:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
index c0ed047c2a3ca..bb5d2e642c8e8 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
@@ -822,14 +822,13 @@ define void @load_i16_stride3_vf16(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpshufb {{.*#+}} xmm8 = xmm8[0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm8[0,1,2,3,4,5],xmm7[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm7, %ymm2
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm0[0,1],xmm1[2],xmm0[3,4],xmm1[5],xmm0[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0],xmm6[1],xmm7[2,3],xmm6[4],xmm7[5,6],xmm6[7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm3[0,1],xmm4[2],xmm3[3,4],xmm4[5],xmm3[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm5[0],xmm7[1,2],xmm5[3],xmm7[4,5],xmm5[6],xmm7[7]
; AVX-NEXT: vmovdqa {{.*#+}} xmm8 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13]
; AVX-NEXT: vpshufb %xmm8, %xmm7, %xmm7
-; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm3[0,1],xmm4[2],xmm3[3,4],xmm4[5],xmm3[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm5[0],xmm9[1,2],xmm5[3],xmm9[4,5],xmm5[6],xmm9[7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm0[0,1],xmm1[2],xmm0[3,4],xmm1[5],xmm0[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm9[0],xmm6[1],xmm9[2,3],xmm6[4],xmm9[5,6],xmm6[7]
; AVX-NEXT: vpshufb %xmm8, %xmm9, %xmm8
-; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm8, %ymm7
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3],xmm0[4],xmm1[5,6],xmm0[7]
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u,u,u,0,1,6,7,12,13,2,3,8,9,14,15]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm6[2,1,2,3]
@@ -840,7 +839,8 @@ define void @load_i16_stride3_vf16(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: vmovaps %ymm2, (%rsi)
-; AVX-NEXT: vmovaps %ymm7, (%rdx)
+; AVX-NEXT: vmovdqa %xmm8, 16(%rdx)
+; AVX-NEXT: vmovdqa %xmm7, (%rdx)
; AVX-NEXT: vmovaps %ymm0, (%rcx)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@@ -1499,21 +1499,20 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpblendw {{.*#+}} xmm14 = xmm14[0,1,2,3,4,5],xmm15[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm0
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm14 = xmm2[0,1],xmm5[2],xmm2[3,4],xmm5[5],xmm2[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm14 = xmm14[0],xmm6[1],xmm14[2,3],xmm6[4],xmm14[5,6],xmm6[7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm15 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13]
-; AVX-NEXT: vpshufb %xmm15, %xmm14, %xmm14
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm3[2],xmm1[3,4],xmm3[5],xmm1[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm0[1,2],xmm4[3],xmm0[4,5],xmm4[6],xmm0[7]
-; AVX-NEXT: vpshufb %xmm15, %xmm0, %xmm0
-; AVX-NEXT: vinsertf128 $1, %xmm14, %ymm0, %ymm14
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm7[0,1],xmm8[2],xmm7[3,4],xmm8[5],xmm7[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm9[1],xmm0[2,3],xmm9[4],xmm0[5,6],xmm9[7]
-; AVX-NEXT: vpshufb %xmm15, %xmm0, %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm13 = xmm1[0,1],xmm3[2],xmm1[3,4],xmm3[5],xmm1[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm13 = xmm4[0],xmm13[1,2],xmm4[3],xmm13[4,5],xmm4[6],xmm13[7]
+; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13]
+; AVX-NEXT: vpshufb %xmm0, %xmm13, %xmm13
+; AVX-NEXT: vmovdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm15 = xmm2[0,1],xmm5[2],xmm2[3,4],xmm5[5],xmm2[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm15 = xmm15[0],xmm6[1],xmm15[2,3],xmm6[4],xmm15[5,6],xmm6[7]
+; AVX-NEXT: vpshufb %xmm0, %xmm15, %xmm15
; AVX-NEXT: vpblendw {{.*#+}} xmm13 = xmm11[0,1],xmm10[2],xmm11[3,4],xmm10[5],xmm11[6,7]
; AVX-NEXT: vpblendw {{.*#+}} xmm13 = xmm12[0],xmm13[1,2],xmm12[3],xmm13[4,5],xmm12[6],xmm13[7]
-; AVX-NEXT: vpshufb %xmm15, %xmm13, %xmm13
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm13, %ymm0
+; AVX-NEXT: vpshufb %xmm0, %xmm13, %xmm13
+; AVX-NEXT: vpblendw {{.*#+}} xmm14 = xmm7[0,1],xmm8[2],xmm7[3,4],xmm8[5],xmm7[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm14 = xmm14[0],xmm9[1],xmm14[2,3],xmm9[4],xmm14[5,6],xmm9[7]
+; AVX-NEXT: vpshufb %xmm0, %xmm14, %xmm0
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm5[0],xmm2[1],xmm5[2,3],xmm2[4],xmm5[5,6],xmm2[7]
; AVX-NEXT: vmovdqa {{.*#+}} xmm5 = [u,u,u,u,0,1,6,7,12,13,2,3,8,9,14,15]
; AVX-NEXT: vpshufb %xmm5, %xmm2, %xmm2
@@ -1538,8 +1537,11 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vmovaps %ymm3, 32(%rsi)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm3, (%rsi)
-; AVX-NEXT: vmovaps %ymm0, 32(%rdx)
-; AVX-NEXT: vmovaps %ymm14, (%rdx)
+; AVX-NEXT: vmovdqa %xmm0, 48(%rdx)
+; AVX-NEXT: vmovdqa %xmm13, 32(%rdx)
+; AVX-NEXT: vmovdqa %xmm15, 16(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm0, (%rdx)
; AVX-NEXT: vmovaps %ymm2, 32(%rcx)
; AVX-NEXT: vmovaps %ymm1, (%rcx)
; AVX-NEXT: vzeroupper
@@ -1800,10 +1802,10 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-LABEL: load_i16_stride3_vf32:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512-NEXT: vmovdqa64 128(%rdi), %ymm5
-; AVX512-NEXT: vmovdqa64 160(%rdi), %ymm6
+; AVX512-NEXT: vmovdqa64 128(%rdi), %ymm6
+; AVX512-NEXT: vmovdqa64 160(%rdi), %ymm7
; AVX512-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm1 = ymm5 ^ (ymm1 & (ymm6 ^ ymm5))
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm1 = ymm6 ^ (ymm1 & (ymm7 ^ ymm6))
; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
; AVX512-NEXT: vpshufb {{.*#+}} ymm3 = ymm1[u,u,u,u,u,u,u,u,u,u,u,u,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
@@ -1811,7 +1813,7 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-NEXT: vmovdqa 96(%rdi), %xmm2
; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm2[0],xmm1[1],xmm2[2,3],xmm1[4],xmm2[5,6],xmm1[7]
; AVX512-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm7 = ymm4[0,1,2],ymm3[3,4,5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm4[0,1,2],ymm3[3,4,5,6,7]
; AVX512-NEXT: vmovdqa (%rdi), %ymm8
; AVX512-NEXT: vmovdqa 32(%rdi), %ymm9
; AVX512-NEXT: vmovdqa %ymm0, %ymm3
@@ -1827,17 +1829,17 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-NEXT: vpblendw {{.*#+}} ymm11 = ymm10[0,1,2],ymm11[3,4,5,6,7],ymm10[8,9,10],ymm11[11,12,13,14,15]
; AVX512-NEXT: vpshufhw {{.*#+}} xmm10 = xmm10[0,1,2,3,6,5,4,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm10 = ymm10[0,1,2,3],ymm11[4,5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm7, %zmm10, %zmm7
-; AVX512-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm10 = ymm6 ^ (ymm10 & (ymm5 ^ ymm6))
-; AVX512-NEXT: vpermq {{.*#+}} ymm11 = ymm10[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm10 = ymm10[0,1],ymm11[2],ymm10[3,4],ymm11[5],ymm10[6,7,8,9],ymm11[10],ymm10[11,12],ymm11[13],ymm10[14,15]
+; AVX512-NEXT: vinserti64x4 $1, %ymm5, %zmm10, %zmm10
+; AVX512-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm5 = ymm7 ^ (ymm5 & (ymm6 ^ ymm7))
+; AVX512-NEXT: vpermq {{.*#+}} ymm11 = ymm5[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm11[2],ymm5[3,4],ymm11[5],ymm5[6,7,8,9],ymm11[10],ymm5[11,12],ymm11[13],ymm5[14,15]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm11 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512-NEXT: vpshufb %ymm11, %ymm10, %ymm10
+; AVX512-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX512-NEXT: vpblendw {{.*#+}} xmm12 = xmm2[0,1],xmm1[2],xmm2[3,4],xmm1[5],xmm2[6,7]
; AVX512-NEXT: vpshufb %xmm11, %xmm12, %xmm11
-; AVX512-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm10[5,6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm10 = ymm11[0,1,2,3],ymm10[4,5,6,7]
+; AVX512-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm5[5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm11[0,1,2,3],ymm5[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm11 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
; AVX512-NEXT: vmovdqa %ymm11, %ymm12
; AVX512-NEXT: vpternlogq {{.*#+}} ymm12 = ymm8 ^ (ymm12 & (ymm9 ^ ymm8))
@@ -1850,27 +1852,27 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-NEXT: vpblendw {{.*#+}} ymm13 = ymm12[0,1,2],ymm13[3,4,5,6,7],ymm12[8,9,10],ymm13[11,12,13,14,15]
; AVX512-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,5,6,7,4]
; AVX512-NEXT: vpblendd {{.*#+}} ymm12 = ymm12[0,1,2,3],ymm13[4,5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm10, %zmm12, %zmm10
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm11 = ymm5 ^ (ymm11 & (ymm6 ^ ymm5))
-; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm11[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm11[1,2],ymm5[3],ymm11[4,5],ymm5[6],ymm11[7],ymm5[8],ymm11[9,10],ymm5[11],ymm11[12,13],ymm5[14],ymm11[15]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm6 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm11 = ymm6 ^ (ymm11 & (ymm7 ^ ymm6))
+; AVX512-NEXT: vpermq {{.*#+}} ymm6 = ymm11[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0],ymm11[1,2],ymm6[3],ymm11[4,5],ymm6[6],ymm11[7],ymm6[8],ymm11[9,10],ymm6[11],ymm11[12,13],ymm6[14],ymm11[15]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm7 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512-NEXT: vpshufb %ymm7, %ymm6, %ymm6
; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2],xmm1[3,4],xmm2[5],xmm1[6,7]
-; AVX512-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm5[5,6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm5[4,5,6,7]
+; AVX512-NEXT: vpshufb %xmm7, %xmm1, %xmm1
+; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm6[5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm6[4,5,6,7]
; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm8 ^ (ymm0 & (ymm9 ^ ymm8))
; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm0[2,3,0,1]
; AVX512-NEXT: vpblendw {{.*#+}} ymm0 = ymm2[0],ymm0[1,2],ymm2[3],ymm0[4,5],ymm2[6],ymm0[7],ymm2[8],ymm0[9,10],ymm2[11],ymm0[12,13],ymm2[14],ymm0[15]
-; AVX512-NEXT: vpshufb %ymm6, %ymm0, %ymm0
+; AVX512-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1],xmm4[2,3],xmm3[4],xmm4[5,6],xmm3[7]
-; AVX512-NEXT: vpshufb %xmm6, %xmm2, %xmm2
+; AVX512-NEXT: vpshufb %xmm7, %xmm2, %xmm2
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm2[5,6,7]
; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm7, (%rsi)
-; AVX512-NEXT: vmovdqa64 %zmm10, (%rdx)
+; AVX512-NEXT: vmovdqa64 %zmm10, (%rsi)
+; AVX512-NEXT: vmovdqa %ymm5, 32(%rdx)
+; AVX512-NEXT: vmovdqa %ymm12, (%rdx)
; AVX512-NEXT: vmovdqa64 %zmm0, (%rcx)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
@@ -1878,10 +1880,10 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-FCP-LABEL: load_i16_stride3_vf32:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512-FCP-NEXT: vmovdqa64 128(%rdi), %ymm5
-; AVX512-FCP-NEXT: vmovdqa64 160(%rdi), %ymm6
+; AVX512-FCP-NEXT: vmovdqa64 128(%rdi), %ymm6
+; AVX512-FCP-NEXT: vmovdqa64 160(%rdi), %ymm7
; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm5 ^ (ymm1 & (ymm6 ^ ymm5))
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm6 ^ (ymm1 & (ymm7 ^ ymm6))
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm3 = ymm1[u,u,u,u,u,u,u,u,u,u,u,u,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
@@ -1889,7 +1891,7 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-FCP-NEXT: vmovdqa 96(%rdi), %xmm2
; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm2[0],xmm1[1],xmm2[2,3],xmm1[4],xmm2[5,6],xmm1[7]
; AVX512-FCP-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm4[0,1,2],ymm3[3,4,5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm4[0,1,2],ymm3[3,4,5,6,7]
; AVX512-FCP-NEXT: vmovdqa (%rdi), %ymm8
; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %ymm9
; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm3
@@ -1905,17 +1907,17 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm11 = ymm10[0,1,2],ymm11[3,4,5,6,7],ymm10[8,9,10],ymm11[11,12,13,14,15]
; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm10 = xmm10[0,1,2,3,6,5,4,7]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm10[0,1,2,3],ymm11[4,5,6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm10, %zmm7
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm10 = ymm6 ^ (ymm10 & (ymm5 ^ ymm6))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm11 = ymm10[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm10 = ymm10[0,1],ymm11[2],ymm10[3,4],ymm11[5],ymm10[6,7,8,9],ymm11[10],ymm10[11,12],ymm11[13],ymm10[14,15]
+; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm10, %zmm10
+; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm7 ^ (ymm5 & (ymm6 ^ ymm7))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm11 = ymm5[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm11[2],ymm5[3,4],ymm11[5],ymm5[6,7,8,9],ymm11[10],ymm5[11,12],ymm11[13],ymm5[14,15]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm10, %ymm10
+; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm2[0,1],xmm1[2],xmm2[3,4],xmm1[5],xmm2[6,7]
; AVX512-FCP-NEXT: vpshufb %xmm11, %xmm12, %xmm11
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm10[5,6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm11[0,1,2,3],ymm10[4,5,6,7]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm5[5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm11[0,1,2,3],ymm5[4,5,6,7]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
; AVX512-FCP-NEXT: vmovdqa %ymm11, %ymm12
; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm8 ^ (ymm12 & (ymm9 ^ ymm8))
@@ -1928,27 +1930,27 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm13 = ymm12[0,1,2],ymm13[3,4,5,6,7],ymm12[8,9,10],ymm13[11,12,13,14,15]
; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,5,6,7,4]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm12 = ymm12[0,1,2,3],ymm13[4,5,6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm10, %zmm12, %zmm10
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm11 = ymm5 ^ (ymm11 & (ymm6 ^ ymm5))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm11[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm11[1,2],ymm5[3],ymm11[4,5],ymm5[6],ymm11[7],ymm5[8],ymm11[9,10],ymm5[11],ymm11[12,13],ymm5[14],ymm11[15]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm11 = ymm6 ^ (ymm11 & (ymm7 ^ ymm6))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm6 = ymm11[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0],ymm11[1,2],ymm6[3],ymm11[4,5],ymm6[6],ymm11[7],ymm6[8],ymm11[9,10],ymm6[11],ymm11[12,13],ymm6[14],ymm11[15]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm6, %ymm6
; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2],xmm1[3,4],xmm2[5],xmm1[6,7]
-; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm5[5,6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm5[4,5,6,7]
+; AVX512-FCP-NEXT: vpshufb %xmm7, %xmm1, %xmm1
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm6[5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm6[4,5,6,7]
; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm8 ^ (ymm0 & (ymm9 ^ ymm8))
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm0[2,3,0,1]
; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm2[0],ymm0[1,2],ymm2[3],ymm0[4,5],ymm2[6],ymm0[7],ymm2[8],ymm0[9,10],ymm2[11],ymm0[12,13],ymm2[14],ymm0[15]
-; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm0, %ymm0
+; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1],xmm4[2,3],xmm3[4],xmm4[5,6],xmm3[7]
-; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm2, %xmm2
+; AVX512-FCP-NEXT: vpshufb %xmm7, %xmm2, %xmm2
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [0,1,2,3,4,9,10,11]
; AVX512-FCP-NEXT: vpermi2d %ymm2, %ymm0, %ymm3
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm3, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm7, (%rsi)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm10, (%rdx)
+; AVX512-FCP-NEXT: vmovdqa64 %zmm10, (%rsi)
+; AVX512-FCP-NEXT: vmovdqa %ymm5, 32(%rdx)
+; AVX512-FCP-NEXT: vmovdqa %ymm12, (%rdx)
; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%rcx)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
@@ -1956,10 +1958,10 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-LABEL: load_i16_stride3_vf32:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512DQ-NEXT: vmovdqa64 128(%rdi), %ymm5
-; AVX512DQ-NEXT: vmovdqa64 160(%rdi), %ymm6
+; AVX512DQ-NEXT: vmovdqa64 128(%rdi), %ymm6
+; AVX512DQ-NEXT: vmovdqa64 160(%rdi), %ymm7
; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm5 ^ (ymm1 & (ymm6 ^ ymm5))
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm6 ^ (ymm1 & (ymm7 ^ ymm6))
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm3 = ymm1[u,u,u,u,u,u,u,u,u,u,u,u,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
@@ -1967,7 +1969,7 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-NEXT: vmovdqa 96(%rdi), %xmm2
; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm2[0],xmm1[1],xmm2[2,3],xmm1[4],xmm2[5,6],xmm1[7]
; AVX512DQ-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm7 = ymm4[0,1,2],ymm3[3,4,5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm4[0,1,2],ymm3[3,4,5,6,7]
; AVX512DQ-NEXT: vmovdqa (%rdi), %ymm8
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm9
; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm3
@@ -1983,17 +1985,17 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm11 = ymm10[0,1,2],ymm11[3,4,5,6,7],ymm10[8,9,10],ymm11[11,12,13,14,15]
; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm10 = xmm10[0,1,2,3,6,5,4,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm10 = ymm10[0,1,2,3],ymm11[4,5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm7, %zmm10, %zmm7
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm10 = ymm6 ^ (ymm10 & (ymm5 ^ ymm6))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm11 = ymm10[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm10 = ymm10[0,1],ymm11[2],ymm10[3,4],ymm11[5],ymm10[6,7,8,9],ymm11[10],ymm10[11,12],ymm11[13],ymm10[14,15]
+; AVX512DQ-NEXT: vinserti64x4 $1, %ymm5, %zmm10, %zmm10
+; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm5 = ymm7 ^ (ymm5 & (ymm6 ^ ymm7))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm11 = ymm5[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm11[2],ymm5[3,4],ymm11[5],ymm5[6,7,8,9],ymm11[10],ymm5[11,12],ymm11[13],ymm5[14,15]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm11 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm10, %ymm10
+; AVX512DQ-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm12 = xmm2[0,1],xmm1[2],xmm2[3,4],xmm1[5],xmm2[6,7]
; AVX512DQ-NEXT: vpshufb %xmm11, %xmm12, %xmm11
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm10[5,6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm10 = ymm11[0,1,2,3],ymm10[4,5,6,7]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm5[5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm11[0,1,2,3],ymm5[4,5,6,7]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm11 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
; AVX512DQ-NEXT: vmovdqa %ymm11, %ymm12
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm12 = ymm8 ^ (ymm12 & (ymm9 ^ ymm8))
@@ -2006,27 +2008,27 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm13 = ymm12[0,1,2],ymm13[3,4,5,6,7],ymm12[8,9,10],ymm13[11,12,13,14,15]
; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,5,6,7,4]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm12 = ymm12[0,1,2,3],ymm13[4,5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm10, %zmm12, %zmm10
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm11 = ymm5 ^ (ymm11 & (ymm6 ^ ymm5))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm11[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm11[1,2],ymm5[3],ymm11[4,5],ymm5[6],ymm11[7],ymm5[8],ymm11[9,10],ymm5[11],ymm11[12,13],ymm5[14],ymm11[15]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm6 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512DQ-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm11 = ymm6 ^ (ymm11 & (ymm7 ^ ymm6))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm6 = ymm11[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0],ymm11[1,2],ymm6[3],ymm11[4,5],ymm6[6],ymm11[7],ymm6[8],ymm11[9,10],ymm6[11],ymm11[12,13],ymm6[14],ymm11[15]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm7 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512DQ-NEXT: vpshufb %ymm7, %ymm6, %ymm6
; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2],xmm1[3,4],xmm2[5],xmm1[6,7]
-; AVX512DQ-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm5[5,6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm5[4,5,6,7]
+; AVX512DQ-NEXT: vpshufb %xmm7, %xmm1, %xmm1
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm6[5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm6[4,5,6,7]
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm8 ^ (ymm0 & (ymm9 ^ ymm8))
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm0[2,3,0,1]
; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm0 = ymm2[0],ymm0[1,2],ymm2[3],ymm0[4,5],ymm2[6],ymm0[7],ymm2[8],ymm0[9,10],ymm2[11],ymm0[12,13],ymm2[14],ymm0[15]
-; AVX512DQ-NEXT: vpshufb %ymm6, %ymm0, %ymm0
+; AVX512DQ-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1],xmm4[2,3],xmm3[4],xmm4[5,6],xmm3[7]
-; AVX512DQ-NEXT: vpshufb %xmm6, %xmm2, %xmm2
+; AVX512DQ-NEXT: vpshufb %xmm7, %xmm2, %xmm2
; AVX512DQ-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm2[5,6,7]
; AVX512DQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm7, (%rsi)
-; AVX512DQ-NEXT: vmovdqa64 %zmm10, (%rdx)
+; AVX512DQ-NEXT: vmovdqa64 %zmm10, (%rsi)
+; AVX512DQ-NEXT: vmovdqa %ymm5, 32(%rdx)
+; AVX512DQ-NEXT: vmovdqa %ymm12, (%rdx)
; AVX512DQ-NEXT: vmovdqa64 %zmm0, (%rcx)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
@@ -2034,10 +2036,10 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-FCP-LABEL: load_i16_stride3_vf32:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512DQ-FCP-NEXT: vmovdqa64 128(%rdi), %ymm5
-; AVX512DQ-FCP-NEXT: vmovdqa64 160(%rdi), %ymm6
+; AVX512DQ-FCP-NEXT: vmovdqa64 128(%rdi), %ymm6
+; AVX512DQ-FCP-NEXT: vmovdqa64 160(%rdi), %ymm7
; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm5 ^ (ymm1 & (ymm6 ^ ymm5))
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm6 ^ (ymm1 & (ymm7 ^ ymm6))
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm3 = ymm1[u,u,u,u,u,u,u,u,u,u,u,u,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
@@ -2045,7 +2047,7 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdi), %xmm2
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm2[0],xmm1[1],xmm2[2,3],xmm1[4],xmm2[5,6],xmm1[7]
; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm4[0,1,2],ymm3[3,4,5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm4[0,1,2],ymm3[3,4,5,6,7]
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %ymm8
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %ymm9
; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm3
@@ -2061,17 +2063,17 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm11 = ymm10[0,1,2],ymm11[3,4,5,6,7],ymm10[8,9,10],ymm11[11,12,13,14,15]
; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm10 = xmm10[0,1,2,3,6,5,4,7]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm10[0,1,2,3],ymm11[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm10, %zmm7
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm10 = ymm6 ^ (ymm10 & (ymm5 ^ ymm6))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm11 = ymm10[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm10 = ymm10[0,1],ymm11[2],ymm10[3,4],ymm11[5],ymm10[6,7,8,9],ymm11[10],ymm10[11,12],ymm11[13],ymm10[14,15]
+; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm10, %zmm10
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm7 ^ (ymm5 & (ymm6 ^ ymm7))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm11 = ymm5[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm11[2],ymm5[3,4],ymm11[5],ymm5[6,7,8,9],ymm11[10],ymm5[11,12],ymm11[13],ymm5[14,15]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm10, %ymm10
+; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm2[0,1],xmm1[2],xmm2[3,4],xmm1[5],xmm2[6,7]
; AVX512DQ-FCP-NEXT: vpshufb %xmm11, %xmm12, %xmm11
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm10[5,6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm11[0,1,2,3],ymm10[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0,1,2,3,4],xmm5[5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm11[0,1,2,3],ymm5[4,5,6,7]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
; AVX512DQ-FCP-NEXT: vmovdqa %ymm11, %ymm12
; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm8 ^ (ymm12 & (ymm9 ^ ymm8))
@@ -2084,27 +2086,27 @@ define void @load_i16_stride3_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm13 = ymm12[0,1,2],ymm13[3,4,5,6,7],ymm12[8,9,10],ymm13[11,12,13,14,15]
; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,5,6,7,4]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm12 = ymm12[0,1,2,3],ymm13[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm10, %zmm12, %zmm10
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm11 = ymm5 ^ (ymm11 & (ymm6 ^ ymm5))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm11[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm11[1,2],ymm5[3],ymm11[4,5],ymm5[6],ymm11[7],ymm5[8],ymm11[9,10],ymm5[11],ymm11[12,13],ymm5[14],ymm11[15]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm11 = ymm6 ^ (ymm11 & (ymm7 ^ ymm6))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm6 = ymm11[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0],ymm11[1,2],ymm6[3],ymm11[4,5],ymm6[6],ymm11[7],ymm6[8],ymm11[9,10],ymm6[11],ymm11[12,13],ymm6[14],ymm11[15]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm6, %ymm6
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2],xmm1[3,4],xmm2[5],xmm1[6,7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm5[5,6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm5[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm7, %xmm1, %xmm1
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4],xmm6[5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm6[4,5,6,7]
; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm8 ^ (ymm0 & (ymm9 ^ ymm8))
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm0[2,3,0,1]
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm2[0],ymm0[1,2],ymm2[3],ymm0[4,5],ymm2[6],ymm0[7],ymm2[8],ymm0[9,10],ymm2[11],ymm0[12,13],ymm2[14],ymm0[15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm0, %ymm0
+; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1],xmm4[2,3],xmm3[4],xmm4[5,6],xmm3[7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm2, %xmm2
+; AVX512DQ-FCP-NEXT: vpshufb %xmm7, %xmm2, %xmm2
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [0,1,2,3,4,9,10,11]
; AVX512DQ-FCP-NEXT: vpermi2d %ymm2, %ymm0, %ymm3
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm3, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm7, (%rsi)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm10, (%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm10, (%rsi)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm5, 32(%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm12, (%rdx)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%rcx)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
@@ -2692,10 +2694,12 @@ define void @load_i16_stride3_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
;
; AVX-LABEL: load_i16_stride3_vf64:
; AVX: # %bb.0:
-; AVX-NEXT: subq $408, %rsp # imm = 0x198
-; AVX-NEXT: vmovdqa 176(%rdi), %xmm6
-; AVX-NEXT: vmovdqa 160(%rdi), %xmm5
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1],xmm6[2],xmm5[3,4],xmm6[5],xmm5[6,7]
+; AVX-NEXT: subq $472, %rsp # imm = 0x1D8
+; AVX-NEXT: vmovdqa 176(%rdi), %xmm10
+; AVX-NEXT: vmovdqa 160(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm10[2],xmm0[3,4],xmm10[5],xmm0[6,7]
+; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovdqa 144(%rdi), %xmm2
@@ -2703,26 +2707,29 @@ define void @load_i16_stride3_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,3,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,3,2,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2],xmm0[3,4,5,6,7]
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm10
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm7
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0],xmm10[1],xmm7[2,3],xmm10[4],xmm7[5,6],xmm10[7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm8 = [0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
-; AVX-NEXT: vpshufb %xmm8, %xmm3, %xmm3
-; AVX-NEXT: vmovdqa 128(%rdi), %xmm0
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[0,1,2,1]
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm3
+; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm0[1],xmm3[2,3],xmm0[4],xmm3[5,6],xmm0[7]
+; AVX-NEXT: vmovdqa {{.*#+}} xmm11 = [0,1,6,7,12,13,2,3,8,9,14,15,u,u,u,u]
+; AVX-NEXT: vpshufb %xmm11, %xmm3, %xmm3
+; AVX-NEXT: vmovdqa 128(%rdi), %xmm7
+; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm7[0,1,2,1]
+; AVX-NEXT: vmovdqa %xmm7, (%rsp) # 16-byte Spill
; AVX-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,5,6,5]
; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,5],xmm4[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm0
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vmovdqa 368(%rdi), %xmm14
+; AVX-NEXT: vmovdqa 368(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa 352(%rdi), %xmm2
; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm14[2],xmm2[3,4],xmm14[5],xmm2[6,7]
-; AVX-NEXT: vmovdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm0[2],xmm2[3,4],xmm0[5],xmm2[6,7]
; AVX-NEXT: vpshufb %xmm1, %xmm2, %xmm2
-; AVX-NEXT: vmovdqa 336(%rdi), %xmm9
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm9[0,3,2,3,4,5,6,7]
+; AVX-NEXT: vmovdqa 336(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[0,3,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,3,2,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2],xmm2[3,4,5,6,7]
; AVX-NEXT: vmovdqa 304(%rdi), %xmm0
@@ -2730,10 +2737,10 @@ define void @load_i16_stride3_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vmovdqa 288(%rdi), %xmm3
; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm0[1],xmm3[2,3],xmm0[4],xmm3[5,6],xmm0[7]
-; AVX-NEXT: vpshufb %xmm8, %xmm3, %xmm3
-; AVX-NEXT: vmovdqa 320(%rdi), %xmm0
-; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[0,1,2,1]
+; AVX-NEXT: vpshufb %xmm11, %xmm3, %xmm3
+; AVX-NEXT: vmovdqa 320(%rdi), %xmm9
+; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm9[0,1,2,1]
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,5,6,5]
; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,5],xmm4[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm0
@@ -2749,12 +2756,12 @@ define void @load_i16_stride3_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[0,3,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,3,2,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2],xmm2[3,4,5,6,7]
-; AVX-NEXT: vmovdqa 208(%rdi), %xmm0
-; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 208(%rdi), %xmm8
; AVX-NEXT: vmovdqa 192(%rdi), %xmm3
; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm0[1],xmm3[2,3],xmm0[4],xmm3[5,6],xmm0[7]
-; AVX-NEXT: vpshufb %xmm8, %xmm3, %xmm3
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm8[1],xmm3[2,3],xmm8[4],xmm3[5,6],xmm8[7]
+; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm11, %xmm3, %xmm3
; AVX-NEXT: vmovdqa 224(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[0,1,2,1]
@@ -2762,144 +2769,154 @@ define void @load_i16_stride3_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,5],xmm4[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm0
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm13
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm11
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm11[0,1],xmm13[2],xmm11[3,4],xmm13[5],xmm11[6,7]
-; AVX-NEXT: vmovdqa %xmm11, (%rsp) # 16-byte Spill
-; AVX-NEXT: vmovdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm5
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm6
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm6[0,1],xmm5[2],xmm6[3,4],xmm5[5],xmm6[6,7]
+; AVX-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufb %xmm1, %xmm2, %xmm1
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm3
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm3[0,3,2,3,4,5,6,7]
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm15
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm15[0,3,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,3,2,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[3,4,5,6,7]
-; AVX-NEXT: vmovdqa (%rdi), %xmm15
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm4
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm15[0],xmm4[1],xmm15[2,3],xmm4[4],xmm15[5,6],xmm4[7]
-; AVX-NEXT: vmovdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm8, %xmm1, %xmm0
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm1
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm1[0,1,2,1]
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa (%rdi), %xmm14
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm13
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm14[0],xmm13[1],xmm14[2,3],xmm13[4],xmm14[5,6],xmm13[7]
+; AVX-NEXT: vpshufb %xmm11, %xmm1, %xmm0
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm11
+; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm11[0,1,2,1]
; AVX-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,4,5,6,5]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm12[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm6[0,1],xmm5[2],xmm6[3,4],xmm5[5],xmm6[6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Reload
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm8[1],xmm0[2,3],xmm8[4],xmm0[5,6],xmm8[7]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0,1],xmm3[2],xmm4[3,4],xmm3[5],xmm4[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm7[0],xmm0[1,2],xmm7[3],xmm0[4,5],xmm7[6],xmm0[7]
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13]
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm7[0,1],xmm10[2],xmm7[3,4],xmm10[5],xmm7[6,7]
-; AVX-NEXT: vpblendw $73, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12, %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = mem[0],xmm12[1,2],mem[3],xmm12[4,5],mem[6],xmm12[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm12, %xmm12
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm12, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpblendw $36, {{[-0-9]+}}(%r{{[sb]}}p), %xmm14, %xmm0 # 16-byte Folded Reload
-; AVX-NEXT: # xmm0 = xmm14[0,1],mem[2],xmm14[3,4],mem[5],xmm14[6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0,1],xmm12[2],xmm10[3,4],xmm12[5],xmm10[6,7]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3],xmm1[4],xmm0[5,6],xmm1[7]
+; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0,1],xmm7[2],xmm10[3,4],xmm7[5],xmm10[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm9[0],xmm0[1,2],xmm9[3],xmm0[4,5],xmm9[6],xmm0[7]
+; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vpblendw $36, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = xmm0[0,1],mem[2],xmm0[3,4],mem[5],xmm0[6,7]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm9[1],xmm0[2,3],xmm9[4],xmm0[5,6],xmm9[7]
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
-; AVX-NEXT: vpblendw $36, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12, %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = xmm12[0,1],mem[2],xmm12[3,4],mem[5],xmm12[6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Reload
-; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm14[0],xmm12[1,2],xmm14[3],xmm12[4,5],xmm14[6],xmm12[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm12, %xmm12
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm12, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm13[0,1],xmm11[2],xmm13[3,4],xmm11[5],xmm13[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1],xmm0[2,3],xmm3[4],xmm0[5,6],xmm3[7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm14[0,1],xmm13[2],xmm14[3,4],xmm13[5],xmm14[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm11[0],xmm0[1,2],xmm11[3],xmm0[4,5],xmm11[6],xmm0[7]
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm15[0,1],xmm4[2],xmm15[3,4],xmm4[5],xmm15[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm1[0],xmm12[1,2],xmm1[3],xmm12[4,5],xmm1[6],xmm12[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm12, %xmm12
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm12, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Reload
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm11[0,1],xmm13[2],xmm11[3,4],xmm13[5],xmm11[6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1],xmm6[2],xmm5[3,4],xmm6[5],xmm5[6,7]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm15[1],xmm0[2,3],xmm15[4],xmm0[5,6],xmm15[7]
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
-; AVX-NEXT: vpblendw $219, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12, %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = mem[0,1],xmm12[2],mem[3,4],xmm12[5],mem[6,7]
-; AVX-NEXT: vpblendw $73, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12, %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = mem[0],xmm12[1,2],mem[3],xmm12[4,5],mem[6],xmm12[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm12, %xmm2
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0],xmm6[1],xmm5[2,3],xmm6[4],xmm5[5,6],xmm6[7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [u,u,u,u,0,1,6,7,12,13,2,3,8,9,14,15]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw $219, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8, %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = mem[0,1],xmm8[2],mem[3,4],xmm8[5],mem[6,7]
+; AVX-NEXT: vpblendw $73, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = mem[0],xmm0[1,2],mem[3],xmm0[4,5],mem[6],xmm0[7]
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm8[2,1,2,3]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Reload
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm6[0,1],xmm8[2],xmm6[3,4],xmm8[5],xmm6[6,7]
+; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = xmm0[0],mem[1],xmm0[2,3],mem[4],xmm0[5,6],mem[7]
+; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12, %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = xmm12[0],mem[1],xmm12[2,3],mem[4],xmm12[5,6],mem[7]
+; AVX-NEXT: vmovdqa {{.*#+}} xmm5 = [u,u,u,u,0,1,6,7,12,13,2,3,8,9,14,15]
+; AVX-NEXT: vpshufb %xmm5, %xmm0, %xmm0
+; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm1[2,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[2,1,2,3,4,5,6,7]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm12[0,1],xmm0[2,3,4,5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm10[0,1],xmm7[2],xmm10[3,4],xmm7[5],xmm10[6,7]
-; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12, %xmm12 # 16-byte Folded Reload
+; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm3[0,1],xmm4[2],xmm3[3,4],xmm4[5],xmm3[6,7]
+; AVX-NEXT: vpblendw $146, (%rsp), %xmm12, %xmm12 # 16-byte Folded Reload
; AVX-NEXT: # xmm12 = xmm12[0],mem[1],xmm12[2,3],mem[4],xmm12[5,6],mem[7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15]
-; AVX-NEXT: vpshufb %xmm1, %xmm12, %xmm12
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm12, %ymm8
+; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15]
+; AVX-NEXT: vpshufb %xmm2, %xmm12, %xmm12
+; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm12, %ymm0
+; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX-NEXT: vpblendw $109, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX-NEXT: # xmm0 = mem[0],xmm0[1],mem[2,3],xmm0[4],mem[5,6],xmm0[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
+; AVX-NEXT: vpshufb %xmm5, %xmm0, %xmm0
; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm9[2,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[2,1,2,3,4,5,6,7]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm12[0,1],xmm0[2,3,4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
-; AVX-NEXT: vpblendw $219, {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm10 # 16-byte Folded Reload
-; AVX-NEXT: # xmm10 = mem[0,1],xmm5[2],mem[3,4],xmm5[5],mem[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm10[0],xmm14[1],xmm10[2,3],xmm14[4],xmm10[5,6],xmm14[7]
-; AVX-NEXT: vpshufb %xmm1, %xmm9, %xmm9
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm7[0,1],xmm10[2],xmm7[3,4],xmm10[5],xmm7[6,7]
+; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10, %xmm9 # 16-byte Folded Reload
+; AVX-NEXT: # xmm9 = xmm10[0],mem[1],xmm10[2,3],mem[4],xmm10[5,6],mem[7]
+; AVX-NEXT: vpshufb %xmm2, %xmm9, %xmm9
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm9, %ymm0
-; AVX-NEXT: vmovdqa (%rsp), %xmm5 # 16-byte Reload
-; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm7 # 16-byte Folded Reload
-; AVX-NEXT: # xmm7 = xmm5[0],mem[1],xmm5[2,3],mem[4],xmm5[5,6],mem[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm7, %xmm7
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm3[2,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[2,1,2,3,4,5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1],xmm7[2,3,4,5,6,7]
-; AVX-NEXT: vpblendw $36, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
-; AVX-NEXT: # xmm4 = xmm4[0,1],mem[2],xmm4[3,4],mem[5],xmm4[6,7]
-; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = xmm4[0],mem[1],xmm4[2,3],mem[4],xmm4[5,6],mem[7]
-; AVX-NEXT: vpshufb %xmm1, %xmm3, %xmm3
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm3, %ymm3
-; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm13[0],xmm11[1],xmm13[2,3],xmm11[4],xmm13[5,6],xmm11[7]
-; AVX-NEXT: vpshufb %xmm2, %xmm4, %xmm2
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm15[2,1,2,3]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; AVX-NEXT: vpblendw $109, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm7 # 16-byte Folded Reload
+; AVX-NEXT: # xmm7 = mem[0],xmm1[1],mem[2,3],xmm1[4],mem[5,6],xmm1[7]
+; AVX-NEXT: vmovdqa %xmm5, %xmm4
+; AVX-NEXT: vpshufb %xmm5, %xmm7, %xmm7
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm15[2,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[2,1,2,3,4,5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm7[2,3,4,5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm13[0,1],xmm14[2],xmm13[3,4],xmm14[5],xmm13[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0],xmm11[1],xmm3[2,3],xmm11[4],xmm3[5,6],xmm11[7]
+; AVX-NEXT: vpshufb %xmm2, %xmm1, %xmm1
+; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm1, %ymm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm8[0],xmm6[1],xmm8[2,3],xmm6[4],xmm8[5,6],xmm6[7]
+; AVX-NEXT: vpshufb %xmm4, %xmm3, %xmm3
+; AVX-NEXT: vpshufd $230, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
+; AVX-NEXT: # xmm4 = mem[2,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[2,1,2,3,4,5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0,1],xmm2[2,3,4,5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1],xmm3[2,3,4,5,6,7]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
; AVX-NEXT: vpblendw $36, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
; AVX-NEXT: # xmm4 = xmm4[0,1],mem[2],xmm4[3,4],mem[5],xmm4[6,7]
; AVX-NEXT: vpblendw $146, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
; AVX-NEXT: # xmm4 = xmm4[0],mem[1],xmm4[2,3],mem[4],xmm4[5,6],mem[7]
-; AVX-NEXT: vpshufb %xmm1, %xmm4, %xmm1
-; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, (%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 64(%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 96(%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 32(%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 64(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, (%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 96(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 32(%rdx)
-; AVX-NEXT: vmovaps %ymm1, 64(%rcx)
-; AVX-NEXT: vmovaps %ymm3, (%rcx)
+; AVX-NEXT: vpshufb %xmm2, %xmm4, %xmm2
+; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
+; AVX-NEXT: vmovaps %ymm3, (%rsi)
+; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
+; AVX-NEXT: vmovaps %ymm3, 64(%rsi)
+; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
+; AVX-NEXT: vmovaps %ymm3, 96(%rsi)
+; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
+; AVX-NEXT: vmovaps %ymm3, 32(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 80(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 64(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 16(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, (%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 112(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 96(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 48(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 32(%rdx)
+; AVX-NEXT: vmovaps %ymm2, 64(%rcx)
+; AVX-NEXT: vmovaps %ymm1, (%rcx)
; AVX-NEXT: vmovaps %ymm0, 96(%rcx)
-; AVX-NEXT: vmovaps %ymm8, 32(%rcx)
-; AVX-NEXT: addq $408, %rsp # imm = 0x198
+; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
+; AVX-NEXT: vmovaps %ymm0, 32(%rcx)
+; AVX-NEXT: addq $472, %rsp # imm = 0x1D8
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
@@ -3424,655 +3441,639 @@ define void @load_i16_stride3_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
;
; AVX512-LABEL: load_i16_stride3_vf64:
; AVX512: # %bb.0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512-NEXT: vmovdqa64 224(%rdi), %ymm18
-; AVX512-NEXT: vmovdqa64 192(%rdi), %ymm20
-; AVX512-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm1 = ymm18 ^ (ymm1 & (ymm20 ^ ymm18))
-; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm2 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm7 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
-; AVX512-NEXT: vpshufb %ymm7, %ymm2, %ymm5
-; AVX512-NEXT: vmovdqa64 272(%rdi), %xmm1
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm9 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
+; AVX512-NEXT: vmovdqa64 224(%rdi), %ymm20
+; AVX512-NEXT: vmovdqa64 192(%rdi), %ymm21
+; AVX512-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm21 ^ ymm20))
+; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm0[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7],ymm0[8],ymm1[9],ymm0[10,11],ymm1[12],ymm0[13,14],ymm1[15]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
+; AVX512-NEXT: vpshufb %ymm0, %ymm1, %ymm1
+; AVX512-NEXT: vmovdqa64 272(%rdi), %xmm2
; AVX512-NEXT: vmovdqa64 256(%rdi), %xmm3
-; AVX512-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0,1],xmm1[2],xmm3[3,4],xmm1[5],xmm3[6,7]
-; AVX512-NEXT: vmovdqa64 %xmm1, %xmm19
-; AVX512-NEXT: vmovdqa {{.*#+}} xmm13 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
-; AVX512-NEXT: vpshufb %xmm13, %xmm6, %xmm6
-; AVX512-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
-; AVX512-NEXT: vpblendw {{.*#+}} ymm6 = ymm5[0,1,2],ymm6[3,4,5,6,7],ymm5[8,9,10],ymm6[11,12,13,14,15]
-; AVX512-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,6,5,4,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm6[4,5,6,7]
-; AVX512-NEXT: vmovdqa64 320(%rdi), %ymm21
-; AVX512-NEXT: vmovdqa64 352(%rdi), %ymm22
-; AVX512-NEXT: vmovdqa %ymm0, %ymm8
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm8 = ymm21 ^ (ymm8 & (ymm22 ^ ymm21))
-; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm8[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm8 = ymm8[0],ymm9[1],ymm8[2,3],ymm9[4],ymm8[5,6],ymm9[7],ymm8[8],ymm9[9],ymm8[10,11],ymm9[12],ymm8[13,14],ymm9[15]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm10 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
-; AVX512-NEXT: vpshufb %ymm10, %ymm8, %ymm11
-; AVX512-NEXT: vmovdqa64 304(%rdi), %xmm8
-; AVX512-NEXT: vmovdqa64 288(%rdi), %xmm4
-; AVX512-NEXT: vpblendw {{.*#+}} xmm12 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
-; AVX512-NEXT: vmovdqa {{.*#+}} xmm14 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
-; AVX512-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512-NEXT: vpblendd {{.*#+}} ymm11 = ymm12[0,1,2],ymm11[3,4,5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm11, %zmm5, %zmm16
-; AVX512-NEXT: vmovdqa64 128(%rdi), %ymm23
-; AVX512-NEXT: vmovdqa64 160(%rdi), %ymm11
-; AVX512-NEXT: vmovdqa %ymm0, %ymm5
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm5 = ymm23 ^ (ymm5 & (ymm11 ^ ymm23))
-; AVX512-NEXT: vpermq {{.*#+}} ymm12 = ymm5[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm12[1],ymm5[2,3],ymm12[4],ymm5[5,6],ymm12[7],ymm5[8],ymm12[9],ymm5[10,11],ymm12[12],ymm5[13,14],ymm12[15]
-; AVX512-NEXT: vpshufb %ymm10, %ymm5, %ymm10
-; AVX512-NEXT: vmovdqa 112(%rdi), %xmm15
-; AVX512-NEXT: vmovdqa 96(%rdi), %xmm5
-; AVX512-NEXT: vpblendw {{.*#+}} xmm12 = xmm5[0],xmm15[1],xmm5[2,3],xmm15[4],xmm5[5,6],xmm15[7]
-; AVX512-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm12[0,1,2],ymm10[3,4,5,6,7]
-; AVX512-NEXT: vmovdqa64 (%rdi), %ymm24
-; AVX512-NEXT: vmovdqa 32(%rdi), %ymm12
-; AVX512-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm10 = ymm12 ^ (ymm10 & (ymm24 ^ ymm12))
-; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm10[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm10[0],ymm1[1],ymm10[2,3],ymm1[4],ymm10[5,6],ymm1[7],ymm10[8],ymm1[9],ymm10[10,11],ymm1[12],ymm10[13,14],ymm1[15]
-; AVX512-NEXT: vpshufb %ymm7, %ymm1, %ymm7
+; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm3[0,1],xmm2[2],xmm3[3,4],xmm2[5],xmm3[6,7]
+; AVX512-NEXT: vmovdqa64 %xmm3, %xmm24
+; AVX512-NEXT: vmovdqa64 %xmm2, %xmm25
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm15 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
+; AVX512-NEXT: vpshufb %xmm15, %xmm4, %xmm4
+; AVX512-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
+; AVX512-NEXT: vpblendw {{.*#+}} ymm4 = ymm1[0,1,2],ymm4[3,4,5,6,7],ymm1[8,9,10],ymm4[11,12,13,14,15]
+; AVX512-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,5,4,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm4[4,5,6,7]
+; AVX512-NEXT: vmovdqa64 320(%rdi), %ymm22
+; AVX512-NEXT: vmovdqa64 352(%rdi), %ymm23
+; AVX512-NEXT: vmovdqa %ymm9, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm22 ^ (ymm4 & (ymm23 ^ ymm22))
+; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm4[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2,3],ymm5[4],ymm4[5,6],ymm5[7],ymm4[8],ymm5[9],ymm4[10,11],ymm5[12],ymm4[13,14],ymm5[15]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
+; AVX512-NEXT: vpshufb %ymm5, %ymm4, %ymm4
+; AVX512-NEXT: vmovdqa64 304(%rdi), %xmm7
+; AVX512-NEXT: vmovdqa64 288(%rdi), %xmm8
+; AVX512-NEXT: vpblendw {{.*#+}} xmm10 = xmm8[0],xmm7[1],xmm8[2,3],xmm7[4],xmm8[5,6],xmm7[7]
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm11 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
+; AVX512-NEXT: vpshufb %xmm11, %xmm10, %xmm10
+; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm10[0,1,2],ymm4[3,4,5,6,7]
+; AVX512-NEXT: vinserti64x4 $1, %ymm4, %zmm1, %zmm16
+; AVX512-NEXT: vmovdqa64 128(%rdi), %ymm19
+; AVX512-NEXT: vmovdqa64 160(%rdi), %ymm12
+; AVX512-NEXT: vmovdqa %ymm9, %ymm1
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm1 = ymm19 ^ (ymm1 & (ymm12 ^ ymm19))
+; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm1[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm4[1],ymm1[2,3],ymm4[4],ymm1[5,6],ymm4[7],ymm1[8],ymm4[9],ymm1[10,11],ymm4[12],ymm1[13,14],ymm4[15]
+; AVX512-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512-NEXT: vmovdqa 112(%rdi), %xmm13
+; AVX512-NEXT: vmovdqa 96(%rdi), %xmm14
+; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm14[0],xmm13[1],xmm14[2,3],xmm13[4],xmm14[5,6],xmm13[7]
+; AVX512-NEXT: vpshufb %xmm11, %xmm4, %xmm4
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2],ymm1[3,4,5,6,7]
+; AVX512-NEXT: vmovdqa64 (%rdi), %ymm17
+; AVX512-NEXT: vmovdqa 32(%rdi), %ymm4
+; AVX512-NEXT: vmovdqa %ymm9, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm5 = ymm4 ^ (ymm5 & (ymm17 ^ ymm4))
+; AVX512-NEXT: vpermq {{.*#+}} ymm10 = ymm5[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm10[1],ymm5[2,3],ymm10[4],ymm5[5,6],ymm10[7],ymm5[8],ymm10[9],ymm5[10,11],ymm10[12],ymm5[13,14],ymm10[15]
+; AVX512-NEXT: vpshufb %ymm0, %ymm5, %ymm0
; AVX512-NEXT: vmovdqa 80(%rdi), %xmm10
-; AVX512-NEXT: vmovdqa 64(%rdi), %xmm1
-; AVX512-NEXT: vpblendw {{.*#+}} xmm2 = xmm1[0,1],xmm10[2],xmm1[3,4],xmm10[5],xmm1[6,7]
-; AVX512-NEXT: vpshufb %xmm13, %xmm2, %xmm2
-; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
-; AVX512-NEXT: vpblendw {{.*#+}} ymm2 = ymm7[0,1,2],ymm2[3,4,5,6,7],ymm7[8,9,10],ymm2[11,12,13,14,15]
-; AVX512-NEXT: vpshufhw {{.*#+}} xmm7 = xmm7[0,1,2,3,6,5,4,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm6, %zmm2, %zmm17
-; AVX512-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm2 = ymm22 ^ (ymm2 & (ymm21 ^ ymm22))
-; AVX512-NEXT: vpermq {{.*#+}} ymm6 = ymm2[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm6[2],ymm2[3,4],ymm6[5],ymm2[6,7,8,9],ymm6[10],ymm2[11,12],ymm6[13],ymm2[14,15]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm9 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512-NEXT: vpblendw {{.*#+}} xmm7 = xmm4[0,1],xmm8[2],xmm4[3,4],xmm8[5],xmm4[6,7]
-; AVX512-NEXT: vmovdqa64 %xmm8, %xmm25
-; AVX512-NEXT: vmovdqa64 %xmm4, %xmm26
-; AVX512-NEXT: vmovdqa {{.*#+}} xmm6 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
-; AVX512-NEXT: vpshufb %xmm6, %xmm7, %xmm7
-; AVX512-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0,1,2,3,4],xmm2[5,6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm13 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
-; AVX512-NEXT: vmovdqa %ymm13, %ymm2
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm2 = ymm20 ^ (ymm2 & (ymm18 ^ ymm20))
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm2[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm4[2],ymm2[3,4],ymm4[5],ymm2[6,7,8,9],ymm4[10],ymm2[11,12],ymm4[13],ymm2[14,15]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
-; AVX512-NEXT: vpshufb %ymm4, %ymm2, %ymm2
-; AVX512-NEXT: vmovdqa64 %xmm19, %xmm8
-; AVX512-NEXT: vpblendw {{.*#+}} xmm14 = xmm8[0,1],xmm3[2],xmm8[3,4],xmm3[5],xmm8[6,7]
-; AVX512-NEXT: vmovdqa64 %xmm3, %xmm27
-; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
-; AVX512-NEXT: vpshufb %xmm3, %xmm14, %xmm14
-; AVX512-NEXT: vinserti128 $1, %xmm14, %ymm0, %ymm14
-; AVX512-NEXT: vpblendw {{.*#+}} ymm14 = ymm2[0,1,2],ymm14[3,4,5,6,7],ymm2[8,9,10],ymm14[11,12,13,14,15]
-; AVX512-NEXT: vpshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,6,7,4]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm14[4,5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm7, %zmm2, %zmm19
-; AVX512-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm2 = ymm11 ^ (ymm2 & (ymm23 ^ ymm11))
-; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm2[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm7[2],ymm2[3,4],ymm7[5],ymm2[6,7,8,9],ymm7[10],ymm2[11,12],ymm7[13],ymm2[14,15]
-; AVX512-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512-NEXT: vpblendw {{.*#+}} xmm7 = xmm5[0,1],xmm15[2],xmm5[3,4],xmm15[5],xmm5[6,7]
-; AVX512-NEXT: vpshufb %xmm6, %xmm7, %xmm6
-; AVX512-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm2[5,6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm6[0,1,2,3],ymm2[4,5,6,7]
-; AVX512-NEXT: vmovdqa %ymm13, %ymm6
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm6 = ymm24 ^ (ymm6 & (ymm12 ^ ymm24))
-; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm6[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0,1],ymm7[2],ymm6[3,4],ymm7[5],ymm6[6,7,8,9],ymm7[10],ymm6[11,12],ymm7[13],ymm6[14,15]
-; AVX512-NEXT: vpshufb %ymm4, %ymm6, %ymm4
-; AVX512-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm1[2],xmm10[3,4],xmm1[5],xmm10[6,7]
-; AVX512-NEXT: vpshufb %xmm3, %xmm6, %xmm3
-; AVX512-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
-; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3,4,5,6,7],ymm4[8,9,10],ymm3[11,12,13,14,15]
-; AVX512-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,5,6,7,4]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm3, %zmm2
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm11 = ymm23 ^ (ymm13 & (ymm11 ^ ymm23))
-; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm11[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm11[1,2],ymm3[3],ymm11[4,5],ymm3[6],ymm11[7],ymm3[8],ymm11[9,10],ymm3[11],ymm11[12,13],ymm3[14],ymm11[15]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm11 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm15[0,1],xmm5[2],xmm15[3,4],xmm5[5],xmm15[6,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
-; AVX512-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm12 = ymm24 ^ (ymm0 & (ymm12 ^ ymm24))
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm12[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm12[1,2],ymm4[3],ymm12[4,5],ymm4[6],ymm12[7],ymm4[8],ymm12[9,10],ymm4[11],ymm12[12,13],ymm4[14],ymm12[15]
-; AVX512-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm10[1],xmm1[2,3],xmm10[4],xmm1[5,6],xmm10[7]
+; AVX512-NEXT: vmovdqa 64(%rdi), %xmm11
+; AVX512-NEXT: vpblendw {{.*#+}} xmm5 = xmm11[0,1],xmm10[2],xmm11[3,4],xmm10[5],xmm11[6,7]
+; AVX512-NEXT: vpshufb %xmm15, %xmm5, %xmm5
+; AVX512-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm5
+; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm0[0,1,2],ymm5[3,4,5,6,7],ymm0[8,9,10],ymm5[11,12,13,14,15]
+; AVX512-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm5[4,5,6,7]
+; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm18
+; AVX512-NEXT: vmovdqa %ymm9, %ymm15
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm15 = ymm12 ^ (ymm15 & (ymm19 ^ ymm12))
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm12 = ymm19 ^ (ymm0 & (ymm12 ^ ymm19))
+; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm12[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm1[0],ymm12[1,2],ymm1[3],ymm12[4,5],ymm1[6],ymm12[7],ymm1[8],ymm12[9,10],ymm1[11],ymm12[12,13],ymm1[14],ymm12[15]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512-NEXT: vpshufb %ymm1, %ymm5, %ymm5
+; AVX512-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0,1],xmm14[2],xmm13[3,4],xmm14[5],xmm13[6,7]
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
+; AVX512-NEXT: vpshufb %xmm2, %xmm12, %xmm12
+; AVX512-NEXT: vpblendw {{.*#+}} xmm12 = xmm12[0,1,2,3,4],xmm5[5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm12[0,1,2,3],ymm5[4,5,6,7]
+; AVX512-NEXT: vmovdqa %ymm0, %ymm12
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm12 = ymm17 ^ (ymm12 & (ymm4 ^ ymm17))
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm17 ^ (ymm9 & (ymm4 ^ ymm17))
+; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm4[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm4[1,2],ymm3[3],ymm4[4,5],ymm3[6],ymm4[7],ymm3[8],ymm4[9,10],ymm3[11],ymm4[12,13],ymm3[14],ymm4[15]
+; AVX512-NEXT: vpshufb %ymm1, %ymm3, %ymm3
+; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm11[0],xmm10[1],xmm11[2,3],xmm10[4],xmm11[5,6],xmm10[7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm6 = [0,1,2,3,0,1,6,7,12,13,2,3,8,9,14,15]
-; AVX512-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
-; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2,3,4],ymm1[5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm3, %zmm1, %zmm1
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm13 = ymm21 ^ (ymm13 & (ymm22 ^ ymm21))
-; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm13[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm13[1,2],ymm3[3],ymm13[4,5],ymm3[6],ymm13[7],ymm3[8],ymm13[9,10],ymm3[11],ymm13[12,13],ymm3[14],ymm13[15]
-; AVX512-NEXT: vmovdqa64 %xmm25, %xmm4
-; AVX512-NEXT: vmovdqa64 %xmm26, %xmm7
-; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm7[2],xmm4[3,4],xmm7[5],xmm4[6,7]
-; AVX512-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm18 ^ ymm20))
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm0[2,3,0,1]
-; AVX512-NEXT: vpblendw {{.*#+}} ymm0 = ymm4[0],ymm0[1,2],ymm4[3],ymm0[4,5],ymm4[6],ymm0[7],ymm4[8],ymm0[9,10],ymm4[11],ymm0[12,13],ymm4[14],ymm0[15]
-; AVX512-NEXT: vpshufb %ymm11, %ymm0, %ymm0
-; AVX512-NEXT: vmovdqa64 %xmm27, %xmm4
-; AVX512-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
; AVX512-NEXT: vpshufb %xmm6, %xmm4, %xmm4
; AVX512-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm4[5,6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm17, (%rsi)
+; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3,4],ymm4[5,6,7]
+; AVX512-NEXT: vinserti64x4 $1, %ymm5, %zmm3, %zmm17
+; AVX512-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm22 ^ (ymm0 & (ymm23 ^ ymm22))
+; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm0[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm0 = ymm3[0],ymm0[1,2],ymm3[3],ymm0[4,5],ymm3[6],ymm0[7],ymm3[8],ymm0[9,10],ymm3[11],ymm0[12,13],ymm3[14],ymm0[15]
+; AVX512-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0,1],xmm8[2],xmm7[3,4],xmm8[5],xmm7[6,7]
+; AVX512-NEXT: vpshufb %xmm2, %xmm3, %xmm2
+; AVX512-NEXT: vpshufb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3,4],xmm0[5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX512-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm9 = ymm21 ^ (ymm9 & (ymm20 ^ ymm21))
+; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm9[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm9[1,2],ymm3[3],ymm9[4,5],ymm3[6],ymm9[7],ymm3[8],ymm9[9,10],ymm3[11],ymm9[12,13],ymm3[14],ymm9[15]
+; AVX512-NEXT: vpshufb %ymm1, %ymm3, %ymm1
+; AVX512-NEXT: vmovdqa64 %xmm24, %xmm4
+; AVX512-NEXT: vmovdqa64 %xmm25, %xmm9
+; AVX512-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm9[1],xmm4[2,3],xmm9[4],xmm4[5,6],xmm9[7]
+; AVX512-NEXT: vpshufb %xmm6, %xmm3, %xmm3
+; AVX512-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3,4],ymm3[5,6,7]
+; AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm2
+; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm15[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm15[0,1],ymm1[2],ymm15[3,4],ymm1[5],ymm15[6,7,8,9],ymm1[10],ymm15[11,12],ymm1[13],ymm15[14,15]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm3 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
+; AVX512-NEXT: vpshufb %ymm3, %ymm1, %ymm1
+; AVX512-NEXT: vpblendw {{.*#+}} xmm6 = xmm14[0,1],xmm13[2],xmm14[3,4],xmm13[5],xmm14[6,7]
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm15 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
+; AVX512-NEXT: vpshufb %xmm15, %xmm6, %xmm6
+; AVX512-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm1[5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm5 = ymm21 ^ (ymm5 & (ymm20 ^ ymm21))
+; AVX512-NEXT: vpermq {{.*#+}} ymm6 = ymm5[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm6[2],ymm5[3,4],ymm6[5],ymm5[6,7,8,9],ymm6[10],ymm5[11,12],ymm6[13],ymm5[14,15]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm6 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
+; AVX512-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512-NEXT: vpblendw {{.*#+}} xmm13 = xmm9[0,1],xmm4[2],xmm9[3,4],xmm4[5],xmm9[6,7]
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm14 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
+; AVX512-NEXT: vpshufb %xmm14, %xmm13, %xmm13
+; AVX512-NEXT: vinserti128 $1, %xmm13, %ymm0, %ymm13
+; AVX512-NEXT: vpblendw {{.*#+}} ymm13 = ymm5[0,1,2],ymm13[3,4,5,6,7],ymm5[8,9,10],ymm13[11,12,13,14,15]
+; AVX512-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,5,6,7,4]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm13[4,5,6,7]
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm23 ^ (ymm0 & (ymm22 ^ ymm23))
+; AVX512-NEXT: vpermq {{.*#+}} ymm13 = ymm0[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0,1],ymm13[2],ymm0[3,4],ymm13[5],ymm0[6,7,8,9],ymm13[10],ymm0[11,12],ymm13[13],ymm0[14,15]
+; AVX512-NEXT: vpshufb %ymm3, %ymm0, %ymm0
+; AVX512-NEXT: vpblendw {{.*#+}} xmm3 = xmm8[0,1],xmm7[2],xmm8[3,4],xmm7[5],xmm8[6,7]
+; AVX512-NEXT: vpshufb %xmm15, %xmm3, %xmm3
+; AVX512-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4],xmm0[5,6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
+; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm12[2,3,0,1]
+; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm12[0,1],ymm3[2],ymm12[3,4],ymm3[5],ymm12[6,7,8,9],ymm3[10],ymm12[11,12],ymm3[13],ymm12[14,15]
+; AVX512-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm11[2],xmm10[3,4],xmm11[5],xmm10[6,7]
+; AVX512-NEXT: vpshufb %xmm14, %xmm6, %xmm6
+; AVX512-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
+; AVX512-NEXT: vpblendw {{.*#+}} ymm6 = ymm3[0,1,2],ymm6[3,4,5,6,7],ymm3[8,9,10],ymm6[11,12,13,14,15]
+; AVX512-NEXT: vpshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,6,7,4]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3],ymm6[4,5,6,7]
+; AVX512-NEXT: vmovdqa64 %zmm18, (%rsi)
; AVX512-NEXT: vmovdqa64 %zmm16, 64(%rsi)
-; AVX512-NEXT: vmovdqa64 %zmm19, 64(%rdx)
-; AVX512-NEXT: vmovdqa64 %zmm2, (%rdx)
-; AVX512-NEXT: vmovdqa64 %zmm0, 64(%rcx)
-; AVX512-NEXT: vmovdqa64 %zmm1, (%rcx)
+; AVX512-NEXT: vmovdqa %ymm0, 96(%rdx)
+; AVX512-NEXT: vmovdqa %ymm5, 64(%rdx)
+; AVX512-NEXT: vmovdqa %ymm1, 32(%rdx)
+; AVX512-NEXT: vmovdqa %ymm3, (%rdx)
+; AVX512-NEXT: vmovdqa64 %zmm2, 64(%rcx)
+; AVX512-NEXT: vmovdqa64 %zmm17, (%rcx)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: load_i16_stride3_vf64:
; AVX512-FCP: # %bb.0:
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512-FCP-NEXT: vmovdqa64 224(%rdi), %ymm18
-; AVX512-FCP-NEXT: vmovdqa64 192(%rdi), %ymm20
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm18 ^ (ymm1 & (ymm20 ^ ymm18))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
-; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm2, %ymm5
-; AVX512-FCP-NEXT: vmovdqa64 272(%rdi), %xmm1
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm9 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
+; AVX512-FCP-NEXT: vmovdqa64 224(%rdi), %ymm20
+; AVX512-FCP-NEXT: vmovdqa64 192(%rdi), %ymm21
+; AVX512-FCP-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm21 ^ ymm20))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm0[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7],ymm0[8],ymm1[9],ymm0[10,11],ymm1[12],ymm0[13,14],ymm1[15]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
+; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm1, %ymm1
+; AVX512-FCP-NEXT: vmovdqa64 272(%rdi), %xmm2
; AVX512-FCP-NEXT: vmovdqa64 256(%rdi), %xmm3
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0,1],xmm1[2],xmm3[3,4],xmm1[5],xmm3[6,7]
-; AVX512-FCP-NEXT: vmovdqa64 %xmm1, %xmm19
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm13 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
-; AVX512-FCP-NEXT: vpshufb %xmm13, %xmm6, %xmm6
-; AVX512-FCP-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm5[0,1,2],ymm6[3,4,5,6,7],ymm5[8,9,10],ymm6[11,12,13,14,15]
-; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,6,5,4,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm6[4,5,6,7]
-; AVX512-FCP-NEXT: vmovdqa64 320(%rdi), %ymm21
-; AVX512-FCP-NEXT: vmovdqa64 352(%rdi), %ymm22
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm8
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm8 = ymm21 ^ (ymm8 & (ymm22 ^ ymm21))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm8[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm8 = ymm8[0],ymm9[1],ymm8[2,3],ymm9[4],ymm8[5,6],ymm9[7],ymm8[8],ymm9[9],ymm8[10,11],ymm9[12],ymm8[13,14],ymm9[15]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
-; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm8, %ymm11
-; AVX512-FCP-NEXT: vmovdqa64 304(%rdi), %xmm8
-; AVX512-FCP-NEXT: vmovdqa64 288(%rdi), %xmm4
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm14 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
-; AVX512-FCP-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm12[0,1,2],ymm11[3,4,5,6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm11, %zmm5, %zmm16
-; AVX512-FCP-NEXT: vmovdqa64 128(%rdi), %ymm23
-; AVX512-FCP-NEXT: vmovdqa64 160(%rdi), %ymm11
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm5
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm23 ^ (ymm5 & (ymm11 ^ ymm23))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm5[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm12[1],ymm5[2,3],ymm12[4],ymm5[5,6],ymm12[7],ymm5[8],ymm12[9],ymm5[10,11],ymm12[12],ymm5[13,14],ymm12[15]
-; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm5, %ymm10
-; AVX512-FCP-NEXT: vmovdqa 112(%rdi), %xmm15
-; AVX512-FCP-NEXT: vmovdqa 96(%rdi), %xmm5
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm5[0],xmm15[1],xmm5[2,3],xmm15[4],xmm5[5,6],xmm15[7]
-; AVX512-FCP-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm12[0,1,2],ymm10[3,4,5,6,7]
-; AVX512-FCP-NEXT: vmovdqa64 (%rdi), %ymm24
-; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %ymm12
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm10 = ymm12 ^ (ymm10 & (ymm24 ^ ymm12))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm10[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm10[0],ymm1[1],ymm10[2,3],ymm1[4],ymm10[5,6],ymm1[7],ymm10[8],ymm1[9],ymm10[10,11],ymm1[12],ymm10[13,14],ymm1[15]
-; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm7
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm3[0,1],xmm2[2],xmm3[3,4],xmm2[5],xmm3[6,7]
+; AVX512-FCP-NEXT: vmovdqa64 %xmm3, %xmm24
+; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm25
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm15 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
+; AVX512-FCP-NEXT: vpshufb %xmm15, %xmm4, %xmm4
+; AVX512-FCP-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm1[0,1,2],ymm4[3,4,5,6,7],ymm1[8,9,10],ymm4[11,12,13,14,15]
+; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,5,4,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm4[4,5,6,7]
+; AVX512-FCP-NEXT: vmovdqa64 320(%rdi), %ymm22
+; AVX512-FCP-NEXT: vmovdqa64 352(%rdi), %ymm23
+; AVX512-FCP-NEXT: vmovdqa %ymm9, %ymm4
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm4 = ymm22 ^ (ymm4 & (ymm23 ^ ymm22))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm4[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2,3],ymm5[4],ymm4[5,6],ymm5[7],ymm4[8],ymm5[9],ymm4[10,11],ymm5[12],ymm4[13,14],ymm5[15]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm4
+; AVX512-FCP-NEXT: vmovdqa64 304(%rdi), %xmm7
+; AVX512-FCP-NEXT: vmovdqa64 288(%rdi), %xmm8
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm10 = xmm8[0],xmm7[1],xmm8[2,3],xmm7[4],xmm8[5,6],xmm7[7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm11 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
+; AVX512-FCP-NEXT: vpshufb %xmm11, %xmm10, %xmm10
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm10[0,1,2],ymm4[3,4,5,6,7]
+; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm1, %zmm16
+; AVX512-FCP-NEXT: vmovdqa64 128(%rdi), %ymm19
+; AVX512-FCP-NEXT: vmovdqa64 160(%rdi), %ymm12
+; AVX512-FCP-NEXT: vmovdqa %ymm9, %ymm1
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm19 ^ (ymm1 & (ymm12 ^ ymm19))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm1[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm4[1],ymm1[2,3],ymm4[4],ymm1[5,6],ymm4[7],ymm1[8],ymm4[9],ymm1[10,11],ymm4[12],ymm1[13,14],ymm4[15]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512-FCP-NEXT: vmovdqa 112(%rdi), %xmm13
+; AVX512-FCP-NEXT: vmovdqa 96(%rdi), %xmm14
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm14[0],xmm13[1],xmm14[2,3],xmm13[4],xmm14[5,6],xmm13[7]
+; AVX512-FCP-NEXT: vpshufb %xmm11, %xmm4, %xmm4
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2],ymm1[3,4,5,6,7]
+; AVX512-FCP-NEXT: vmovdqa64 (%rdi), %ymm17
+; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %ymm4
+; AVX512-FCP-NEXT: vmovdqa %ymm9, %ymm5
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm4 ^ (ymm5 & (ymm17 ^ ymm4))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm10 = ymm5[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm10[1],ymm5[2,3],ymm10[4],ymm5[5,6],ymm10[7],ymm5[8],ymm10[9],ymm5[10,11],ymm10[12],ymm5[13,14],ymm10[15]
+; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm5, %ymm0
; AVX512-FCP-NEXT: vmovdqa 80(%rdi), %xmm10
-; AVX512-FCP-NEXT: vmovdqa 64(%rdi), %xmm1
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm2 = xmm1[0,1],xmm10[2],xmm1[3,4],xmm10[5],xmm1[6,7]
-; AVX512-FCP-NEXT: vpshufb %xmm13, %xmm2, %xmm2
-; AVX512-FCP-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm7[0,1,2],ymm2[3,4,5,6,7],ymm7[8,9,10],ymm2[11,12,13,14,15]
-; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm7 = xmm7[0,1,2,3,6,5,4,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm2, %zmm17
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm2 = ymm22 ^ (ymm2 & (ymm21 ^ ymm22))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm6 = ymm2[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm6[2],ymm2[3,4],ymm6[5],ymm2[6,7,8,9],ymm6[10],ymm2[11,12],ymm6[13],ymm2[14,15]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm9 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512-FCP-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm7 = xmm4[0,1],xmm8[2],xmm4[3,4],xmm8[5],xmm4[6,7]
-; AVX512-FCP-NEXT: vmovdqa64 %xmm8, %xmm25
-; AVX512-FCP-NEXT: vmovdqa64 %xmm4, %xmm26
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm6 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
-; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm7, %xmm7
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0,1,2,3,4],xmm2[5,6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm13 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
-; AVX512-FCP-NEXT: vmovdqa %ymm13, %ymm2
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm2 = ymm20 ^ (ymm2 & (ymm18 ^ ymm20))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm2[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm4[2],ymm2[3,4],ymm4[5],ymm2[6,7,8,9],ymm4[10],ymm2[11,12],ymm4[13],ymm2[14,15]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
-; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm2, %ymm2
-; AVX512-FCP-NEXT: vmovdqa64 %xmm19, %xmm8
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm14 = xmm8[0,1],xmm3[2],xmm8[3,4],xmm3[5],xmm8[6,7]
-; AVX512-FCP-NEXT: vmovdqa64 %xmm3, %xmm27
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm3 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
-; AVX512-FCP-NEXT: vpshufb %xmm3, %xmm14, %xmm14
-; AVX512-FCP-NEXT: vinserti128 $1, %xmm14, %ymm0, %ymm14
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm14 = ymm2[0,1,2],ymm14[3,4,5,6,7],ymm2[8,9,10],ymm14[11,12,13,14,15]
-; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,6,7,4]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm14[4,5,6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm2, %zmm19
-; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm2 = ymm11 ^ (ymm2 & (ymm23 ^ ymm11))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm7[2],ymm2[3,4],ymm7[5],ymm2[6,7,8,9],ymm7[10],ymm2[11,12],ymm7[13],ymm2[14,15]
-; AVX512-FCP-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm7 = xmm5[0,1],xmm15[2],xmm5[3,4],xmm15[5],xmm5[6,7]
-; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm7, %xmm6
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm2[5,6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm6[0,1,2,3],ymm2[4,5,6,7]
-; AVX512-FCP-NEXT: vmovdqa %ymm13, %ymm6
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm6 = ymm24 ^ (ymm6 & (ymm12 ^ ymm24))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm6[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0,1],ymm7[2],ymm6[3,4],ymm7[5],ymm6[6,7,8,9],ymm7[10],ymm6[11,12],ymm7[13],ymm6[14,15]
-; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm6, %ymm4
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm1[2],xmm10[3,4],xmm1[5],xmm10[6,7]
-; AVX512-FCP-NEXT: vpshufb %xmm3, %xmm6, %xmm3
-; AVX512-FCP-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3,4,5,6,7],ymm4[8,9,10],ymm3[11,12,13,14,15]
-; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,5,6,7,4]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm3, %zmm2
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm11 = ymm23 ^ (ymm13 & (ymm11 ^ ymm23))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm11[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm11[1,2],ymm3[3],ymm11[4,5],ymm3[6],ymm11[7],ymm3[8],ymm11[9,10],ymm3[11],ymm11[12,13],ymm3[14],ymm11[15]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm15[0,1],xmm5[2],xmm15[3,4],xmm5[5],xmm15[6,7]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
-; AVX512-FCP-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm24 ^ (ymm0 & (ymm12 ^ ymm24))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm12[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm12[1,2],ymm4[3],ymm12[4,5],ymm4[6],ymm12[7],ymm4[8],ymm12[9,10],ymm4[11],ymm12[12,13],ymm4[14],ymm12[15]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm10[1],xmm1[2,3],xmm10[4],xmm1[5,6],xmm10[7]
+; AVX512-FCP-NEXT: vmovdqa 64(%rdi), %xmm11
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm5 = xmm11[0,1],xmm10[2],xmm11[3,4],xmm10[5],xmm11[6,7]
+; AVX512-FCP-NEXT: vpshufb %xmm15, %xmm5, %xmm5
+; AVX512-FCP-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm5
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm0[0,1,2],ymm5[3,4,5,6,7],ymm0[8,9,10],ymm5[11,12,13,14,15]
+; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm5[4,5,6,7]
+; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm18
+; AVX512-FCP-NEXT: vmovdqa %ymm9, %ymm15
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm15 = ymm12 ^ (ymm15 & (ymm19 ^ ymm12))
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm19 ^ (ymm0 & (ymm12 ^ ymm19))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm12[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm1[0],ymm12[1,2],ymm1[3],ymm12[4,5],ymm1[6],ymm12[7],ymm1[8],ymm12[9,10],ymm1[11],ymm12[12,13],ymm1[14],ymm12[15]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512-FCP-NEXT: vpshufb %ymm1, %ymm5, %ymm5
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0,1],xmm14[2],xmm13[3,4],xmm14[5],xmm13[6,7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm2 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
+; AVX512-FCP-NEXT: vpshufb %xmm2, %xmm12, %xmm12
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm12[0,1,2,3,4],xmm5[5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm12[0,1,2,3],ymm5[4,5,6,7]
+; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm12
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm17 ^ (ymm12 & (ymm4 ^ ymm17))
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm4 = ymm17 ^ (ymm9 & (ymm4 ^ ymm17))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm4[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm4[1,2],ymm3[3],ymm4[4,5],ymm3[6],ymm4[7],ymm3[8],ymm4[9,10],ymm3[11],ymm4[12,13],ymm3[14],ymm4[15]
+; AVX512-FCP-NEXT: vpshufb %ymm1, %ymm3, %ymm3
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm11[0],xmm10[1],xmm11[2,3],xmm10[4],xmm11[5,6],xmm10[7]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm6 = [0,1,2,3,0,1,6,7,12,13,2,3,8,9,14,15]
-; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,1,2,3,4,9,10,11]
-; AVX512-FCP-NEXT: vpermt2d %ymm1, %ymm7, %ymm4
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm4, %zmm1
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm13 = ymm21 ^ (ymm13 & (ymm22 ^ ymm21))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm13[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm13[1,2],ymm3[3],ymm13[4,5],ymm3[6],ymm13[7],ymm3[8],ymm13[9,10],ymm3[11],ymm13[12,13],ymm3[14],ymm13[15]
-; AVX512-FCP-NEXT: vmovdqa64 %xmm25, %xmm4
-; AVX512-FCP-NEXT: vmovdqa64 %xmm26, %xmm9
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm9[2],xmm4[3,4],xmm9[5],xmm4[6,7]
-; AVX512-FCP-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm18 ^ ymm20))
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm0[2,3,0,1]
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm4[0],ymm0[1,2],ymm4[3],ymm0[4,5],ymm4[6],ymm0[7],ymm4[8],ymm0[9,10],ymm4[11],ymm0[12,13],ymm4[14],ymm0[15]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm0, %ymm0
-; AVX512-FCP-NEXT: vmovdqa64 %xmm27, %xmm4
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm4, %xmm4
-; AVX512-FCP-NEXT: vpermt2d %ymm4, %ymm7, %ymm0
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm17, (%rsi)
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm17 = [0,1,2,3,4,9,10,11]
+; AVX512-FCP-NEXT: vpermt2d %ymm4, %ymm17, %ymm3
+; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm3, %zmm19
+; AVX512-FCP-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm22 ^ (ymm0 & (ymm23 ^ ymm22))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm0[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm3[0],ymm0[1,2],ymm3[3],ymm0[4,5],ymm3[6],ymm0[7],ymm3[8],ymm0[9,10],ymm3[11],ymm0[12,13],ymm3[14],ymm0[15]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0,1],xmm8[2],xmm7[3,4],xmm8[5],xmm7[6,7]
+; AVX512-FCP-NEXT: vpshufb %xmm2, %xmm3, %xmm2
+; AVX512-FCP-NEXT: vpshufb %ymm1, %ymm0, %ymm0
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3,4],xmm0[5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX512-FCP-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm9 = ymm21 ^ (ymm9 & (ymm20 ^ ymm21))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm9[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm9[1,2],ymm3[3],ymm9[4,5],ymm3[6],ymm9[7],ymm3[8],ymm9[9,10],ymm3[11],ymm9[12,13],ymm3[14],ymm9[15]
+; AVX512-FCP-NEXT: vpshufb %ymm1, %ymm3, %ymm1
+; AVX512-FCP-NEXT: vmovdqa64 %xmm24, %xmm4
+; AVX512-FCP-NEXT: vmovdqa64 %xmm25, %xmm9
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm9[1],xmm4[2,3],xmm9[4],xmm4[5,6],xmm9[7]
+; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm3, %xmm3
+; AVX512-FCP-NEXT: vpermt2d %ymm3, %ymm17, %ymm1
+; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm2
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm15[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm15[0,1],ymm1[2],ymm15[3,4],ymm1[5],ymm15[6,7,8,9],ymm1[10],ymm15[11,12],ymm1[13],ymm15[14,15]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm3 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
+; AVX512-FCP-NEXT: vpshufb %ymm3, %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm14[0,1],xmm13[2],xmm14[3,4],xmm13[5],xmm14[6,7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm15 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
+; AVX512-FCP-NEXT: vpshufb %xmm15, %xmm6, %xmm6
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm1[5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm21 ^ (ymm5 & (ymm20 ^ ymm21))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm6 = ymm5[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm6[2],ymm5[3,4],ymm6[5],ymm5[6,7,8,9],ymm6[10],ymm5[11,12],ymm6[13],ymm5[14,15]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
+; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm13 = xmm9[0,1],xmm4[2],xmm9[3,4],xmm4[5],xmm9[6,7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm14 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
+; AVX512-FCP-NEXT: vpshufb %xmm14, %xmm13, %xmm13
+; AVX512-FCP-NEXT: vinserti128 $1, %xmm13, %ymm0, %ymm13
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm13 = ymm5[0,1,2],ymm13[3,4,5,6,7],ymm5[8,9,10],ymm13[11,12,13,14,15]
+; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,5,6,7,4]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm13[4,5,6,7]
+; AVX512-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm23 ^ (ymm0 & (ymm22 ^ ymm23))
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm13 = ymm0[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0,1],ymm13[2],ymm0[3,4],ymm13[5],ymm0[6,7,8,9],ymm13[10],ymm0[11,12],ymm13[13],ymm0[14,15]
+; AVX512-FCP-NEXT: vpshufb %ymm3, %ymm0, %ymm0
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm8[0,1],xmm7[2],xmm8[3,4],xmm7[5],xmm8[6,7]
+; AVX512-FCP-NEXT: vpshufb %xmm15, %xmm3, %xmm3
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4],xmm0[5,6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm12[2,3,0,1]
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm12[0,1],ymm3[2],ymm12[3,4],ymm3[5],ymm12[6,7,8,9],ymm3[10],ymm12[11,12],ymm3[13],ymm12[14,15]
+; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm11[2],xmm10[3,4],xmm11[5],xmm10[6,7]
+; AVX512-FCP-NEXT: vpshufb %xmm14, %xmm6, %xmm6
+; AVX512-FCP-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm3[0,1,2],ymm6[3,4,5,6,7],ymm3[8,9,10],ymm6[11,12,13,14,15]
+; AVX512-FCP-NEXT: vpshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,6,7,4]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3],ymm6[4,5,6,7]
+; AVX512-FCP-NEXT: vmovdqa64 %zmm18, (%rsi)
; AVX512-FCP-NEXT: vmovdqa64 %zmm16, 64(%rsi)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm19, 64(%rdx)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm2, (%rdx)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, 64(%rcx)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm1, (%rcx)
+; AVX512-FCP-NEXT: vmovdqa %ymm0, 96(%rdx)
+; AVX512-FCP-NEXT: vmovdqa %ymm5, 64(%rdx)
+; AVX512-FCP-NEXT: vmovdqa %ymm1, 32(%rdx)
+; AVX512-FCP-NEXT: vmovdqa %ymm3, (%rdx)
+; AVX512-FCP-NEXT: vmovdqa64 %zmm2, 64(%rcx)
+; AVX512-FCP-NEXT: vmovdqa64 %zmm19, (%rcx)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: load_i16_stride3_vf64:
; AVX512DQ: # %bb.0:
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512DQ-NEXT: vmovdqa64 224(%rdi), %ymm18
-; AVX512DQ-NEXT: vmovdqa64 192(%rdi), %ymm20
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm18 ^ (ymm1 & (ymm20 ^ ymm18))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm2 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm7 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
-; AVX512DQ-NEXT: vpshufb %ymm7, %ymm2, %ymm5
-; AVX512DQ-NEXT: vmovdqa64 272(%rdi), %xmm1
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm9 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
+; AVX512DQ-NEXT: vmovdqa64 224(%rdi), %ymm20
+; AVX512DQ-NEXT: vmovdqa64 192(%rdi), %ymm21
+; AVX512DQ-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm21 ^ ymm20))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm0[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7],ymm0[8],ymm1[9],ymm0[10,11],ymm1[12],ymm0[13,14],ymm1[15]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm0 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
+; AVX512DQ-NEXT: vpshufb %ymm0, %ymm1, %ymm1
+; AVX512DQ-NEXT: vmovdqa64 272(%rdi), %xmm2
; AVX512DQ-NEXT: vmovdqa64 256(%rdi), %xmm3
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0,1],xmm1[2],xmm3[3,4],xmm1[5],xmm3[6,7]
-; AVX512DQ-NEXT: vmovdqa64 %xmm1, %xmm19
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm13 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
-; AVX512DQ-NEXT: vpshufb %xmm13, %xmm6, %xmm6
-; AVX512DQ-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm6 = ymm5[0,1,2],ymm6[3,4,5,6,7],ymm5[8,9,10],ymm6[11,12,13,14,15]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,6,5,4,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm6[4,5,6,7]
-; AVX512DQ-NEXT: vmovdqa64 320(%rdi), %ymm21
-; AVX512DQ-NEXT: vmovdqa64 352(%rdi), %ymm22
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm8
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm8 = ymm21 ^ (ymm8 & (ymm22 ^ ymm21))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm8[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm8 = ymm8[0],ymm9[1],ymm8[2,3],ymm9[4],ymm8[5,6],ymm9[7],ymm8[8],ymm9[9],ymm8[10,11],ymm9[12],ymm8[13,14],ymm9[15]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm10 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
-; AVX512DQ-NEXT: vpshufb %ymm10, %ymm8, %ymm11
-; AVX512DQ-NEXT: vmovdqa64 304(%rdi), %xmm8
-; AVX512DQ-NEXT: vmovdqa64 288(%rdi), %xmm4
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm12 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm14 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
-; AVX512DQ-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm11 = ymm12[0,1,2],ymm11[3,4,5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm11, %zmm5, %zmm16
-; AVX512DQ-NEXT: vmovdqa64 128(%rdi), %ymm23
-; AVX512DQ-NEXT: vmovdqa64 160(%rdi), %ymm11
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm5
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm5 = ymm23 ^ (ymm5 & (ymm11 ^ ymm23))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm12 = ymm5[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm12[1],ymm5[2,3],ymm12[4],ymm5[5,6],ymm12[7],ymm5[8],ymm12[9],ymm5[10,11],ymm12[12],ymm5[13,14],ymm12[15]
-; AVX512DQ-NEXT: vpshufb %ymm10, %ymm5, %ymm10
-; AVX512DQ-NEXT: vmovdqa 112(%rdi), %xmm15
-; AVX512DQ-NEXT: vmovdqa 96(%rdi), %xmm5
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm12 = xmm5[0],xmm15[1],xmm5[2,3],xmm15[4],xmm5[5,6],xmm15[7]
-; AVX512DQ-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm12[0,1,2],ymm10[3,4,5,6,7]
-; AVX512DQ-NEXT: vmovdqa64 (%rdi), %ymm24
-; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm12
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm10 = ymm12 ^ (ymm10 & (ymm24 ^ ymm12))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm10[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm10[0],ymm1[1],ymm10[2,3],ymm1[4],ymm10[5,6],ymm1[7],ymm10[8],ymm1[9],ymm10[10,11],ymm1[12],ymm10[13,14],ymm1[15]
-; AVX512DQ-NEXT: vpshufb %ymm7, %ymm1, %ymm7
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm3[0,1],xmm2[2],xmm3[3,4],xmm2[5],xmm3[6,7]
+; AVX512DQ-NEXT: vmovdqa64 %xmm3, %xmm24
+; AVX512DQ-NEXT: vmovdqa64 %xmm2, %xmm25
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm15 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
+; AVX512DQ-NEXT: vpshufb %xmm15, %xmm4, %xmm4
+; AVX512DQ-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm4 = ymm1[0,1,2],ymm4[3,4,5,6,7],ymm1[8,9,10],ymm4[11,12,13,14,15]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,5,4,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm4[4,5,6,7]
+; AVX512DQ-NEXT: vmovdqa64 320(%rdi), %ymm22
+; AVX512DQ-NEXT: vmovdqa64 352(%rdi), %ymm23
+; AVX512DQ-NEXT: vmovdqa %ymm9, %ymm4
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm4 = ymm22 ^ (ymm4 & (ymm23 ^ ymm22))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm4[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2,3],ymm5[4],ymm4[5,6],ymm5[7],ymm4[8],ymm5[9],ymm4[10,11],ymm5[12],ymm4[13,14],ymm5[15]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm4, %ymm4
+; AVX512DQ-NEXT: vmovdqa64 304(%rdi), %xmm7
+; AVX512DQ-NEXT: vmovdqa64 288(%rdi), %xmm8
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm10 = xmm8[0],xmm7[1],xmm8[2,3],xmm7[4],xmm8[5,6],xmm7[7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm11 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
+; AVX512DQ-NEXT: vpshufb %xmm11, %xmm10, %xmm10
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm10[0,1,2],ymm4[3,4,5,6,7]
+; AVX512DQ-NEXT: vinserti64x4 $1, %ymm4, %zmm1, %zmm16
+; AVX512DQ-NEXT: vmovdqa64 128(%rdi), %ymm19
+; AVX512DQ-NEXT: vmovdqa64 160(%rdi), %ymm12
+; AVX512DQ-NEXT: vmovdqa %ymm9, %ymm1
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm19 ^ (ymm1 & (ymm12 ^ ymm19))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm1[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm4[1],ymm1[2,3],ymm4[4],ymm1[5,6],ymm4[7],ymm1[8],ymm4[9],ymm1[10,11],ymm4[12],ymm1[13,14],ymm4[15]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512DQ-NEXT: vmovdqa 112(%rdi), %xmm13
+; AVX512DQ-NEXT: vmovdqa 96(%rdi), %xmm14
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm14[0],xmm13[1],xmm14[2,3],xmm13[4],xmm14[5,6],xmm13[7]
+; AVX512DQ-NEXT: vpshufb %xmm11, %xmm4, %xmm4
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2],ymm1[3,4,5,6,7]
+; AVX512DQ-NEXT: vmovdqa64 (%rdi), %ymm17
+; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm4
+; AVX512DQ-NEXT: vmovdqa %ymm9, %ymm5
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm5 = ymm4 ^ (ymm5 & (ymm17 ^ ymm4))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm10 = ymm5[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm10[1],ymm5[2,3],ymm10[4],ymm5[5,6],ymm10[7],ymm5[8],ymm10[9],ymm5[10,11],ymm10[12],ymm5[13,14],ymm10[15]
+; AVX512DQ-NEXT: vpshufb %ymm0, %ymm5, %ymm0
; AVX512DQ-NEXT: vmovdqa 80(%rdi), %xmm10
-; AVX512DQ-NEXT: vmovdqa 64(%rdi), %xmm1
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm2 = xmm1[0,1],xmm10[2],xmm1[3,4],xmm10[5],xmm1[6,7]
-; AVX512DQ-NEXT: vpshufb %xmm13, %xmm2, %xmm2
-; AVX512DQ-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm2 = ymm7[0,1,2],ymm2[3,4,5,6,7],ymm7[8,9,10],ymm2[11,12,13,14,15]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm7 = xmm7[0,1,2,3,6,5,4,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm6, %zmm2, %zmm17
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm2 = ymm22 ^ (ymm2 & (ymm21 ^ ymm22))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm6 = ymm2[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm6[2],ymm2[3,4],ymm6[5],ymm2[6,7,8,9],ymm6[10],ymm2[11,12],ymm6[13],ymm2[14,15]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm9 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512DQ-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm7 = xmm4[0,1],xmm8[2],xmm4[3,4],xmm8[5],xmm4[6,7]
-; AVX512DQ-NEXT: vmovdqa64 %xmm8, %xmm25
-; AVX512DQ-NEXT: vmovdqa64 %xmm4, %xmm26
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm6 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
-; AVX512DQ-NEXT: vpshufb %xmm6, %xmm7, %xmm7
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0,1,2,3,4],xmm2[5,6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm13 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
-; AVX512DQ-NEXT: vmovdqa %ymm13, %ymm2
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm2 = ymm20 ^ (ymm2 & (ymm18 ^ ymm20))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm2[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm4[2],ymm2[3,4],ymm4[5],ymm2[6,7,8,9],ymm4[10],ymm2[11,12],ymm4[13],ymm2[14,15]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
-; AVX512DQ-NEXT: vpshufb %ymm4, %ymm2, %ymm2
-; AVX512DQ-NEXT: vmovdqa64 %xmm19, %xmm8
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm14 = xmm8[0,1],xmm3[2],xmm8[3,4],xmm3[5],xmm8[6,7]
-; AVX512DQ-NEXT: vmovdqa64 %xmm3, %xmm27
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm3 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
-; AVX512DQ-NEXT: vpshufb %xmm3, %xmm14, %xmm14
-; AVX512DQ-NEXT: vinserti128 $1, %xmm14, %ymm0, %ymm14
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm14 = ymm2[0,1,2],ymm14[3,4,5,6,7],ymm2[8,9,10],ymm14[11,12,13,14,15]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,6,7,4]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm14[4,5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm7, %zmm2, %zmm19
-; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm2 = ymm11 ^ (ymm2 & (ymm23 ^ ymm11))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm2[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm7[2],ymm2[3,4],ymm7[5],ymm2[6,7,8,9],ymm7[10],ymm2[11,12],ymm7[13],ymm2[14,15]
-; AVX512DQ-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm7 = xmm5[0,1],xmm15[2],xmm5[3,4],xmm15[5],xmm5[6,7]
-; AVX512DQ-NEXT: vpshufb %xmm6, %xmm7, %xmm6
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm2[5,6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm6[0,1,2,3],ymm2[4,5,6,7]
-; AVX512DQ-NEXT: vmovdqa %ymm13, %ymm6
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm6 = ymm24 ^ (ymm6 & (ymm12 ^ ymm24))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm6[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0,1],ymm7[2],ymm6[3,4],ymm7[5],ymm6[6,7,8,9],ymm7[10],ymm6[11,12],ymm7[13],ymm6[14,15]
-; AVX512DQ-NEXT: vpshufb %ymm4, %ymm6, %ymm4
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm1[2],xmm10[3,4],xmm1[5],xmm10[6,7]
-; AVX512DQ-NEXT: vpshufb %xmm3, %xmm6, %xmm3
-; AVX512DQ-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3,4,5,6,7],ymm4[8,9,10],ymm3[11,12,13,14,15]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,5,6,7,4]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm2, %zmm3, %zmm2
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm11 = ymm23 ^ (ymm13 & (ymm11 ^ ymm23))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm11[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm11[1,2],ymm3[3],ymm11[4,5],ymm3[6],ymm11[7],ymm3[8],ymm11[9,10],ymm3[11],ymm11[12,13],ymm3[14],ymm11[15]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm11 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm15[0,1],xmm5[2],xmm15[3,4],xmm5[5],xmm15[6,7]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
-; AVX512DQ-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm12 = ymm24 ^ (ymm0 & (ymm12 ^ ymm24))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm12[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm12[1,2],ymm4[3],ymm12[4,5],ymm4[6],ymm12[7],ymm4[8],ymm12[9,10],ymm4[11],ymm12[12,13],ymm4[14],ymm12[15]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm10[1],xmm1[2,3],xmm10[4],xmm1[5,6],xmm10[7]
+; AVX512DQ-NEXT: vmovdqa 64(%rdi), %xmm11
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm5 = xmm11[0,1],xmm10[2],xmm11[3,4],xmm10[5],xmm11[6,7]
+; AVX512DQ-NEXT: vpshufb %xmm15, %xmm5, %xmm5
+; AVX512DQ-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm5
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm0[0,1,2],ymm5[3,4,5,6,7],ymm0[8,9,10],ymm5[11,12,13,14,15]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm5[4,5,6,7]
+; AVX512DQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm18
+; AVX512DQ-NEXT: vmovdqa %ymm9, %ymm15
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm15 = ymm12 ^ (ymm15 & (ymm19 ^ ymm12))
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm12 = ymm19 ^ (ymm0 & (ymm12 ^ ymm19))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm12[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm1[0],ymm12[1,2],ymm1[3],ymm12[4,5],ymm1[6],ymm12[7],ymm1[8],ymm12[9,10],ymm1[11],ymm12[12,13],ymm1[14],ymm12[15]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512DQ-NEXT: vpshufb %ymm1, %ymm5, %ymm5
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0,1],xmm14[2],xmm13[3,4],xmm14[5],xmm13[6,7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm2 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
+; AVX512DQ-NEXT: vpshufb %xmm2, %xmm12, %xmm12
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm12 = xmm12[0,1,2,3,4],xmm5[5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm12[0,1,2,3],ymm5[4,5,6,7]
+; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm12
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm12 = ymm17 ^ (ymm12 & (ymm4 ^ ymm17))
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm4 = ymm17 ^ (ymm9 & (ymm4 ^ ymm17))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm4[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm4[1,2],ymm3[3],ymm4[4,5],ymm3[6],ymm4[7],ymm3[8],ymm4[9,10],ymm3[11],ymm4[12,13],ymm3[14],ymm4[15]
+; AVX512DQ-NEXT: vpshufb %ymm1, %ymm3, %ymm3
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm11[0],xmm10[1],xmm11[2,3],xmm10[4],xmm11[5,6],xmm10[7]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm6 = [0,1,2,3,0,1,6,7,12,13,2,3,8,9,14,15]
-; AVX512DQ-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512DQ-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2,3,4],ymm1[5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm3, %zmm1, %zmm1
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm13 = ymm21 ^ (ymm13 & (ymm22 ^ ymm21))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm13[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm13[1,2],ymm3[3],ymm13[4,5],ymm3[6],ymm13[7],ymm3[8],ymm13[9,10],ymm3[11],ymm13[12,13],ymm3[14],ymm13[15]
-; AVX512DQ-NEXT: vmovdqa64 %xmm25, %xmm4
-; AVX512DQ-NEXT: vmovdqa64 %xmm26, %xmm7
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm7[2],xmm4[3,4],xmm7[5],xmm4[6,7]
-; AVX512DQ-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm18 ^ ymm20))
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm0[2,3,0,1]
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm0 = ymm4[0],ymm0[1,2],ymm4[3],ymm0[4,5],ymm4[6],ymm0[7],ymm4[8],ymm0[9,10],ymm4[11],ymm0[12,13],ymm4[14],ymm0[15]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm0, %ymm0
-; AVX512DQ-NEXT: vmovdqa64 %xmm27, %xmm4
-; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
; AVX512DQ-NEXT: vpshufb %xmm6, %xmm4, %xmm4
; AVX512DQ-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm4[5,6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm17, (%rsi)
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3,4],ymm4[5,6,7]
+; AVX512DQ-NEXT: vinserti64x4 $1, %ymm5, %zmm3, %zmm17
+; AVX512DQ-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm22 ^ (ymm0 & (ymm23 ^ ymm22))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm0[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm0 = ymm3[0],ymm0[1,2],ymm3[3],ymm0[4,5],ymm3[6],ymm0[7],ymm3[8],ymm0[9,10],ymm3[11],ymm0[12,13],ymm3[14],ymm0[15]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0,1],xmm8[2],xmm7[3,4],xmm8[5],xmm7[6,7]
+; AVX512DQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
+; AVX512DQ-NEXT: vpshufb %ymm1, %ymm0, %ymm0
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3,4],xmm0[5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX512DQ-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm9 = ymm21 ^ (ymm9 & (ymm20 ^ ymm21))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm9[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm9[1,2],ymm3[3],ymm9[4,5],ymm3[6],ymm9[7],ymm3[8],ymm9[9,10],ymm3[11],ymm9[12,13],ymm3[14],ymm9[15]
+; AVX512DQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
+; AVX512DQ-NEXT: vmovdqa64 %xmm24, %xmm4
+; AVX512DQ-NEXT: vmovdqa64 %xmm25, %xmm9
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm9[1],xmm4[2,3],xmm9[4],xmm4[5,6],xmm9[7]
+; AVX512DQ-NEXT: vpshufb %xmm6, %xmm3, %xmm3
+; AVX512DQ-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3,4],ymm3[5,6,7]
+; AVX512DQ-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm2
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm15[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm15[0,1],ymm1[2],ymm15[3,4],ymm1[5],ymm15[6,7,8,9],ymm1[10],ymm15[11,12],ymm1[13],ymm15[14,15]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm3 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
+; AVX512DQ-NEXT: vpshufb %ymm3, %ymm1, %ymm1
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm6 = xmm14[0,1],xmm13[2],xmm14[3,4],xmm13[5],xmm14[6,7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm15 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
+; AVX512DQ-NEXT: vpshufb %xmm15, %xmm6, %xmm6
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm1[5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm5 = ymm21 ^ (ymm5 & (ymm20 ^ ymm21))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm6 = ymm5[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm6[2],ymm5[3,4],ymm6[5],ymm5[6,7,8,9],ymm6[10],ymm5[11,12],ymm6[13],ymm5[14,15]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm6 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
+; AVX512DQ-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm13 = xmm9[0,1],xmm4[2],xmm9[3,4],xmm4[5],xmm9[6,7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} xmm14 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
+; AVX512DQ-NEXT: vpshufb %xmm14, %xmm13, %xmm13
+; AVX512DQ-NEXT: vinserti128 $1, %xmm13, %ymm0, %ymm13
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm13 = ymm5[0,1,2],ymm13[3,4,5,6,7],ymm5[8,9,10],ymm13[11,12,13,14,15]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,5,6,7,4]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm13[4,5,6,7]
+; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm23 ^ (ymm0 & (ymm22 ^ ymm23))
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm13 = ymm0[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0,1],ymm13[2],ymm0[3,4],ymm13[5],ymm0[6,7,8,9],ymm13[10],ymm0[11,12],ymm13[13],ymm0[14,15]
+; AVX512DQ-NEXT: vpshufb %ymm3, %ymm0, %ymm0
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm3 = xmm8[0,1],xmm7[2],xmm8[3,4],xmm7[5],xmm8[6,7]
+; AVX512DQ-NEXT: vpshufb %xmm15, %xmm3, %xmm3
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4],xmm0[5,6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm12[2,3,0,1]
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm12[0,1],ymm3[2],ymm12[3,4],ymm3[5],ymm12[6,7,8,9],ymm3[10],ymm12[11,12],ymm3[13],ymm12[14,15]
+; AVX512DQ-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm11[2],xmm10[3,4],xmm11[5],xmm10[6,7]
+; AVX512DQ-NEXT: vpshufb %xmm14, %xmm6, %xmm6
+; AVX512DQ-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm6 = ymm3[0,1,2],ymm6[3,4,5,6,7],ymm3[8,9,10],ymm6[11,12,13,14,15]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,6,7,4]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3],ymm6[4,5,6,7]
+; AVX512DQ-NEXT: vmovdqa64 %zmm18, (%rsi)
; AVX512DQ-NEXT: vmovdqa64 %zmm16, 64(%rsi)
-; AVX512DQ-NEXT: vmovdqa64 %zmm19, 64(%rdx)
-; AVX512DQ-NEXT: vmovdqa64 %zmm2, (%rdx)
-; AVX512DQ-NEXT: vmovdqa64 %zmm0, 64(%rcx)
-; AVX512DQ-NEXT: vmovdqa64 %zmm1, (%rcx)
+; AVX512DQ-NEXT: vmovdqa %ymm0, 96(%rdx)
+; AVX512DQ-NEXT: vmovdqa %ymm5, 64(%rdx)
+; AVX512DQ-NEXT: vmovdqa %ymm1, 32(%rdx)
+; AVX512DQ-NEXT: vmovdqa %ymm3, (%rdx)
+; AVX512DQ-NEXT: vmovdqa64 %zmm2, 64(%rcx)
+; AVX512DQ-NEXT: vmovdqa64 %zmm17, (%rcx)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: load_i16_stride3_vf64:
; AVX512DQ-FCP: # %bb.0:
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
-; AVX512DQ-FCP-NEXT: vmovdqa64 224(%rdi), %ymm18
-; AVX512DQ-FCP-NEXT: vmovdqa64 192(%rdi), %ymm20
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm1
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm18 ^ (ymm1 & (ymm20 ^ ymm18))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm1[0],ymm2[1],ymm1[2,3],ymm2[4],ymm1[5,6],ymm2[7],ymm1[8],ymm2[9],ymm1[10,11],ymm2[12],ymm1[13,14],ymm2[15]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm2, %ymm5
-; AVX512DQ-FCP-NEXT: vmovdqa64 272(%rdi), %xmm1
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm9 = [65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535]
+; AVX512DQ-FCP-NEXT: vmovdqa64 224(%rdi), %ymm20
+; AVX512DQ-FCP-NEXT: vmovdqa64 192(%rdi), %ymm21
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm21 ^ ymm20))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm0[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7],ymm0[8],ymm1[9],ymm0[10,11],ymm1[12],ymm0[13,14],ymm1[15]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [0,1,6,7,12,13,2,3,4,5,14,15,8,9,10,11,16,17,22,23,28,29,18,19,20,21,30,31,24,25,26,27]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa64 272(%rdi), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa64 256(%rdi), %xmm3
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0,1],xmm1[2],xmm3[3,4],xmm1[5],xmm3[6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm1, %xmm19
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm13 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm13, %xmm6, %xmm6
-; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm5[0,1,2],ymm6[3,4,5,6,7],ymm5[8,9,10],ymm6[11,12,13,14,15]
-; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,6,5,4,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm6[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa64 320(%rdi), %ymm21
-; AVX512DQ-FCP-NEXT: vmovdqa64 352(%rdi), %ymm22
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm8
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm8 = ymm21 ^ (ymm8 & (ymm22 ^ ymm21))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm8[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm8 = ymm8[0],ymm9[1],ymm8[2,3],ymm9[4],ymm8[5,6],ymm9[7],ymm8[8],ymm9[9],ymm8[10,11],ymm9[12],ymm8[13,14],ymm9[15]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm8, %ymm11
-; AVX512DQ-FCP-NEXT: vmovdqa64 304(%rdi), %xmm8
-; AVX512DQ-FCP-NEXT: vmovdqa64 288(%rdi), %xmm4
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm14 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm12[0,1,2],ymm11[3,4,5,6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm11, %zmm5, %zmm16
-; AVX512DQ-FCP-NEXT: vmovdqa64 128(%rdi), %ymm23
-; AVX512DQ-FCP-NEXT: vmovdqa64 160(%rdi), %ymm11
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm5
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm23 ^ (ymm5 & (ymm11 ^ ymm23))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm5[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm12[1],ymm5[2,3],ymm12[4],ymm5[5,6],ymm12[7],ymm5[8],ymm12[9],ymm5[10,11],ymm12[12],ymm5[13,14],ymm12[15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm5, %ymm10
-; AVX512DQ-FCP-NEXT: vmovdqa 112(%rdi), %xmm15
-; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdi), %xmm5
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm5[0],xmm15[1],xmm5[2,3],xmm15[4],xmm5[5,6],xmm15[7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm14, %xmm12, %xmm12
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm12[0,1,2],ymm10[3,4,5,6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa64 (%rdi), %ymm24
-; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %ymm12
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm10
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm10 = ymm12 ^ (ymm10 & (ymm24 ^ ymm12))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm10[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm10[0],ymm1[1],ymm10[2,3],ymm1[4],ymm10[5,6],ymm1[7],ymm10[8],ymm1[9],ymm10[10,11],ymm1[12],ymm10[13,14],ymm1[15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm7
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm3[0,1],xmm2[2],xmm3[3,4],xmm2[5],xmm3[6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm3, %xmm24
+; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm25
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm15 = [4,5,14,15,0,1,2,3,8,9,14,15,4,5,10,11]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm15, %xmm4, %xmm4
+; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm1[0,1,2],ymm4[3,4,5,6,7],ymm1[8,9,10],ymm4[11,12,13,14,15]
+; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,5,4,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm4[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa64 320(%rdi), %ymm22
+; AVX512DQ-FCP-NEXT: vmovdqa64 352(%rdi), %ymm23
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm9, %ymm4
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm4 = ymm22 ^ (ymm4 & (ymm23 ^ ymm22))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm4[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2,3],ymm5[4],ymm4[5,6],ymm5[7],ymm4[8],ymm5[9],ymm4[10,11],ymm5[12],ymm4[13,14],ymm5[15]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,6,7,12,13,2,3,8,9,14,15,4,5,10,11,16,17,22,23,28,29,18,19,24,25,30,31,20,21,26,27]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm4
+; AVX512DQ-FCP-NEXT: vmovdqa64 304(%rdi), %xmm7
+; AVX512DQ-FCP-NEXT: vmovdqa64 288(%rdi), %xmm8
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm10 = xmm8[0],xmm7[1],xmm8[2,3],xmm7[4],xmm8[5,6],xmm7[7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm11 = [0,1,6,7,12,13,2,3,8,9,14,15,12,13,14,15]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm11, %xmm10, %xmm10
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm10[0,1,2],ymm4[3,4,5,6,7]
+; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm1, %zmm16
+; AVX512DQ-FCP-NEXT: vmovdqa64 128(%rdi), %ymm19
+; AVX512DQ-FCP-NEXT: vmovdqa64 160(%rdi), %ymm12
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm9, %ymm1
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm1 = ymm19 ^ (ymm1 & (ymm12 ^ ymm19))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm1[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm4[1],ymm1[2,3],ymm4[4],ymm1[5,6],ymm4[7],ymm1[8],ymm4[9],ymm1[10,11],ymm4[12],ymm1[13,14],ymm4[15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa 112(%rdi), %xmm13
+; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdi), %xmm14
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm14[0],xmm13[1],xmm14[2,3],xmm13[4],xmm14[5,6],xmm13[7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm11, %xmm4, %xmm4
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2],ymm1[3,4,5,6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa64 (%rdi), %ymm17
+; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %ymm4
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm9, %ymm5
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm4 ^ (ymm5 & (ymm17 ^ ymm4))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm10 = ymm5[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0],ymm10[1],ymm5[2,3],ymm10[4],ymm5[5,6],ymm10[7],ymm5[8],ymm10[9],ymm5[10,11],ymm10[12],ymm5[13,14],ymm10[15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm5, %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa 80(%rdi), %xmm10
-; AVX512DQ-FCP-NEXT: vmovdqa 64(%rdi), %xmm1
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm2 = xmm1[0,1],xmm10[2],xmm1[3,4],xmm10[5],xmm1[6,7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm13, %xmm2, %xmm2
-; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm7[0,1,2],ymm2[3,4,5,6,7],ymm7[8,9,10],ymm2[11,12,13,14,15]
-; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm7 = xmm7[0,1,2,3,6,5,4,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm2, %zmm17
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm2 = ymm22 ^ (ymm2 & (ymm21 ^ ymm22))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm6 = ymm2[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm6[2],ymm2[3,4],ymm6[5],ymm2[6,7,8,9],ymm6[10],ymm2[11,12],ymm6[13],ymm2[14,15]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm9 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm7 = xmm4[0,1],xmm8[2],xmm4[3,4],xmm8[5],xmm4[6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm8, %xmm25
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm4, %xmm26
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm6 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm7, %xmm7
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0,1,2,3,4],xmm2[5,6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1,2,3],ymm2[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm13 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm13, %ymm2
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm2 = ymm20 ^ (ymm2 & (ymm18 ^ ymm20))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm2[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm4[2],ymm2[3,4],ymm4[5],ymm2[6,7,8,9],ymm4[10],ymm2[11,12],ymm4[13],ymm2[14,15]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm19, %xmm8
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm14 = xmm8[0,1],xmm3[2],xmm8[3,4],xmm3[5],xmm8[6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm3, %xmm27
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm3 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm3, %xmm14, %xmm14
-; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm14, %ymm0, %ymm14
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm14 = ymm2[0,1,2],ymm14[3,4,5,6,7],ymm2[8,9,10],ymm14[11,12,13,14,15]
-; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,6,7,4]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm14[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm2, %zmm19
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm2
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm2 = ymm11 ^ (ymm2 & (ymm23 ^ ymm11))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1],ymm7[2],ymm2[3,4],ymm7[5],ymm2[6,7,8,9],ymm7[10],ymm2[11,12],ymm7[13],ymm2[14,15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm9, %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm7 = xmm5[0,1],xmm15[2],xmm5[3,4],xmm15[5],xmm5[6,7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm7, %xmm6
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm2[5,6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm6[0,1,2,3],ymm2[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm13, %ymm6
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm6 = ymm24 ^ (ymm6 & (ymm12 ^ ymm24))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm6[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm6[0,1],ymm7[2],ymm6[3,4],ymm7[5],ymm6[6,7,8,9],ymm7[10],ymm6[11,12],ymm7[13],ymm6[14,15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm6, %ymm4
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm1[2],xmm10[3,4],xmm1[5],xmm10[6,7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm3, %xmm6, %xmm3
-; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3,4,5,6,7],ymm4[8,9,10],ymm3[11,12,13,14,15]
-; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,5,6,7,4]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm3, %zmm2
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm11 = ymm23 ^ (ymm13 & (ymm11 ^ ymm23))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm11[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm11[1,2],ymm3[3],ymm11[4,5],ymm3[6],ymm11[7],ymm3[8],ymm11[9,10],ymm3[11],ymm11[12,13],ymm3[14],ymm11[15]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm15[0,1],xmm5[2],xmm15[3,4],xmm5[5],xmm15[6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm24 ^ (ymm0 & (ymm12 ^ ymm24))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm12[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm4[0],ymm12[1,2],ymm4[3],ymm12[4,5],ymm4[6],ymm12[7],ymm4[8],ymm12[9,10],ymm4[11],ymm12[12,13],ymm4[14],ymm12[15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm10[1],xmm1[2,3],xmm10[4],xmm1[5,6],xmm10[7]
+; AVX512DQ-FCP-NEXT: vmovdqa 64(%rdi), %xmm11
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm5 = xmm11[0,1],xmm10[2],xmm11[3,4],xmm10[5],xmm11[6,7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm15, %xmm5, %xmm5
+; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm5
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm0[0,1,2],ymm5[3,4,5,6,7],ymm0[8,9,10],ymm5[11,12,13,14,15]
+; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm5[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm18
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm9, %ymm15
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm15 = ymm12 ^ (ymm15 & (ymm19 ^ ymm12))
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535,0,65535,65535]
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm19 ^ (ymm0 & (ymm12 ^ ymm19))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm12[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm1[0],ymm12[1,2],ymm1[3],ymm12[4,5],ymm1[6],ymm12[7],ymm1[8],ymm12[9,10],ymm1[11],ymm12[12,13],ymm1[14],ymm12[15]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,10,11,0,1,6,7,12,13,2,3,8,9,14,15,20,21,26,27,16,17,22,23,28,29,18,19,24,25,30,31]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm1, %ymm5, %ymm5
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0,1],xmm14[2],xmm13[3,4],xmm14[5],xmm13[6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm2 = [4,5,10,11,0,1,6,7,12,13,14,15,0,1,2,3]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm2, %xmm12, %xmm12
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm12 = xmm12[0,1,2,3,4],xmm5[5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm12[0,1,2,3],ymm5[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm12
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm12 = ymm17 ^ (ymm12 & (ymm4 ^ ymm17))
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm4 = ymm17 ^ (ymm9 & (ymm4 ^ ymm17))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm4[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm4[1,2],ymm3[3],ymm4[4,5],ymm3[6],ymm4[7],ymm3[8],ymm4[9,10],ymm3[11],ymm4[12,13],ymm3[14],ymm4[15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm1, %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm11[0],xmm10[1],xmm11[2,3],xmm10[4],xmm11[5,6],xmm10[7]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm6 = [0,1,2,3,0,1,6,7,12,13,2,3,8,9,14,15]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm1, %xmm1
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,1,2,3,4,9,10,11]
-; AVX512DQ-FCP-NEXT: vpermt2d %ymm1, %ymm7, %ymm4
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm4, %zmm1
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm13 = ymm21 ^ (ymm13 & (ymm22 ^ ymm21))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm13[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm13[1,2],ymm3[3],ymm13[4,5],ymm3[6],ymm13[7],ymm3[8],ymm13[9,10],ymm3[11],ymm13[12,13],ymm3[14],ymm13[15]
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm25, %xmm4
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm26, %xmm9
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm9[2],xmm4[3,4],xmm9[5],xmm4[6,7]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm5, %xmm4, %xmm4
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3,4],xmm3[5,6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
-; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm20 ^ (ymm0 & (ymm18 ^ ymm20))
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm0[2,3,0,1]
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm4[0],ymm0[1,2],ymm4[3],ymm0[4,5],ymm4[6],ymm0[7],ymm4[8],ymm0[9,10],ymm4[11],ymm0[12,13],ymm4[14],ymm0[15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm0, %ymm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm27, %xmm4
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm8[1],xmm4[2,3],xmm8[4],xmm4[5,6],xmm8[7]
; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm4, %xmm4
-; AVX512DQ-FCP-NEXT: vpermt2d %ymm4, %ymm7, %ymm0
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm17, (%rsi)
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm17 = [0,1,2,3,4,9,10,11]
+; AVX512DQ-FCP-NEXT: vpermt2d %ymm4, %ymm17, %ymm3
+; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm3, %zmm19
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, %ymm5
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm22 ^ (ymm0 & (ymm23 ^ ymm22))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm0[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm3[0],ymm0[1,2],ymm3[3],ymm0[4,5],ymm3[6],ymm0[7],ymm3[8],ymm0[9,10],ymm3[11],ymm0[12,13],ymm3[14],ymm0[15]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0,1],xmm8[2],xmm7[3,4],xmm8[5],xmm7[6,7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm2, %xmm3, %xmm2
+; AVX512DQ-FCP-NEXT: vpshufb %ymm1, %ymm0, %ymm0
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3,4],xmm0[5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm9, %ymm0
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm9 = ymm21 ^ (ymm9 & (ymm20 ^ ymm21))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm9[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0],ymm9[1,2],ymm3[3],ymm9[4,5],ymm3[6],ymm9[7],ymm3[8],ymm9[9,10],ymm3[11],ymm9[12,13],ymm3[14],ymm9[15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm1, %ymm3, %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm24, %xmm4
+; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm25, %xmm9
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm9[1],xmm4[2,3],xmm9[4],xmm4[5,6],xmm9[7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm3, %xmm3
+; AVX512DQ-FCP-NEXT: vpermt2d %ymm3, %ymm17, %ymm1
+; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm2
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm15[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm15[0,1],ymm1[2],ymm15[3,4],ymm1[5],ymm15[6,7,8,9],ymm1[10],ymm15[11,12],ymm1[13],ymm15[14,15]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm3 = [2,3,8,9,14,15,4,5,10,11,0,1,6,7,12,13,18,19,24,25,30,31,20,21,26,27,16,17,22,23,28,29]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm3, %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm14[0,1],xmm13[2],xmm14[3,4],xmm13[5],xmm14[6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm15 = [2,3,8,9,14,15,4,5,10,11,10,11,10,11,10,11]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm15, %xmm6, %xmm6
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1,2,3,4],xmm1[5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm5 = ymm21 ^ (ymm5 & (ymm20 ^ ymm21))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm6 = ymm5[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm5[0,1],ymm6[2],ymm5[3,4],ymm6[5],ymm5[6,7,8,9],ymm6[10],ymm5[11,12],ymm6[13],ymm5[14,15]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [2,3,8,9,14,15,4,5,12,13,10,11,0,1,6,7,18,19,24,25,30,31,20,21,28,29,26,27,16,17,22,23]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm5, %ymm5
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm13 = xmm9[0,1],xmm4[2],xmm9[3,4],xmm4[5],xmm9[6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm14 = [4,5,4,5,4,5,4,5,10,11,0,1,6,7,12,13]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm14, %xmm13, %xmm13
+; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm13, %ymm0, %ymm13
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm13 = ymm5[0,1,2],ymm13[3,4,5,6,7],ymm5[8,9,10],ymm13[11,12,13,14,15]
+; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,5,6,7,4]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1,2,3],ymm13[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vpternlogq {{.*#+}} ymm0 = ymm23 ^ (ymm0 & (ymm22 ^ ymm23))
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm13 = ymm0[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0,1],ymm13[2],ymm0[3,4],ymm13[5],ymm0[6,7,8,9],ymm13[10],ymm0[11,12],ymm13[13],ymm0[14,15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm3, %ymm0, %ymm0
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm8[0,1],xmm7[2],xmm8[3,4],xmm7[5],xmm8[6,7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm15, %xmm3, %xmm3
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4],xmm0[5,6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm12[2,3,0,1]
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm12[0,1],ymm3[2],ymm12[3,4],ymm3[5],ymm12[6,7,8,9],ymm3[10],ymm12[11,12],ymm3[13],ymm12[14,15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0,1],xmm11[2],xmm10[3,4],xmm11[5],xmm10[6,7]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm14, %xmm6, %xmm6
+; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm3[0,1,2],ymm6[3,4,5,6,7],ymm3[8,9,10],ymm6[11,12,13,14,15]
+; AVX512DQ-FCP-NEXT: vpshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,6,7,4]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3],ymm6[4,5,6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm18, (%rsi)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm16, 64(%rsi)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm19, 64(%rdx)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm2, (%rdx)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, 64(%rcx)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, (%rcx)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, 96(%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm5, 64(%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm1, 32(%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm3, (%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm2, 64(%rcx)
+; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm19, (%rcx)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
index 0c295016bada2..86cedd4a06ec7 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
@@ -925,95 +925,94 @@ define void @load_i16_stride4_vf16(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-LABEL: load_i16_stride4_vf16:
; AVX: # %bb.0:
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm4
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm1[1,2,3],xmm4[4],xmm1[5,6,7]
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm5
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm5[0],xmm1[1,2,3],xmm5[4],xmm1[5,6,7]
-; AVX-NEXT: vpackusdw %xmm0, %xmm2, %xmm0
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm6
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm6[0],xmm1[1,2,3],xmm6[4],xmm1[5,6,7]
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm7
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0],xmm1[1,2,3],xmm7[4],xmm1[5,6,7]
-; AVX-NEXT: vpackusdw %xmm2, %xmm3, %xmm2
-; AVX-NEXT: vpackusdw %xmm0, %xmm2, %xmm0
; AVX-NEXT: vmovdqa (%rdi), %xmm2
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm3
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm8
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm9
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm9[0],xmm1[1,2,3],xmm9[4],xmm1[5,6,7]
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm4
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm5
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm10
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0],xmm1[1,2,3],xmm10[4],xmm1[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm5[0],xmm1[1,2,3],xmm5[4],xmm1[5,6,7]
+; AVX-NEXT: vpackusdw %xmm0, %xmm3, %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm1[1,2,3],xmm4[4],xmm1[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm2[0],xmm1[1,2,3],xmm2[4],xmm1[5,6,7]
+; AVX-NEXT: vpackusdw %xmm3, %xmm6, %xmm3
+; AVX-NEXT: vpackusdw %xmm0, %xmm3, %xmm0
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm6
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm6[0],xmm1[1,2,3],xmm6[4],xmm1[5,6,7]
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm7
+; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm7[0],xmm1[1,2,3],xmm7[4],xmm1[5,6,7]
+; AVX-NEXT: vpackusdw %xmm3, %xmm8, %xmm3
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm8
; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm8[0],xmm1[1,2,3],xmm8[4],xmm1[5,6,7]
-; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
-; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm3[0],xmm1[1,2,3],xmm3[4],xmm1[5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3],xmm2[4],xmm1[5,6,7]
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm9
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm9[0],xmm1[1,2,3],xmm9[4],xmm1[5,6,7]
; AVX-NEXT: vpackusdw %xmm11, %xmm1, %xmm1
-; AVX-NEXT: vpackusdw %xmm10, %xmm1, %xmm1
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm4[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpackusdw %xmm3, %xmm1, %xmm1
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm10[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,1,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm5[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm6[0,2,2,3]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm11[0],xmm3[0],xmm11[1],xmm3[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm4[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm7[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm2[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[1,3,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm11[0,1,2,3],xmm10[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm9[0,2,2,3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm11[0,1,2,3],xmm3[4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm6[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm8[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm7[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[0,1,1,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm3[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm8[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm2[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm9[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm13[1,3,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm12[0,1,2,3],xmm11[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm11, %ymm10
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm4[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm10[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm10[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm5[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm6[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm7[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm7[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm12[0,1,2,3],xmm11[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm9[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm9[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm8[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm8[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm5[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm3[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm4[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm2[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0,1,2,3],xmm12[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm11
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm6[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm7[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm7[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm8[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm8[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm9[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm15 = xmm9[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm14 = xmm15[0],xmm14[0],xmm15[1],xmm14[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm13 = xmm14[0,1,2,3],xmm13[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm5[0],xmm10[0],xmm5[1],xmm10[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm5[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm6[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm7[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm6[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm7[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm8[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm9[3,1,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1,2,3],xmm4[4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm9[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm8[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm5[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
-; AVX-NEXT: vmovdqa %xmm1, (%rsi)
-; AVX-NEXT: vmovdqa %xmm0, 16(%rsi)
-; AVX-NEXT: vmovaps %ymm10, (%rdx)
-; AVX-NEXT: vmovaps %ymm11, (%rcx)
-; AVX-NEXT: vmovaps %ymm2, (%r8)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm1, 16(%rsi)
+; AVX-NEXT: vmovdqa %xmm0, (%rsi)
+; AVX-NEXT: vmovdqa %xmm11, 16(%rdx)
+; AVX-NEXT: vmovdqa %xmm3, (%rdx)
+; AVX-NEXT: vmovdqa %xmm13, 16(%rcx)
+; AVX-NEXT: vmovdqa %xmm12, (%rcx)
+; AVX-NEXT: vmovdqa %xmm4, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm2, (%r8)
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i16_stride4_vf16:
@@ -1828,237 +1827,238 @@ define void @load_i16_stride4_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
;
; AVX-LABEL: load_i16_stride4_vf32:
; AVX: # %bb.0:
-; AVX-NEXT: subq $248, %rsp
-; AVX-NEXT: vpxor %xmm5, %xmm5, %xmm5
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm0
+; AVX-NEXT: subq $232, %rsp
+; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vmovdqa 176(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm5[1,2,3],xmm0[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm1[0],xmm5[1,2,3],xmm1[4],xmm5[5,6,7]
-; AVX-NEXT: vpackusdw %xmm0, %xmm3, %xmm0
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm3
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0],xmm5[1,2,3],xmm3[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm1[0],xmm5[1,2,3],xmm1[4],xmm5[5,6,7]
-; AVX-NEXT: vpackusdw %xmm6, %xmm7, %xmm6
-; AVX-NEXT: vpackusdw %xmm0, %xmm6, %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3],xmm0[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa 160(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa (%rdi), %xmm9
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm1
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm2
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm4
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm4[0],xmm5[1,2,3],xmm4[4],xmm5[5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm2[0],xmm5[1,2,3],xmm2[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpackusdw %xmm6, %xmm7, %xmm6
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm1[0],xmm5[1,2,3],xmm1[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm9[0],xmm5[1,2,3],xmm9[4],xmm5[5,6,7]
-; AVX-NEXT: vpackusdw %xmm7, %xmm8, %xmm7
-; AVX-NEXT: vpackusdw %xmm6, %xmm7, %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm0[0],xmm2[1,2,3],xmm0[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm3, %xmm4, %xmm3
+; AVX-NEXT: vmovdqa 144(%rdi), %xmm14
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm14[0],xmm2[1,2,3],xmm14[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa 128(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 240(%rdi), %xmm10
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm10[0],xmm5[1,2,3],xmm10[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm10, (%rsp) # 16-byte Spill
-; AVX-NEXT: vmovdqa 224(%rdi), %xmm11
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm11[0],xmm5[1,2,3],xmm11[4],xmm5[5,6,7]
-; AVX-NEXT: vpackusdw %xmm6, %xmm7, %xmm6
+; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm0[0],xmm2[1,2,3],xmm0[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm5, %xmm7, %xmm5
+; AVX-NEXT: vpackusdw %xmm3, %xmm5, %xmm3
+; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 240(%rdi), %xmm13
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm13[0],xmm2[1,2,3],xmm13[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa 224(%rdi), %xmm12
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm12[0],xmm2[1,2,3],xmm12[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm3, %xmm5, %xmm3
; AVX-NEXT: vmovdqa 208(%rdi), %xmm15
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm15[0],xmm5[1,2,3],xmm15[4],xmm5[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm15[0],xmm2[1,2,3],xmm15[4],xmm2[5,6,7]
; AVX-NEXT: vmovdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 192(%rdi), %xmm0
-; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm0[0],xmm5[1,2,3],xmm0[4],xmm5[5,6,7]
-; AVX-NEXT: vpackusdw %xmm7, %xmm8, %xmm7
-; AVX-NEXT: vpackusdw %xmm6, %xmm7, %xmm0
+; AVX-NEXT: vmovdqa 192(%rdi), %xmm9
+; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm9[0],xmm2[1,2,3],xmm9[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm5, %xmm8, %xmm5
+; AVX-NEXT: vpackusdw %xmm3, %xmm5, %xmm3
+; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa (%rdi), %xmm11
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm4
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm4[0],xmm2[1,2,3],xmm4[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpackusdw %xmm3, %xmm5, %xmm3
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm6
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0],xmm2[1,2,3],xmm6[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm11[0],xmm2[1,2,3],xmm11[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa %xmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpackusdw %xmm5, %xmm10, %xmm5
+; AVX-NEXT: vpackusdw %xmm3, %xmm5, %xmm3
+; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm7
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0],xmm2[1,2,3],xmm7[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 176(%rdi), %xmm13
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm13[0],xmm5[1,2,3],xmm13[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 160(%rdi), %xmm14
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm14[0],xmm5[1,2,3],xmm14[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpackusdw %xmm6, %xmm7, %xmm7
-; AVX-NEXT: vmovdqa 144(%rdi), %xmm8
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm8[0],xmm5[1,2,3],xmm8[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 128(%rdi), %xmm12
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm12[0],xmm5[1,2,3],xmm12[4],xmm5[5,6,7]
-; AVX-NEXT: vmovdqa %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpackusdw %xmm0, %xmm5, %xmm0
-; AVX-NEXT: vpackusdw %xmm7, %xmm0, %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm0[0],xmm2[1,2,3],xmm0[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm3, %xmm5, %xmm3
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm0[0],xmm2[1,2,3],xmm0[4],xmm2[5,6,7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
-; AVX-NEXT: # xmm0 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Folded Reload
-; AVX-NEXT: # xmm5 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[0,2,2,3]
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm10
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm10[0],xmm2[1,2,3],xmm10[4],xmm2[5,6,7]
+; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpackusdw %xmm5, %xmm2, %xmm2
+; AVX-NEXT: vpackusdw %xmm3, %xmm2, %xmm2
+; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
+; AVX-NEXT: # xmm2 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
+; AVX-NEXT: # xmm3 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm14[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm8[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm3[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm7[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm4[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm2[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm7[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm1[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm7[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm9[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1,2,3],xmm5[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm5, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm10[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm13[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm12[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm15[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
+; AVX-NEXT: vmovdqa %xmm1, %xmm15
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm6[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm11[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm15[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Folded Reload
-; AVX-NEXT: # xmm6 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm13[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm14[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm8[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm12[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm7[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[1],xmm6[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1,2,3],xmm5[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm5, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm7[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm11[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm10[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX-NEXT: # xmm0 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; AVX-NEXT: # xmm1 = mem[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm1[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
-; AVX-NEXT: # xmm1 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm14[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm1[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm3[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm6[0],xmm2[0],xmm6[1],xmm2[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm4[3,1,2,3]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Folded Reload
-; AVX-NEXT: # xmm15 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm5[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm15[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm6[0],xmm1[0],xmm6[1],xmm1[1]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
-; AVX-NEXT: # xmm10 = mem[3,1,2,3]
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm9[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm10[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm4[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm8[0,1,2,3],xmm6[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm6, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpshufd $231, (%rsp), %xmm13 # 16-byte Folded Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm8[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm4[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm6[0],xmm1[0],xmm6[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm13[3,1,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm12[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm6[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm7[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Folded Reload
; AVX-NEXT: # xmm13 = mem[3,1,2,3]
-; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm11[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm13[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm14[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm6[0],xmm0[0],xmm6[1],xmm0[1]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Folded Reload
-; AVX-NEXT: # xmm11 = mem[3,1,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm9[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm13[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm3[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm14[0],xmm9[0],xmm14[1],xmm9[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm9[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm15[3,1,2,3]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Folded Reload
; AVX-NEXT: # xmm12 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm11[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm12[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm8[0],xmm6[0],xmm8[1],xmm6[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm6[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
-; AVX-NEXT: # xmm8 = mem[3,1,2,3]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
-; AVX-NEXT: # xmm9 = mem[3,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm8[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm9[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm6[0],xmm0[0],xmm6[1],xmm0[1]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Folded Reload
-; AVX-NEXT: # xmm6 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm12[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm9[0],xmm0[0],xmm9[1],xmm0[1]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Folded Reload
+; AVX-NEXT: # xmm15 = mem[3,1,2,3]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
; AVX-NEXT: # xmm2 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm6[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm2[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm7[0],xmm0[0],xmm7[1],xmm0[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm7
+; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm15[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm2[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm10[0],xmm14[0],xmm10[1],xmm14[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
+; AVX-NEXT: # xmm10 = mem[3,1,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm10[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm11[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm14[0],xmm9[0],xmm14[1],xmm9[1]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Folded Reload
+; AVX-NEXT: # xmm14 = mem[3,1,2,3]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
+; AVX-NEXT: # xmm1 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm14[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm1[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm0[0,1,2,3],xmm9[4,5,6,7]
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX-NEXT: # xmm0 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
-; AVX-NEXT: # xmm1 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
-; AVX-NEXT: # xmm1 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm5[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm15[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm10[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw $116, (%rsp), %xmm5 # 16-byte Folded Reload
+; AVX-NEXT: # xmm5 = mem[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Folded Reload
+; AVX-NEXT: # xmm5 = mem[3,1,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm13[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm14[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm11[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm12[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm8[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm9[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm6[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm6[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm7[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm13[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm8[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm12[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm15[3,1,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm3[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 32(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 48(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, (%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 16(%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 32(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, (%rdx)
-; AVX-NEXT: vmovaps %ymm7, 32(%rcx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, (%rcx)
-; AVX-NEXT: vmovaps %ymm1, 32(%r8)
-; AVX-NEXT: vmovaps %ymm0, (%r8)
-; AVX-NEXT: addq $248, %rsp
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm10[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm11[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm14[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 16(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, (%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 48(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 32(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 16(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, (%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 48(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 32(%rdx)
+; AVX-NEXT: vmovdqa %xmm9, 16(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, (%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 48(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm4, 32(%rcx)
+; AVX-NEXT: vmovdqa %xmm1, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm2, (%r8)
+; AVX-NEXT: vmovdqa %xmm3, 48(%r8)
+; AVX-NEXT: vmovdqa %xmm0, 32(%r8)
+; AVX-NEXT: addq $232, %rsp
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i16_stride4_vf32:
@@ -3726,289 +3726,268 @@ define void @load_i16_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
;
; AVX-LABEL: load_i16_stride4_vf64:
; AVX: # %bb.0:
-; AVX-NEXT: subq $808, %rsp # imm = 0x328
-; AVX-NEXT: vpxor %xmm6, %xmm6, %xmm6
-; AVX-NEXT: vmovdqa 368(%rdi), %xmm0
+; AVX-NEXT: subq $712, %rsp # imm = 0x2C8
+; AVX-NEXT: vpxor %xmm9, %xmm9, %xmm9
+; AVX-NEXT: vmovdqa 240(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 352(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 224(%rdi), %xmm1
+; AVX-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm9[1,2,3],xmm1[4],xmm9[5,6,7]
; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vmovdqa 336(%rdi), %xmm13
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm13[0],xmm6[1,2,3],xmm13[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 320(%rdi), %xmm2
+; AVX-NEXT: vmovdqa 208(%rdi), %xmm1
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm9[1,2,3],xmm1[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 192(%rdi), %xmm2
; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm6[1,2,3],xmm2[4],xmm6[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm9[1,2,3],xmm2[4],xmm9[5,6,7]
; AVX-NEXT: vpackusdw %xmm1, %xmm2, %xmm1
; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 304(%rdi), %xmm4
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm6[1,2,3],xmm4[4],xmm6[5,6,7]
+; AVX-NEXT: vmovdqa 176(%rdi), %xmm6
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm6[0],xmm9[1,2,3],xmm6[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 160(%rdi), %xmm1
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm9[1,2,3],xmm1[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovdqa 144(%rdi), %xmm4
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0],xmm9[1,2,3],xmm4[4],xmm9[5,6,7]
; AVX-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 288(%rdi), %xmm5
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm5[0],xmm6[1,2,3],xmm5[4],xmm6[5,6,7]
+; AVX-NEXT: vmovdqa 128(%rdi), %xmm5
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm5[0],xmm9[1,2,3],xmm5[4],xmm9[5,6,7]
; AVX-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vmovdqa 272(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 256(%rdi), %xmm3
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0],xmm6[1,2,3],xmm3[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpackusdw %xmm1, %xmm2, %xmm1
; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm0
+; AVX-NEXT: vmovdqa 496(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 480(%rdi), %xmm1
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm0, %xmm2, %xmm0
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm9[1,2,3],xmm1[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovdqa 464(%rdi), %xmm1
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm2, %xmm7, %xmm2
-; AVX-NEXT: vpackusdw %xmm0, %xmm2, %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm9[1,2,3],xmm1[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 448(%rdi), %xmm2
+; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm9[1,2,3],xmm2[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm1, %xmm2, %xmm1
+; AVX-NEXT: vpackusdw %xmm0, %xmm1, %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm0
+; AVX-NEXT: vmovdqa 432(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 416(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm2, %xmm3, %xmm10
+; AVX-NEXT: vmovdqa 400(%rdi), %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm1[0],xmm9[1,2,3],xmm1[4],xmm9[5,6,7]
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm7, %xmm8, %xmm8
-; AVX-NEXT: vmovdqa (%rdi), %xmm0
+; AVX-NEXT: vmovdqa 384(%rdi), %xmm7
+; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm7[0],xmm9[1,2,3],xmm7[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpackusdw %xmm11, %xmm12, %xmm11
+; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
+; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 304(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm9
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm9[0],xmm6[1,2,3],xmm9[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 288(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 240(%rdi), %xmm14
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm14[0],xmm6[1,2,3],xmm14[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 224(%rdi), %xmm0
+; AVX-NEXT: vmovdqa 272(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa 208(%rdi), %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 256(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 192(%rdi), %xmm15
-; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm15[0],xmm6[1,2,3],xmm15[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm11, %xmm12, %xmm11
; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 176(%rdi), %xmm0
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm0[0],xmm6[1,2,3],xmm0[4],xmm6[5,6,7]
+; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 368(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 160(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa 144(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 128(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 352(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
+; AVX-NEXT: vmovdqa 336(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 320(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm11, %xmm12, %xmm11
; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 496(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 480(%rdi), %xmm10
; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm10[0],xmm6[1,2,3],xmm10[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa 464(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 448(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm10, %xmm12, %xmm10
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm8
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm8[0],xmm9[1,2,3],xmm8[4],xmm9[5,6,7]
; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 432(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 416(%rdi), %xmm1
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm1[0],xmm6[1,2,3],xmm1[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm8, %xmm10, %xmm8
-; AVX-NEXT: vmovdqa 400(%rdi), %xmm10
+; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm15
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm15[0],xmm9[1,2,3],xmm15[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm13
+; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0],xmm9[1,2,3],xmm13[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpackusdw %xmm11, %xmm12, %xmm11
+; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm10[0],xmm6[1,2,3],xmm10[4],xmm6[5,6,7]
-; AVX-NEXT: vmovdqa 384(%rdi), %xmm2
-; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm2[0],xmm6[1,2,3],xmm2[4],xmm6[5,6,7]
-; AVX-NEXT: vpackusdw %xmm10, %xmm6, %xmm6
-; AVX-NEXT: vpackusdw %xmm8, %xmm6, %xmm6
-; AVX-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Folded Reload
-; AVX-NEXT: # xmm6 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
-; AVX-NEXT: # xmm8 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm8[0],xmm6[0],xmm8[1],xmm6[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm13[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm14
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm0
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm0[0],xmm9[1,2,3],xmm0[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm14[0],xmm9[1,2,3],xmm14[4],xmm9[5,6,7]
+; AVX-NEXT: vpackusdw %xmm10, %xmm11, %xmm10
+; AVX-NEXT: vmovdqa (%rdi), %xmm3
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm12
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm12[0],xmm9[1,2,3],xmm12[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm3[0],xmm9[1,2,3],xmm3[4],xmm9[5,6,7]
+; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpackusdw %xmm11, %xmm9, %xmm9
+; AVX-NEXT: vpackusdw %xmm10, %xmm9, %xmm9
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm6[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm4[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm8[0,1,2,3],xmm6[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm4[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm5[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm5[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
+; AVX-NEXT: # xmm9 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd $232, (%rsp), %xmm10 # 16-byte Folded Reload
+; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm3[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm10[0,1,2,3],xmm8[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm8, %ymm6
-; AVX-NEXT: vmovups %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm3[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm8[0],xmm6[0],xmm8[1],xmm6[1]
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Folded Reload
+; AVX-NEXT: # xmm11 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm2[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm4[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vmovdqa (%rsp), %xmm2 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm2[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm4[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm1[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm8[0,1,2,3],xmm6[4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm7[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm7[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm5[0,2,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm5[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
+; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[0,2,2,3]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm7[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm9[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm10[0,1,2,3],xmm8[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm8, %ymm6
-; AVX-NEXT: vmovups %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm14[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
-; AVX-NEXT: # xmm8 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm8[0],xmm6[0],xmm8[1],xmm6[1]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
-; AVX-NEXT: # xmm8 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm15[0,2,2,3]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm6[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm0[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm14[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm12[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm8[0,1,2,3],xmm6[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm3[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
+; AVX-NEXT: # xmm9 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm10[0,1,2,3],xmm8[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm8, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
-; AVX-NEXT: # xmm8 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm8[0],xmm6[0],xmm8[1],xmm6[1]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm13[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm14[0,2,2,3]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm12[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
+; AVX-NEXT: # xmm9 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm15[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm8[0,1,2,3],xmm6[4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
-; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm15[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,1,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm13[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0,1,2,3],xmm9[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
+; AVX-NEXT: # xmm9 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm9[0,1,1,3,4,5,6,7]
; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[0,1,1,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[0,2,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = mem[0,2,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm12[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm10[0,1,2,3],xmm8[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm8, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm3[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm4[3,1,2,3]
+; AVX-NEXT: vpshufd $232, {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Folded Reload
+; AVX-NEXT: # xmm11 = mem[0,2,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm11[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0,1,2,3],xmm9[4,5,6,7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm2, (%rsp) # 16-byte Spill
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm2[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm7[3,1,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm2[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm5[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
+; AVX-NEXT: # xmm1 = mem[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
; AVX-NEXT: # xmm2 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm9[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX-NEXT: # xmm0 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
@@ -4028,92 +4007,115 @@ define void @load_i16_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm5[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; AVX-NEXT: # xmm1 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
-; AVX-NEXT: # xmm2 = mem[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
-; AVX-NEXT: # xmm2 = mem[3,1,2,3]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm7[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm6[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Folded Reload
-; AVX-NEXT: # xmm12 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm12[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm11[3,1,2,3]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = mem[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $231, (%rsp), %xmm1 # 16-byte Folded Reload
; AVX-NEXT: # xmm1 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm13[3,1,2,3]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
+; AVX-NEXT: # xmm1 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm14[3,1,2,3]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
+; AVX-NEXT: # xmm2 = mem[3,1,2,3]
; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm15[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
+; AVX-NEXT: # xmm8 = mem[3,1,2,3]
+; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm14[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm8[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm7[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
+; AVX-NEXT: # xmm3 = mem[3,1,2,3]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
; AVX-NEXT: # xmm2 = mem[3,1,2,3]
-; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm3[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm2[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1,2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = mem[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
+; AVX-NEXT: # xmm1 = mem[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm0[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm1[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; AVX-NEXT: # xmm0 = mem[3,1,2,3]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm12[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm0[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm14[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1,2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Folded Reload
; AVX-NEXT: # xmm13 = mem[3,1,2,3]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Folded Reload
-; AVX-NEXT: # xmm15 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm13[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm15[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Folded Reload
+; AVX-NEXT: # xmm12 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm13[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm12[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm15[3,1,2,3]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Folded Reload
; AVX-NEXT: # xmm10 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm11[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm10[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm5[0,1,2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
; AVX-NEXT: # xmm9 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm10[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm9[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
-; AVX-NEXT: # xmm8 = mem[3,1,2,3]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Folded Reload
-; AVX-NEXT: # xmm7 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm8[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm7[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm1[0,1,2,3],xmm0[4,5,6,7]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Folded Reload
; AVX-NEXT: # xmm6 = mem[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm9[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm6[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Folded Reload
; AVX-NEXT: # xmm5 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm6[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm5[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
; AVX-NEXT: # xmm4 = mem[3,1,2,3]
-; AVX-NEXT: vpshufd $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
-; AVX-NEXT: # xmm2 = mem[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm4[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm14 = xmm2[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm14[0],xmm0[0],xmm14[1],xmm0[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm5[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm15 = xmm4[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm15[0],xmm0[0],xmm15[1],xmm0[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm8[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm7[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm3[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm15 = xmm1[0,1,2,3],xmm0[4,5,6,7]
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX-NEXT: # xmm0 = mem[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
@@ -4121,22 +4123,11 @@ define void @load_i16_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; AVX-NEXT: # xmm1 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw $231, (%rsp), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
+; AVX-NEXT: # xmm2 = mem[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
-; AVX-NEXT: # xmm1 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Folded Reload
-; AVX-NEXT: # xmm14 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm14[0],xmm3[0],xmm14[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm14
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX-NEXT: # xmm0 = mem[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
@@ -4144,36 +4135,10 @@ define void @load_i16_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; AVX-NEXT: # xmm1 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
-; AVX-NEXT: # xmm1 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
-; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm12[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm11[0],xmm3[0],xmm11[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm3
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm10[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm9[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm8[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm7[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm7[0],xmm1[0],xmm7[1],xmm1[1]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
+; AVX-NEXT: # xmm2 = mem[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm6[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm5[0],xmm1[0],xmm5[1],xmm1[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; AVX-NEXT: # xmm1 = mem[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
@@ -4181,58 +4146,103 @@ define void @load_i16_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
; AVX-NEXT: # xmm2 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
-; AVX-NEXT: # xmm4 = mem[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
+; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
; AVX-NEXT: # xmm2 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
-; AVX-NEXT: # xmm4 = mem[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm13[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm15[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0,1,2,3],xmm2[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 96(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 112(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 32(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 48(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, (%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 16(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 64(%rsi)
-; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vmovaps %xmm2, 80(%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 96(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 32(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, (%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 64(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 32(%rcx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 96(%rcx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, 64(%rcx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm2, (%rcx)
-; AVX-NEXT: vmovaps %ymm1, 96(%r8)
-; AVX-NEXT: vmovaps %ymm0, 32(%r8)
-; AVX-NEXT: vmovaps %ymm3, 64(%r8)
-; AVX-NEXT: vmovaps %ymm14, (%r8)
-; AVX-NEXT: addq $808, %rsp # imm = 0x328
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
+; AVX-NEXT: # xmm3 = mem[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
+; AVX-NEXT: # xmm3 = mem[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Folded Reload
+; AVX-NEXT: # xmm7 = mem[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm7[0],xmm3[0],xmm7[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
+; AVX-NEXT: # xmm3 = mem[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw $116, {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Folded Reload
+; AVX-NEXT: # xmm7 = mem[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm7[0],xmm3[0],xmm7[1],xmm3[1]
+; AVX-NEXT: vpshuflw $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Folded Reload
+; AVX-NEXT: # xmm7 = mem[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm14[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm8[0],xmm7[0],xmm8[1],xmm7[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0,1,2,3],xmm3[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm13[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm12[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm8[0],xmm7[0],xmm8[1],xmm7[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm11[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm10 = xmm10[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm8[0,1,2,3],xmm7[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm9[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm6[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm6[4,5,6,7]
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, (%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 16(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 80(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 64(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 96(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 112(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 32(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 48(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 80(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 16(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 64(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, (%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 112(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 96(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 48(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 32(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 80(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 16(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 64(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, (%rcx)
+; AVX-NEXT: vmovaps (%rsp), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 48(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 112(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 32(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm5, 96(%rcx)
+; AVX-NEXT: vmovdqa %xmm4, 80(%r8)
+; AVX-NEXT: vmovdqa %xmm8, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm3, 64(%r8)
+; AVX-NEXT: vmovdqa %xmm2, 112(%r8)
+; AVX-NEXT: vmovdqa %xmm1, 96(%r8)
+; AVX-NEXT: vmovdqa %xmm0, 48(%r8)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm0, 32(%r8)
+; AVX-NEXT: vmovdqa %xmm15, (%r8)
+; AVX-NEXT: addq $712, %rsp # imm = 0x2C8
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i16_stride4_vf64:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
index 440e0187d69f3..d9e57c75df692 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
@@ -621,24 +621,23 @@ define void @load_i8_stride2_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou
; AVX-NEXT: vmovdqa 16(%rdi), %xmm2
; AVX-NEXT: vmovdqa 32(%rdi), %xmm3
; AVX-NEXT: vmovdqa 48(%rdi), %xmm4
-; AVX-NEXT: vpand %xmm0, %xmm4, %xmm5
-; AVX-NEXT: vpand %xmm0, %xmm3, %xmm6
+; AVX-NEXT: vpand %xmm0, %xmm2, %xmm5
+; AVX-NEXT: vpand %xmm0, %xmm1, %xmm6
; AVX-NEXT: vpackuswb %xmm5, %xmm6, %xmm5
-; AVX-NEXT: vpand %xmm0, %xmm2, %xmm6
-; AVX-NEXT: vpand %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vpand %xmm0, %xmm4, %xmm6
+; AVX-NEXT: vpand %xmm0, %xmm3, %xmm0
; AVX-NEXT: vpackuswb %xmm6, %xmm0, %xmm0
; AVX-NEXT: vmovq {{.*#+}} xmm6 = [1,3,5,7,9,11,13,15,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm6, %xmm4, %xmm4
-; AVX-NEXT: vpshufb %xmm6, %xmm3, %xmm3
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
; AVX-NEXT: vpshufb %xmm6, %xmm2, %xmm2
; AVX-NEXT: vpshufb %xmm6, %xmm1, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
-; AVX-NEXT: vmovdqa %xmm0, (%rsi)
-; AVX-NEXT: vmovdqa %xmm5, 16(%rsi)
-; AVX-NEXT: vmovaps %ymm1, (%rdx)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufb %xmm6, %xmm4, %xmm2
+; AVX-NEXT: vpshufb %xmm6, %xmm3, %xmm3
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
+; AVX-NEXT: vmovdqa %xmm0, 16(%rsi)
+; AVX-NEXT: vmovdqa %xmm5, (%rsi)
+; AVX-NEXT: vmovdqa %xmm2, 16(%rdx)
+; AVX-NEXT: vmovdqa %xmm1, (%rdx)
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i8_stride2_vf32:
@@ -870,49 +869,48 @@ define void @load_i8_stride2_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou
;
; AVX-LABEL: load_i8_stride2_vf64:
; AVX: # %bb.0:
-; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [255,255,255,255,255,255,255,255]
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm2
-; AVX-NEXT: vpand %xmm1, %xmm2, %xmm0
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm3
-; AVX-NEXT: vpand %xmm1, %xmm3, %xmm4
-; AVX-NEXT: vpackuswb %xmm0, %xmm4, %xmm0
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm4
-; AVX-NEXT: vpand %xmm1, %xmm4, %xmm5
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm6
-; AVX-NEXT: vpand %xmm1, %xmm6, %xmm7
-; AVX-NEXT: vpackuswb %xmm5, %xmm7, %xmm5
-; AVX-NEXT: vmovdqa (%rdi), %xmm7
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm8
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm9
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm10
-; AVX-NEXT: vpand %xmm1, %xmm10, %xmm11
-; AVX-NEXT: vpand %xmm1, %xmm9, %xmm12
-; AVX-NEXT: vpackuswb %xmm11, %xmm12, %xmm11
-; AVX-NEXT: vpand %xmm1, %xmm8, %xmm12
-; AVX-NEXT: vpand %xmm1, %xmm7, %xmm1
-; AVX-NEXT: vpackuswb %xmm12, %xmm1, %xmm1
-; AVX-NEXT: vmovq {{.*#+}} xmm12 = [1,3,5,7,9,11,13,15,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm12, %xmm2, %xmm2
-; AVX-NEXT: vpshufb %xmm12, %xmm3, %xmm3
+; AVX-NEXT: vbroadcastss {{.*#+}} xmm0 = [255,255,255,255,255,255,255,255]
+; AVX-NEXT: vmovdqa (%rdi), %xmm1
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm2
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm3
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm4
+; AVX-NEXT: vpand %xmm0, %xmm2, %xmm5
+; AVX-NEXT: vpand %xmm0, %xmm1, %xmm6
+; AVX-NEXT: vpackuswb %xmm5, %xmm6, %xmm5
+; AVX-NEXT: vpand %xmm0, %xmm4, %xmm6
+; AVX-NEXT: vpand %xmm0, %xmm3, %xmm7
+; AVX-NEXT: vpackuswb %xmm6, %xmm7, %xmm6
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm7
+; AVX-NEXT: vpand %xmm0, %xmm7, %xmm8
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm9
+; AVX-NEXT: vpand %xmm0, %xmm9, %xmm10
+; AVX-NEXT: vpackuswb %xmm8, %xmm10, %xmm8
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm10
+; AVX-NEXT: vpand %xmm0, %xmm10, %xmm11
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm12
+; AVX-NEXT: vpand %xmm0, %xmm12, %xmm0
+; AVX-NEXT: vpackuswb %xmm11, %xmm0, %xmm0
+; AVX-NEXT: vmovq {{.*#+}} xmm11 = [1,3,5,7,9,11,13,15,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm11, %xmm2, %xmm2
+; AVX-NEXT: vpshufb %xmm11, %xmm1, %xmm1
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; AVX-NEXT: vpshufb %xmm11, %xmm4, %xmm2
+; AVX-NEXT: vpshufb %xmm11, %xmm3, %xmm3
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
-; AVX-NEXT: vpshufb %xmm12, %xmm4, %xmm3
-; AVX-NEXT: vpshufb %xmm12, %xmm6, %xmm4
+; AVX-NEXT: vpshufb %xmm11, %xmm7, %xmm3
+; AVX-NEXT: vpshufb %xmm11, %xmm9, %xmm4
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
-; AVX-NEXT: vpshufb %xmm12, %xmm10, %xmm3
-; AVX-NEXT: vpshufb %xmm12, %xmm9, %xmm4
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX-NEXT: vpshufb %xmm12, %xmm8, %xmm4
-; AVX-NEXT: vpshufb %xmm12, %xmm7, %xmm6
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm6[0],xmm4[0]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3
-; AVX-NEXT: vmovdqa %xmm1, (%rsi)
-; AVX-NEXT: vmovdqa %xmm11, 16(%rsi)
-; AVX-NEXT: vmovdqa %xmm5, 32(%rsi)
+; AVX-NEXT: vpshufb %xmm11, %xmm10, %xmm4
+; AVX-NEXT: vpshufb %xmm11, %xmm12, %xmm7
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm7[0],xmm4[0]
; AVX-NEXT: vmovdqa %xmm0, 48(%rsi)
-; AVX-NEXT: vmovaps %ymm3, (%rdx)
-; AVX-NEXT: vmovaps %ymm2, 32(%rdx)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm8, 32(%rsi)
+; AVX-NEXT: vmovdqa %xmm6, 16(%rsi)
+; AVX-NEXT: vmovdqa %xmm5, (%rsi)
+; AVX-NEXT: vmovdqa %xmm4, 48(%rdx)
+; AVX-NEXT: vmovdqa %xmm3, 32(%rdx)
+; AVX-NEXT: vmovdqa %xmm2, 16(%rdx)
+; AVX-NEXT: vmovdqa %xmm1, (%rdx)
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i8_stride2_vf64:
@@ -1060,18 +1058,18 @@ define void @load_i8_stride2_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou
; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm2, %ymm0
; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm1, %ymm5
; AVX512-FCP-NEXT: vpermt2q %ymm0, %ymm8, %ymm5
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm5, %zmm0
-; AVX512-FCP-NEXT: vpbroadcastq {{.*#+}} ymm5 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
-; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm4
+; AVX512-FCP-NEXT: vpbroadcastq {{.*#+}} ymm0 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
+; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm4, %ymm4
; AVX512-FCP-NEXT: vpbroadcastq {{.*#+}} ymm6 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
; AVX512-FCP-NEXT: vpermt2q %ymm4, %ymm8, %ymm3
-; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm2, %ymm2
+; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm2, %ymm0
; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpermt2q %ymm2, %ymm8, %ymm1
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm1, %zmm1
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%rsi)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm1, (%rdx)
+; AVX512-FCP-NEXT: vpermt2q %ymm0, %ymm8, %ymm1
+; AVX512-FCP-NEXT: vmovdqa %ymm5, (%rsi)
+; AVX512-FCP-NEXT: vmovdqa %ymm7, 32(%rsi)
+; AVX512-FCP-NEXT: vmovdqa %ymm1, (%rdx)
+; AVX512-FCP-NEXT: vmovdqa %ymm3, 32(%rdx)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -1121,18 +1119,18 @@ define void @load_i8_stride2_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou
; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm2, %ymm0
; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm1, %ymm5
; AVX512DQ-FCP-NEXT: vpermt2q %ymm0, %ymm8, %ymm5
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm5, %zmm0
-; AVX512DQ-FCP-NEXT: vpbroadcastq {{.*#+}} ymm5 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm4
+; AVX512DQ-FCP-NEXT: vpbroadcastq {{.*#+}} ymm0 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm4, %ymm4
; AVX512DQ-FCP-NEXT: vpbroadcastq {{.*#+}} ymm6 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
; AVX512DQ-FCP-NEXT: vpermt2q %ymm4, %ymm8, %ymm3
-; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm2, %ymm2
+; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm2, %ymm0
; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpermt2q %ymm2, %ymm8, %ymm1
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm1, %zmm1
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%rsi)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, (%rdx)
+; AVX512DQ-FCP-NEXT: vpermt2q %ymm0, %ymm8, %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm5, (%rsi)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm7, 32(%rsi)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm1, (%rdx)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm3, 32(%rdx)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
index 2e553fc632f59..b609d89471a78 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
@@ -1333,87 +1333,88 @@ define void @load_i8_stride4_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
;
; AVX-LABEL: load_i8_stride4_vf32:
; AVX: # %bb.0:
-; AVX-NEXT: vbroadcastss {{.*#+}} xmm8 = [0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm0
-; AVX-NEXT: vpshufb %xmm8, %xmm0, %xmm1
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm2
-; AVX-NEXT: vpshufb %xmm8, %xmm2, %xmm3
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
+; AVX-NEXT: vbroadcastss {{.*#+}} xmm7 = [0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
+; AVX-NEXT: vmovdqa (%rdi), %xmm0
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm2
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm3
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm4
+; AVX-NEXT: vpshufb %xmm7, %xmm4, %xmm1
+; AVX-NEXT: vpshufb %xmm7, %xmm3, %xmm5
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm5[0],xmm1[0],xmm5[1],xmm1[1]
; AVX-NEXT: vmovd {{.*#+}} xmm9 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm3
-; AVX-NEXT: vpshufb %xmm9, %xmm3, %xmm4
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm5
-; AVX-NEXT: vpshufb %xmm9, %xmm5, %xmm6
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm4[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vmovdqa (%rdi), %xmm1
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm4
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm6
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm7
-; AVX-NEXT: vpshufb %xmm8, %xmm7, %xmm11
-; AVX-NEXT: vpshufb %xmm8, %xmm6, %xmm8
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
-; AVX-NEXT: vpshufb %xmm9, %xmm4, %xmm11
-; AVX-NEXT: vpshufb %xmm9, %xmm1, %xmm9
+; AVX-NEXT: vpshufb %xmm9, %xmm2, %xmm5
+; AVX-NEXT: vpshufb %xmm9, %xmm0, %xmm6
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm5[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm5
+; AVX-NEXT: vpshufb %xmm7, %xmm5, %xmm8
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm6
+; AVX-NEXT: vpshufb %xmm7, %xmm6, %xmm7
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm7[0],xmm8[0],xmm7[1],xmm8[1]
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm7
+; AVX-NEXT: vpshufb %xmm9, %xmm7, %xmm11
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm8
+; AVX-NEXT: vpshufb %xmm9, %xmm8, %xmm9
; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm9[0],xmm11[0],xmm9[1],xmm11[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm9[0,1,2,3],xmm8[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm8, %ymm8
-; AVX-NEXT: vbroadcastss {{.*#+}} xmm9 = [1,5,9,13,1,5,9,13,1,5,9,13,1,5,9,13]
-; AVX-NEXT: vpshufb %xmm9, %xmm0, %xmm10
-; AVX-NEXT: vpshufb %xmm9, %xmm2, %xmm11
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
-; AVX-NEXT: vmovd {{.*#+}} xmm11 = [1,5,9,13,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm9[0,1,2,3],xmm10[4,5,6,7]
+; AVX-NEXT: vbroadcastss {{.*#+}} xmm11 = [1,5,9,13,1,5,9,13,1,5,9,13,1,5,9,13]
+; AVX-NEXT: vpshufb %xmm11, %xmm4, %xmm10
; AVX-NEXT: vpshufb %xmm11, %xmm3, %xmm12
-; AVX-NEXT: vpshufb %xmm11, %xmm5, %xmm13
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm12[0,1,2,3],xmm10[4,5,6,7]
-; AVX-NEXT: vpshufb %xmm9, %xmm7, %xmm12
-; AVX-NEXT: vpshufb %xmm9, %xmm6, %xmm9
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm9[0],xmm12[0],xmm9[1],xmm12[1]
-; AVX-NEXT: vpshufb %xmm11, %xmm4, %xmm12
-; AVX-NEXT: vpshufb %xmm11, %xmm1, %xmm11
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm11[0,1,2,3],xmm9[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
-; AVX-NEXT: vbroadcastss {{.*#+}} xmm10 = [2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14]
-; AVX-NEXT: vpshufb %xmm10, %xmm0, %xmm11
-; AVX-NEXT: vpshufb %xmm10, %xmm2, %xmm12
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
-; AVX-NEXT: vmovd {{.*#+}} xmm12 = [2,6,10,14,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm12, %xmm3, %xmm13
-; AVX-NEXT: vpshufb %xmm12, %xmm5, %xmm14
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
+; AVX-NEXT: vmovd {{.*#+}} xmm12 = [1,5,9,13,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm12, %xmm2, %xmm13
+; AVX-NEXT: vpshufb %xmm12, %xmm0, %xmm14
; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm13[0,1,2,3],xmm11[4,5,6,7]
-; AVX-NEXT: vpshufb %xmm10, %xmm7, %xmm13
-; AVX-NEXT: vpshufb %xmm10, %xmm6, %xmm10
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm10[0],xmm13[0],xmm10[1],xmm13[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm13[0,1,2,3],xmm10[4,5,6,7]
+; AVX-NEXT: vpshufb %xmm11, %xmm5, %xmm13
+; AVX-NEXT: vpshufb %xmm11, %xmm6, %xmm11
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm11[0],xmm13[0],xmm11[1],xmm13[1]
+; AVX-NEXT: vpshufb %xmm12, %xmm7, %xmm13
+; AVX-NEXT: vpshufb %xmm12, %xmm8, %xmm12
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm12[0],xmm13[0],xmm12[1],xmm13[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm12[0,1,2,3],xmm11[4,5,6,7]
+; AVX-NEXT: vbroadcastss {{.*#+}} xmm12 = [2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14]
; AVX-NEXT: vpshufb %xmm12, %xmm4, %xmm13
-; AVX-NEXT: vpshufb %xmm12, %xmm1, %xmm12
+; AVX-NEXT: vpshufb %xmm12, %xmm3, %xmm14
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
+; AVX-NEXT: vmovd {{.*#+}} xmm14 = [2,6,10,14,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm14, %xmm2, %xmm15
+; AVX-NEXT: vpshufb %xmm14, %xmm0, %xmm1
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm15[0],xmm1[1],xmm15[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm13[4,5,6,7]
+; AVX-NEXT: vpshufb %xmm12, %xmm5, %xmm13
+; AVX-NEXT: vpshufb %xmm12, %xmm6, %xmm12
; AVX-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm12[0],xmm13[0],xmm12[1],xmm13[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm12[0,1,2,3],xmm10[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
-; AVX-NEXT: vbroadcastss {{.*#+}} xmm11 = [3,7,11,15,3,7,11,15,3,7,11,15,3,7,11,15]
-; AVX-NEXT: vpshufb %xmm11, %xmm0, %xmm0
-; AVX-NEXT: vpshufb %xmm11, %xmm2, %xmm2
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; AVX-NEXT: vmovd {{.*#+}} xmm2 = [3,7,11,15,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm3
-; AVX-NEXT: vpshufb %xmm2, %xmm5, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vpshufb %xmm11, %xmm7, %xmm3
-; AVX-NEXT: vpshufb %xmm11, %xmm6, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpshufb %xmm2, %xmm4, %xmm4
-; AVX-NEXT: vpshufb %xmm2, %xmm1, %xmm1
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm3[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
-; AVX-NEXT: vmovaps %ymm8, (%rsi)
-; AVX-NEXT: vmovaps %ymm9, (%rdx)
-; AVX-NEXT: vmovaps %ymm10, (%rcx)
-; AVX-NEXT: vmovaps %ymm0, (%r8)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufb %xmm14, %xmm7, %xmm13
+; AVX-NEXT: vpshufb %xmm14, %xmm8, %xmm14
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm12 = xmm13[0,1,2,3],xmm12[4,5,6,7]
+; AVX-NEXT: vbroadcastss {{.*#+}} xmm13 = [3,7,11,15,3,7,11,15,3,7,11,15,3,7,11,15]
+; AVX-NEXT: vpshufb %xmm13, %xmm4, %xmm4
+; AVX-NEXT: vpshufb %xmm13, %xmm3, %xmm3
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
+; AVX-NEXT: vmovd {{.*#+}} xmm4 = [3,7,11,15,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm4, %xmm2, %xmm2
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm0
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7]
+; AVX-NEXT: vpshufb %xmm13, %xmm5, %xmm2
+; AVX-NEXT: vpshufb %xmm13, %xmm6, %xmm3
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm7, %xmm3
+; AVX-NEXT: vpshufb %xmm4, %xmm8, %xmm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm9, 16(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, (%rsi)
+; AVX-NEXT: vmovdqa %xmm11, 16(%rdx)
+; AVX-NEXT: vmovdqa %xmm10, (%rdx)
+; AVX-NEXT: vmovdqa %xmm12, 16(%rcx)
+; AVX-NEXT: vmovdqa %xmm1, (%rcx)
+; AVX-NEXT: vmovdqa %xmm2, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm0, (%r8)
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i8_stride4_vf32:
@@ -2400,214 +2401,221 @@ define void @load_i8_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
;
; AVX-LABEL: load_i8_stride4_vf64:
; AVX: # %bb.0:
-; AVX-NEXT: subq $296, %rsp # imm = 0x128
+; AVX-NEXT: subq $328, %rsp # imm = 0x148
; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
-; AVX-NEXT: vmovdqa 112(%rdi), %xmm6
-; AVX-NEXT: vpshufb %xmm1, %xmm6, %xmm0
-; AVX-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 96(%rdi), %xmm8
+; AVX-NEXT: vmovdqa 176(%rdi), %xmm7
+; AVX-NEXT: vpshufb %xmm1, %xmm7, %xmm0
+; AVX-NEXT: vmovdqa %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 160(%rdi), %xmm8
; AVX-NEXT: vpshufb %xmm1, %xmm8, %xmm2
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; AVX-NEXT: vmovd {{.*#+}} xmm2 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vmovdqa 80(%rdi), %xmm3
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm5
-; AVX-NEXT: vmovdqa 64(%rdi), %xmm3
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm7
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm9 = xmm5[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vmovdqa (%rdi), %xmm0
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
+; AVX-NEXT: vmovd {{.*#+}} xmm4 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovdqa 144(%rdi), %xmm9
+; AVX-NEXT: vpshufb %xmm4, %xmm9, %xmm3
+; AVX-NEXT: vmovdqa 128(%rdi), %xmm10
+; AVX-NEXT: vpshufb %xmm4, %xmm10, %xmm6
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm2[4,5,6,7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm3
-; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm4
-; AVX-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm5
-; AVX-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm1, %xmm5, %xmm10
-; AVX-NEXT: vpshufb %xmm1, %xmm4, %xmm11
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
-; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm11
-; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm12
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm11[0,1,2,3],xmm10[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm9, %ymm10, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vmovdqa 240(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm11
+; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm2
; AVX-NEXT: vmovdqa 224(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm12
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
+; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm3
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX-NEXT: vmovdqa 208(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm14
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm3
; AVX-NEXT: vmovdqa 192(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm15
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm14 = xmm15[0],xmm14[0],xmm15[1],xmm14[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm14[0,1,2,3],xmm13[4,5,6,7]
-; AVX-NEXT: vmovdqa 176(%rdi), %xmm0
-; AVX-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm15
-; AVX-NEXT: vmovdqa 160(%rdi), %xmm0
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm11
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm11[0],xmm3[0],xmm11[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm2[4,5,6,7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm15[0],xmm1[1],xmm15[1]
-; AVX-NEXT: vmovdqa 144(%rdi), %xmm0
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm12
+; AVX-NEXT: vpshufb %xmm1, %xmm12, %xmm2
+; AVX-NEXT: vmovdqa %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm3
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; AVX-NEXT: vmovdqa (%rdi), %xmm0
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm13
+; AVX-NEXT: vpshufb %xmm4, %xmm13, %xmm3
+; AVX-NEXT: vmovdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm15
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm15[0],xmm3[0],xmm15[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 112(%rdi), %xmm15
+; AVX-NEXT: vpshufb %xmm1, %xmm15, %xmm2
+; AVX-NEXT: vmovdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa 96(%rdi), %xmm14
+; AVX-NEXT: vpshufb %xmm1, %xmm14, %xmm1
+; AVX-NEXT: vmovdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
+; AVX-NEXT: vmovdqa 80(%rdi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vmovdqa 128(%rdi), %xmm4
-; AVX-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm2, %xmm4, %xmm2
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm0
+; AVX-NEXT: vmovdqa 64(%rdi), %xmm2
+; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm4, %xmm2, %xmm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vbroadcastss {{.*#+}} xmm0 = [1,5,9,13,1,5,9,13,1,5,9,13,1,5,9,13]
-; AVX-NEXT: vpshufb %xmm0, %xmm6, %xmm1
-; AVX-NEXT: vmovdqa %xmm8, %xmm4
+; AVX-NEXT: vpshufb %xmm0, %xmm7, %xmm1
+; AVX-NEXT: vmovdqa %xmm8, %xmm3
; AVX-NEXT: vmovdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpshufb %xmm0, %xmm8, %xmm2
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
-; AVX-NEXT: vmovd {{.*#+}} xmm2 = [1,5,9,13,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm0, %xmm8, %xmm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
+; AVX-NEXT: vmovd {{.*#+}} xmm4 = [1,5,9,13,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovdqa %xmm9, %xmm5
+; AVX-NEXT: vmovdqa %xmm9, (%rsp) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm4, %xmm9, %xmm1
+; AVX-NEXT: vmovdqa %xmm10, %xmm6
+; AVX-NEXT: vmovdqa %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm4, %xmm10, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm8[0],xmm1[0],xmm8[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm7, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm8, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm12, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm11, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm10, %xmm5
+; AVX-NEXT: vpshufb %xmm0, %xmm7, %xmm1
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm9, %xmm6
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm5[0,1,2,3],xmm3[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm3, %ymm1
-; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vpshufb %xmm0, %xmm9, %xmm2
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm4, %xmm10, %xmm2
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm4, %xmm11, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm8[0],xmm2[0],xmm8[1],xmm2[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm0, %xmm12, %xmm1
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm0, %xmm12, %xmm2
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm13, %xmm2
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm13, %xmm1
+; AVX-NEXT: vpshufb %xmm4, %xmm13, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm8[0],xmm2[0],xmm8[1],xmm2[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm0, %xmm15, %xmm1
+; AVX-NEXT: vpshufb %xmm0, %xmm14, %xmm0
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm14, %xmm3
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm14, %xmm1
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm15, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm5, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vmovdqa (%rsp), %xmm3 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm5, %xmm0
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm5, %xmm2
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
+; AVX-NEXT: vpshufb %xmm4, %xmm15, %xmm2
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vbroadcastss {{.*#+}} xmm0 = [2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX-NEXT: vpshufb %xmm0, %xmm1, %xmm1
-; AVX-NEXT: vpshufb %xmm0, %xmm4, %xmm2
+; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm2
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vmovd {{.*#+}} xmm2 = [2,6,10,14,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm2, %xmm7, %xmm3
-; AVX-NEXT: vpshufb %xmm2, %xmm8, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vpshufb %xmm0, %xmm12, %xmm3
-; AVX-NEXT: vpshufb %xmm0, %xmm11, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpshufb %xmm2, %xmm10, %xmm5
-; AVX-NEXT: vpshufb %xmm2, %xmm9, %xmm6
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm5[0,1,2,3],xmm3[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm3, %ymm1
-; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpshufb %xmm0, %xmm13, %xmm1
-; AVX-NEXT: vpshufb %xmm0, %xmm14, %xmm3
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; AVX-NEXT: vpshufb %xmm2, %xmm15, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm4, %xmm5
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vmovdqa (%rsp), %xmm8 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm8, %xmm3
+; AVX-NEXT: vpshufb %xmm2, %xmm5, %xmm4
+; AVX-NEXT: vpshufb %xmm2, %xmm6, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm8[0],xmm4[0],xmm8[1],xmm4[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpshufb %xmm0, %xmm7, %xmm1
+; AVX-NEXT: vpshufb %xmm0, %xmm9, %xmm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
+; AVX-NEXT: vpshufb %xmm2, %xmm10, %xmm4
+; AVX-NEXT: vpshufb %xmm2, %xmm11, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm8[0],xmm4[0],xmm8[1],xmm4[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm0, %xmm6, %xmm1
+; AVX-NEXT: vpshufb %xmm0, %xmm12, %xmm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm0, %xmm9, %xmm0
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm10, %xmm3
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm2, %xmm11, %xmm2
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [3,7,11,15,3,7,11,15,3,7,11,15,3,7,11,15]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm1, %xmm2, %xmm2
+; AVX-NEXT: vpshufb %xmm2, %xmm9, %xmm4
+; AVX-NEXT: vpshufb %xmm2, %xmm13, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm8[0],xmm4[0],xmm8[1],xmm4[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm1, %xmm3, %xmm3
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; AVX-NEXT: vmovd {{.*#+}} xmm3 = [3,7,11,15,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm3, %xmm7, %xmm5
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm3, %xmm6, %xmm6
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm5[0,1,2,3],xmm2[4,5,6,7]
-; AVX-NEXT: vpshufb %xmm1, %xmm12, %xmm5
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm1, %xmm6, %xmm6
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm3, %xmm6, %xmm6
+; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm1
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm0, %xmm5, %xmm0
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; AVX-NEXT: vpshufb %xmm2, %xmm14, %xmm1
+; AVX-NEXT: vpshufb %xmm2, %xmm15, %xmm2
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [3,7,11,15,3,7,11,15,3,7,11,15,3,7,11,15]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm1
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
+; AVX-NEXT: vmovd {{.*#+}} xmm4 = [3,7,11,15,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm8
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm0
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm8[0],xmm0[1],xmm8[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1,2,3],xmm1[4,5,6,7]
+; AVX-NEXT: vpshufb %xmm2, %xmm7, %xmm0
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
-; AVX-NEXT: vpshufb %xmm3, %xmm7, %xmm7
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[1],xmm6[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1,2,3],xmm5[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2
-; AVX-NEXT: vpshufb %xmm1, %xmm13, %xmm5
-; AVX-NEXT: vpshufb %xmm1, %xmm14, %xmm6
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
-; AVX-NEXT: vpshufb %xmm3, %xmm15, %xmm6
-; AVX-NEXT: vpshufb %xmm3, %xmm4, %xmm7
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[1],xmm6[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1,2,3],xmm5[4,5,6,7]
-; AVX-NEXT: vpshufb %xmm1, %xmm8, %xmm6
-; AVX-NEXT: vpshufb %xmm1, %xmm9, %xmm1
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1]
-; AVX-NEXT: vpshufb %xmm3, %xmm10, %xmm6
-; AVX-NEXT: vpshufb %xmm3, %xmm11, %xmm3
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm1, %ymm1
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm3, 32(%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm3, (%rsi)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm3, 32(%rdx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm3 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm3, (%rdx)
-; AVX-NEXT: vmovaps %ymm0, 32(%rcx)
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; AVX-NEXT: vmovaps %ymm0, (%rcx)
-; AVX-NEXT: vmovaps %ymm1, 32(%r8)
-; AVX-NEXT: vmovaps %ymm2, (%r8)
-; AVX-NEXT: addq $296, %rsp # imm = 0x128
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufb %xmm2, %xmm7, %xmm7
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm7[0],xmm0[0],xmm7[1],xmm0[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm10, %xmm7
+; AVX-NEXT: vpshufb %xmm4, %xmm11, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm8[0],xmm7[0],xmm8[1],xmm7[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm7[0,1,2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vpshufb %xmm2, %xmm6, %xmm7
+; AVX-NEXT: vpshufb %xmm2, %xmm12, %xmm8
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm8[0],xmm7[0],xmm8[1],xmm7[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm9, %xmm8
+; AVX-NEXT: vpshufb %xmm4, %xmm13, %xmm9
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm9[0],xmm8[0],xmm9[1],xmm8[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm8[0,1,2,3],xmm7[4,5,6,7]
+; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm8
+; AVX-NEXT: vpshufb %xmm2, %xmm5, %xmm2
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1]
+; AVX-NEXT: vpshufb %xmm4, %xmm14, %xmm5
+; AVX-NEXT: vpshufb %xmm4, %xmm15, %xmm3
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 16(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, (%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 48(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 32(%rsi)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 16(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, (%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 48(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 32(%rdx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 16(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, (%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 48(%rcx)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm3, 32(%rcx)
+; AVX-NEXT: vmovdqa %xmm2, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm7, (%r8)
+; AVX-NEXT: vmovdqa %xmm0, 48(%r8)
+; AVX-NEXT: vmovdqa %xmm1, 32(%r8)
+; AVX-NEXT: addq $328, %rsp # imm = 0x148
; AVX-NEXT: retq
;
; AVX2-LABEL: load_i8_stride4_vf64:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
index 904d07cd3d66f..13ae9d44f8a5e 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
@@ -196,17 +196,16 @@ define void @store_i16_stride4_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm5 = xmm4[0],xmm3[0]
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[2,0,3,1,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[2,0,3,1,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm5[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,3,1,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[2,0,3,1,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX-NEXT: vmovaps %ymm0, (%r8)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm0, (%r8)
+; AVX-NEXT: vmovdqa %xmm2, 16(%r8)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride4_vf4:
@@ -427,17 +426,16 @@ define void @store_i16_stride4_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovdqa (%rcx), %xmm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm4
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; AVX-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX-NEXT: vmovaps %ymm0, 32(%r8)
-; AVX-NEXT: vmovaps %ymm4, (%r8)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm0, 32(%r8)
+; AVX-NEXT: vmovdqa %xmm1, 48(%r8)
+; AVX-NEXT: vmovdqa %xmm4, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm6, (%r8)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride4_vf8:
@@ -514,21 +512,21 @@ define void @store_i16_stride4_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm1[1,3,1,3]
+; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm1[0,2,0,2]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm3 = [u,u,u,u,0,1,8,9,u,u,u,u,2,3,10,11,u,u,u,u,4,5,12,13,u,u,u,u,6,7,14,15]
; AVX512-NEXT: vpshufb %ymm3, %ymm2, %ymm2
; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm0[1,3,1,3]
+; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm0[0,2,0,2]
; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm5 = [151519488,185205506,218891524,252577542]
; AVX512-NEXT: vpshufb %ymm5, %ymm4, %ymm4
; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2],ymm2[3],ymm4[4],ymm2[5],ymm4[6],ymm2[7]
-; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,0,2]
+; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm3, %ymm1, %ymm1
-; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,0,2]
+; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm0, (%r8)
+; AVX512-NEXT: vmovdqa %ymm0, 32(%r8)
+; AVX512-NEXT: vmovdqa %ymm2, (%r8)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -537,21 +535,21 @@ define void @store_i16_stride4_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[1,3,1,3]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[0,2,0,2]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm3 = [u,u,u,u,0,1,8,9,u,u,u,u,2,3,10,11,u,u,u,u,4,5,12,13,u,u,u,u,6,7,14,15]
; AVX512-FCP-NEXT: vpshufb %ymm3, %ymm2, %ymm2
; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm0[1,3,1,3]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm0[0,2,0,2]
; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm5 = [151519488,185205506,218891524,252577542]
; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm4
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2],ymm2[3],ymm4[4],ymm2[5],ymm4[6],ymm2[7]
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,0,2]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm3, %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,0,2]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%r8)
+; AVX512-FCP-NEXT: vmovdqa %ymm0, 32(%r8)
+; AVX512-FCP-NEXT: vmovdqa %ymm2, (%r8)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -560,21 +558,21 @@ define void @store_i16_stride4_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm1[1,3,1,3]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm1[0,2,0,2]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm3 = [u,u,u,u,0,1,8,9,u,u,u,u,2,3,10,11,u,u,u,u,4,5,12,13,u,u,u,u,6,7,14,15]
; AVX512DQ-NEXT: vpshufb %ymm3, %ymm2, %ymm2
; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm0[1,3,1,3]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm0[0,2,0,2]
; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm5 = [151519488,185205506,218891524,252577542]
; AVX512DQ-NEXT: vpshufb %ymm5, %ymm4, %ymm4
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2],ymm2[3],ymm4[4],ymm2[5],ymm4[6],ymm2[7]
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,0,2]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm3, %ymm1, %ymm1
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,0,2]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm0, (%r8)
+; AVX512DQ-NEXT: vmovdqa %ymm0, 32(%r8)
+; AVX512DQ-NEXT: vmovdqa %ymm2, (%r8)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -583,21 +581,21 @@ define void @store_i16_stride4_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[1,3,1,3]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm1[0,2,0,2]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm3 = [u,u,u,u,0,1,8,9,u,u,u,u,2,3,10,11,u,u,u,u,4,5,12,13,u,u,u,u,6,7,14,15]
; AVX512DQ-FCP-NEXT: vpshufb %ymm3, %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm0[1,3,1,3]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm0[0,2,0,2]
; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm5 = [151519488,185205506,218891524,252577542]
; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm4
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2],ymm2[3],ymm4[4],ymm2[5],ymm4[6],ymm2[7]
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm3, %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%r8)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, 32(%r8)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm2, (%r8)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
@@ -918,26 +916,26 @@ define void @store_i16_stride4_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa (%rdi), %ymm0
; AVX512-NEXT: vmovdqa (%rsi), %ymm1
-; AVX512-NEXT: vmovdqa (%rcx), %xmm2
-; AVX512-NEXT: vmovdqa (%rdx), %xmm3
-; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; AVX512-NEXT: vmovdqa (%rsi), %xmm5
-; AVX512-NEXT: vmovdqa (%rdi), %xmm6
-; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,8,1,9,2,10,3,11]
-; AVX512-NEXT: vpermt2d %ymm4, %ymm8, %ymm7
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
-; AVX512-NEXT: vpermt2d %ymm2, %ymm8, %ymm3
-; AVX512-NEXT: vinserti64x4 $1, %ymm7, %zmm3, %zmm2
; AVX512-NEXT: vperm2i128 {{.*#+}} ymm1 = ymm1[2,3],mem[2,3]
; AVX512-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],mem[2,3]
-; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
+; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,4,1,5,2,6,3,7,16,20,17,21,18,22,19,23]
-; AVX512-NEXT: vpermi2d %zmm3, %zmm0, %zmm1
+; AVX512-NEXT: vpermi2d %zmm2, %zmm0, %zmm1
+; AVX512-NEXT: vmovdqa (%rcx), %xmm0
+; AVX512-NEXT: vmovdqa (%rdx), %xmm2
+; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; AVX512-NEXT: vmovdqa (%rsi), %xmm4
+; AVX512-NEXT: vmovdqa (%rdi), %xmm5
+; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,8,1,9,2,10,3,11]
+; AVX512-NEXT: vpermt2d %ymm3, %ymm7, %ymm6
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; AVX512-NEXT: vpermt2d %ymm0, %ymm7, %ymm2
+; AVX512-NEXT: vmovdqa %ymm2, (%r8)
+; AVX512-NEXT: vmovdqa %ymm6, 32(%r8)
; AVX512-NEXT: vmovdqa64 %zmm1, 64(%r8)
-; AVX512-NEXT: vmovdqa64 %zmm2, (%r8)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -945,26 +943,26 @@ define void @store_i16_stride4_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: vmovdqa (%rdi), %ymm0
; AVX512-FCP-NEXT: vmovdqa (%rsi), %ymm1
-; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm2
-; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm3
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm5
-; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm6
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,8,1,9,2,10,3,11]
-; AVX512-FCP-NEXT: vpermt2d %ymm4, %ymm8, %ymm7
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
-; AVX512-FCP-NEXT: vpermt2d %ymm2, %ymm8, %ymm3
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm3, %zmm2
; AVX512-FCP-NEXT: vperm2i128 {{.*#+}} ymm1 = ymm1[2,3],mem[2,3]
; AVX512-FCP-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],mem[2,3]
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,4,1,5,2,6,3,7,16,20,17,21,18,22,19,23]
-; AVX512-FCP-NEXT: vpermi2d %zmm3, %zmm0, %zmm1
+; AVX512-FCP-NEXT: vpermi2d %zmm2, %zmm0, %zmm1
+; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm0
+; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm2
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm4
+; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm5
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,8,1,9,2,10,3,11]
+; AVX512-FCP-NEXT: vpermt2d %ymm3, %ymm7, %ymm6
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; AVX512-FCP-NEXT: vpermt2d %ymm0, %ymm7, %ymm2
+; AVX512-FCP-NEXT: vmovdqa %ymm2, (%r8)
+; AVX512-FCP-NEXT: vmovdqa %ymm6, 32(%r8)
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, 64(%r8)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm2, (%r8)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -972,26 +970,26 @@ define void @store_i16_stride4_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: vmovdqa (%rdi), %ymm0
; AVX512DQ-NEXT: vmovdqa (%rsi), %ymm1
-; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm2
-; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm3
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm5
-; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm6
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,8,1,9,2,10,3,11]
-; AVX512DQ-NEXT: vpermt2d %ymm4, %ymm8, %ymm7
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
-; AVX512DQ-NEXT: vpermt2d %ymm2, %ymm8, %ymm3
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm7, %zmm3, %zmm2
; AVX512DQ-NEXT: vperm2i128 {{.*#+}} ymm1 = ymm1[2,3],mem[2,3]
; AVX512DQ-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],mem[2,3]
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,4,1,5,2,6,3,7,16,20,17,21,18,22,19,23]
-; AVX512DQ-NEXT: vpermi2d %zmm3, %zmm0, %zmm1
+; AVX512DQ-NEXT: vpermi2d %zmm2, %zmm0, %zmm1
+; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm0
+; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm2
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm4
+; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm5
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,8,1,9,2,10,3,11]
+; AVX512DQ-NEXT: vpermt2d %ymm3, %ymm7, %ymm6
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; AVX512DQ-NEXT: vpermt2d %ymm0, %ymm7, %ymm2
+; AVX512DQ-NEXT: vmovdqa %ymm2, (%r8)
+; AVX512DQ-NEXT: vmovdqa %ymm6, 32(%r8)
; AVX512DQ-NEXT: vmovdqa64 %zmm1, 64(%r8)
-; AVX512DQ-NEXT: vmovdqa64 %zmm2, (%r8)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -999,26 +997,26 @@ define void @store_i16_stride4_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %ymm1
-; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm2
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm3
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm5
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm6
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,8,1,9,2,10,3,11]
-; AVX512DQ-FCP-NEXT: vpermt2d %ymm4, %ymm8, %ymm7
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
-; AVX512DQ-FCP-NEXT: vpermt2d %ymm2, %ymm8, %ymm3
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm3, %zmm2
; AVX512DQ-FCP-NEXT: vperm2i128 {{.*#+}} ymm1 = ymm1[2,3],mem[2,3]
; AVX512DQ-FCP-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],mem[2,3]
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,4,1,5,2,6,3,7,16,20,17,21,18,22,19,23]
-; AVX512DQ-FCP-NEXT: vpermi2d %zmm3, %zmm0, %zmm1
+; AVX512DQ-FCP-NEXT: vpermi2d %zmm2, %zmm0, %zmm1
+; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm0
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm2
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm4
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm5
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,8,1,9,2,10,3,11]
+; AVX512DQ-FCP-NEXT: vpermt2d %ymm3, %ymm7, %ymm6
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; AVX512DQ-FCP-NEXT: vpermt2d %ymm0, %ymm7, %ymm2
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm2, (%r8)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm6, 32(%r8)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, 64(%r8)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm2, (%r8)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
index 962503eba082b..f360e140545c6 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
@@ -357,30 +357,29 @@ define void @store_i16_stride6_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm5 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm6 = xmm5[0],xmm4[0]
-; AVX-NEXT: vpshufb {{.*#+}} xmm7 = xmm3[2,3,10,11,u,u,u,u,u,u,u,u,4,5,12,13]
+; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm3[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm7[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm8 = xmm8[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm7 = xmm8[0],xmm7[0]
+; AVX-NEXT: vpshufb {{.*#+}} xmm8 = xmm6[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15]
+; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm8[0,1],xmm7[2,3,4,5],xmm8[6,7]
+; AVX-NEXT: vpshufb {{.*#+}} xmm3 = xmm3[2,3,10,11,u,u,u,u,u,u,u,u,4,5,12,13]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,1,1,3]
; AVX-NEXT: vpshufhw {{.*#+}} xmm8 = xmm8[0,1,2,3,4,6,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0,1,2,3],xmm8[4,5],xmm7[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3],xmm8[4,5],xmm3[6,7]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm7[0,1],xmm4[2,3],xmm7[4,5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
-; AVX-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[0,1,8,9,u,u,u,u,u,u,u,u,2,3,10,11]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm6[0,1,2,0]
-; AVX-NEXT: vpshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,6,4,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5],xmm1[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,3,1,4,5,6,7]
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
-; AVX-NEXT: vpshufb {{.*#+}} xmm2 = xmm6[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3,4,5],xmm2[6,7]
-; AVX-NEXT: vmovdqa %xmm0, 32(%rax)
-; AVX-NEXT: vmovaps %ymm1, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,u,u,u,u,u,u,u,u,2,3,10,11]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm6[0,1,2,0]
+; AVX-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,4,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
+; AVX-NEXT: vmovdqa %xmm0, (%rax)
+; AVX-NEXT: vmovdqa %xmm3, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm7, 32(%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride6_vf4:
@@ -808,43 +807,42 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovdqa (%rcx), %xmm3
; AVX-NEXT: vmovdqa (%r8), %xmm4
; AVX-NEXT: vmovdqa (%r9), %xmm5
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm7[1,1,2,2]
; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm8[0,1,2,3],xmm6[4,5],xmm8[6,7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm8[0,1],xmm9[2,3],xmm8[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm7[0,0,1,1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm6[0,1,0,1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm11[0,1],xmm10[2,3],xmm11[4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm9[0,1,0,1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm10[0,1,2,3],xmm11[4,5],xmm10[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm7[2,2,3,3]
+; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm10 = xmm6[1],xmm10[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm9[2,3,2,3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm11[0,1],xmm10[2,3,4,5],xmm11[6,7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,0,1,1]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5,6,7]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[0,1,0,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm4[4,5],xmm1[6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm7[2,2,3,3]
-; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm4 = xmm6[1],xmm4[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[2,3,2,3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1],xmm4[2,3,4,5],xmm5[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm4, %ymm1
-; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[2,2,3,3]
-; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm4 = xmm0[1],xmm4[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[2,3,2,3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1],xmm4[2,3,4,5],xmm5[6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,2,2]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5],xmm2[6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm3[2,3],xmm0[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX-NEXT: vmovaps %ymm0, 64(%rax)
-; AVX-NEXT: vmovaps %ymm1, 32(%rax)
-; AVX-NEXT: vmovaps %ymm8, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,2,2]
+; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm0[4,5],xmm4[6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm3[2,3],xmm4[4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm7[0,0,1,1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[0,1,0,1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3],xmm6[4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm9[0,1,0,1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm6[4,5],xmm5[6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,2,3,3]
+; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm2[1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3,4,5],xmm2[6,7]
+; AVX-NEXT: vmovdqa %xmm0, 32(%rax)
+; AVX-NEXT: vmovdqa %xmm5, 48(%rax)
+; AVX-NEXT: vmovdqa %xmm4, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm1, (%rax)
+; AVX-NEXT: vmovdqa %xmm10, 80(%rax)
+; AVX-NEXT: vmovdqa %xmm8, 64(%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride6_vf8:
@@ -987,18 +985,18 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-NEXT: vmovdqa (%r8), %xmm2
-; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm1[0,2,1,3]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,8,9,6,7,14,15,6,7,14,15,2,3,10,11,16,17,24,25,16,17,24,25,24,25,26,27,18,19,26,27]
-; AVX512-NEXT: vpshufb %ymm4, %ymm3, %ymm3
; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm0[0,2,1,3]
+; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm0[1,3,1,3]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,4,5,12,13,4,5,12,13,18,19,26,27,22,23,30,31,22,23,30,31,20,21,28,29]
+; AVX512-NEXT: vpshufb %ymm4, %ymm3, %ymm3
+; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm1[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm4, %ymm5, %ymm4
; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1],ymm3[2],ymm4[3,4],ymm3[5],ymm4[6,7]
; AVX512-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm2[0,2,1,3]
-; AVX512-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0],ymm3[1,2],ymm4[3],ymm3[4,5],ymm4[6],ymm3[7]
+; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm2[1,3,1,3]
+; AVX512-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0],ymm4[1],ymm3[2,3],ymm4[4],ymm3[5,6],ymm4[7]
; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm1[0,2,0,2]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,8,9,0,1,8,9,4,5,12,13,2,3,10,11,18,19,26,27,24,25,30,31,20,21,28,29,20,21,28,29]
; AVX512-NEXT: vpshufb %ymm5, %ymm4, %ymm4
@@ -1008,18 +1006,18 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm2[0,2,0,2]
; AVX512-NEXT: vpshufb {{.*#+}} ymm5 = ymm5[u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,18,19,26,27,u,u,u,u,u,u,u,u]
; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm5[2],ymm4[3,4],ymm5[5],ymm4[6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm3, %zmm4, %zmm3
-; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,4,5,12,13,4,5,12,13,18,19,26,27,22,23,30,31,22,23,30,31,20,21,28,29]
-; AVX512-NEXT: vpshufb %ymm4, %ymm0, %ymm0
-; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm4, %ymm1, %ymm1
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2],ymm1[3,4],ymm0[5],ymm1[6,7]
-; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm2[1,3,1,3]
-; AVX512-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7]
-; AVX512-NEXT: vmovdqa %ymm0, 64(%rax)
-; AVX512-NEXT: vmovdqa64 %zmm3, (%rax)
+; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,8,9,6,7,14,15,6,7,14,15,2,3,10,11,16,17,24,25,16,17,24,25,24,25,26,27,18,19,26,27]
+; AVX512-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
+; AVX512-NEXT: vpshufb %ymm5, %ymm0, %ymm0
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2],ymm0[3,4],ymm1[5],ymm0[6,7]
+; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,1,3]
+; AVX512-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2],ymm1[3],ymm0[4,5],ymm1[6],ymm0[7]
+; AVX512-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512-NEXT: vmovdqa %ymm4, (%rax)
+; AVX512-NEXT: vmovdqa %ymm3, 64(%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -1029,20 +1027,20 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm2
-; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [2,6,1,5,2,6,1,5]
+; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
+; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [7,3,3,7,7,3,3,7]
; AVX512-FCP-NEXT: # ymm3 = mem[0,1,0,1]
-; AVX512-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm3
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,8,9,6,7,14,15,10,11,14,15,2,3,10,11,16,17,24,25,16,17,20,21,24,25,26,27,18,19,26,27]
+; AVX512-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm3
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,8,9,12,13,4,5,12,13,18,19,26,27,22,23,18,19,22,23,30,31,20,21,28,29]
; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm3, %ymm3
-; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm0[0,2,1,3]
+; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm1[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm5, %ymm4
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1],ymm3[2],ymm4[3,4],ymm3[5],ymm4[6,7]
; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm2[0,2,1,3]
-; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0],ymm3[1,2],ymm4[3],ymm3[4,5],ymm4[6],ymm3[7]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm2[1,3,1,3]
+; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0],ymm4[1],ymm3[2,3],ymm4[4],ymm3[5,6],ymm4[7]
; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [0,4,1,5,0,4,1,5]
; AVX512-FCP-NEXT: # ymm4 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vpermd %ymm1, %ymm4, %ymm4
@@ -1056,20 +1054,20 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: vpermd %ymm2, %ymm5, %ymm5
; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm5 = ymm5[u,u,u,u,u,u,u,u,12,13,8,9,u,u,u,u,u,u,u,u,18,19,22,23,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm5[2],ymm4[3,4],ymm5[5],ymm4[6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm4, %zmm3
-; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [7,3,3,7,7,3,3,7]
-; AVX512-FCP-NEXT: # ymm4 = mem[0,1,0,1]
-; AVX512-FCP-NEXT: vpermd %ymm0, %ymm4, %ymm0
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,8,9,12,13,4,5,12,13,18,19,26,27,22,23,18,19,22,23,30,31,20,21,28,29]
-; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm0, %ymm0
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2],ymm1[3,4],ymm0[5],ymm1[6,7]
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm2[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7]
-; AVX512-FCP-NEXT: vmovdqa %ymm0, 64(%rax)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm3, (%rax)
+; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [2,6,1,5,2,6,1,5]
+; AVX512-FCP-NEXT: # ymm5 = mem[0,1,0,1]
+; AVX512-FCP-NEXT: vpermd %ymm1, %ymm5, %ymm1
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,8,9,6,7,14,15,10,11,14,15,2,3,10,11,16,17,24,25,16,17,20,21,24,25,26,27,18,19,26,27]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2],ymm0[3,4],ymm1[5],ymm0[6,7]
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,1,3]
+; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2],ymm1[3],ymm0[4,5],ymm1[6],ymm0[7]
+; AVX512-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm4, (%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm3, 64(%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -1079,18 +1077,18 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-NEXT: vmovdqa (%r8), %xmm2
-; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm1[0,2,1,3]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,8,9,6,7,14,15,6,7,14,15,2,3,10,11,16,17,24,25,16,17,24,25,24,25,26,27,18,19,26,27]
-; AVX512DQ-NEXT: vpshufb %ymm4, %ymm3, %ymm3
; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm0[0,2,1,3]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm0[1,3,1,3]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,4,5,12,13,4,5,12,13,18,19,26,27,22,23,30,31,22,23,30,31,20,21,28,29]
+; AVX512DQ-NEXT: vpshufb %ymm4, %ymm3, %ymm3
+; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm1[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm4, %ymm5, %ymm4
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1],ymm3[2],ymm4[3,4],ymm3[5],ymm4[6,7]
; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm2[0,2,1,3]
-; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0],ymm3[1,2],ymm4[3],ymm3[4,5],ymm4[6],ymm3[7]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm2[1,3,1,3]
+; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0],ymm4[1],ymm3[2,3],ymm4[4],ymm3[5,6],ymm4[7]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm1[0,2,0,2]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,8,9,0,1,8,9,4,5,12,13,2,3,10,11,18,19,26,27,24,25,30,31,20,21,28,29,20,21,28,29]
; AVX512DQ-NEXT: vpshufb %ymm5, %ymm4, %ymm4
@@ -1100,18 +1098,18 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm2[0,2,0,2]
; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm5 = ymm5[u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,18,19,26,27,u,u,u,u,u,u,u,u]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm5[2],ymm4[3,4],ymm5[5],ymm4[6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm3, %zmm4, %zmm3
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,4,5,12,13,4,5,12,13,18,19,26,27,22,23,30,31,22,23,30,31,20,21,28,29]
-; AVX512DQ-NEXT: vpshufb %ymm4, %ymm0, %ymm0
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm4, %ymm1, %ymm1
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2],ymm1[3,4],ymm0[5],ymm1[6,7]
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm2[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7]
-; AVX512DQ-NEXT: vmovdqa %ymm0, 64(%rax)
-; AVX512DQ-NEXT: vmovdqa64 %zmm3, (%rax)
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,8,9,6,7,14,15,6,7,14,15,2,3,10,11,16,17,24,25,16,17,24,25,24,25,26,27,18,19,26,27]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm0, %ymm0
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2],ymm0[3,4],ymm1[5],ymm0[6,7]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,1,3]
+; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2],ymm1[3],ymm0[4,5],ymm1[6],ymm0[7]
+; AVX512DQ-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm4, (%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm3, 64(%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1121,20 +1119,20 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm2
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [2,6,1,5,2,6,1,5]
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
+; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [7,3,3,7,7,3,3,7]
; AVX512DQ-FCP-NEXT: # ymm3 = mem[0,1,0,1]
-; AVX512DQ-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,8,9,6,7,14,15,10,11,14,15,2,3,10,11,16,17,24,25,16,17,20,21,24,25,26,27,18,19,26,27]
+; AVX512DQ-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,8,9,12,13,4,5,12,13,18,19,26,27,22,23,18,19,22,23,30,31,20,21,28,29]
; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm0[0,2,1,3]
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm1[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm5, %ymm4
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1],ymm3[2],ymm4[3,4],ymm3[5],ymm4[6,7]
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm2[0,2,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0],ymm3[1,2],ymm4[3],ymm3[4,5],ymm4[6],ymm3[7]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm2[1,3,1,3]
+; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm4 = ymm4[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0],ymm4[1],ymm3[2,3],ymm4[4],ymm3[5,6],ymm4[7]
; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [0,4,1,5,0,4,1,5]
; AVX512DQ-FCP-NEXT: # ymm4 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vpermd %ymm1, %ymm4, %ymm4
@@ -1148,20 +1146,20 @@ define void @store_i16_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: vpermd %ymm2, %ymm5, %ymm5
; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm5 = ymm5[u,u,u,u,u,u,u,u,12,13,8,9,u,u,u,u,u,u,u,u,18,19,22,23,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm5[2],ymm4[3,4],ymm5[5],ymm4[6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm4, %zmm3
-; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [7,3,3,7,7,3,3,7]
-; AVX512DQ-FCP-NEXT: # ymm4 = mem[0,1,0,1]
-; AVX512DQ-FCP-NEXT: vpermd %ymm0, %ymm4, %ymm0
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [2,3,10,11,8,9,10,11,8,9,12,13,4,5,12,13,18,19,26,27,22,23,18,19,22,23,30,31,20,21,28,29]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm0, %ymm0
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2],ymm1[3,4],ymm0[5],ymm1[6,7]
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm2[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u,20,21,28,29,u,u,u,u,u,u,u,u,22,23,30,31]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4],ymm0[5,6],ymm1[7]
-; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, 64(%rax)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm3, (%rax)
+; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [2,6,1,5,2,6,1,5]
+; AVX512DQ-FCP-NEXT: # ymm5 = mem[0,1,0,1]
+; AVX512DQ-FCP-NEXT: vpermd %ymm1, %ymm5, %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,8,9,6,7,14,15,10,11,14,15,2,3,10,11,16,17,24,25,16,17,20,21,24,25,26,27,18,19,26,27]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2],ymm0[3,4],ymm1[5],ymm0[6,7]
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,1,3]
+; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[4,5,12,13,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u,16,17,24,25,u,u,u,u]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2],ymm1[3],ymm0[4,5],ymm1[6],ymm0[7]
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm4, (%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm3, 64(%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
@@ -1939,325 +1937,325 @@ define void @store_i16_stride6_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
;
; AVX512-LABEL: store_i16_stride6_vf16:
; AVX512: # %bb.0:
-; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: vmovdqa (%rdi), %ymm0
-; AVX512-NEXT: vmovdqa (%rsi), %ymm2
-; AVX512-NEXT: vmovdqa (%rdx), %ymm4
-; AVX512-NEXT: vmovdqa (%rcx), %ymm5
-; AVX512-NEXT: vmovdqa (%r8), %ymm1
-; AVX512-NEXT: vmovdqa (%r9), %ymm3
-; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15]
-; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm4[4],ymm5[4],ymm4[5],ymm5[5],ymm4[6],ymm5[6],ymm4[7],ymm5[7],ymm4[12],ymm5[12],ymm4[13],ymm5[13],ymm4[14],ymm5[14],ymm4[15],ymm5[15]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm8 = [5,0,14,6,0,15,7,0]
-; AVX512-NEXT: vpermi2d %ymm6, %ymm7, %ymm8
-; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm1[4],ymm3[4],ymm1[5],ymm3[5],ymm1[6],ymm3[6],ymm1[7],ymm3[7],ymm1[12],ymm3[12],ymm1[13],ymm3[13],ymm1[14],ymm3[14],ymm1[15],ymm3[15]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,13,2,3,14,5,6,15]
-; AVX512-NEXT: vpermi2d %ymm6, %ymm8, %ymm7
-; AVX512-NEXT: vpsrldq {{.*#+}} ymm6 = ymm5[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm5[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vpsrldq {{.*#+}} ymm8 = ymm4[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm4[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm8[0],ymm6[0],ymm8[1],ymm6[1],ymm8[2],ymm6[2],ymm8[3],ymm6[3],ymm8[8],ymm6[8],ymm8[9],ymm6[9],ymm8[10],ymm6[10],ymm8[11],ymm6[11]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm8 = ymm2[2,1,2,3,6,5,6,7]
-; AVX512-NEXT: vpshuflw {{.*#+}} ymm8 = ymm8[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm9 = ymm0[2,1,2,3,6,5,6,7]
-; AVX512-NEXT: vpshuflw {{.*#+}} ymm9 = ymm9[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,5,12,0,4,13,0,7]
-; AVX512-NEXT: vpermi2d %ymm6, %ymm8, %ymm9
-; AVX512-NEXT: vpshufd {{.*#+}} ymm6 = ymm3[1,2,2,3,5,6,6,7]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm8 = ymm1[1,2,2,3,5,6,6,7]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm8[0],ymm6[0],ymm8[1],ymm6[1],ymm8[2],ymm6[2],ymm8[3],ymm6[3],ymm8[8],ymm6[8],ymm8[9],ymm6[9],ymm8[10],ymm6[10],ymm8[11],ymm6[11]
-; AVX512-NEXT: vpermq {{.*#+}} ymm6 = ymm6[2,2,2,3]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm6[0],ymm9[1,2],ymm6[3],ymm9[4,5],ymm6[6],ymm9[7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm7, %zmm6, %zmm16
+; AVX512-NEXT: vmovdqa (%rsi), %ymm1
+; AVX512-NEXT: vmovdqa (%rdx), %ymm2
+; AVX512-NEXT: vmovdqa (%rcx), %ymm3
; AVX512-NEXT: vmovdqa (%rcx), %xmm6
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm4 = xmm6[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
; AVX512-NEXT: vmovdqa (%rdx), %xmm7
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
-; AVX512-NEXT: vmovdqa (%rsi), %xmm8
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm5 = xmm7[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; AVX512-NEXT: vmovdqa (%rsi), %xmm9
+; AVX512-NEXT: vpshufd {{.*#+}} xmm4 = xmm9[0,1,2,1]
+; AVX512-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,7,6,5]
; AVX512-NEXT: vmovdqa (%rdi), %xmm10
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm13 = [0,8,0,1,9,0,2,10]
-; AVX512-NEXT: vpermi2d %ymm9, %ymm11, %ymm13
+; AVX512-NEXT: vpshufd {{.*#+}} xmm8 = xmm10[0,1,2,1]
+; AVX512-NEXT: vpshufhw {{.*#+}} xmm8 = xmm8[0,1,2,3,4,7,6,5]
+; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm4[4],xmm8[5],xmm4[5],xmm8[6],xmm4[6],xmm8[7],xmm4[7]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm4 = [0,1,8,0,0,9,0,3]
+; AVX512-NEXT: vpermi2d %ymm5, %ymm8, %ymm4
+; AVX512-NEXT: vpsrldq {{.*#+}} ymm5 = ymm3[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm3[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vpsrldq {{.*#+}} ymm8 = ymm2[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm2[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm8[0],ymm5[0],ymm8[1],ymm5[1],ymm8[2],ymm5[2],ymm8[3],ymm5[3],ymm8[8],ymm5[8],ymm8[9],ymm5[9],ymm8[10],ymm5[10],ymm8[11],ymm5[11]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm5 = ymm1[2,1,2,3,6,5,6,7]
+; AVX512-NEXT: vpshuflw {{.*#+}} ymm5 = ymm5[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm11 = ymm0[2,1,2,3,6,5,6,7]
+; AVX512-NEXT: vpshuflw {{.*#+}} ymm11 = ymm11[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm11 = ymm11[0],ymm5[0],ymm11[1],ymm5[1],ymm11[2],ymm5[2],ymm11[3],ymm5[3],ymm11[8],ymm5[8],ymm11[9],ymm5[9],ymm11[10],ymm5[10],ymm11[11],ymm5[11]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm5 = [0,5,12,0,4,13,0,7]
+; AVX512-NEXT: vpermi2d %ymm8, %ymm11, %ymm5
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,8,0,1,9,0,2,10]
+; AVX512-NEXT: vpermi2d %ymm11, %ymm12, %ymm8
+; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
; AVX512-NEXT: vmovdqa (%r9), %xmm9
-; AVX512-NEXT: vmovdqa (%r8), %xmm11
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
-; AVX512-NEXT: vpbroadcastq %xmm14, %ymm14
-; AVX512-NEXT: vpblendd {{.*#+}} ymm13 = ymm13[0,1],ymm14[2],ymm13[3,4],ymm14[5],ymm13[6,7]
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm14 = xmm6[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm15 = xmm7[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm15[0],xmm14[0],xmm15[1],xmm14[1],xmm15[2],xmm14[2],xmm15[3],xmm14[3]
-; AVX512-NEXT: vpshufd {{.*#+}} xmm15 = xmm8[0,1,2,1]
-; AVX512-NEXT: vpshufhw {{.*#+}} xmm15 = xmm15[0,1,2,3,4,7,6,5]
-; AVX512-NEXT: vpshufd {{.*#+}} xmm12 = xmm10[0,1,2,1]
-; AVX512-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,4,7,6,5]
-; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm12 = xmm12[4],xmm15[4],xmm12[5],xmm15[5],xmm12[6],xmm15[6],xmm12[7],xmm15[7]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,1,8,0,0,9,0,3]
-; AVX512-NEXT: vpermi2d %ymm14, %ymm12, %ymm15
-; AVX512-NEXT: vpshufd {{.*#+}} xmm12 = xmm9[1,2,2,3]
-; AVX512-NEXT: vpshufd {{.*#+}} xmm14 = xmm11[1,2,2,3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm14[0],xmm12[0],xmm14[1],xmm12[1],xmm14[2],xmm12[2],xmm14[3],xmm12[3]
-; AVX512-NEXT: vpermq {{.*#+}} ymm12 = ymm12[0,0,2,1]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm12 = ymm12[0],ymm15[1,2],ymm12[3],ymm15[4,5],ymm12[6],ymm15[7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm12, %zmm13, %zmm12
-; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm4[0],ymm5[0],ymm4[1],ymm5[1],ymm4[2],ymm5[2],ymm4[3],ymm5[3],ymm4[8],ymm5[8],ymm4[9],ymm5[9],ymm4[10],ymm5[10],ymm4[11],ymm5[11]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,12,0,5,13,0,6,14]
-; AVX512-NEXT: vpermi2d %ymm4, %ymm0, %ymm2
-; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm1[0],ymm3[0],ymm1[1],ymm3[1],ymm1[2],ymm3[2],ymm1[3],ymm3[3],ymm1[8],ymm3[8],ymm1[9],ymm3[9],ymm1[10],ymm3[10],ymm1[11],ymm3[11]
-; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,2,2]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm0[2],ymm2[3,4],ymm0[5],ymm2[6,7]
-; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
-; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm3 = [1,0,10,2,0,11,3,0]
-; AVX512-NEXT: vpermi2d %ymm1, %ymm2, %ymm3
-; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm11[4],xmm9[4],xmm11[5],xmm9[5],xmm11[6],xmm9[6],xmm11[7],xmm9[7]
-; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,9,2,3,10,5,6,11]
-; AVX512-NEXT: vpermi2d %ymm1, %ymm3, %ymm2
-; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512-NEXT: vmovdqa64 %zmm12, (%rax)
-; AVX512-NEXT: vmovdqa64 %zmm16, 128(%rax)
+; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
+; AVX512-NEXT: vpshufd {{.*#+}} xmm7 = xmm9[1,2,2,3]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm11 = [1,0,10,2,0,11,3,0]
+; AVX512-NEXT: vpermi2d %ymm10, %ymm6, %ymm11
+; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
+; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm10 = ymm2[4],ymm3[4],ymm2[5],ymm3[5],ymm2[6],ymm3[6],ymm2[7],ymm3[7],ymm2[12],ymm3[12],ymm2[13],ymm3[13],ymm2[14],ymm3[14],ymm2[15],ymm3[15]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm12 = [5,0,14,6,0,15,7,0]
+; AVX512-NEXT: vpermi2d %ymm6, %ymm10, %ymm12
+; AVX512-NEXT: vmovdqa (%r8), %xmm6
+; AVX512-NEXT: vpshufd {{.*#+}} xmm10 = xmm6[1,2,2,3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm10[0],xmm7[0],xmm10[1],xmm7[1],xmm10[2],xmm7[2],xmm10[3],xmm7[3]
+; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,0,2,1]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0],ymm4[1,2],ymm7[3],ymm4[4,5],ymm7[6],ymm4[7]
+; AVX512-NEXT: vmovdqa (%r8), %ymm7
+; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[8],ymm3[8],ymm2[9],ymm3[9],ymm2[10],ymm3[10],ymm2[11],ymm3[11]
+; AVX512-NEXT: vmovdqa (%r9), %ymm3
+; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,12,0,5,13,0,6,14]
+; AVX512-NEXT: vpermi2d %ymm2, %ymm0, %ymm1
+; AVX512-NEXT: vpshufd {{.*#+}} ymm0 = ymm3[1,2,2,3,5,6,6,7]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm2 = ymm7[1,2,2,3,5,6,6,7]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
+; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,2,3]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm5[1,2],ymm0[3],ymm5[4,5],ymm0[6],ymm5[7]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm6[0],xmm9[0],xmm6[1],xmm9[1],xmm6[2],xmm9[2],xmm6[3],xmm9[3]
+; AVX512-NEXT: vpbroadcastq %xmm2, %ymm2
+; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm8[0,1],ymm2[2],ymm8[3,4],ymm2[5],ymm8[6,7]
+; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm6 = [0,9,2,3,10,5,6,11]
+; AVX512-NEXT: vpermi2d %ymm5, %ymm11, %ymm6
+; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm7[4],ymm3[4],ymm7[5],ymm3[5],ymm7[6],ymm3[6],ymm7[7],ymm3[7],ymm7[12],ymm3[12],ymm7[13],ymm3[13],ymm7[14],ymm3[14],ymm7[15],ymm3[15]
+; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,13,2,3,14,5,6,15]
+; AVX512-NEXT: vpermi2d %ymm5, %ymm12, %ymm8
+; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm7[0],ymm3[0],ymm7[1],ymm3[1],ymm7[2],ymm3[2],ymm7[3],ymm3[3],ymm7[8],ymm3[8],ymm7[9],ymm3[9],ymm7[10],ymm3[10],ymm7[11],ymm3[11]
+; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,2,2,2]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2],ymm1[3,4],ymm3[5],ymm1[6,7]
+; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
+; AVX512-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512-NEXT: vmovdqa %ymm2, (%rax)
+; AVX512-NEXT: vmovdqa64 %ymm0, 128(%rax)
+; AVX512-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512-NEXT: vmovdqa64 %ymm8, 160(%rax)
+; AVX512-NEXT: vmovdqa %ymm6, 64(%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride6_vf16:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
-; AVX512-FCP-NEXT: vmovdqa (%rdi), %ymm9
-; AVX512-FCP-NEXT: vmovdqa (%rsi), %ymm11
-; AVX512-FCP-NEXT: vmovdqa (%rdx), %ymm8
-; AVX512-FCP-NEXT: vmovdqa (%rcx), %ymm10
-; AVX512-FCP-NEXT: vmovdqa (%r8), %ymm6
-; AVX512-FCP-NEXT: vmovdqa (%r9), %ymm7
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm8[0],ymm10[0],ymm8[1],ymm10[1],ymm8[2],ymm10[2],ymm8[3],ymm10[3],ymm8[8],ymm10[8],ymm8[9],ymm10[9],ymm8[10],ymm10[10],ymm8[11],ymm10[11]
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,12,0,5,13,0,6,14]
-; AVX512-FCP-NEXT: vpermi2d %ymm0, %ymm1, %ymm2
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm6[0],ymm7[0],ymm6[1],ymm7[1],ymm6[2],ymm7[2],ymm6[3],ymm7[3],ymm6[8],ymm7[8],ymm6[9],ymm7[9],ymm6[10],ymm7[10],ymm6[11],ymm7[11]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [0,1,12,3,4,13,6,7]
-; AVX512-FCP-NEXT: vpermi2d %ymm0, %ymm2, %ymm12
-; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm0
-; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm2
-; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm4
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [1,0,10,2,0,11,3,0]
-; AVX512-FCP-NEXT: vpermi2d %ymm3, %ymm5, %ymm13
-; AVX512-FCP-NEXT: vmovdqa (%r9), %xmm3
-; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm5
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,9,2,3,10,5,6,11]
+; AVX512-FCP-NEXT: vmovdqa (%rdi), %ymm0
+; AVX512-FCP-NEXT: vmovdqa (%rsi), %ymm2
+; AVX512-FCP-NEXT: vmovdqa (%rdx), %ymm4
+; AVX512-FCP-NEXT: vmovdqa (%rcx), %ymm5
+; AVX512-FCP-NEXT: vmovdqa (%r8), %ymm1
+; AVX512-FCP-NEXT: vmovdqa (%r9), %ymm3
+; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm7
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm6 = [0,1,2,3,4,5,6,7,8,9,6,7,4,5,10,11]
+; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm7, %xmm9
+; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm8
+; AVX512-FCP-NEXT: vpshufb %xmm6, %xmm8, %xmm6
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7]
+; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm9
+; AVX512-FCP-NEXT: vpsrldq {{.*#+}} xmm11 = xmm9[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
+; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm10
+; AVX512-FCP-NEXT: vpsrldq {{.*#+}} xmm12 = xmm10[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [0,1,8,0,0,9,0,3]
+; AVX512-FCP-NEXT: vpermi2d %ymm11, %ymm6, %ymm13
+; AVX512-FCP-NEXT: vmovdqa (%r9), %xmm11
+; AVX512-FCP-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,2,2,3]
+; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm12
+; AVX512-FCP-NEXT: vpshufd {{.*#+}} xmm14 = xmm12[1,2,2,3]
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm14[0],xmm6[0],xmm14[1],xmm6[1],xmm14[2],xmm6[2],xmm14[3],xmm6[3]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [8,1,2,9,4,5,10,7]
+; AVX512-FCP-NEXT: vpermi2d %ymm14, %ymm13, %ymm6
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm13 = [u,u,u,u,4,5,10,11,u,u,u,u,u,u,u,u,24,25,22,23,20,21,26,27,u,u,u,u,u,u,u,u]
+; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm2, %ymm14
+; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm0, %ymm13
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
+; AVX512-FCP-NEXT: vpsrldq {{.*#+}} ymm14 = ymm5[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm5[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512-FCP-NEXT: vpsrldq {{.*#+}} ymm15 = ymm4[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm4[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm15[0],ymm14[0],ymm15[1],ymm14[1],ymm15[2],ymm14[2],ymm15[3],ymm14[3],ymm15[8],ymm14[8],ymm15[9],ymm14[9],ymm15[10],ymm14[10],ymm15[11],ymm14[11]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,5,12,0,4,13,0,7]
; AVX512-FCP-NEXT: vpermi2d %ymm14, %ymm13, %ymm15
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm12, %zmm15, %zmm12
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm13 = ymm9[4],ymm11[4],ymm9[5],ymm11[5],ymm9[6],ymm11[6],ymm9[7],ymm11[7],ymm9[12],ymm11[12],ymm9[13],ymm11[13],ymm9[14],ymm11[14],ymm9[15],ymm11[15]
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm14 = ymm8[4],ymm10[4],ymm8[5],ymm10[5],ymm8[6],ymm10[6],ymm8[7],ymm10[7],ymm8[12],ymm10[12],ymm8[13],ymm10[13],ymm8[14],ymm10[14],ymm8[15],ymm10[15]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [5,0,14,6,0,15,7,0]
-; AVX512-FCP-NEXT: vpermi2d %ymm13, %ymm14, %ymm15
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm13 = ymm6[4],ymm7[4],ymm6[5],ymm7[5],ymm6[6],ymm7[6],ymm6[7],ymm7[7],ymm6[12],ymm7[12],ymm6[13],ymm7[13],ymm6[14],ymm7[14],ymm6[15],ymm7[15]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [0,13,2,3,14,5,6,15]
+; AVX512-FCP-NEXT: vpshufd {{.*#+}} ymm13 = ymm3[1,2,2,3,5,6,6,7]
+; AVX512-FCP-NEXT: vpshufd {{.*#+}} ymm14 = ymm1[1,2,2,3,5,6,6,7]
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm14[0],ymm13[0],ymm14[1],ymm13[1],ymm14[2],ymm13[2],ymm14[3],ymm13[3],ymm14[8],ymm13[8],ymm14[9],ymm13[9],ymm14[10],ymm13[10],ymm14[11],ymm13[11]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [12,1,2,13,4,5,14,7]
; AVX512-FCP-NEXT: vpermi2d %ymm13, %ymm15, %ymm14
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm13 = [u,u,u,u,4,5,10,11,u,u,u,u,u,u,u,u,24,25,22,23,20,21,26,27,u,u,u,u,u,u,u,u]
-; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm11, %ymm11
-; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm9, %ymm9
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
-; AVX512-FCP-NEXT: vpsrldq {{.*#+}} ymm10 = ymm10[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm10[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512-FCP-NEXT: vpsrldq {{.*#+}} ymm8 = ymm8[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm8[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm8[0],ymm10[0],ymm8[1],ymm10[1],ymm8[2],ymm10[2],ymm8[3],ymm10[3],ymm8[8],ymm10[8],ymm8[9],ymm10[9],ymm8[10],ymm10[10],ymm8[11],ymm10[11]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [0,5,12,0,4,13,0,7]
-; AVX512-FCP-NEXT: vpermi2d %ymm8, %ymm9, %ymm10
-; AVX512-FCP-NEXT: vpshufd {{.*#+}} ymm7 = ymm7[1,2,2,3,5,6,6,7]
-; AVX512-FCP-NEXT: vpshufd {{.*#+}} ymm6 = ymm6[1,2,2,3,5,6,6,7]
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm6[0],ymm7[0],ymm6[1],ymm7[1],ymm6[2],ymm7[2],ymm6[3],ymm7[3],ymm6[8],ymm7[8],ymm6[9],ymm7[9],ymm6[10],ymm7[10],ymm6[11],ymm7[11]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [12,1,2,13,4,5,14,7]
-; AVX512-FCP-NEXT: vpermi2d %ymm6, %ymm10, %ymm7
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm14, %zmm7, %zmm6
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} xmm7 = [0,1,2,3,4,5,6,7,8,9,6,7,4,5,10,11]
-; AVX512-FCP-NEXT: vpshufb %xmm7, %xmm0, %xmm8
-; AVX512-FCP-NEXT: vpshufb %xmm7, %xmm1, %xmm7
-; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm8[4],xmm7[5],xmm8[5],xmm7[6],xmm8[6],xmm7[7],xmm8[7]
-; AVX512-FCP-NEXT: vpsrldq {{.*#+}} xmm8 = xmm2[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512-FCP-NEXT: vpsrldq {{.*#+}} xmm9 = xmm4[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,1,8,0,0,9,0,3]
-; AVX512-FCP-NEXT: vpermi2d %ymm8, %ymm7, %ymm9
-; AVX512-FCP-NEXT: vpshufd {{.*#+}} xmm7 = xmm3[1,2,2,3]
-; AVX512-FCP-NEXT: vpshufd {{.*#+}} xmm8 = xmm5[1,2,2,3]
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [8,1,2,9,4,5,10,7]
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm16 = [0,8,0,1,9,0,2,10]
+; AVX512-FCP-NEXT: vpermi2d %ymm13, %ymm15, %ymm16
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,1,8,3,4,9,6,7]
+; AVX512-FCP-NEXT: vpermi2d %ymm13, %ymm16, %ymm15
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [1,0,10,2,0,11,3,0]
+; AVX512-FCP-NEXT: vpermi2d %ymm7, %ymm8, %ymm9
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,9,2,3,10,5,6,11]
; AVX512-FCP-NEXT: vpermi2d %ymm7, %ymm9, %ymm8
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,8,0,1,9,0,2,10]
-; AVX512-FCP-NEXT: vpermi2d %ymm2, %ymm0, %ymm1
-; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
-; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,1,8,3,4,9,6,7]
-; AVX512-FCP-NEXT: vpermi2d %ymm0, %ymm1, %ymm2
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm8, %zmm2, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm6, 128(%rax)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm12, 64(%rax)
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15]
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm4[4],ymm5[4],ymm4[5],ymm5[5],ymm4[6],ymm5[6],ymm4[7],ymm5[7],ymm4[12],ymm5[12],ymm4[13],ymm5[13],ymm4[14],ymm5[14],ymm4[15],ymm5[15]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [5,0,14,6,0,15,7,0]
+; AVX512-FCP-NEXT: vpermi2d %ymm7, %ymm9, %ymm10
+; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm1[4],ymm3[4],ymm1[5],ymm3[5],ymm1[6],ymm3[6],ymm1[7],ymm3[7],ymm1[12],ymm3[12],ymm1[13],ymm3[13],ymm1[14],ymm3[14],ymm1[15],ymm3[15]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,13,2,3,14,5,6,15]
+; AVX512-FCP-NEXT: vpermi2d %ymm7, %ymm10, %ymm9
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm4[0],ymm5[0],ymm4[1],ymm5[1],ymm4[2],ymm5[2],ymm4[3],ymm5[3],ymm4[8],ymm5[8],ymm4[9],ymm5[9],ymm4[10],ymm5[10],ymm4[11],ymm5[11]
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,12,0,5,13,0,6,14]
+; AVX512-FCP-NEXT: vpermi2d %ymm4, %ymm0, %ymm2
+; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm1[0],ymm3[0],ymm1[1],ymm3[1],ymm1[2],ymm3[2],ymm1[3],ymm3[3],ymm1[8],ymm3[8],ymm1[9],ymm3[9],ymm1[10],ymm3[10],ymm1[11],ymm3[11]
+; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,1,12,3,4,13,6,7]
+; AVX512-FCP-NEXT: vpermi2d %ymm0, %ymm2, %ymm1
+; AVX512-FCP-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512-FCP-NEXT: vmovdqa64 %ymm9, 160(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm8, 64(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm15, (%rax)
+; AVX512-FCP-NEXT: vmovdqa64 %ymm14, 128(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm6, 32(%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride6_vf16:
; AVX512DQ: # %bb.0:
-; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: vmovdqa (%rdi), %ymm0
-; AVX512DQ-NEXT: vmovdqa (%rsi), %ymm2
-; AVX512DQ-NEXT: vmovdqa (%rdx), %ymm4
-; AVX512DQ-NEXT: vmovdqa (%rcx), %ymm5
-; AVX512DQ-NEXT: vmovdqa (%r8), %ymm1
-; AVX512DQ-NEXT: vmovdqa (%r9), %ymm3
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15]
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm4[4],ymm5[4],ymm4[5],ymm5[5],ymm4[6],ymm5[6],ymm4[7],ymm5[7],ymm4[12],ymm5[12],ymm4[13],ymm5[13],ymm4[14],ymm5[14],ymm4[15],ymm5[15]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm8 = [5,0,14,6,0,15,7,0]
-; AVX512DQ-NEXT: vpermi2d %ymm6, %ymm7, %ymm8
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm1[4],ymm3[4],ymm1[5],ymm3[5],ymm1[6],ymm3[6],ymm1[7],ymm3[7],ymm1[12],ymm3[12],ymm1[13],ymm3[13],ymm1[14],ymm3[14],ymm1[15],ymm3[15]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,13,2,3,14,5,6,15]
-; AVX512DQ-NEXT: vpermi2d %ymm6, %ymm8, %ymm7
-; AVX512DQ-NEXT: vpsrldq {{.*#+}} ymm6 = ymm5[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm5[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512DQ-NEXT: vpsrldq {{.*#+}} ymm8 = ymm4[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm4[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm8[0],ymm6[0],ymm8[1],ymm6[1],ymm8[2],ymm6[2],ymm8[3],ymm6[3],ymm8[8],ymm6[8],ymm8[9],ymm6[9],ymm8[10],ymm6[10],ymm8[11],ymm6[11]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm8 = ymm2[2,1,2,3,6,5,6,7]
-; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm8 = ymm8[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm9 = ymm0[2,1,2,3,6,5,6,7]
-; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm9 = ymm9[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,5,12,0,4,13,0,7]
-; AVX512DQ-NEXT: vpermi2d %ymm6, %ymm8, %ymm9
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm6 = ymm3[1,2,2,3,5,6,6,7]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm8 = ymm1[1,2,2,3,5,6,6,7]
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm8[0],ymm6[0],ymm8[1],ymm6[1],ymm8[2],ymm6[2],ymm8[3],ymm6[3],ymm8[8],ymm6[8],ymm8[9],ymm6[9],ymm8[10],ymm6[10],ymm8[11],ymm6[11]
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm6 = ymm6[2,2,2,3]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm6[0],ymm9[1,2],ymm6[3],ymm9[4,5],ymm6[6],ymm9[7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm7, %zmm6, %zmm16
+; AVX512DQ-NEXT: vmovdqa (%rsi), %ymm1
+; AVX512DQ-NEXT: vmovdqa (%rdx), %ymm2
+; AVX512DQ-NEXT: vmovdqa (%rcx), %ymm3
; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm6
+; AVX512DQ-NEXT: vpsrldq {{.*#+}} xmm4 = xmm6[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm7
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
-; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm8
+; AVX512DQ-NEXT: vpsrldq {{.*#+}} xmm5 = xmm7[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm9
+; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm4 = xmm9[0,1,2,1]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,7,6,5]
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm10
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm13 = [0,8,0,1,9,0,2,10]
-; AVX512DQ-NEXT: vpermi2d %ymm9, %ymm11, %ymm13
+; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm8 = xmm10[0,1,2,1]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm8 = xmm8[0,1,2,3,4,7,6,5]
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm4[4],xmm8[5],xmm4[5],xmm8[6],xmm4[6],xmm8[7],xmm4[7]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm4 = [0,1,8,0,0,9,0,3]
+; AVX512DQ-NEXT: vpermi2d %ymm5, %ymm8, %ymm4
+; AVX512DQ-NEXT: vpsrldq {{.*#+}} ymm5 = ymm3[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm3[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512DQ-NEXT: vpsrldq {{.*#+}} ymm8 = ymm2[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm2[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm8[0],ymm5[0],ymm8[1],ymm5[1],ymm8[2],ymm5[2],ymm8[3],ymm5[3],ymm8[8],ymm5[8],ymm8[9],ymm5[9],ymm8[10],ymm5[10],ymm8[11],ymm5[11]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm5 = ymm1[2,1,2,3,6,5,6,7]
+; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm5 = ymm5[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm11 = ymm0[2,1,2,3,6,5,6,7]
+; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm11 = ymm11[0,3,2,1,4,5,6,7,8,11,10,9,12,13,14,15]
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm11 = ymm11[0],ymm5[0],ymm11[1],ymm5[1],ymm11[2],ymm5[2],ymm11[3],ymm5[3],ymm11[8],ymm5[8],ymm11[9],ymm5[9],ymm11[10],ymm5[10],ymm11[11],ymm5[11]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm5 = [0,5,12,0,4,13,0,7]
+; AVX512DQ-NEXT: vpermi2d %ymm8, %ymm11, %ymm5
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,8,0,1,9,0,2,10]
+; AVX512DQ-NEXT: vpermi2d %ymm11, %ymm12, %ymm8
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
; AVX512DQ-NEXT: vmovdqa (%r9), %xmm9
-; AVX512DQ-NEXT: vmovdqa (%r8), %xmm11
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
-; AVX512DQ-NEXT: vpbroadcastq %xmm14, %ymm14
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm13 = ymm13[0,1],ymm14[2],ymm13[3,4],ymm14[5],ymm13[6,7]
-; AVX512DQ-NEXT: vpsrldq {{.*#+}} xmm14 = xmm6[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512DQ-NEXT: vpsrldq {{.*#+}} xmm15 = xmm7[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm15[0],xmm14[0],xmm15[1],xmm14[1],xmm15[2],xmm14[2],xmm15[3],xmm14[3]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm15 = xmm8[0,1,2,1]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm15 = xmm15[0,1,2,3,4,7,6,5]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm12 = xmm10[0,1,2,1]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} xmm12 = xmm12[0,1,2,3,4,7,6,5]
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm12 = xmm12[4],xmm15[4],xmm12[5],xmm15[5],xmm12[6],xmm15[6],xmm12[7],xmm15[7]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,1,8,0,0,9,0,3]
-; AVX512DQ-NEXT: vpermi2d %ymm14, %ymm12, %ymm15
-; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm12 = xmm9[1,2,2,3]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm14 = xmm11[1,2,2,3]
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm14[0],xmm12[0],xmm14[1],xmm12[1],xmm14[2],xmm12[2],xmm14[3],xmm12[3]
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm12 = ymm12[0,0,2,1]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm12 = ymm12[0],ymm15[1,2],ymm12[3],ymm15[4,5],ymm12[6],ymm15[7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm12, %zmm13, %zmm12
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm4[0],ymm5[0],ymm4[1],ymm5[1],ymm4[2],ymm5[2],ymm4[3],ymm5[3],ymm4[8],ymm5[8],ymm4[9],ymm5[9],ymm4[10],ymm5[10],ymm4[11],ymm5[11]
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,12,0,5,13,0,6,14]
-; AVX512DQ-NEXT: vpermi2d %ymm4, %ymm0, %ymm2
-; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm1[0],ymm3[0],ymm1[1],ymm3[1],ymm1[2],ymm3[2],ymm1[3],ymm3[3],ymm1[8],ymm3[8],ymm1[9],ymm3[9],ymm1[10],ymm3[10],ymm1[11],ymm3[11]
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,2,2]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm0[2],ymm2[3,4],ymm0[5],ymm2[6,7]
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm3 = [1,0,10,2,0,11,3,0]
-; AVX512DQ-NEXT: vpermi2d %ymm1, %ymm2, %ymm3
-; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm11[4],xmm9[4],xmm11[5],xmm9[5],xmm11[6],xmm9[6],xmm11[7],xmm9[7]
-; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,9,2,3,10,5,6,11]
-; AVX512DQ-NEXT: vpermi2d %ymm1, %ymm3, %ymm2
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512DQ-NEXT: vmovdqa64 %zmm12, (%rax)
-; AVX512DQ-NEXT: vmovdqa64 %zmm16, 128(%rax)
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm7 = xmm9[1,2,2,3]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm11 = [1,0,10,2,0,11,3,0]
+; AVX512DQ-NEXT: vpermi2d %ymm10, %ymm6, %ymm11
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm10 = ymm2[4],ymm3[4],ymm2[5],ymm3[5],ymm2[6],ymm3[6],ymm2[7],ymm3[7],ymm2[12],ymm3[12],ymm2[13],ymm3[13],ymm2[14],ymm3[14],ymm2[15],ymm3[15]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm12 = [5,0,14,6,0,15,7,0]
+; AVX512DQ-NEXT: vpermi2d %ymm6, %ymm10, %ymm12
+; AVX512DQ-NEXT: vmovdqa (%r8), %xmm6
+; AVX512DQ-NEXT: vpshufd {{.*#+}} xmm10 = xmm6[1,2,2,3]
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm10[0],xmm7[0],xmm10[1],xmm7[1],xmm10[2],xmm7[2],xmm10[3],xmm7[3]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,0,2,1]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0],ymm4[1,2],ymm7[3],ymm4[4,5],ymm7[6],ymm4[7]
+; AVX512DQ-NEXT: vmovdqa (%r8), %ymm7
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[8],ymm3[8],ymm2[9],ymm3[9],ymm2[10],ymm3[10],ymm2[11],ymm3[11]
+; AVX512DQ-NEXT: vmovdqa (%r9), %ymm3
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,12,0,5,13,0,6,14]
+; AVX512DQ-NEXT: vpermi2d %ymm2, %ymm0, %ymm1
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm0 = ymm3[1,2,2,3,5,6,6,7]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm2 = ymm7[1,2,2,3,5,6,6,7]
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,2,3]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm5[1,2],ymm0[3],ymm5[4,5],ymm0[6],ymm5[7]
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm6[0],xmm9[0],xmm6[1],xmm9[1],xmm6[2],xmm9[2],xmm6[3],xmm9[3]
+; AVX512DQ-NEXT: vpbroadcastq %xmm2, %ymm2
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm8[0,1],ymm2[2],ymm8[3,4],ymm2[5],ymm8[6,7]
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm6 = [0,9,2,3,10,5,6,11]
+; AVX512DQ-NEXT: vpermi2d %ymm5, %ymm11, %ymm6
+; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm7[4],ymm3[4],ymm7[5],ymm3[5],ymm7[6],ymm3[6],ymm7[7],ymm3[7],ymm7[12],ymm3[12],ymm7[13],ymm3[13],ymm7[14],ymm3[14],ymm7[15],ymm3[15]
+; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,13,2,3,14,5,6,15]
+; AVX512DQ-NEXT: vpermi2d %ymm5, %ymm12, %ymm8
+; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm7[0],ymm3[0],ymm7[1],ymm3[1],ymm7[2],ymm3[2],ymm7[3],ymm3[3],ymm7[8],ymm3[8],ymm7[9],ymm3[9],ymm7[10],ymm3[10],ymm7[11],ymm3[11]
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,2,2,2]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2],ymm1[3,4],ymm3[5],ymm1[6,7]
+; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
+; AVX512DQ-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm2, (%rax)
+; AVX512DQ-NEXT: vmovdqa64 %ymm0, 128(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512DQ-NEXT: vmovdqa64 %ymm8, 160(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm6, 64(%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride6_vf16:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %ymm9
-; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %ymm11
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %ymm8
-; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %ymm10
-; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %ymm6
-; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %ymm7
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm8[0],ymm10[0],ymm8[1],ymm10[1],ymm8[2],ymm10[2],ymm8[3],ymm10[3],ymm8[8],ymm10[8],ymm8[9],ymm10[9],ymm8[10],ymm10[10],ymm8[11],ymm10[11]
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,12,0,5,13,0,6,14]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm0, %ymm1, %ymm2
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm6[0],ymm7[0],ymm6[1],ymm7[1],ymm6[2],ymm7[2],ymm6[3],ymm7[3],ymm6[8],ymm7[8],ymm6[9],ymm7[9],ymm6[10],ymm7[10],ymm6[11],ymm7[11]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [0,1,12,3,4,13,6,7]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm0, %ymm2, %ymm12
-; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm0
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm2
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm4
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [1,0,10,2,0,11,3,0]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm3, %ymm5, %ymm13
-; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %xmm3
-; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm5
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,9,2,3,10,5,6,11]
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %ymm0
+; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %ymm2
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %ymm4
+; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %ymm5
+; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %ymm3
+; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm7
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm6 = [0,1,2,3,4,5,6,7,8,9,6,7,4,5,10,11]
+; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm7, %xmm9
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm8
+; AVX512DQ-FCP-NEXT: vpshufb %xmm6, %xmm8, %xmm6
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7]
+; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm9
+; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} xmm11 = xmm9[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm10
+; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} xmm12 = xmm10[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [0,1,8,0,0,9,0,3]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm11, %ymm6, %ymm13
+; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %xmm11
+; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,2,2,3]
+; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm12
+; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} xmm14 = xmm12[1,2,2,3]
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm14[0],xmm6[0],xmm14[1],xmm6[1],xmm14[2],xmm6[2],xmm14[3],xmm6[3]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [8,1,2,9,4,5,10,7]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm14, %ymm13, %ymm6
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm13 = [u,u,u,u,4,5,10,11,u,u,u,u,u,u,u,u,24,25,22,23,20,21,26,27,u,u,u,u,u,u,u,u]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm2, %ymm14
+; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm0, %ymm13
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
+; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} ymm14 = ymm5[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm5[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} ymm15 = ymm4[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm4[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm15[0],ymm14[0],ymm15[1],ymm14[1],ymm15[2],ymm14[2],ymm15[3],ymm14[3],ymm15[8],ymm14[8],ymm15[9],ymm14[9],ymm15[10],ymm14[10],ymm15[11],ymm14[11]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,5,12,0,4,13,0,7]
; AVX512DQ-FCP-NEXT: vpermi2d %ymm14, %ymm13, %ymm15
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm12, %zmm15, %zmm12
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm13 = ymm9[4],ymm11[4],ymm9[5],ymm11[5],ymm9[6],ymm11[6],ymm9[7],ymm11[7],ymm9[12],ymm11[12],ymm9[13],ymm11[13],ymm9[14],ymm11[14],ymm9[15],ymm11[15]
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm14 = ymm8[4],ymm10[4],ymm8[5],ymm10[5],ymm8[6],ymm10[6],ymm8[7],ymm10[7],ymm8[12],ymm10[12],ymm8[13],ymm10[13],ymm8[14],ymm10[14],ymm8[15],ymm10[15]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [5,0,14,6,0,15,7,0]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm13, %ymm14, %ymm15
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm13 = ymm6[4],ymm7[4],ymm6[5],ymm7[5],ymm6[6],ymm7[6],ymm6[7],ymm7[7],ymm6[12],ymm7[12],ymm6[13],ymm7[13],ymm6[14],ymm7[14],ymm6[15],ymm7[15]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [0,13,2,3,14,5,6,15]
+; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} ymm13 = ymm3[1,2,2,3,5,6,6,7]
+; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} ymm14 = ymm1[1,2,2,3,5,6,6,7]
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm14[0],ymm13[0],ymm14[1],ymm13[1],ymm14[2],ymm13[2],ymm14[3],ymm13[3],ymm14[8],ymm13[8],ymm14[9],ymm13[9],ymm14[10],ymm13[10],ymm14[11],ymm13[11]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [12,1,2,13,4,5,14,7]
; AVX512DQ-FCP-NEXT: vpermi2d %ymm13, %ymm15, %ymm14
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm13 = [u,u,u,u,4,5,10,11,u,u,u,u,u,u,u,u,24,25,22,23,20,21,26,27,u,u,u,u,u,u,u,u]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm11, %ymm11
-; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm9, %ymm9
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
-; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} ymm10 = ymm10[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm10[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} ymm8 = ymm8[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,ymm8[22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm8[0],ymm10[0],ymm8[1],ymm10[1],ymm8[2],ymm10[2],ymm8[3],ymm10[3],ymm8[8],ymm10[8],ymm8[9],ymm10[9],ymm8[10],ymm10[10],ymm8[11],ymm10[11]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [0,5,12,0,4,13,0,7]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm8, %ymm9, %ymm10
-; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} ymm7 = ymm7[1,2,2,3,5,6,6,7]
-; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} ymm6 = ymm6[1,2,2,3,5,6,6,7]
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm6[0],ymm7[0],ymm6[1],ymm7[1],ymm6[2],ymm7[2],ymm6[3],ymm7[3],ymm6[8],ymm7[8],ymm6[9],ymm7[9],ymm6[10],ymm7[10],ymm6[11],ymm7[11]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [12,1,2,13,4,5,14,7]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm6, %ymm10, %ymm7
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm14, %zmm7, %zmm6
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} xmm7 = [0,1,2,3,4,5,6,7,8,9,6,7,4,5,10,11]
-; AVX512DQ-FCP-NEXT: vpshufb %xmm7, %xmm0, %xmm8
-; AVX512DQ-FCP-NEXT: vpshufb %xmm7, %xmm1, %xmm7
-; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm8[4],xmm7[5],xmm8[5],xmm7[6],xmm8[6],xmm7[7],xmm8[7]
-; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} xmm8 = xmm2[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512DQ-FCP-NEXT: vpsrldq {{.*#+}} xmm9 = xmm4[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,1,8,0,0,9,0,3]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm8, %ymm7, %ymm9
-; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} xmm7 = xmm3[1,2,2,3]
-; AVX512DQ-FCP-NEXT: vpshufd {{.*#+}} xmm8 = xmm5[1,2,2,3]
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [8,1,2,9,4,5,10,7]
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm16 = [0,8,0,1,9,0,2,10]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm13, %ymm15, %ymm16
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [0,1,8,3,4,9,6,7]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm13, %ymm16, %ymm15
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [1,0,10,2,0,11,3,0]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm7, %ymm8, %ymm9
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,9,2,3,10,5,6,11]
; AVX512DQ-FCP-NEXT: vpermi2d %ymm7, %ymm9, %ymm8
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,8,0,1,9,0,2,10]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm2, %ymm0, %ymm1
-; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
-; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,1,8,3,4,9,6,7]
-; AVX512DQ-FCP-NEXT: vpermi2d %ymm0, %ymm1, %ymm2
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm8, %zmm2, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm6, 128(%rax)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm12, 64(%rax)
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15]
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm4[4],ymm5[4],ymm4[5],ymm5[5],ymm4[6],ymm5[6],ymm4[7],ymm5[7],ymm4[12],ymm5[12],ymm4[13],ymm5[13],ymm4[14],ymm5[14],ymm4[15],ymm5[15]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [5,0,14,6,0,15,7,0]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm7, %ymm9, %ymm10
+; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm1[4],ymm3[4],ymm1[5],ymm3[5],ymm1[6],ymm3[6],ymm1[7],ymm3[7],ymm1[12],ymm3[12],ymm1[13],ymm3[13],ymm1[14],ymm3[14],ymm1[15],ymm3[15]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,13,2,3,14,5,6,15]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm7, %ymm10, %ymm9
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm4[0],ymm5[0],ymm4[1],ymm5[1],ymm4[2],ymm5[2],ymm4[3],ymm5[3],ymm4[8],ymm5[8],ymm4[9],ymm5[9],ymm4[10],ymm5[10],ymm4[11],ymm5[11]
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,12,0,5,13,0,6,14]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm4, %ymm0, %ymm2
+; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm1[0],ymm3[0],ymm1[1],ymm3[1],ymm1[2],ymm3[2],ymm1[3],ymm3[3],ymm1[8],ymm3[8],ymm1[9],ymm3[9],ymm1[10],ymm3[10],ymm1[11],ymm3[11]
+; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,1,12,3,4,13,6,7]
+; AVX512DQ-FCP-NEXT: vpermi2d %ymm0, %ymm2, %ymm1
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa64 %ymm9, 160(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm8, 64(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm15, (%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa64 %ymm14, 128(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm6, 32(%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
index c3c1db749119f..cfd4b4808eb93 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
@@ -386,57 +386,56 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm7 = xmm3[0],xmm0[0]
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm6 = xmm3[0],xmm0[0]
; AVX-NEXT: vmovq {{.*#+}} xmm5 = mem[0],zero
-; AVX-NEXT: vmovq {{.*#+}} xmm6 = mem[0],zero
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm8 = xmm6[0],xmm5[0]
+; AVX-NEXT: vmovq {{.*#+}} xmm7 = mem[0],zero
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm8 = xmm7[0],xmm5[0]
; AVX-NEXT: vmovq {{.*#+}} xmm9 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm10 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm11 = xmm10[0],xmm9[0]
; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm11[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm12[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm12[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm8[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm15 = xmm14[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm15 = xmm14[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm15[0],xmm13[0],xmm15[1],xmm13[1]
-; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm7[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm15[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm6[3,1,2,3]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm15[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm4[3,1,2,3]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm0[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm0[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm13[4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm12[0,1,2,0,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm14[0,1,2,0,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm12[0,1,3,1,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm14[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm12[0],xmm2[0],xmm12[1],xmm2[1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm15[2,0,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,0,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm15[3,1,2,3,4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[3,1,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm11[0],xmm1[1,2,3],xmm11[4],xmm1[5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm8[0],xmm1[1,2,3],xmm8[4],xmm1[5,6,7]
-; AVX-NEXT: vpackusdw %xmm2, %xmm8, %xmm2
-; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0],xmm1[1,2,3],xmm7[4],xmm1[5,6,7]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0],xmm1[1,2,3],xmm4[4],xmm1[5,6,7]
-; AVX-NEXT: vpackusdw %xmm7, %xmm1, %xmm1
-; AVX-NEXT: vpackusdw %xmm2, %xmm1, %xmm1
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
+; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm11[0],xmm2[1,2,3],xmm11[4],xmm2[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm8[0],xmm2[1,2,3],xmm8[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm11, %xmm8, %xmm8
+; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0],xmm2[1,2,3],xmm6[4],xmm2[5,6,7]
+; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm2[1,2,3],xmm4[4],xmm2[5,6,7]
+; AVX-NEXT: vpackusdw %xmm6, %xmm2, %xmm2
+; AVX-NEXT: vpackusdw %xmm8, %xmm2, %xmm2
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; AVX-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm3, %xmm3 # 16-byte Folded Reload
; AVX-NEXT: # xmm3 = xmm3[0],mem[0],xmm3[1],mem[1]
-; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
-; AVX-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
-; AVX-NEXT: # xmm4 = xmm4[0],mem[0],xmm4[1],mem[1]
+; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; AVX-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm5 # 16-byte Folded Reload
+; AVX-NEXT: # xmm5 = xmm5[0],mem[0],xmm5[1],mem[1]
; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[1,3,2,3,4,5,6,7]
-; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
-; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm5 = xmm5[1,3,2,3,4,5,6,7]
+; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3],xmm4[4,5,6,7]
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
-; AVX-NEXT: vmovdqa %xmm2, 16(%rax)
-; AVX-NEXT: vmovdqa %xmm1, (%rax)
-; AVX-NEXT: vmovaps %ymm0, 32(%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm3, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm2, (%rax)
+; AVX-NEXT: vmovdqa %xmm0, 48(%rax)
+; AVX-NEXT: vmovdqa %xmm1, 32(%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf4:
@@ -589,33 +588,33 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm4
-; AVX512-NEXT: vpshufd {{.*#+}} ymm5 = ymm4[0,1,1,3,4,5,5,7]
-; AVX512-NEXT: vpshufhw {{.*#+}} ymm5 = ymm5[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm5 = ymm4[0,1,2,0,4,5,6,4]
+; AVX512-NEXT: vpshufhw {{.*#+}} ymm5 = ymm5[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
; AVX512-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
-; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm2[0,1,1,3,4,5,5,7]
-; AVX512-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm2[0,1,2,0,4,5,6,4]
+; AVX512-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2],ymm5[3],ymm3[4,5],ymm5[6],ymm3[7]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm5
-; AVX512-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[3,1,2,3,7,5,6,7]
-; AVX512-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[0,2,2,3,4,6,6,7]
+; AVX512-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
-; AVX512-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[3,1,2,3,7,5,6,7]
-; AVX512-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[0,2,2,3,4,6,6,7]
+; AVX512-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm6[1],ymm1[2,3],ymm6[4],ymm1[5,6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2,3],ymm1[4,5],ymm3[6,7]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm4[0,1,2,0,4,5,6,4]
-; AVX512-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,1,2,0,4,5,6,4]
-; AVX512-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm4[0,1,1,3,4,5,5,7]
+; AVX512-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,1,1,3,4,5,5,7]
+; AVX512-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5],ymm3[6],ymm2[7]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[0,2,2,3,4,6,6,7]
-; AVX512-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
-; AVX512-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
-; AVX512-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[3,1,2,3,7,5,6,7]
+; AVX512-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
+; AVX512-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,1,2,3,7,5,6,7]
+; AVX512-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3],ymm3[4],ymm0[5,6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm0, (%rax)
+; AVX512-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512-NEXT: vmovdqa %ymm1, (%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -636,7 +635,7 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [1,3,9,11,1,3,9,11]
+; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [0,2,8,10,0,2,8,10]
; AVX512-FCP-NEXT: # ymm4 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vmovdqa %ymm2, %ymm5
; AVX512-FCP-NEXT: vpermt2d %ymm3, %ymm4, %ymm5
@@ -646,15 +645,15 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm4, %ymm4
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm5[2,3],ymm4[4,5],ymm5[6,7]
-; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,2,8,10,0,2,8,10]
+; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [1,3,9,11,1,3,9,11]
; AVX512-FCP-NEXT: # ymm5 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vpermt2d %ymm3, %ymm5, %ymm2
; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm2, %ymm2
; AVX512-FCP-NEXT: vpermt2d %ymm1, %ymm5, %ymm0
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm0, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm4, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -676,33 +675,33 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512DQ-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm4
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm5 = ymm4[0,1,1,3,4,5,5,7]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm5 = ymm5[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm5 = ymm4[0,1,2,0,4,5,6,4]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm5 = ymm5[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
; AVX512DQ-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm2[0,1,1,3,4,5,5,7]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm2[0,1,2,0,4,5,6,4]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2],ymm5[3],ymm3[4,5],ymm5[6],ymm3[7]
; AVX512DQ-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm5
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[3,1,2,3,7,5,6,7]
-; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[0,2,2,3,4,6,6,7]
+; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
; AVX512DQ-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[3,1,2,3,7,5,6,7]
-; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[0,2,2,3,4,6,6,7]
+; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm6[1],ymm1[2,3],ymm6[4],ymm1[5,6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2,3],ymm1[4,5],ymm3[6,7]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm4[0,1,2,0,4,5,6,4]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,1,2,0,4,5,6,4]
-; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm4[0,1,1,3,4,5,5,7]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,1,1,3,4,5,5,7]
+; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5],ymm3[6],ymm2[7]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[0,2,2,3,4,6,6,7]
-; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
-; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
-; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[3,1,2,3,7,5,6,7]
+; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
+; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,1,2,3,7,5,6,7]
+; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3],ymm3[4],ymm0[5,6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm0, (%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm1, (%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -723,7 +722,7 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [1,3,9,11,1,3,9,11]
+; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [0,2,8,10,0,2,8,10]
; AVX512DQ-FCP-NEXT: # ymm4 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vmovdqa %ymm2, %ymm5
; AVX512DQ-FCP-NEXT: vpermt2d %ymm3, %ymm4, %ymm5
@@ -733,15 +732,15 @@ define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm4, %ymm4
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm5[2,3],ymm4[4,5],ymm5[6,7]
-; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,2,8,10,0,2,8,10]
+; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [1,3,9,11,1,3,9,11]
; AVX512DQ-FCP-NEXT: # ymm5 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vpermt2d %ymm3, %ymm5, %ymm2
; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vpermt2d %ymm1, %ymm5, %ymm0
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm0, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm4, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
@@ -1209,62 +1208,62 @@ define void @store_i16_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512-NEXT: vmovdqa (%r8), %xmm3
-; AVX512-NEXT: vmovdqa (%r11), %xmm0
-; AVX512-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
-; AVX512-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
+; AVX512-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512-NEXT: vmovdqa (%r8), %xmm2
+; AVX512-NEXT: vmovdqa (%r11), %xmm3
+; AVX512-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
+; AVX512-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX512-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
-; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
+; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
-; AVX512-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
-; AVX512-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
-; AVX512-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
+; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm14 = [151519488,0,185205506,0]
+; AVX512-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm6[2,3],ymm0[4,5],ymm6[6,7]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
+; AVX512-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm11 = [0,218891524,0,252577542]
+; AVX512-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
-; AVX512-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
+; AVX512-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512-NEXT: vpblendd {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7]
+; AVX512-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7]
; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1],ymm0[2,3],ymm6[4,5],ymm0[6,7]
-; AVX512-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7]
-; AVX512-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2,3],ymm1[4,5],ymm3[6,7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512-NEXT: vpblendd {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1],ymm5[2,3],ymm8[4,5],ymm5[6,7]
+; AVX512-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
+; AVX512-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3],ymm1[4,5],ymm2[6,7]
+; AVX512-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512-NEXT: vmovdqa %ymm0, (%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -1273,62 +1272,62 @@ define void @store_i16_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm3
-; AVX512-FCP-NEXT: vmovdqa (%r11), %xmm0
-; AVX512-FCP-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
-; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
+; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm2
+; AVX512-FCP-NEXT: vmovdqa (%r11), %xmm3
+; AVX512-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
-; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
+; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
-; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
-; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
+; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [151519488,0,185205506,0]
+; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm6[2,3],ymm0[4,5],ymm6[6,7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
+; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm11 = [0,218891524,0,252577542]
+; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
-; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
+; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1],ymm0[2,3],ymm6[4,5],ymm0[6,7]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7]
-; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2,3],ymm1[4,5],ymm3[6,7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1],ymm5[2,3],ymm8[4,5],ymm5[6,7]
+; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
+; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3],ymm1[4,5],ymm2[6,7]
+; AVX512-FCP-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -1337,62 +1336,62 @@ define void @store_i16_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512DQ-NEXT: vmovdqa (%r8), %xmm3
-; AVX512DQ-NEXT: vmovdqa (%r11), %xmm0
-; AVX512DQ-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
-; AVX512DQ-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
+; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512DQ-NEXT: vmovdqa (%r8), %xmm2
+; AVX512DQ-NEXT: vmovdqa (%r11), %xmm3
+; AVX512DQ-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX512DQ-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
-; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
+; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512DQ-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
-; AVX512DQ-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
-; AVX512DQ-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
+; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm14 = [151519488,0,185205506,0]
+; AVX512DQ-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm6[2,3],ymm0[4,5],ymm6[6,7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
+; AVX512DQ-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm11 = [0,218891524,0,252577542]
+; AVX512DQ-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512DQ-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
-; AVX512DQ-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
+; AVX512DQ-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512DQ-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1],ymm0[2,3],ymm6[4,5],ymm0[6,7]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512DQ-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7]
-; AVX512DQ-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512DQ-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2,3],ymm1[4,5],ymm3[6,7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512DQ-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512DQ-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512DQ-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1],ymm5[2,3],ymm8[4,5],ymm5[6,7]
+; AVX512DQ-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512DQ-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
+; AVX512DQ-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512DQ-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3],ymm1[4,5],ymm2[6,7]
+; AVX512DQ-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm0, (%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1401,62 +1400,62 @@ define void @store_i16_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm3
-; AVX512DQ-FCP-NEXT: vmovdqa (%r11), %xmm0
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm2
+; AVX512DQ-FCP-NEXT: vmovdqa (%r11), %xmm3
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [151519488,0,185205506,0]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm6[2,3],ymm0[4,5],ymm6[6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm11 = [0,218891524,0,252577542]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0,1],ymm0[2,3],ymm6[4,5],ymm0[6,7]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm3[2,3],ymm1[4,5],ymm3[6,7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0,1],ymm5[2,3],ymm8[4,5],ymm5[6,7]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3],ymm1[4,5],ymm2[6,7]
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
index baa958470dda6..dd28df0be5348 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
@@ -49,15 +49,14 @@ define void @store_i32_stride5_vf2(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovlhps {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero
; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
+; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
+; AVX-NEXT: vblendps {{.*#+}} xmm3 = xmm3[0],xmm5[1],xmm3[2,3]
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm4[1,1],xmm0[1,1]
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,0]
; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm5[0],xmm0[1,2,3]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
-; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm3[3,3,3,3]
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm5[1],xmm1[2,3]
-; AVX-NEXT: vmovlps %xmm1, 32(%r9)
-; AVX-NEXT: vmovaps %ymm0, (%r9)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovaps %xmm2, (%r9)
+; AVX-NEXT: vmovaps %xmm0, 16(%r9)
+; AVX-NEXT: vmovlps %xmm3, 32(%r9)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i32_stride5_vf2:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
index c191319aea6ab..7222dcf809ac9 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
@@ -52,13 +52,12 @@ define void @store_i32_stride6_vf2(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
; AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero
; AVX-NEXT: vmovlhps {{.*#+}} xmm2 = xmm3[0],xmm2[0]
-; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm2[0,2],xmm0[1,3]
-; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
-; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,3],xmm2[1,3]
-; AVX-NEXT: vmovaps %xmm1, 32(%rax)
-; AVX-NEXT: vmovaps %ymm0, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm1[1,3],xmm2[1,3]
+; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,2],xmm1[0,2]
+; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm2[0,2],xmm0[1,3]
+; AVX-NEXT: vmovaps %xmm0, 16(%rax)
+; AVX-NEXT: vmovaps %xmm1, (%rax)
+; AVX-NEXT: vmovaps %xmm3, 32(%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i32_stride6_vf2:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
index 935d874f337a3..7d85b775d694f 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
@@ -427,42 +427,42 @@ define void @store_i32_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX-NEXT: vmovaps (%rdi), %xmm2
-; AVX-NEXT: vmovaps (%rsi), %xmm3
-; AVX-NEXT: vmovaps (%rdx), %xmm0
-; AVX-NEXT: vmovaps (%rcx), %xmm1
+; AVX-NEXT: vmovaps (%rdi), %xmm0
+; AVX-NEXT: vmovaps (%rsi), %xmm1
+; AVX-NEXT: vmovaps (%rdx), %xmm2
+; AVX-NEXT: vmovaps (%rcx), %xmm3
; AVX-NEXT: vmovaps (%r8), %xmm4
; AVX-NEXT: vmovaps (%r9), %xmm5
; AVX-NEXT: vmovaps (%r11), %xmm6
; AVX-NEXT: vmovaps (%r10), %xmm7
; AVX-NEXT: vunpcklps {{.*#+}} xmm8 = xmm6[0],xmm7[0],xmm6[1],xmm7[1]
-; AVX-NEXT: vunpcklps {{.*#+}} xmm9 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; AVX-NEXT: vunpcklps {{.*#+}} xmm9 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm9, %ymm10
-; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm11
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm12
+; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm1, %ymm11
+; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm12
; AVX-NEXT: vmovshdup {{.*#+}} ymm12 = ymm12[1,1,3,3,5,5,7,7]
; AVX-NEXT: vblendps {{.*#+}} ymm11 = ymm12[0],ymm11[1],ymm12[2,3,4],ymm11[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm11[0,1],ymm10[2,3],ymm11[4,5],ymm10[6,7]
; AVX-NEXT: vunpckhps {{.*#+}} xmm11 = xmm4[2],xmm5[2],xmm4[3],xmm5[3]
-; AVX-NEXT: vunpckhps {{.*#+}} xmm12 = xmm2[2],xmm3[2],xmm2[3],xmm3[3]
+; AVX-NEXT: vunpckhps {{.*#+}} xmm12 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm13
-; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm0, %ymm14
-; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm1, %ymm15
+; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm2, %ymm14
+; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm3, %ymm15
; AVX-NEXT: vmovsldup {{.*#+}} ymm15 = ymm15[0,0,2,2,4,4,6,6]
; AVX-NEXT: vblendps {{.*#+}} ymm14 = ymm14[0,1,2],ymm15[3],ymm14[4,5,6],ymm15[7]
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm13[0,1],ymm14[2,3],ymm13[4,5],ymm14[6,7]
-; AVX-NEXT: vunpcklps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
-; AVX-NEXT: vmovlhps {{.*#+}} xmm4 = xmm4[0],xmm8[0]
-; AVX-NEXT: vunpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; AVX-NEXT: vmovlhps {{.*#+}} xmm2 = xmm2[0],xmm9[0]
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
-; AVX-NEXT: vunpckhps {{.*#+}} xmm3 = xmm6[2],xmm7[2],xmm6[3],xmm7[3]
-; AVX-NEXT: vunpckhpd {{.*#+}} xmm3 = xmm11[1],xmm3[1]
-; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm12[1],xmm0[1]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
-; AVX-NEXT: vmovaps %ymm0, 96(%rax)
-; AVX-NEXT: vmovaps %ymm2, (%rax)
+; AVX-NEXT: vunpckhps {{.*#+}} xmm6 = xmm6[2],xmm7[2],xmm6[3],xmm7[3]
+; AVX-NEXT: vunpckhpd {{.*#+}} xmm6 = xmm11[1],xmm6[1]
+; AVX-NEXT: vunpckhps {{.*#+}} xmm2 = xmm2[2],xmm3[2],xmm2[3],xmm3[3]
+; AVX-NEXT: vunpckhpd {{.*#+}} xmm2 = xmm12[1],xmm2[1]
+; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm9[0]
+; AVX-NEXT: vunpcklps {{.*#+}} xmm1 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
+; AVX-NEXT: vmovlhps {{.*#+}} xmm1 = xmm1[0],xmm8[0]
+; AVX-NEXT: vmovaps %xmm1, 16(%rax)
+; AVX-NEXT: vmovaps %xmm0, (%rax)
+; AVX-NEXT: vmovaps %xmm2, 96(%rax)
+; AVX-NEXT: vmovaps %xmm6, 112(%rax)
; AVX-NEXT: vmovaps %ymm13, 64(%rax)
; AVX-NEXT: vmovaps %ymm10, 32(%rax)
; AVX-NEXT: vzeroupper
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
index faf9815cc6bea..853c3b26bbce2 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
@@ -881,35 +881,34 @@ define void @store_i8_stride4_vf32(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovdqa 16(%rsi), %xmm1
; AVX-NEXT: vmovdqa (%rdi), %xmm2
; AVX-NEXT: vmovdqa 16(%rdi), %xmm3
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm5 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm5 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
; AVX-NEXT: vmovdqa (%rcx), %xmm2
; AVX-NEXT: vmovdqa 16(%rcx), %xmm3
; AVX-NEXT: vmovdqa (%rdx), %xmm6
; AVX-NEXT: vmovdqa 16(%rdx), %xmm7
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3],xmm6[4],xmm2[4],xmm6[5],xmm2[5],xmm6[6],xmm2[6],xmm6[7],xmm2[7]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm6[8],xmm2[8],xmm6[9],xmm2[9],xmm6[10],xmm2[10],xmm6[11],xmm2[11],xmm6[12],xmm2[12],xmm6[13],xmm2[13],xmm6[14],xmm2[14],xmm6[15],xmm2[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3],xmm6[4],xmm2[4],xmm6[5],xmm2[5],xmm6[6],xmm2[6],xmm6[7],xmm2[7]
; AVX-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm7[8],xmm3[8],xmm7[9],xmm3[9],xmm7[10],xmm3[10],xmm7[11],xmm3[11],xmm7[12],xmm3[12],xmm7[13],xmm3[13],xmm7[14],xmm3[14],xmm7[15],xmm3[15]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm6[8],xmm2[8],xmm6[9],xmm2[9],xmm6[10],xmm2[10],xmm6[11],xmm2[11],xmm6[12],xmm2[12],xmm6[13],xmm2[13],xmm6[14],xmm2[14],xmm6[15],xmm2[15]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm4[0],xmm8[0],xmm4[1],xmm8[1],xmm4[2],xmm8[2],xmm4[3],xmm8[3]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm8[4],xmm4[5],xmm8[5],xmm4[6],xmm8[6],xmm4[7],xmm8[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm7, %ymm2
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm9, %ymm0
-; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm3
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm8, %ymm1
-; AVX-NEXT: vmovaps %ymm2, (%r8)
-; AVX-NEXT: vmovaps %ymm1, 96(%r8)
-; AVX-NEXT: vmovaps %ymm3, 64(%r8)
-; AVX-NEXT: vmovaps %ymm0, 32(%r8)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; AVX-NEXT: vmovdqa %xmm7, 64(%r8)
+; AVX-NEXT: vmovdqa %xmm4, 80(%r8)
+; AVX-NEXT: vmovdqa %xmm6, (%r8)
+; AVX-NEXT: vmovdqa %xmm5, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm1, 112(%r8)
+; AVX-NEXT: vmovdqa %xmm9, 96(%r8)
+; AVX-NEXT: vmovdqa %xmm0, 48(%r8)
+; AVX-NEXT: vmovdqa %xmm8, 32(%r8)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i8_stride4_vf32:
@@ -1288,70 +1287,69 @@ define void @store_i8_stride4_vf64(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovdqa 32(%rsi), %xmm2
; AVX-NEXT: vmovdqa 48(%rsi), %xmm4
; AVX-NEXT: vmovdqa (%rdi), %xmm6
-; AVX-NEXT: vmovdqa 16(%rdi), %xmm8
-; AVX-NEXT: vmovdqa 32(%rdi), %xmm9
-; AVX-NEXT: vmovdqa 48(%rdi), %xmm10
+; AVX-NEXT: vmovdqa 16(%rdi), %xmm7
+; AVX-NEXT: vmovdqa 32(%rdi), %xmm8
+; AVX-NEXT: vmovdqa 48(%rdi), %xmm9
; AVX-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm6[0],xmm0[0],xmm6[1],xmm0[1],xmm6[2],xmm0[2],xmm6[3],xmm0[3],xmm6[4],xmm0[4],xmm6[5],xmm0[5],xmm6[6],xmm0[6],xmm6[7],xmm0[7]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm5 = xmm8[0],xmm1[0],xmm8[1],xmm1[1],xmm8[2],xmm1[2],xmm8[3],xmm1[3],xmm8[4],xmm1[4],xmm8[5],xmm1[5],xmm8[6],xmm1[6],xmm8[7],xmm1[7]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm7 = xmm9[0],xmm2[0],xmm9[1],xmm2[1],xmm9[2],xmm2[2],xmm9[3],xmm2[3],xmm9[4],xmm2[4],xmm9[5],xmm2[5],xmm9[6],xmm2[6],xmm9[7],xmm2[7]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm11 = xmm10[0],xmm4[0],xmm10[1],xmm4[1],xmm10[2],xmm4[2],xmm10[3],xmm4[3],xmm10[4],xmm4[4],xmm10[5],xmm4[5],xmm10[6],xmm4[6],xmm10[7],xmm4[7]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm5 = xmm7[0],xmm1[0],xmm7[1],xmm1[1],xmm7[2],xmm1[2],xmm7[3],xmm1[3],xmm7[4],xmm1[4],xmm7[5],xmm1[5],xmm7[6],xmm1[6],xmm7[7],xmm1[7]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm10 = xmm8[0],xmm2[0],xmm8[1],xmm2[1],xmm8[2],xmm2[2],xmm8[3],xmm2[3],xmm8[4],xmm2[4],xmm8[5],xmm2[5],xmm8[6],xmm2[6],xmm8[7],xmm2[7]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm11 = xmm9[0],xmm4[0],xmm9[1],xmm4[1],xmm9[2],xmm4[2],xmm9[3],xmm4[3],xmm9[4],xmm4[4],xmm9[5],xmm4[5],xmm9[6],xmm4[6],xmm9[7],xmm4[7]
; AVX-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm6[8],xmm0[8],xmm6[9],xmm0[9],xmm6[10],xmm0[10],xmm6[11],xmm0[11],xmm6[12],xmm0[12],xmm6[13],xmm0[13],xmm6[14],xmm0[14],xmm6[15],xmm0[15]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm8[8],xmm1[8],xmm8[9],xmm1[9],xmm8[10],xmm1[10],xmm8[11],xmm1[11],xmm8[12],xmm1[12],xmm8[13],xmm1[13],xmm8[14],xmm1[14],xmm8[15],xmm1[15]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm9[8],xmm2[8],xmm9[9],xmm2[9],xmm9[10],xmm2[10],xmm9[11],xmm2[11],xmm9[12],xmm2[12],xmm9[13],xmm2[13],xmm9[14],xmm2[14],xmm9[15],xmm2[15]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm10[8],xmm4[8],xmm10[9],xmm4[9],xmm10[10],xmm4[10],xmm10[11],xmm4[11],xmm10[12],xmm4[12],xmm10[13],xmm4[13],xmm10[14],xmm4[14],xmm10[15],xmm4[15]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm7[8],xmm1[8],xmm7[9],xmm1[9],xmm7[10],xmm1[10],xmm7[11],xmm1[11],xmm7[12],xmm1[12],xmm7[13],xmm1[13],xmm7[14],xmm1[14],xmm7[15],xmm1[15]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm8[8],xmm2[8],xmm8[9],xmm2[9],xmm8[10],xmm2[10],xmm8[11],xmm2[11],xmm8[12],xmm2[12],xmm8[13],xmm2[13],xmm8[14],xmm2[14],xmm8[15],xmm2[15]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm9[8],xmm4[8],xmm9[9],xmm4[9],xmm9[10],xmm4[10],xmm9[11],xmm4[11],xmm9[12],xmm4[12],xmm9[13],xmm4[13],xmm9[14],xmm4[14],xmm9[15],xmm4[15]
; AVX-NEXT: vmovdqa (%rcx), %xmm6
-; AVX-NEXT: vmovdqa 16(%rcx), %xmm9
-; AVX-NEXT: vmovdqa 32(%rcx), %xmm10
-; AVX-NEXT: vmovdqa 48(%rcx), %xmm12
-; AVX-NEXT: vmovdqa (%rdx), %xmm8
+; AVX-NEXT: vmovdqa 16(%rcx), %xmm7
+; AVX-NEXT: vmovdqa 32(%rcx), %xmm8
+; AVX-NEXT: vmovdqa 48(%rcx), %xmm9
+; AVX-NEXT: vmovdqa (%rdx), %xmm12
; AVX-NEXT: vmovdqa 16(%rdx), %xmm13
; AVX-NEXT: vmovdqa 32(%rdx), %xmm14
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm15 = xmm8[0],xmm6[0],xmm8[1],xmm6[1],xmm8[2],xmm6[2],xmm8[3],xmm6[3],xmm8[4],xmm6[4],xmm8[5],xmm6[5],xmm8[6],xmm6[6],xmm8[7],xmm6[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm8 = xmm8[8],xmm6[8],xmm8[9],xmm6[9],xmm8[10],xmm6[10],xmm8[11],xmm6[11],xmm8[12],xmm6[12],xmm8[13],xmm6[13],xmm8[14],xmm6[14],xmm8[15],xmm6[15]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm6 = xmm13[0],xmm9[0],xmm13[1],xmm9[1],xmm13[2],xmm9[2],xmm13[3],xmm9[3],xmm13[4],xmm9[4],xmm13[5],xmm9[5],xmm13[6],xmm9[6],xmm13[7],xmm9[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm13 = xmm13[8],xmm9[8],xmm13[9],xmm9[9],xmm13[10],xmm9[10],xmm13[11],xmm9[11],xmm13[12],xmm9[12],xmm13[13],xmm9[13],xmm13[14],xmm9[14],xmm13[15],xmm9[15]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm14[0],xmm10[0],xmm14[1],xmm10[1],xmm14[2],xmm10[2],xmm14[3],xmm10[3],xmm14[4],xmm10[4],xmm14[5],xmm10[5],xmm14[6],xmm10[6],xmm14[7],xmm10[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm14 = xmm14[8],xmm10[8],xmm14[9],xmm10[9],xmm14[10],xmm10[10],xmm14[11],xmm10[11],xmm14[12],xmm10[12],xmm14[13],xmm10[13],xmm14[14],xmm10[14],xmm14[15],xmm10[15]
-; AVX-NEXT: vmovdqa 48(%rdx), %xmm10
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3],xmm10[4],xmm12[4],xmm10[5],xmm12[5],xmm10[6],xmm12[6],xmm10[7],xmm12[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm12 = xmm10[8],xmm12[8],xmm10[9],xmm12[9],xmm10[10],xmm12[10],xmm10[11],xmm12[11],xmm10[12],xmm12[12],xmm10[13],xmm12[13],xmm10[14],xmm12[14],xmm10[15],xmm12[15]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm11[0],xmm0[0],xmm11[1],xmm0[1],xmm11[2],xmm0[2],xmm11[3],xmm0[3]
-; AVX-NEXT: vmovdqu %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm11[4],xmm0[4],xmm11[5],xmm0[5],xmm11[6],xmm0[6],xmm11[7],xmm0[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm9[0],xmm7[1],xmm9[1],xmm7[2],xmm9[2],xmm7[3],xmm9[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm9[4],xmm7[5],xmm9[5],xmm7[6],xmm9[6],xmm7[7],xmm9[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm3[0],xmm15[0],xmm3[1],xmm15[1],xmm3[2],xmm15[2],xmm3[3],xmm15[3]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm15 = xmm12[0],xmm6[0],xmm12[1],xmm6[1],xmm12[2],xmm6[2],xmm12[3],xmm6[3],xmm12[4],xmm6[4],xmm12[5],xmm6[5],xmm12[6],xmm6[6],xmm12[7],xmm6[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm6 = xmm12[8],xmm6[8],xmm12[9],xmm6[9],xmm12[10],xmm6[10],xmm12[11],xmm6[11],xmm12[12],xmm6[12],xmm12[13],xmm6[13],xmm12[14],xmm6[14],xmm12[15],xmm6[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm12 = xmm13[0],xmm7[0],xmm13[1],xmm7[1],xmm13[2],xmm7[2],xmm13[3],xmm7[3],xmm13[4],xmm7[4],xmm13[5],xmm7[5],xmm13[6],xmm7[6],xmm13[7],xmm7[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm7 = xmm13[8],xmm7[8],xmm13[9],xmm7[9],xmm13[10],xmm7[10],xmm13[11],xmm7[11],xmm13[12],xmm7[12],xmm13[13],xmm7[13],xmm13[14],xmm7[14],xmm13[15],xmm7[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm13 = xmm14[0],xmm8[0],xmm14[1],xmm8[1],xmm14[2],xmm8[2],xmm14[3],xmm8[3],xmm14[4],xmm8[4],xmm14[5],xmm8[5],xmm14[6],xmm8[6],xmm14[7],xmm8[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm8 = xmm14[8],xmm8[8],xmm14[9],xmm8[9],xmm14[10],xmm8[10],xmm14[11],xmm8[11],xmm14[12],xmm8[12],xmm14[13],xmm8[13],xmm14[14],xmm8[14],xmm14[15],xmm8[15]
+; AVX-NEXT: vmovdqa 48(%rdx), %xmm14
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm14[0],xmm9[0],xmm14[1],xmm9[1],xmm14[2],xmm9[2],xmm14[3],xmm9[3],xmm14[4],xmm9[4],xmm14[5],xmm9[5],xmm14[6],xmm9[6],xmm14[7],xmm9[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm9 = xmm14[8],xmm9[8],xmm14[9],xmm9[9],xmm14[10],xmm9[10],xmm14[11],xmm9[11],xmm14[12],xmm9[12],xmm14[13],xmm9[13],xmm14[14],xmm9[14],xmm14[15],xmm9[15]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm11[0],xmm0[0],xmm11[1],xmm0[1],xmm11[2],xmm0[2],xmm11[3],xmm0[3]
+; AVX-NEXT: vmovdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm11[4],xmm0[4],xmm11[5],xmm0[5],xmm11[6],xmm0[6],xmm11[7],xmm0[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm10[0],xmm13[0],xmm10[1],xmm13[1],xmm10[2],xmm13[2],xmm10[3],xmm13[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm10[4],xmm13[4],xmm10[5],xmm13[5],xmm10[6],xmm13[6],xmm10[7],xmm13[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm5[0],xmm12[0],xmm5[1],xmm12[1],xmm5[2],xmm12[2],xmm5[3],xmm12[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm5[4],xmm12[4],xmm5[5],xmm12[5],xmm5[6],xmm12[6],xmm5[7],xmm12[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm3[0],xmm15[0],xmm3[1],xmm15[1],xmm3[2],xmm15[2],xmm3[3],xmm15[3]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm3[4],xmm15[4],xmm3[5],xmm15[5],xmm3[6],xmm15[6],xmm3[7],xmm15[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm4[0],xmm12[0],xmm4[1],xmm12[1],xmm4[2],xmm12[2],xmm4[3],xmm12[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm12[4],xmm4[5],xmm12[5],xmm4[6],xmm12[6],xmm4[7],xmm12[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm2[0],xmm14[0],xmm2[1],xmm14[1],xmm2[2],xmm14[2],xmm2[3],xmm14[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm14[4],xmm2[5],xmm14[5],xmm2[6],xmm14[6],xmm2[7],xmm14[7]
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm1[0],xmm13[0],xmm1[1],xmm13[1],xmm1[2],xmm13[2],xmm1[3],xmm13[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm13[4],xmm1[5],xmm13[5],xmm1[6],xmm13[6],xmm1[7],xmm13[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm4[0],xmm9[0],xmm4[1],xmm9[1],xmm4[2],xmm9[2],xmm4[3],xmm9[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm9[4],xmm4[5],xmm9[5],xmm4[6],xmm9[6],xmm4[7],xmm9[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm7[4],xmm1[5],xmm7[5],xmm1[6],xmm7[6],xmm1[7],xmm7[7]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm0[0],xmm8[0],xmm0[1],xmm8[1],xmm0[2],xmm8[2],xmm0[3],xmm8[3]
-; AVX-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm0[4],xmm8[4],xmm0[5],xmm8[5],xmm0[6],xmm8[6],xmm0[7],xmm8[7]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm6, %ymm3
-; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm13, %ymm6
-; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm9, %ymm5
-; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm14, %ymm1
-; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm11, %ymm7
-; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm12, %ymm2
-; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm0, %ymm0
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm15, %ymm4
-; AVX-NEXT: vmovaps %ymm5, 64(%r8)
-; AVX-NEXT: vmovaps %ymm1, 96(%r8)
-; AVX-NEXT: vmovaps %ymm7, 128(%r8)
-; AVX-NEXT: vmovaps %ymm0, 192(%r8)
-; AVX-NEXT: vmovaps %ymm2, 160(%r8)
-; AVX-NEXT: vmovaps %ymm4, 224(%r8)
-; AVX-NEXT: vmovaps %ymm3, (%r8)
-; AVX-NEXT: vmovaps %ymm6, 32(%r8)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3]
+; AVX-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7]
+; AVX-NEXT: vmovdqa %xmm12, (%r8)
+; AVX-NEXT: vmovdqa %xmm3, 16(%r8)
+; AVX-NEXT: vmovdqa %xmm13, 64(%r8)
+; AVX-NEXT: vmovdqa %xmm5, 80(%r8)
+; AVX-NEXT: vmovdqa %xmm7, 32(%r8)
+; AVX-NEXT: vmovdqa %xmm6, 48(%r8)
+; AVX-NEXT: vmovdqa %xmm8, 96(%r8)
+; AVX-NEXT: vmovdqa %xmm1, 112(%r8)
+; AVX-NEXT: vmovdqa %xmm11, 128(%r8)
+; AVX-NEXT: vmovdqa %xmm10, 144(%r8)
+; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX-NEXT: vmovaps %xmm0, 192(%r8)
+; AVX-NEXT: vmovdqa %xmm14, 208(%r8)
+; AVX-NEXT: vmovdqa %xmm9, 160(%r8)
+; AVX-NEXT: vmovdqa %xmm2, 176(%r8)
+; AVX-NEXT: vmovdqa %xmm15, 224(%r8)
+; AVX-NEXT: vmovdqa %xmm4, 240(%r8)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i8_stride4_vf64:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
index 97e4525cf6129..0e3d69c6cb264 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
@@ -661,25 +661,24 @@ define void @store_i8_stride6_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
-; AVX-NEXT: vpshufb {{.*#+}} xmm3 = xmm1[u,u],zero,zero,xmm1[3,11,u,u],zero,zero,xmm1[4,12,u,u],zero,zero
-; AVX-NEXT: vpshufb {{.*#+}} xmm4 = xmm0[u,u,3,11],zero,zero,xmm0[u,u,4,12],zero,zero,xmm0[u,u,5,13]
+; AVX-NEXT: vpshufb {{.*#+}} xmm3 = zero,zero,xmm0[u,u,6,14],zero,zero,xmm0[u,u,7,15],zero,zero,xmm0[u,u]
+; AVX-NEXT: vpshufb {{.*#+}} xmm4 = xmm1[5,13,u,u],zero,zero,xmm1[6,14,u,u],zero,zero,xmm1[7,15,u,u]
; AVX-NEXT: vpor %xmm3, %xmm4, %xmm3
-; AVX-NEXT: vpshufb {{.*#+}} xmm4 = xmm2[2,10,u,u,u,u,3,11,u,u,u,u,4,12,u,u]
-; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm3[1,2],xmm4[3],xmm3[4,5],xmm4[6],xmm3[7]
+; AVX-NEXT: vpshufb {{.*#+}} xmm4 = xmm2[u,u,5,13,u,u,u,u,6,14,u,u,u,u,7,15]
+; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2,3],xmm4[4],xmm3[5,6],xmm4[7]
; AVX-NEXT: vpshufb {{.*#+}} xmm4 = zero,zero,xmm1[0,8,u,u],zero,zero,xmm1[1,9,u,u],zero,zero,xmm1[2,10]
; AVX-NEXT: vpshufb {{.*#+}} xmm5 = xmm0[0,8],zero,zero,xmm0[u,u,1,9],zero,zero,xmm0[u,u,2,10],zero,zero
; AVX-NEXT: vpor %xmm4, %xmm5, %xmm4
; AVX-NEXT: vpshufb {{.*#+}} xmm5 = xmm2[u,u,u,u,0,8,u,u,u,u,1,9,u,u,u,u]
; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2],xmm4[3,4],xmm5[5],xmm4[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3
-; AVX-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,xmm0[u,u,6,14],zero,zero,xmm0[u,u,7,15],zero,zero,xmm0[u,u]
-; AVX-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[5,13,u,u],zero,zero,xmm1[6,14,u,u],zero,zero,xmm1[7,15,u,u]
-; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vpshufb {{.*#+}} xmm1 = xmm2[u,u,5,13,u,u,u,u,6,14,u,u,u,u,7,15]
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3],xmm1[4],xmm0[5,6],xmm1[7]
-; AVX-NEXT: vmovdqa %xmm0, 32(%rax)
-; AVX-NEXT: vmovaps %ymm3, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[u,u],zero,zero,xmm1[3,11,u,u],zero,zero,xmm1[4,12,u,u],zero,zero
+; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u,3,11],zero,zero,xmm0[u,u,4,12],zero,zero,xmm0[u,u,5,13]
+; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vpshufb {{.*#+}} xmm1 = xmm2[2,10,u,u,u,u,3,11,u,u,u,u,4,12,u,u]
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3],xmm0[4,5],xmm1[6],xmm0[7]
+; AVX-NEXT: vmovdqa %xmm0, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm4, (%rax)
+; AVX-NEXT: vmovdqa %xmm3, 32(%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i8_stride6_vf8:
@@ -1220,55 +1219,54 @@ define void @store_i8_stride6_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX-NEXT: vmovdqa (%rcx), %xmm4
; AVX-NEXT: vmovdqa (%r8), %xmm5
; AVX-NEXT: vmovdqa (%r9), %xmm6
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm7 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm7 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm7[1,1,2,2]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm8 = xmm3[8],xmm4[8],xmm3[9],xmm4[9],xmm3[10],xmm4[10],xmm3[11],xmm4[11],xmm3[12],xmm4[12],xmm3[13],xmm4[13],xmm3[14],xmm4[14],xmm3[15],xmm4[15]
; AVX-NEXT: vpshuflw {{.*#+}} xmm9 = xmm8[3,3,3,3,4,5,6,7]
; AVX-NEXT: vpshufhw {{.*#+}} xmm9 = xmm9[0,1,2,3,4,4,4,4]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm9[2],xmm0[3,4],xmm9[5],xmm0[6,7]
-; AVX-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
+; AVX-NEXT: vpunpckhbw {{.*#+}} xmm9 = xmm5[8],xmm6[8],xmm5[9],xmm6[9],xmm5[10],xmm6[10],xmm5[11],xmm6[11],xmm5[12],xmm6[12],xmm5[13],xmm6[13],xmm5[14],xmm6[14],xmm5[15],xmm6[15]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[1,1,2,2]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm10[0],xmm0[1,2],xmm10[3],xmm0[4,5],xmm10[6],xmm0[7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm7[0,0,1,1]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm11 = xmm8[1,0,2,2,4,5,6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[0,1,0,1]
+; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm7[3,3,3,3]
+; AVX-NEXT: vpshufhw {{.*#+}} xmm11 = xmm8[0,1,2,3,5,6,7,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[2,2,2,3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm11[0,1],xmm10[2],xmm11[3,4],xmm10[5],xmm11[6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm9[2,2,3,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm10[0],xmm11[1],xmm10[2,3],xmm11[4],xmm10[5,6],xmm11[7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm9[0,0,0,0]
-; AVX-NEXT: vpblendw {{.*#+}} xmm10 = xmm10[0,1],xmm11[2],xmm10[3,4],xmm11[5],xmm10[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm10, %ymm0
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,0,1,1]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm3[8],xmm4[8],xmm3[9],xmm4[9],xmm3[10],xmm4[10],xmm3[11],xmm4[11],xmm3[12],xmm4[12],xmm3[13],xmm4[13],xmm3[14],xmm4[14],xmm3[15],xmm4[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm3[1,0,2,2,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[0,1,0,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2,3],xmm4[4],xmm2[5,6],xmm4[7]
-; AVX-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm5[8],xmm6[8],xmm5[9],xmm6[9],xmm5[10],xmm6[10],xmm5[11],xmm6[11],xmm5[12],xmm6[12],xmm5[13],xmm6[13],xmm5[14],xmm6[14],xmm5[15],xmm6[15]
+; AVX-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm4[0,0,0,0]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm5[2],xmm2[3,4],xmm5[5],xmm2[6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm7[3,3,3,3]
-; AVX-NEXT: vpshufhw {{.*#+}} xmm6 = xmm8[0,1,2,3,5,6,7,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[2,2,2,3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2],xmm6[3,4],xmm5[5],xmm6[6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm9[2,2,3,3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0],xmm6[1],xmm5[2,3],xmm6[4],xmm5[5,6],xmm6[7]
-; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2
-; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm1[3,3,3,3]
-; AVX-NEXT: vpshufhw {{.*#+}} xmm6 = xmm3[0,1,2,3,5,6,7,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[2,2,2,3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2],xmm6[3,4],xmm5[5],xmm6[6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[2,2,3,3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0],xmm6[1],xmm5[2,3],xmm6[4],xmm5[5,6],xmm6[7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,2,2]
-; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[3,3,3,3,4,5,6,7]
-; AVX-NEXT: vpshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,4,4,4]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2],xmm1[3,4],xmm3[5],xmm1[6,7]
-; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm4[1,1,2,2]
-; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0],xmm1[1,2],xmm3[3],xmm1[4,5],xmm3[6],xmm1[7]
-; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm1, %ymm1
-; AVX-NEXT: vmovaps %ymm1, 64(%rax)
-; AVX-NEXT: vmovaps %ymm2, 32(%rax)
-; AVX-NEXT: vmovaps %ymm0, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm1[1,1,2,2]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm6 = xmm3[3,3,3,3,4,5,6,7]
+; AVX-NEXT: vpshufhw {{.*#+}} xmm6 = xmm6[0,1,2,3,4,4,4,4]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm6[2],xmm5[3,4],xmm6[5],xmm5[6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[1,1,2,2]
+; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0],xmm5[1,2],xmm6[3],xmm5[4,5],xmm6[6],xmm5[7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm7[0,0,1,1]
+; AVX-NEXT: vpshuflw {{.*#+}} xmm7 = xmm8[1,0,2,2,4,5,6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm7[0,1,0,1]
+; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0],xmm7[1],xmm6[2,3],xmm7[4],xmm6[5,6],xmm7[7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm9[0,0,0,0]
+; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1],xmm7[2],xmm6[3,4],xmm7[5],xmm6[6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
+; AVX-NEXT: vpshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,6,7,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,2,2,3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1],xmm1[2],xmm3[3,4],xmm1[5],xmm3[6,7]
+; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm4[2,2,3,3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1],xmm1[2,3],xmm3[4],xmm1[5,6],xmm3[7]
+; AVX-NEXT: vmovdqa %xmm1, 32(%rax)
+; AVX-NEXT: vmovdqa %xmm6, 48(%rax)
+; AVX-NEXT: vmovdqa %xmm5, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm2, (%rax)
+; AVX-NEXT: vmovdqa %xmm10, 80(%rax)
+; AVX-NEXT: vmovdqa %xmm0, 64(%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i8_stride6_vf16:
diff --git a/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll b/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
index 637c5e5545c9d..3e5a58698cbd4 100644
--- a/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
+++ b/llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
@@ -407,17 +407,16 @@ define void @store_i8_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],mem[0],xmm2[1],mem[1]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],mem[0],xmm3[1],mem[1]
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; AVX-NEXT: vmovq {{.*#+}} xmm2 = [2,6,10,14,3,7,11,15,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm2 = [0,4,8,12,1,5,9,13,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm2, %xmm1, %xmm3
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm2
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; AVX-NEXT: vmovq {{.*#+}} xmm3 = [0,4,8,12,1,5,9,13,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm3 = [2,6,10,14,3,7,11,15,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX-NEXT: vpshufb %xmm3, %xmm0, %xmm0
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX-NEXT: vmovaps %ymm0, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm0, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm2, (%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i8_stride8_vf4:
@@ -809,47 +808,46 @@ define void @store_i8_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX-NEXT: vmovq {{.*#+}} xmm4 = [0,0,2,10,0,0,3,11,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm4 = [0,0,0,8,0,0,1,9,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm4, %xmm3, %xmm5
; AVX-NEXT: vpshufb %xmm4, %xmm2, %xmm4
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
-; AVX-NEXT: vmovq {{.*#+}} xmm5 = [2,10,0,0,3,11,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm5 = [0,8,0,0,1,9,0,0,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm5, %xmm1, %xmm6
; AVX-NEXT: vpshufb %xmm5, %xmm0, %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
; AVX-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1],xmm4[2,3],xmm5[4,5],xmm4[6,7]
-; AVX-NEXT: vmovq {{.*#+}} xmm5 = [0,0,0,8,0,0,1,9,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm5 = [0,0,2,10,0,0,3,11,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm5, %xmm3, %xmm6
; AVX-NEXT: vpshufb %xmm5, %xmm2, %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
-; AVX-NEXT: vmovq {{.*#+}} xmm6 = [0,8,0,0,1,9,0,0,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm6, %xmm1, %xmm7
-; AVX-NEXT: vpshufb %xmm6, %xmm0, %xmm6
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3]
-; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3],xmm6[4,5],xmm5[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4
-; AVX-NEXT: vmovq {{.*#+}} xmm5 = [0,0,6,14,0,0,7,15,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm5, %xmm3, %xmm6
-; AVX-NEXT: vpshufb %xmm5, %xmm2, %xmm5
-; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
-; AVX-NEXT: vmovq {{.*#+}} xmm6 = [6,14,0,0,7,15,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm6 = [2,10,0,0,3,11,0,0,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm6, %xmm1, %xmm7
; AVX-NEXT: vpshufb %xmm6, %xmm0, %xmm6
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3]
; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3],xmm6[4,5],xmm5[6,7]
; AVX-NEXT: vmovq {{.*#+}} xmm6 = [0,0,4,12,0,0,5,13,0,0,0,0,0,0,0,0]
-; AVX-NEXT: vpshufb %xmm6, %xmm3, %xmm3
-; AVX-NEXT: vpshufb %xmm6, %xmm2, %xmm2
+; AVX-NEXT: vpshufb %xmm6, %xmm3, %xmm7
+; AVX-NEXT: vpshufb %xmm6, %xmm2, %xmm6
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3]
+; AVX-NEXT: vmovq {{.*#+}} xmm7 = [4,12,0,0,5,13,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm7, %xmm1, %xmm8
+; AVX-NEXT: vpshufb %xmm7, %xmm0, %xmm7
+; AVX-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm7[0],xmm8[0],xmm7[1],xmm8[1],xmm7[2],xmm8[2],xmm7[3],xmm8[3]
+; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm7[0,1],xmm6[2,3],xmm7[4,5],xmm6[6,7]
+; AVX-NEXT: vmovq {{.*#+}} xmm7 = [0,0,6,14,0,0,7,15,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vpshufb %xmm7, %xmm3, %xmm3
+; AVX-NEXT: vpshufb %xmm7, %xmm2, %xmm2
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
-; AVX-NEXT: vmovq {{.*#+}} xmm3 = [4,12,0,0,5,13,0,0,0,0,0,0,0,0,0,0]
+; AVX-NEXT: vmovq {{.*#+}} xmm3 = [6,14,0,0,7,15,0,0,0,0,0,0,0,0,0,0]
; AVX-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX-NEXT: vpshufb %xmm3, %xmm0, %xmm0
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
-; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm0
-; AVX-NEXT: vmovaps %ymm0, 32(%rax)
-; AVX-NEXT: vmovaps %ymm4, (%rax)
-; AVX-NEXT: vzeroupper
+; AVX-NEXT: vmovdqa %xmm0, 48(%rax)
+; AVX-NEXT: vmovdqa %xmm6, 32(%rax)
+; AVX-NEXT: vmovdqa %xmm5, 16(%rax)
+; AVX-NEXT: vmovdqa %xmm4, (%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i8_stride8_vf8:
@@ -1033,7 +1031,7 @@ define void @store_i8_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [1,3,9,11,1,3,9,11]
+; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [0,2,8,10,0,2,8,10]
; AVX512-FCP-NEXT: # ymm4 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vmovdqa %ymm2, %ymm5
; AVX512-FCP-NEXT: vpermt2d %ymm3, %ymm4, %ymm5
@@ -1043,15 +1041,15 @@ define void @store_i8_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm7 = [201851904,218694913,235537922,252380931]
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm4, %ymm4
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2],ymm5[3],ymm4[4],ymm5[5],ymm4[6],ymm5[7]
-; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,2,8,10,0,2,8,10]
+; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [1,3,9,11,1,3,9,11]
; AVX512-FCP-NEXT: # ymm5 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vpermt2d %ymm3, %ymm5, %ymm2
; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm2, %ymm2
; AVX512-FCP-NEXT: vpermt2d %ymm1, %ymm5, %ymm0
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm0, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm4, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -1116,7 +1114,7 @@ define void @store_i8_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
-; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [1,3,9,11,1,3,9,11]
+; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [0,2,8,10,0,2,8,10]
; AVX512DQ-FCP-NEXT: # ymm4 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vmovdqa %ymm2, %ymm5
; AVX512DQ-FCP-NEXT: vpermt2d %ymm3, %ymm4, %ymm5
@@ -1126,15 +1124,15 @@ define void @store_i8_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecp
; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm7 = [201851904,218694913,235537922,252380931]
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm4, %ymm4
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2],ymm5[3],ymm4[4],ymm5[5],ymm4[6],ymm5[7]
-; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,2,8,10,0,2,8,10]
+; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [1,3,9,11,1,3,9,11]
; AVX512DQ-FCP-NEXT: # ymm5 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vpermt2d %ymm3, %ymm5, %ymm2
; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vpermt2d %ymm1, %ymm5, %ymm0
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm0, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm4, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
@@ -1790,62 +1788,62 @@ define void @store_i8_stride8_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512-NEXT: vmovdqa (%r8), %xmm3
-; AVX512-NEXT: vmovdqa (%r11), %xmm0
-; AVX512-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
-; AVX512-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512-NEXT: vmovdqa (%r8), %xmm2
+; AVX512-NEXT: vmovdqa (%r11), %xmm3
+; AVX512-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
+; AVX512-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,2048,0,2305,0,2562,0,2819]
; AVX512-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512-NEXT: vpblendw {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7],ymm9[8,9,10],ymm6[11],ymm9[12,13,14],ymm6[15]
-; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
+; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm10
; AVX512-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512-NEXT: vpmovsxwq {{.*#+}} ymm13 = [3076,3333,3590,3847]
-; AVX512-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512-NEXT: vpblendw {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7,8],ymm11[9],ymm14[10,11,12],ymm11[13],ymm14[14,15]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0],ymm6[1],ymm11[2],ymm6[3],ymm11[4],ymm6[5],ymm11[6],ymm6[7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
-; AVX512-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512-NEXT: vpmovsxwd {{.*#+}} ymm14 = [0,2048,0,2305,0,2562,0,2819]
-; AVX512-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7],ymm7[8,9,10],ymm5[11],ymm7[12,13,14],ymm5[15]
+; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512-NEXT: vpmovsxwq {{.*#+}} ymm14 = [2048,2305,2562,2819]
+; AVX512-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7,8],ymm11[9],ymm0[10,11,12],ymm11[13],ymm0[14,15]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm6[1],ymm0[2],ymm6[3],ymm0[4],ymm6[5],ymm0[6],ymm6[7]
+; AVX512-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
+; AVX512-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512-NEXT: vpmovsxwd {{.*#+}} ymm11 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512-NEXT: vpblendw {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7],ymm7[8,9,10],ymm4[11],ymm7[12,13,14],ymm4[15]
; AVX512-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm7
; AVX512-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512-NEXT: vpmovsxwq {{.*#+}} ymm15 = [2048,2305,2562,2819]
-; AVX512-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512-NEXT: vpblendw {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7,8],ymm9[9],ymm12[10,11,12],ymm9[13],ymm12[14,15]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0],ymm5[1],ymm9[2],ymm5[3],ymm9[4],ymm5[5],ymm9[6],ymm5[7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512-NEXT: vpmovsxwq {{.*#+}} ymm15 = [3076,3333,3590,3847]
+; AVX512-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512-NEXT: vpblendw {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7,8],ymm9[9],ymm13[10,11,12],ymm9[13],ymm13[14,15]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0],ymm4[1],ymm9[2],ymm4[3],ymm9[4],ymm4[5],ymm9[6],ymm4[7]
; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512-NEXT: vpblendw {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7],ymm6[8,9,10],ymm0[11],ymm6[12,13,14],ymm0[15]
+; AVX512-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512-NEXT: vpblendw {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7],ymm8[8,9,10],ymm5[11],ymm8[12,13,14],ymm5[15]
; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512-NEXT: vpblendw {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7,8],ymm6[9],ymm8[10,11,12],ymm6[13],ymm8[14,15]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0],ymm0[1],ymm6[2],ymm0[3],ymm6[4],ymm0[5],ymm6[6],ymm0[7]
-; AVX512-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7],ymm3[8,9,10],ymm4[11],ymm3[12,13,14],ymm4[15]
-; AVX512-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7,8],ymm2[9],ymm1[10,11,12],ymm2[13],ymm1[14,15]
-; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm3[1],ymm1[2],ymm3[3],ymm1[4],ymm3[5],ymm1[6],ymm3[7]
-; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512-NEXT: vpblendw {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7,8],ymm8[9],ymm10[10,11,12],ymm8[13],ymm10[14,15]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0],ymm5[1],ymm8[2],ymm5[3],ymm8[4],ymm5[5],ymm8[6],ymm5[7]
+; AVX512-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7],ymm2[8,9,10],ymm3[11],ymm2[12,13,14],ymm3[15]
+; AVX512-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512-NEXT: vpblendw {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7,8],ymm1[9],ymm3[10,11,12],ymm1[13],ymm3[14,15]
+; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
+; AVX512-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512-NEXT: vmovdqa %ymm0, (%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -1854,62 +1852,62 @@ define void @store_i8_stride8_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm3
-; AVX512-FCP-NEXT: vmovdqa (%r11), %xmm0
-; AVX512-FCP-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
-; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512-FCP-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm2
+; AVX512-FCP-NEXT: vmovdqa (%r11), %xmm3
+; AVX512-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512-FCP-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,2048,0,2305,0,2562,0,2819]
; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7],ymm9[8,9,10],ymm6[11],ymm9[12,13,14],ymm6[15]
-; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
+; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512-FCP-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm10
; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512-FCP-NEXT: vpmovsxwq {{.*#+}} ymm13 = [3076,3333,3590,3847]
-; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7,8],ymm11[9],ymm14[10,11,12],ymm11[13],ymm14[14,15]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0],ymm6[1],ymm11[2],ymm6[3],ymm11[4],ymm6[5],ymm11[6],ymm6[7]
-; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512-FCP-NEXT: vpmovsxwd {{.*#+}} ymm14 = [0,2048,0,2305,0,2562,0,2819]
-; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7],ymm7[8,9,10],ymm5[11],ymm7[12,13,14],ymm5[15]
+; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512-FCP-NEXT: vpmovsxwq {{.*#+}} ymm14 = [2048,2305,2562,2819]
+; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7,8],ymm11[9],ymm0[10,11,12],ymm11[13],ymm0[14,15]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm6[1],ymm0[2],ymm6[3],ymm0[4],ymm6[5],ymm0[6],ymm6[7]
+; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
+; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512-FCP-NEXT: vpmovsxwd {{.*#+}} ymm11 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7],ymm7[8,9,10],ymm4[11],ymm7[12,13,14],ymm4[15]
; AVX512-FCP-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm7
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512-FCP-NEXT: vpmovsxwq {{.*#+}} ymm15 = [2048,2305,2562,2819]
-; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7,8],ymm9[9],ymm12[10,11,12],ymm9[13],ymm12[14,15]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0],ymm5[1],ymm9[2],ymm5[3],ymm9[4],ymm5[5],ymm9[6],ymm5[7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512-FCP-NEXT: vpmovsxwq {{.*#+}} ymm15 = [3076,3333,3590,3847]
+; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7,8],ymm9[9],ymm13[10,11,12],ymm9[13],ymm13[14,15]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0],ymm4[1],ymm9[2],ymm4[3],ymm9[4],ymm4[5],ymm9[6],ymm4[7]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7],ymm6[8,9,10],ymm0[11],ymm6[12,13,14],ymm0[15]
+; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7],ymm8[8,9,10],ymm5[11],ymm8[12,13,14],ymm5[15]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7,8],ymm6[9],ymm8[10,11,12],ymm6[13],ymm8[14,15]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0],ymm0[1],ymm6[2],ymm0[3],ymm6[4],ymm0[5],ymm6[6],ymm0[7]
-; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7],ymm3[8,9,10],ymm4[11],ymm3[12,13,14],ymm4[15]
-; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7,8],ymm2[9],ymm1[10,11,12],ymm2[13],ymm1[14,15]
-; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm3[1],ymm1[2],ymm3[3],ymm1[4],ymm3[5],ymm1[6],ymm3[7]
-; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512-FCP-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512-FCP-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7,8],ymm8[9],ymm10[10,11,12],ymm8[13],ymm10[14,15]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0],ymm5[1],ymm8[2],ymm5[3],ymm8[4],ymm5[5],ymm8[6],ymm5[7]
+; AVX512-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7],ymm2[8,9,10],ymm3[11],ymm2[12,13,14],ymm3[15]
+; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7,8],ymm1[9],ymm3[10,11,12],ymm1[13],ymm3[14,15]
+; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
+; AVX512-FCP-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
@@ -1918,62 +1916,62 @@ define void @store_i8_stride8_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512DQ-NEXT: vmovdqa (%r8), %xmm3
-; AVX512DQ-NEXT: vmovdqa (%r11), %xmm0
-; AVX512DQ-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
-; AVX512DQ-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512DQ-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512DQ-NEXT: vmovdqa (%r8), %xmm2
+; AVX512DQ-NEXT: vmovdqa (%r11), %xmm3
+; AVX512DQ-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512DQ-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,2048,0,2305,0,2562,0,2819]
; AVX512DQ-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7],ymm9[8,9,10],ymm6[11],ymm9[12,13,14],ymm6[15]
-; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
+; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512DQ-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm10
; AVX512DQ-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512DQ-NEXT: vpmovsxwq {{.*#+}} ymm13 = [3076,3333,3590,3847]
-; AVX512DQ-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7,8],ymm11[9],ymm14[10,11,12],ymm11[13],ymm14[14,15]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0],ymm6[1],ymm11[2],ymm6[3],ymm11[4],ymm6[5],ymm11[6],ymm6[7]
-; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512DQ-NEXT: vpmovsxwd {{.*#+}} ymm14 = [0,2048,0,2305,0,2562,0,2819]
-; AVX512DQ-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7],ymm7[8,9,10],ymm5[11],ymm7[12,13,14],ymm5[15]
+; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512DQ-NEXT: vpmovsxwq {{.*#+}} ymm14 = [2048,2305,2562,2819]
+; AVX512DQ-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7,8],ymm11[9],ymm0[10,11,12],ymm11[13],ymm0[14,15]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm6[1],ymm0[2],ymm6[3],ymm0[4],ymm6[5],ymm0[6],ymm6[7]
+; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
+; AVX512DQ-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512DQ-NEXT: vpmovsxwd {{.*#+}} ymm11 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512DQ-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7],ymm7[8,9,10],ymm4[11],ymm7[12,13,14],ymm4[15]
; AVX512DQ-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm7
; AVX512DQ-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512DQ-NEXT: vpmovsxwq {{.*#+}} ymm15 = [2048,2305,2562,2819]
-; AVX512DQ-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7,8],ymm9[9],ymm12[10,11,12],ymm9[13],ymm12[14,15]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0],ymm5[1],ymm9[2],ymm5[3],ymm9[4],ymm5[5],ymm9[6],ymm5[7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512DQ-NEXT: vpmovsxwq {{.*#+}} ymm15 = [3076,3333,3590,3847]
+; AVX512DQ-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7,8],ymm9[9],ymm13[10,11,12],ymm9[13],ymm13[14,15]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0],ymm4[1],ymm9[2],ymm4[3],ymm9[4],ymm4[5],ymm9[6],ymm4[7]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7],ymm6[8,9,10],ymm0[11],ymm6[12,13,14],ymm0[15]
+; AVX512DQ-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512DQ-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7],ymm8[8,9,10],ymm5[11],ymm8[12,13,14],ymm5[15]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512DQ-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7,8],ymm6[9],ymm8[10,11,12],ymm6[13],ymm8[14,15]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0],ymm0[1],ymm6[2],ymm0[3],ymm6[4],ymm0[5],ymm6[6],ymm0[7]
-; AVX512DQ-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512DQ-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7],ymm3[8,9,10],ymm4[11],ymm3[12,13,14],ymm4[15]
-; AVX512DQ-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512DQ-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7,8],ymm2[9],ymm1[10,11,12],ymm2[13],ymm1[14,15]
-; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm3[1],ymm1[2],ymm3[3],ymm1[4],ymm3[5],ymm1[6],ymm3[7]
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512DQ-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512DQ-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512DQ-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512DQ-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7,8],ymm8[9],ymm10[10,11,12],ymm8[13],ymm10[14,15]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0],ymm5[1],ymm8[2],ymm5[3],ymm8[4],ymm5[5],ymm8[6],ymm5[7]
+; AVX512DQ-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512DQ-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7],ymm2[8,9,10],ymm3[11],ymm2[12,13,14],ymm3[15]
+; AVX512DQ-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512DQ-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512DQ-NEXT: vpblendw {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7,8],ymm1[9],ymm3[10,11,12],ymm1[13],ymm3[14,15]
+; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
+; AVX512DQ-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512DQ-NEXT: vmovdqa %ymm0, (%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1982,62 +1980,62 @@ define void @store_i8_stride8_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm2
-; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm3
-; AVX512DQ-FCP-NEXT: vmovdqa (%r11), %xmm0
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r10), %ymm0, %ymm4
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm4[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm0 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm5, %ymm6
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm3[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm1
+; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm2
+; AVX512DQ-FCP-NEXT: vmovdqa (%r11), %xmm3
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm6
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vpmovsxwd {{.*#+}} ymm8 = [0,2048,0,2305,0,2562,0,2819]
; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7],ymm9[8,9,10],ymm6[11],ymm9[12,13,14],ymm6[15]
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm2[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512DQ-FCP-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm10
; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
-; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm1[0,2,0,2]
-; AVX512DQ-FCP-NEXT: vpmovsxwq {{.*#+}} ymm13 = [3076,3333,3590,3847]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7,8],ymm11[9],ymm14[10,11,12],ymm11[13],ymm14[14,15]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0],ymm6[1],ymm11[2],ymm6[3],ymm11[4],ymm6[5],ymm11[6],ymm6[7]
-; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,0,8,u,u,u,u,u,u,1,9,u,u,u,u,u,u,2,10,u,u,u,u,u,u,3,11]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
-; AVX512DQ-FCP-NEXT: vpmovsxwd {{.*#+}} ymm14 = [0,2048,0,2305,0,2562,0,2819]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7],ymm7[8,9,10],ymm5[11],ymm7[12,13,14],ymm5[15]
+; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm12
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm13 = ymm12[0,2,0,2]
+; AVX512DQ-FCP-NEXT: vpmovsxwq {{.*#+}} ymm14 = [2048,2305,2562,2819]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm13, %ymm0
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7,8],ymm11[9],ymm0[10,11,12],ymm11[13],ymm0[14,15]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm6[1],ymm0[2],ymm6[3],ymm0[4],ymm6[5],ymm0[6],ymm6[7]
+; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,4,12,u,u,u,u,u,u,5,13,u,u,u,u,u,u,6,14,u,u,u,u,u,u,7,15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm4, %ymm4
+; AVX512DQ-FCP-NEXT: vpmovsxwd {{.*#+}} ymm11 = [0,3076,0,3333,0,3590,0,3847]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm7, %ymm7
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7],ymm7[8,9,10],ymm4[11],ymm7[12,13,14],ymm4[15]
; AVX512DQ-FCP-NEXT: vpmovsxdq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm7
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
-; AVX512DQ-FCP-NEXT: vpmovsxwq {{.*#+}} ymm15 = [2048,2305,2562,2819]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7,8],ymm9[9],ymm12[10,11,12],ymm9[13],ymm12[14,15]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0],ymm5[1],ymm9[2],ymm5[3],ymm9[4],ymm5[5],ymm9[6],ymm5[7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
-; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512DQ-FCP-NEXT: vpmovsxwq {{.*#+}} ymm15 = [3076,3333,3590,3847]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm13, %ymm13
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm9 = ymm13[0],ymm9[1],ymm13[2,3,4],ymm9[5],ymm13[6,7,8],ymm9[9],ymm13[10,11,12],ymm9[13],ymm13[14,15]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0],ymm4[1],ymm9[2],ymm4[3],ymm9[4],ymm4[5],ymm9[6],ymm4[7]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm3, %ymm6
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm0 = ymm6[0,1,2],ymm0[3],ymm6[4,5,6],ymm0[7],ymm6[8,9,10],ymm0[11],ymm6[12,13,14],ymm0[15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm2, %ymm6
+; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm2, %ymm8
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7],ymm8[8,9,10],ymm5[11],ymm8[12,13,14],ymm5[15]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm1, %ymm8
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7,8],ymm6[9],ymm8[10,11,12],ymm6[13],ymm8[14,15]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm6[0],ymm0[1],ymm6[2],ymm0[3],ymm6[4],ymm0[5],ymm6[6],ymm0[7]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
-; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm3, %ymm3
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7],ymm3[8,9,10],ymm4[11],ymm3[12,13,14],ymm4[15]
-; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm2, %ymm2
-; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm1, %ymm1
-; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7,8],ymm2[9],ymm1[10,11,12],ymm2[13],ymm1[14,15]
-; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm3[1],ymm1[2],ymm3[3],ymm1[4],ymm3[5],ymm1[6],ymm3[7]
-; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, 64(%rax)
-; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm5, (%rax)
+; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm8
+; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm12[1,3,1,3]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm9, %ymm10
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm8 = ymm10[0],ymm8[1],ymm10[2,3,4],ymm8[5],ymm10[6,7,8],ymm8[9],ymm10[10,11,12],ymm8[13],ymm10[14,15]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm8[0],ymm5[1],ymm8[2],ymm5[3],ymm8[4],ymm5[5],ymm8[6],ymm5[7]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm3
+; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm2, %ymm2
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7],ymm2[8,9,10],ymm3[11],ymm2[12,13,14],ymm3[15]
+; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
+; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm9, %ymm3
+; AVX512DQ-FCP-NEXT: vpblendw {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7,8],ymm1[9],ymm3[10,11,12],ymm1[13],ymm3[14,15]
+; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm1, 96(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm5, 64(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm4, 32(%rax)
+; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll b/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
index c752abec42038..84ad15d2e7bce 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
@@ -1851,7 +1851,7 @@ define <512 x i8> @PR153457(<512 x i8> %a0, <512 x i8> %a1) nounwind {
; AVX512F-NEXT: vpblendd {{.*#+}} ymm6 = ymm6[0,1,2,3,4,5],ymm9[6,7]
; AVX512F-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm6[0,1,2,3],zmm0[4,5,6,7]
; AVX512F-NEXT: vpsrlq $56, %xmm7, %xmm6
-; AVX512F-NEXT: vmovdqa %ymm6, 416(%rdi)
+; AVX512F-NEXT: vmovdqa %xmm6, 416(%rdi)
; AVX512F-NEXT: vmovdqa %ymm3, 384(%rdi)
; AVX512F-NEXT: vmovdqa64 %zmm0, (%rdi)
; AVX512F-NEXT: vmovdqa64 %zmm5, 320(%rdi)
@@ -1987,7 +1987,7 @@ define <512 x i8> @PR153457(<512 x i8> %a0, <512 x i8> %a1) nounwind {
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm6[0,1,2,3,4,5],ymm9[6,7]
; AVX512DQ-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm6[0,1,2,3],zmm0[4,5,6,7]
; AVX512DQ-NEXT: vpsrlq $56, %xmm7, %xmm6
-; AVX512DQ-NEXT: vmovdqa %ymm6, 416(%rdi)
+; AVX512DQ-NEXT: vmovdqa %xmm6, 416(%rdi)
; AVX512DQ-NEXT: vmovdqa %ymm3, 384(%rdi)
; AVX512DQ-NEXT: vmovdqa64 %zmm0, (%rdi)
; AVX512DQ-NEXT: vmovdqa64 %zmm5, 320(%rdi)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll b/llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
index 4e76c03a723a1..95663432b5897 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
@@ -484,9 +484,8 @@ define void @concat_shuf_of_a_to_itself(ptr %a.ptr, ptr %dst) {
; AVX1-LABEL: concat_shuf_of_a_to_itself:
; AVX1: # %bb.0:
; AVX1-NEXT: vpermilpd {{.*#+}} xmm0 = mem[1,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX1-NEXT: vmovaps %ymm0, (%rsi)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vmovapd %xmm0, 16(%rsi)
+; AVX1-NEXT: vmovapd %xmm0, (%rsi)
; AVX1-NEXT: retq
;
; AVX2-LABEL: concat_shuf_of_a_to_itself:
diff --git a/llvm/test/CodeGen/X86/x86-interleaved-access.ll b/llvm/test/CodeGen/X86/x86-interleaved-access.ll
index 49db663f9d529..823dd6e045a3b 100644
--- a/llvm/test/CodeGen/X86/x86-interleaved-access.ll
+++ b/llvm/test/CodeGen/X86/x86-interleaved-access.ll
@@ -223,34 +223,34 @@ define void @store_factori64_4(ptr %ptr, <4 x i64> %v0, <4 x i64> %v1, <4 x i64>
define void @interleaved_store_vf32_i8_stride4(<32 x i8> %x1, <32 x i8> %x2, <32 x i8> %x3, <32 x i8> %x4, ptr %p) nounwind {
; AVX1-LABEL: interleaved_store_vf32_i8_stride4:
; AVX1: # %bb.0:
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm6
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm7 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm6 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm7 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm5[8],xmm4[8],xmm5[9],xmm4[9],xmm5[10],xmm4[10],xmm5[11],xmm4[11],xmm5[12],xmm4[12],xmm5[13],xmm4[13],xmm5[14],xmm4[14],xmm5[15],xmm4[15]
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm6[8],xmm5[8],xmm6[9],xmm5[9],xmm6[10],xmm5[10],xmm6[11],xmm5[11],xmm6[12],xmm5[12],xmm6[13],xmm5[13],xmm6[14],xmm5[14],xmm6[15],xmm5[15]
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm5 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
-; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm6
-; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm8
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm8[0],xmm6[0],xmm8[1],xmm6[1],xmm8[2],xmm6[2],xmm8[3],xmm6[3],xmm8[4],xmm6[4],xmm8[5],xmm6[5],xmm8[6],xmm6[6],xmm8[7],xmm6[7]
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm1
+; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm5
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm5[0],xmm1[0],xmm5[1],xmm1[1],xmm5[2],xmm1[2],xmm5[3],xmm1[3],xmm5[4],xmm1[4],xmm5[5],xmm1[5],xmm5[6],xmm1[6],xmm5[7],xmm1[7]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm5[8],xmm1[8],xmm5[9],xmm1[9],xmm5[10],xmm1[10],xmm5[11],xmm1[11],xmm5[12],xmm1[12],xmm5[13],xmm1[13],xmm5[14],xmm1[14],xmm5[15],xmm1[15]
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm2[8],xmm3[8],xmm2[9],xmm3[9],xmm2[10],xmm3[10],xmm2[11],xmm3[11],xmm2[12],xmm3[12],xmm2[13],xmm3[13],xmm2[14],xmm3[14],xmm2[15],xmm3[15]
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm8[8],xmm6[8],xmm8[9],xmm6[9],xmm8[10],xmm6[10],xmm8[11],xmm6[11],xmm8[12],xmm6[12],xmm8[13],xmm6[13],xmm8[14],xmm6[14],xmm8[15],xmm6[15]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm7[0],xmm9[0],xmm7[1],xmm9[1],xmm7[2],xmm9[2],xmm7[3],xmm9[3]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm7[0],xmm9[0],xmm7[1],xmm9[1],xmm7[2],xmm9[2],xmm7[3],xmm9[3]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm6[0],xmm8[0],xmm6[1],xmm8[1],xmm6[2],xmm8[2],xmm6[3],xmm8[3]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm9[4],xmm7[5],xmm9[5],xmm7[6],xmm9[6],xmm7[7],xmm9[7]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm6[4],xmm8[4],xmm6[5],xmm8[5],xmm6[6],xmm8[6],xmm6[7],xmm8[7]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
-; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm8, %ymm2
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm9, %ymm0
-; AVX1-NEXT: vinsertf128 $1, %xmm7, %ymm6, %ymm3
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm5, %ymm1
-; AVX1-NEXT: vmovaps %ymm1, 96(%rdi)
-; AVX1-NEXT: vmovaps %ymm3, 64(%rdi)
-; AVX1-NEXT: vmovaps %ymm0, 32(%rdi)
-; AVX1-NEXT: vmovaps %ymm2, (%rdi)
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7]
+; AVX1-NEXT: vmovdqa %xmm1, 112(%rdi)
+; AVX1-NEXT: vmovdqa %xmm9, 96(%rdi)
+; AVX1-NEXT: vmovdqa %xmm0, 48(%rdi)
+; AVX1-NEXT: vmovdqa %xmm8, 32(%rdi)
+; AVX1-NEXT: vmovdqa %xmm6, 80(%rdi)
+; AVX1-NEXT: vmovdqa %xmm5, 64(%rdi)
+; AVX1-NEXT: vmovdqa %xmm7, 16(%rdi)
+; AVX1-NEXT: vmovdqa %xmm3, (%rdi)
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1452,65 +1452,65 @@ define void @interleaved_store_vf64_i8_stride4(<64 x i8> %a, <64 x i8> %b, <64 x
; AVX1-LABEL: interleaved_store_vf64_i8_stride4:
; AVX1: # %bb.0:
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
-; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm11
+; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm10
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm12
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3],xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7]
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm10 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm9 = xmm12[0],xmm10[0],xmm12[1],xmm10[1],xmm12[2],xmm10[2],xmm12[3],xmm10[3],xmm12[4],xmm10[4],xmm12[5],xmm10[5],xmm12[6],xmm10[6],xmm12[7],xmm10[7]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm11 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm13
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm14
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm15 = xmm14[0],xmm13[0],xmm14[1],xmm13[1],xmm14[2],xmm13[2],xmm14[3],xmm13[3],xmm14[4],xmm13[4],xmm14[5],xmm13[5],xmm14[6],xmm13[6],xmm14[7],xmm13[7]
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm12[8],xmm11[8],xmm12[9],xmm11[9],xmm12[10],xmm11[10],xmm12[11],xmm11[11],xmm12[12],xmm11[12],xmm12[13],xmm11[13],xmm12[14],xmm11[14],xmm12[15],xmm11[15]
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm12[8],xmm10[8],xmm12[9],xmm10[9],xmm12[10],xmm10[10],xmm12[11],xmm10[11],xmm12[12],xmm10[12],xmm12[13],xmm10[13],xmm12[14],xmm10[14],xmm12[15],xmm10[15]
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm1[8],xmm3[8],xmm1[9],xmm3[9],xmm1[10],xmm3[10],xmm1[11],xmm3[11],xmm1[12],xmm3[12],xmm1[13],xmm3[13],xmm1[14],xmm3[14],xmm1[15],xmm3[15]
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm14[8],xmm13[8],xmm14[9],xmm13[9],xmm14[10],xmm13[10],xmm14[11],xmm13[11],xmm14[12],xmm13[12],xmm14[13],xmm13[13],xmm14[14],xmm13[14],xmm14[15],xmm13[15]
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm11 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3],xmm4[4],xmm6[4],xmm4[5],xmm6[5],xmm4[6],xmm6[6],xmm4[7],xmm6[7]
-; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm12
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm10 = xmm14[8],xmm13[8],xmm14[9],xmm13[9],xmm14[10],xmm13[10],xmm14[11],xmm13[11],xmm14[12],xmm13[12],xmm14[13],xmm13[13],xmm14[14],xmm13[14],xmm14[15],xmm13[15]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm12 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3],xmm4[4],xmm6[4],xmm4[5],xmm6[5],xmm4[6],xmm6[6],xmm4[7],xmm6[7]
+; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm3
; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm13
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm14 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3],xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm6 = xmm4[8],xmm6[8],xmm4[9],xmm6[9],xmm4[10],xmm6[10],xmm4[11],xmm6[11],xmm4[12],xmm6[12],xmm4[13],xmm6[13],xmm4[14],xmm6[14],xmm4[15],xmm6[15]
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3],xmm5[4],xmm7[4],xmm5[5],xmm7[5],xmm5[6],xmm7[6],xmm5[7],xmm7[7]
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm12 = xmm13[8],xmm12[8],xmm13[9],xmm12[9],xmm13[10],xmm12[10],xmm13[11],xmm12[11],xmm13[12],xmm12[12],xmm13[13],xmm12[13],xmm13[14],xmm12[14],xmm13[15],xmm12[15]
-; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm13
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm14 = xmm13[0],xmm3[0],xmm13[1],xmm3[1],xmm13[2],xmm3[2],xmm13[3],xmm3[3],xmm13[4],xmm3[4],xmm13[5],xmm3[5],xmm13[6],xmm3[6],xmm13[7],xmm3[7]
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm4[8],xmm6[8],xmm4[9],xmm6[9],xmm4[10],xmm6[10],xmm4[11],xmm6[11],xmm4[12],xmm6[12],xmm4[13],xmm6[13],xmm4[14],xmm6[14],xmm4[15],xmm6[15]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm6 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3],xmm5[4],xmm7[4],xmm5[5],xmm7[5],xmm5[6],xmm7[6],xmm5[7],xmm7[7]
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm13 = xmm13[8],xmm3[8],xmm13[9],xmm3[9],xmm13[10],xmm3[10],xmm13[11],xmm3[11],xmm13[12],xmm3[12],xmm13[13],xmm3[13],xmm13[14],xmm3[14],xmm13[15],xmm3[15]
+; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm3
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm7 = xmm5[8],xmm7[8],xmm5[9],xmm7[9],xmm5[10],xmm7[10],xmm5[11],xmm7[11],xmm5[12],xmm7[12],xmm5[13],xmm7[13],xmm5[14],xmm7[14],xmm5[15],xmm7[15]
; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5
-; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm5[0],xmm13[0],xmm5[1],xmm13[1],xmm5[2],xmm13[2],xmm5[3],xmm13[3],xmm5[4],xmm13[4],xmm5[5],xmm13[5],xmm5[6],xmm13[6],xmm5[7],xmm13[7]
-; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm13 = xmm5[8],xmm13[8],xmm5[9],xmm13[9],xmm5[10],xmm13[10],xmm5[11],xmm13[11],xmm5[12],xmm13[12],xmm5[13],xmm13[13],xmm5[14],xmm13[14],xmm5[15],xmm13[15]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3]
-; AVX1-NEXT: vmovdqu %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm10[0],xmm4[0],xmm10[1],xmm4[1],xmm10[2],xmm4[2],xmm10[3],xmm4[3]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm10[4],xmm4[4],xmm10[5],xmm4[5],xmm10[6],xmm4[6],xmm10[7],xmm4[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm9[0],xmm14[0],xmm9[1],xmm14[1],xmm9[2],xmm14[2],xmm9[3],xmm14[3]
+; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3],xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]
+; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm5 = xmm5[8],xmm3[8],xmm5[9],xmm3[9],xmm5[10],xmm3[10],xmm5[11],xmm3[11],xmm5[12],xmm3[12],xmm5[13],xmm3[13],xmm5[14],xmm3[14],xmm5[15],xmm3[15]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3]
+; AVX1-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm11[0],xmm6[0],xmm11[1],xmm6[1],xmm11[2],xmm6[2],xmm11[3],xmm6[3]
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm11[4],xmm6[4],xmm11[5],xmm6[5],xmm11[6],xmm6[6],xmm11[7],xmm6[7]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm9[0],xmm14[0],xmm9[1],xmm14[1],xmm9[2],xmm14[2],xmm9[3],xmm14[3]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm9[4],xmm14[4],xmm9[5],xmm14[5],xmm9[6],xmm14[6],xmm9[7],xmm14[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm8[0],xmm11[0],xmm8[1],xmm11[1],xmm8[2],xmm11[2],xmm8[3],xmm11[3]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm11[4],xmm8[5],xmm11[5],xmm8[6],xmm11[6],xmm8[7],xmm11[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm3[0],xmm13[0],xmm3[1],xmm13[1],xmm3[2],xmm13[2],xmm3[3],xmm13[3]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm3[4],xmm13[4],xmm3[5],xmm13[5],xmm3[6],xmm13[6],xmm3[7],xmm13[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm8[0],xmm12[0],xmm8[1],xmm12[1],xmm8[2],xmm12[2],xmm8[3],xmm12[3]
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm12[4],xmm8[5],xmm12[5],xmm8[6],xmm12[6],xmm8[7],xmm12[7]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm10[0],xmm5[0],xmm10[1],xmm5[1],xmm10[2],xmm5[2],xmm10[3],xmm5[3]
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm10[4],xmm5[4],xmm10[5],xmm5[5],xmm10[6],xmm5[6],xmm10[7],xmm5[7]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm7[4],xmm1[5],xmm7[5],xmm1[6],xmm7[6],xmm1[7],xmm7[7]
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm2[0],xmm12[0],xmm2[1],xmm12[1],xmm2[2],xmm12[2],xmm2[3],xmm12[3]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm12[4],xmm2[5],xmm12[5],xmm2[6],xmm12[6],xmm2[7],xmm12[7]
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm2[0],xmm13[0],xmm2[1],xmm13[1],xmm2[2],xmm13[2],xmm2[3],xmm13[3]
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm13[4],xmm2[5],xmm13[5],xmm2[6],xmm13[6],xmm2[7],xmm13[7]
; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3]
-; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7]
-; AVX1-NEXT: vinsertf128 $1, %xmm8, %ymm14, %ymm8
-; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm12, %ymm6
-; AVX1-NEXT: vinsertf128 $1, %xmm9, %ymm10, %ymm9
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm7, %ymm2
-; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm15, %ymm4
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm13, %ymm1
-; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
-; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm0
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm11, %ymm3
-; AVX1-NEXT: vmovaps %ymm3, 224(%rdi)
-; AVX1-NEXT: vmovaps %ymm0, 192(%rdi)
-; AVX1-NEXT: vmovaps %ymm1, 160(%rdi)
-; AVX1-NEXT: vmovaps %ymm4, 128(%rdi)
-; AVX1-NEXT: vmovaps %ymm2, 96(%rdi)
-; AVX1-NEXT: vmovaps %ymm9, 64(%rdi)
-; AVX1-NEXT: vmovaps %ymm6, 32(%rdi)
-; AVX1-NEXT: vmovaps %ymm8, (%rdi)
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
+; AVX1-NEXT: vmovdqa %xmm4, 48(%rdi)
+; AVX1-NEXT: vmovdqa %xmm13, 32(%rdi)
+; AVX1-NEXT: vmovdqa %xmm2, 112(%rdi)
+; AVX1-NEXT: vmovdqa %xmm7, 96(%rdi)
+; AVX1-NEXT: vmovdqa %xmm8, 16(%rdi)
+; AVX1-NEXT: vmovdqa %xmm14, (%rdi)
+; AVX1-NEXT: vmovdqa %xmm9, 80(%rdi)
+; AVX1-NEXT: vmovdqa %xmm11, 64(%rdi)
+; AVX1-NEXT: vmovdqa %xmm1, 176(%rdi)
+; AVX1-NEXT: vmovdqa %xmm10, 160(%rdi)
+; AVX1-NEXT: vmovdqa %xmm5, 240(%rdi)
+; AVX1-NEXT: vmovdqa %xmm12, 224(%rdi)
+; AVX1-NEXT: vmovdqa %xmm6, 144(%rdi)
+; AVX1-NEXT: vmovdqa %xmm15, 128(%rdi)
+; AVX1-NEXT: vmovdqa %xmm3, 208(%rdi)
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vmovaps %xmm0, 192(%rdi)
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1718,23 +1718,22 @@ define void @splat4_v8f32_load_store(ptr %s, ptr %d) nounwind {
define void @splat4_v8i32_load_store(ptr %s, ptr %d) nounwind {
; AVX1-LABEL: splat4_v8i32_load_store:
; AVX1: # %bb.0:
-; AVX1-NEXT: vbroadcastss (%rdi), %xmm0
-; AVX1-NEXT: vbroadcastss 4(%rdi), %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: vbroadcastss 8(%rdi), %xmm1
-; AVX1-NEXT: vbroadcastss 12(%rdi), %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT: vbroadcastss 16(%rdi), %xmm2
-; AVX1-NEXT: vbroadcastss 20(%rdi), %xmm3
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
-; AVX1-NEXT: vbroadcastss 24(%rdi), %xmm3
-; AVX1-NEXT: vbroadcastss 28(%rdi), %xmm4
-; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
-; AVX1-NEXT: vmovups %ymm3, 96(%rsi)
-; AVX1-NEXT: vmovups %ymm2, 64(%rsi)
-; AVX1-NEXT: vmovups %ymm1, 32(%rsi)
-; AVX1-NEXT: vmovups %ymm0, (%rsi)
-; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: vbroadcastss 4(%rdi), %xmm0
+; AVX1-NEXT: vbroadcastss 12(%rdi), %xmm1
+; AVX1-NEXT: vbroadcastss 20(%rdi), %xmm2
+; AVX1-NEXT: vbroadcastss 28(%rdi), %xmm3
+; AVX1-NEXT: vbroadcastss (%rdi), %xmm4
+; AVX1-NEXT: vbroadcastss 8(%rdi), %xmm5
+; AVX1-NEXT: vbroadcastss 16(%rdi), %xmm6
+; AVX1-NEXT: vbroadcastss 24(%rdi), %xmm7
+; AVX1-NEXT: vmovups %xmm3, 112(%rsi)
+; AVX1-NEXT: vmovups %xmm7, 96(%rsi)
+; AVX1-NEXT: vmovups %xmm2, 80(%rsi)
+; AVX1-NEXT: vmovups %xmm6, 64(%rsi)
+; AVX1-NEXT: vmovups %xmm1, 48(%rsi)
+; AVX1-NEXT: vmovups %xmm5, 32(%rsi)
+; AVX1-NEXT: vmovups %xmm0, 16(%rsi)
+; AVX1-NEXT: vmovups %xmm4, (%rsi)
; AVX1-NEXT: retq
;
; AVX2-LABEL: splat4_v8i32_load_store:
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