[llvm] AMDGPU: Use LiveIntervals instead of LiveVariables in SIOptimizeVGPRLiveRange (PR #227252)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 29 03:09:10 PDT 2026
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/227252
Drop the LiveVariables dependency and the hand-written VarInfo
maintenance; the pass already knew how to recompute the affected
intervals with LiveIntervals, so make that the only path.
The legacy pass manager cannot schedule a pass requiring both
LiveIntervals and LiveVariables here, since LiveVariables (and its
UnreachableMachineBlockElim dependency) invalidates the LiveIntervals
just computed for it. In the AMDGPU pipeline, anchor the pass after
MachineLoopInfo instead of PHIElimination so LiveIntervals is computed
before PHIElimination, which is required anyway: the pass needs SSA and
introduces new PHIs. Preserving SlotIndexes keeps the transitive
last-user chain intact.
Since LiveVariables is no longer maintained past this point, PHIElimination
now splits critical edges using LiveIntervals, which accounts for most of
the test churn: LiveIntervalCalc drops kill flags and adds dead flags.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
>From 3a6314dcfd1fee6788a6e2f6466a7f69b5bcfb4f Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Thu, 24 Sep 2026 14:38:48 +0200
Subject: [PATCH] AMDGPU: Use LiveIntervals instead of LiveVariables in
SIOptimizeVGPRLiveRange
Drop the LiveVariables dependency and the hand-written VarInfo
maintenance; the pass already knew how to recompute the affected
intervals with LiveIntervals, so make that the only path.
The legacy pass manager cannot schedule a pass requiring both
LiveIntervals and LiveVariables here, since LiveVariables (and its
UnreachableMachineBlockElim dependency) invalidates the LiveIntervals
just computed for it. In the AMDGPU pipeline, anchor the pass after
MachineLoopInfo instead of PHIElimination so LiveIntervals is computed
before PHIElimination, which is required anyway: the pass needs SSA and
introduces new PHIs. Preserving SlotIndexes keeps the transitive
last-user chain intact.
Since LiveVariables is no longer maintained past this point, PHIElimination
now splits critical edges using LiveIntervals, which accounts for most of
the test churn: LiveIntervalCalc drops kill flags and adds dead flags.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
---
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 12 +-
.../Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp | 233 +-
...vergence-divergent-i1-used-outside-loop.ll | 18 +-
.../GlobalISel/divergence-structurizer.ll | 28 +-
.../AMDGPU/GlobalISel/vni8-across-blocks.ll | 22 +-
.../CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll | 128 +-
.../test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll | 16 +-
llvm/test/CodeGen/AMDGPU/absdiff.ll | 10 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll | 69652 ++++++++--------
.../CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll | 215 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll | 807 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll | 516 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll | 183 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll | 40 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll | 7255 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll | 62 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll | 62 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll | 1110 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll | 3474 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll | 5156 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll | 5907 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll | 6299 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll | 176 +-
.../CodeGen/AMDGPU/asyncmark-gfx12plus.ll | 24 +-
.../test/CodeGen/AMDGPU/asyncmark-pregfx12.ll | 52 +-
llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +-
.../block-should-not-be-in-alive-blocks.mir | 30 +-
.../branch-folding-implicit-def-subreg.ll | 529 +-
.../AMDGPU/branch-relaxation-gfx1250.ll | 28 +-
llvm/test/CodeGen/AMDGPU/bypass-div.ll | 42 +-
llvm/test/CodeGen/AMDGPU/div_i128.ll | 86 +-
llvm/test/CodeGen/AMDGPU/div_v2i128.ll | 294 +-
.../AMDGPU/flat_atomics_i64_noprivate.ll | 132 +-
.../CodeGen/AMDGPU/flat_atomics_i64_system.ll | 316 +-
llvm/test/CodeGen/AMDGPU/fptoi.i128.ll | 28 +-
llvm/test/CodeGen/AMDGPU/fract-match.ll | 72 +-
llvm/test/CodeGen/AMDGPU/frem.ll | 155 +-
.../AMDGPU/global_atomics_scan_fmax.ll | 108 +-
.../AMDGPU/global_atomics_scan_fmin.ll | 108 +-
llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll | 4 +-
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 16 +-
.../AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll | 40 +-
.../CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll | 54 +-
.../CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll | 54 +-
.../CodeGen/AMDGPU/local-atomicrmw-fadd.ll | 182 +-
.../CodeGen/AMDGPU/local-atomicrmw-fmax.ll | 200 +-
.../CodeGen/AMDGPU/local-atomicrmw-fmin.ll | 200 +-
.../CodeGen/AMDGPU/local-atomicrmw-fsub.ll | 350 +-
...wer-control-flow-live-variables-update.mir | 87 +
...ntrol-flow-live-variables-update.xfail.mir | 42 -
llvm/test/CodeGen/AMDGPU/mad_uint24.ll | 72 +-
...-mfma-to-agpr-spill-multi-store-codegen.ll | 775 +-
.../si-opt-vgpr-liverange-bug-deadlanes.mir | 18 +-
...ir => si-opt-vgpr-liverange-undef-use.mir} | 22 +-
.../si-optimize-vgpr-live-range-dbg-instr.mir | 45 +-
.../splitkit-getsubrangeformask-phi-extend.ll | 807 +-
llvm/test/CodeGen/AMDGPU/srem64.ll | 48 +-
llvm/test/CodeGen/AMDGPU/urem64.ll | 48 +-
llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll | 252 +-
.../test/CodeGen/AMDGPU/vni8-across-blocks.ll | 32 +-
60 files changed, 53418 insertions(+), 53327 deletions(-)
delete mode 100644 llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
rename llvm/test/CodeGen/AMDGPU/{si-opt-vgpr-liverange-undef-use-livevars.mir => si-opt-vgpr-liverange-undef-use.mir} (71%)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 72c028edbaef5..c52970188eea8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1856,12 +1856,8 @@ void GCNPassConfig::addOptimizedRegAlloc() {
if (EnableDCEInRA)
insertPass(&DetectDeadLanesID, &DeadMachineInstructionElimID);
- // FIXME: when an instruction has a Killed operand, and the instruction is
- // inside a bundle, seems only the BUNDLE instruction appears as the Kills of
- // the register in LiveVariables, this would trigger a failure in verifier,
- // we should fix it and enable the verifier.
if (OptVGPRLiveRange)
- insertPass(&LiveVariablesID, &SIOptimizeVGPRLiveRangeLegacyID);
+ insertPass(&MachineLoopInfoID, &SIOptimizeVGPRLiveRangeLegacyID);
// This must be run immediately after phi elimination and before
// TwoAddressInstructions, otherwise the processing of the tied operand of
@@ -2662,12 +2658,8 @@ Error AMDGPUCodeGenPassBuilder::addOptimizedRegAlloc(PassManagerWrapper &PMW) {
if (EnableDCEInRA)
insertPass<DetectDeadLanesPass>(DeadMachineInstructionElimPass());
- // FIXME: when an instruction has a Killed operand, and the instruction is
- // inside a bundle, seems only the BUNDLE instruction appears as the Kills of
- // the register in LiveVariables, this would trigger a failure in verifier,
- // we should fix it and enable the verifier.
if (OptVGPRLiveRange)
- insertPass<RequireAnalysisPass<LiveVariablesAnalysis, MachineFunction>>(
+ insertPass<RequireAnalysisPass<MachineLoopAnalysis, MachineFunction>>(
SIOptimizeVGPRLiveRangePass());
// This must be run immediately after phi elimination and before
diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
index c72b40e14ee0e..1120c5209e2fc 100644
--- a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+++ b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
@@ -76,7 +76,6 @@
#include "GCNSubtarget.h"
#include "SIMachineFunctionInfo.h"
#include "llvm/CodeGen/LiveIntervals.h"
-#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
@@ -94,7 +93,6 @@ class SIOptimizeVGPRLiveRange {
const SIRegisterInfo *TRI = nullptr;
const SIInstrInfo *TII = nullptr;
LiveIntervals *LIS = nullptr;
- LiveVariables *LV = nullptr;
MachineDominatorTree *MDT = nullptr;
const MachineLoopInfo *Loops = nullptr;
MachineRegisterInfo *MRI = nullptr;
@@ -109,9 +107,9 @@ class SIOptimizeVGPRLiveRange {
bool isLiveIntoMBB(Register Reg, const MachineBasicBlock *MBB) const;
public:
- SIOptimizeVGPRLiveRange(LiveIntervals *LIS, LiveVariables *LV,
- MachineDominatorTree *MDT, MachineLoopInfo *Loops)
- : LIS(LIS), LV(LV), MDT(MDT), Loops(Loops) {}
+ SIOptimizeVGPRLiveRange(LiveIntervals *LIS, MachineDominatorTree *MDT,
+ MachineLoopInfo *Loops)
+ : LIS(LIS), MDT(MDT), Loops(Loops) {}
bool run(MachineFunction &MF);
MachineBasicBlock *getElseTarget(MachineBasicBlock *MBB) const;
@@ -132,17 +130,6 @@ class SIOptimizeVGPRLiveRange {
SmallSetVector<MachineBasicBlock *, 2> &Blocks,
SmallVectorImpl<MachineInstr *> &Instructions) const;
- void findNonPHIUsesInBlock(Register Reg, MachineBasicBlock *MBB,
- SmallVectorImpl<MachineInstr *> &Uses) const;
-
- void updateLiveRangeInThenRegion(Register Reg, MachineBasicBlock *If,
- MachineBasicBlock *Flow) const;
-
- void updateLiveRangeInElseRegion(
- Register Reg, Register NewReg, MachineBasicBlock *Flow,
- MachineBasicBlock *Endif,
- SmallSetVector<MachineBasicBlock *, 16> &ElseBlocks) const;
-
void
optimizeLiveRange(Register Reg, MachineBasicBlock *If,
MachineBasicBlock *Flow, MachineBasicBlock *Endif,
@@ -168,12 +155,11 @@ class SIOptimizeVGPRLiveRangeLegacy : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addUsedIfAvailable<LiveIntervalsWrapperPass>();
+ AU.addRequired<LiveIntervalsWrapperPass>();
+ AU.addPreserved<SlotIndexesWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
- AU.addRequired<LiveVariablesWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
- AU.addPreserved<LiveVariablesWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -201,18 +187,12 @@ SIOptimizeVGPRLiveRange::getElseTarget(MachineBasicBlock *MBB) const {
bool SIOptimizeVGPRLiveRange::isLiveThrough(
Register Reg, const MachineBasicBlock *MBB) const {
- if (!LIS)
- return LV->getVarInfo(Reg).AliveBlocks.test(MBB->getNumber());
-
const LiveInterval &LI = LIS->getInterval(Reg);
return LIS->isLiveInToMBB(LI, MBB) && LIS->isLiveOutOfMBB(LI, MBB);
}
bool SIOptimizeVGPRLiveRange::isLiveIntoMBB(
Register Reg, const MachineBasicBlock *MBB) const {
- if (!LIS)
- return LV->getVarInfo(Reg).isLiveIn(*MBB, Reg, *MRI);
-
const LiveInterval &LI = LIS->getInterval(Reg);
return LIS->isLiveInToMBB(LI, MBB);
}
@@ -244,17 +224,6 @@ void SIOptimizeVGPRLiveRange::collectElseRegionBlocks(
});
}
-/// Find the instructions(excluding phi) in \p MBB that uses the \p Reg.
-void SIOptimizeVGPRLiveRange::findNonPHIUsesInBlock(
- Register Reg, MachineBasicBlock *MBB,
- SmallVectorImpl<MachineInstr *> &Uses) const {
- for (auto &UseMI : MRI->use_nodbg_instructions(Reg)) {
- if (UseMI.getParent() == MBB && !UseMI.isPHI() &&
- UseMI.readsVirtualRegister(Reg))
- Uses.push_back(&UseMI);
- }
-}
-
/// Collect the killed registers in the ELSE region which are not alive through
/// the whole THEN region.
void SIOptimizeVGPRLiveRange::collectCandidateRegisters(
@@ -428,100 +397,6 @@ void SIOptimizeVGPRLiveRange::collectWaterfallCandidateRegisters(
}
}
-// Re-calculate the liveness of \p Reg in the THEN-region
-void SIOptimizeVGPRLiveRange::updateLiveRangeInThenRegion(
- Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow) const {
- SetVector<MachineBasicBlock *> Blocks;
- SmallVector<MachineBasicBlock *> WorkList({If});
-
- // Collect all successors until we see the flow block, where we should
- // reconverge.
- while (!WorkList.empty()) {
- auto *MBB = WorkList.pop_back_val();
- for (auto *Succ : MBB->successors()) {
- if (Succ != Flow && Blocks.insert(Succ))
- WorkList.push_back(Succ);
- }
- }
-
- LiveVariables::VarInfo &OldVarInfo = LV->getVarInfo(Reg);
- for (MachineBasicBlock *MBB : Blocks) {
- // Clear Live bit, as we will recalculate afterwards
- LLVM_DEBUG(dbgs() << "Clear AliveBlock " << printMBBReference(*MBB)
- << '\n');
- OldVarInfo.AliveBlocks.reset(MBB->getNumber());
- }
-
- SmallPtrSet<MachineBasicBlock *, 4> PHIIncoming;
-
- // Get the blocks the Reg should be alive through
- for (auto I = MRI->use_nodbg_begin(Reg), E = MRI->use_nodbg_end(); I != E;
- ++I) {
- auto *UseMI = I->getParent();
- if (UseMI->isPHI() && I->readsReg()) {
- if (Blocks.contains(UseMI->getParent()))
- PHIIncoming.insert(UseMI->getOperand(I.getOperandNo() + 1).getMBB());
- }
- }
-
- for (MachineBasicBlock *MBB : Blocks) {
- SmallVector<MachineInstr *> Uses;
- // PHI instructions has been processed before.
- findNonPHIUsesInBlock(Reg, MBB, Uses);
-
- if (Uses.size() == 1) {
- LLVM_DEBUG(dbgs() << "Found one Non-PHI use in "
- << printMBBReference(*MBB) << '\n');
- LV->HandleVirtRegUse(Reg, MBB, *(*Uses.begin()));
- } else if (Uses.size() > 1) {
- // Process the instructions in-order
- LLVM_DEBUG(dbgs() << "Found " << Uses.size() << " Non-PHI uses in "
- << printMBBReference(*MBB) << '\n');
- for (MachineInstr &MI : *MBB) {
- if (llvm::is_contained(Uses, &MI))
- LV->HandleVirtRegUse(Reg, MBB, MI);
- }
- }
-
- // Mark Reg alive through the block if this is a PHI incoming block
- if (PHIIncoming.contains(MBB))
- LV->MarkVirtRegAliveInBlock(OldVarInfo, MRI->getDefBlock(Reg), MBB);
- }
-
- // Set the isKilled flag if we get new Kills in the THEN region.
- for (auto *MI : OldVarInfo.Kills) {
- if (Blocks.contains(MI->getParent()))
- MI->addRegisterKilled(Reg, TRI);
- }
-}
-
-void SIOptimizeVGPRLiveRange::updateLiveRangeInElseRegion(
- Register Reg, Register NewReg, MachineBasicBlock *Flow,
- MachineBasicBlock *Endif,
- SmallSetVector<MachineBasicBlock *, 16> &ElseBlocks) const {
- LiveVariables::VarInfo &NewVarInfo = LV->getVarInfo(NewReg);
- LiveVariables::VarInfo &OldVarInfo = LV->getVarInfo(Reg);
-
- // Transfer aliveBlocks from Reg to NewReg
- for (auto *MBB : ElseBlocks) {
- unsigned BBNum = MBB->getNumber();
- if (OldVarInfo.AliveBlocks.test(BBNum)) {
- NewVarInfo.AliveBlocks.set(BBNum);
- LLVM_DEBUG(dbgs() << "Removing AliveBlock " << printMBBReference(*MBB)
- << '\n');
- OldVarInfo.AliveBlocks.reset(BBNum);
- }
- }
-
- // Transfer the possible Kills in ElseBlocks from Reg to NewReg
- llvm::erase_if(OldVarInfo.Kills, [&](MachineInstr *MI) {
- if (!ElseBlocks.contains(MI->getParent()))
- return false;
- NewVarInfo.Kills.push_back(MI);
- return true;
- });
-}
-
void SIOptimizeVGPRLiveRange::optimizeLiveRange(
Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow,
MachineBasicBlock *Endif,
@@ -567,28 +442,17 @@ void SIOptimizeVGPRLiveRange::optimizeLiveRange(
O.setReg(NewReg);
}
- if (LIS) {
- // The new PHI is a def of NewReg and a use of Reg and UndefReg; the uses of
- // Reg in the Else/Endif region were rewritten to NewReg. Kill flags moved
- // with the rewritten operands may no longer mark the last use, so drop them
- // and let the recomputed intervals be the source of truth.
- MRI->clearKillFlags(Reg);
- MRI->clearKillFlags(NewReg);
- LIS->InsertMachineInstrInMaps(*PHI);
- LIS->removeInterval(Reg);
- LIS->createAndComputeVirtRegInterval(Reg);
- LIS->createAndComputeVirtRegInterval(NewReg);
- LIS->createAndComputeVirtRegInterval(UndefReg);
- }
-
- if (LV) {
- // The optimized Reg is not alive through Flow blocks anymore.
- LiveVariables::VarInfo &OldVarInfo = LV->getVarInfo(Reg);
- OldVarInfo.AliveBlocks.reset(Flow->getNumber());
-
- updateLiveRangeInElseRegion(Reg, NewReg, Flow, Endif, ElseBlocks);
- updateLiveRangeInThenRegion(Reg, If, Flow);
- }
+ // The new PHI is a def of NewReg and a use of Reg and UndefReg; the uses of
+ // Reg in the Else/Endif region were rewritten to NewReg. Kill flags moved
+ // with the rewritten operands may no longer mark the last use, so drop them
+ // and let the recomputed intervals be the source of truth.
+ MRI->clearKillFlags(Reg);
+ MRI->clearKillFlags(NewReg);
+ LIS->InsertMachineInstrInMaps(*PHI);
+ LIS->removeInterval(Reg);
+ LIS->createAndComputeVirtRegInterval(Reg);
+ LIS->createAndComputeVirtRegInterval(NewReg);
+ LIS->createAndComputeVirtRegInterval(UndefReg);
}
void SIOptimizeVGPRLiveRange::optimizeWaterfallLiveRange(
@@ -621,49 +485,11 @@ void SIOptimizeVGPRLiveRange::optimizeWaterfallLiveRange(
PHI.addReg(Reg).addMBB(Pred);
}
- if (LIS) {
- LIS->InsertMachineInstrInMaps(*PHI);
- LIS->removeInterval(Reg);
- LIS->createAndComputeVirtRegInterval(Reg);
- LIS->createAndComputeVirtRegInterval(NewReg);
- LIS->createAndComputeVirtRegInterval(UndefReg);
- }
-
- if (LV) {
- LiveVariables::VarInfo &NewVarInfo = LV->getVarInfo(NewReg);
- LiveVariables::VarInfo &OldVarInfo = LV->getVarInfo(Reg);
-
- // Find last use and mark as kill
- MachineInstr *Kill = nullptr;
- for (auto *MI : reverse(Instructions)) {
- if (MI->readsRegister(NewReg, TRI)) {
- MI->addRegisterKilled(NewReg, TRI);
- NewVarInfo.Kills.push_back(MI);
- Kill = MI;
- break;
- }
- }
- assert(Kill && "Failed to find last usage of register in loop");
-
- MachineBasicBlock *KillBlock = Kill->getParent();
- bool PostKillBlock = false;
- for (auto *Block : Blocks) {
- auto BBNum = Block->getNumber();
-
- // collectWaterfallCandidateRegisters only collects registers that are
- // dead after the loop. So we know that the old reg is no longer live
- // throughout the waterfall loop.
- OldVarInfo.AliveBlocks.reset(BBNum);
-
- // The new register is live up to (and including) the block that kills it.
- PostKillBlock |= (Block == KillBlock);
- if (PostKillBlock) {
- NewVarInfo.AliveBlocks.reset(BBNum);
- } else if (Block != LoopHeader) {
- NewVarInfo.AliveBlocks.set(BBNum);
- }
- }
- }
+ LIS->InsertMachineInstrInMaps(*PHI);
+ LIS->removeInterval(Reg);
+ LIS->createAndComputeVirtRegInterval(Reg);
+ LIS->createAndComputeVirtRegInterval(NewReg);
+ LIS->createAndComputeVirtRegInterval(UndefReg);
}
char SIOptimizeVGPRLiveRangeLegacy::ID = 0;
@@ -672,7 +498,7 @@ INITIALIZE_PASS_BEGIN(SIOptimizeVGPRLiveRangeLegacy, DEBUG_TYPE,
"SI Optimize VGPR LiveRange", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(LiveVariablesWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_END(SIOptimizeVGPRLiveRangeLegacy, DEBUG_TYPE,
"SI Optimize VGPR LiveRange", false, false)
@@ -686,33 +512,28 @@ bool SIOptimizeVGPRLiveRangeLegacy::runOnMachineFunction(MachineFunction &MF) {
if (skipFunction(MF.getFunction()))
return false;
- auto *LISWrapper = getAnalysisIfAvailable<LiveIntervalsWrapperPass>();
- LiveIntervals *LIS = LISWrapper ? &LISWrapper->getLIS() : nullptr;
- LiveVariables *LV = &getAnalysis<LiveVariablesWrapperPass>().getLV();
+ LiveIntervals *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
MachineDominatorTree *MDT =
&getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
MachineLoopInfo *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
- return SIOptimizeVGPRLiveRange(LIS, LV, MDT, Loops).run(MF);
+ return SIOptimizeVGPRLiveRange(LIS, MDT, Loops).run(MF);
}
PreservedAnalyses
SIOptimizeVGPRLiveRangePass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
MFPropsModifier _(*this, MF);
- LiveIntervals *LIS = MFAM.getCachedResult<LiveIntervalsAnalysis>(MF);
- LiveVariables *LV = MFAM.getCachedResult<LiveVariablesAnalysis>(MF);
- if (!LIS && !LV)
- LV = &MFAM.getResult<LiveVariablesAnalysis>(MF);
+ LiveIntervals *LIS = &MFAM.getResult<LiveIntervalsAnalysis>(MF);
MachineDominatorTree *MDT = &MFAM.getResult<MachineDominatorTreeAnalysis>(MF);
MachineLoopInfo *Loops = &MFAM.getResult<MachineLoopAnalysis>(MF);
- bool Changed = SIOptimizeVGPRLiveRange(LIS, LV, MDT, Loops).run(MF);
+ bool Changed = SIOptimizeVGPRLiveRange(LIS, MDT, Loops).run(MF);
if (!Changed)
return PreservedAnalyses::all();
auto PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserve<SlotIndexesAnalysis>();
PA.preserve<LiveIntervalsAnalysis>();
- PA.preserve<LiveVariablesAnalysis>();
PA.preserveSet<CFGAnalyses>();
return PA;
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
index 03f235a1ee26f..01e0ad2d6ea42 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
@@ -343,23 +343,23 @@ define void @divergent_i1_icmp_used_outside_loop(i32 %v0, i32 %v1, ptr addrspace
; GFX10: ; %bb.0: ; %entry
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_mov_b32 s4, 0
-; GFX10-NEXT: s_mov_b32 s6, 0
-; GFX10-NEXT: ; implicit-def: $sgpr7
+; GFX10-NEXT: s_mov_b32 s7, 0
+; GFX10-NEXT: ; implicit-def: $sgpr6
; GFX10-NEXT: s_branch .LBB5_2
; GFX10-NEXT: .LBB5_1: ; %Flow
; GFX10-NEXT: ; in Loop: Header=BB5_2 Depth=1
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX10-NEXT: s_and_b32 s5, exec_lo, s5
-; GFX10-NEXT: s_or_b32 s6, s5, s6
-; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s6
+; GFX10-NEXT: s_or_b32 s7, s5, s7
+; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s7
; GFX10-NEXT: s_cbranch_execz .LBB5_6
; GFX10-NEXT: .LBB5_2: ; %cond.block.0
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, s4, v0
; GFX10-NEXT: v_mov_b32_e32 v4, s4
-; GFX10-NEXT: s_andn2_b32 s5, s7, exec_lo
-; GFX10-NEXT: s_and_b32 s7, exec_lo, vcc_lo
-; GFX10-NEXT: s_or_b32 s7, s5, s7
+; GFX10-NEXT: s_andn2_b32 s5, s6, exec_lo
+; GFX10-NEXT: s_and_b32 s6, exec_lo, vcc_lo
+; GFX10-NEXT: s_or_b32 s6, s5, s6
; GFX10-NEXT: s_and_saveexec_b32 s8, vcc_lo
; GFX10-NEXT: s_cbranch_execz .LBB5_4
; GFX10-NEXT: ; %bb.3: ; %if.block.0
@@ -386,8 +386,8 @@ define void @divergent_i1_icmp_used_outside_loop(i32 %v0, i32 %v1, ptr addrspace
; GFX10-NEXT: s_andn2_b32 s5, s5, exec_lo
; GFX10-NEXT: s_branch .LBB5_1
; GFX10-NEXT: .LBB5_6: ; %cond.block.1
-; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s6
-; GFX10-NEXT: s_and_saveexec_b32 s4, s7
+; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s7
+; GFX10-NEXT: s_and_saveexec_b32 s4, s6
; GFX10-NEXT: s_cbranch_execz .LBB5_8
; GFX10-NEXT: ; %bb.7: ; %if.block.1
; GFX10-NEXT: global_store_dword v[6:7], v4, off
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
index 6f3245a39a9a7..f56b06ca2376d 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
@@ -493,7 +493,7 @@ define amdgpu_ps i32 @irreducible_cfg(i32 %x, i32 %y, i32 %a0, i32 %a1, i32 %a2,
; GFX10-NEXT: .LBB6_1: ; %Flow2
; GFX10-NEXT: ; in Loop: Header=BB6_2 Depth=1
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s6
-; GFX10-NEXT: s_and_b32 s4, exec_lo, s5
+; GFX10-NEXT: s_and_b32 s4, exec_lo, s4
; GFX10-NEXT: s_mov_b32 s0, exec_lo
; GFX10-NEXT: s_or_b32 s1, s4, s1
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s1
@@ -501,9 +501,9 @@ define amdgpu_ps i32 @irreducible_cfg(i32 %x, i32 %y, i32 %a0, i32 %a1, i32 %a2,
; GFX10-NEXT: .LBB6_2: ; %irr.guard
; GFX10-NEXT: ; =>This Loop Header: Depth=1
; GFX10-NEXT: ; Child Loop BB6_6 Depth 2
-; GFX10-NEXT: s_mov_b32 s4, exec_lo
-; GFX10-NEXT: s_and_saveexec_b32 s5, s0
-; GFX10-NEXT: s_xor_b32 s5, exec_lo, s5
+; GFX10-NEXT: s_mov_b32 s5, exec_lo
+; GFX10-NEXT: s_and_saveexec_b32 s4, s0
+; GFX10-NEXT: s_xor_b32 s4, exec_lo, s4
; GFX10-NEXT: ; %bb.3: ; %.loopexit
; GFX10-NEXT: ; in Loop: Header=BB6_2 Depth=1
; GFX10-NEXT: v_cmp_gt_i32_e64 s0, v5, v0
@@ -514,34 +514,34 @@ define amdgpu_ps i32 @irreducible_cfg(i32 %x, i32 %y, i32 %a0, i32 %a1, i32 %a2,
; GFX10-NEXT: s_or_b32 s6, s0, s6
; GFX10-NEXT: s_and_b32 s0, exec_lo, s0
; GFX10-NEXT: s_xor_b32 s6, s6, s7
-; GFX10-NEXT: s_andn2_b32 s4, s4, exec_lo
+; GFX10-NEXT: s_andn2_b32 s5, s5, exec_lo
; GFX10-NEXT: s_and_b32 s6, exec_lo, s6
; GFX10-NEXT: s_or_b32 s3, s3, s0
-; GFX10-NEXT: s_or_b32 s4, s4, s6
+; GFX10-NEXT: s_or_b32 s5, s5, s6
; GFX10-NEXT: ; %bb.4: ; %Flow1
; GFX10-NEXT: ; in Loop: Header=BB6_2 Depth=1
-; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s5
+; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_andn2_b32 s0, s2, exec_lo
; GFX10-NEXT: s_and_b32 s2, exec_lo, s3
-; GFX10-NEXT: s_mov_b32 s5, exec_lo
+; GFX10-NEXT: s_mov_b32 s4, exec_lo
; GFX10-NEXT: s_or_b32 s2, s0, s2
-; GFX10-NEXT: s_and_saveexec_b32 s6, s4
+; GFX10-NEXT: s_and_saveexec_b32 s6, s5
; GFX10-NEXT: s_cbranch_execz .LBB6_1
; GFX10-NEXT: ; %bb.5: ; %.preheader
; GFX10-NEXT: ; in Loop: Header=BB6_2 Depth=1
; GFX10-NEXT: v_cmp_le_i32_e64 s0, v4, v0
-; GFX10-NEXT: s_mov_b32 s4, 0
+; GFX10-NEXT: s_mov_b32 s5, 0
; GFX10-NEXT: .LBB6_6: ; %.inner_loop
; GFX10-NEXT: ; Parent Loop BB6_2 Depth=1
; GFX10-NEXT: ; => This Inner Loop Header: Depth=2
; GFX10-NEXT: s_and_b32 s7, exec_lo, s0
-; GFX10-NEXT: s_or_b32 s4, s7, s4
-; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
+; GFX10-NEXT: s_or_b32 s5, s7, s5
+; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s5
; GFX10-NEXT: s_cbranch_execnz .LBB6_6
; GFX10-NEXT: ; %bb.7: ; %Flow
; GFX10-NEXT: ; in Loop: Header=BB6_2 Depth=1
-; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: s_andn2_b32 s5, s5, exec_lo
+; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s5
+; GFX10-NEXT: s_andn2_b32 s4, s4, exec_lo
; GFX10-NEXT: s_branch .LBB6_1
; GFX10-NEXT: .LBB6_8: ; %.exit
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s1
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
index 9ccbeee37a03a..ef059e0ab3042 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
@@ -7,33 +7,33 @@ define amdgpu_kernel void @v3i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
; GFX906-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX906-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX906-NEXT: v_lshlrev_b32_e32 v2, 2, v0
-; GFX906-NEXT: v_mov_b32_e32 v3, 8
+; GFX906-NEXT: v_mov_b32_e32 v4, 8
; GFX906-NEXT: v_mov_b32_e32 v5, 16
; GFX906-NEXT: s_waitcnt lgkmcnt(0)
-; GFX906-NEXT: global_load_dword v4, v2, s[0:1]
+; GFX906-NEXT: global_load_dword v3, v2, s[0:1]
; GFX906-NEXT: v_mov_b32_e32 v1, 0xff
; GFX906-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0
; GFX906-NEXT: s_waitcnt vmcnt(0)
-; GFX906-NEXT: v_and_b32_e32 v6, 0xff, v4
-; GFX906-NEXT: v_lshlrev_b32_sdwa v7, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-; GFX906-NEXT: v_lshlrev_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-; GFX906-NEXT: v_or3_b32 v4, v6, v7, v4
+; GFX906-NEXT: v_and_b32_e32 v6, 0xff, v3
+; GFX906-NEXT: v_lshlrev_b32_sdwa v7, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+; GFX906-NEXT: v_lshlrev_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+; GFX906-NEXT: v_or3_b32 v3, v6, v7, v3
; GFX906-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX906-NEXT: s_cbranch_execz .LBB0_2
; GFX906-NEXT: ; %bb.1: ; %bb.1
; GFX906-NEXT: global_load_dword v0, v2, s[2:3]
; GFX906-NEXT: s_waitcnt vmcnt(0)
; GFX906-NEXT: v_and_b32_e32 v2, 0xff, v0
-; GFX906-NEXT: v_lshlrev_b32_sdwa v3, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+; GFX906-NEXT: v_lshlrev_b32_sdwa v3, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX906-NEXT: v_lshlrev_b32_sdwa v0, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-; GFX906-NEXT: v_or3_b32 v4, v2, v3, v0
+; GFX906-NEXT: v_or3_b32 v3, v2, v3, v0
; GFX906-NEXT: .LBB0_2: ; %bb.2
; GFX906-NEXT: s_or_b64 exec, exec, s[0:1]
-; GFX906-NEXT: v_lshrrev_b32_e32 v0, 8, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX906-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX906-NEXT: v_lshlrev_b16_e32 v0, 8, v0
-; GFX906-NEXT: v_or_b32_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-; GFX906-NEXT: v_and_b32_sdwa v1, v4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX906-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX906-NEXT: v_mov_b32_e32 v1, 0
; GFX906-NEXT: global_store_short v1, v0, s[6:7]
diff --git a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
index 8c40ac8221e32..09e2b23a51605 100644
--- a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
+++ b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
@@ -376,47 +376,47 @@ define void @flat_atomic_cmpxchg_i64_ret_av_av__av(ptr %ptr) #0 {
; CHECK-LABEL: flat_atomic_cmpxchg_i64_ret_av_av__av:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CHECK-NEXT: v_add_co_u32_e32 v4, vcc, 0x50, v0
+; CHECK-NEXT: v_add_co_u32_e32 v6, vcc, 0x50, v0
; CHECK-NEXT: s_mov_b64 s[4:5], src_private_base
-; CHECK-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; CHECK-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v1, vcc
+; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v7
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[2:3]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[0:1]
; CHECK-NEXT: ;;#ASMEND
-; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
+; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc
; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB12_2
; CHECK-NEXT: ; %bb.1: ; %atomicrmw.global
; CHECK-NEXT: buffer_wbl2
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: flat_atomic_cmpswap_x2 v[6:7], v[4:5], v[0:3] glc
+; CHECK-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[6:7], v[0:3] glc
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: buffer_invl2
; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
+; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
; CHECK-NEXT: ; implicit-def: $vgpr2_vgpr3
; CHECK-NEXT: .LBB12_2: ; %Flow
; CHECK-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB12_4
; CHECK-NEXT: ; %bb.3: ; %atomicrmw.private
-; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
-; CHECK-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
-; CHECK-NEXT: buffer_load_dword v6, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_load_dword v7, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7]
+; CHECK-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
+; CHECK-NEXT: buffer_load_dword v4, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_load_dword v5, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]
-; CHECK-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
-; CHECK-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc
-; CHECK-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[2:3]
+; CHECK-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
+; CHECK-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc
+; CHECK-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: .LBB12_4: ; %atomicrmw.phi
; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
; CHECK-NEXT: ;;#ASMSTART
-; CHECK-NEXT: ; use v[6:7]
+; CHECK-NEXT: ; use v[4:5]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
@@ -433,47 +433,47 @@ define void @flat_atomic_cmpxchg_i64_ret_av_av__v(ptr %ptr) #0 {
; CHECK-LABEL: flat_atomic_cmpxchg_i64_ret_av_av__v:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CHECK-NEXT: v_add_co_u32_e32 v4, vcc, 0x50, v0
+; CHECK-NEXT: v_add_co_u32_e32 v6, vcc, 0x50, v0
; CHECK-NEXT: s_mov_b64 s[4:5], src_private_base
-; CHECK-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; CHECK-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v1, vcc
+; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v7
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[2:3]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[0:1]
; CHECK-NEXT: ;;#ASMEND
-; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
+; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc
; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB13_2
; CHECK-NEXT: ; %bb.1: ; %atomicrmw.global
; CHECK-NEXT: buffer_wbl2
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: flat_atomic_cmpswap_x2 v[6:7], v[4:5], v[0:3] glc
+; CHECK-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[6:7], v[0:3] glc
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: buffer_invl2
; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
+; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
; CHECK-NEXT: ; implicit-def: $vgpr2_vgpr3
; CHECK-NEXT: .LBB13_2: ; %Flow
; CHECK-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB13_4
; CHECK-NEXT: ; %bb.3: ; %atomicrmw.private
-; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
-; CHECK-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
-; CHECK-NEXT: buffer_load_dword v6, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_load_dword v7, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7]
+; CHECK-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
+; CHECK-NEXT: buffer_load_dword v4, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_load_dword v5, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]
-; CHECK-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
-; CHECK-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc
-; CHECK-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[2:3]
+; CHECK-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
+; CHECK-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc
+; CHECK-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: .LBB13_4: ; %atomicrmw.phi
; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
; CHECK-NEXT: ;;#ASMSTART
-; CHECK-NEXT: ; use v[6:7]
+; CHECK-NEXT: ; use v[4:5]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
@@ -875,47 +875,47 @@ define void @flat_atomic_cmpxchg_i64_ret_av_v__av(ptr %ptr) #0 {
; CHECK-LABEL: flat_atomic_cmpxchg_i64_ret_av_v__av:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CHECK-NEXT: v_add_co_u32_e32 v4, vcc, 0x50, v0
+; CHECK-NEXT: v_add_co_u32_e32 v6, vcc, 0x50, v0
; CHECK-NEXT: s_mov_b64 s[4:5], src_private_base
-; CHECK-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; CHECK-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v1, vcc
+; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v7
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[2:3]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[0:1]
; CHECK-NEXT: ;;#ASMEND
-; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
+; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc
; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB20_2
; CHECK-NEXT: ; %bb.1: ; %atomicrmw.global
; CHECK-NEXT: buffer_wbl2
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: flat_atomic_cmpswap_x2 v[6:7], v[4:5], v[0:3] glc
+; CHECK-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[6:7], v[0:3] glc
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: buffer_invl2
; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
+; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
; CHECK-NEXT: ; implicit-def: $vgpr2_vgpr3
; CHECK-NEXT: .LBB20_2: ; %Flow
; CHECK-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB20_4
; CHECK-NEXT: ; %bb.3: ; %atomicrmw.private
-; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
-; CHECK-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
-; CHECK-NEXT: buffer_load_dword v6, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_load_dword v7, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7]
+; CHECK-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
+; CHECK-NEXT: buffer_load_dword v4, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_load_dword v5, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]
-; CHECK-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
-; CHECK-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc
-; CHECK-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[2:3]
+; CHECK-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
+; CHECK-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc
+; CHECK-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: .LBB20_4: ; %atomicrmw.phi
; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
; CHECK-NEXT: ;;#ASMSTART
-; CHECK-NEXT: ; use v[6:7]
+; CHECK-NEXT: ; use v[4:5]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
@@ -932,47 +932,47 @@ define void @flat_atomic_cmpxchg_i64_ret_v_av__av(ptr %ptr) #0 {
; CHECK-LABEL: flat_atomic_cmpxchg_i64_ret_v_av__av:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CHECK-NEXT: v_add_co_u32_e32 v4, vcc, 0x50, v0
+; CHECK-NEXT: v_add_co_u32_e32 v6, vcc, 0x50, v0
; CHECK-NEXT: s_mov_b64 s[4:5], src_private_base
-; CHECK-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; CHECK-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v1, vcc
+; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s5, v7
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[2:3]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: ; def v[0:1]
; CHECK-NEXT: ;;#ASMEND
-; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
+; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc
; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB21_2
; CHECK-NEXT: ; %bb.1: ; %atomicrmw.global
; CHECK-NEXT: buffer_wbl2
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: flat_atomic_cmpswap_x2 v[6:7], v[4:5], v[0:3] glc
+; CHECK-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[6:7], v[0:3] glc
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: buffer_invl2
; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5
+; CHECK-NEXT: ; implicit-def: $vgpr6_vgpr7
; CHECK-NEXT: ; implicit-def: $vgpr2_vgpr3
; CHECK-NEXT: .LBB21_2: ; %Flow
; CHECK-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; CHECK-NEXT: s_cbranch_execz .LBB21_4
; CHECK-NEXT: ; %bb.3: ; %atomicrmw.private
-; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
-; CHECK-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
-; CHECK-NEXT: buffer_load_dword v6, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_load_dword v7, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7]
+; CHECK-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
+; CHECK-NEXT: buffer_load_dword v4, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_load_dword v5, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[6:7], v[2:3]
-; CHECK-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
-; CHECK-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc
-; CHECK-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen
-; CHECK-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen offset:4
+; CHECK-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[2:3]
+; CHECK-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
+; CHECK-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc
+; CHECK-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
+; CHECK-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen offset:4
; CHECK-NEXT: .LBB21_4: ; %atomicrmw.phi
; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
; CHECK-NEXT: ;;#ASMSTART
-; CHECK-NEXT: ; use v[6:7]
+; CHECK-NEXT: ; use v[4:5]
; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
index cb59bb925aab0..3fc898dc2a11c 100644
--- a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
+++ b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
@@ -14814,18 +14814,18 @@ define void @flat_atomic_add_i64_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-NEXT: s_cselect_b32 s2, 1, 0
; GFX950-NEXT: s_cmp_lg_u32 s2, 1
; GFX950-NEXT: ;;#ASMSTART
-; GFX950-NEXT: ; def v[0:1]
+; GFX950-NEXT: ; def v[2:3]
; GFX950-NEXT: ;;#ASMEND
; GFX950-NEXT: s_cbranch_scc0 .LBB196_2
; GFX950-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
-; GFX950-NEXT: flat_atomic_add_x2 v[2:3], v[2:3], v[0:1] sc0
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
+; GFX950-NEXT: flat_atomic_add_x2 v[0:1], v[0:1], v[2:3] sc0
; GFX950-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-NEXT: s_mov_b64 s[2:3], 0
; GFX950-NEXT: s_branch .LBB196_3
; GFX950-NEXT: .LBB196_2:
; GFX950-NEXT: s_mov_b64 s[2:3], -1
-; GFX950-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX950-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX950-NEXT: .LBB196_3: ; %Flow
; GFX950-NEXT: s_and_b64 s[2:3], s[2:3], exec
; GFX950-NEXT: s_cselect_b32 s2, 1, 0
@@ -14834,14 +14834,14 @@ define void @flat_atomic_add_i64_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-NEXT: ; %bb.4: ; %atomicrmw.private
; GFX950-NEXT: s_cmp_lg_u64 s[0:1], 0
; GFX950-NEXT: s_cselect_b32 s0, s0, -1
-; GFX950-NEXT: scratch_load_dwordx2 v[2:3], off, s0
+; GFX950-NEXT: scratch_load_dwordx2 v[0:1], off, s0
; GFX950-NEXT: s_waitcnt vmcnt(0)
-; GFX950-NEXT: v_lshl_add_u64 v[0:1], v[2:3], 0, v[0:1]
-; GFX950-NEXT: scratch_store_dwordx2 off, v[0:1], s0
+; GFX950-NEXT: v_lshl_add_u64 v[2:3], v[0:1], 0, v[2:3]
+; GFX950-NEXT: scratch_store_dwordx2 off, v[2:3], s0
; GFX950-NEXT: .LBB196_5: ; %atomicrmw.end
; GFX950-NEXT: s_waitcnt vmcnt(0)
; GFX950-NEXT: ;;#ASMSTART
-; GFX950-NEXT: ; use v[2:3]
+; GFX950-NEXT: ; use v[0:1]
; GFX950-NEXT: ;;#ASMEND
; GFX950-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x i64], ptr %ptr, i64 0, i64 10
diff --git a/llvm/test/CodeGen/AMDGPU/absdiff.ll b/llvm/test/CodeGen/AMDGPU/absdiff.ll
index e206b4341a096..d97a16ff189c1 100644
--- a/llvm/test/CodeGen/AMDGPU/absdiff.ll
+++ b/llvm/test/CodeGen/AMDGPU/absdiff.ll
@@ -5,15 +5,15 @@
define amdgpu_gs float @absdiff_valu_input_regression() {
; CHECK-LABEL: absdiff_valu_input_regression:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_mov_b32 s0, 0
+; CHECK-NEXT: s_mov_b32 s1, 0
; CHECK-NEXT: .LBB0_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: s_mov_b32 s1, s0
-; CHECK-NEXT: s_or_b32 s0, s0, 1
-; CHECK-NEXT: s_cmp_gt_i32 s1, 0
+; CHECK-NEXT: s_mov_b32 s0, s1
+; CHECK-NEXT: s_or_b32 s1, s1, 1
+; CHECK-NEXT: s_cmp_gt_i32 s0, 0
; CHECK-NEXT: s_cbranch_scc1 .LBB0_1
; CHECK-NEXT: ; %bb.2: ; %bb11
-; CHECK-NEXT: v_med3_i32 v0, s1, 0, 1
+; CHECK-NEXT: v_med3_i32 v0, s0, 0, 1
; CHECK-NEXT: v_sub_u32_e32 v0, 0, v0
; CHECK-NEXT: v_sub_u32_e32 v1, 0, v0
; CHECK-NEXT: v_max_i32_e32 v0, v0, v1
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index f1870654d71d3..df6d9d183eeaf 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -5285,124 +5285,124 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
@@ -5516,106 +5516,106 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[15:16]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
; VI-NEXT: v_mov_b32_e32 v55, v39
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v1
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; VI-NEXT: .LBB12_2: ; %Flow
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
@@ -5732,191 +5732,193 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5
-; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3
; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v1
; VI-NEXT: .LBB12_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v11, v11, v48, s4
-; VI-NEXT: v_perm_b32 v3, v3, v33, s4
-; VI-NEXT: v_perm_b32 v33, v50, v39, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v34, s4
+; VI-NEXT: v_perm_b32 v34, v62, v39, s4
; VI-NEXT: v_perm_b32 v39, v49, v53, s4
-; VI-NEXT: v_perm_b32 v49, v57, v52, s4
-; VI-NEXT: v_perm_b32 v34, v34, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; VI-NEXT: v_or_b32_e32 v1, v1, v34
-; VI-NEXT: v_perm_b32 v2, v2, v61, s4
-; VI-NEXT: v_perm_b32 v40, v59, v40, s4
+; VI-NEXT: v_perm_b32 v6, v6, v50, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v41, v61, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v35, s4
+; VI-NEXT: v_perm_b32 v33, v33, v40, s4
+; VI-NEXT: v_perm_b32 v3, v3, v59, s4
; VI-NEXT: v_perm_b32 v4, v4, v58, s4
-; VI-NEXT: v_perm_b32 v5, v5, v43, s4
-; VI-NEXT: v_perm_b32 v6, v6, v62, s4
-; VI-NEXT: v_perm_b32 v37, v37, v54, s4
-; VI-NEXT: v_perm_b32 v7, v7, v56, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v35, v60, v54, s4
+; VI-NEXT: v_perm_b32 v7, v7, v43, s4
; VI-NEXT: v_perm_b32 v8, v8, v47, s4
; VI-NEXT: v_perm_b32 v9, v9, v46, s4
; VI-NEXT: v_perm_b32 v10, v10, v45, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v12, v12, v38, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v13, v48, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v12, v12, v48, s4
; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v38, v51, s4
+; VI-NEXT: v_perm_b32 v13, v13, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v48, v51, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v14, v14, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v48, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v49, v49, v50, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v15, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v38, v52, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v50, v50, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v17, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v18, v18, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v51, v51, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v41
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v60, v44, s4
+; VI-NEXT: v_perm_b32 v1, v44, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_perm_b32 v3, v20, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_perm_b32 v51, v51, v52, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -5925,38 +5927,38 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v51
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -5965,16 +5967,13 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v1, v36, v35, s4
+; VI-NEXT: v_perm_b32 v1, v57, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_perm_b32 v1, v19, v63, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v20, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
@@ -6206,40 +6205,86 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(25)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
@@ -6292,244 +6337,205 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB12_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: s_waitcnt vmcnt(24)
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v11
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v4
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v9
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: .LBB12_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v53, v50
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB12_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_add_u32_e32 v32, 3, v32
-; GFX9-NEXT: s_waitcnt vmcnt(22)
+; GFX9-NEXT: s_waitcnt vmcnt(24)
; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
@@ -6592,264 +6598,268 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; GFX9-NEXT: v_add_u32_e32 v8, 3, v8
+; GFX9-NEXT: v_add_u32_e32 v7, 3, v7
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; GFX9-NEXT: v_add_u32_e32 v10, 3, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX9-NEXT: v_add_u32_e32 v9, 3, v9
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: v_add_u32_e32 v10, 3, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: v_add_u32_e32 v8, 3, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: v_add_u32_e32 v6, 3, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v9
; GFX9-NEXT: v_add_u32_e32 v4, 3, v4
+; GFX9-NEXT: v_add_u32_e32 v6, 3, v6
; GFX9-NEXT: v_add_u32_e32 v5, 3, v5
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_add_u32_e32 v3, 3, v3
-; GFX9-NEXT: v_add_u32_e32 v9, 3, v9
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v4
; GFX9-NEXT: v_add_u32_e32 v2, 3, v2
; GFX9-NEXT: v_add_u32_e32 v1, 3, v1
-; GFX9-NEXT: v_add_u32_e32 v7, 3, v7
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v6
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v2
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v3
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB12_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v8, v8, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v33, v34, v53, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v7, v7, v50, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v49, s4
+; GFX9-NEXT: v_perm_b32 v36, v36, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v5, v5, v51, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v53, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4
-; GFX9-NEXT: v_perm_b32 v41, v63, v41, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v46, s4
+; GFX9-NEXT: v_perm_b32 v52, v45, v40, s4
+; GFX9-NEXT: v_perm_b32 v41, v47, v41, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v47, s4
-; GFX9-NEXT: v_perm_b32 v38, v38, v40, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v46, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v45, s4
-; GFX9-NEXT: v_perm_b32 v39, v58, v39, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
-; GFX9-NEXT: v_perm_b32 v36, v56, v54, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v43, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v62, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v35, v35, v50, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v10, v10, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v8, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v11, v11, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v10, v10, v34, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v34, v34, v49, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v34, v34, v54, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v12, v12, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_perm_b32 v53, v61, v53, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v17, v17, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v14, v14, v51, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v50, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v35, v35, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v51, v58, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v49, v50, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v51, v49, v51, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v52, v57, v52, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v49, s4
+; GFX9-NEXT: v_perm_b32 v33, v33, v45, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v49, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v54, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -6858,147 +6868,146 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v1, v44, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v38, v63, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: v_perm_b32 v1, v55, v42, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v48, v37, s4
+; GFX9-NEXT: v_perm_b32 v1, v37, v48, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v19, v62, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v49, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; GFX9-NEXT: v_perm_b32 v1, v20, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v59, s4
+; GFX9-NEXT: v_perm_b32 v2, v59, v44, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v21, v57, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
@@ -8181,8 +8190,8 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b32 s80, s21, 24
; SI-NEXT: s_lshr_b32 s39, s21, 16
; SI-NEXT: s_lshr_b32 s49, s21, 8
-; SI-NEXT: s_lshr_b32 s51, s19, 24
-; SI-NEXT: s_lshr_b32 s82, s19, 16
+; SI-NEXT: s_lshr_b32 s82, s19, 24
+; SI-NEXT: s_lshr_b32 s51, s19, 16
; SI-NEXT: s_lshr_b32 s84, s19, 8
; SI-NEXT: s_lshr_b32 s53, s17, 24
; SI-NEXT: s_lshr_b32 s55, s17, 16
@@ -8206,8 +8215,8 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr80
@@ -8557,8 +8566,8 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b32 s80, s21, 24
; SI-NEXT: s_lshr_b32 s39, s21, 16
; SI-NEXT: s_lshr_b32 s49, s21, 8
-; SI-NEXT: s_lshr_b32 s51, s19, 24
-; SI-NEXT: s_lshr_b32 s82, s19, 16
+; SI-NEXT: s_lshr_b32 s82, s19, 24
+; SI-NEXT: s_lshr_b32 s51, s19, 16
; SI-NEXT: s_lshr_b32 s84, s19, 8
; SI-NEXT: s_lshr_b32 s53, s17, 24
; SI-NEXT: s_lshr_b32 s55, s17, 16
@@ -8601,9 +8610,9 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s19, 0xff
; SI-NEXT: s_lshl_b32 s17, s84, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s82, 0xff
+; SI-NEXT: s_and_b32 s17, s51, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s51, 24
+; SI-NEXT: s_lshl_b32 s18, s82, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -9124,184 +9133,181 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB13_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: v_writelane_b32 v34, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: v_writelane_b32 v34, s46, 4
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 7
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 9
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: v_writelane_b32 v34, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: v_writelane_b32 v34, s46, 12
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 14
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: v_writelane_b32 v34, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 17
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: v_writelane_b32 v34, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: v_writelane_b32 v34, s46, 19
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: v_writelane_b32 v34, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: v_writelane_b32 v34, s46, 22
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: v_writelane_b32 v34, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: v_writelane_b32 v34, s46, 24
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: v_writelane_b32 v34, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: v_writelane_b32 v34, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: v_writelane_b32 v34, s46, 27
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: v_writelane_b32 v34, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: v_writelane_b32 v34, s46, 29
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: v_writelane_b32 v34, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: v_writelane_b32 v34, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: v_writelane_b32 v34, s46, 32
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: v_writelane_b32 v34, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: v_writelane_b32 v34, s46, 34
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v34, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: v_writelane_b32 v34, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: v_writelane_b32 v34, s46, 37
; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s29, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s28, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: v_writelane_b32 v33, s46, 54
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s27, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: v_writelane_b32 v33, s46, 56
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 59
+; VI-NEXT: v_writelane_b32 v33, s46, 57
; VI-NEXT: s_lshr_b32 s46, s24, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 60
+; VI-NEXT: v_writelane_b32 v33, s46, 58
; VI-NEXT: s_lshr_b32 s46, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s23, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 61
+; VI-NEXT: v_writelane_b32 v33, s46, 59
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 62
+; VI-NEXT: v_writelane_b32 v33, s46, 60
; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s21, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 63
+; VI-NEXT: v_writelane_b32 v33, s46, 61
; VI-NEXT: s_lshr_b32 s46, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s20, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: v_writelane_b32 v33, s46, 62
; VI-NEXT: s_lshr_b32 s46, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s19, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 1
+; VI-NEXT: v_writelane_b32 v33, s46, 63
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: v_writelane_b32 v34, s46, 0
; VI-NEXT: s_lshr_b32 s46, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 1
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 55
+; VI-NEXT: v_writelane_b32 v33, s46, 53
; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: v_writelane_b32 v34, s46, 2
; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
-; VI-NEXT: v_writelane_b32 v33, s47, 23
-; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: v_writelane_b32 v33, s47, 21
-; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: v_writelane_b32 v33, s47, 19
-; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: v_writelane_b32 v33, s47, 17
-; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: v_writelane_b32 v33, s47, 15
-; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: v_writelane_b32 v33, s47, 13
-; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: v_writelane_b32 v33, s47, 11
; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
@@ -9310,19 +9316,20 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: v_writelane_b32 v33, s47, 7
-; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[22:23], 24
; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: v_writelane_b32 v33, s47, 5
-; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: v_writelane_b32 v33, s47, 3
-; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
-; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
; VI-NEXT: v_writelane_b32 v33, s47, 1
+; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
; VI-NEXT: s_mov_b64 s[48:49], 0
; VI-NEXT: s_branch .LBB13_3
; VI-NEXT: .LBB13_2:
@@ -9331,9 +9338,10 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr88
; VI-NEXT: ; implicit-def: $sgpr76
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
@@ -9524,531 +9532,524 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: v_writelane_b32 v33, s47, 21
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: v_writelane_b32 v33, s46, 22
-; VI-NEXT: v_writelane_b32 v33, s47, 23
; VI-NEXT: .LBB13_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[48:49], exec
; VI-NEXT: s_cselect_b32 s46, 1, 0
; VI-NEXT: s_cmp_lg_u32 s46, 1
-; VI-NEXT: v_readlane_b32 s75, v33, 24
-; VI-NEXT: v_readlane_b32 s34, v33, 25
-; VI-NEXT: v_readlane_b32 s35, v33, 26
-; VI-NEXT: v_readlane_b32 s39, v33, 27
-; VI-NEXT: v_readlane_b32 s49, v33, 28
-; VI-NEXT: v_readlane_b32 s51, v33, 29
-; VI-NEXT: v_readlane_b32 s47, v33, 30
-; VI-NEXT: v_readlane_b32 s53, v33, 31
-; VI-NEXT: v_readlane_b32 s59, v33, 32
-; VI-NEXT: v_readlane_b32 s56, v33, 33
-; VI-NEXT: v_readlane_b32 s38, v33, 34
-; VI-NEXT: v_readlane_b32 s84, v33, 35
-; VI-NEXT: v_readlane_b32 s48, v33, 36
-; VI-NEXT: v_readlane_b32 s50, v33, 37
-; VI-NEXT: v_readlane_b32 s52, v33, 38
-; VI-NEXT: v_readlane_b32 s54, v33, 39
-; VI-NEXT: v_readlane_b32 s55, v33, 40
-; VI-NEXT: v_readlane_b32 s64, v33, 41
-; VI-NEXT: v_readlane_b32 s65, v33, 42
-; VI-NEXT: v_readlane_b32 s66, v33, 43
-; VI-NEXT: v_readlane_b32 s67, v33, 44
-; VI-NEXT: v_readlane_b32 s68, v33, 45
-; VI-NEXT: v_readlane_b32 s46, v33, 46
-; VI-NEXT: v_readlane_b32 s69, v33, 47
-; VI-NEXT: v_readlane_b32 s80, v33, 48
-; VI-NEXT: v_readlane_b32 s81, v33, 49
-; VI-NEXT: v_readlane_b32 s82, v33, 50
-; VI-NEXT: v_readlane_b32 s83, v33, 51
-; VI-NEXT: v_readlane_b32 s85, v33, 52
-; VI-NEXT: v_readlane_b32 s86, v33, 53
-; VI-NEXT: v_readlane_b32 s88, v33, 54
-; VI-NEXT: v_readlane_b32 s87, v33, 55
-; VI-NEXT: v_readlane_b32 s58, v33, 56
-; VI-NEXT: v_readlane_b32 s89, v33, 57
-; VI-NEXT: v_readlane_b32 s90, v33, 58
-; VI-NEXT: v_readlane_b32 s91, v33, 59
-; VI-NEXT: v_readlane_b32 s57, v33, 60
-; VI-NEXT: v_readlane_b32 s60, v33, 61
-; VI-NEXT: v_readlane_b32 s61, v33, 62
-; VI-NEXT: v_readlane_b32 vcc_lo, v33, 63
-; VI-NEXT: v_readlane_b32 s62, v34, 0
-; VI-NEXT: v_readlane_b32 s63, v34, 1
-; VI-NEXT: v_readlane_b32 vcc_hi, v34, 2
-; VI-NEXT: v_readlane_b32 s30, v34, 3
-; VI-NEXT: v_readlane_b32 s31, v34, 4
-; VI-NEXT: v_readlane_b32 s70, v33, 8
-; VI-NEXT: v_readlane_b32 s71, v33, 9
+; VI-NEXT: v_readlane_b32 s48, v33, 22
+; VI-NEXT: v_readlane_b32 s49, v33, 23
+; VI-NEXT: v_readlane_b32 s73, v33, 24
+; VI-NEXT: v_readlane_b32 s47, v33, 25
+; VI-NEXT: v_readlane_b32 s51, v33, 26
+; VI-NEXT: v_readlane_b32 s54, v33, 27
+; VI-NEXT: v_readlane_b32 s52, v33, 28
+; VI-NEXT: v_readlane_b32 s64, v33, 29
+; VI-NEXT: v_readlane_b32 s59, v33, 30
+; VI-NEXT: v_readlane_b32 s86, v33, 31
+; VI-NEXT: v_readlane_b32 s37, v33, 32
+; VI-NEXT: v_readlane_b32 s75, v33, 33
+; VI-NEXT: v_readlane_b32 s50, v33, 34
+; VI-NEXT: v_readlane_b32 s53, v33, 35
+; VI-NEXT: v_readlane_b32 s55, v33, 36
+; VI-NEXT: v_readlane_b32 s65, v33, 37
+; VI-NEXT: v_readlane_b32 s66, v33, 38
+; VI-NEXT: v_readlane_b32 s67, v33, 39
+; VI-NEXT: v_readlane_b32 s68, v33, 40
+; VI-NEXT: v_readlane_b32 s46, v33, 41
+; VI-NEXT: v_readlane_b32 s69, v33, 42
+; VI-NEXT: v_readlane_b32 s80, v33, 43
+; VI-NEXT: v_readlane_b32 s81, v33, 44
+; VI-NEXT: v_readlane_b32 s82, v33, 45
+; VI-NEXT: v_readlane_b32 s83, v33, 46
+; VI-NEXT: v_readlane_b32 s56, v33, 47
+; VI-NEXT: v_readlane_b32 s84, v33, 48
+; VI-NEXT: v_readlane_b32 s85, v33, 49
+; VI-NEXT: v_readlane_b32 s87, v33, 50
+; VI-NEXT: v_readlane_b32 s90, v33, 51
+; VI-NEXT: v_readlane_b32 s91, v33, 52
+; VI-NEXT: v_readlane_b32 s58, v33, 53
+; VI-NEXT: v_readlane_b32 vcc_lo, v33, 54
+; VI-NEXT: v_readlane_b32 vcc_hi, v33, 55
+; VI-NEXT: v_readlane_b32 s57, v33, 56
+; VI-NEXT: v_readlane_b32 s60, v33, 57
+; VI-NEXT: v_readlane_b32 s61, v33, 58
+; VI-NEXT: v_readlane_b32 s30, v33, 59
+; VI-NEXT: v_readlane_b32 s62, v33, 60
+; VI-NEXT: v_readlane_b32 s63, v33, 61
+; VI-NEXT: v_readlane_b32 s31, v33, 62
+; VI-NEXT: v_readlane_b32 s34, v33, 63
+; VI-NEXT: v_readlane_b32 s35, v34, 0
+; VI-NEXT: v_readlane_b32 s36, v34, 1
+; VI-NEXT: v_readlane_b32 s72, v34, 2
+; VI-NEXT: v_readlane_b32 s70, v33, 6
+; VI-NEXT: v_readlane_b32 s71, v33, 7
; VI-NEXT: s_cbranch_scc1 .LBB13_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s5, s5, 3
-; VI-NEXT: s_lshr_b32 s46, s5, 24
; VI-NEXT: s_add_i32 s4, s4, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: v_writelane_b32 v34, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 16
; VI-NEXT: s_add_i32 s7, s7, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: v_writelane_b32 v34, s46, 4
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: s_add_i32 s6, s6, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 7
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: s_add_i32 s9, s9, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 9
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: v_writelane_b32 v34, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 16
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: v_writelane_b32 v34, s46, 12
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 16
; VI-NEXT: s_add_i32 s11, s11, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 14
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: v_writelane_b32 v34, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 22
; VI-NEXT: s_add_i32 s10, s10, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 17
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s73, 23
-; VI-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 20
+; VI-NEXT: v_writelane_b32 v33, s74, 20
; VI-NEXT: s_add_i32 s13, s13, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: v_writelane_b32 v34, s46, 19
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s73, 21
-; VI-NEXT: s_lshr_b64 s[72:73], s[8:9], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s75, 21
+; VI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s72, 18
-; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s74, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v33, s73, 19
-; VI-NEXT: s_lshr_b64 s[72:73], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v33, s75, 19
+; VI-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
; VI-NEXT: s_add_i32 s12, s12, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: v_writelane_b32 v34, s46, 22
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s72, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s74, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s73, 17
-; VI-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v33, s75, 17
+; VI-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
; VI-NEXT: s_add_i32 s15, s15, 3
-; VI-NEXT: s_add_i32 s14, s14, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: v_writelane_b32 v34, s46, 24
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s72, 14
-; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s74, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s73, 15
-; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24
-; VI-NEXT: s_add_i32 s29, s29, 3
-; VI-NEXT: s_add_i32 s28, s28, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s75, 15
+; VI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; VI-NEXT: s_add_i32 s14, s14, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 12
-; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s74, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 27
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s73, 13
-; VI-NEXT: s_lshr_b64 s[70:71], s[28:29], 24
-; VI-NEXT: s_add_i32 s25, s25, 3
-; VI-NEXT: s_add_i32 s24, s24, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s75, 13
+; VI-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; VI-NEXT: s_add_i32 s27, s27, 3
+; VI-NEXT: s_add_i32 s26, s26, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s70, 10
+; VI-NEXT: v_writelane_b32 v33, s74, 10
; VI-NEXT: s_add_i32 s41, s41, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: v_writelane_b32 v34, s46, 29
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s71, 11
-; VI-NEXT: s_lshr_b64 s[36:37], s[24:25], 24
-; VI-NEXT: s_add_i32 s21, s21, 3
-; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s75, 11
+; VI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24
+; VI-NEXT: s_add_i32 s23, s23, 3
+; VI-NEXT: s_add_i32 s22, s22, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s36, 6
-; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s70, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v33, s37, 7
-; VI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
-; VI-NEXT: s_add_i32 s19, s19, 3
-; VI-NEXT: s_add_i32 s18, s18, 3
+; VI-NEXT: v_writelane_b32 v33, s71, 9
+; VI-NEXT: s_lshr_b64 s[38:39], s[22:23], 24
+; VI-NEXT: s_add_i32 s21, s21, 3
+; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s40, s40, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: v_writelane_b32 v34, s46, 32
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s72, 4
+; VI-NEXT: v_writelane_b32 v33, s38, 4
; VI-NEXT: s_add_i32 s43, s43, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: v_writelane_b32 v34, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v33, s73, 5
-; VI-NEXT: s_lshr_b64 s[72:73], s[18:19], 24
+; VI-NEXT: v_writelane_b32 v33, s39, 5
+; VI-NEXT: s_lshr_b64 s[38:39], s[20:21], 24
+; VI-NEXT: s_add_i32 s19, s19, 3
+; VI-NEXT: s_add_i32 s18, s18, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v33, s38, 2
+; VI-NEXT: s_add_i32 s29, s29, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: v_writelane_b32 v33, s39, 3
+; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_writelane_b32 v34, s46, 37
-; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 2
-; VI-NEXT: s_add_i32 s23, s23, 3
-; VI-NEXT: s_add_i32 s22, s22, 3
-; VI-NEXT: s_add_i32 s27, s27, 3
-; VI-NEXT: s_add_i32 s26, s26, 3
+; VI-NEXT: s_add_i32 s25, s25, 3
+; VI-NEXT: s_add_i32 s24, s24, 3
+; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s45, s45, 3
; VI-NEXT: s_add_i32 s44, s44, 3
; VI-NEXT: s_add_i32 s42, s42, 3
-; VI-NEXT: s_lshr_b32 s76, s5, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: v_writelane_b32 v34, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: s_lshr_b32 s76, s29, 16
; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; VI-NEXT: v_writelane_b32 v33, s73, 3
-; VI-NEXT: s_lshr_b64 s[72:73], s[16:17], 24
-; VI-NEXT: s_lshr_b32 s34, s40, 8
-; VI-NEXT: s_lshr_b32 s35, s43, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 39
-; VI-NEXT: s_lshr_b32 s39, s42, 16
-; VI-NEXT: s_lshr_b32 s49, s42, 8
-; VI-NEXT: s_lshr_b32 s51, s45, 24
-; VI-NEXT: s_lshr_b32 s47, s45, 16
-; VI-NEXT: s_lshr_b32 s53, s45, 8
+; VI-NEXT: v_writelane_b32 v33, s38, 0
+; VI-NEXT: s_lshr_b32 s48, s5, 24
+; VI-NEXT: s_lshr_b32 s49, s5, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s47, s42, 16
+; VI-NEXT: s_lshr_b32 s51, s42, 8
+; VI-NEXT: s_lshr_b32 s54, s45, 24
+; VI-NEXT: s_lshr_b32 s52, s45, 16
+; VI-NEXT: s_lshr_b32 s64, s45, 8
; VI-NEXT: s_lshr_b32 s59, s44, 16
-; VI-NEXT: s_lshr_b32 s56, s44, 8
-; VI-NEXT: s_lshr_b32 s38, s29, 24
-; VI-NEXT: s_lshr_b32 s84, s29, 16
-; VI-NEXT: s_lshr_b32 s88, s29, 8
-; VI-NEXT: s_lshr_b32 s48, s28, 16
-; VI-NEXT: s_lshr_b32 s58, s28, 8
-; VI-NEXT: s_lshr_b32 s50, s27, 24
-; VI-NEXT: s_lshr_b32 s52, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s27, 8
-; VI-NEXT: s_lshr_b32 s54, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s26, 8
-; VI-NEXT: s_lshr_b32 s55, s25, 24
-; VI-NEXT: s_lshr_b32 s64, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s25, 8
-; VI-NEXT: s_lshr_b32 s65, s24, 16
-; VI-NEXT: s_lshr_b32 s57, s24, 8
-; VI-NEXT: s_lshr_b32 s66, s23, 24
-; VI-NEXT: s_lshr_b32 s67, s23, 16
-; VI-NEXT: s_lshr_b32 s60, s23, 8
-; VI-NEXT: s_lshr_b32 s68, s22, 16
-; VI-NEXT: s_lshr_b32 s61, s22, 8
-; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: s_lshr_b32 s69, s21, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s21, 8
-; VI-NEXT: s_lshr_b32 s80, s20, 16
-; VI-NEXT: s_lshr_b32 s62, s20, 8
-; VI-NEXT: s_lshr_b32 s81, s19, 24
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s63, s19, 8
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 8
-; VI-NEXT: s_lshr_b32 s85, s17, 24
-; VI-NEXT: s_lshr_b32 s86, s17, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 8
-; VI-NEXT: s_lshr_b32 s87, s16, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 8
+; VI-NEXT: s_lshr_b32 s86, s44, 8
+; VI-NEXT: s_lshr_b32 s37, s29, 24
+; VI-NEXT: s_lshr_b32 s91, s29, 8
+; VI-NEXT: s_lshr_b32 s50, s28, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s28, 8
+; VI-NEXT: s_lshr_b32 s53, s27, 24
+; VI-NEXT: s_lshr_b32 s55, s27, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s27, 8
+; VI-NEXT: s_lshr_b32 s65, s26, 16
+; VI-NEXT: s_lshr_b32 s57, s26, 8
+; VI-NEXT: s_lshr_b32 s66, s25, 24
+; VI-NEXT: s_lshr_b32 s67, s25, 16
+; VI-NEXT: s_lshr_b32 s60, s25, 8
+; VI-NEXT: s_lshr_b32 s68, s24, 16
+; VI-NEXT: s_lshr_b32 s61, s24, 8
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: s_lshr_b32 s69, s23, 16
+; VI-NEXT: s_lshr_b32 s30, s23, 8
+; VI-NEXT: s_lshr_b32 s80, s22, 16
+; VI-NEXT: s_lshr_b32 s62, s22, 8
+; VI-NEXT: s_lshr_b32 s81, s21, 24
+; VI-NEXT: s_lshr_b32 s82, s21, 16
+; VI-NEXT: s_lshr_b32 s63, s21, 8
+; VI-NEXT: s_lshr_b32 s83, s20, 16
+; VI-NEXT: s_lshr_b32 s31, s20, 8
+; VI-NEXT: s_lshr_b32 s56, s19, 24
+; VI-NEXT: s_lshr_b32 s84, s19, 16
+; VI-NEXT: s_lshr_b32 s34, s19, 8
+; VI-NEXT: s_lshr_b32 s85, s18, 16
+; VI-NEXT: s_lshr_b32 s35, s18, 8
+; VI-NEXT: s_lshr_b32 s87, s17, 24
+; VI-NEXT: s_lshr_b32 s90, s17, 16
+; VI-NEXT: s_lshr_b32 s36, s17, 8
+; VI-NEXT: s_lshr_b32 s58, s16, 16
+; VI-NEXT: s_lshr_b32 s72, s16, 8
; VI-NEXT: s_mov_b32 s75, s76
-; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
-; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
-; VI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
-; VI-NEXT: v_writelane_b32 v33, s72, 0
-; VI-NEXT: v_writelane_b32 v33, s73, 1
+; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[70:71], s[24:25], 24
+; VI-NEXT: v_writelane_b32 v33, s39, 1
+; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
; VI-NEXT: .LBB13_5: ; %end
-; VI-NEXT: v_readlane_b32 s72, v33, 0
-; VI-NEXT: v_mov_b32_e32 v6, s72
+; VI-NEXT: v_mov_b32_e32 v6, s38
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v2, s31
-; VI-NEXT: v_perm_b32 v6, s87, v6, v1
-; VI-NEXT: v_mov_b32_e32 v4, s30
+; VI-NEXT: v_mov_b32_e32 v2, s72
+; VI-NEXT: v_perm_b32 v6, s58, v6, v1
+; VI-NEXT: v_mov_b32_e32 v4, s36
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
-; VI-NEXT: v_mov_b32_e32 v24, s85
+; VI-NEXT: v_mov_b32_e32 v24, s87
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 2
-; VI-NEXT: v_perm_b32 v24, s86, v24, v1
+; VI-NEXT: v_readlane_b32 s16, v33, 0
+; VI-NEXT: v_perm_b32 v24, s90, v24, v1
; VI-NEXT: v_or_b32_e32 v3, v3, v6
; VI-NEXT: v_mov_b32_e32 v9, s16
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_mov_b32_e32 v4, vcc_hi
-; VI-NEXT: v_perm_b32 v9, s83, v9, v1
+; VI-NEXT: v_mov_b32_e32 v4, s35
+; VI-NEXT: v_perm_b32 v9, s85, v9, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 3
+; VI-NEXT: v_readlane_b32 s17, v33, 1
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
-; VI-NEXT: v_mov_b32_e32 v25, s81
+; VI-NEXT: v_mov_b32_e32 v25, s56
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
-; VI-NEXT: v_mov_b32_e32 v7, s63
-; VI-NEXT: v_readlane_b32 s16, v33, 4
-; VI-NEXT: v_perm_b32 v25, s82, v25, v1
+; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_readlane_b32 s16, v33, 2
+; VI-NEXT: v_perm_b32 v25, s84, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
; VI-NEXT: v_perm_b32 v4, s19, v7, v1
; VI-NEXT: v_mov_b32_e32 v14, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; VI-NEXT: v_mov_b32_e32 v7, s62
-; VI-NEXT: v_perm_b32 v14, s80, v14, v1
+; VI-NEXT: v_mov_b32_e32 v7, s31
+; VI-NEXT: v_perm_b32 v14, s83, v14, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 3
; VI-NEXT: v_perm_b32 v8, s20, v7, v1
-; VI-NEXT: v_mov_b32_e32 v26, s46
+; VI-NEXT: v_mov_b32_e32 v26, s81
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
-; VI-NEXT: v_mov_b32_e32 v10, vcc_lo
-; VI-NEXT: v_perm_b32 v26, s69, v26, v1
+; VI-NEXT: v_mov_b32_e32 v10, s63
+; VI-NEXT: v_readlane_b32 s16, v33, 4
+; VI-NEXT: v_perm_b32 v26, s82, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v8, v2
; VI-NEXT: v_perm_b32 v7, s21, v10, v1
-; VI-NEXT: v_mov_b32_e32 v17, s36
+; VI-NEXT: v_mov_b32_e32 v17, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_mov_b32_e32 v10, s61
-; VI-NEXT: v_perm_b32 v17, s68, v17, v1
+; VI-NEXT: v_mov_b32_e32 v10, s62
+; VI-NEXT: v_perm_b32 v17, s80, v17, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 5
; VI-NEXT: v_perm_b32 v11, s22, v10, v1
-; VI-NEXT: v_mov_b32_e32 v27, s66
+; VI-NEXT: v_mov_b32_e32 v27, s46
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; VI-NEXT: v_mov_b32_e32 v12, s60
-; VI-NEXT: v_readlane_b32 s16, v33, 6
-; VI-NEXT: v_perm_b32 v27, s67, v27, v1
+; VI-NEXT: v_mov_b32_e32 v12, s30
+; VI-NEXT: v_perm_b32 v27, s69, v27, v1
; VI-NEXT: v_or_b32_e32 v2, v11, v2
; VI-NEXT: v_perm_b32 v10, s23, v12, v1
-; VI-NEXT: v_mov_b32_e32 v20, s16
+; VI-NEXT: v_mov_b32_e32 v20, s70
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; VI-NEXT: v_mov_b32_e32 v12, s57
-; VI-NEXT: v_perm_b32 v20, s65, v20, v1
+; VI-NEXT: v_mov_b32_e32 v12, s61
+; VI-NEXT: v_perm_b32 v20, s68, v20, v1
; VI-NEXT: v_or_b32_e32 v2, v10, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 5
; VI-NEXT: v_perm_b32 v13, s24, v12, v1
-; VI-NEXT: v_mov_b32_e32 v28, s55
+; VI-NEXT: v_mov_b32_e32 v28, s66
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_mov_b32_e32 v15, s91
-; VI-NEXT: v_perm_b32 v28, s64, v28, v1
+; VI-NEXT: v_mov_b32_e32 v15, s60
+; VI-NEXT: v_readlane_b32 s16, v33, 8
+; VI-NEXT: v_perm_b32 v28, s67, v28, v1
; VI-NEXT: v_or_b32_e32 v2, v13, v2
; VI-NEXT: v_perm_b32 v12, s25, v15, v1
-; VI-NEXT: v_mov_b32_e32 v21, s70
+; VI-NEXT: v_mov_b32_e32 v21, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
-; VI-NEXT: v_mov_b32_e32 v15, s90
-; VI-NEXT: v_perm_b32 v21, s54, v21, v1
+; VI-NEXT: v_mov_b32_e32 v15, s57
+; VI-NEXT: v_perm_b32 v21, s65, v21, v1
; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 7
; VI-NEXT: v_perm_b32 v16, s26, v15, v1
-; VI-NEXT: v_mov_b32_e32 v29, s50
+; VI-NEXT: v_mov_b32_e32 v29, s53
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_mov_b32_e32 v18, s89
-; VI-NEXT: v_readlane_b32 s16, v33, 10
-; VI-NEXT: v_perm_b32 v29, s52, v29, v1
+; VI-NEXT: v_mov_b32_e32 v18, vcc_hi
+; VI-NEXT: v_perm_b32 v29, s55, v29, v1
; VI-NEXT: v_or_b32_e32 v2, v16, v2
; VI-NEXT: v_perm_b32 v15, s27, v18, v1
-; VI-NEXT: v_mov_b32_e32 v22, s16
+; VI-NEXT: v_mov_b32_e32 v22, s88
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_mov_b32_e32 v18, s58
-; VI-NEXT: v_perm_b32 v22, s48, v22, v1
+; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
+; VI-NEXT: v_perm_b32 v22, s50, v22, v1
; VI-NEXT: v_or_b32_e32 v2, v15, v2
; VI-NEXT: v_perm_b32 v19, s28, v18, v1
-; VI-NEXT: v_mov_b32_e32 v30, s38
+; VI-NEXT: v_mov_b32_e32 v30, s37
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_mov_b32_e32 v23, s88
-; VI-NEXT: v_perm_b32 v30, s84, v30, v1
+; VI-NEXT: v_mov_b32_e32 v23, s91
+; VI-NEXT: v_perm_b32 v30, s75, v30, v1
; VI-NEXT: v_or_b32_e32 v2, v19, v2
; VI-NEXT: v_perm_b32 v18, s29, v23, v1
-; VI-NEXT: v_mov_b32_e32 v23, s78
+; VI-NEXT: v_mov_b32_e32 v23, s76
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; VI-NEXT: v_mov_b32_e32 v31, s56
+; VI-NEXT: v_mov_b32_e32 v31, s86
; VI-NEXT: v_perm_b32 v23, s59, v23, v1
; VI-NEXT: v_or_b32_e32 v2, v18, v2
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s51
+; VI-NEXT: v_mov_b32_e32 v3, s54
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: v_mov_b32_e32 v2, s53
-; VI-NEXT: v_perm_b32 v3, s47, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s64
+; VI-NEXT: v_perm_b32 v3, s52, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s76
+; VI-NEXT: v_mov_b32_e32 v3, s78
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_mov_b32_e32 v2, s49
-; VI-NEXT: v_perm_b32 v3, s39, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s51
+; VI-NEXT: v_perm_b32 v3, s47, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 39
+; VI-NEXT: v_readlane_b32 s16, v34, 37
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s35
-; VI-NEXT: v_readlane_b32 s16, v34, 38
+; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 36
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s74
-; VI-NEXT: v_readlane_b32 s16, v34, 37
+; VI-NEXT: v_readlane_b32 s16, v34, 34
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_mov_b32_e32 v2, s34
+; VI-NEXT: v_mov_b32_e32 v2, s73
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 36
+; VI-NEXT: v_readlane_b32 s16, v34, 33
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v34, 34
+; VI-NEXT: v_readlane_b32 s16, v34, 31
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_readlane_b32 s16, v34, 32
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 11
+; VI-NEXT: v_readlane_b32 s17, v33, 9
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 33
+; VI-NEXT: v_readlane_b32 s16, v34, 30
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 12
+; VI-NEXT: v_readlane_b32 s16, v33, 10
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s14, v34, 32
+; VI-NEXT: v_readlane_b32 s14, v34, 29
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v34, 31
+; VI-NEXT: v_readlane_b32 s14, v34, 28
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v34, 29
+; VI-NEXT: v_readlane_b32 s14, v34, 26
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v34, 30
+; VI-NEXT: v_readlane_b32 s14, v34, 27
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v34, 28
+; VI-NEXT: v_readlane_b32 s14, v34, 25
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 14
+; VI-NEXT: v_readlane_b32 s14, v33, 12
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s12, v34, 27
+; VI-NEXT: v_readlane_b32 s12, v34, 24
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v34, 26
+; VI-NEXT: v_readlane_b32 s12, v34, 23
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v34, 24
+; VI-NEXT: v_readlane_b32 s12, v34, 21
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v34, 25
+; VI-NEXT: v_readlane_b32 s12, v34, 22
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v34, 23
+; VI-NEXT: v_readlane_b32 s12, v34, 20
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 16
+; VI-NEXT: v_readlane_b32 s12, v33, 14
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s10, v34, 22
+; VI-NEXT: v_readlane_b32 s10, v34, 19
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s10, v34, 21
+; VI-NEXT: v_readlane_b32 s10, v34, 18
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; VI-NEXT: v_mov_b32_e32 v2, s10
-; VI-NEXT: v_readlane_b32 s10, v34, 19
+; VI-NEXT: v_readlane_b32 s10, v34, 16
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s10, v34, 20
+; VI-NEXT: v_readlane_b32 s10, v34, 17
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s10, v34, 18
+; VI-NEXT: v_readlane_b32 s10, v34, 15
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; VI-NEXT: v_mov_b32_e32 v2, s10
-; VI-NEXT: v_readlane_b32 s10, v33, 18
+; VI-NEXT: v_readlane_b32 s10, v33, 16
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s8, v34, 17
+; VI-NEXT: v_readlane_b32 s8, v34, 14
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s8, v34, 16
+; VI-NEXT: v_readlane_b32 s8, v34, 13
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v34, 14
+; VI-NEXT: v_readlane_b32 s8, v34, 11
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s8, v34, 15
+; VI-NEXT: v_readlane_b32 s8, v34, 12
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s8, v34, 13
+; VI-NEXT: v_readlane_b32 s8, v34, 10
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 20
+; VI-NEXT: v_readlane_b32 s8, v33, 18
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s6, v34, 12
+; VI-NEXT: v_readlane_b32 s6, v34, 9
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s6, v34, 11
+; VI-NEXT: v_readlane_b32 s6, v34, 8
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v34, 9
+; VI-NEXT: v_readlane_b32 s6, v34, 6
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s6, v34, 10
+; VI-NEXT: v_readlane_b32 s6, v34, 7
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s6, v34, 8
+; VI-NEXT: v_readlane_b32 s6, v34, 5
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 22
+; VI-NEXT: v_readlane_b32 s6, v33, 20
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s4, v34, 7
+; VI-NEXT: v_readlane_b32 s4, v34, 4
; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s4, v34, 6
+; VI-NEXT: v_readlane_b32 s4, v34, 3
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; VI-NEXT: v_mov_b32_e32 v2, s4
-; VI-NEXT: v_readlane_b32 s4, v34, 5
-; VI-NEXT: v_mov_b32_e32 v3, s4
+; VI-NEXT: v_mov_b32_e32 v3, s48
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
-; VI-NEXT: v_perm_b32 v1, s75, v3, v1
+; VI-NEXT: v_perm_b32 v1, s49, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s73, v33, 1
-; VI-NEXT: v_readlane_b32 s17, v33, 13
-; VI-NEXT: v_readlane_b32 s15, v33, 15
-; VI-NEXT: v_readlane_b32 s13, v33, 17
-; VI-NEXT: v_readlane_b32 s11, v33, 19
-; VI-NEXT: v_readlane_b32 s9, v33, 21
-; VI-NEXT: v_readlane_b32 s7, v33, 23
+; VI-NEXT: v_readlane_b32 s17, v33, 11
+; VI-NEXT: v_readlane_b32 s15, v33, 13
+; VI-NEXT: v_readlane_b32 s13, v33, 15
+; VI-NEXT: v_readlane_b32 s11, v33, 17
+; VI-NEXT: v_readlane_b32 s9, v33, 19
+; VI-NEXT: v_readlane_b32 s7, v33, 21
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
@@ -10158,181 +10159,178 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: s_cbranch_scc0 .LBB13_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 20
+; GFX9-NEXT: v_writelane_b32 v30, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s5, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 21
+; GFX9-NEXT: v_writelane_b32 v30, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
; GFX9-NEXT: s_lshr_b32 s46, s4, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
; GFX9-NEXT: s_lshr_b32 s46, s7, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 11
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
; GFX9-NEXT: s_lshr_b32 s46, s7, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
; GFX9-NEXT: s_lshr_b32 s46, s7, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
; GFX9-NEXT: s_lshr_b32 s46, s6, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s9, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s9, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
; GFX9-NEXT: s_lshr_b32 s46, s8, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s8, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s11, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s11, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s11, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s10, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s10, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s13, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s13, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s13, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s12, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s12, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s15, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s15, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s15, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s14, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 34
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s14, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 35
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s41, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 22
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
; GFX9-NEXT: s_lshr_b32 s46, s41, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 23
+; GFX9-NEXT: v_writelane_b32 v30, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s41, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s40, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 25
+; GFX9-NEXT: v_writelane_b32 v30, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s40, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 26
+; GFX9-NEXT: v_writelane_b32 v30, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s43, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 27
+; GFX9-NEXT: v_writelane_b32 v30, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s43, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 28
+; GFX9-NEXT: v_writelane_b32 v30, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s43, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 29
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s42, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 30
+; GFX9-NEXT: v_writelane_b32 v30, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s42, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 31
+; GFX9-NEXT: v_writelane_b32 v30, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s45, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 32
+; GFX9-NEXT: v_writelane_b32 v30, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s45, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 33
+; GFX9-NEXT: v_writelane_b32 v30, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s45, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 34
+; GFX9-NEXT: v_writelane_b32 v30, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s44, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 35
+; GFX9-NEXT: v_writelane_b32 v30, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s44, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 36
+; GFX9-NEXT: v_writelane_b32 v30, s46, 32
; GFX9-NEXT: s_lshr_b32 s46, s29, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 37
+; GFX9-NEXT: v_writelane_b32 v30, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s29, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 38
+; GFX9-NEXT: v_writelane_b32 v30, s46, 34
; GFX9-NEXT: s_lshr_b32 s46, s29, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 39
+; GFX9-NEXT: v_writelane_b32 v30, s46, 35
; GFX9-NEXT: s_lshr_b32 s46, s28, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 40
+; GFX9-NEXT: v_writelane_b32 v30, s46, 36
; GFX9-NEXT: s_lshr_b32 s46, s28, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 41
+; GFX9-NEXT: v_writelane_b32 v30, s46, 37
; GFX9-NEXT: s_lshr_b32 s46, s27, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 42
+; GFX9-NEXT: v_writelane_b32 v30, s46, 38
; GFX9-NEXT: s_lshr_b32 s46, s27, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 43
+; GFX9-NEXT: v_writelane_b32 v30, s46, 39
; GFX9-NEXT: s_lshr_b32 s46, s27, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 59
+; GFX9-NEXT: v_writelane_b32 v30, s46, 55
; GFX9-NEXT: s_lshr_b32 s46, s26, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 44
+; GFX9-NEXT: v_writelane_b32 v30, s46, 40
; GFX9-NEXT: s_lshr_b32 s46, s26, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 61
+; GFX9-NEXT: v_writelane_b32 v30, s46, 57
; GFX9-NEXT: s_lshr_b32 s46, s25, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 45
+; GFX9-NEXT: v_writelane_b32 v30, s46, 41
; GFX9-NEXT: s_lshr_b32 s46, s25, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 42
; GFX9-NEXT: s_lshr_b32 s46, s25, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 62
+; GFX9-NEXT: v_writelane_b32 v30, s46, 58
; GFX9-NEXT: s_lshr_b32 s46, s24, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 47
+; GFX9-NEXT: v_writelane_b32 v30, s46, 43
; GFX9-NEXT: s_lshr_b32 s46, s24, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 63
+; GFX9-NEXT: v_writelane_b32 v30, s46, 59
; GFX9-NEXT: s_lshr_b32 s46, s23, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 48
+; GFX9-NEXT: v_writelane_b32 v30, s46, 44
; GFX9-NEXT: s_lshr_b32 s46, s23, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 49
+; GFX9-NEXT: v_writelane_b32 v30, s46, 45
; GFX9-NEXT: s_lshr_b32 s46, s23, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 0
+; GFX9-NEXT: v_writelane_b32 v30, s46, 60
; GFX9-NEXT: s_lshr_b32 s46, s22, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 50
+; GFX9-NEXT: v_writelane_b32 v30, s46, 46
; GFX9-NEXT: s_lshr_b32 s46, s22, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 1
+; GFX9-NEXT: v_writelane_b32 v30, s46, 61
; GFX9-NEXT: s_lshr_b32 s46, s21, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 51
+; GFX9-NEXT: v_writelane_b32 v30, s46, 47
; GFX9-NEXT: s_lshr_b32 s46, s21, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 52
+; GFX9-NEXT: v_writelane_b32 v30, s46, 48
; GFX9-NEXT: s_lshr_b32 s46, s21, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 2
+; GFX9-NEXT: v_writelane_b32 v30, s46, 62
; GFX9-NEXT: s_lshr_b32 s46, s20, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 53
+; GFX9-NEXT: v_writelane_b32 v30, s46, 49
; GFX9-NEXT: s_lshr_b32 s46, s20, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 3
+; GFX9-NEXT: v_writelane_b32 v30, s46, 63
; GFX9-NEXT: s_lshr_b32 s46, s19, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 54
+; GFX9-NEXT: v_writelane_b32 v30, s46, 50
; GFX9-NEXT: s_lshr_b32 s46, s19, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 55
+; GFX9-NEXT: v_writelane_b32 v30, s46, 51
; GFX9-NEXT: s_lshr_b32 s46, s19, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 4
+; GFX9-NEXT: v_writelane_b32 v31, s46, 0
; GFX9-NEXT: s_lshr_b32 s46, s18, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 56
+; GFX9-NEXT: v_writelane_b32 v30, s46, 52
; GFX9-NEXT: s_lshr_b32 s46, s18, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 5
+; GFX9-NEXT: v_writelane_b32 v31, s46, 1
; GFX9-NEXT: s_lshr_b32 s46, s17, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 57
+; GFX9-NEXT: v_writelane_b32 v30, s46, 53
; GFX9-NEXT: s_lshr_b32 s46, s17, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 58
+; GFX9-NEXT: v_writelane_b32 v30, s46, 54
; GFX9-NEXT: s_lshr_b32 s46, s17, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 6
+; GFX9-NEXT: v_writelane_b32 v31, s46, 2
; GFX9-NEXT: s_lshr_b32 s46, s16, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 60
+; GFX9-NEXT: v_writelane_b32 v30, s46, 56
; GFX9-NEXT: s_lshr_b32 s46, s16, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 7
+; GFX9-NEXT: v_writelane_b32 v31, s46, 3
; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 18
-; GFX9-NEXT: v_writelane_b32 v30, s47, 19
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 16
; GFX9-NEXT: v_writelane_b32 v30, s47, 17
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 14
; GFX9-NEXT: v_writelane_b32 v30, s47, 15
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 12
; GFX9-NEXT: v_writelane_b32 v30, s47, 13
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 10
; GFX9-NEXT: v_writelane_b32 v30, s47, 11
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 8
; GFX9-NEXT: v_writelane_b32 v30, s47, 9
; GFX9-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
@@ -10346,13 +10344,14 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: v_writelane_b32 v30, s47, 3
; GFX9-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 0
-; GFX9-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[14:15], 24
; GFX9-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[44:45], 24
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
; GFX9-NEXT: v_writelane_b32 v30, s47, 1
-; GFX9-NEXT: s_lshr_b64 s[62:63], s[16:17], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX9-NEXT: s_mov_b64 s[36:37], 0
; GFX9-NEXT: s_branch .LBB13_3
; GFX9-NEXT: .LBB13_2:
@@ -10361,12 +10360,13 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr92
; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr72
+; GFX9-NEXT: ; implicit-def: $sgpr88
; GFX9-NEXT: ; implicit-def: $sgpr78
; GFX9-NEXT: ; implicit-def: $sgpr76
-; GFX9-NEXT: ; implicit-def: $sgpr74
+; GFX9-NEXT: ; implicit-def: $sgpr96
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
@@ -10550,517 +10550,512 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: v_writelane_b32 v30, s46, 16
; GFX9-NEXT: v_writelane_b32 v30, s47, 17
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s46, 18
-; GFX9-NEXT: v_writelane_b32 v30, s47, 19
; GFX9-NEXT: .LBB13_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[36:37], exec
; GFX9-NEXT: s_cselect_b32 s46, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s46, 1
-; GFX9-NEXT: v_readlane_b32 s75, v30, 20
-; GFX9-NEXT: v_readlane_b32 s73, v30, 21
-; GFX9-NEXT: v_readlane_b32 s97, v30, 22
-; GFX9-NEXT: v_readlane_b32 s96, v30, 23
-; GFX9-NEXT: v_readlane_b32 s98, v30, 24
-; GFX9-NEXT: v_readlane_b32 s99, v30, 25
-; GFX9-NEXT: v_readlane_b32 s88, v30, 26
-; GFX9-NEXT: v_readlane_b32 s90, v30, 27
-; GFX9-NEXT: v_readlane_b32 s89, v30, 28
-; GFX9-NEXT: v_readlane_b32 s91, v30, 29
-; GFX9-NEXT: v_readlane_b32 s92, v30, 30
-; GFX9-NEXT: v_readlane_b32 s93, v30, 31
-; GFX9-NEXT: v_readlane_b32 vcc_lo, v30, 32
-; GFX9-NEXT: v_readlane_b32 s95, v30, 33
-; GFX9-NEXT: v_readlane_b32 s30, v30, 34
-; GFX9-NEXT: v_readlane_b32 s31, v30, 35
-; GFX9-NEXT: v_readlane_b32 s35, v30, 36
-; GFX9-NEXT: v_readlane_b32 s47, v30, 37
-; GFX9-NEXT: v_readlane_b32 s37, v30, 38
-; GFX9-NEXT: v_readlane_b32 s94, v30, 39
-; GFX9-NEXT: v_readlane_b32 vcc_hi, v30, 40
-; GFX9-NEXT: v_readlane_b32 s59, v30, 41
-; GFX9-NEXT: v_readlane_b32 s34, v30, 42
-; GFX9-NEXT: v_readlane_b32 s69, v30, 43
-; GFX9-NEXT: v_readlane_b32 s36, v30, 44
-; GFX9-NEXT: v_readlane_b32 s38, v30, 45
-; GFX9-NEXT: v_readlane_b32 s39, v30, 46
-; GFX9-NEXT: v_readlane_b32 s48, v30, 47
-; GFX9-NEXT: v_readlane_b32 s49, v30, 48
-; GFX9-NEXT: v_readlane_b32 s50, v30, 49
-; GFX9-NEXT: v_readlane_b32 s51, v30, 50
-; GFX9-NEXT: v_readlane_b32 s52, v30, 51
-; GFX9-NEXT: v_readlane_b32 s53, v30, 52
-; GFX9-NEXT: v_readlane_b32 s54, v30, 53
-; GFX9-NEXT: v_readlane_b32 s55, v30, 54
-; GFX9-NEXT: v_readlane_b32 s64, v30, 55
-; GFX9-NEXT: v_readlane_b32 s65, v30, 56
-; GFX9-NEXT: v_readlane_b32 s46, v30, 57
-; GFX9-NEXT: v_readlane_b32 s68, v30, 58
-; GFX9-NEXT: v_readlane_b32 s71, v30, 59
-; GFX9-NEXT: v_readlane_b32 s70, v30, 60
-; GFX9-NEXT: v_readlane_b32 s56, v30, 61
-; GFX9-NEXT: v_readlane_b32 s80, v30, 62
-; GFX9-NEXT: v_readlane_b32 s81, v30, 63
-; GFX9-NEXT: v_readlane_b32 s82, v31, 0
-; GFX9-NEXT: v_readlane_b32 s83, v31, 1
-; GFX9-NEXT: v_readlane_b32 s84, v31, 2
-; GFX9-NEXT: v_readlane_b32 s58, v31, 3
-; GFX9-NEXT: v_readlane_b32 s85, v31, 4
-; GFX9-NEXT: v_readlane_b32 s86, v31, 5
-; GFX9-NEXT: v_readlane_b32 s87, v31, 6
-; GFX9-NEXT: v_readlane_b32 s57, v31, 7
-; GFX9-NEXT: v_readlane_b32 s66, v30, 6
-; GFX9-NEXT: v_readlane_b32 s67, v30, 7
+; GFX9-NEXT: v_readlane_b32 s63, v30, 18
+; GFX9-NEXT: v_readlane_b32 s73, v30, 19
+; GFX9-NEXT: v_readlane_b32 s74, v30, 20
+; GFX9-NEXT: v_readlane_b32 s98, v30, 21
+; GFX9-NEXT: v_readlane_b32 s99, v30, 22
+; GFX9-NEXT: v_readlane_b32 s90, v30, 23
+; GFX9-NEXT: v_readlane_b32 s75, v30, 24
+; GFX9-NEXT: v_readlane_b32 s91, v30, 25
+; GFX9-NEXT: v_readlane_b32 s94, v30, 26
+; GFX9-NEXT: v_readlane_b32 s95, v30, 27
+; GFX9-NEXT: v_readlane_b32 s30, v30, 28
+; GFX9-NEXT: v_readlane_b32 vcc_hi, v30, 29
+; GFX9-NEXT: v_readlane_b32 s31, v30, 30
+; GFX9-NEXT: v_readlane_b32 s35, v30, 31
+; GFX9-NEXT: v_readlane_b32 s47, v30, 32
+; GFX9-NEXT: v_readlane_b32 s48, v30, 33
+; GFX9-NEXT: v_readlane_b32 s39, v30, 34
+; GFX9-NEXT: v_readlane_b32 vcc_lo, v30, 35
+; GFX9-NEXT: v_readlane_b32 s59, v30, 36
+; GFX9-NEXT: v_readlane_b32 s34, v30, 37
+; GFX9-NEXT: v_readlane_b32 s36, v30, 38
+; GFX9-NEXT: v_readlane_b32 s37, v30, 39
+; GFX9-NEXT: v_readlane_b32 s38, v30, 40
+; GFX9-NEXT: v_readlane_b32 s49, v30, 41
+; GFX9-NEXT: v_readlane_b32 s50, v30, 42
+; GFX9-NEXT: v_readlane_b32 s51, v30, 43
+; GFX9-NEXT: v_readlane_b32 s52, v30, 44
+; GFX9-NEXT: v_readlane_b32 s53, v30, 45
+; GFX9-NEXT: v_readlane_b32 s54, v30, 46
+; GFX9-NEXT: v_readlane_b32 s55, v30, 47
+; GFX9-NEXT: v_readlane_b32 s64, v30, 48
+; GFX9-NEXT: v_readlane_b32 s65, v30, 49
+; GFX9-NEXT: v_readlane_b32 s46, v30, 50
+; GFX9-NEXT: v_readlane_b32 s68, v30, 51
+; GFX9-NEXT: v_readlane_b32 s69, v30, 52
+; GFX9-NEXT: v_readlane_b32 s70, v30, 53
+; GFX9-NEXT: v_readlane_b32 s71, v30, 54
+; GFX9-NEXT: v_readlane_b32 s80, v30, 55
+; GFX9-NEXT: v_readlane_b32 s56, v30, 56
+; GFX9-NEXT: v_readlane_b32 s81, v30, 57
+; GFX9-NEXT: v_readlane_b32 s82, v30, 58
+; GFX9-NEXT: v_readlane_b32 s83, v30, 59
+; GFX9-NEXT: v_readlane_b32 s84, v30, 60
+; GFX9-NEXT: v_readlane_b32 s58, v30, 61
+; GFX9-NEXT: v_readlane_b32 s85, v30, 62
+; GFX9-NEXT: v_readlane_b32 s86, v30, 63
+; GFX9-NEXT: v_readlane_b32 s87, v31, 0
+; GFX9-NEXT: v_readlane_b32 s57, v31, 1
+; GFX9-NEXT: v_readlane_b32 s60, v31, 2
+; GFX9-NEXT: v_readlane_b32 s61, v31, 3
+; GFX9-NEXT: v_readlane_b32 s66, v30, 4
+; GFX9-NEXT: v_readlane_b32 s67, v30, 5
; GFX9-NEXT: s_cbranch_scc1 .LBB13_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s5, s5, 3
; GFX9-NEXT: s_add_i32 s4, s4, 3
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
; GFX9-NEXT: s_lshr_b32 s46, s4, 16
; GFX9-NEXT: s_add_i32 s7, s7, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
; GFX9-NEXT: s_lshr_b32 s46, s7, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 11
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
; GFX9-NEXT: s_lshr_b32 s46, s7, 16
; GFX9-NEXT: s_add_i32 s6, s6, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
; GFX9-NEXT: s_lshr_b32 s46, s7, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
; GFX9-NEXT: s_lshr_b32 s46, s6, 16
; GFX9-NEXT: s_add_i32 s9, s9, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
; GFX9-NEXT: s_lshr_b32 s46, s6, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s9, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
; GFX9-NEXT: s_lshr_b32 s46, s9, 16
; GFX9-NEXT: s_add_i32 s8, s8, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s9, 8
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
; GFX9-NEXT: s_lshr_b32 s46, s8, 16
-; GFX9-NEXT: v_writelane_b32 v30, s72, 18
; GFX9-NEXT: s_add_i32 s11, s11, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s8, 8
-; GFX9-NEXT: v_writelane_b32 v30, s73, 19
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s11, 24
-; GFX9-NEXT: v_writelane_b32 v30, s72, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s11, 16
-; GFX9-NEXT: v_writelane_b32 v30, s73, 17
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v30, s72, 16
; GFX9-NEXT: s_add_i32 s10, s10, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s11, 8
-; GFX9-NEXT: v_writelane_b32 v30, s72, 14
-; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: v_writelane_b32 v30, s73, 17
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s10, 16
-; GFX9-NEXT: v_writelane_b32 v30, s73, 15
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v30, s72, 14
; GFX9-NEXT: s_add_i32 s13, s13, 3
-; GFX9-NEXT: s_add_i32 s12, s12, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s10, 8
-; GFX9-NEXT: v_writelane_b32 v30, s72, 12
-; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: v_writelane_b32 v30, s73, 15
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s13, 24
-; GFX9-NEXT: v_writelane_b32 v30, s73, 13
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
-; GFX9-NEXT: s_add_i32 s29, s29, 3
-; GFX9-NEXT: s_add_i32 s28, s28, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: v_writelane_b32 v30, s72, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s13, 16
-; GFX9-NEXT: v_writelane_b32 v30, s72, 10
-; GFX9-NEXT: s_add_i32 s45, s45, 3
-; GFX9-NEXT: s_add_i32 s44, s44, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: v_writelane_b32 v30, s73, 13
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[10:11], 24
+; GFX9-NEXT: s_add_i32 s12, s12, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s13, 8
-; GFX9-NEXT: v_writelane_b32 v30, s73, 11
-; GFX9-NEXT: s_lshr_b64 s[66:67], s[28:29], 24
-; GFX9-NEXT: s_add_i32 s25, s25, 3
-; GFX9-NEXT: s_add_i32 s24, s24, 3
-; GFX9-NEXT: s_lshr_b32 s60, s5, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: v_writelane_b32 v30, s72, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s12, 16
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[44:45], 24
-; GFX9-NEXT: v_writelane_b32 v30, s66, 8
+; GFX9-NEXT: v_writelane_b32 v30, s73, 11
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
+; GFX9-NEXT: s_add_i32 s27, s27, 3
+; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: s_add_i32 s15, s15, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s12, 8
-; GFX9-NEXT: s_mov_b32 s73, s60
-; GFX9-NEXT: v_writelane_b32 v30, s67, 9
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
+; GFX9-NEXT: v_writelane_b32 v30, s72, 8
+; GFX9-NEXT: s_add_i32 s29, s29, 3
+; GFX9-NEXT: s_add_i32 s28, s28, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s15, 24
+; GFX9-NEXT: v_writelane_b32 v30, s73, 9
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
; GFX9-NEXT: s_add_i32 s23, s23, 3
; GFX9-NEXT: s_add_i32 s22, s22, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 30
-; GFX9-NEXT: s_lshr_b32 s46, s15, 24
-; GFX9-NEXT: v_writelane_b32 v30, s60, 4
-; GFX9-NEXT: s_add_i32 s14, s14, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s62, s5, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s15, 16
-; GFX9-NEXT: v_writelane_b32 v30, s61, 5
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX9-NEXT: s_add_i32 s19, s19, 3
-; GFX9-NEXT: s_add_i32 s18, s18, 3
-; GFX9-NEXT: s_lshr_b32 s62, s5, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[28:29], 24
+; GFX9-NEXT: v_writelane_b32 v30, s66, 6
+; GFX9-NEXT: s_add_i32 s14, s14, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s15, 8
-; GFX9-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX9-NEXT: v_writelane_b32 v30, s60, 2
-; GFX9-NEXT: v_writelane_b32 v31, s46, 33
-; GFX9-NEXT: s_lshr_b32 s46, s14, 16
-; GFX9-NEXT: s_mov_b32 s75, s62
-; GFX9-NEXT: v_writelane_b32 v30, s61, 3
-; GFX9-NEXT: s_lshr_b64 s[62:63], s[18:19], 24
-; GFX9-NEXT: s_add_i32 s17, s17, 3
-; GFX9-NEXT: s_add_i32 s16, s16, 3
+; GFX9-NEXT: s_mov_b32 s73, s62
+; GFX9-NEXT: v_writelane_b32 v30, s67, 7
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
; GFX9-NEXT: s_add_i32 s21, s21, 3
; GFX9-NEXT: s_add_i32 s20, s20, 3
-; GFX9-NEXT: s_add_i32 s27, s27, 3
-; GFX9-NEXT: s_add_i32 s26, s26, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s14, 16
+; GFX9-NEXT: v_writelane_b32 v30, s62, 2
+; GFX9-NEXT: s_add_i32 s19, s19, 3
+; GFX9-NEXT: s_add_i32 s18, s18, 3
+; GFX9-NEXT: s_add_i32 s41, s41, 3
+; GFX9-NEXT: s_lshr_b32 s93, s5, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: v_writelane_b32 v30, s63, 3
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
; GFX9-NEXT: s_add_i32 s43, s43, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: s_mov_b32 s63, s93
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; GFX9-NEXT: s_add_i32 s17, s17, 3
+; GFX9-NEXT: s_add_i32 s16, s16, 3
+; GFX9-NEXT: s_add_i32 s25, s25, 3
+; GFX9-NEXT: s_add_i32 s24, s24, 3
+; GFX9-NEXT: s_add_i32 s45, s45, 3
+; GFX9-NEXT: s_add_i32 s44, s44, 3
; GFX9-NEXT: s_add_i32 s42, s42, 3
-; GFX9-NEXT: s_add_i32 s41, s41, 3
; GFX9-NEXT: s_add_i32 s40, s40, 3
-; GFX9-NEXT: v_writelane_b32 v31, s46, 34
-; GFX9-NEXT: s_lshr_b32 s46, s14, 8
-; GFX9-NEXT: v_writelane_b32 v30, s62, 0
-; GFX9-NEXT: v_writelane_b32 v31, s46, 35
-; GFX9-NEXT: s_lshr_b32 s97, s41, 24
-; GFX9-NEXT: s_lshr_b32 s96, s41, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s43, 8
+; GFX9-NEXT: v_writelane_b32 v30, s92, 0
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
; GFX9-NEXT: s_lshr_b32 s98, s41, 8
; GFX9-NEXT: s_lshr_b32 s99, s40, 16
-; GFX9-NEXT: s_lshr_b32 s88, s40, 8
-; GFX9-NEXT: s_lshr_b32 s90, s43, 24
-; GFX9-NEXT: s_lshr_b32 s89, s43, 16
-; GFX9-NEXT: s_lshr_b32 s91, s43, 8
-; GFX9-NEXT: s_lshr_b32 s92, s42, 16
-; GFX9-NEXT: s_lshr_b32 s93, s42, 8
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s45, 24
-; GFX9-NEXT: s_lshr_b32 s95, s45, 16
-; GFX9-NEXT: s_lshr_b32 s30, s45, 8
-; GFX9-NEXT: s_lshr_b32 s31, s44, 16
-; GFX9-NEXT: s_lshr_b32 s35, s44, 8
-; GFX9-NEXT: s_lshr_b32 s47, s29, 24
-; GFX9-NEXT: s_lshr_b32 s37, s29, 16
-; GFX9-NEXT: s_lshr_b32 s94, s29, 8
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s28, 16
-; GFX9-NEXT: s_lshr_b32 s59, s28, 8
-; GFX9-NEXT: s_lshr_b32 s34, s27, 24
-; GFX9-NEXT: s_lshr_b32 s69, s27, 16
-; GFX9-NEXT: s_lshr_b32 s71, s27, 8
-; GFX9-NEXT: s_lshr_b32 s36, s26, 16
-; GFX9-NEXT: s_lshr_b32 s56, s26, 8
-; GFX9-NEXT: s_lshr_b32 s38, s25, 24
-; GFX9-NEXT: s_lshr_b32 s39, s25, 16
-; GFX9-NEXT: s_lshr_b32 s80, s25, 8
-; GFX9-NEXT: s_lshr_b32 s48, s24, 16
-; GFX9-NEXT: s_lshr_b32 s81, s24, 8
-; GFX9-NEXT: s_lshr_b32 s49, s23, 24
-; GFX9-NEXT: s_lshr_b32 s50, s23, 16
-; GFX9-NEXT: s_lshr_b32 s82, s23, 8
-; GFX9-NEXT: s_lshr_b32 s51, s22, 16
-; GFX9-NEXT: s_lshr_b32 s83, s22, 8
-; GFX9-NEXT: s_lshr_b32 s52, s21, 24
-; GFX9-NEXT: s_lshr_b32 s53, s21, 16
-; GFX9-NEXT: s_lshr_b32 s84, s21, 8
-; GFX9-NEXT: s_lshr_b32 s54, s20, 16
-; GFX9-NEXT: s_lshr_b32 s58, s20, 8
-; GFX9-NEXT: s_lshr_b32 s55, s19, 24
-; GFX9-NEXT: s_lshr_b32 s64, s19, 16
-; GFX9-NEXT: s_lshr_b32 s85, s19, 8
-; GFX9-NEXT: s_lshr_b32 s65, s18, 16
-; GFX9-NEXT: s_lshr_b32 s86, s18, 8
-; GFX9-NEXT: s_lshr_b32 s46, s17, 24
-; GFX9-NEXT: s_lshr_b32 s68, s17, 16
-; GFX9-NEXT: s_lshr_b32 s87, s17, 8
-; GFX9-NEXT: s_lshr_b32 s70, s16, 16
-; GFX9-NEXT: s_lshr_b32 s57, s16, 8
+; GFX9-NEXT: s_lshr_b32 s90, s40, 8
+; GFX9-NEXT: s_lshr_b32 s75, s43, 24
+; GFX9-NEXT: s_lshr_b32 s91, s43, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_lshr_b32 s94, s42, 16
+; GFX9-NEXT: s_lshr_b32 s95, s42, 8
+; GFX9-NEXT: s_lshr_b32 s30, s45, 24
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s45, 16
+; GFX9-NEXT: s_lshr_b32 s31, s45, 8
+; GFX9-NEXT: s_lshr_b32 s35, s44, 16
+; GFX9-NEXT: s_lshr_b32 s47, s44, 8
+; GFX9-NEXT: s_lshr_b32 s48, s29, 24
+; GFX9-NEXT: s_lshr_b32 s39, s29, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s29, 8
+; GFX9-NEXT: s_lshr_b32 s59, s28, 16
+; GFX9-NEXT: s_lshr_b32 s34, s28, 8
+; GFX9-NEXT: s_lshr_b32 s36, s27, 24
+; GFX9-NEXT: s_lshr_b32 s37, s27, 16
+; GFX9-NEXT: s_lshr_b32 s80, s27, 8
+; GFX9-NEXT: s_lshr_b32 s38, s26, 16
+; GFX9-NEXT: s_lshr_b32 s81, s26, 8
+; GFX9-NEXT: s_lshr_b32 s49, s25, 24
+; GFX9-NEXT: s_lshr_b32 s50, s25, 16
+; GFX9-NEXT: s_lshr_b32 s82, s25, 8
+; GFX9-NEXT: s_lshr_b32 s51, s24, 16
+; GFX9-NEXT: s_lshr_b32 s83, s24, 8
+; GFX9-NEXT: s_lshr_b32 s52, s23, 24
+; GFX9-NEXT: s_lshr_b32 s53, s23, 16
+; GFX9-NEXT: s_lshr_b32 s84, s23, 8
+; GFX9-NEXT: s_lshr_b32 s54, s22, 16
+; GFX9-NEXT: s_lshr_b32 s58, s22, 8
+; GFX9-NEXT: s_lshr_b32 s55, s21, 24
+; GFX9-NEXT: s_lshr_b32 s64, s21, 16
+; GFX9-NEXT: s_lshr_b32 s85, s21, 8
+; GFX9-NEXT: s_lshr_b32 s65, s20, 16
+; GFX9-NEXT: s_lshr_b32 s86, s20, 8
+; GFX9-NEXT: s_lshr_b32 s46, s19, 24
+; GFX9-NEXT: s_lshr_b32 s68, s19, 16
+; GFX9-NEXT: s_lshr_b32 s87, s19, 8
+; GFX9-NEXT: s_lshr_b32 s69, s18, 16
+; GFX9-NEXT: s_lshr_b32 s57, s18, 8
+; GFX9-NEXT: s_lshr_b32 s70, s17, 24
+; GFX9-NEXT: s_lshr_b32 s71, s17, 16
+; GFX9-NEXT: s_lshr_b32 s60, s17, 8
+; GFX9-NEXT: s_lshr_b32 s56, s16, 16
+; GFX9-NEXT: s_lshr_b32 s61, s16, 8
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[14:15], 24
; GFX9-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
-; GFX9-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[20:21], 24
-; GFX9-NEXT: v_writelane_b32 v30, s63, 1
-; GFX9-NEXT: s_lshr_b64 s[62:63], s[16:17], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[24:25], 24
+; GFX9-NEXT: v_writelane_b32 v30, s93, 1
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX9-NEXT: .LBB13_5: ; %end
-; GFX9-NEXT: v_mov_b32_e32 v6, s62
+; GFX9-NEXT: v_mov_b32_e32 v6, s92
; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v2, s57
-; GFX9-NEXT: v_perm_b32 v6, s70, v6, v1
-; GFX9-NEXT: v_mov_b32_e32 v4, s87
+; GFX9-NEXT: v_mov_b32_e32 v2, s61
+; GFX9-NEXT: v_perm_b32 v6, s56, v6, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s60
; GFX9-NEXT: v_perm_b32 v3, s16, v2, v1
-; GFX9-NEXT: v_mov_b32_e32 v21, s46
+; GFX9-NEXT: v_mov_b32_e32 v21, s70
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_perm_b32 v2, s17, v4, v1
; GFX9-NEXT: v_readlane_b32 s16, v30, 0
-; GFX9-NEXT: v_perm_b32 v21, s68, v21, v1
+; GFX9-NEXT: v_perm_b32 v21, s71, v21, v1
; GFX9-NEXT: v_or_b32_e32 v3, v3, v6
; GFX9-NEXT: v_mov_b32_e32 v10, s16
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v21
-; GFX9-NEXT: v_mov_b32_e32 v4, s86
-; GFX9-NEXT: v_perm_b32 v10, s65, v10, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s57
+; GFX9-NEXT: v_perm_b32 v10, s69, v10, v1
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1
-; GFX9-NEXT: v_mov_b32_e32 v22, s55
+; GFX9-NEXT: v_mov_b32_e32 v22, s46
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v10
-; GFX9-NEXT: v_mov_b32_e32 v7, s85
-; GFX9-NEXT: v_perm_b32 v22, s64, v22, v1
+; GFX9-NEXT: v_mov_b32_e32 v7, s87
+; GFX9-NEXT: v_perm_b32 v22, s68, v22, v1
; GFX9-NEXT: v_or_b32_e32 v2, v5, v2
; GFX9-NEXT: v_perm_b32 v4, s19, v7, v1
-; GFX9-NEXT: v_mov_b32_e32 v13, s60
+; GFX9-NEXT: v_mov_b32_e32 v14, s62
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; GFX9-NEXT: v_mov_b32_e32 v7, s58
-; GFX9-NEXT: v_perm_b32 v13, s54, v13, v1
+; GFX9-NEXT: v_mov_b32_e32 v7, s86
+; GFX9-NEXT: v_perm_b32 v14, s65, v14, v1
; GFX9-NEXT: v_or_b32_e32 v2, v4, v2
; GFX9-NEXT: v_readlane_b32 s17, v30, 1
; GFX9-NEXT: v_perm_b32 v8, s20, v7, v1
-; GFX9-NEXT: v_mov_b32_e32 v23, s52
+; GFX9-NEXT: v_mov_b32_e32 v23, s55
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; GFX9-NEXT: v_mov_b32_e32 v9, s84
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; GFX9-NEXT: v_mov_b32_e32 v9, s85
; GFX9-NEXT: v_readlane_b32 s16, v30, 2
-; GFX9-NEXT: v_perm_b32 v23, s53, v23, v1
+; GFX9-NEXT: v_perm_b32 v23, s64, v23, v1
; GFX9-NEXT: v_or_b32_e32 v2, v8, v2
; GFX9-NEXT: v_perm_b32 v7, s21, v9, v1
; GFX9-NEXT: v_mov_b32_e32 v15, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23
-; GFX9-NEXT: v_mov_b32_e32 v9, s83
-; GFX9-NEXT: v_perm_b32 v15, s51, v15, v1
+; GFX9-NEXT: v_mov_b32_e32 v9, s58
+; GFX9-NEXT: v_perm_b32 v15, s54, v15, v1
; GFX9-NEXT: v_or_b32_e32 v2, v7, v2
-; GFX9-NEXT: v_readlane_b32 s17, v30, 3
; GFX9-NEXT: v_perm_b32 v11, s22, v9, v1
-; GFX9-NEXT: v_mov_b32_e32 v24, s49
+; GFX9-NEXT: v_mov_b32_e32 v24, s52
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v15
-; GFX9-NEXT: v_mov_b32_e32 v12, s82
-; GFX9-NEXT: v_readlane_b32 s16, v30, 4
-; GFX9-NEXT: v_perm_b32 v24, s50, v24, v1
+; GFX9-NEXT: v_mov_b32_e32 v12, s84
+; GFX9-NEXT: v_perm_b32 v24, s53, v24, v1
; GFX9-NEXT: v_or_b32_e32 v2, v11, v2
; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1
-; GFX9-NEXT: v_mov_b32_e32 v16, s16
+; GFX9-NEXT: v_mov_b32_e32 v16, s66
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v24
-; GFX9-NEXT: v_mov_b32_e32 v12, s81
-; GFX9-NEXT: v_perm_b32 v16, s48, v16, v1
+; GFX9-NEXT: v_mov_b32_e32 v12, s83
+; GFX9-NEXT: v_perm_b32 v16, s51, v16, v1
; GFX9-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX9-NEXT: v_perm_b32 v14, s24, v12, v1
-; GFX9-NEXT: v_mov_b32_e32 v25, s38
+; GFX9-NEXT: v_readlane_b32 s17, v30, 3
+; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, s49
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; GFX9-NEXT: v_mov_b32_e32 v17, s80
-; GFX9-NEXT: v_perm_b32 v25, s39, v25, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v14, v2
+; GFX9-NEXT: v_mov_b32_e32 v17, s82
+; GFX9-NEXT: v_readlane_b32 s16, v30, 6
+; GFX9-NEXT: v_perm_b32 v25, s50, v25, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v13, v2
; GFX9-NEXT: v_perm_b32 v12, s25, v17, v1
-; GFX9-NEXT: v_mov_b32_e32 v17, s66
+; GFX9-NEXT: v_mov_b32_e32 v17, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; GFX9-NEXT: v_mov_b32_e32 v18, s56
-; GFX9-NEXT: v_perm_b32 v17, s36, v17, v1
+; GFX9-NEXT: v_mov_b32_e32 v18, s81
+; GFX9-NEXT: v_perm_b32 v17, s38, v17, v1
; GFX9-NEXT: v_or_b32_e32 v2, v12, v2
-; GFX9-NEXT: v_readlane_b32 s17, v30, 5
; GFX9-NEXT: v_perm_b32 v18, s26, v18, v1
-; GFX9-NEXT: v_mov_b32_e32 v26, s34
+; GFX9-NEXT: v_mov_b32_e32 v26, s36
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; GFX9-NEXT: v_mov_b32_e32 v19, s71
-; GFX9-NEXT: v_readlane_b32 s16, v30, 8
-; GFX9-NEXT: v_perm_b32 v26, s69, v26, v1
+; GFX9-NEXT: v_mov_b32_e32 v19, s80
+; GFX9-NEXT: v_perm_b32 v26, s37, v26, v1
; GFX9-NEXT: v_or_b32_e32 v2, v18, v2
; GFX9-NEXT: v_perm_b32 v19, s27, v19, v1
-; GFX9-NEXT: v_mov_b32_e32 v20, s16
+; GFX9-NEXT: v_mov_b32_e32 v20, s72
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; GFX9-NEXT: v_mov_b32_e32 v27, s59
-; GFX9-NEXT: v_perm_b32 v20, vcc_hi, v20, v1
+; GFX9-NEXT: v_mov_b32_e32 v27, s34
+; GFX9-NEXT: v_perm_b32 v20, s59, v20, v1
; GFX9-NEXT: v_or_b32_e32 v2, v19, v2
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_perm_b32 v2, s28, v27, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s94
-; GFX9-NEXT: v_perm_b32 v3, s37, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s48
+; GFX9-NEXT: v_mov_b32_e32 v28, vcc_lo
+; GFX9-NEXT: v_perm_b32 v3, s39, v3, v1
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; GFX9-NEXT: v_perm_b32 v2, s29, v28, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s72
+; GFX9-NEXT: v_mov_b32_e32 v3, s88
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_mov_b32_e32 v2, s35
-; GFX9-NEXT: v_perm_b32 v3, s31, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s47
+; GFX9-NEXT: v_perm_b32 v3, s35, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s44, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, vcc_lo
+; GFX9-NEXT: v_mov_b32_e32 v3, s30
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_mov_b32_e32 v2, s30
-; GFX9-NEXT: v_perm_b32 v3, s95, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s31
+; GFX9-NEXT: v_perm_b32 v3, vcc_hi, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s45, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s78
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_mov_b32_e32 v2, s93
-; GFX9-NEXT: v_perm_b32 v3, s92, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s95
+; GFX9-NEXT: v_perm_b32 v3, s94, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s42, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s90
+; GFX9-NEXT: v_readlane_b32 s16, v31, 33
+; GFX9-NEXT: v_mov_b32_e32 v3, s75
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_mov_b32_e32 v2, s91
-; GFX9-NEXT: v_perm_b32 v3, s89, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s16
+; GFX9-NEXT: v_perm_b32 v3, s91, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s43, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s76
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_mov_b32_e32 v2, s88
+; GFX9-NEXT: v_mov_b32_e32 v2, s90
; GFX9-NEXT: v_perm_b32 v3, s99, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s40, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_readlane_b32 s16, v31, 32
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s97
+; GFX9-NEXT: v_mov_b32_e32 v3, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
; GFX9-NEXT: v_mov_b32_e32 v2, s98
-; GFX9-NEXT: v_perm_b32 v3, s96, v3, v1
+; GFX9-NEXT: v_perm_b32 v3, s74, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s41, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s16, v31, 35
+; GFX9-NEXT: v_readlane_b32 s16, v31, 31
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: v_perm_b32 v2, s14, v2, v1
-; GFX9-NEXT: v_mov_b32_e32 v3, s74
-; GFX9-NEXT: v_readlane_b32 s14, v31, 34
+; GFX9-NEXT: v_mov_b32_e32 v3, s96
+; GFX9-NEXT: v_readlane_b32 s14, v31, 30
; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s14, v31, 33
+; GFX9-NEXT: v_readlane_b32 s14, v31, 29
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; GFX9-NEXT: v_mov_b32_e32 v2, s14
-; GFX9-NEXT: v_readlane_b32 s14, v31, 31
+; GFX9-NEXT: v_readlane_b32 s14, v31, 27
; GFX9-NEXT: v_mov_b32_e32 v3, s14
-; GFX9-NEXT: v_readlane_b32 s14, v31, 32
+; GFX9-NEXT: v_readlane_b32 s14, v31, 28
; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s15, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s14, v31, 30
+; GFX9-NEXT: v_readlane_b32 s14, v31, 26
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: v_mov_b32_e32 v2, s14
-; GFX9-NEXT: v_readlane_b32 s14, v30, 10
+; GFX9-NEXT: v_readlane_b32 s14, v30, 8
; GFX9-NEXT: v_perm_b32 v2, s12, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s14
-; GFX9-NEXT: v_readlane_b32 s12, v31, 29
+; GFX9-NEXT: v_readlane_b32 s12, v31, 25
; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s12, v31, 28
+; GFX9-NEXT: v_readlane_b32 s12, v31, 24
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; GFX9-NEXT: v_mov_b32_e32 v2, s12
-; GFX9-NEXT: v_readlane_b32 s12, v31, 26
+; GFX9-NEXT: v_readlane_b32 s12, v31, 22
; GFX9-NEXT: v_mov_b32_e32 v3, s12
-; GFX9-NEXT: v_readlane_b32 s12, v31, 27
+; GFX9-NEXT: v_readlane_b32 s12, v31, 23
; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s13, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s12, v31, 25
+; GFX9-NEXT: v_readlane_b32 s12, v31, 21
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; GFX9-NEXT: v_mov_b32_e32 v2, s12
-; GFX9-NEXT: v_readlane_b32 s12, v30, 12
+; GFX9-NEXT: v_readlane_b32 s12, v30, 10
; GFX9-NEXT: v_perm_b32 v2, s10, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s12
-; GFX9-NEXT: v_readlane_b32 s10, v31, 24
+; GFX9-NEXT: v_readlane_b32 s10, v31, 20
; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s10, v31, 23
+; GFX9-NEXT: v_readlane_b32 s10, v31, 19
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; GFX9-NEXT: v_mov_b32_e32 v2, s10
-; GFX9-NEXT: v_readlane_b32 s10, v31, 21
+; GFX9-NEXT: v_readlane_b32 s10, v31, 17
; GFX9-NEXT: v_mov_b32_e32 v3, s10
-; GFX9-NEXT: v_readlane_b32 s10, v31, 22
+; GFX9-NEXT: v_readlane_b32 s10, v31, 18
; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s11, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s10, v31, 20
+; GFX9-NEXT: v_readlane_b32 s10, v31, 16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; GFX9-NEXT: v_mov_b32_e32 v2, s10
-; GFX9-NEXT: v_readlane_b32 s10, v30, 14
+; GFX9-NEXT: v_readlane_b32 s10, v30, 12
; GFX9-NEXT: v_perm_b32 v2, s8, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s10
-; GFX9-NEXT: v_readlane_b32 s8, v31, 19
+; GFX9-NEXT: v_readlane_b32 s8, v31, 15
; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s8, v31, 18
+; GFX9-NEXT: v_readlane_b32 s8, v31, 14
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; GFX9-NEXT: v_mov_b32_e32 v2, s8
-; GFX9-NEXT: v_readlane_b32 s8, v31, 16
+; GFX9-NEXT: v_readlane_b32 s8, v31, 12
; GFX9-NEXT: v_mov_b32_e32 v3, s8
-; GFX9-NEXT: v_readlane_b32 s8, v31, 17
+; GFX9-NEXT: v_readlane_b32 s8, v31, 13
; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s9, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s8, v31, 15
+; GFX9-NEXT: v_readlane_b32 s8, v31, 11
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; GFX9-NEXT: v_mov_b32_e32 v2, s8
-; GFX9-NEXT: v_readlane_b32 s8, v30, 16
+; GFX9-NEXT: v_readlane_b32 s8, v30, 14
; GFX9-NEXT: v_perm_b32 v2, s6, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s8
-; GFX9-NEXT: v_readlane_b32 s6, v31, 14
+; GFX9-NEXT: v_readlane_b32 s6, v31, 10
; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s6, v31, 13
+; GFX9-NEXT: v_readlane_b32 s6, v31, 9
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; GFX9-NEXT: v_mov_b32_e32 v2, s6
-; GFX9-NEXT: v_readlane_b32 s6, v31, 11
+; GFX9-NEXT: v_readlane_b32 s6, v31, 7
; GFX9-NEXT: v_mov_b32_e32 v3, s6
-; GFX9-NEXT: v_readlane_b32 s6, v31, 12
+; GFX9-NEXT: v_readlane_b32 s6, v31, 8
; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s7, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s6, v31, 10
+; GFX9-NEXT: v_readlane_b32 s6, v31, 6
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; GFX9-NEXT: v_mov_b32_e32 v2, s6
-; GFX9-NEXT: v_readlane_b32 s6, v30, 18
+; GFX9-NEXT: v_readlane_b32 s6, v30, 16
; GFX9-NEXT: v_perm_b32 v2, s4, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s6
-; GFX9-NEXT: v_readlane_b32 s4, v31, 9
+; GFX9-NEXT: v_readlane_b32 s4, v31, 5
; GFX9-NEXT: v_perm_b32 v3, s4, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s4, v31, 8
+; GFX9-NEXT: v_readlane_b32 s4, v31, 4
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; GFX9-NEXT: v_mov_b32_e32 v2, s4
-; GFX9-NEXT: v_mov_b32_e32 v3, s75
+; GFX9-NEXT: v_mov_b32_e32 v3, s63
; GFX9-NEXT: v_perm_b32 v2, s5, v2, v1
; GFX9-NEXT: v_perm_b32 v1, s73, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: v_readlane_b32 s30, v29, 34
-; GFX9-NEXT: v_readlane_b32 s17, v30, 9
-; GFX9-NEXT: v_readlane_b32 s15, v30, 11
-; GFX9-NEXT: v_readlane_b32 s13, v30, 13
-; GFX9-NEXT: v_readlane_b32 s11, v30, 15
-; GFX9-NEXT: v_readlane_b32 s9, v30, 17
-; GFX9-NEXT: v_readlane_b32 s7, v30, 19
+; GFX9-NEXT: v_readlane_b32 s17, v30, 7
+; GFX9-NEXT: v_readlane_b32 s15, v30, 9
+; GFX9-NEXT: v_readlane_b32 s13, v30, 11
+; GFX9-NEXT: v_readlane_b32 s11, v30, 13
+; GFX9-NEXT: v_readlane_b32 s9, v30, 15
+; GFX9-NEXT: v_readlane_b32 s7, v30, 17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: v_readlane_b32 s31, v29, 35
; GFX9-NEXT: v_readlane_b32 s99, v29, 33
@@ -11959,24 +11954,24 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:184
; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v21
; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25
; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27
@@ -11984,7 +11979,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0
-; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -12050,13 +12045,13 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v38
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v39
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
@@ -12075,16 +12070,16 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v50
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v40
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192
@@ -12096,14 +12091,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:68
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52
; SI-NEXT: s_waitcnt vmcnt(14)
@@ -12307,7 +12302,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v49
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
@@ -12325,7 +12320,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
@@ -12335,12 +12330,12 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v54
+; SI-NEXT: v_or_b32_e32 v2, v2, v35
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
-; SI-NEXT: v_or_b32_e32 v3, v40, v3
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v3, v41, v3
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v1
@@ -12367,9 +12362,9 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr37
@@ -12377,14 +12372,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v53
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
@@ -12406,11 +12401,11 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
+; SI-NEXT: v_or_b32_e32 v5, v5, v51
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v56
@@ -12423,8 +12418,8 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v46
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v35
-; SI-NEXT: v_or_b32_e32 v8, v8, v44
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v49
+; SI-NEXT: v_or_b32_e32 v8, v8, v36
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xff, v33
@@ -12436,11 +12431,11 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v63
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v10, v10, v11
@@ -12461,9 +12456,9 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xff, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v38
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v57
@@ -12488,14 +12483,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v44
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -12927,7 +12922,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
@@ -12955,18 +12950,18 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v40, v2
+; SI-NEXT: v_or_b32_e32 v2, v41, v2
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -12993,7 +12988,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v1, v35, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
@@ -13007,7 +13002,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
+; SI-NEXT: v_or_b32_e32 v2, v53, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
@@ -13034,7 +13029,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
+; SI-NEXT: v_or_b32_e32 v5, v51, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -13056,9 +13051,9 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v44, v8
+; SI-NEXT: v_or_b32_e32 v8, v36, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -13102,7 +13097,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v11
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -13133,7 +13128,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v13
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v44
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
@@ -13502,35 +13497,35 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:104
; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:100
; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:96
; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:92
; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:60
; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:40
; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24
; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
@@ -13737,13 +13732,13 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: s_mov_b32 s6, 0xc0c0004
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v9, v33, v62, s6
+; VI-NEXT: v_perm_b32 v9, v62, v33, s6
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_perm_b32 v10, v63, v60, s6
+; VI-NEXT: v_perm_b32 v10, v60, v54, s6
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_perm_b32 v11, v53, v58, s6
+; VI-NEXT: v_perm_b32 v11, v58, v53, s6
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_perm_b32 v12, v51, v56, s6
+; VI-NEXT: v_perm_b32 v12, v56, v51, s6
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_perm_b32 v13, v37, v36, s6
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -13751,14 +13746,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_perm_b32 v15, v49, v48, s6
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; implicit-def: $vgpr45
@@ -13845,40 +13840,40 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v8, v8, v41, s6
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_perm_b32 v8, v55, v34, s6
+; VI-NEXT: v_perm_b32 v8, v55, v63, s6
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_perm_b32 v9, v61, v32, s6
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_perm_b32 v10, v59, v54, s6
+; VI-NEXT: v_perm_b32 v10, v59, v38, s6
; VI-NEXT: v_or_b32_e32 v10, v10, v11
; VI-NEXT: v_perm_b32 v11, v57, v52, s6
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v47, v38, s6
+; VI-NEXT: v_perm_b32 v12, v47, v34, s6
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_perm_b32 v13, v35, v46, s6
+; VI-NEXT: v_perm_b32 v13, v50, v46, s6
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_perm_b32 v14, v43, v50, s6
+; VI-NEXT: v_perm_b32 v14, v43, v35, s6
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_perm_b32 v15, v39, v42, s6
+; VI-NEXT: v_perm_b32 v15, v42, v39, s6
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v17, v16, s6
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
@@ -14238,10 +14233,10 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v31, 0x300
; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41
-; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60
-; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56
+; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v53
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v51
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36
; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44
; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48
@@ -14266,6 +14261,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_add_u16_e32 v0, 3, v0
; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1
@@ -14279,34 +14275,35 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23
-; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26
-; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: s_waitcnt vmcnt(13)
; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17
-; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: s_waitcnt vmcnt(12)
; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6
-; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: s_waitcnt vmcnt(11)
; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19
-; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: s_waitcnt vmcnt(9)
; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7
-; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: s_waitcnt vmcnt(8)
; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: s_waitcnt vmcnt(7)
; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: s_waitcnt vmcnt(6)
; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8
-; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -14411,9 +14408,9 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_add_u16_e32 v8, 3, v55
-; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34
+; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v9, 3, v33
+; VI-NEXT: v_add_u16_e32 v9, 3, v62
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v8, 0x300, v8
; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -14421,15 +14418,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v9, 3, v61
; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v10, 3, v63
+; VI-NEXT: v_add_u16_e32 v10, 3, v60
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v9, 0x300, v9
; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_add_u16_e32 v10, 3, v59
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v38
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v11, 3, v53
+; VI-NEXT: v_add_u16_e32 v11, 3, v58
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v10, 0x300, v10
; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -14437,20 +14434,20 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v11, 3, v57
; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v12, 3, v51
+; VI-NEXT: v_add_u16_e32 v12, 3, v56
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v11, 0x300, v11
; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v11, v11, v12
; VI-NEXT: v_add_u16_e32 v12, 3, v47
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v38
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v34
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v13, 3, v37
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v12, 0x300, v12
; VI-NEXT: v_add_u16_sdwa v13, v13, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_add_u16_e32 v13, 3, v35
+; VI-NEXT: v_add_u16_e32 v13, 3, v50
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v46
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 3, v45
@@ -14459,32 +14456,29 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v14, v14, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v13, v13, v14
; VI-NEXT: v_add_u16_e32 v14, 3, v43
-; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v50
+; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v35
; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v15, 3, v49
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 0x300, v14
; VI-NEXT: v_add_u16_sdwa v15, v15, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_add_u16_e32 v15, 3, v39
-; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v42
+; VI-NEXT: v_add_u16_e32 v15, 3, v42
+; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v39
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; VI-NEXT: v_add_u16_e32 v15, 0x300, v15
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_add_u16_e32 v16, 3, v16
; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -14787,31 +14781,31 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112
; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108
; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96
; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:88
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84
; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80
; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68
; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64
; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52
; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48
; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44
; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:32
; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:12
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(32)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
@@ -14889,7 +14883,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376
; GFX9-NEXT: s_waitcnt vmcnt(3)
@@ -15019,13 +15013,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6
+; GFX9-NEXT: v_perm_b32 v10, v55, v63, s6
; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6
; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6
; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6
; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6
; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6
; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -15109,40 +15104,39 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_perm_b32 v8, v35, v42, s6
-; GFX9-NEXT: v_perm_b32 v9, v41, v48, s6
+; GFX9-NEXT: v_perm_b32 v8, v48, v42, s6
+; GFX9-NEXT: v_perm_b32 v9, v41, v35, s6
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6
+; GFX9-NEXT: v_perm_b32 v9, v40, v39, s6
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6
+; GFX9-NEXT: v_perm_b32 v10, v32, v62, s6
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_perm_b32 v11, v54, v59, s6
+; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6
+; GFX9-NEXT: v_perm_b32 v12, v58, v52, s6
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6
+; GFX9-NEXT: v_perm_b32 v13, v47, v37, s6
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6
+; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6
; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14
; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr44
@@ -15285,202 +15279,202 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: .LBB14_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_4
@@ -15506,8 +15500,8 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48
-; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v35
+; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60
; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38
; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56
@@ -15517,56 +15511,53 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(24)
+; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0
-; GFX9-NEXT: s_waitcnt vmcnt(21)
-; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
+; GFX9-NEXT: s_waitcnt vmcnt(19)
; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3
; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8
; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
+; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
+; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
+; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
+; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20
; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7
; GFX9-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23
; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
+; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
+; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
+; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
+; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v1, 3, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -15670,7 +15661,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_add_u16_e32 v8, 3, v35
+; GFX9-NEXT: v_add_u16_e32 v8, 3, v48
; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v42
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 3, v41
@@ -15678,15 +15669,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_add_u16_e32 v9, 3, v39
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v40
+; GFX9-NEXT: v_add_u16_e32 v9, 3, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v39
; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v10, 3, v55
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_add_u16_e32 v10, 3, v63
+; GFX9-NEXT: v_add_u16_e32 v10, 3, v32
; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 3, v61
@@ -15694,16 +15685,16 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_add_u16_e32 v11, 3, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v59
+; GFX9-NEXT: v_add_u16_e32 v11, 3, v59
+; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v12, 3, v53
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_add_u16_e32 v12, 3, v37
-; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58
+; GFX9-NEXT: v_add_u16_e32 v12, 3, v58
+; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v52
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 3, v57
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -15711,14 +15702,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
; GFX9-NEXT: v_add_u16_e32 v13, 3, v47
-; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52
+; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v37
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v14, 3, v51
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_add_u16_e32 v14, 3, v33
+; GFX9-NEXT: v_add_u16_e32 v14, 3, v36
; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v15, 3, v45
@@ -15736,7 +15727,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_add_u16_e32 v16, 3, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -15745,7 +15736,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v17, 3, v17
; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -15954,9 +15945,12 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; GFX9-NEXT: v_add_u16_e32 v32, 3, v36
-; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+; GFX9-NEXT: v_add_u16_e32 v32, 3, v33
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v32
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: .LBB14_4: ; %end
@@ -22814,38 +22808,38 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s8, s4, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s4, 16
+; SI-NEXT: s_and_b32 s4, s49, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 1
; SI-NEXT: s_and_b32 s4, s50, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 2
+; SI-NEXT: v_writelane_b32 v34, s4, 3
; SI-NEXT: s_lshl_b32 s4, s50, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 1
+; SI-NEXT: v_writelane_b32 v34, s4, 2
; SI-NEXT: s_and_b32 s4, s51, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 4
+; SI-NEXT: v_writelane_b32 v34, s4, 5
; SI-NEXT: s_lshl_b32 s4, s51, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 3
+; SI-NEXT: v_writelane_b32 v34, s4, 4
; SI-NEXT: s_and_b32 s4, s52, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 6
+; SI-NEXT: v_writelane_b32 v34, s4, 7
; SI-NEXT: s_lshl_b32 s4, s52, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 5
+; SI-NEXT: v_writelane_b32 v34, s4, 6
; SI-NEXT: s_and_b32 s4, s53, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 8
+; SI-NEXT: v_writelane_b32 v34, s4, 9
; SI-NEXT: s_lshl_b32 s4, s53, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 7
+; SI-NEXT: v_writelane_b32 v34, s4, 8
; SI-NEXT: s_and_b32 s4, s54, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 10
+; SI-NEXT: v_writelane_b32 v34, s4, 11
; SI-NEXT: s_lshl_b32 s4, s54, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 9
+; SI-NEXT: v_writelane_b32 v34, s4, 10
; SI-NEXT: s_and_b32 s4, s55, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 12
+; SI-NEXT: v_writelane_b32 v34, s4, 13
; SI-NEXT: s_lshl_b32 s4, s55, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 11
+; SI-NEXT: v_writelane_b32 v34, s4, 12
; SI-NEXT: s_and_b32 s4, s64, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 14
+; SI-NEXT: v_writelane_b32 v34, s4, 15
; SI-NEXT: s_lshl_b32 s4, s64, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 13
-; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 14
; SI-NEXT: s_lshl_b32 s4, s29, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 15
+; SI-NEXT: v_writelane_b32 v34, s4, 16
; SI-NEXT: s_and_b32 s4, s27, 0xffff0000
; SI-NEXT: v_writelane_b32 v34, s4, 18
; SI-NEXT: s_lshl_b32 s4, s27, 16
@@ -22871,27 +22865,27 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_lshl_b32 s47, s39, 16
; SI-NEXT: s_and_b32 s58, s48, 0xffff0000
; SI-NEXT: s_lshl_b32 s57, s48, 16
-; SI-NEXT: s_and_b32 s60, s49, 0xffff0000
; SI-NEXT: s_lshl_b32 s59, s49, 16
+; SI-NEXT: s_and_b32 s92, s29, 0xffff0000
; SI-NEXT: s_and_b32 s94, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s93, s28, 16
; SI-NEXT: v_writelane_b32 v34, s4, 19
-; SI-NEXT: s_and_b32 s62, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s61, s25, 16
-; SI-NEXT: s_and_b32 s72, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s63, s24, 16
-; SI-NEXT: s_and_b32 s74, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s73, s23, 16
-; SI-NEXT: s_and_b32 s76, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s75, s22, 16
-; SI-NEXT: s_and_b32 s78, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s77, s21, 16
-; SI-NEXT: s_and_b32 s88, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s79, s20, 16
-; SI-NEXT: s_and_b32 s90, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s89, s19, 16
-; SI-NEXT: s_and_b32 s92, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s18, 16
+; SI-NEXT: s_and_b32 s61, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s60, s25, 16
+; SI-NEXT: s_and_b32 s63, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s24, 16
+; SI-NEXT: s_and_b32 s73, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s72, s23, 16
+; SI-NEXT: s_and_b32 s75, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s22, 16
+; SI-NEXT: s_and_b32 s77, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s21, 16
+; SI-NEXT: s_and_b32 s79, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s78, s20, 16
+; SI-NEXT: s_and_b32 s89, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s19, 16
+; SI-NEXT: s_and_b32 s91, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s18, 16
; SI-NEXT: s_and_b32 vcc_lo, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s95, s17, 16
; SI-NEXT: s_and_b32 s6, s16, 0xffff0000
@@ -22905,26 +22899,26 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr73
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr59
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr47
@@ -22988,25 +22982,25 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_mov_b32 s65, s63
-; SI-NEXT: s_mov_b32 s66, s72
-; SI-NEXT: s_mov_b32 s67, s73
-; SI-NEXT: s_mov_b32 s68, s74
-; SI-NEXT: s_mov_b32 s69, s75
-; SI-NEXT: s_mov_b32 s70, s76
-; SI-NEXT: s_mov_b32 s71, s77
-; SI-NEXT: s_mov_b32 s80, s78
-; SI-NEXT: s_mov_b32 s81, s79
-; SI-NEXT: s_mov_b32 s82, s88
-; SI-NEXT: s_mov_b32 s83, s89
-; SI-NEXT: s_mov_b32 s84, s90
-; SI-NEXT: s_mov_b32 s85, s91
-; SI-NEXT: s_mov_b32 s86, s92
+; SI-NEXT: s_mov_b32 s65, s62
+; SI-NEXT: s_mov_b32 s66, s63
+; SI-NEXT: s_mov_b32 s67, s72
+; SI-NEXT: s_mov_b32 s68, s73
+; SI-NEXT: s_mov_b32 s69, s74
+; SI-NEXT: s_mov_b32 s70, s75
+; SI-NEXT: s_mov_b32 s71, s76
+; SI-NEXT: s_mov_b32 s80, s77
+; SI-NEXT: s_mov_b32 s81, s78
+; SI-NEXT: s_mov_b32 s82, s79
+; SI-NEXT: s_mov_b32 s83, s88
+; SI-NEXT: s_mov_b32 s84, s89
+; SI-NEXT: s_mov_b32 s85, s90
+; SI-NEXT: s_mov_b32 s86, s91
; SI-NEXT: s_mov_b32 s87, s95
; SI-NEXT: s_mov_b32 s96, vcc_lo
-; SI-NEXT: s_mov_b32 vcc_lo, s61
+; SI-NEXT: s_mov_b32 vcc_lo, s60
; SI-NEXT: s_mov_b32 s97, vcc_hi
-; SI-NEXT: s_mov_b32 vcc_hi, s62
+; SI-NEXT: s_mov_b32 vcc_hi, s61
; SI-NEXT: s_mov_b32 s98, s6
; SI-NEXT: s_mov_b32 s4, s7
; SI-NEXT: s_mov_b32 s5, s8
@@ -23029,26 +23023,25 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_mov_b32 s47, s57
; SI-NEXT: s_mov_b32 s56, s58
; SI-NEXT: s_mov_b32 s57, s59
-; SI-NEXT: s_mov_b32 s58, s60
-; SI-NEXT: v_readlane_b32 s59, v34, 1
-; SI-NEXT: v_readlane_b32 s60, v34, 2
-; SI-NEXT: v_readlane_b32 s61, v34, 3
-; SI-NEXT: v_readlane_b32 s62, v34, 4
-; SI-NEXT: v_readlane_b32 s63, v34, 5
-; SI-NEXT: v_readlane_b32 s72, v34, 6
-; SI-NEXT: v_readlane_b32 s73, v34, 7
-; SI-NEXT: v_readlane_b32 s74, v34, 8
-; SI-NEXT: v_readlane_b32 s75, v34, 9
-; SI-NEXT: v_readlane_b32 s76, v34, 10
-; SI-NEXT: v_readlane_b32 s77, v34, 11
-; SI-NEXT: v_readlane_b32 s78, v34, 12
-; SI-NEXT: v_readlane_b32 s79, v34, 13
-; SI-NEXT: v_readlane_b32 s88, v34, 14
-; SI-NEXT: v_readlane_b32 s89, v34, 15
-; SI-NEXT: v_readlane_b32 s90, v34, 16
+; SI-NEXT: v_readlane_b32 s58, v34, 1
+; SI-NEXT: v_readlane_b32 s59, v34, 2
+; SI-NEXT: v_readlane_b32 s60, v34, 3
+; SI-NEXT: v_readlane_b32 s61, v34, 4
+; SI-NEXT: v_readlane_b32 s62, v34, 5
+; SI-NEXT: v_readlane_b32 s63, v34, 6
+; SI-NEXT: v_readlane_b32 s72, v34, 7
+; SI-NEXT: v_readlane_b32 s73, v34, 8
+; SI-NEXT: v_readlane_b32 s74, v34, 9
+; SI-NEXT: v_readlane_b32 s75, v34, 10
+; SI-NEXT: v_readlane_b32 s76, v34, 11
+; SI-NEXT: v_readlane_b32 s77, v34, 12
+; SI-NEXT: v_readlane_b32 s78, v34, 13
+; SI-NEXT: v_readlane_b32 s79, v34, 14
+; SI-NEXT: v_readlane_b32 s88, v34, 15
+; SI-NEXT: v_readlane_b32 s89, v34, 16
; SI-NEXT: v_readlane_b32 s6, v34, 17
-; SI-NEXT: v_readlane_b32 s91, v34, 18
-; SI-NEXT: v_readlane_b32 s92, v34, 19
+; SI-NEXT: v_readlane_b32 s90, v34, 18
+; SI-NEXT: v_readlane_b32 s91, v34, 19
; SI-NEXT: v_readlane_b32 s95, v34, 20
; SI-NEXT: s_cbranch_scc1 .LBB17_5
; SI-NEXT: ; %bb.4: ; %cmp.true
@@ -23121,14 +23114,14 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_lshl_b32 s77, s55, 16
; SI-NEXT: s_and_b32 s88, s64, 0xffff0000
; SI-NEXT: s_lshl_b32 s79, s64, 16
-; SI-NEXT: s_and_b32 s90, s29, 0xffff0000
+; SI-NEXT: s_and_b32 s92, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s89, s29, 16
; SI-NEXT: s_and_b32 s94, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s93, s28, 16
-; SI-NEXT: s_and_b32 s91, s27, 0xffff0000
+; SI-NEXT: s_and_b32 s90, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s6, s27, 16
; SI-NEXT: s_and_b32 s95, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s26, 16
+; SI-NEXT: s_lshl_b32 s91, s26, 16
; SI-NEXT: s_and_b32 vcc_hi, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, s25, 16
; SI-NEXT: s_and_b32 s66, s24, 0xffff0000
@@ -23192,9 +23185,9 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s91
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s90
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
; SI-NEXT: v_mul_f32_e64 v11, 1.0, s6
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
@@ -23202,7 +23195,7 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s93
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s92
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
; SI-NEXT: v_mul_f32_e64 v13, 1.0, s89
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
@@ -31593,44 +31586,47 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v51, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20
; SI-NEXT: v_mov_b32_e32 v52, v18
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v15
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
; SI-NEXT: v_mov_b32_e32 v43, v11
; SI-NEXT: v_mov_b32_e32 v44, v10
; SI-NEXT: v_mov_b32_e32 v45, v9
@@ -31642,23 +31638,22 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v59, v3
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v28
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
@@ -31672,95 +31667,96 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB22_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v32
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v48
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v35
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v39
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v38
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v37
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -31773,23 +31769,20 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
@@ -31798,6 +31791,9 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
@@ -31820,19 +31816,23 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v51
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -31852,10 +31852,6 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
@@ -31923,15 +31919,13 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB22_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB22_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v62
; SI-NEXT: v_cvt_f32_f16_e32 v3, v61
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -31946,7 +31940,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v49
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_cvt_f32_f16_e32 v4, v59
; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
@@ -31958,7 +31952,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v32
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
@@ -31969,7 +31963,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v49
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v48
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v47
@@ -31980,7 +31974,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v35
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v45
@@ -31991,7 +31985,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v39
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v43
@@ -32002,7 +31996,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v41
@@ -32013,7 +32007,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v38
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v55
@@ -32035,103 +32029,103 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v37
+; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v51
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v37
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v51
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v63
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
@@ -32139,31 +32133,31 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -34782,6 +34776,12 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32
+; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16
+; SI-NEXT: v_mov_b32_e32 v43, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
+; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: v_mov_b32_e32 v45, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19
; SI-NEXT: v_mov_b32_e32 v46, v8
@@ -34800,8 +34800,8 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
; SI-NEXT: v_mov_b32_e32 v61, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27
-; SI-NEXT: v_mov_b32_e32 v43, v11
-; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_mov_b32_e32 v40, v14
+; SI-NEXT: v_mov_b32_e32 v41, v13
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
@@ -34812,18 +34812,14 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45
@@ -34835,147 +34831,151 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v13
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB26_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_or_b32_e32 v8, v8, v32
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
+; SI-NEXT: v_or_b32_e32 v4, v4, v32
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: v_or_b32_e32 v0, v0, v49
-; SI-NEXT: v_or_b32_e32 v1, v1, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v41
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v40
-; SI-NEXT: v_or_b32_e32 v6, v6, v48
-; SI-NEXT: v_or_b32_e32 v7, v7, v55
-; SI-NEXT: v_or_b32_e32 v9, v9, v54
-; SI-NEXT: v_or_b32_e32 v10, v10, v39
-; SI-NEXT: v_or_b32_e32 v11, v11, v53
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_or_b32_e32 v1, v1, v55
+; SI-NEXT: v_or_b32_e32 v2, v2, v39
+; SI-NEXT: v_or_b32_e32 v3, v3, v54
+; SI-NEXT: v_or_b32_e32 v5, v5, v53
+; SI-NEXT: v_or_b32_e32 v6, v6, v38
+; SI-NEXT: v_or_b32_e32 v7, v7, v52
+; SI-NEXT: v_or_b32_e32 v8, v8, v35
+; SI-NEXT: v_or_b32_e32 v9, v9, v51
+; SI-NEXT: v_or_b32_e32 v10, v10, v37
+; SI-NEXT: v_or_b32_e32 v11, v11, v50
+; SI-NEXT: v_or_b32_e32 v12, v12, v33
+; SI-NEXT: v_or_b32_e32 v13, v13, v49
+; SI-NEXT: v_or_b32_e32 v14, v14, v36
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -34987,24 +34987,51 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v16, v16, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_or_b32_e32 v19, v19, v20
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
@@ -35024,51 +35051,33 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v12, v38
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v13, v52
-; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v14, v37
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v15, v51
-; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v36
-; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v17, v50
-; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v29, v30
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v35
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v15, v48
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v30, v30, v31
@@ -35106,72 +35115,63 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB26_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB26_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v32, v8
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v4, v32, v4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v60
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v59
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42
+; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v41
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_or_b32_e32 v1, v42, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v41, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v40, v5
-; SI-NEXT: v_or_b32_e32 v6, v48, v6
-; SI-NEXT: v_or_b32_e32 v7, v55, v7
-; SI-NEXT: v_or_b32_e32 v9, v54, v9
-; SI-NEXT: v_or_b32_e32 v10, v39, v10
-; SI-NEXT: v_or_b32_e32 v11, v53, v11
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v0, v34, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
+; SI-NEXT: v_or_b32_e32 v2, v39, v2
+; SI-NEXT: v_or_b32_e32 v3, v54, v3
+; SI-NEXT: v_or_b32_e32 v5, v53, v5
+; SI-NEXT: v_or_b32_e32 v6, v38, v6
+; SI-NEXT: v_or_b32_e32 v7, v52, v7
+; SI-NEXT: v_or_b32_e32 v8, v35, v8
+; SI-NEXT: v_or_b32_e32 v9, v51, v9
+; SI-NEXT: v_or_b32_e32 v10, v37, v10
+; SI-NEXT: v_or_b32_e32 v11, v50, v11
+; SI-NEXT: v_or_b32_e32 v12, v33, v12
+; SI-NEXT: v_or_b32_e32 v13, v49, v13
+; SI-NEXT: v_or_b32_e32 v14, v36, v14
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -35180,21 +35180,52 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_or_b32_e32 v19, v20, v19
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v21, v20
@@ -35217,70 +35248,46 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v24, v23
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v38, v12
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v25, v24
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v52, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v26, v25
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v37, v14
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v27, v26
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v51, v15
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v28, v27
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v36, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v29, v28
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v50, v17
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v30, v29
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v35, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v48, v15
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
@@ -35624,8 +35631,8 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
-; SI-NEXT: s_lshr_b32 s12, s11, 16
-; SI-NEXT: s_lshr_b32 s64, s13, 16
+; SI-NEXT: s_lshr_b32 s65, s11, 16
+; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s63, s15, 16
; SI-NEXT: s_lshr_b32 s72, s73, 16
; SI-NEXT: s_lshr_b32 s74, s75, 16
@@ -35644,8 +35651,8 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v33, s12, 0
-; SI-NEXT: v_writelane_b32 v33, s64, 1
+; SI-NEXT: v_writelane_b32 v33, s10, 0
+; SI-NEXT: v_writelane_b32 v33, s12, 1
; SI-NEXT: s_cbranch_scc0 .LBB27_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s5, s16, 0xffff
@@ -35735,24 +35742,24 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s14, s63
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s66, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s67, 16
-; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_or_b32 s67, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB27_3
; SI-NEXT: .LBB27_2:
; SI-NEXT: s_mov_b32 s14, s63
-; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
@@ -35909,15 +35916,15 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s66, s4, 0x30000
@@ -40781,124 +40788,124 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
@@ -41012,106 +41019,106 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[15:16]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
; VI-NEXT: v_mov_b32_e32 v55, v39
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v1
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; VI-NEXT: .LBB36_2: ; %Flow
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
@@ -41228,191 +41235,193 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
; VI-NEXT: v_add_f32_e32 v14, 1.0, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; VI-NEXT: v_add_f32_e32 v13, 1.0, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
; VI-NEXT: v_add_f32_e32 v12, 1.0, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: v_add_f32_e32 v10, 1.0, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v11, 1.0, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: v_add_f32_e32 v10, 1.0, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_add_f32_e32 v6, 1.0, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; VI-NEXT: v_add_f32_e32 v11, 1.0, v11
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_add_f32_e32 v4, 1.0, v4
; VI-NEXT: v_add_f32_e32 v3, 1.0, v3
; VI-NEXT: v_add_f32_e32 v9, 1.0, v9
; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_add_f32_e32 v2, 1.0, v2
; VI-NEXT: v_add_f32_e32 v1, 1.0, v1
; VI-NEXT: v_add_f32_e32 v7, 1.0, v7
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v1
; VI-NEXT: .LBB36_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v11, v11, v48, s4
-; VI-NEXT: v_perm_b32 v3, v3, v33, s4
-; VI-NEXT: v_perm_b32 v33, v50, v39, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v34, s4
+; VI-NEXT: v_perm_b32 v34, v62, v39, s4
; VI-NEXT: v_perm_b32 v39, v49, v53, s4
-; VI-NEXT: v_perm_b32 v49, v57, v52, s4
-; VI-NEXT: v_perm_b32 v34, v34, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; VI-NEXT: v_or_b32_e32 v1, v1, v34
-; VI-NEXT: v_perm_b32 v2, v2, v61, s4
-; VI-NEXT: v_perm_b32 v40, v59, v40, s4
+; VI-NEXT: v_perm_b32 v6, v6, v50, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v41, v61, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v35, s4
+; VI-NEXT: v_perm_b32 v33, v33, v40, s4
+; VI-NEXT: v_perm_b32 v3, v3, v59, s4
; VI-NEXT: v_perm_b32 v4, v4, v58, s4
-; VI-NEXT: v_perm_b32 v5, v5, v43, s4
-; VI-NEXT: v_perm_b32 v6, v6, v62, s4
-; VI-NEXT: v_perm_b32 v37, v37, v54, s4
-; VI-NEXT: v_perm_b32 v7, v7, v56, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v35, v60, v54, s4
+; VI-NEXT: v_perm_b32 v7, v7, v43, s4
; VI-NEXT: v_perm_b32 v8, v8, v47, s4
; VI-NEXT: v_perm_b32 v9, v9, v46, s4
; VI-NEXT: v_perm_b32 v10, v10, v45, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v12, v12, v38, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v13, v48, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v12, v12, v48, s4
; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v38, v51, s4
+; VI-NEXT: v_perm_b32 v13, v13, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v48, v51, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v14, v14, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v48, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v49, v49, v50, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v15, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v38, v52, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v50, v50, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v17, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v18, v18, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v51, v51, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v41
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v60, v44, s4
+; VI-NEXT: v_perm_b32 v1, v44, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_perm_b32 v3, v20, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_perm_b32 v51, v51, v52, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -41421,38 +41430,38 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v51
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -41461,16 +41470,13 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v1, v36, v35, s4
+; VI-NEXT: v_perm_b32 v1, v57, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_perm_b32 v1, v19, v63, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v20, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
@@ -41702,40 +41708,86 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(25)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
@@ -41788,244 +41840,205 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB36_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: s_waitcnt vmcnt(24)
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v11
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v4
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v9
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: .LBB36_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v53, v50
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB36_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_add_f32_e32 v32, 1.0, v32
-; GFX9-NEXT: s_waitcnt vmcnt(22)
+; GFX9-NEXT: s_waitcnt vmcnt(24)
; GFX9-NEXT: v_add_f32_e32 v31, 1.0, v31
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
; GFX9-NEXT: v_add_f32_e32 v30, 1.0, v30
@@ -42088,264 +42101,268 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8
+; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v9
; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4
+; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3
-; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v4
; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1
-; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v6
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v2
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v3
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB36_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v8, v8, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v33, v34, v53, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v7, v7, v50, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v49, s4
+; GFX9-NEXT: v_perm_b32 v36, v36, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v5, v5, v51, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v53, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4
-; GFX9-NEXT: v_perm_b32 v41, v63, v41, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v46, s4
+; GFX9-NEXT: v_perm_b32 v52, v45, v40, s4
+; GFX9-NEXT: v_perm_b32 v41, v47, v41, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v47, s4
-; GFX9-NEXT: v_perm_b32 v38, v38, v40, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v46, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v45, s4
-; GFX9-NEXT: v_perm_b32 v39, v58, v39, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
-; GFX9-NEXT: v_perm_b32 v36, v56, v54, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v43, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v62, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v35, v35, v50, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v10, v10, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v8, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v11, v11, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v10, v10, v34, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v34, v34, v49, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v34, v34, v54, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v12, v12, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_perm_b32 v53, v61, v53, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v17, v17, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v14, v14, v51, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v50, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v35, v35, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v51, v58, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v49, v50, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v51, v49, v51, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v52, v57, v52, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v49, s4
+; GFX9-NEXT: v_perm_b32 v33, v33, v45, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v49, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v54, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -42354,147 +42371,146 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v1, v44, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v38, v63, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: v_perm_b32 v1, v55, v42, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v48, v37, s4
+; GFX9-NEXT: v_perm_b32 v1, v37, v48, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v19, v62, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v49, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; GFX9-NEXT: v_perm_b32 v1, v20, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v59, s4
+; GFX9-NEXT: v_perm_b32 v2, v59, v44, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v21, v57, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
@@ -43552,74 +43568,74 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_lshr_b64 s[40:41], s[34:35], 16
; SI-NEXT: v_writelane_b32 v61, s40, 46
; SI-NEXT: v_writelane_b32 v61, s41, 47
-; SI-NEXT: s_lshr_b64 s[40:41], s[34:35], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 44
-; SI-NEXT: v_writelane_b32 v61, s41, 45
-; SI-NEXT: s_lshr_b64 s[40:41], s[38:39], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 42
-; SI-NEXT: v_writelane_b32 v61, s41, 43
-; SI-NEXT: s_lshr_b64 s[40:41], s[48:49], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 40
-; SI-NEXT: v_writelane_b32 v61, s41, 41
-; SI-NEXT: s_lshr_b64 s[40:41], s[48:49], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 38
-; SI-NEXT: v_writelane_b32 v61, s41, 39
-; SI-NEXT: s_lshr_b64 s[40:41], s[48:49], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 36
-; SI-NEXT: v_writelane_b32 v61, s41, 37
-; SI-NEXT: s_lshr_b64 s[40:41], s[50:51], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 34
-; SI-NEXT: v_writelane_b32 v61, s41, 35
-; SI-NEXT: s_lshr_b64 s[40:41], s[50:51], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 32
-; SI-NEXT: v_writelane_b32 v61, s41, 33
-; SI-NEXT: s_lshr_b64 s[40:41], s[50:51], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 30
-; SI-NEXT: v_writelane_b32 v61, s41, 31
-; SI-NEXT: s_lshr_b64 s[40:41], s[52:53], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 28
-; SI-NEXT: v_writelane_b32 v61, s41, 29
-; SI-NEXT: s_lshr_b64 s[40:41], s[52:53], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 26
-; SI-NEXT: v_writelane_b32 v61, s41, 27
-; SI-NEXT: s_lshr_b64 s[40:41], s[52:53], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 24
-; SI-NEXT: v_writelane_b32 v61, s41, 25
-; SI-NEXT: s_lshr_b64 s[40:41], s[54:55], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 22
-; SI-NEXT: v_writelane_b32 v61, s41, 23
-; SI-NEXT: s_lshr_b64 s[40:41], s[54:55], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 20
-; SI-NEXT: v_writelane_b32 v61, s41, 21
-; SI-NEXT: s_lshr_b64 s[40:41], s[54:55], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 18
-; SI-NEXT: v_writelane_b32 v61, s41, 19
-; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 16
-; SI-NEXT: v_writelane_b32 v61, s41, 17
-; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 14
-; SI-NEXT: v_writelane_b32 v61, s41, 15
-; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 12
-; SI-NEXT: v_writelane_b32 v61, s41, 13
-; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 10
-; SI-NEXT: v_writelane_b32 v61, s41, 11
-; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 8
-; SI-NEXT: v_writelane_b32 v61, s41, 9
-; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 6
-; SI-NEXT: v_writelane_b32 v61, s41, 7
-; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 24
-; SI-NEXT: v_writelane_b32 v61, s40, 4
-; SI-NEXT: v_writelane_b32 v61, s41, 5
-; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 16
-; SI-NEXT: v_writelane_b32 v61, s40, 2
-; SI-NEXT: v_writelane_b32 v61, s41, 3
-; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 8
-; SI-NEXT: v_writelane_b32 v61, s40, 0
+; SI-NEXT: s_lshr_b64 s[44:45], s[38:39], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 44
+; SI-NEXT: v_writelane_b32 v61, s45, 45
+; SI-NEXT: s_lshr_b64 s[44:45], s[48:49], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 42
+; SI-NEXT: v_writelane_b32 v61, s45, 43
+; SI-NEXT: s_lshr_b64 s[44:45], s[48:49], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 40
+; SI-NEXT: v_writelane_b32 v61, s45, 41
+; SI-NEXT: s_lshr_b64 s[44:45], s[48:49], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 38
+; SI-NEXT: v_writelane_b32 v61, s45, 39
+; SI-NEXT: s_lshr_b64 s[44:45], s[50:51], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 36
+; SI-NEXT: v_writelane_b32 v61, s45, 37
+; SI-NEXT: s_lshr_b64 s[44:45], s[50:51], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 34
+; SI-NEXT: v_writelane_b32 v61, s45, 35
+; SI-NEXT: s_lshr_b64 s[44:45], s[50:51], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 32
+; SI-NEXT: v_writelane_b32 v61, s45, 33
+; SI-NEXT: s_lshr_b64 s[44:45], s[52:53], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 30
+; SI-NEXT: v_writelane_b32 v61, s45, 31
+; SI-NEXT: s_lshr_b64 s[44:45], s[52:53], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 28
+; SI-NEXT: v_writelane_b32 v61, s45, 29
+; SI-NEXT: s_lshr_b64 s[44:45], s[52:53], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 26
+; SI-NEXT: v_writelane_b32 v61, s45, 27
+; SI-NEXT: s_lshr_b64 s[44:45], s[54:55], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 24
+; SI-NEXT: v_writelane_b32 v61, s45, 25
+; SI-NEXT: s_lshr_b64 s[44:45], s[54:55], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 22
+; SI-NEXT: v_writelane_b32 v61, s45, 23
+; SI-NEXT: s_lshr_b64 s[44:45], s[54:55], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 20
+; SI-NEXT: v_writelane_b32 v61, s45, 21
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 18
+; SI-NEXT: v_writelane_b32 v61, s45, 19
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 16
+; SI-NEXT: v_writelane_b32 v61, s45, 17
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 14
+; SI-NEXT: v_writelane_b32 v61, s45, 15
+; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 12
+; SI-NEXT: v_writelane_b32 v61, s45, 13
+; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 10
+; SI-NEXT: v_writelane_b32 v61, s45, 11
+; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 8
+; SI-NEXT: v_writelane_b32 v61, s45, 9
+; SI-NEXT: s_lshr_b64 s[44:45], s[24:25], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 6
+; SI-NEXT: v_writelane_b32 v61, s45, 7
+; SI-NEXT: s_lshr_b64 s[44:45], s[24:25], 16
+; SI-NEXT: v_writelane_b32 v61, s44, 4
+; SI-NEXT: v_writelane_b32 v61, s45, 5
+; SI-NEXT: s_lshr_b64 s[44:45], s[24:25], 8
+; SI-NEXT: v_writelane_b32 v61, s44, 2
+; SI-NEXT: v_writelane_b32 v61, s45, 3
+; SI-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; SI-NEXT: v_writelane_b32 v61, s44, 0
; SI-NEXT: s_lshr_b32 s71, s9, 24
; SI-NEXT: s_lshr_b32 s81, s9, 16
; SI-NEXT: s_lshr_b32 s82, s9, 8
@@ -43646,24 +43662,24 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_mov_b64 s[4:5], s[8:9]
; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[12:13], s[30:31], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[34:35], 8
; SI-NEXT: s_lshr_b64 s[56:57], s[36:37], 24
; SI-NEXT: s_lshr_b64 s[58:59], s[36:37], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[36:37], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[38:39], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[38:39], 8
-; SI-NEXT: v_writelane_b32 v61, s41, 1
-; SI-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[40:41], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[40:41], s[36:37], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[38:39], 24
+; SI-NEXT: s_lshr_b64 s[42:43], s[38:39], 16
+; SI-NEXT: v_writelane_b32 v61, s45, 1
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[88:89], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 16
-; SI-NEXT: s_lshr_b64 vcc, s[16:17], 8
+; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
+; SI-NEXT: s_lshr_b64 vcc, s[18:19], 8
+; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 24
+; SI-NEXT: s_lshr_b64 s[44:45], s[16:17], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 8
; SI-NEXT: s_mov_b64 s[64:65], 0
; SI-NEXT: s_branch .LBB37_3
; SI-NEXT: .LBB37_2:
@@ -43698,23 +43714,23 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
@@ -43854,25 +43870,15 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_cmp_lg_u32 s6, 1
; SI-NEXT: s_cbranch_scc1 .LBB37_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_add_f32_e64 v1, s48, 1.0
-; SI-NEXT: v_add_f32_e64 v20, s28, 1.0
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s28, v1
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e64 v1, s38, 1.0
-; SI-NEXT: v_add_f32_e64 v25, s24, 1.0
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s24, v1
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_f32_e64 v1, s36, 1.0
; SI-NEXT: v_add_f32_e64 v27, s22, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s22, v1
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_f32_e64 v1, s34, 1.0
-; SI-NEXT: v_add_f32_e64 v29, s20, 1.0
+; SI-NEXT: v_add_f32_e64 v25, s24, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s20, v1
+; SI-NEXT: v_readfirstlane_b32 s24, v1
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_f32_e64 v1, s30, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
@@ -43885,62 +43891,72 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v1
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v16
; SI-NEXT: v_add_f32_e64 v18, s29, 1.0
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v18
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v18
; SI-NEXT: v_add_f32_e64 v21, s27, 1.0
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v18
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v21
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v21
; SI-NEXT: v_add_f32_e64 v23, s25, 1.0
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v21
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v23
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v23
+; SI-NEXT: v_add_f32_e64 v24, s23, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v23
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT: v_add_f32_e64 v30, s17, 1.0
; SI-NEXT: v_add_f32_e64 v32, s16, 1.0
; SI-NEXT: v_add_f32_e64 v28, s19, 1.0
; SI-NEXT: v_add_f32_e64 v31, s18, 1.0
; SI-NEXT: v_add_f32_e64 v26, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v24, s23, 1.0
+; SI-NEXT: v_add_f32_e64 v29, s20, 1.0
; SI-NEXT: v_add_f32_e64 v22, s26, 1.0
+; SI-NEXT: v_add_f32_e64 v20, s28, 1.0
; SI-NEXT: v_add_f32_e64 v19, s54, 1.0
; SI-NEXT: v_add_f32_e64 v14, s53, 1.0
; SI-NEXT: v_add_f32_e64 v17, s52, 1.0
; SI-NEXT: v_add_f32_e64 v12, s51, 1.0
; SI-NEXT: v_add_f32_e64 v15, s50, 1.0
; SI-NEXT: v_add_f32_e64 v10, s49, 1.0
+; SI-NEXT: v_add_f32_e64 v13, s48, 1.0
; SI-NEXT: v_add_f32_e64 v8, s39, 1.0
+; SI-NEXT: v_add_f32_e64 v11, s38, 1.0
; SI-NEXT: v_add_f32_e64 v6, s37, 1.0
; SI-NEXT: v_add_f32_e64 v4, s35, 1.0
; SI-NEXT: v_add_f32_e64 v2, s31, 1.0
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v23
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v24
; SI-NEXT: v_readfirstlane_b32 s98, v32
; SI-NEXT: v_readfirstlane_b32 s99, v30
; SI-NEXT: v_readfirstlane_b32 s84, v31
@@ -43959,39 +43975,41 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s89, v16
; SI-NEXT: v_readfirstlane_b32 s90, v17
; SI-NEXT: v_readfirstlane_b32 s91, v14
-; SI-NEXT: v_readfirstlane_b32 s46, v15
-; SI-NEXT: v_readfirstlane_b32 s47, v12
-; SI-NEXT: v_readfirstlane_b32 s29, v10
-; SI-NEXT: v_readfirstlane_b32 s25, v8
+; SI-NEXT: v_readfirstlane_b32 s60, v15
+; SI-NEXT: v_readfirstlane_b32 s61, v12
+; SI-NEXT: v_readfirstlane_b32 s26, v13
+; SI-NEXT: v_readfirstlane_b32 s27, v10
+; SI-NEXT: v_readfirstlane_b32 s20, v11
+; SI-NEXT: v_readfirstlane_b32 s21, v8
; SI-NEXT: v_readfirstlane_b32 s23, v6
-; SI-NEXT: v_readfirstlane_b32 s21, v4
+; SI-NEXT: v_readfirstlane_b32 s25, v4
; SI-NEXT: v_readfirstlane_b32 s15, v2
; SI-NEXT: v_readfirstlane_b32 s9, v1
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v24
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v26
; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[10:11], s[14:15], 24
; SI-NEXT: s_lshr_b64 s[12:13], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[16:17], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[18:19], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[20:21], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[18:19], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 8
; SI-NEXT: s_lshr_b64 s[56:57], s[22:23], 24
; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[22:23], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[24:25], s[28:29], 24
-; SI-NEXT: s_lshr_b64 s[26:27], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[28:29], s[28:29], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[46:47], 24
-; SI-NEXT: s_lshr_b64 s[44:45], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 8
-; SI-NEXT: s_lshr_b64 s[60:61], s[90:91], 24
+; SI-NEXT: s_lshr_b64 s[40:41], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[42:43], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[20:21], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[22:23], s[26:27], 24
+; SI-NEXT: s_lshr_b64 s[24:25], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[26:27], s[26:27], 8
+; SI-NEXT: s_lshr_b64 s[28:29], s[60:61], 24
+; SI-NEXT: s_lshr_b64 s[44:45], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[90:91], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[90:91], 16
; SI-NEXT: s_lshr_b64 s[30:31], s[90:91], 8
; SI-NEXT: s_lshr_b64 s[34:35], s[88:89], 24
@@ -44018,54 +44036,46 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_lshr_b64 s[86:87], s[98:99], 24
; SI-NEXT: s_lshr_b64 s[96:97], s[98:99], 16
; SI-NEXT: s_lshr_b64 s[98:99], s[98:99], 8
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v1
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v2
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v2
-; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v2
-; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v4
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v4
-; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
-; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v60, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v38, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v42, 8, v1
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v2
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v4
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v4
+; SI-NEXT: v_lshrrev_b32_e32 v57, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v59, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v14
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v16
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v24
-; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v26
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v7, 8, v26
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v28
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v11, 8, v28
-; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v30
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v30
-; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v30
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v26
+; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v26
+; SI-NEXT: v_lshrrev_b32_e32 v5, 24, v28
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v28
+; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v30
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v30
+; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v30
; SI-NEXT: s_branch .LBB37_6
; SI-NEXT: .LBB37_5:
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s48
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s36
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -44077,98 +44087,109 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s4, v61, 58
-; SI-NEXT: v_mov_b32_e32 v13, s4
+; SI-NEXT: v_mov_b32_e32 v40, s4
; SI-NEXT: v_readlane_b32 s4, v61, 59
-; SI-NEXT: v_mov_b32_e32 v54, s4
+; SI-NEXT: v_mov_b32_e32 v9, s4
; SI-NEXT: v_readlane_b32 s4, v61, 60
-; SI-NEXT: v_mov_b32_e32 v11, s4
+; SI-NEXT: v_mov_b32_e32 v55, s4
; SI-NEXT: v_readlane_b32 s4, v61, 61
-; SI-NEXT: v_mov_b32_e32 v9, s4
+; SI-NEXT: v_mov_b32_e32 v54, s4
; SI-NEXT: v_readlane_b32 s4, v61, 62
-; SI-NEXT: v_mov_b32_e32 v52, s4
+; SI-NEXT: v_mov_b32_e32 v5, s4
; SI-NEXT: v_readlane_b32 s4, v61, 63
-; SI-NEXT: v_mov_b32_e32 v7, s4
+; SI-NEXT: v_mov_b32_e32 v53, s4
; SI-NEXT: v_readlane_b32 s4, v62, 0
-; SI-NEXT: v_mov_b32_e32 v51, s4
+; SI-NEXT: v_mov_b32_e32 v3, s4
; SI-NEXT: v_readlane_b32 s4, v62, 1
-; SI-NEXT: v_mov_b32_e32 v50, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 2
-; SI-NEXT: v_mov_b32_e32 v5, s4
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 3
-; SI-NEXT: v_mov_b32_e32 v3, s4
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 4
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 5
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 6
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 7
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 8
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 9
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 10
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 11
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 12
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 13
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 14
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v11, s4
; SI-NEXT: v_readlane_b32 s4, v62, 16
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v15, s4
+; SI-NEXT: v_mov_b32_e32 v52, s4
; SI-NEXT: v_readlane_b32 s4, v62, 17
-; SI-NEXT: v_mov_b32_e32 v48, s4
+; SI-NEXT: v_mov_b32_e32 v50, s4
; SI-NEXT: v_readlane_b32 s4, v62, 18
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s5
-; SI-NEXT: v_mov_b32_e32 v39, s4
+; SI-NEXT: v_mov_b32_e32 v49, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 10
+; SI-NEXT: v_readlane_b32 s5, v61, 11
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: v_readlane_b32 s4, v61, 8
; SI-NEXT: v_readlane_b32 s5, v61, 9
-; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: v_mov_b32_e32 v35, s10
+; SI-NEXT: s_mov_b32 s10, s4
; SI-NEXT: v_readlane_b32 s4, v61, 6
; SI-NEXT: v_readlane_b32 s5, v61, 7
-; SI-NEXT: v_mov_b32_e32 v33, s10
-; SI-NEXT: s_mov_b32 s10, s4
+; SI-NEXT: v_mov_b32_e32 v33, s14
+; SI-NEXT: s_mov_b32 s14, s4
; SI-NEXT: v_readlane_b32 s4, v61, 4
; SI-NEXT: v_readlane_b32 s5, v61, 5
-; SI-NEXT: v_mov_b32_e32 v59, s14
-; SI-NEXT: s_mov_b32 s14, s4
+; SI-NEXT: s_mov_b32 s16, s4
; SI-NEXT: v_readlane_b32 s4, v61, 2
; SI-NEXT: v_readlane_b32 s5, v61, 3
-; SI-NEXT: s_mov_b32 s16, s4
+; SI-NEXT: v_mov_b32_e32 v31, s18
+; SI-NEXT: s_mov_b32 s18, s4
; SI-NEXT: v_readlane_b32 s4, v61, 0
+; SI-NEXT: v_mov_b32_e32 v29, s20
; SI-NEXT: v_readlane_b32 s5, v61, 1
+; SI-NEXT: s_mov_b32 s20, s4
+; SI-NEXT: s_mov_b32 s4, s76
; SI-NEXT: v_mov_b32_e32 v30, s17
; SI-NEXT: v_mov_b32_e32 v28, s19
; SI-NEXT: v_mov_b32_e32 v26, s21
@@ -44184,21 +44205,23 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v6, s37
; SI-NEXT: v_mov_b32_e32 v4, s35
; SI-NEXT: v_mov_b32_e32 v2, s31
-; SI-NEXT: v_mov_b32_e32 v53, s66
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v49, s84
-; SI-NEXT: v_mov_b32_e32 v37, s11
-; SI-NEXT: v_mov_b32_e32 v35, s15
-; SI-NEXT: v_mov_b32_e32 v34, s86
-; SI-NEXT: v_mov_b32_e32 v47, s96
-; SI-NEXT: v_mov_b32_e32 v45, s7
-; SI-NEXT: v_mov_b32_e32 v44, s98
-; SI-NEXT: v_mov_b32_e32 v43, s80
-; SI-NEXT: v_mov_b32_e32 v42, s70
-; SI-NEXT: v_mov_b32_e32 v41, s68
-; SI-NEXT: v_mov_b32_e32 v40, s82
-; SI-NEXT: v_mov_b32_e32 v55, s71
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v7, s66
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v51, s84
+; SI-NEXT: v_mov_b32_e32 v39, s11
+; SI-NEXT: v_mov_b32_e32 v37, s15
+; SI-NEXT: v_mov_b32_e32 v36, s86
+; SI-NEXT: v_mov_b32_e32 v57, s96
+; SI-NEXT: v_mov_b32_e32 v47, s7
+; SI-NEXT: v_mov_b32_e32 v46, s98
+; SI-NEXT: v_mov_b32_e32 v45, s80
+; SI-NEXT: v_mov_b32_e32 v44, s70
+; SI-NEXT: v_mov_b32_e32 v43, s68
+; SI-NEXT: v_mov_b32_e32 v42, s82
+; SI-NEXT: v_mov_b32_e32 v41, s71
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v11, s38
+; SI-NEXT: v_mov_b32_e32 v13, s48
; SI-NEXT: v_mov_b32_e32 v15, s50
; SI-NEXT: v_mov_b32_e32 v17, s52
; SI-NEXT: v_mov_b32_e32 v19, s54
@@ -44206,33 +44229,31 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v22, s26
; SI-NEXT: v_mov_b32_e32 v25, s24
; SI-NEXT: v_mov_b32_e32 v27, s22
-; SI-NEXT: v_mov_b32_e32 v29, s20
-; SI-NEXT: v_mov_b32_e32 v31, s18
-; SI-NEXT: v_readlane_b32 s30, v61, 24
-; SI-NEXT: v_readlane_b32 s34, v61, 22
-; SI-NEXT: v_readlane_b32 s36, v61, 20
-; SI-NEXT: v_readlane_b32 s38, v61, 18
-; SI-NEXT: v_readlane_b32 s48, v61, 16
-; SI-NEXT: v_readlane_b32 s50, v61, 14
-; SI-NEXT: v_readlane_b32 s52, v61, 12
-; SI-NEXT: v_readlane_b32 s54, v61, 10
-; SI-NEXT: s_mov_b32 s64, s60
-; SI-NEXT: s_mov_b32 s66, s74
-; SI-NEXT: s_mov_b32 s68, s76
+; SI-NEXT: v_readlane_b32 s30, v61, 26
+; SI-NEXT: v_readlane_b32 s34, v61, 24
+; SI-NEXT: v_readlane_b32 s36, v61, 22
+; SI-NEXT: v_readlane_b32 s38, v61, 20
+; SI-NEXT: v_readlane_b32 s48, v61, 18
+; SI-NEXT: v_readlane_b32 s50, v61, 16
+; SI-NEXT: v_readlane_b32 s52, v61, 14
+; SI-NEXT: v_readlane_b32 s54, v61, 12
; SI-NEXT: s_mov_b32 s76, s6
-; SI-NEXT: s_mov_b32 s70, s78
+; SI-NEXT: s_mov_b32 s64, s78
; SI-NEXT: s_mov_b32 s78, s10
-; SI-NEXT: s_mov_b32 s80, s88
+; SI-NEXT: s_mov_b32 s66, s74
+; SI-NEXT: s_mov_b32 s68, s88
; SI-NEXT: s_mov_b32 s88, s14
-; SI-NEXT: s_mov_b32 s82, s90
+; SI-NEXT: s_mov_b32 s70, s90
; SI-NEXT: s_mov_b32 s90, s16
-; SI-NEXT: s_mov_b32 s84, s92
-; SI-NEXT: s_mov_b32 s92, s4
-; SI-NEXT: s_mov_b32 s86, s46
-; SI-NEXT: s_mov_b32 s96, s94
-; SI-NEXT: s_mov_b32 s94, s44
-; SI-NEXT: s_mov_b32 s98, vcc_lo
-; SI-NEXT: s_mov_b32 vcc_lo, s40
+; SI-NEXT: s_mov_b32 s80, s92
+; SI-NEXT: s_mov_b32 s92, s18
+; SI-NEXT: s_mov_b32 s82, s94
+; SI-NEXT: s_mov_b32 s94, s20
+; SI-NEXT: s_mov_b32 s84, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s4
+; SI-NEXT: s_mov_b32 s86, s60
+; SI-NEXT: s_mov_b32 s96, s44
+; SI-NEXT: s_mov_b32 s98, s72
; SI-NEXT: v_readlane_b32 s4, v61, 56
; SI-NEXT: v_readlane_b32 s6, v61, 54
; SI-NEXT: v_readlane_b32 s10, v61, 52
@@ -44244,29 +44265,28 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readlane_b32 s24, v61, 40
; SI-NEXT: v_readlane_b32 s26, v61, 38
; SI-NEXT: v_readlane_b32 s28, v61, 36
-; SI-NEXT: v_readlane_b32 s40, v61, 34
-; SI-NEXT: v_readlane_b32 s44, v61, 32
-; SI-NEXT: v_readlane_b32 s46, v61, 30
-; SI-NEXT: v_readlane_b32 s60, v61, 28
-; SI-NEXT: v_readlane_b32 s74, v61, 26
-; SI-NEXT: v_mov_b32_e32 v38, s85
-; SI-NEXT: v_mov_b32_e32 v36, s83
-; SI-NEXT: v_mov_b32_e32 v60, s97
-; SI-NEXT: v_mov_b32_e32 v58, s87
-; SI-NEXT: v_mov_b32_e32 v57, s99
-; SI-NEXT: v_mov_b32_e32 v56, s67
-; SI-NEXT: v_mov_b32_e32 v46, s69
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v55, s81
-; SI-NEXT: v_readlane_b32 s31, v61, 25
-; SI-NEXT: v_readlane_b32 s35, v61, 23
-; SI-NEXT: v_readlane_b32 s37, v61, 21
-; SI-NEXT: v_readlane_b32 s39, v61, 19
-; SI-NEXT: v_readlane_b32 s49, v61, 17
-; SI-NEXT: v_readlane_b32 s51, v61, 15
-; SI-NEXT: v_readlane_b32 s53, v61, 13
-; SI-NEXT: v_readlane_b32 s55, v61, 11
+; SI-NEXT: v_readlane_b32 s44, v61, 34
+; SI-NEXT: v_readlane_b32 s60, v61, 32
+; SI-NEXT: v_readlane_b32 s72, v61, 30
+; SI-NEXT: v_readlane_b32 s74, v61, 28
+; SI-NEXT: v_mov_b32_e32 v48, s85
+; SI-NEXT: v_mov_b32_e32 v38, s83
+; SI-NEXT: v_mov_b32_e32 v34, s97
+; SI-NEXT: v_mov_b32_e32 v60, s87
+; SI-NEXT: v_mov_b32_e32 v59, s99
+; SI-NEXT: v_mov_b32_e32 v58, s67
+; SI-NEXT: v_mov_b32_e32 v56, s69
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v41, s81
+; SI-NEXT: v_readlane_b32 s31, v61, 27
+; SI-NEXT: v_readlane_b32 s35, v61, 25
+; SI-NEXT: v_readlane_b32 s37, v61, 23
+; SI-NEXT: v_readlane_b32 s39, v61, 21
+; SI-NEXT: v_readlane_b32 s49, v61, 19
+; SI-NEXT: v_readlane_b32 s51, v61, 17
+; SI-NEXT: v_readlane_b32 s53, v61, 15
+; SI-NEXT: v_readlane_b32 s55, v61, 13
; SI-NEXT: v_readlane_b32 s5, v61, 57
; SI-NEXT: v_readlane_b32 s7, v61, 55
; SI-NEXT: v_readlane_b32 s11, v61, 53
@@ -44278,11 +44298,10 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readlane_b32 s25, v61, 41
; SI-NEXT: v_readlane_b32 s27, v61, 39
; SI-NEXT: v_readlane_b32 s29, v61, 37
-; SI-NEXT: v_readlane_b32 s41, v61, 35
-; SI-NEXT: v_readlane_b32 s45, v61, 33
-; SI-NEXT: v_readlane_b32 s47, v61, 31
-; SI-NEXT: v_readlane_b32 s61, v61, 29
-; SI-NEXT: v_readlane_b32 s75, v61, 27
+; SI-NEXT: v_readlane_b32 s45, v61, 35
+; SI-NEXT: v_readlane_b32 s61, v61, 33
+; SI-NEXT: v_readlane_b32 s73, v61, 31
+; SI-NEXT: v_readlane_b32 s75, v61, 29
; SI-NEXT: .LBB37_6: ; %end
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v32, 0xff, v32
@@ -44293,84 +44312,62 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_lshl_b32 s7, s86, 24
; SI-NEXT: v_and_b32_e32 v32, 0xffff, v32
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_and_b32_e32 v30, 0xff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v13
; SI-NEXT: v_or_b32_e32 v32, s5, v32
-; SI-NEXT: v_or_b32_e32 v13, v30, v13
-; SI-NEXT: v_and_b32_e32 v30, 0xff, v54
; SI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xff, v30
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v53
-; SI-NEXT: v_or_b32_e32 v30, v32, v30
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v13, v30
-; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v40
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v30, v30, v32
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
+; SI-NEXT: v_or_b32_e32 v7, v7, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v30
+; SI-NEXT: v_or_b32_e32 v7, v9, v7
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v31
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v31
; SI-NEXT: s_lshl_b32 s5, s84, 8
-; SI-NEXT: v_or_b32_e32 v13, s5, v13
+; SI-NEXT: v_or_b32_e32 v7, s5, v7
; SI-NEXT: s_and_b32 s5, s82, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s80, 24
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v13, s5, v13
-; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: v_or_b32_e32 v7, s5, v7
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v11, 8, v11
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v55
+; SI-NEXT: v_or_b32_e32 v7, v7, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v54
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v52
-; SI-NEXT: v_or_b32_e32 v9, v13, v9
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v9, v11, v9
-; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v9
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v29
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v29
; SI-NEXT: s_lshl_b32 s5, s70, 8
-; SI-NEXT: v_or_b32_e32 v9, s5, v9
+; SI-NEXT: v_or_b32_e32 v5, s5, v5
; SI-NEXT: s_and_b32 s5, s68, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s66, 24
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v9, s5, v9
-; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7
-; SI-NEXT: v_or_b32_e32 v7, v9, v7
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v51
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v50
-; SI-NEXT: v_or_b32_e32 v9, v11, v9
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v7, v7, v9
-; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v27
-; SI-NEXT: s_lshl_b32 s5, s64, 8
-; SI-NEXT: v_or_b32_e32 v7, s5, v7
-; SI-NEXT: s_and_b32 s5, vcc_lo, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s94, 24
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v7, s5, v7
-; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: v_or_b32_e32 v5, s5, v5
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
-; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v53
+; SI-NEXT: v_or_b32_e32 v5, v5, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: s_lshl_b32 s5, s92, 8
-; SI-NEXT: s_lshl_b32 s7, s88, 24
+; SI-NEXT: s_lshl_b32 s5, s64, 8
+; SI-NEXT: s_lshl_b32 s7, s94, 24
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
@@ -44405,6 +44402,34 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; SI-NEXT: v_or_b32_e32 v3, v7, v3
; SI-NEXT: v_or_b32_e32 v3, v5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v27
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, vcc_lo, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v24
+; SI-NEXT: s_lshl_b32 s5, s92, 8
+; SI-NEXT: s_lshl_b32 s7, s88, 24
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; SI-NEXT: v_or_b32_e32 v3, v3, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v25
@@ -44415,17 +44440,17 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:32
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v23
; SI-NEXT: s_lshl_b32 s5, s78, 8
; SI-NEXT: s_lshl_b32 s7, s54, 24
; SI-NEXT: v_readlane_b32 s54, v63, 12
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
@@ -44444,18 +44469,18 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v21
; SI-NEXT: s_lshl_b32 s5, s52, 8
; SI-NEXT: s_lshl_b32 s7, s48, 24
; SI-NEXT: v_readlane_b32 s52, v63, 10
; SI-NEXT: v_readlane_b32 s48, v63, 6
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
@@ -44474,7 +44499,7 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v18
; SI-NEXT: s_lshl_b32 s5, s38, 8
@@ -44482,11 +44507,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readlane_b32 s50, v63, 8
; SI-NEXT: v_readlane_b32 s38, v63, 4
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
@@ -44505,22 +44530,20 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:56
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v52
; SI-NEXT: s_lshl_b32 s5, s30, 8
-; SI-NEXT: s_lshl_b32 s7, s60, 24
+; SI-NEXT: s_lshl_b32 s7, s72, 24
; SI-NEXT: v_readlane_b32 s30, v63, 34
; SI-NEXT: v_readlane_b32 s31, v63, 35
; SI-NEXT: v_readlane_b32 s36, v63, 2
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
@@ -44538,90 +44561,86 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v49
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v51
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v48
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v50
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v39
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v49
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v15
-; SI-NEXT: s_lshl_b32 s5, s46, 8
+; SI-NEXT: s_lshl_b32 s5, s60, 8
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: s_and_b32 s5, s44, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s40, 24
+; SI-NEXT: s_lshl_b32 s7, s28, 24
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v38
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v48
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v37
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v39
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v36
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v38
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s5, s28, 8
-; SI-NEXT: s_lshl_b32 s7, s24, 24
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v35
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v13
+; SI-NEXT: s_lshl_b32 s5, s26, 8
; SI-NEXT: v_or_b32_e32 v3, s5, v3
-; SI-NEXT: s_and_b32 s5, s26, 0xff
+; SI-NEXT: s_and_b32 s5, s24, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s22, 24
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v37
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v34
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v36
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v35
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s5, s62, 8
-; SI-NEXT: s_lshl_b32 s7, s22, 24
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v60
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v58
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v11
+; SI-NEXT: s_lshl_b32 s5, s20, 8
; SI-NEXT: v_or_b32_e32 v3, s5, v3
-; SI-NEXT: s_and_b32 s5, s72, 0xff
+; SI-NEXT: s_and_b32 s5, s42, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s62, 24
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v34
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v59
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v33
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v60
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s5, s42, 8
+; SI-NEXT: s_lshl_b32 s5, s40, 8
; SI-NEXT: s_lshl_b32 s7, s56, 24
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v59
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v3, s5, v3
@@ -44634,18 +44653,18 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v6
; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v56
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v58
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v57
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s5, s20, 8
+; SI-NEXT: s_lshl_b32 s5, s46, 8
; SI-NEXT: s_lshl_b32 s7, s16, 24
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v44
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v46
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v3, s5, v3
@@ -44657,9 +44676,9 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v46
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v56
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v45
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v47
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v4, v5, v4
@@ -44669,7 +44688,7 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s5, s14, 8
; SI-NEXT: s_lshl_b32 s7, s10, 24
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v43
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v3, s5, v3
@@ -44680,9 +44699,9 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v3, s5, v3
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v43
+; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v45
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v42
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v44
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v3, v4, v3
@@ -44700,11 +44719,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_or_b32_e32 v2, s4, v2
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v42
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v41
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -47246,8 +47265,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_writelane_b32 v75, s30, 7
; GFX11-NEXT: v_writelane_b32 v75, s31, 8
; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s75, v14
-; GFX11-NEXT: v_readfirstlane_b32 s74, v13
+; GFX11-NEXT: v_readfirstlane_b32 s57, v14
+; GFX11-NEXT: v_readfirstlane_b32 s56, v13
; GFX11-NEXT: v_readfirstlane_b32 s7, v12
; GFX11-NEXT: v_readfirstlane_b32 s6, v11
; GFX11-NEXT: v_readfirstlane_b32 s9, v10
@@ -47265,134 +47284,135 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB37_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s4, s74, 8
-; GFX11-NEXT: s_lshr_b32 s47, s3, 8
+; GFX11-NEXT: s_lshr_b32 s4, s57, 24
+; GFX11-NEXT: s_lshr_b32 s73, s3, 8
; GFX11-NEXT: v_writelane_b32 v76, s4, 9
-; GFX11-NEXT: s_lshr_b32 s4, s7, 24
-; GFX11-NEXT: s_lshr_b32 s57, s23, 24
-; GFX11-NEXT: s_lshr_b32 s73, s75, 24
-; GFX11-NEXT: s_lshr_b32 s63, s75, 16
+; GFX11-NEXT: s_lshr_b32 s4, s57, 16
+; GFX11-NEXT: s_lshr_b32 s70, s7, 8
+; GFX11-NEXT: s_lshr_b32 s44, s6, 16
+; GFX11-NEXT: s_lshr_b32 s47, s11, 8
; GFX11-NEXT: v_writelane_b32 v76, s4, 10
; GFX11-NEXT: s_lshr_b32 s4, s3, 16
-; GFX11-NEXT: s_lshr_b32 s61, s75, 8
-; GFX11-NEXT: s_lshr_b32 s59, s74, 16
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
+; GFX11-NEXT: s_lshr_b32 s84, s57, 8
+; GFX11-NEXT: s_lshr_b32 s86, s56, 16
+; GFX11-NEXT: s_lshr_b32 s97, s56, 8
; GFX11-NEXT: v_writelane_b32 v76, s4, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[74:75], 24
-; GFX11-NEXT: s_lshr_b32 s77, s7, 8
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[56:57], 24
+; GFX11-NEXT: s_lshr_b32 s100, s7, 24
; GFX11-NEXT: v_writelane_b32 v77, s4, 30
-; GFX11-NEXT: s_lshr_b32 s48, s6, 16
-; GFX11-NEXT: v_writelane_b32 v76, s47, 7
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s49, s6, 8
+; GFX11-NEXT: s_lshr_b32 s103, s7, 16
+; GFX11-NEXT: v_writelane_b32 v76, s73, 7
+; GFX11-NEXT: s_lshr_b32 s73, s2, 16
+; GFX11-NEXT: s_lshr_b32 s72, s6, 8
; GFX11-NEXT: v_writelane_b32 v77, s5, 31
; GFX11-NEXT: s_lshr_b64 s[4:5], s[6:7], 24
-; GFX11-NEXT: v_writelane_b32 v76, s47, 6
-; GFX11-NEXT: s_lshr_b32 s47, s2, 8
-; GFX11-NEXT: s_lshr_b32 s50, s9, 24
+; GFX11-NEXT: v_writelane_b32 v76, s73, 6
+; GFX11-NEXT: s_lshr_b32 s73, s2, 8
+; GFX11-NEXT: s_lshr_b32 s76, s9, 24
; GFX11-NEXT: v_writelane_b32 v77, s4, 28
-; GFX11-NEXT: s_lshr_b32 s51, s9, 16
-; GFX11-NEXT: v_writelane_b32 v76, s47, 5
-; GFX11-NEXT: s_lshr_b32 s47, s1, 24
-; GFX11-NEXT: s_lshr_b32 s52, s9, 8
+; GFX11-NEXT: s_lshr_b32 s90, s9, 16
+; GFX11-NEXT: v_writelane_b32 v76, s73, 5
+; GFX11-NEXT: s_lshr_b32 s73, s1, 24
+; GFX11-NEXT: s_lshr_b32 vcc_lo, s9, 8
; GFX11-NEXT: v_writelane_b32 v77, s5, 29
; GFX11-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v76, s47, 4
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s53, s8, 16
+; GFX11-NEXT: v_writelane_b32 v76, s73, 4
+; GFX11-NEXT: s_lshr_b32 s73, s1, 16
+; GFX11-NEXT: s_lshr_b32 s75, s8, 16
; GFX11-NEXT: v_writelane_b32 v77, s4, 26
-; GFX11-NEXT: s_lshr_b32 s54, s8, 8
-; GFX11-NEXT: v_writelane_b32 v76, s47, 3
-; GFX11-NEXT: s_lshr_b32 s47, s1, 8
-; GFX11-NEXT: s_lshr_b32 s55, s11, 24
+; GFX11-NEXT: s_lshr_b32 s59, s8, 8
+; GFX11-NEXT: v_writelane_b32 v76, s73, 3
+; GFX11-NEXT: s_lshr_b32 s73, s1, 8
+; GFX11-NEXT: s_lshr_b32 s63, s11, 24
; GFX11-NEXT: v_writelane_b32 v77, s5, 27
; GFX11-NEXT: s_lshr_b64 s[4:5], s[10:11], 24
-; GFX11-NEXT: v_writelane_b32 v76, s47, 2
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s64, s11, 16
+; GFX11-NEXT: v_writelane_b32 v76, s73, 2
+; GFX11-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-NEXT: s_lshr_b32 s61, s11, 16
; GFX11-NEXT: v_writelane_b32 v77, s4, 24
-; GFX11-NEXT: s_lshr_b32 s65, s11, 8
-; GFX11-NEXT: v_writelane_b32 v76, s47, 1
-; GFX11-NEXT: s_lshr_b32 s47, s0, 8
-; GFX11-NEXT: s_lshr_b32 s66, s10, 16
+; GFX11-NEXT: s_lshr_b32 s45, s10, 16
+; GFX11-NEXT: v_writelane_b32 v76, s73, 1
+; GFX11-NEXT: s_lshr_b32 s73, s0, 8
+; GFX11-NEXT: s_lshr_b32 s43, s10, 8
; GFX11-NEXT: v_writelane_b32 v77, s5, 25
; GFX11-NEXT: s_lshr_b64 s[4:5], s[12:13], 24
-; GFX11-NEXT: v_writelane_b32 v76, s47, 0
-; GFX11-NEXT: s_lshr_b32 s67, s10, 8
-; GFX11-NEXT: s_lshr_b32 s68, s13, 24
+; GFX11-NEXT: v_writelane_b32 v76, s73, 0
+; GFX11-NEXT: s_lshr_b32 s94, s13, 24
+; GFX11-NEXT: s_lshr_b32 s92, s13, 16
; GFX11-NEXT: v_writelane_b32 v77, s4, 22
-; GFX11-NEXT: s_lshr_b32 s69, s13, 16
-; GFX11-NEXT: s_lshr_b32 s70, s13, 8
-; GFX11-NEXT: s_lshr_b32 s71, s12, 16
-; GFX11-NEXT: s_lshr_b32 s80, s12, 8
+; GFX11-NEXT: s_lshr_b32 s88, s13, 8
+; GFX11-NEXT: s_lshr_b32 s78, s12, 16
+; GFX11-NEXT: s_lshr_b32 s74, s12, 8
+; GFX11-NEXT: s_lshr_b32 s62, s15, 24
; GFX11-NEXT: v_writelane_b32 v77, s5, 23
; GFX11-NEXT: s_lshr_b64 s[4:5], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s81, s15, 24
-; GFX11-NEXT: s_lshr_b32 s82, s15, 16
-; GFX11-NEXT: s_lshr_b32 s83, s15, 8
+; GFX11-NEXT: s_lshr_b32 s60, s15, 16
+; GFX11-NEXT: s_lshr_b32 s58, s15, 8
+; GFX11-NEXT: s_lshr_b32 s46, s14, 16
; GFX11-NEXT: v_writelane_b32 v77, s4, 20
-; GFX11-NEXT: s_lshr_b32 s84, s14, 16
-; GFX11-NEXT: s_lshr_b32 s85, s14, 8
-; GFX11-NEXT: s_lshr_b32 s86, s41, 24
-; GFX11-NEXT: s_lshr_b32 s87, s41, 16
+; GFX11-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-NEXT: s_lshr_b32 s104, s41, 24
+; GFX11-NEXT: s_lshr_b32 s102, s41, 16
+; GFX11-NEXT: s_lshr_b32 s101, s41, 8
; GFX11-NEXT: v_writelane_b32 v77, s5, 21
; GFX11-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
-; GFX11-NEXT: s_lshr_b32 s96, s41, 8
-; GFX11-NEXT: s_lshr_b32 s97, s40, 16
+; GFX11-NEXT: s_lshr_b32 s99, s40, 16
; GFX11-NEXT: s_lshr_b32 s98, s40, 8
+; GFX11-NEXT: s_lshr_b32 s96, s29, 24
; GFX11-NEXT: v_writelane_b32 v77, s4, 18
-; GFX11-NEXT: s_lshr_b32 s99, s29, 24
-; GFX11-NEXT: s_lshr_b32 s100, s29, 16
-; GFX11-NEXT: s_lshr_b32 s101, s29, 8
-; GFX11-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-NEXT: s_lshr_b32 s87, s29, 16
+; GFX11-NEXT: s_lshr_b32 s85, s29, 8
+; GFX11-NEXT: s_lshr_b32 s83, s28, 16
+; GFX11-NEXT: s_lshr_b32 s82, s28, 8
; GFX11-NEXT: v_writelane_b32 v77, s5, 19
; GFX11-NEXT: s_lshr_b64 s[4:5], s[28:29], 24
-; GFX11-NEXT: s_lshr_b32 s103, s28, 8
-; GFX11-NEXT: s_lshr_b32 s104, s27, 24
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-NEXT: s_lshr_b32 s80, s27, 24
+; GFX11-NEXT: s_lshr_b32 s71, s27, 16
+; GFX11-NEXT: s_lshr_b32 s69, s27, 8
; GFX11-NEXT: v_writelane_b32 v77, s4, 16
-; GFX11-NEXT: s_lshr_b32 s43, s27, 8
-; GFX11-NEXT: s_lshr_b32 s44, s26, 16
-; GFX11-NEXT: s_lshr_b32 s46, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-NEXT: s_lshr_b32 s68, s26, 16
+; GFX11-NEXT: s_lshr_b32 s67, s26, 8
+; GFX11-NEXT: s_lshr_b32 s66, s25, 24
+; GFX11-NEXT: s_lshr_b32 s65, s25, 16
; GFX11-NEXT: v_writelane_b32 v77, s5, 17
; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b32 s58, s25, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 8
-; GFX11-NEXT: s_lshr_b32 s62, s24, 16
+; GFX11-NEXT: s_lshr_b32 s64, s25, 8
+; GFX11-NEXT: s_lshr_b32 s55, s24, 16
+; GFX11-NEXT: s_lshr_b32 s54, s24, 8
; GFX11-NEXT: v_writelane_b32 v77, s4, 14
-; GFX11-NEXT: s_lshr_b32 s72, s24, 8
-; GFX11-NEXT: s_lshr_b32 s76, s23, 16
-; GFX11-NEXT: s_lshr_b32 s78, s23, 8
-; GFX11-NEXT: s_lshr_b32 s92, s22, 16
+; GFX11-NEXT: s_lshr_b32 s53, s23, 24
+; GFX11-NEXT: s_lshr_b32 s52, s23, 16
+; GFX11-NEXT: s_lshr_b32 s51, s23, 8
+; GFX11-NEXT: s_lshr_b32 s50, s22, 16
; GFX11-NEXT: v_writelane_b32 v77, s5, 15
; GFX11-NEXT: s_lshr_b64 s[4:5], s[24:25], 24
-; GFX11-NEXT: s_lshr_b32 s45, s22, 8
-; GFX11-NEXT: s_lshr_b32 s30, s21, 24
-; GFX11-NEXT: s_lshr_b32 s35, s21, 16
+; GFX11-NEXT: s_lshr_b32 s49, s22, 8
+; GFX11-NEXT: s_lshr_b32 s48, s21, 24
+; GFX11-NEXT: s_lshr_b32 s39, s21, 16
; GFX11-NEXT: v_writelane_b32 v77, s4, 12
; GFX11-NEXT: s_lshr_b32 s38, s21, 8
-; GFX11-NEXT: s_lshr_b32 s36, s20, 16
-; GFX11-NEXT: s_lshr_b32 s34, s20, 8
-; GFX11-NEXT: s_lshr_b32 s31, s19, 24
+; GFX11-NEXT: s_lshr_b32 s37, s20, 16
+; GFX11-NEXT: s_lshr_b32 s36, s20, 8
+; GFX11-NEXT: s_lshr_b32 s35, s19, 24
; GFX11-NEXT: v_writelane_b32 v77, s5, 13
; GFX11-NEXT: s_lshr_b64 s[4:5], s[22:23], 24
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX11-NEXT: s_lshr_b32 s94, s19, 8
-; GFX11-NEXT: s_lshr_b32 s90, s18, 16
+; GFX11-NEXT: s_lshr_b32 s34, s19, 16
+; GFX11-NEXT: s_lshr_b32 s31, s19, 8
+; GFX11-NEXT: s_lshr_b32 s30, s18, 16
; GFX11-NEXT: v_writelane_b32 v77, s4, 10
-; GFX11-NEXT: s_lshr_b32 s88, s18, 8
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s17, 24
-; GFX11-NEXT: s_lshr_b32 s95, s17, 16
-; GFX11-NEXT: s_lshr_b32 s93, s17, 8
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s18, 8
+; GFX11-NEXT: s_lshr_b32 s95, s17, 24
+; GFX11-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-NEXT: s_lshr_b32 s91, s17, 8
; GFX11-NEXT: v_writelane_b32 v77, s5, 11
; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
-; GFX11-NEXT: s_lshr_b32 s91, s16, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 8
-; GFX11-NEXT: s_lshr_b32 s79, s3, 24
+; GFX11-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-NEXT: s_lshr_b32 s79, s16, 8
+; GFX11-NEXT: s_lshr_b32 s77, s3, 24
; GFX11-NEXT: v_writelane_b32 v77, s4, 8
-; GFX11-NEXT: v_readlane_b32 s47, v76, 10
-; GFX11-NEXT: s_mov_b32 s39, 0
+; GFX11-NEXT: s_mov_b32 s73, s70
+; GFX11-NEXT: v_readlane_b32 s81, v76, 10
+; GFX11-NEXT: v_readlane_b32 s70, v76, 9
; GFX11-NEXT: v_writelane_b32 v77, s5, 9
; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
@@ -47408,84 +47428,85 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-NEXT: v_writelane_b32 v77, s4, 0
; GFX11-NEXT: v_writelane_b32 v77, s5, 1
-; GFX11-NEXT: s_mov_b32 s5, s57
-; GFX11-NEXT: v_readlane_b32 s57, v76, 9
+; GFX11-NEXT: s_mov_b32 s5, s47
+; GFX11-NEXT: s_mov_b32 s47, s44
+; GFX11-NEXT: s_mov_b32 s44, 0
; GFX11-NEXT: s_branch .LBB37_3
; GFX11-NEXT: .LBB37_2:
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; kill: killed $sgpr42
; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: s_mov_b32 s39, -1
+; GFX11-NEXT: s_mov_b32 s44, -1
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr77
; GFX11-NEXT: ; implicit-def: $sgpr79
; GFX11-NEXT: ; implicit-def: $sgpr89
; GFX11-NEXT: ; implicit-def: $sgpr91
; GFX11-NEXT: ; implicit-def: $sgpr93
; GFX11-NEXT: ; implicit-def: $sgpr95
; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $vcc_lo
+; GFX11-NEXT: ; implicit-def: $sgpr30
; GFX11-NEXT: ; implicit-def: $sgpr31
; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr35
; GFX11-NEXT: ; implicit-def: $sgpr36
+; GFX11-NEXT: ; implicit-def: $sgpr37
; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr92
+; GFX11-NEXT: ; implicit-def: $sgpr39
+; GFX11-NEXT: ; implicit-def: $sgpr48
+; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr50
+; GFX11-NEXT: ; implicit-def: $sgpr51
+; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr53
+; GFX11-NEXT: ; implicit-def: $sgpr54
+; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr64
+; GFX11-NEXT: ; implicit-def: $sgpr65
+; GFX11-NEXT: ; implicit-def: $sgpr66
+; GFX11-NEXT: ; implicit-def: $sgpr67
+; GFX11-NEXT: ; implicit-def: $sgpr68
+; GFX11-NEXT: ; implicit-def: $sgpr69
+; GFX11-NEXT: ; implicit-def: $sgpr71
+; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr82
+; GFX11-NEXT: ; implicit-def: $sgpr83
+; GFX11-NEXT: ; implicit-def: $sgpr85
+; GFX11-NEXT: ; implicit-def: $sgpr87
+; GFX11-NEXT: ; implicit-def: $sgpr96
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr99
+; GFX11-NEXT: ; implicit-def: $sgpr101
+; GFX11-NEXT: ; implicit-def: $sgpr102
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr46
+; GFX11-NEXT: ; implicit-def: $sgpr58
+; GFX11-NEXT: ; implicit-def: $sgpr60
+; GFX11-NEXT: ; implicit-def: $sgpr62
+; GFX11-NEXT: ; implicit-def: $sgpr74
; GFX11-NEXT: ; implicit-def: $sgpr78
+; GFX11-NEXT: ; implicit-def: $sgpr88
+; GFX11-NEXT: ; implicit-def: $sgpr92
+; GFX11-NEXT: ; implicit-def: $sgpr94
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr61
+; GFX11-NEXT: ; implicit-def: $sgpr63
+; GFX11-NEXT: ; implicit-def: $sgpr59
+; GFX11-NEXT: ; implicit-def: $sgpr75
+; GFX11-NEXT: ; implicit-def: $vcc_lo
+; GFX11-NEXT: ; implicit-def: $sgpr90
; GFX11-NEXT: ; implicit-def: $sgpr76
; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr73
; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr101
; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr98
; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr87
; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr85
; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr82
; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr71
; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr73
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: v_writelane_b32 v77, s42, 0
; GFX11-NEXT: v_writelane_b32 v77, s43, 1
@@ -47502,8 +47523,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: ; kill: killed $sgpr42
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr43
; GFX11-NEXT: v_writelane_b32 v77, s5, 3
; GFX11-NEXT: ; implicit-def: $sgpr4
; GFX11-NEXT: ; kill: killed $sgpr4
@@ -47519,10 +47540,10 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: ; implicit-def: $sgpr4
; GFX11-NEXT: v_writelane_b32 v77, s4, 10
; GFX11-NEXT: v_writelane_b32 v77, s5, 11
-; GFX11-NEXT: ; implicit-def: $sgpr5
; GFX11-NEXT: ; implicit-def: $sgpr4
; GFX11-NEXT: v_writelane_b32 v77, s4, 12
; GFX11-NEXT: v_writelane_b32 v77, s5, 13
+; GFX11-NEXT: ; implicit-def: $sgpr5
; GFX11-NEXT: ; implicit-def: $sgpr4
; GFX11-NEXT: v_writelane_b32 v77, s4, 14
; GFX11-NEXT: v_writelane_b32 v77, s5, 15
@@ -47551,10 +47572,10 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_writelane_b32 v77, s4, 30
; GFX11-NEXT: v_writelane_b32 v77, s5, 31
; GFX11-NEXT: .LBB37_3: ; %Flow
-; GFX11-NEXT: s_and_b32 s39, s39, exec_lo
-; GFX11-NEXT: s_cselect_b32 s39, 1, 0
+; GFX11-NEXT: s_and_b32 s44, s44, exec_lo
+; GFX11-NEXT: s_cselect_b32 s44, 1, 0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_cmp_lg_u32 s39, 1
+; GFX11-NEXT: s_cmp_lg_u32 s44, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB37_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: v_add_f32_e64 v10, s13, 1.0
@@ -47586,8 +47607,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_add_f32_e64 v21, s22, 1.0
; GFX11-NEXT: v_add_f32_e64 v8, s11, 1.0
; GFX11-NEXT: v_add_f32_e64 v4, s7, 1.0
-; GFX11-NEXT: v_add_f32_e64 v2, s75, 1.0
-; GFX11-NEXT: v_add_f32_e64 v1, s74, 1.0
+; GFX11-NEXT: v_add_f32_e64 v2, s57, 1.0
+; GFX11-NEXT: v_add_f32_e64 v1, s56, 1.0
; GFX11-NEXT: v_add_f32_e64 v3, s6, 1.0
; GFX11-NEXT: v_add_f32_e64 v7, s10, 1.0
; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
@@ -47720,101 +47741,101 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_dual_mov_b32 v63, s0 :: v_dual_mov_b32 v72, s79
+; GFX11-NEXT: v_dual_mov_b32 v63, s0 :: v_dual_mov_b32 v72, s77
; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v1, s74 :: v_dual_mov_b32 v2, s75
-; GFX11-NEXT: v_dual_mov_b32 v44, s89 :: v_dual_mov_b32 v69, s93
+; GFX11-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s57
+; GFX11-NEXT: v_dual_mov_b32 v44, s79 :: v_dual_mov_b32 v69, s91
; GFX11-NEXT: v_mov_b32_e32 v56, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v46, s91 :: v_dual_mov_b32 v43, s95
-; GFX11-NEXT: v_dual_mov_b32 v45, vcc_hi :: v_dual_mov_b32 v42, s90
+; GFX11-NEXT: v_dual_mov_b32 v46, s89 :: v_dual_mov_b32 v43, s93
+; GFX11-NEXT: v_dual_mov_b32 v45, s95 :: v_dual_mov_b32 v42, s30
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v62, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 30
; GFX11-NEXT: v_readlane_b32 s1, v77, 31
-; GFX11-NEXT: v_dual_mov_b32 v183, s88 :: v_dual_mov_b32 v182, s94
-; GFX11-NEXT: v_dual_mov_b32 v40, vcc_lo :: v_dual_mov_b32 v41, s31
+; GFX11-NEXT: v_dual_mov_b32 v183, vcc_hi :: v_dual_mov_b32 v182, s31
+; GFX11-NEXT: v_dual_mov_b32 v40, s34 :: v_dual_mov_b32 v41, s35
; GFX11-NEXT: v_mov_b32_e32 v25, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 28
; GFX11-NEXT: v_readlane_b32 s1, v77, 29
-; GFX11-NEXT: v_dual_mov_b32 v178, s34 :: v_dual_mov_b32 v181, s36
-; GFX11-NEXT: v_dual_mov_b32 v176, s38 :: v_dual_mov_b32 v179, s35
+; GFX11-NEXT: v_dual_mov_b32 v178, s36 :: v_dual_mov_b32 v181, s37
+; GFX11-NEXT: v_dual_mov_b32 v176, s38 :: v_dual_mov_b32 v179, s39
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v31, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 26
; GFX11-NEXT: v_readlane_b32 s1, v77, 27
-; GFX11-NEXT: v_dual_mov_b32 v180, s30 :: v_dual_mov_b32 v167, s45
-; GFX11-NEXT: v_dual_mov_b32 v177, s92 :: v_dual_mov_b32 v164, s78
+; GFX11-NEXT: v_dual_mov_b32 v180, s48 :: v_dual_mov_b32 v167, s49
+; GFX11-NEXT: v_dual_mov_b32 v177, s50 :: v_dual_mov_b32 v164, s51
; GFX11-NEXT: v_mov_b32_e32 v37, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 24
; GFX11-NEXT: v_readlane_b32 s1, v77, 25
-; GFX11-NEXT: v_dual_mov_b32 v165, s76 :: v_dual_mov_b32 v166, s5
-; GFX11-NEXT: v_dual_mov_b32 v160, s72 :: v_dual_mov_b32 v163, s62
+; GFX11-NEXT: v_dual_mov_b32 v165, s52 :: v_dual_mov_b32 v166, s53
+; GFX11-NEXT: v_dual_mov_b32 v160, s54 :: v_dual_mov_b32 v163, s55
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v38, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 22
; GFX11-NEXT: v_readlane_b32 s1, v77, 23
-; GFX11-NEXT: v_dual_mov_b32 v150, s60 :: v_dual_mov_b32 v161, s58
-; GFX11-NEXT: v_dual_mov_b32 v162, s56 :: v_dual_mov_b32 v149, s46
+; GFX11-NEXT: v_dual_mov_b32 v150, s64 :: v_dual_mov_b32 v161, s65
+; GFX11-NEXT: v_dual_mov_b32 v162, s66 :: v_dual_mov_b32 v149, s67
; GFX11-NEXT: v_mov_b32_e32 v48, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 20
; GFX11-NEXT: v_readlane_b32 s1, v77, 21
-; GFX11-NEXT: v_dual_mov_b32 v151, s44 :: v_dual_mov_b32 v146, s43
-; GFX11-NEXT: v_dual_mov_b32 v147, s42 :: v_dual_mov_b32 v148, s104
+; GFX11-NEXT: v_dual_mov_b32 v151, s68 :: v_dual_mov_b32 v146, s69
+; GFX11-NEXT: v_dual_mov_b32 v147, s71 :: v_dual_mov_b32 v148, s80
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v49, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 18
; GFX11-NEXT: v_readlane_b32 s1, v77, 19
-; GFX11-NEXT: v_dual_mov_b32 v134, s103 :: v_dual_mov_b32 v145, s102
-; GFX11-NEXT: v_dual_mov_b32 v132, s101 :: v_dual_mov_b32 v135, s100
+; GFX11-NEXT: v_dual_mov_b32 v134, s82 :: v_dual_mov_b32 v145, s83
+; GFX11-NEXT: v_dual_mov_b32 v132, s85 :: v_dual_mov_b32 v135, s87
; GFX11-NEXT: v_mov_b32_e32 v50, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 16
; GFX11-NEXT: v_readlane_b32 s1, v77, 17
-; GFX11-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
-; GFX11-NEXT: v_dual_mov_b32 v133, s97 :: v_dual_mov_b32 v128, s96
+; GFX11-NEXT: v_dual_mov_b32 v144, s96 :: v_dual_mov_b32 v131, s98
+; GFX11-NEXT: v_dual_mov_b32 v133, s99 :: v_dual_mov_b32 v128, s101
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v51, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 14
; GFX11-NEXT: v_readlane_b32 s1, v77, 15
-; GFX11-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
-; GFX11-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s84
+; GFX11-NEXT: v_dual_mov_b32 v129, s102 :: v_dual_mov_b32 v130, s104
+; GFX11-NEXT: v_dual_mov_b32 v116, s42 :: v_dual_mov_b32 v119, s46
; GFX11-NEXT: v_mov_b32_e32 v52, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 12
; GFX11-NEXT: v_readlane_b32 s1, v77, 13
-; GFX11-NEXT: v_dual_mov_b32 v114, s83 :: v_dual_mov_b32 v117, s82
-; GFX11-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
+; GFX11-NEXT: v_dual_mov_b32 v114, s58 :: v_dual_mov_b32 v117, s60
+; GFX11-NEXT: v_dual_mov_b32 v118, s62 :: v_dual_mov_b32 v113, s74
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v53, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 10
; GFX11-NEXT: v_readlane_b32 s1, v77, 11
-; GFX11-NEXT: v_dual_mov_b32 v115, s71 :: v_dual_mov_b32 v102, s70
-; GFX11-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
+; GFX11-NEXT: v_dual_mov_b32 v115, s78 :: v_dual_mov_b32 v102, s88
+; GFX11-NEXT: v_dual_mov_b32 v103, s92 :: v_dual_mov_b32 v112, s94
; GFX11-NEXT: v_mov_b32_e32 v54, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 8
; GFX11-NEXT: v_readlane_b32 s1, v77, 9
-; GFX11-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s66
-; GFX11-NEXT: v_dual_mov_b32 v96, s65 :: v_dual_mov_b32 v99, s64
+; GFX11-NEXT: v_dual_mov_b32 v98, s43 :: v_dual_mov_b32 v101, s45
+; GFX11-NEXT: v_dual_mov_b32 v96, s5 :: v_dual_mov_b32 v99, s61
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v64, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 6
; GFX11-NEXT: v_readlane_b32 s1, v77, 7
-; GFX11-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
-; GFX11-NEXT: v_dual_mov_b32 v97, s53 :: v_dual_mov_b32 v86, s50
+; GFX11-NEXT: v_dual_mov_b32 v100, s63 :: v_dual_mov_b32 v87, s59
+; GFX11-NEXT: v_dual_mov_b32 v97, s75 :: v_dual_mov_b32 v86, s76
; GFX11-NEXT: v_mov_b32_e32 v65, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 4
; GFX11-NEXT: v_readlane_b32 s1, v77, 5
-; GFX11-NEXT: v_dual_mov_b32 v83, s52 :: v_dual_mov_b32 v82, s49
-; GFX11-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s48
+; GFX11-NEXT: v_dual_mov_b32 v83, vcc_lo :: v_dual_mov_b32 v82, s72
+; GFX11-NEXT: v_dual_mov_b32 v85, s90 :: v_dual_mov_b32 v84, s47
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v66, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 2
; GFX11-NEXT: v_readlane_b32 s1, v77, 3
-; GFX11-NEXT: v_dual_mov_b32 v70, s77 :: v_dual_mov_b32 v81, s47
-; GFX11-NEXT: v_dual_mov_b32 v80, s37 :: v_dual_mov_b32 v71, s59
+; GFX11-NEXT: v_dual_mov_b32 v70, s73 :: v_dual_mov_b32 v81, s100
+; GFX11-NEXT: v_dual_mov_b32 v80, s103 :: v_dual_mov_b32 v71, s86
; GFX11-NEXT: v_mov_b32_e32 v67, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v39, s63
-; GFX11-NEXT: v_dual_mov_b32 v26, s61 :: v_dual_mov_b32 v55, s73
+; GFX11-NEXT: v_dual_mov_b32 v32, s97 :: v_dual_mov_b32 v39, s81
+; GFX11-NEXT: v_dual_mov_b32 v26, s84 :: v_dual_mov_b32 v55, s70
; GFX11-NEXT: v_readlane_b32 s1, v77, 1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-NEXT: v_mov_b32_e32 v68, s0
@@ -48099,24 +48120,24 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:184
; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v21
; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25
; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27
@@ -48124,7 +48145,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0
-; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -48190,13 +48211,13 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v38
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v39
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
@@ -48215,16 +48236,16 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v50
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v40
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192
@@ -48236,14 +48257,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:68
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52
; SI-NEXT: s_waitcnt vmcnt(14)
@@ -48447,7 +48468,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v49
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
@@ -48465,7 +48486,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
@@ -48475,12 +48496,12 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v54
+; SI-NEXT: v_or_b32_e32 v2, v2, v35
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
-; SI-NEXT: v_or_b32_e32 v3, v40, v3
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v3, v41, v3
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v1
@@ -48507,9 +48528,9 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr37
@@ -48517,14 +48538,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v53
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
@@ -48546,11 +48567,11 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
+; SI-NEXT: v_or_b32_e32 v5, v5, v51
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v56
@@ -48563,8 +48584,8 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v46
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v35
-; SI-NEXT: v_or_b32_e32 v8, v8, v44
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v49
+; SI-NEXT: v_or_b32_e32 v8, v8, v36
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xff, v33
@@ -48576,11 +48597,11 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v63
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v10, v10, v11
@@ -48601,9 +48622,9 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xff, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v38
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v57
@@ -48628,14 +48649,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v44
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -49067,7 +49088,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
@@ -49095,18 +49116,18 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v40, v2
+; SI-NEXT: v_or_b32_e32 v2, v41, v2
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -49133,7 +49154,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v1, v35, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
@@ -49147,7 +49168,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
+; SI-NEXT: v_or_b32_e32 v2, v53, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
@@ -49174,7 +49195,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
+; SI-NEXT: v_or_b32_e32 v5, v51, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -49196,9 +49217,9 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v44, v8
+; SI-NEXT: v_or_b32_e32 v8, v36, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -49242,7 +49263,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v11
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -49273,7 +49294,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v13
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v44
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
@@ -49642,35 +49663,35 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:104
; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:100
; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:96
; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:92
; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:60
; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:40
; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24
; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
@@ -49877,13 +49898,13 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: s_mov_b32 s6, 0xc0c0004
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v9, v33, v62, s6
+; VI-NEXT: v_perm_b32 v9, v62, v33, s6
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_perm_b32 v10, v63, v60, s6
+; VI-NEXT: v_perm_b32 v10, v60, v54, s6
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_perm_b32 v11, v53, v58, s6
+; VI-NEXT: v_perm_b32 v11, v58, v53, s6
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_perm_b32 v12, v51, v56, s6
+; VI-NEXT: v_perm_b32 v12, v56, v51, s6
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_perm_b32 v13, v37, v36, s6
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -49891,14 +49912,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_perm_b32 v15, v49, v48, s6
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; implicit-def: $vgpr45
@@ -49985,40 +50006,40 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v8, v8, v41, s6
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_perm_b32 v8, v55, v34, s6
+; VI-NEXT: v_perm_b32 v8, v55, v63, s6
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_perm_b32 v9, v61, v32, s6
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_perm_b32 v10, v59, v54, s6
+; VI-NEXT: v_perm_b32 v10, v59, v38, s6
; VI-NEXT: v_or_b32_e32 v10, v10, v11
; VI-NEXT: v_perm_b32 v11, v57, v52, s6
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v47, v38, s6
+; VI-NEXT: v_perm_b32 v12, v47, v34, s6
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_perm_b32 v13, v35, v46, s6
+; VI-NEXT: v_perm_b32 v13, v50, v46, s6
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_perm_b32 v14, v43, v50, s6
+; VI-NEXT: v_perm_b32 v14, v43, v35, s6
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_perm_b32 v15, v39, v42, s6
+; VI-NEXT: v_perm_b32 v15, v42, v39, s6
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v17, v16, s6
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
@@ -50378,10 +50399,10 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v31, 0x300
; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41
-; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60
-; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56
+; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v53
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v51
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36
; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44
; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48
@@ -50406,6 +50427,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_add_u16_e32 v0, 3, v0
; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1
@@ -50419,34 +50441,35 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23
-; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26
-; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: s_waitcnt vmcnt(13)
; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17
-; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: s_waitcnt vmcnt(12)
; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6
-; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: s_waitcnt vmcnt(11)
; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19
-; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: s_waitcnt vmcnt(9)
; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7
-; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: s_waitcnt vmcnt(8)
; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: s_waitcnt vmcnt(7)
; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: s_waitcnt vmcnt(6)
; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8
-; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -50551,9 +50574,9 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_add_u16_e32 v8, 3, v55
-; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34
+; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v9, 3, v33
+; VI-NEXT: v_add_u16_e32 v9, 3, v62
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v8, 0x300, v8
; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -50561,15 +50584,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v9, 3, v61
; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v10, 3, v63
+; VI-NEXT: v_add_u16_e32 v10, 3, v60
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v9, 0x300, v9
; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_add_u16_e32 v10, 3, v59
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v38
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v11, 3, v53
+; VI-NEXT: v_add_u16_e32 v11, 3, v58
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v10, 0x300, v10
; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -50577,20 +50600,20 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v11, 3, v57
; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v12, 3, v51
+; VI-NEXT: v_add_u16_e32 v12, 3, v56
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v11, 0x300, v11
; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v11, v11, v12
; VI-NEXT: v_add_u16_e32 v12, 3, v47
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v38
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v34
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v13, 3, v37
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v12, 0x300, v12
; VI-NEXT: v_add_u16_sdwa v13, v13, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_add_u16_e32 v13, 3, v35
+; VI-NEXT: v_add_u16_e32 v13, 3, v50
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v46
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 3, v45
@@ -50599,32 +50622,29 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v14, v14, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v13, v13, v14
; VI-NEXT: v_add_u16_e32 v14, 3, v43
-; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v50
+; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v35
; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v15, 3, v49
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 0x300, v14
; VI-NEXT: v_add_u16_sdwa v15, v15, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_add_u16_e32 v15, 3, v39
-; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v42
+; VI-NEXT: v_add_u16_e32 v15, 3, v42
+; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v39
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; VI-NEXT: v_add_u16_e32 v15, 0x300, v15
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_add_u16_e32 v16, 3, v16
; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -50927,31 +50947,31 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112
; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108
; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96
; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:88
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84
; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80
; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68
; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64
; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52
; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48
; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44
; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:32
; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:12
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(32)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
@@ -51029,7 +51049,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376
; GFX9-NEXT: s_waitcnt vmcnt(3)
@@ -51159,13 +51179,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6
+; GFX9-NEXT: v_perm_b32 v10, v55, v63, s6
; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6
; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6
; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6
; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6
; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6
; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -51249,40 +51270,39 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_perm_b32 v8, v35, v42, s6
-; GFX9-NEXT: v_perm_b32 v9, v41, v48, s6
+; GFX9-NEXT: v_perm_b32 v8, v48, v42, s6
+; GFX9-NEXT: v_perm_b32 v9, v41, v35, s6
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6
+; GFX9-NEXT: v_perm_b32 v9, v40, v39, s6
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6
+; GFX9-NEXT: v_perm_b32 v10, v32, v62, s6
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_perm_b32 v11, v54, v59, s6
+; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6
+; GFX9-NEXT: v_perm_b32 v12, v58, v52, s6
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6
+; GFX9-NEXT: v_perm_b32 v13, v47, v37, s6
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6
+; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6
; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14
; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr44
@@ -51425,202 +51445,202 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: .LBB38_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB38_4
@@ -51646,8 +51666,8 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48
-; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v35
+; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60
; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38
; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56
@@ -51657,56 +51677,53 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(24)
+; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0
-; GFX9-NEXT: s_waitcnt vmcnt(21)
-; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
+; GFX9-NEXT: s_waitcnt vmcnt(19)
; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3
; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8
; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
+; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
+; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
+; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
+; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20
; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7
; GFX9-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23
; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
+; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
+; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
+; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
+; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v1, 3, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -51810,7 +51827,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_add_u16_e32 v8, 3, v35
+; GFX9-NEXT: v_add_u16_e32 v8, 3, v48
; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v42
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 3, v41
@@ -51818,15 +51835,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_add_u16_e32 v9, 3, v39
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v40
+; GFX9-NEXT: v_add_u16_e32 v9, 3, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v39
; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v10, 3, v55
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_add_u16_e32 v10, 3, v63
+; GFX9-NEXT: v_add_u16_e32 v10, 3, v32
; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 3, v61
@@ -51834,16 +51851,16 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_add_u16_e32 v11, 3, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v59
+; GFX9-NEXT: v_add_u16_e32 v11, 3, v59
+; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v12, 3, v53
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_add_u16_e32 v12, 3, v37
-; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58
+; GFX9-NEXT: v_add_u16_e32 v12, 3, v58
+; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v52
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 3, v57
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -51851,14 +51868,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
; GFX9-NEXT: v_add_u16_e32 v13, 3, v47
-; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52
+; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v37
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v14, 3, v51
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_add_u16_e32 v14, 3, v33
+; GFX9-NEXT: v_add_u16_e32 v14, 3, v36
; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v15, 3, v45
@@ -51876,7 +51893,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_add_u16_e32 v16, 3, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -51885,7 +51902,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v17, 3, v17
; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -52094,9 +52111,12 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; GFX9-NEXT: v_add_u16_e32 v32, 3, v36
-; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+; GFX9-NEXT: v_add_u16_e32 v32, 3, v33
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v32
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: .LBB38_4: ; %end
@@ -68019,44 +68039,47 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v51, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20
; SI-NEXT: v_mov_b32_e32 v52, v18
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v15
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
; SI-NEXT: v_mov_b32_e32 v43, v11
; SI-NEXT: v_mov_b32_e32 v44, v10
; SI-NEXT: v_mov_b32_e32 v45, v9
@@ -68068,23 +68091,22 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v59, v3
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v28
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
@@ -68098,95 +68120,96 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB46_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v32
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v48
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v35
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v39
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v38
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v37
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -68199,23 +68222,20 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
@@ -68224,6 +68244,9 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
@@ -68246,19 +68269,23 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v51
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -68278,10 +68305,6 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
@@ -68349,15 +68372,13 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB46_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB46_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v62
; SI-NEXT: v_cvt_f32_f16_e32 v3, v61
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -68372,7 +68393,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v49
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_cvt_f32_f16_e32 v4, v59
; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
@@ -68384,7 +68405,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v32
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
@@ -68395,7 +68416,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v49
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v48
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v47
@@ -68406,7 +68427,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v35
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v45
@@ -68417,7 +68438,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v39
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v43
@@ -68428,7 +68449,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v41
@@ -68439,7 +68460,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v38
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v55
@@ -68461,103 +68482,103 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v37
+; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v51
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v37
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v51
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v63
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
@@ -68565,31 +68586,31 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -71361,6 +71382,12 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32
+; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16
+; SI-NEXT: v_mov_b32_e32 v43, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
+; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: v_mov_b32_e32 v45, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19
; SI-NEXT: v_mov_b32_e32 v46, v8
@@ -71379,8 +71406,8 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
; SI-NEXT: v_mov_b32_e32 v61, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27
-; SI-NEXT: v_mov_b32_e32 v43, v11
-; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_mov_b32_e32 v40, v14
+; SI-NEXT: v_mov_b32_e32 v41, v13
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
@@ -71391,18 +71418,14 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45
@@ -71414,147 +71437,151 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v13
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_or_b32_e32 v8, v8, v32
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
+; SI-NEXT: v_or_b32_e32 v4, v4, v32
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: v_or_b32_e32 v0, v0, v49
-; SI-NEXT: v_or_b32_e32 v1, v1, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v41
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v40
-; SI-NEXT: v_or_b32_e32 v6, v6, v48
-; SI-NEXT: v_or_b32_e32 v7, v7, v55
-; SI-NEXT: v_or_b32_e32 v9, v9, v54
-; SI-NEXT: v_or_b32_e32 v10, v10, v39
-; SI-NEXT: v_or_b32_e32 v11, v11, v53
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_or_b32_e32 v1, v1, v55
+; SI-NEXT: v_or_b32_e32 v2, v2, v39
+; SI-NEXT: v_or_b32_e32 v3, v3, v54
+; SI-NEXT: v_or_b32_e32 v5, v5, v53
+; SI-NEXT: v_or_b32_e32 v6, v6, v38
+; SI-NEXT: v_or_b32_e32 v7, v7, v52
+; SI-NEXT: v_or_b32_e32 v8, v8, v35
+; SI-NEXT: v_or_b32_e32 v9, v9, v51
+; SI-NEXT: v_or_b32_e32 v10, v10, v37
+; SI-NEXT: v_or_b32_e32 v11, v11, v50
+; SI-NEXT: v_or_b32_e32 v12, v12, v33
+; SI-NEXT: v_or_b32_e32 v13, v13, v49
+; SI-NEXT: v_or_b32_e32 v14, v14, v36
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -71566,24 +71593,51 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v16, v16, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_or_b32_e32 v19, v19, v20
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
@@ -71603,51 +71657,33 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v12, v38
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v13, v52
-; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v14, v37
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v15, v51
-; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v36
-; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v17, v50
-; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v29, v30
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v35
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v15, v48
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v30, v30, v31
@@ -71685,72 +71721,63 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB50_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v32, v8
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v4, v32, v4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v60
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v59
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42
+; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v41
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_or_b32_e32 v1, v42, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v41, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v40, v5
-; SI-NEXT: v_or_b32_e32 v6, v48, v6
-; SI-NEXT: v_or_b32_e32 v7, v55, v7
-; SI-NEXT: v_or_b32_e32 v9, v54, v9
-; SI-NEXT: v_or_b32_e32 v10, v39, v10
-; SI-NEXT: v_or_b32_e32 v11, v53, v11
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v0, v34, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
+; SI-NEXT: v_or_b32_e32 v2, v39, v2
+; SI-NEXT: v_or_b32_e32 v3, v54, v3
+; SI-NEXT: v_or_b32_e32 v5, v53, v5
+; SI-NEXT: v_or_b32_e32 v6, v38, v6
+; SI-NEXT: v_or_b32_e32 v7, v52, v7
+; SI-NEXT: v_or_b32_e32 v8, v35, v8
+; SI-NEXT: v_or_b32_e32 v9, v51, v9
+; SI-NEXT: v_or_b32_e32 v10, v37, v10
+; SI-NEXT: v_or_b32_e32 v11, v50, v11
+; SI-NEXT: v_or_b32_e32 v12, v33, v12
+; SI-NEXT: v_or_b32_e32 v13, v49, v13
+; SI-NEXT: v_or_b32_e32 v14, v36, v14
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -71759,21 +71786,52 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_or_b32_e32 v19, v20, v19
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v21, v20
@@ -71796,70 +71854,46 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v24, v23
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v38, v12
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v25, v24
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v52, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v26, v25
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v37, v14
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v27, v26
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v51, v15
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v28, v27
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v36, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v29, v28
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v50, v17
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v30, v29
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v35, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v48, v15
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
@@ -72203,8 +72237,8 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
-; SI-NEXT: s_lshr_b32 s12, s11, 16
-; SI-NEXT: s_lshr_b32 s64, s13, 16
+; SI-NEXT: s_lshr_b32 s65, s11, 16
+; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s63, s15, 16
; SI-NEXT: s_lshr_b32 s72, s73, 16
; SI-NEXT: s_lshr_b32 s74, s75, 16
@@ -72223,8 +72257,8 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v33, s12, 0
-; SI-NEXT: v_writelane_b32 v33, s64, 1
+; SI-NEXT: v_writelane_b32 v33, s10, 0
+; SI-NEXT: v_writelane_b32 v33, s12, 1
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s5, s16, 0xffff
@@ -72314,24 +72348,24 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s14, s63
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s66, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s67, 16
-; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_or_b32 s67, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB51_3
; SI-NEXT: .LBB51_2:
; SI-NEXT: s_mov_b32 s14, s63
-; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
@@ -72488,15 +72522,15 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s66, s4, 0x30000
@@ -75695,124 +75729,124 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
@@ -75926,106 +75960,106 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[15:16]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
; VI-NEXT: v_mov_b32_e32 v55, v39
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v1
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; VI-NEXT: .LBB56_2: ; %Flow
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
@@ -76156,177 +76190,179 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v1
; VI-NEXT: .LBB56_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v11, v11, v48, s4
-; VI-NEXT: v_perm_b32 v3, v3, v33, s4
-; VI-NEXT: v_perm_b32 v33, v50, v39, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v34, s4
+; VI-NEXT: v_perm_b32 v34, v62, v39, s4
; VI-NEXT: v_perm_b32 v39, v49, v53, s4
-; VI-NEXT: v_perm_b32 v49, v57, v52, s4
-; VI-NEXT: v_perm_b32 v34, v34, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; VI-NEXT: v_or_b32_e32 v1, v1, v34
-; VI-NEXT: v_perm_b32 v2, v2, v61, s4
-; VI-NEXT: v_perm_b32 v40, v59, v40, s4
+; VI-NEXT: v_perm_b32 v6, v6, v50, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v41, v61, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v35, s4
+; VI-NEXT: v_perm_b32 v33, v33, v40, s4
+; VI-NEXT: v_perm_b32 v3, v3, v59, s4
; VI-NEXT: v_perm_b32 v4, v4, v58, s4
-; VI-NEXT: v_perm_b32 v5, v5, v43, s4
-; VI-NEXT: v_perm_b32 v6, v6, v62, s4
-; VI-NEXT: v_perm_b32 v37, v37, v54, s4
-; VI-NEXT: v_perm_b32 v7, v7, v56, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v35, v60, v54, s4
+; VI-NEXT: v_perm_b32 v7, v7, v43, s4
; VI-NEXT: v_perm_b32 v8, v8, v47, s4
; VI-NEXT: v_perm_b32 v9, v9, v46, s4
; VI-NEXT: v_perm_b32 v10, v10, v45, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v12, v12, v38, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v13, v48, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v12, v12, v48, s4
; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v38, v51, s4
+; VI-NEXT: v_perm_b32 v13, v13, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v48, v51, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v14, v14, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v48, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v49, v49, v50, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v15, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v38, v52, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v50, v50, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v17, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v18, v18, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v51, v51, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v41
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v60, v44, s4
+; VI-NEXT: v_perm_b32 v1, v44, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_perm_b32 v3, v20, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_perm_b32 v51, v51, v52, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -76335,38 +76371,38 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v51
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -76375,16 +76411,13 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v1, v36, v35, s4
+; VI-NEXT: v_perm_b32 v1, v57, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_perm_b32 v1, v19, v63, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v20, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
@@ -76616,40 +76649,86 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(25)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
@@ -76702,240 +76781,201 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB56_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: s_waitcnt vmcnt(24)
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v11
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v4
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v9
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: .LBB56_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v53, v50
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB56_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, 3, v1
@@ -76968,7 +77008,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_addc_co_u32_e32 v28, vcc, 0, v28, vcc
; GFX9-NEXT: v_add_co_u32_e32 v29, vcc, 3, v29
; GFX9-NEXT: v_addc_co_u32_e32 v30, vcc, 0, v30, vcc
-; GFX9-NEXT: s_waitcnt vmcnt(22)
+; GFX9-NEXT: s_waitcnt vmcnt(24)
; GFX9-NEXT: v_add_co_u32_e32 v31, vcc, 3, v31
; GFX9-NEXT: v_addc_co_u32_e32 v32, vcc, 0, v32, vcc
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
@@ -77015,251 +77055,255 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v11
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v9
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v4
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v6
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v2
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v3
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB56_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v8, v8, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v33, v34, v53, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v7, v7, v50, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v49, s4
+; GFX9-NEXT: v_perm_b32 v36, v36, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v5, v5, v51, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v53, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4
-; GFX9-NEXT: v_perm_b32 v41, v63, v41, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v46, s4
+; GFX9-NEXT: v_perm_b32 v52, v45, v40, s4
+; GFX9-NEXT: v_perm_b32 v41, v47, v41, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v47, s4
-; GFX9-NEXT: v_perm_b32 v38, v38, v40, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v46, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v45, s4
-; GFX9-NEXT: v_perm_b32 v39, v58, v39, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
-; GFX9-NEXT: v_perm_b32 v36, v56, v54, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v3, v43, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v62, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v35, v35, v50, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v10, v10, v39, s4
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v8, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v10, v10, v34, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v34, v34, v49, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v34, v34, v54, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v12, v12, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_perm_b32 v53, v61, v53, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v17, v17, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v14, v14, v51, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v50, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v35, v35, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v51, v58, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v49, v50, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v51, v49, v51, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v52, v57, v52, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v49, s4
+; GFX9-NEXT: v_perm_b32 v33, v33, v45, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v49, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v54, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -77268,147 +77312,146 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v1, v44, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v38, v63, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: v_perm_b32 v1, v55, v42, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v48, v37, s4
+; GFX9-NEXT: v_perm_b32 v1, v37, v48, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v19, v62, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v49, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; GFX9-NEXT: v_perm_b32 v1, v20, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v59, s4
+; GFX9-NEXT: v_perm_b32 v2, v59, v44, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v21, v57, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
@@ -78436,138 +78479,136 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s47, s43, 24
+; SI-NEXT: s_lshr_b32 s47, s43, 16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v22, s47, 8
-; SI-NEXT: s_lshr_b32 s47, s43, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 9
; SI-NEXT: s_lshr_b32 s47, s45, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 10
+; SI-NEXT: v_writelane_b32 v22, s47, 9
; SI-NEXT: s_lshr_b32 s47, s45, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 11
+; SI-NEXT: v_writelane_b32 v22, s47, 10
; SI-NEXT: s_lshr_b32 s47, s45, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 12
+; SI-NEXT: v_writelane_b32 v22, s47, 11
; SI-NEXT: s_lshr_b32 s47, s29, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 13
+; SI-NEXT: v_writelane_b32 v22, s47, 12
; SI-NEXT: s_lshr_b32 s47, s29, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 14
+; SI-NEXT: v_writelane_b32 v22, s47, 13
; SI-NEXT: s_lshr_b32 s47, s29, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 15
+; SI-NEXT: v_writelane_b32 v22, s47, 14
; SI-NEXT: s_lshr_b32 s47, s27, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 15
; SI-NEXT: s_lshr_b32 s47, s27, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 17
+; SI-NEXT: v_writelane_b32 v22, s47, 16
; SI-NEXT: s_lshr_b32 s47, s27, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 18
+; SI-NEXT: v_writelane_b32 v22, s47, 17
; SI-NEXT: s_lshr_b32 s47, s25, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s62, 6
-; SI-NEXT: v_writelane_b32 v22, s63, 7
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v22, s62, 4
-; SI-NEXT: v_writelane_b32 v22, s63, 5
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s62, 2
-; SI-NEXT: v_writelane_b32 v22, s63, 3
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v22, s62, 0
-; SI-NEXT: v_writelane_b32 v22, s63, 1
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 62
-; SI-NEXT: v_writelane_b32 v21, s63, 63
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 60
-; SI-NEXT: v_writelane_b32 v21, s63, 61
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 58
-; SI-NEXT: v_writelane_b32 v21, s63, 59
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 56
-; SI-NEXT: v_writelane_b32 v21, s63, 57
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 54
-; SI-NEXT: v_writelane_b32 v21, s63, 55
-; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 52
-; SI-NEXT: v_writelane_b32 v21, s63, 53
-; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 50
-; SI-NEXT: v_writelane_b32 v21, s63, 51
-; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 48
-; SI-NEXT: v_writelane_b32 v21, s63, 49
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 46
-; SI-NEXT: v_writelane_b32 v21, s63, 47
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 44
-; SI-NEXT: v_writelane_b32 v21, s63, 45
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 42
-; SI-NEXT: v_writelane_b32 v21, s63, 43
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 40
-; SI-NEXT: v_writelane_b32 v21, s63, 41
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 38
-; SI-NEXT: v_writelane_b32 v21, s63, 39
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 36
-; SI-NEXT: v_writelane_b32 v21, s63, 37
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 34
-; SI-NEXT: v_writelane_b32 v21, s63, 35
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 32
-; SI-NEXT: v_writelane_b32 v21, s63, 33
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 30
-; SI-NEXT: v_writelane_b32 v21, s63, 31
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 28
-; SI-NEXT: v_writelane_b32 v21, s63, 29
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 26
-; SI-NEXT: v_writelane_b32 v21, s63, 27
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 24
-; SI-NEXT: v_writelane_b32 v21, s63, 25
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 22
-; SI-NEXT: v_writelane_b32 v21, s63, 23
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 20
-; SI-NEXT: v_writelane_b32 v21, s63, 21
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 18
-; SI-NEXT: v_writelane_b32 v21, s63, 19
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 16
-; SI-NEXT: v_writelane_b32 v21, s63, 17
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 14
-; SI-NEXT: v_writelane_b32 v21, s63, 15
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 12
-; SI-NEXT: v_writelane_b32 v21, s63, 13
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 10
-; SI-NEXT: v_writelane_b32 v21, s63, 11
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 8
-; SI-NEXT: v_writelane_b32 v21, s63, 9
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 6
-; SI-NEXT: v_writelane_b32 v21, s63, 7
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 4
-; SI-NEXT: v_writelane_b32 v21, s63, 5
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 2
-; SI-NEXT: v_writelane_b32 v21, s63, 3
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 0
+; SI-NEXT: v_writelane_b32 v22, s47, 18
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; SI-NEXT: v_writelane_b32 v22, s76, 6
+; SI-NEXT: v_writelane_b32 v22, s77, 7
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
+; SI-NEXT: v_writelane_b32 v22, s76, 4
+; SI-NEXT: v_writelane_b32 v22, s77, 5
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
+; SI-NEXT: v_writelane_b32 v22, s76, 2
+; SI-NEXT: v_writelane_b32 v22, s77, 3
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v22, s76, 0
+; SI-NEXT: v_writelane_b32 v22, s77, 1
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 62
+; SI-NEXT: v_writelane_b32 v21, s77, 63
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 60
+; SI-NEXT: v_writelane_b32 v21, s77, 61
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 58
+; SI-NEXT: v_writelane_b32 v21, s77, 59
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 56
+; SI-NEXT: v_writelane_b32 v21, s77, 57
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 54
+; SI-NEXT: v_writelane_b32 v21, s77, 55
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 52
+; SI-NEXT: v_writelane_b32 v21, s77, 53
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 50
+; SI-NEXT: v_writelane_b32 v21, s77, 51
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 48
+; SI-NEXT: v_writelane_b32 v21, s77, 49
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 46
+; SI-NEXT: v_writelane_b32 v21, s77, 47
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 44
+; SI-NEXT: v_writelane_b32 v21, s77, 45
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 42
+; SI-NEXT: v_writelane_b32 v21, s77, 43
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 40
+; SI-NEXT: v_writelane_b32 v21, s77, 41
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 38
+; SI-NEXT: v_writelane_b32 v21, s77, 39
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 36
+; SI-NEXT: v_writelane_b32 v21, s77, 37
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 34
+; SI-NEXT: v_writelane_b32 v21, s77, 35
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 32
+; SI-NEXT: v_writelane_b32 v21, s77, 33
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 30
+; SI-NEXT: v_writelane_b32 v21, s77, 31
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 28
+; SI-NEXT: v_writelane_b32 v21, s77, 29
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 26
+; SI-NEXT: v_writelane_b32 v21, s77, 27
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 24
+; SI-NEXT: v_writelane_b32 v21, s77, 25
+; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 22
+; SI-NEXT: v_writelane_b32 v21, s77, 23
+; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 20
+; SI-NEXT: v_writelane_b32 v21, s77, 21
+; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 18
+; SI-NEXT: v_writelane_b32 v21, s77, 19
+; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 16
+; SI-NEXT: v_writelane_b32 v21, s77, 17
+; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 14
+; SI-NEXT: v_writelane_b32 v21, s77, 15
+; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 12
+; SI-NEXT: v_writelane_b32 v21, s77, 13
+; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 10
+; SI-NEXT: v_writelane_b32 v21, s77, 11
+; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 8
+; SI-NEXT: v_writelane_b32 v21, s77, 9
+; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 6
+; SI-NEXT: v_writelane_b32 v21, s77, 7
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 4
+; SI-NEXT: v_writelane_b32 v21, s77, 5
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 2
+; SI-NEXT: v_writelane_b32 v21, s77, 3
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 0
; SI-NEXT: s_lshr_b32 s49, s5, 24
; SI-NEXT: s_lshr_b32 s39, s5, 16
; SI-NEXT: s_lshr_b32 s53, s5, 8
@@ -78589,6 +78630,7 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b32 s57, s41, 24
; SI-NEXT: s_lshr_b32 s58, s41, 16
; SI-NEXT: s_lshr_b32 s59, s41, 8
+; SI-NEXT: s_lshr_b32 s60, s43, 24
; SI-NEXT: s_lshr_b32 s61, s43, 8
; SI-NEXT: s_lshr_b32 s84, s25, 16
; SI-NEXT: s_lshr_b32 s96, s25, 8
@@ -78604,10 +78646,10 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b32 s50, s17, 24
; SI-NEXT: s_lshr_b32 s48, s17, 16
; SI-NEXT: s_lshr_b32 s38, s17, 8
-; SI-NEXT: v_writelane_b32 v21, s63, 1
-; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v21, s77, 1
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8
@@ -78620,51 +78662,48 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
-; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_writelane_b32 v21, s60, 0
-; SI-NEXT: v_writelane_b32 v21, s61, 1
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s62, 0
+; SI-NEXT: v_writelane_b32 v21, s63, 1
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v21, s60, 2
-; SI-NEXT: v_writelane_b32 v21, s61, 3
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s62, 2
+; SI-NEXT: v_writelane_b32 v21, s63, 3
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v21, s60, 4
-; SI-NEXT: v_writelane_b32 v21, s61, 5
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s62, 4
+; SI-NEXT: v_writelane_b32 v21, s63, 5
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v21, s60, 6
-; SI-NEXT: v_writelane_b32 v21, s61, 7
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s62, 6
+; SI-NEXT: v_writelane_b32 v21, s63, 7
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v21, s60, 8
-; SI-NEXT: v_writelane_b32 v21, s61, 9
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s62, 8
+; SI-NEXT: v_writelane_b32 v21, s63, 9
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v21, s60, 10
-; SI-NEXT: v_writelane_b32 v21, s61, 11
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s62, 10
+; SI-NEXT: v_writelane_b32 v21, s63, 11
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr50
@@ -78679,16 +78718,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr99
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v21, s60, 12
-; SI-NEXT: v_writelane_b32 v21, s61, 13
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr97
@@ -78715,94 +78753,97 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s62, 12
+; SI-NEXT: v_writelane_b32 v21, s63, 13
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 14
+; SI-NEXT: v_writelane_b32 v21, s63, 15
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 16
+; SI-NEXT: v_writelane_b32 v21, s63, 17
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 18
+; SI-NEXT: v_writelane_b32 v21, s63, 19
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 20
+; SI-NEXT: v_writelane_b32 v21, s63, 21
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 22
+; SI-NEXT: v_writelane_b32 v21, s63, 23
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 24
+; SI-NEXT: v_writelane_b32 v21, s63, 25
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 26
+; SI-NEXT: v_writelane_b32 v21, s63, 27
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 28
+; SI-NEXT: v_writelane_b32 v21, s63, 29
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 30
+; SI-NEXT: v_writelane_b32 v21, s63, 31
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 32
+; SI-NEXT: v_writelane_b32 v21, s63, 33
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 34
+; SI-NEXT: v_writelane_b32 v21, s63, 35
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 36
+; SI-NEXT: v_writelane_b32 v21, s63, 37
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 38
+; SI-NEXT: v_writelane_b32 v21, s63, 39
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 40
+; SI-NEXT: v_writelane_b32 v21, s63, 41
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 42
+; SI-NEXT: v_writelane_b32 v21, s63, 43
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 44
+; SI-NEXT: v_writelane_b32 v21, s63, 45
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 46
+; SI-NEXT: v_writelane_b32 v21, s63, 47
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 48
+; SI-NEXT: v_writelane_b32 v21, s63, 49
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 50
+; SI-NEXT: v_writelane_b32 v21, s63, 51
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 52
+; SI-NEXT: v_writelane_b32 v21, s63, 53
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 54
+; SI-NEXT: v_writelane_b32 v21, s63, 55
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 56
+; SI-NEXT: v_writelane_b32 v21, s63, 57
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 58
+; SI-NEXT: v_writelane_b32 v21, s63, 59
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 60
+; SI-NEXT: v_writelane_b32 v21, s63, 61
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v21, s62, 62
+; SI-NEXT: v_writelane_b32 v21, s63, 63
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: v_writelane_b32 v21, s60, 14
-; SI-NEXT: v_writelane_b32 v21, s61, 15
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 16
-; SI-NEXT: v_writelane_b32 v21, s61, 17
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 18
-; SI-NEXT: v_writelane_b32 v21, s61, 19
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 20
-; SI-NEXT: v_writelane_b32 v21, s61, 21
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 22
-; SI-NEXT: v_writelane_b32 v21, s61, 23
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 24
-; SI-NEXT: v_writelane_b32 v21, s61, 25
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 26
-; SI-NEXT: v_writelane_b32 v21, s61, 27
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 28
-; SI-NEXT: v_writelane_b32 v21, s61, 29
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 30
-; SI-NEXT: v_writelane_b32 v21, s61, 31
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 32
-; SI-NEXT: v_writelane_b32 v21, s61, 33
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 34
-; SI-NEXT: v_writelane_b32 v21, s61, 35
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 36
-; SI-NEXT: v_writelane_b32 v21, s61, 37
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 38
-; SI-NEXT: v_writelane_b32 v21, s61, 39
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 40
-; SI-NEXT: v_writelane_b32 v21, s61, 41
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 42
-; SI-NEXT: v_writelane_b32 v21, s61, 43
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 44
-; SI-NEXT: v_writelane_b32 v21, s61, 45
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 46
-; SI-NEXT: v_writelane_b32 v21, s61, 47
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 48
-; SI-NEXT: v_writelane_b32 v21, s61, 49
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 50
-; SI-NEXT: v_writelane_b32 v21, s61, 51
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 52
-; SI-NEXT: v_writelane_b32 v21, s61, 53
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 54
-; SI-NEXT: v_writelane_b32 v21, s61, 55
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 56
-; SI-NEXT: v_writelane_b32 v21, s61, 57
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 58
-; SI-NEXT: v_writelane_b32 v21, s61, 59
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 60
-; SI-NEXT: v_writelane_b32 v21, s61, 61
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v21, s60, 62
-; SI-NEXT: v_writelane_b32 v21, s61, 63
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s60, 0
-; SI-NEXT: v_writelane_b32 v22, s61, 1
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v22, s60, 2
-; SI-NEXT: v_writelane_b32 v22, s61, 3
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v22, s60, 4
-; SI-NEXT: v_writelane_b32 v22, s61, 5
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: v_writelane_b32 v22, s60, 6
-; SI-NEXT: v_writelane_b32 v22, s61, 7
+; SI-NEXT: v_writelane_b32 v22, s62, 0
+; SI-NEXT: v_writelane_b32 v22, s63, 1
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v22, s62, 2
+; SI-NEXT: v_writelane_b32 v22, s63, 3
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v22, s62, 4
+; SI-NEXT: v_writelane_b32 v22, s63, 5
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: v_writelane_b32 v22, s62, 6
+; SI-NEXT: v_writelane_b32 v22, s63, 7
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s47, 1, 0
@@ -78822,9 +78863,9 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_mov_b32 s46, s56
; SI-NEXT: s_mov_b32 s56, s57
; SI-NEXT: s_mov_b32 s99, s58
-; SI-NEXT: v_readlane_b32 s58, v22, 8
+; SI-NEXT: s_mov_b32 s58, s60
; SI-NEXT: s_mov_b32 s60, s61
-; SI-NEXT: v_readlane_b32 s61, v22, 9
+; SI-NEXT: v_readlane_b32 s61, v22, 8
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -78860,132 +78901,132 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
; SI-NEXT: s_lshr_b32 s47, s45, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 10
+; SI-NEXT: v_writelane_b32 v22, s47, 9
; SI-NEXT: s_lshr_b32 s47, s45, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 11
+; SI-NEXT: v_writelane_b32 v22, s47, 10
; SI-NEXT: s_lshr_b32 s47, s45, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 12
+; SI-NEXT: v_writelane_b32 v22, s47, 11
; SI-NEXT: s_lshr_b32 s47, s29, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 13
+; SI-NEXT: v_writelane_b32 v22, s47, 12
; SI-NEXT: s_lshr_b32 s47, s29, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 14
+; SI-NEXT: v_writelane_b32 v22, s47, 13
; SI-NEXT: s_lshr_b32 s47, s29, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 15
+; SI-NEXT: v_writelane_b32 v22, s47, 14
; SI-NEXT: s_lshr_b32 s47, s27, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 15
; SI-NEXT: s_lshr_b32 s47, s27, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 17
+; SI-NEXT: v_writelane_b32 v22, s47, 16
; SI-NEXT: s_lshr_b32 s47, s27, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 18
+; SI-NEXT: v_writelane_b32 v22, s47, 17
; SI-NEXT: s_lshr_b32 s47, s25, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s62, 6
-; SI-NEXT: v_writelane_b32 v22, s63, 7
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v22, s62, 4
-; SI-NEXT: v_writelane_b32 v22, s63, 5
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s62, 2
-; SI-NEXT: v_writelane_b32 v22, s63, 3
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v22, s62, 0
-; SI-NEXT: v_writelane_b32 v22, s63, 1
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 62
-; SI-NEXT: v_writelane_b32 v21, s63, 63
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 60
-; SI-NEXT: v_writelane_b32 v21, s63, 61
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 58
-; SI-NEXT: v_writelane_b32 v21, s63, 59
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 56
-; SI-NEXT: v_writelane_b32 v21, s63, 57
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 54
-; SI-NEXT: v_writelane_b32 v21, s63, 55
-; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 52
-; SI-NEXT: v_writelane_b32 v21, s63, 53
-; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 50
-; SI-NEXT: v_writelane_b32 v21, s63, 51
-; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 48
-; SI-NEXT: v_writelane_b32 v21, s63, 49
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 46
-; SI-NEXT: v_writelane_b32 v21, s63, 47
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 44
-; SI-NEXT: v_writelane_b32 v21, s63, 45
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 42
-; SI-NEXT: v_writelane_b32 v21, s63, 43
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 40
-; SI-NEXT: v_writelane_b32 v21, s63, 41
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 38
-; SI-NEXT: v_writelane_b32 v21, s63, 39
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 36
-; SI-NEXT: v_writelane_b32 v21, s63, 37
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 34
-; SI-NEXT: v_writelane_b32 v21, s63, 35
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 32
-; SI-NEXT: v_writelane_b32 v21, s63, 33
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 30
-; SI-NEXT: v_writelane_b32 v21, s63, 31
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 28
-; SI-NEXT: v_writelane_b32 v21, s63, 29
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 26
-; SI-NEXT: v_writelane_b32 v21, s63, 27
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 24
-; SI-NEXT: v_writelane_b32 v21, s63, 25
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 22
-; SI-NEXT: v_writelane_b32 v21, s63, 23
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 20
-; SI-NEXT: v_writelane_b32 v21, s63, 21
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 18
-; SI-NEXT: v_writelane_b32 v21, s63, 19
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 16
-; SI-NEXT: v_writelane_b32 v21, s63, 17
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 14
-; SI-NEXT: v_writelane_b32 v21, s63, 15
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 12
-; SI-NEXT: v_writelane_b32 v21, s63, 13
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 10
-; SI-NEXT: v_writelane_b32 v21, s63, 11
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 8
-; SI-NEXT: v_writelane_b32 v21, s63, 9
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 6
-; SI-NEXT: v_writelane_b32 v21, s63, 7
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; SI-NEXT: v_writelane_b32 v21, s62, 4
-; SI-NEXT: v_writelane_b32 v21, s63, 5
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 16
-; SI-NEXT: v_writelane_b32 v21, s62, 2
-; SI-NEXT: v_writelane_b32 v21, s63, 3
-; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
-; SI-NEXT: v_writelane_b32 v21, s62, 0
+; SI-NEXT: v_writelane_b32 v22, s47, 18
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; SI-NEXT: v_writelane_b32 v22, s76, 6
+; SI-NEXT: v_writelane_b32 v22, s77, 7
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
+; SI-NEXT: v_writelane_b32 v22, s76, 4
+; SI-NEXT: v_writelane_b32 v22, s77, 5
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
+; SI-NEXT: v_writelane_b32 v22, s76, 2
+; SI-NEXT: v_writelane_b32 v22, s77, 3
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v22, s76, 0
+; SI-NEXT: v_writelane_b32 v22, s77, 1
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 62
+; SI-NEXT: v_writelane_b32 v21, s77, 63
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 60
+; SI-NEXT: v_writelane_b32 v21, s77, 61
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 58
+; SI-NEXT: v_writelane_b32 v21, s77, 59
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 56
+; SI-NEXT: v_writelane_b32 v21, s77, 57
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 54
+; SI-NEXT: v_writelane_b32 v21, s77, 55
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 52
+; SI-NEXT: v_writelane_b32 v21, s77, 53
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 50
+; SI-NEXT: v_writelane_b32 v21, s77, 51
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 48
+; SI-NEXT: v_writelane_b32 v21, s77, 49
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 46
+; SI-NEXT: v_writelane_b32 v21, s77, 47
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 44
+; SI-NEXT: v_writelane_b32 v21, s77, 45
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 42
+; SI-NEXT: v_writelane_b32 v21, s77, 43
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 40
+; SI-NEXT: v_writelane_b32 v21, s77, 41
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 38
+; SI-NEXT: v_writelane_b32 v21, s77, 39
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 36
+; SI-NEXT: v_writelane_b32 v21, s77, 37
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 34
+; SI-NEXT: v_writelane_b32 v21, s77, 35
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 32
+; SI-NEXT: v_writelane_b32 v21, s77, 33
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 30
+; SI-NEXT: v_writelane_b32 v21, s77, 31
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 28
+; SI-NEXT: v_writelane_b32 v21, s77, 29
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 26
+; SI-NEXT: v_writelane_b32 v21, s77, 27
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 24
+; SI-NEXT: v_writelane_b32 v21, s77, 25
+; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 22
+; SI-NEXT: v_writelane_b32 v21, s77, 23
+; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 20
+; SI-NEXT: v_writelane_b32 v21, s77, 21
+; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 18
+; SI-NEXT: v_writelane_b32 v21, s77, 19
+; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 16
+; SI-NEXT: v_writelane_b32 v21, s77, 17
+; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 14
+; SI-NEXT: v_writelane_b32 v21, s77, 15
+; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 12
+; SI-NEXT: v_writelane_b32 v21, s77, 13
+; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 10
+; SI-NEXT: v_writelane_b32 v21, s77, 11
+; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 8
+; SI-NEXT: v_writelane_b32 v21, s77, 9
+; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 6
+; SI-NEXT: v_writelane_b32 v21, s77, 7
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 24
+; SI-NEXT: v_writelane_b32 v21, s76, 4
+; SI-NEXT: v_writelane_b32 v21, s77, 5
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: v_writelane_b32 v21, s76, 2
+; SI-NEXT: v_writelane_b32 v21, s77, 3
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8
+; SI-NEXT: v_writelane_b32 v21, s76, 0
; SI-NEXT: s_lshr_b32 s37, s5, 24
; SI-NEXT: s_lshr_b32 s39, s5, 16
; SI-NEXT: s_lshr_b32 s49, s5, 8
@@ -79024,10 +79065,10 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b32 s50, s17, 24
; SI-NEXT: s_lshr_b32 s48, s17, 16
; SI-NEXT: s_lshr_b32 s38, s17, 8
-; SI-NEXT: v_writelane_b32 v21, s63, 1
-; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v21, s77, 1
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8
@@ -79102,18 +79143,23 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_and_b32 s17, s68, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s70, 24
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: v_readlane_b32 s18, v21, 0
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s19, v21, 1
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_lshl_b32 s17, s18, 8
+; SI-NEXT: v_readlane_b32 s18, v21, 2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s22, 0xff
-; SI-NEXT: s_lshl_b32 s17, s74, 8
+; SI-NEXT: v_readlane_b32 s19, v21, 3
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s72, 0xff
+; SI-NEXT: s_and_b32 s17, s18, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 4
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s62, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -79124,23 +79170,24 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s80, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s82, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 5
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s86, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 0
+; SI-NEXT: v_readlane_b32 s18, v21, 6
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 1
+; SI-NEXT: v_readlane_b32 s19, v21, 7
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 2
+; SI-NEXT: v_readlane_b32 s18, v21, 8
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s24, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 3
+; SI-NEXT: v_readlane_b32 s19, v21, 9
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 4
+; SI-NEXT: v_readlane_b32 s18, v21, 10
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -79153,124 +79200,124 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s96, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s84, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 19
-; SI-NEXT: v_readlane_b32 s19, v21, 5
+; SI-NEXT: v_readlane_b32 s18, v22, 18
+; SI-NEXT: v_readlane_b32 s19, v21, 11
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 6
+; SI-NEXT: v_readlane_b32 s18, v21, 12
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 7
+; SI-NEXT: v_readlane_b32 s19, v21, 13
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 8
+; SI-NEXT: v_readlane_b32 s18, v21, 14
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s26, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 9
+; SI-NEXT: v_readlane_b32 s19, v21, 15
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 10
+; SI-NEXT: v_readlane_b32 s18, v21, 16
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 18
+; SI-NEXT: v_readlane_b32 s17, v22, 17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s27, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 17
+; SI-NEXT: v_readlane_b32 s17, v22, 16
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 16
-; SI-NEXT: v_readlane_b32 s19, v21, 11
+; SI-NEXT: v_readlane_b32 s18, v22, 15
+; SI-NEXT: v_readlane_b32 s19, v21, 17
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 12
+; SI-NEXT: v_readlane_b32 s18, v21, 18
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 13
+; SI-NEXT: v_readlane_b32 s19, v21, 19
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 14
+; SI-NEXT: v_readlane_b32 s18, v21, 20
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s28, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 15
+; SI-NEXT: v_readlane_b32 s19, v21, 21
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 16
+; SI-NEXT: v_readlane_b32 s18, v21, 22
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 15
+; SI-NEXT: v_readlane_b32 s17, v22, 14
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s29, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 14
+; SI-NEXT: v_readlane_b32 s17, v22, 13
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 13
-; SI-NEXT: v_readlane_b32 s19, v21, 17
+; SI-NEXT: v_readlane_b32 s18, v22, 12
+; SI-NEXT: v_readlane_b32 s19, v21, 23
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 18
+; SI-NEXT: v_readlane_b32 s18, v21, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 19
+; SI-NEXT: v_readlane_b32 s19, v21, 25
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 20
+; SI-NEXT: v_readlane_b32 s18, v21, 26
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s44, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 21
+; SI-NEXT: v_readlane_b32 s19, v21, 27
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 22
+; SI-NEXT: v_readlane_b32 s18, v21, 28
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 12
+; SI-NEXT: v_readlane_b32 s17, v22, 11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 11
+; SI-NEXT: v_readlane_b32 s17, v22, 10
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 10
-; SI-NEXT: v_readlane_b32 s19, v21, 23
+; SI-NEXT: v_readlane_b32 s18, v22, 9
+; SI-NEXT: v_readlane_b32 s19, v21, 29
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 24
+; SI-NEXT: v_readlane_b32 s18, v21, 30
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 25
+; SI-NEXT: v_readlane_b32 s19, v21, 31
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 26
+; SI-NEXT: v_readlane_b32 s18, v21, 32
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 27
+; SI-NEXT: v_readlane_b32 s19, v21, 33
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 28
+; SI-NEXT: v_readlane_b32 s18, v21, 34
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -79283,24 +79330,24 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s60, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s61, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 29
+; SI-NEXT: v_readlane_b32 s19, v21, 35
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s58, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 30
+; SI-NEXT: v_readlane_b32 s18, v21, 36
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 31
+; SI-NEXT: v_readlane_b32 s19, v21, 37
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 32
+; SI-NEXT: v_readlane_b32 s18, v21, 38
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 33
+; SI-NEXT: v_readlane_b32 s19, v21, 39
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 34
+; SI-NEXT: v_readlane_b32 s18, v21, 40
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -79321,16 +79368,16 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_readlane_b32 s16, v21, 36
+; SI-NEXT: v_readlane_b32 s16, v21, 42
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v21, 37
+; SI-NEXT: v_readlane_b32 s17, v21, 43
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v21, 35
+; SI-NEXT: v_readlane_b32 s19, v21, 41
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v21, 38
-; SI-NEXT: v_readlane_b32 s17, v21, 39
+; SI-NEXT: v_readlane_b32 s16, v21, 44
+; SI-NEXT: v_readlane_b32 s17, v21, 45
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 40
+; SI-NEXT: v_readlane_b32 s18, v21, 46
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
@@ -79351,15 +79398,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: v_readlane_b32 s14, v21, 42
+; SI-NEXT: v_readlane_b32 s14, v21, 48
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v21, 43
+; SI-NEXT: v_readlane_b32 s15, v21, 49
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v21, 44
-; SI-NEXT: v_readlane_b32 s15, v21, 45
+; SI-NEXT: v_readlane_b32 s14, v21, 50
+; SI-NEXT: v_readlane_b32 s15, v21, 51
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v21, 46
+; SI-NEXT: v_readlane_b32 s16, v21, 52
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -79380,15 +79427,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: v_readlane_b32 s12, v21, 48
+; SI-NEXT: v_readlane_b32 s12, v21, 54
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v21, 49
+; SI-NEXT: v_readlane_b32 s13, v21, 55
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v21, 50
-; SI-NEXT: v_readlane_b32 s13, v21, 51
+; SI-NEXT: v_readlane_b32 s12, v21, 56
+; SI-NEXT: v_readlane_b32 s13, v21, 57
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v21, 52
+; SI-NEXT: v_readlane_b32 s14, v21, 58
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
@@ -79409,15 +79456,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
-; SI-NEXT: v_readlane_b32 s10, v21, 54
+; SI-NEXT: v_readlane_b32 s10, v21, 60
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v21, 55
+; SI-NEXT: v_readlane_b32 s11, v21, 61
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v21, 56
-; SI-NEXT: v_readlane_b32 s11, v21, 57
+; SI-NEXT: v_readlane_b32 s10, v21, 62
+; SI-NEXT: v_readlane_b32 s11, v21, 63
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v21, 58
+; SI-NEXT: v_readlane_b32 s12, v22, 0
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
@@ -79438,15 +79485,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
-; SI-NEXT: v_readlane_b32 s8, v21, 60
+; SI-NEXT: v_readlane_b32 s8, v22, 2
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s9, v21, 61
+; SI-NEXT: v_readlane_b32 s9, v22, 3
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: v_readlane_b32 s8, v21, 62
-; SI-NEXT: v_readlane_b32 s9, v21, 63
+; SI-NEXT: v_readlane_b32 s8, v22, 4
+; SI-NEXT: v_readlane_b32 s9, v22, 5
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v22, 0
+; SI-NEXT: v_readlane_b32 s10, v22, 6
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
@@ -79467,17 +79514,12 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 2
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s7, v22, 3
-; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_lshl_b32 s6, s74, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 4
-; SI-NEXT: v_readlane_b32 s7, v22, 5
-; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 6
+; SI-NEXT: s_and_b32 s6, s72, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s8, 24
+; SI-NEXT: s_lshl_b32 s7, s62, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_or_b32 s4, s4, s6
@@ -79497,12 +79539,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s19, v21, 41
-; SI-NEXT: v_readlane_b32 s17, v21, 47
-; SI-NEXT: v_readlane_b32 s15, v21, 53
-; SI-NEXT: v_readlane_b32 s13, v21, 59
-; SI-NEXT: v_readlane_b32 s11, v22, 1
-; SI-NEXT: v_readlane_b32 s9, v22, 7
+; SI-NEXT: v_readlane_b32 s19, v21, 47
+; SI-NEXT: v_readlane_b32 s17, v21, 53
+; SI-NEXT: v_readlane_b32 s15, v21, 59
+; SI-NEXT: v_readlane_b32 s13, v22, 1
+; SI-NEXT: v_readlane_b32 s11, v22, 7
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
@@ -79612,184 +79653,181 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB57_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: v_writelane_b32 v34, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: v_writelane_b32 v34, s46, 4
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 7
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 9
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: v_writelane_b32 v34, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: v_writelane_b32 v34, s46, 12
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 14
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: v_writelane_b32 v34, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 17
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: v_writelane_b32 v34, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: v_writelane_b32 v34, s46, 19
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: v_writelane_b32 v34, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: v_writelane_b32 v34, s46, 22
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: v_writelane_b32 v34, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: v_writelane_b32 v34, s46, 24
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: v_writelane_b32 v34, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: v_writelane_b32 v34, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: v_writelane_b32 v34, s46, 27
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: v_writelane_b32 v34, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: v_writelane_b32 v34, s46, 29
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: v_writelane_b32 v34, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: v_writelane_b32 v34, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: v_writelane_b32 v34, s46, 32
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: v_writelane_b32 v34, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: v_writelane_b32 v34, s46, 34
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v34, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: v_writelane_b32 v34, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: v_writelane_b32 v34, s46, 37
; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s29, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s28, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: v_writelane_b32 v33, s46, 54
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s27, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: v_writelane_b32 v33, s46, 56
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 59
+; VI-NEXT: v_writelane_b32 v33, s46, 57
; VI-NEXT: s_lshr_b32 s46, s24, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 60
+; VI-NEXT: v_writelane_b32 v33, s46, 58
; VI-NEXT: s_lshr_b32 s46, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s23, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 61
+; VI-NEXT: v_writelane_b32 v33, s46, 59
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 62
+; VI-NEXT: v_writelane_b32 v33, s46, 60
; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s21, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 63
+; VI-NEXT: v_writelane_b32 v33, s46, 61
; VI-NEXT: s_lshr_b32 s46, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s20, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: v_writelane_b32 v33, s46, 62
; VI-NEXT: s_lshr_b32 s46, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s19, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 1
+; VI-NEXT: v_writelane_b32 v33, s46, 63
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: v_writelane_b32 v34, s46, 0
; VI-NEXT: s_lshr_b32 s46, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 1
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 55
+; VI-NEXT: v_writelane_b32 v33, s46, 53
; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: v_writelane_b32 v34, s46, 2
; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
-; VI-NEXT: v_writelane_b32 v33, s47, 23
-; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: v_writelane_b32 v33, s47, 21
-; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: v_writelane_b32 v33, s47, 19
-; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: v_writelane_b32 v33, s47, 17
-; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: v_writelane_b32 v33, s47, 15
-; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: v_writelane_b32 v33, s47, 13
-; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: v_writelane_b32 v33, s47, 11
; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
@@ -79798,19 +79836,20 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: v_writelane_b32 v33, s47, 7
-; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[22:23], 24
; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: v_writelane_b32 v33, s47, 5
-; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: v_writelane_b32 v33, s47, 3
-; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
-; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
; VI-NEXT: v_writelane_b32 v33, s47, 1
+; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
; VI-NEXT: s_mov_b64 s[48:49], 0
; VI-NEXT: s_branch .LBB57_3
; VI-NEXT: .LBB57_2:
@@ -79819,9 +79858,10 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr88
; VI-NEXT: ; implicit-def: $sgpr76
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
@@ -80012,60 +80052,57 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: v_writelane_b32 v33, s47, 21
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: v_writelane_b32 v33, s46, 22
-; VI-NEXT: v_writelane_b32 v33, s47, 23
; VI-NEXT: .LBB57_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[48:49], exec
; VI-NEXT: s_cselect_b32 s46, 1, 0
; VI-NEXT: s_cmp_lg_u32 s46, 1
-; VI-NEXT: v_readlane_b32 s75, v33, 24
-; VI-NEXT: v_readlane_b32 s34, v33, 25
-; VI-NEXT: v_readlane_b32 s35, v33, 26
-; VI-NEXT: v_readlane_b32 s39, v33, 27
-; VI-NEXT: v_readlane_b32 s49, v33, 28
-; VI-NEXT: v_readlane_b32 s51, v33, 29
-; VI-NEXT: v_readlane_b32 s47, v33, 30
-; VI-NEXT: v_readlane_b32 s53, v33, 31
-; VI-NEXT: v_readlane_b32 s59, v33, 32
-; VI-NEXT: v_readlane_b32 s56, v33, 33
-; VI-NEXT: v_readlane_b32 s38, v33, 34
-; VI-NEXT: v_readlane_b32 s84, v33, 35
-; VI-NEXT: v_readlane_b32 s48, v33, 36
-; VI-NEXT: v_readlane_b32 s50, v33, 37
-; VI-NEXT: v_readlane_b32 s52, v33, 38
-; VI-NEXT: v_readlane_b32 s54, v33, 39
-; VI-NEXT: v_readlane_b32 s55, v33, 40
-; VI-NEXT: v_readlane_b32 s64, v33, 41
-; VI-NEXT: v_readlane_b32 s65, v33, 42
-; VI-NEXT: v_readlane_b32 s66, v33, 43
-; VI-NEXT: v_readlane_b32 s67, v33, 44
-; VI-NEXT: v_readlane_b32 s68, v33, 45
-; VI-NEXT: v_readlane_b32 s46, v33, 46
-; VI-NEXT: v_readlane_b32 s69, v33, 47
-; VI-NEXT: v_readlane_b32 s80, v33, 48
-; VI-NEXT: v_readlane_b32 s81, v33, 49
-; VI-NEXT: v_readlane_b32 s82, v33, 50
-; VI-NEXT: v_readlane_b32 s83, v33, 51
-; VI-NEXT: v_readlane_b32 s85, v33, 52
-; VI-NEXT: v_readlane_b32 s86, v33, 53
-; VI-NEXT: v_readlane_b32 s88, v33, 54
-; VI-NEXT: v_readlane_b32 s87, v33, 55
-; VI-NEXT: v_readlane_b32 s58, v33, 56
-; VI-NEXT: v_readlane_b32 s89, v33, 57
-; VI-NEXT: v_readlane_b32 s90, v33, 58
-; VI-NEXT: v_readlane_b32 s91, v33, 59
-; VI-NEXT: v_readlane_b32 s57, v33, 60
-; VI-NEXT: v_readlane_b32 s60, v33, 61
-; VI-NEXT: v_readlane_b32 s61, v33, 62
-; VI-NEXT: v_readlane_b32 vcc_lo, v33, 63
-; VI-NEXT: v_readlane_b32 s62, v34, 0
-; VI-NEXT: v_readlane_b32 s63, v34, 1
-; VI-NEXT: v_readlane_b32 vcc_hi, v34, 2
-; VI-NEXT: v_readlane_b32 s30, v34, 3
-; VI-NEXT: v_readlane_b32 s31, v34, 4
-; VI-NEXT: v_readlane_b32 s70, v33, 8
-; VI-NEXT: v_readlane_b32 s71, v33, 9
+; VI-NEXT: v_readlane_b32 s48, v33, 22
+; VI-NEXT: v_readlane_b32 s49, v33, 23
+; VI-NEXT: v_readlane_b32 s73, v33, 24
+; VI-NEXT: v_readlane_b32 s47, v33, 25
+; VI-NEXT: v_readlane_b32 s51, v33, 26
+; VI-NEXT: v_readlane_b32 s54, v33, 27
+; VI-NEXT: v_readlane_b32 s52, v33, 28
+; VI-NEXT: v_readlane_b32 s64, v33, 29
+; VI-NEXT: v_readlane_b32 s59, v33, 30
+; VI-NEXT: v_readlane_b32 s86, v33, 31
+; VI-NEXT: v_readlane_b32 s37, v33, 32
+; VI-NEXT: v_readlane_b32 s75, v33, 33
+; VI-NEXT: v_readlane_b32 s50, v33, 34
+; VI-NEXT: v_readlane_b32 s53, v33, 35
+; VI-NEXT: v_readlane_b32 s55, v33, 36
+; VI-NEXT: v_readlane_b32 s65, v33, 37
+; VI-NEXT: v_readlane_b32 s66, v33, 38
+; VI-NEXT: v_readlane_b32 s67, v33, 39
+; VI-NEXT: v_readlane_b32 s68, v33, 40
+; VI-NEXT: v_readlane_b32 s46, v33, 41
+; VI-NEXT: v_readlane_b32 s69, v33, 42
+; VI-NEXT: v_readlane_b32 s80, v33, 43
+; VI-NEXT: v_readlane_b32 s81, v33, 44
+; VI-NEXT: v_readlane_b32 s82, v33, 45
+; VI-NEXT: v_readlane_b32 s83, v33, 46
+; VI-NEXT: v_readlane_b32 s56, v33, 47
+; VI-NEXT: v_readlane_b32 s84, v33, 48
+; VI-NEXT: v_readlane_b32 s85, v33, 49
+; VI-NEXT: v_readlane_b32 s87, v33, 50
+; VI-NEXT: v_readlane_b32 s90, v33, 51
+; VI-NEXT: v_readlane_b32 s91, v33, 52
+; VI-NEXT: v_readlane_b32 s58, v33, 53
+; VI-NEXT: v_readlane_b32 vcc_lo, v33, 54
+; VI-NEXT: v_readlane_b32 vcc_hi, v33, 55
+; VI-NEXT: v_readlane_b32 s57, v33, 56
+; VI-NEXT: v_readlane_b32 s60, v33, 57
+; VI-NEXT: v_readlane_b32 s61, v33, 58
+; VI-NEXT: v_readlane_b32 s30, v33, 59
+; VI-NEXT: v_readlane_b32 s62, v33, 60
+; VI-NEXT: v_readlane_b32 s63, v33, 61
+; VI-NEXT: v_readlane_b32 s31, v33, 62
+; VI-NEXT: v_readlane_b32 s34, v33, 63
+; VI-NEXT: v_readlane_b32 s35, v34, 0
+; VI-NEXT: v_readlane_b32 s36, v34, 1
+; VI-NEXT: v_readlane_b32 s72, v34, 2
+; VI-NEXT: v_readlane_b32 s70, v33, 6
+; VI-NEXT: v_readlane_b32 s71, v33, 7
; VI-NEXT: s_cbranch_scc1 .LBB57_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s16, s16, 3
@@ -80100,443 +80137,439 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_addc_u32 s7, s7, 0
; VI-NEXT: s_add_u32 s4, s4, 3
; VI-NEXT: s_addc_u32 s5, s5, 0
-; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: v_writelane_b32 v34, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: v_writelane_b32 v34, s46, 4
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 7
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 9
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: v_writelane_b32 v34, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: v_writelane_b32 v34, s46, 12
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 14
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: v_writelane_b32 v34, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 22
-; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 17
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s73, 23
-; VI-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 20
-; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s74, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 19
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s73, 21
-; VI-NEXT: s_lshr_b64 s[72:73], s[8:9], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s75, 21
+; VI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s72, 18
-; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s74, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v33, s73, 19
-; VI-NEXT: s_lshr_b64 s[72:73], s[10:11], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s75, 19
+; VI-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 22
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s72, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s74, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s73, 17
-; VI-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s75, 17
+; VI-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 24
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s72, 14
-; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s74, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s73, 15
-; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s75, 15
+; VI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 12
-; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s74, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 27
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s73, 13
-; VI-NEXT: s_lshr_b64 s[70:71], s[28:29], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s75, 13
+; VI-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s70, 10
-; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s74, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 29
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s71, 11
-; VI-NEXT: s_lshr_b64 s[36:37], s[24:25], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s75, 11
+; VI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s36, 6
-; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s70, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v33, s37, 7
-; VI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s71, 9
+; VI-NEXT: s_lshr_b64 s[38:39], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 32
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s72, 4
-; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s38, 4
+; VI-NEXT: v_writelane_b32 v34, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v33, s73, 5
-; VI-NEXT: s_lshr_b64 s[72:73], s[18:19], 24
-; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s39, 5
+; VI-NEXT: s_lshr_b64 s[38:39], s[20:21], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v33, s38, 2
+; VI-NEXT: v_writelane_b32 v34, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v33, s72, 2
-; VI-NEXT: s_lshr_b32 s76, s5, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s39, 3
+; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: s_lshr_b32 s76, s29, 16
; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; VI-NEXT: v_writelane_b32 v33, s73, 3
-; VI-NEXT: s_lshr_b64 s[72:73], s[16:17], 24
-; VI-NEXT: s_lshr_b32 s34, s40, 8
-; VI-NEXT: s_lshr_b32 s35, s43, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 39
-; VI-NEXT: s_lshr_b32 s39, s42, 16
-; VI-NEXT: s_lshr_b32 s49, s42, 8
-; VI-NEXT: s_lshr_b32 s51, s45, 24
-; VI-NEXT: s_lshr_b32 s47, s45, 16
-; VI-NEXT: s_lshr_b32 s53, s45, 8
+; VI-NEXT: v_writelane_b32 v33, s38, 0
+; VI-NEXT: s_lshr_b32 s48, s5, 24
+; VI-NEXT: s_lshr_b32 s49, s5, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s47, s42, 16
+; VI-NEXT: s_lshr_b32 s51, s42, 8
+; VI-NEXT: s_lshr_b32 s54, s45, 24
+; VI-NEXT: s_lshr_b32 s52, s45, 16
+; VI-NEXT: s_lshr_b32 s64, s45, 8
; VI-NEXT: s_lshr_b32 s59, s44, 16
-; VI-NEXT: s_lshr_b32 s56, s44, 8
-; VI-NEXT: s_lshr_b32 s38, s29, 24
-; VI-NEXT: s_lshr_b32 s84, s29, 16
-; VI-NEXT: s_lshr_b32 s88, s29, 8
-; VI-NEXT: s_lshr_b32 s48, s28, 16
-; VI-NEXT: s_lshr_b32 s58, s28, 8
-; VI-NEXT: s_lshr_b32 s50, s27, 24
-; VI-NEXT: s_lshr_b32 s52, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s27, 8
-; VI-NEXT: s_lshr_b32 s54, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s26, 8
-; VI-NEXT: s_lshr_b32 s55, s25, 24
-; VI-NEXT: s_lshr_b32 s64, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s25, 8
-; VI-NEXT: s_lshr_b32 s65, s24, 16
-; VI-NEXT: s_lshr_b32 s57, s24, 8
-; VI-NEXT: s_lshr_b32 s66, s23, 24
-; VI-NEXT: s_lshr_b32 s67, s23, 16
-; VI-NEXT: s_lshr_b32 s60, s23, 8
-; VI-NEXT: s_lshr_b32 s68, s22, 16
-; VI-NEXT: s_lshr_b32 s61, s22, 8
-; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: s_lshr_b32 s69, s21, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s21, 8
-; VI-NEXT: s_lshr_b32 s80, s20, 16
-; VI-NEXT: s_lshr_b32 s62, s20, 8
-; VI-NEXT: s_lshr_b32 s81, s19, 24
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s63, s19, 8
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 8
-; VI-NEXT: s_lshr_b32 s85, s17, 24
-; VI-NEXT: s_lshr_b32 s86, s17, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 8
-; VI-NEXT: s_lshr_b32 s87, s16, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 8
+; VI-NEXT: s_lshr_b32 s86, s44, 8
+; VI-NEXT: s_lshr_b32 s37, s29, 24
+; VI-NEXT: s_lshr_b32 s91, s29, 8
+; VI-NEXT: s_lshr_b32 s50, s28, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s28, 8
+; VI-NEXT: s_lshr_b32 s53, s27, 24
+; VI-NEXT: s_lshr_b32 s55, s27, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s27, 8
+; VI-NEXT: s_lshr_b32 s65, s26, 16
+; VI-NEXT: s_lshr_b32 s57, s26, 8
+; VI-NEXT: s_lshr_b32 s66, s25, 24
+; VI-NEXT: s_lshr_b32 s67, s25, 16
+; VI-NEXT: s_lshr_b32 s60, s25, 8
+; VI-NEXT: s_lshr_b32 s68, s24, 16
+; VI-NEXT: s_lshr_b32 s61, s24, 8
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: s_lshr_b32 s69, s23, 16
+; VI-NEXT: s_lshr_b32 s30, s23, 8
+; VI-NEXT: s_lshr_b32 s80, s22, 16
+; VI-NEXT: s_lshr_b32 s62, s22, 8
+; VI-NEXT: s_lshr_b32 s81, s21, 24
+; VI-NEXT: s_lshr_b32 s82, s21, 16
+; VI-NEXT: s_lshr_b32 s63, s21, 8
+; VI-NEXT: s_lshr_b32 s83, s20, 16
+; VI-NEXT: s_lshr_b32 s31, s20, 8
+; VI-NEXT: s_lshr_b32 s56, s19, 24
+; VI-NEXT: s_lshr_b32 s84, s19, 16
+; VI-NEXT: s_lshr_b32 s34, s19, 8
+; VI-NEXT: s_lshr_b32 s85, s18, 16
+; VI-NEXT: s_lshr_b32 s35, s18, 8
+; VI-NEXT: s_lshr_b32 s87, s17, 24
+; VI-NEXT: s_lshr_b32 s90, s17, 16
+; VI-NEXT: s_lshr_b32 s36, s17, 8
+; VI-NEXT: s_lshr_b32 s58, s16, 16
+; VI-NEXT: s_lshr_b32 s72, s16, 8
; VI-NEXT: s_mov_b32 s75, s76
-; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
-; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
-; VI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
-; VI-NEXT: v_writelane_b32 v33, s72, 0
-; VI-NEXT: v_writelane_b32 v33, s73, 1
+; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[70:71], s[24:25], 24
+; VI-NEXT: v_writelane_b32 v33, s39, 1
+; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
; VI-NEXT: .LBB57_5: ; %end
-; VI-NEXT: v_readlane_b32 s72, v33, 0
-; VI-NEXT: v_mov_b32_e32 v6, s72
+; VI-NEXT: v_mov_b32_e32 v6, s38
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v2, s31
-; VI-NEXT: v_perm_b32 v6, s87, v6, v1
-; VI-NEXT: v_mov_b32_e32 v4, s30
+; VI-NEXT: v_mov_b32_e32 v2, s72
+; VI-NEXT: v_perm_b32 v6, s58, v6, v1
+; VI-NEXT: v_mov_b32_e32 v4, s36
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
-; VI-NEXT: v_mov_b32_e32 v24, s85
+; VI-NEXT: v_mov_b32_e32 v24, s87
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 2
-; VI-NEXT: v_perm_b32 v24, s86, v24, v1
+; VI-NEXT: v_readlane_b32 s16, v33, 0
+; VI-NEXT: v_perm_b32 v24, s90, v24, v1
; VI-NEXT: v_or_b32_e32 v3, v3, v6
; VI-NEXT: v_mov_b32_e32 v9, s16
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_mov_b32_e32 v4, vcc_hi
-; VI-NEXT: v_perm_b32 v9, s83, v9, v1
+; VI-NEXT: v_mov_b32_e32 v4, s35
+; VI-NEXT: v_perm_b32 v9, s85, v9, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 3
+; VI-NEXT: v_readlane_b32 s17, v33, 1
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
-; VI-NEXT: v_mov_b32_e32 v25, s81
+; VI-NEXT: v_mov_b32_e32 v25, s56
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
-; VI-NEXT: v_mov_b32_e32 v7, s63
-; VI-NEXT: v_readlane_b32 s16, v33, 4
-; VI-NEXT: v_perm_b32 v25, s82, v25, v1
+; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_readlane_b32 s16, v33, 2
+; VI-NEXT: v_perm_b32 v25, s84, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
; VI-NEXT: v_perm_b32 v4, s19, v7, v1
; VI-NEXT: v_mov_b32_e32 v14, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; VI-NEXT: v_mov_b32_e32 v7, s62
-; VI-NEXT: v_perm_b32 v14, s80, v14, v1
+; VI-NEXT: v_mov_b32_e32 v7, s31
+; VI-NEXT: v_perm_b32 v14, s83, v14, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 3
; VI-NEXT: v_perm_b32 v8, s20, v7, v1
-; VI-NEXT: v_mov_b32_e32 v26, s46
+; VI-NEXT: v_mov_b32_e32 v26, s81
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
-; VI-NEXT: v_mov_b32_e32 v10, vcc_lo
-; VI-NEXT: v_perm_b32 v26, s69, v26, v1
+; VI-NEXT: v_mov_b32_e32 v10, s63
+; VI-NEXT: v_readlane_b32 s16, v33, 4
+; VI-NEXT: v_perm_b32 v26, s82, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v8, v2
; VI-NEXT: v_perm_b32 v7, s21, v10, v1
-; VI-NEXT: v_mov_b32_e32 v17, s36
+; VI-NEXT: v_mov_b32_e32 v17, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_mov_b32_e32 v10, s61
-; VI-NEXT: v_perm_b32 v17, s68, v17, v1
+; VI-NEXT: v_mov_b32_e32 v10, s62
+; VI-NEXT: v_perm_b32 v17, s80, v17, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 5
; VI-NEXT: v_perm_b32 v11, s22, v10, v1
-; VI-NEXT: v_mov_b32_e32 v27, s66
+; VI-NEXT: v_mov_b32_e32 v27, s46
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; VI-NEXT: v_mov_b32_e32 v12, s60
-; VI-NEXT: v_readlane_b32 s16, v33, 6
-; VI-NEXT: v_perm_b32 v27, s67, v27, v1
+; VI-NEXT: v_mov_b32_e32 v12, s30
+; VI-NEXT: v_perm_b32 v27, s69, v27, v1
; VI-NEXT: v_or_b32_e32 v2, v11, v2
; VI-NEXT: v_perm_b32 v10, s23, v12, v1
-; VI-NEXT: v_mov_b32_e32 v20, s16
+; VI-NEXT: v_mov_b32_e32 v20, s70
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; VI-NEXT: v_mov_b32_e32 v12, s57
-; VI-NEXT: v_perm_b32 v20, s65, v20, v1
+; VI-NEXT: v_mov_b32_e32 v12, s61
+; VI-NEXT: v_perm_b32 v20, s68, v20, v1
; VI-NEXT: v_or_b32_e32 v2, v10, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 5
; VI-NEXT: v_perm_b32 v13, s24, v12, v1
-; VI-NEXT: v_mov_b32_e32 v28, s55
+; VI-NEXT: v_mov_b32_e32 v28, s66
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_mov_b32_e32 v15, s91
-; VI-NEXT: v_perm_b32 v28, s64, v28, v1
+; VI-NEXT: v_mov_b32_e32 v15, s60
+; VI-NEXT: v_readlane_b32 s16, v33, 8
+; VI-NEXT: v_perm_b32 v28, s67, v28, v1
; VI-NEXT: v_or_b32_e32 v2, v13, v2
; VI-NEXT: v_perm_b32 v12, s25, v15, v1
-; VI-NEXT: v_mov_b32_e32 v21, s70
+; VI-NEXT: v_mov_b32_e32 v21, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
-; VI-NEXT: v_mov_b32_e32 v15, s90
-; VI-NEXT: v_perm_b32 v21, s54, v21, v1
+; VI-NEXT: v_mov_b32_e32 v15, s57
+; VI-NEXT: v_perm_b32 v21, s65, v21, v1
; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 7
; VI-NEXT: v_perm_b32 v16, s26, v15, v1
-; VI-NEXT: v_mov_b32_e32 v29, s50
+; VI-NEXT: v_mov_b32_e32 v29, s53
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_mov_b32_e32 v18, s89
-; VI-NEXT: v_readlane_b32 s16, v33, 10
-; VI-NEXT: v_perm_b32 v29, s52, v29, v1
+; VI-NEXT: v_mov_b32_e32 v18, vcc_hi
+; VI-NEXT: v_perm_b32 v29, s55, v29, v1
; VI-NEXT: v_or_b32_e32 v2, v16, v2
; VI-NEXT: v_perm_b32 v15, s27, v18, v1
-; VI-NEXT: v_mov_b32_e32 v22, s16
+; VI-NEXT: v_mov_b32_e32 v22, s88
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_mov_b32_e32 v18, s58
-; VI-NEXT: v_perm_b32 v22, s48, v22, v1
+; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
+; VI-NEXT: v_perm_b32 v22, s50, v22, v1
; VI-NEXT: v_or_b32_e32 v2, v15, v2
; VI-NEXT: v_perm_b32 v19, s28, v18, v1
-; VI-NEXT: v_mov_b32_e32 v30, s38
+; VI-NEXT: v_mov_b32_e32 v30, s37
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_mov_b32_e32 v23, s88
-; VI-NEXT: v_perm_b32 v30, s84, v30, v1
+; VI-NEXT: v_mov_b32_e32 v23, s91
+; VI-NEXT: v_perm_b32 v30, s75, v30, v1
; VI-NEXT: v_or_b32_e32 v2, v19, v2
; VI-NEXT: v_perm_b32 v18, s29, v23, v1
-; VI-NEXT: v_mov_b32_e32 v23, s78
+; VI-NEXT: v_mov_b32_e32 v23, s76
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; VI-NEXT: v_mov_b32_e32 v31, s56
+; VI-NEXT: v_mov_b32_e32 v31, s86
; VI-NEXT: v_perm_b32 v23, s59, v23, v1
; VI-NEXT: v_or_b32_e32 v2, v18, v2
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s51
+; VI-NEXT: v_mov_b32_e32 v3, s54
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: v_mov_b32_e32 v2, s53
-; VI-NEXT: v_perm_b32 v3, s47, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s64
+; VI-NEXT: v_perm_b32 v3, s52, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s76
+; VI-NEXT: v_mov_b32_e32 v3, s78
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_mov_b32_e32 v2, s49
-; VI-NEXT: v_perm_b32 v3, s39, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s51
+; VI-NEXT: v_perm_b32 v3, s47, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 39
+; VI-NEXT: v_readlane_b32 s16, v34, 37
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s35
-; VI-NEXT: v_readlane_b32 s16, v34, 38
+; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 36
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s74
-; VI-NEXT: v_readlane_b32 s16, v34, 37
+; VI-NEXT: v_readlane_b32 s16, v34, 34
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_mov_b32_e32 v2, s34
+; VI-NEXT: v_mov_b32_e32 v2, s73
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 36
+; VI-NEXT: v_readlane_b32 s16, v34, 33
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v34, 34
+; VI-NEXT: v_readlane_b32 s16, v34, 31
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_readlane_b32 s16, v34, 32
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 11
+; VI-NEXT: v_readlane_b32 s17, v33, 9
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 33
+; VI-NEXT: v_readlane_b32 s16, v34, 30
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 12
+; VI-NEXT: v_readlane_b32 s16, v33, 10
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s14, v34, 32
+; VI-NEXT: v_readlane_b32 s14, v34, 29
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v34, 31
+; VI-NEXT: v_readlane_b32 s14, v34, 28
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v34, 29
+; VI-NEXT: v_readlane_b32 s14, v34, 26
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v34, 30
+; VI-NEXT: v_readlane_b32 s14, v34, 27
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v34, 28
+; VI-NEXT: v_readlane_b32 s14, v34, 25
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 14
+; VI-NEXT: v_readlane_b32 s14, v33, 12
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s12, v34, 27
+; VI-NEXT: v_readlane_b32 s12, v34, 24
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v34, 26
+; VI-NEXT: v_readlane_b32 s12, v34, 23
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v34, 24
+; VI-NEXT: v_readlane_b32 s12, v34, 21
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v34, 25
+; VI-NEXT: v_readlane_b32 s12, v34, 22
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v34, 23
+; VI-NEXT: v_readlane_b32 s12, v34, 20
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 16
+; VI-NEXT: v_readlane_b32 s12, v33, 14
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s10, v34, 22
+; VI-NEXT: v_readlane_b32 s10, v34, 19
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s10, v34, 21
+; VI-NEXT: v_readlane_b32 s10, v34, 18
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; VI-NEXT: v_mov_b32_e32 v2, s10
-; VI-NEXT: v_readlane_b32 s10, v34, 19
+; VI-NEXT: v_readlane_b32 s10, v34, 16
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s10, v34, 20
+; VI-NEXT: v_readlane_b32 s10, v34, 17
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s10, v34, 18
+; VI-NEXT: v_readlane_b32 s10, v34, 15
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; VI-NEXT: v_mov_b32_e32 v2, s10
-; VI-NEXT: v_readlane_b32 s10, v33, 18
+; VI-NEXT: v_readlane_b32 s10, v33, 16
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s8, v34, 17
+; VI-NEXT: v_readlane_b32 s8, v34, 14
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s8, v34, 16
+; VI-NEXT: v_readlane_b32 s8, v34, 13
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v34, 14
+; VI-NEXT: v_readlane_b32 s8, v34, 11
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s8, v34, 15
+; VI-NEXT: v_readlane_b32 s8, v34, 12
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s8, v34, 13
+; VI-NEXT: v_readlane_b32 s8, v34, 10
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 20
+; VI-NEXT: v_readlane_b32 s8, v33, 18
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s6, v34, 12
+; VI-NEXT: v_readlane_b32 s6, v34, 9
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s6, v34, 11
+; VI-NEXT: v_readlane_b32 s6, v34, 8
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v34, 9
+; VI-NEXT: v_readlane_b32 s6, v34, 6
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s6, v34, 10
+; VI-NEXT: v_readlane_b32 s6, v34, 7
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s6, v34, 8
+; VI-NEXT: v_readlane_b32 s6, v34, 5
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 22
+; VI-NEXT: v_readlane_b32 s6, v33, 20
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s4, v34, 7
+; VI-NEXT: v_readlane_b32 s4, v34, 4
; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s4, v34, 6
+; VI-NEXT: v_readlane_b32 s4, v34, 3
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; VI-NEXT: v_mov_b32_e32 v2, s4
-; VI-NEXT: v_readlane_b32 s4, v34, 5
-; VI-NEXT: v_mov_b32_e32 v3, s4
+; VI-NEXT: v_mov_b32_e32 v3, s48
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
-; VI-NEXT: v_perm_b32 v1, s75, v3, v1
+; VI-NEXT: v_perm_b32 v1, s49, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s73, v33, 1
-; VI-NEXT: v_readlane_b32 s17, v33, 13
-; VI-NEXT: v_readlane_b32 s15, v33, 15
-; VI-NEXT: v_readlane_b32 s13, v33, 17
-; VI-NEXT: v_readlane_b32 s11, v33, 19
-; VI-NEXT: v_readlane_b32 s9, v33, 21
-; VI-NEXT: v_readlane_b32 s7, v33, 23
+; VI-NEXT: v_readlane_b32 s17, v33, 11
+; VI-NEXT: v_readlane_b32 s15, v33, 13
+; VI-NEXT: v_readlane_b32 s13, v33, 15
+; VI-NEXT: v_readlane_b32 s11, v33, 17
+; VI-NEXT: v_readlane_b32 s9, v33, 19
+; VI-NEXT: v_readlane_b32 s7, v33, 21
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
@@ -80646,181 +80679,178 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_cbranch_scc0 .LBB57_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 20
+; GFX9-NEXT: v_writelane_b32 v30, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s5, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 21
+; GFX9-NEXT: v_writelane_b32 v30, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
; GFX9-NEXT: s_lshr_b32 s46, s4, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
; GFX9-NEXT: s_lshr_b32 s46, s7, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 11
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
; GFX9-NEXT: s_lshr_b32 s46, s7, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
; GFX9-NEXT: s_lshr_b32 s46, s7, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
; GFX9-NEXT: s_lshr_b32 s46, s6, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s9, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s9, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
; GFX9-NEXT: s_lshr_b32 s46, s8, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s8, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s11, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s11, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s11, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s10, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s10, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s13, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s13, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s13, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s12, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s12, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s15, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s15, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s15, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s14, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 34
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s14, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 35
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s41, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 22
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
; GFX9-NEXT: s_lshr_b32 s46, s41, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 23
+; GFX9-NEXT: v_writelane_b32 v30, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s41, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s40, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 25
+; GFX9-NEXT: v_writelane_b32 v30, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s40, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 26
+; GFX9-NEXT: v_writelane_b32 v30, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s43, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 27
+; GFX9-NEXT: v_writelane_b32 v30, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s43, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 28
+; GFX9-NEXT: v_writelane_b32 v30, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s43, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 29
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s42, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 30
+; GFX9-NEXT: v_writelane_b32 v30, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s42, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 31
+; GFX9-NEXT: v_writelane_b32 v30, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s45, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 32
+; GFX9-NEXT: v_writelane_b32 v30, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s45, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 33
+; GFX9-NEXT: v_writelane_b32 v30, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s45, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 34
+; GFX9-NEXT: v_writelane_b32 v30, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s44, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 35
+; GFX9-NEXT: v_writelane_b32 v30, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s44, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 36
+; GFX9-NEXT: v_writelane_b32 v30, s46, 32
; GFX9-NEXT: s_lshr_b32 s46, s29, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 37
+; GFX9-NEXT: v_writelane_b32 v30, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s29, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 38
+; GFX9-NEXT: v_writelane_b32 v30, s46, 34
; GFX9-NEXT: s_lshr_b32 s46, s29, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 39
+; GFX9-NEXT: v_writelane_b32 v30, s46, 35
; GFX9-NEXT: s_lshr_b32 s46, s28, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 40
+; GFX9-NEXT: v_writelane_b32 v30, s46, 36
; GFX9-NEXT: s_lshr_b32 s46, s28, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 41
+; GFX9-NEXT: v_writelane_b32 v30, s46, 37
; GFX9-NEXT: s_lshr_b32 s46, s27, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 42
+; GFX9-NEXT: v_writelane_b32 v30, s46, 38
; GFX9-NEXT: s_lshr_b32 s46, s27, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 43
+; GFX9-NEXT: v_writelane_b32 v30, s46, 39
; GFX9-NEXT: s_lshr_b32 s46, s27, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 59
+; GFX9-NEXT: v_writelane_b32 v30, s46, 55
; GFX9-NEXT: s_lshr_b32 s46, s26, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 44
+; GFX9-NEXT: v_writelane_b32 v30, s46, 40
; GFX9-NEXT: s_lshr_b32 s46, s26, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 61
+; GFX9-NEXT: v_writelane_b32 v30, s46, 57
; GFX9-NEXT: s_lshr_b32 s46, s25, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 45
+; GFX9-NEXT: v_writelane_b32 v30, s46, 41
; GFX9-NEXT: s_lshr_b32 s46, s25, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 42
; GFX9-NEXT: s_lshr_b32 s46, s25, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 62
+; GFX9-NEXT: v_writelane_b32 v30, s46, 58
; GFX9-NEXT: s_lshr_b32 s46, s24, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 47
+; GFX9-NEXT: v_writelane_b32 v30, s46, 43
; GFX9-NEXT: s_lshr_b32 s46, s24, 8
-; GFX9-NEXT: v_writelane_b32 v30, s46, 63
+; GFX9-NEXT: v_writelane_b32 v30, s46, 59
; GFX9-NEXT: s_lshr_b32 s46, s23, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 48
+; GFX9-NEXT: v_writelane_b32 v30, s46, 44
; GFX9-NEXT: s_lshr_b32 s46, s23, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 49
+; GFX9-NEXT: v_writelane_b32 v30, s46, 45
; GFX9-NEXT: s_lshr_b32 s46, s23, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 0
+; GFX9-NEXT: v_writelane_b32 v30, s46, 60
; GFX9-NEXT: s_lshr_b32 s46, s22, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 50
+; GFX9-NEXT: v_writelane_b32 v30, s46, 46
; GFX9-NEXT: s_lshr_b32 s46, s22, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 1
+; GFX9-NEXT: v_writelane_b32 v30, s46, 61
; GFX9-NEXT: s_lshr_b32 s46, s21, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 51
+; GFX9-NEXT: v_writelane_b32 v30, s46, 47
; GFX9-NEXT: s_lshr_b32 s46, s21, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 52
+; GFX9-NEXT: v_writelane_b32 v30, s46, 48
; GFX9-NEXT: s_lshr_b32 s46, s21, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 2
+; GFX9-NEXT: v_writelane_b32 v30, s46, 62
; GFX9-NEXT: s_lshr_b32 s46, s20, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 53
+; GFX9-NEXT: v_writelane_b32 v30, s46, 49
; GFX9-NEXT: s_lshr_b32 s46, s20, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 3
+; GFX9-NEXT: v_writelane_b32 v30, s46, 63
; GFX9-NEXT: s_lshr_b32 s46, s19, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 54
+; GFX9-NEXT: v_writelane_b32 v30, s46, 50
; GFX9-NEXT: s_lshr_b32 s46, s19, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 55
+; GFX9-NEXT: v_writelane_b32 v30, s46, 51
; GFX9-NEXT: s_lshr_b32 s46, s19, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 4
+; GFX9-NEXT: v_writelane_b32 v31, s46, 0
; GFX9-NEXT: s_lshr_b32 s46, s18, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 56
+; GFX9-NEXT: v_writelane_b32 v30, s46, 52
; GFX9-NEXT: s_lshr_b32 s46, s18, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 5
+; GFX9-NEXT: v_writelane_b32 v31, s46, 1
; GFX9-NEXT: s_lshr_b32 s46, s17, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 57
+; GFX9-NEXT: v_writelane_b32 v30, s46, 53
; GFX9-NEXT: s_lshr_b32 s46, s17, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 58
+; GFX9-NEXT: v_writelane_b32 v30, s46, 54
; GFX9-NEXT: s_lshr_b32 s46, s17, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 6
+; GFX9-NEXT: v_writelane_b32 v31, s46, 2
; GFX9-NEXT: s_lshr_b32 s46, s16, 16
-; GFX9-NEXT: v_writelane_b32 v30, s46, 60
+; GFX9-NEXT: v_writelane_b32 v30, s46, 56
; GFX9-NEXT: s_lshr_b32 s46, s16, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 7
+; GFX9-NEXT: v_writelane_b32 v31, s46, 3
; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 18
-; GFX9-NEXT: v_writelane_b32 v30, s47, 19
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 16
; GFX9-NEXT: v_writelane_b32 v30, s47, 17
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 14
; GFX9-NEXT: v_writelane_b32 v30, s47, 15
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 12
; GFX9-NEXT: v_writelane_b32 v30, s47, 13
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 10
; GFX9-NEXT: v_writelane_b32 v30, s47, 11
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 8
; GFX9-NEXT: v_writelane_b32 v30, s47, 9
; GFX9-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
@@ -80834,13 +80864,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: v_writelane_b32 v30, s47, 3
; GFX9-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
; GFX9-NEXT: v_writelane_b32 v30, s46, 0
-; GFX9-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[14:15], 24
; GFX9-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[44:45], 24
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
; GFX9-NEXT: v_writelane_b32 v30, s47, 1
-; GFX9-NEXT: s_lshr_b64 s[62:63], s[16:17], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX9-NEXT: s_mov_b64 s[36:37], 0
; GFX9-NEXT: s_branch .LBB57_3
; GFX9-NEXT: .LBB57_2:
@@ -80849,12 +80880,13 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr92
; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr72
+; GFX9-NEXT: ; implicit-def: $sgpr88
; GFX9-NEXT: ; implicit-def: $sgpr78
; GFX9-NEXT: ; implicit-def: $sgpr76
-; GFX9-NEXT: ; implicit-def: $sgpr74
+; GFX9-NEXT: ; implicit-def: $sgpr96
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
@@ -81038,67 +81070,62 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: v_writelane_b32 v30, s46, 16
; GFX9-NEXT: v_writelane_b32 v30, s47, 17
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s46, 18
-; GFX9-NEXT: v_writelane_b32 v30, s47, 19
; GFX9-NEXT: .LBB57_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[36:37], exec
; GFX9-NEXT: s_cselect_b32 s46, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s46, 1
-; GFX9-NEXT: v_readlane_b32 s75, v30, 20
-; GFX9-NEXT: v_readlane_b32 s73, v30, 21
-; GFX9-NEXT: v_readlane_b32 s97, v30, 22
-; GFX9-NEXT: v_readlane_b32 s96, v30, 23
-; GFX9-NEXT: v_readlane_b32 s98, v30, 24
-; GFX9-NEXT: v_readlane_b32 s99, v30, 25
-; GFX9-NEXT: v_readlane_b32 s88, v30, 26
-; GFX9-NEXT: v_readlane_b32 s90, v30, 27
-; GFX9-NEXT: v_readlane_b32 s89, v30, 28
-; GFX9-NEXT: v_readlane_b32 s91, v30, 29
-; GFX9-NEXT: v_readlane_b32 s92, v30, 30
-; GFX9-NEXT: v_readlane_b32 s93, v30, 31
-; GFX9-NEXT: v_readlane_b32 vcc_lo, v30, 32
-; GFX9-NEXT: v_readlane_b32 s95, v30, 33
-; GFX9-NEXT: v_readlane_b32 s30, v30, 34
-; GFX9-NEXT: v_readlane_b32 s31, v30, 35
-; GFX9-NEXT: v_readlane_b32 s35, v30, 36
-; GFX9-NEXT: v_readlane_b32 s47, v30, 37
-; GFX9-NEXT: v_readlane_b32 s37, v30, 38
-; GFX9-NEXT: v_readlane_b32 s94, v30, 39
-; GFX9-NEXT: v_readlane_b32 vcc_hi, v30, 40
-; GFX9-NEXT: v_readlane_b32 s59, v30, 41
-; GFX9-NEXT: v_readlane_b32 s34, v30, 42
-; GFX9-NEXT: v_readlane_b32 s69, v30, 43
-; GFX9-NEXT: v_readlane_b32 s36, v30, 44
-; GFX9-NEXT: v_readlane_b32 s38, v30, 45
-; GFX9-NEXT: v_readlane_b32 s39, v30, 46
-; GFX9-NEXT: v_readlane_b32 s48, v30, 47
-; GFX9-NEXT: v_readlane_b32 s49, v30, 48
-; GFX9-NEXT: v_readlane_b32 s50, v30, 49
-; GFX9-NEXT: v_readlane_b32 s51, v30, 50
-; GFX9-NEXT: v_readlane_b32 s52, v30, 51
-; GFX9-NEXT: v_readlane_b32 s53, v30, 52
-; GFX9-NEXT: v_readlane_b32 s54, v30, 53
-; GFX9-NEXT: v_readlane_b32 s55, v30, 54
-; GFX9-NEXT: v_readlane_b32 s64, v30, 55
-; GFX9-NEXT: v_readlane_b32 s65, v30, 56
-; GFX9-NEXT: v_readlane_b32 s46, v30, 57
-; GFX9-NEXT: v_readlane_b32 s68, v30, 58
-; GFX9-NEXT: v_readlane_b32 s71, v30, 59
-; GFX9-NEXT: v_readlane_b32 s70, v30, 60
-; GFX9-NEXT: v_readlane_b32 s56, v30, 61
-; GFX9-NEXT: v_readlane_b32 s80, v30, 62
-; GFX9-NEXT: v_readlane_b32 s81, v30, 63
-; GFX9-NEXT: v_readlane_b32 s82, v31, 0
-; GFX9-NEXT: v_readlane_b32 s83, v31, 1
-; GFX9-NEXT: v_readlane_b32 s84, v31, 2
-; GFX9-NEXT: v_readlane_b32 s58, v31, 3
-; GFX9-NEXT: v_readlane_b32 s85, v31, 4
-; GFX9-NEXT: v_readlane_b32 s86, v31, 5
-; GFX9-NEXT: v_readlane_b32 s87, v31, 6
-; GFX9-NEXT: v_readlane_b32 s57, v31, 7
-; GFX9-NEXT: v_readlane_b32 s66, v30, 6
-; GFX9-NEXT: v_readlane_b32 s67, v30, 7
+; GFX9-NEXT: v_readlane_b32 s63, v30, 18
+; GFX9-NEXT: v_readlane_b32 s73, v30, 19
+; GFX9-NEXT: v_readlane_b32 s74, v30, 20
+; GFX9-NEXT: v_readlane_b32 s98, v30, 21
+; GFX9-NEXT: v_readlane_b32 s99, v30, 22
+; GFX9-NEXT: v_readlane_b32 s90, v30, 23
+; GFX9-NEXT: v_readlane_b32 s75, v30, 24
+; GFX9-NEXT: v_readlane_b32 s91, v30, 25
+; GFX9-NEXT: v_readlane_b32 s94, v30, 26
+; GFX9-NEXT: v_readlane_b32 s95, v30, 27
+; GFX9-NEXT: v_readlane_b32 s30, v30, 28
+; GFX9-NEXT: v_readlane_b32 vcc_hi, v30, 29
+; GFX9-NEXT: v_readlane_b32 s31, v30, 30
+; GFX9-NEXT: v_readlane_b32 s35, v30, 31
+; GFX9-NEXT: v_readlane_b32 s47, v30, 32
+; GFX9-NEXT: v_readlane_b32 s48, v30, 33
+; GFX9-NEXT: v_readlane_b32 s39, v30, 34
+; GFX9-NEXT: v_readlane_b32 vcc_lo, v30, 35
+; GFX9-NEXT: v_readlane_b32 s59, v30, 36
+; GFX9-NEXT: v_readlane_b32 s34, v30, 37
+; GFX9-NEXT: v_readlane_b32 s36, v30, 38
+; GFX9-NEXT: v_readlane_b32 s37, v30, 39
+; GFX9-NEXT: v_readlane_b32 s38, v30, 40
+; GFX9-NEXT: v_readlane_b32 s49, v30, 41
+; GFX9-NEXT: v_readlane_b32 s50, v30, 42
+; GFX9-NEXT: v_readlane_b32 s51, v30, 43
+; GFX9-NEXT: v_readlane_b32 s52, v30, 44
+; GFX9-NEXT: v_readlane_b32 s53, v30, 45
+; GFX9-NEXT: v_readlane_b32 s54, v30, 46
+; GFX9-NEXT: v_readlane_b32 s55, v30, 47
+; GFX9-NEXT: v_readlane_b32 s64, v30, 48
+; GFX9-NEXT: v_readlane_b32 s65, v30, 49
+; GFX9-NEXT: v_readlane_b32 s46, v30, 50
+; GFX9-NEXT: v_readlane_b32 s68, v30, 51
+; GFX9-NEXT: v_readlane_b32 s69, v30, 52
+; GFX9-NEXT: v_readlane_b32 s70, v30, 53
+; GFX9-NEXT: v_readlane_b32 s71, v30, 54
+; GFX9-NEXT: v_readlane_b32 s80, v30, 55
+; GFX9-NEXT: v_readlane_b32 s56, v30, 56
+; GFX9-NEXT: v_readlane_b32 s81, v30, 57
+; GFX9-NEXT: v_readlane_b32 s82, v30, 58
+; GFX9-NEXT: v_readlane_b32 s83, v30, 59
+; GFX9-NEXT: v_readlane_b32 s84, v30, 60
+; GFX9-NEXT: v_readlane_b32 s58, v30, 61
+; GFX9-NEXT: v_readlane_b32 s85, v30, 62
+; GFX9-NEXT: v_readlane_b32 s86, v30, 63
+; GFX9-NEXT: v_readlane_b32 s87, v31, 0
+; GFX9-NEXT: v_readlane_b32 s57, v31, 1
+; GFX9-NEXT: v_readlane_b32 s60, v31, 2
+; GFX9-NEXT: v_readlane_b32 s61, v31, 3
+; GFX9-NEXT: v_readlane_b32 s66, v30, 4
+; GFX9-NEXT: v_readlane_b32 s67, v30, 5
; GFX9-NEXT: s_cbranch_scc1 .LBB57_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_u32 s16, s16, 3
@@ -81134,421 +81161,421 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_add_u32 s4, s4, 3
; GFX9-NEXT: s_addc_u32 s5, s5, 0
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
; GFX9-NEXT: s_lshr_b32 s46, s4, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
; GFX9-NEXT: s_lshr_b32 s46, s7, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 11
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
; GFX9-NEXT: s_lshr_b32 s46, s7, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
; GFX9-NEXT: s_lshr_b32 s46, s7, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
; GFX9-NEXT: s_lshr_b32 s46, s6, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s9, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s9, 8
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
; GFX9-NEXT: s_lshr_b32 s46, s8, 16
-; GFX9-NEXT: v_writelane_b32 v30, s72, 18
-; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s8, 8
-; GFX9-NEXT: v_writelane_b32 v30, s73, 19
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s11, 24
-; GFX9-NEXT: v_writelane_b32 v30, s72, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s11, 16
-; GFX9-NEXT: v_writelane_b32 v30, s73, 17
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[8:9], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: v_writelane_b32 v30, s72, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s11, 8
-; GFX9-NEXT: v_writelane_b32 v30, s72, 14
-; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: v_writelane_b32 v30, s73, 17
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s10, 16
-; GFX9-NEXT: v_writelane_b32 v30, s73, 15
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[10:11], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: v_writelane_b32 v30, s72, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s10, 8
-; GFX9-NEXT: v_writelane_b32 v30, s72, 12
-; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: v_writelane_b32 v30, s73, 15
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s13, 24
-; GFX9-NEXT: v_writelane_b32 v30, s73, 13
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: v_writelane_b32 v30, s72, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s13, 16
-; GFX9-NEXT: v_writelane_b32 v30, s72, 10
-; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: v_writelane_b32 v30, s73, 13
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s13, 8
-; GFX9-NEXT: v_writelane_b32 v30, s73, 11
-; GFX9-NEXT: s_lshr_b64 s[66:67], s[28:29], 24
-; GFX9-NEXT: s_lshr_b32 s60, s5, 16
-; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: v_writelane_b32 v30, s72, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s12, 16
-; GFX9-NEXT: s_lshr_b64 s[72:73], s[44:45], 24
-; GFX9-NEXT: v_writelane_b32 v30, s66, 8
-; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: v_writelane_b32 v30, s73, 11
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s12, 8
-; GFX9-NEXT: s_mov_b32 s73, s60
-; GFX9-NEXT: v_writelane_b32 v30, s67, 9
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: v_writelane_b32 v30, s72, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s15, 24
-; GFX9-NEXT: v_writelane_b32 v30, s60, 4
-; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: v_writelane_b32 v30, s73, 9
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
+; GFX9-NEXT: s_lshr_b32 s62, s5, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s15, 16
-; GFX9-NEXT: v_writelane_b32 v30, s61, 5
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX9-NEXT: s_lshr_b32 s62, s5, 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b64 s[72:73], s[28:29], 24
+; GFX9-NEXT: v_writelane_b32 v30, s66, 6
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s15, 8
-; GFX9-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX9-NEXT: v_writelane_b32 v30, s60, 2
-; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_mov_b32 s73, s62
+; GFX9-NEXT: v_writelane_b32 v30, s67, 7
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s14, 16
-; GFX9-NEXT: s_mov_b32 s75, s62
-; GFX9-NEXT: v_writelane_b32 v30, s61, 3
-; GFX9-NEXT: s_lshr_b64 s[62:63], s[18:19], 24
-; GFX9-NEXT: v_writelane_b32 v31, s46, 34
+; GFX9-NEXT: v_writelane_b32 v30, s62, 2
+; GFX9-NEXT: s_lshr_b32 s93, s5, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s14, 8
-; GFX9-NEXT: v_writelane_b32 v30, s62, 0
-; GFX9-NEXT: v_writelane_b32 v31, s46, 35
-; GFX9-NEXT: s_lshr_b32 s97, s41, 24
-; GFX9-NEXT: s_lshr_b32 s96, s41, 16
+; GFX9-NEXT: v_writelane_b32 v30, s63, 3
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: s_mov_b32 s63, s93
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s43, 8
+; GFX9-NEXT: v_writelane_b32 v30, s92, 0
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
; GFX9-NEXT: s_lshr_b32 s98, s41, 8
; GFX9-NEXT: s_lshr_b32 s99, s40, 16
-; GFX9-NEXT: s_lshr_b32 s88, s40, 8
-; GFX9-NEXT: s_lshr_b32 s90, s43, 24
-; GFX9-NEXT: s_lshr_b32 s89, s43, 16
-; GFX9-NEXT: s_lshr_b32 s91, s43, 8
-; GFX9-NEXT: s_lshr_b32 s92, s42, 16
-; GFX9-NEXT: s_lshr_b32 s93, s42, 8
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s45, 24
-; GFX9-NEXT: s_lshr_b32 s95, s45, 16
-; GFX9-NEXT: s_lshr_b32 s30, s45, 8
-; GFX9-NEXT: s_lshr_b32 s31, s44, 16
-; GFX9-NEXT: s_lshr_b32 s35, s44, 8
-; GFX9-NEXT: s_lshr_b32 s47, s29, 24
-; GFX9-NEXT: s_lshr_b32 s37, s29, 16
-; GFX9-NEXT: s_lshr_b32 s94, s29, 8
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s28, 16
-; GFX9-NEXT: s_lshr_b32 s59, s28, 8
-; GFX9-NEXT: s_lshr_b32 s34, s27, 24
-; GFX9-NEXT: s_lshr_b32 s69, s27, 16
-; GFX9-NEXT: s_lshr_b32 s71, s27, 8
-; GFX9-NEXT: s_lshr_b32 s36, s26, 16
-; GFX9-NEXT: s_lshr_b32 s56, s26, 8
-; GFX9-NEXT: s_lshr_b32 s38, s25, 24
-; GFX9-NEXT: s_lshr_b32 s39, s25, 16
-; GFX9-NEXT: s_lshr_b32 s80, s25, 8
-; GFX9-NEXT: s_lshr_b32 s48, s24, 16
-; GFX9-NEXT: s_lshr_b32 s81, s24, 8
-; GFX9-NEXT: s_lshr_b32 s49, s23, 24
-; GFX9-NEXT: s_lshr_b32 s50, s23, 16
-; GFX9-NEXT: s_lshr_b32 s82, s23, 8
-; GFX9-NEXT: s_lshr_b32 s51, s22, 16
-; GFX9-NEXT: s_lshr_b32 s83, s22, 8
-; GFX9-NEXT: s_lshr_b32 s52, s21, 24
-; GFX9-NEXT: s_lshr_b32 s53, s21, 16
-; GFX9-NEXT: s_lshr_b32 s84, s21, 8
-; GFX9-NEXT: s_lshr_b32 s54, s20, 16
-; GFX9-NEXT: s_lshr_b32 s58, s20, 8
-; GFX9-NEXT: s_lshr_b32 s55, s19, 24
-; GFX9-NEXT: s_lshr_b32 s64, s19, 16
-; GFX9-NEXT: s_lshr_b32 s85, s19, 8
-; GFX9-NEXT: s_lshr_b32 s65, s18, 16
-; GFX9-NEXT: s_lshr_b32 s86, s18, 8
-; GFX9-NEXT: s_lshr_b32 s46, s17, 24
-; GFX9-NEXT: s_lshr_b32 s68, s17, 16
-; GFX9-NEXT: s_lshr_b32 s87, s17, 8
-; GFX9-NEXT: s_lshr_b32 s70, s16, 16
-; GFX9-NEXT: s_lshr_b32 s57, s16, 8
+; GFX9-NEXT: s_lshr_b32 s90, s40, 8
+; GFX9-NEXT: s_lshr_b32 s75, s43, 24
+; GFX9-NEXT: s_lshr_b32 s91, s43, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_lshr_b32 s94, s42, 16
+; GFX9-NEXT: s_lshr_b32 s95, s42, 8
+; GFX9-NEXT: s_lshr_b32 s30, s45, 24
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s45, 16
+; GFX9-NEXT: s_lshr_b32 s31, s45, 8
+; GFX9-NEXT: s_lshr_b32 s35, s44, 16
+; GFX9-NEXT: s_lshr_b32 s47, s44, 8
+; GFX9-NEXT: s_lshr_b32 s48, s29, 24
+; GFX9-NEXT: s_lshr_b32 s39, s29, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s29, 8
+; GFX9-NEXT: s_lshr_b32 s59, s28, 16
+; GFX9-NEXT: s_lshr_b32 s34, s28, 8
+; GFX9-NEXT: s_lshr_b32 s36, s27, 24
+; GFX9-NEXT: s_lshr_b32 s37, s27, 16
+; GFX9-NEXT: s_lshr_b32 s80, s27, 8
+; GFX9-NEXT: s_lshr_b32 s38, s26, 16
+; GFX9-NEXT: s_lshr_b32 s81, s26, 8
+; GFX9-NEXT: s_lshr_b32 s49, s25, 24
+; GFX9-NEXT: s_lshr_b32 s50, s25, 16
+; GFX9-NEXT: s_lshr_b32 s82, s25, 8
+; GFX9-NEXT: s_lshr_b32 s51, s24, 16
+; GFX9-NEXT: s_lshr_b32 s83, s24, 8
+; GFX9-NEXT: s_lshr_b32 s52, s23, 24
+; GFX9-NEXT: s_lshr_b32 s53, s23, 16
+; GFX9-NEXT: s_lshr_b32 s84, s23, 8
+; GFX9-NEXT: s_lshr_b32 s54, s22, 16
+; GFX9-NEXT: s_lshr_b32 s58, s22, 8
+; GFX9-NEXT: s_lshr_b32 s55, s21, 24
+; GFX9-NEXT: s_lshr_b32 s64, s21, 16
+; GFX9-NEXT: s_lshr_b32 s85, s21, 8
+; GFX9-NEXT: s_lshr_b32 s65, s20, 16
+; GFX9-NEXT: s_lshr_b32 s86, s20, 8
+; GFX9-NEXT: s_lshr_b32 s46, s19, 24
+; GFX9-NEXT: s_lshr_b32 s68, s19, 16
+; GFX9-NEXT: s_lshr_b32 s87, s19, 8
+; GFX9-NEXT: s_lshr_b32 s69, s18, 16
+; GFX9-NEXT: s_lshr_b32 s57, s18, 8
+; GFX9-NEXT: s_lshr_b32 s70, s17, 24
+; GFX9-NEXT: s_lshr_b32 s71, s17, 16
+; GFX9-NEXT: s_lshr_b32 s60, s17, 8
+; GFX9-NEXT: s_lshr_b32 s56, s16, 16
+; GFX9-NEXT: s_lshr_b32 s61, s16, 8
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[14:15], 24
; GFX9-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
-; GFX9-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[60:61], s[20:21], 24
-; GFX9-NEXT: v_writelane_b32 v30, s63, 1
-; GFX9-NEXT: s_lshr_b64 s[62:63], s[16:17], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[24:25], 24
+; GFX9-NEXT: v_writelane_b32 v30, s93, 1
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX9-NEXT: .LBB57_5: ; %end
-; GFX9-NEXT: v_mov_b32_e32 v6, s62
+; GFX9-NEXT: v_mov_b32_e32 v6, s92
; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v2, s57
-; GFX9-NEXT: v_perm_b32 v6, s70, v6, v1
-; GFX9-NEXT: v_mov_b32_e32 v4, s87
+; GFX9-NEXT: v_mov_b32_e32 v2, s61
+; GFX9-NEXT: v_perm_b32 v6, s56, v6, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s60
; GFX9-NEXT: v_perm_b32 v3, s16, v2, v1
-; GFX9-NEXT: v_mov_b32_e32 v21, s46
+; GFX9-NEXT: v_mov_b32_e32 v21, s70
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_perm_b32 v2, s17, v4, v1
; GFX9-NEXT: v_readlane_b32 s16, v30, 0
-; GFX9-NEXT: v_perm_b32 v21, s68, v21, v1
+; GFX9-NEXT: v_perm_b32 v21, s71, v21, v1
; GFX9-NEXT: v_or_b32_e32 v3, v3, v6
; GFX9-NEXT: v_mov_b32_e32 v10, s16
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v21
-; GFX9-NEXT: v_mov_b32_e32 v4, s86
-; GFX9-NEXT: v_perm_b32 v10, s65, v10, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s57
+; GFX9-NEXT: v_perm_b32 v10, s69, v10, v1
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1
-; GFX9-NEXT: v_mov_b32_e32 v22, s55
+; GFX9-NEXT: v_mov_b32_e32 v22, s46
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v10
-; GFX9-NEXT: v_mov_b32_e32 v7, s85
-; GFX9-NEXT: v_perm_b32 v22, s64, v22, v1
+; GFX9-NEXT: v_mov_b32_e32 v7, s87
+; GFX9-NEXT: v_perm_b32 v22, s68, v22, v1
; GFX9-NEXT: v_or_b32_e32 v2, v5, v2
; GFX9-NEXT: v_perm_b32 v4, s19, v7, v1
-; GFX9-NEXT: v_mov_b32_e32 v13, s60
+; GFX9-NEXT: v_mov_b32_e32 v14, s62
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; GFX9-NEXT: v_mov_b32_e32 v7, s58
-; GFX9-NEXT: v_perm_b32 v13, s54, v13, v1
+; GFX9-NEXT: v_mov_b32_e32 v7, s86
+; GFX9-NEXT: v_perm_b32 v14, s65, v14, v1
; GFX9-NEXT: v_or_b32_e32 v2, v4, v2
; GFX9-NEXT: v_readlane_b32 s17, v30, 1
; GFX9-NEXT: v_perm_b32 v8, s20, v7, v1
-; GFX9-NEXT: v_mov_b32_e32 v23, s52
+; GFX9-NEXT: v_mov_b32_e32 v23, s55
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; GFX9-NEXT: v_mov_b32_e32 v9, s84
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; GFX9-NEXT: v_mov_b32_e32 v9, s85
; GFX9-NEXT: v_readlane_b32 s16, v30, 2
-; GFX9-NEXT: v_perm_b32 v23, s53, v23, v1
+; GFX9-NEXT: v_perm_b32 v23, s64, v23, v1
; GFX9-NEXT: v_or_b32_e32 v2, v8, v2
; GFX9-NEXT: v_perm_b32 v7, s21, v9, v1
; GFX9-NEXT: v_mov_b32_e32 v15, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23
-; GFX9-NEXT: v_mov_b32_e32 v9, s83
-; GFX9-NEXT: v_perm_b32 v15, s51, v15, v1
+; GFX9-NEXT: v_mov_b32_e32 v9, s58
+; GFX9-NEXT: v_perm_b32 v15, s54, v15, v1
; GFX9-NEXT: v_or_b32_e32 v2, v7, v2
-; GFX9-NEXT: v_readlane_b32 s17, v30, 3
; GFX9-NEXT: v_perm_b32 v11, s22, v9, v1
-; GFX9-NEXT: v_mov_b32_e32 v24, s49
+; GFX9-NEXT: v_mov_b32_e32 v24, s52
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v15
-; GFX9-NEXT: v_mov_b32_e32 v12, s82
-; GFX9-NEXT: v_readlane_b32 s16, v30, 4
-; GFX9-NEXT: v_perm_b32 v24, s50, v24, v1
+; GFX9-NEXT: v_mov_b32_e32 v12, s84
+; GFX9-NEXT: v_perm_b32 v24, s53, v24, v1
; GFX9-NEXT: v_or_b32_e32 v2, v11, v2
; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1
-; GFX9-NEXT: v_mov_b32_e32 v16, s16
+; GFX9-NEXT: v_mov_b32_e32 v16, s66
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v24
-; GFX9-NEXT: v_mov_b32_e32 v12, s81
-; GFX9-NEXT: v_perm_b32 v16, s48, v16, v1
+; GFX9-NEXT: v_mov_b32_e32 v12, s83
+; GFX9-NEXT: v_perm_b32 v16, s51, v16, v1
; GFX9-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX9-NEXT: v_perm_b32 v14, s24, v12, v1
-; GFX9-NEXT: v_mov_b32_e32 v25, s38
+; GFX9-NEXT: v_readlane_b32 s17, v30, 3
+; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, s49
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; GFX9-NEXT: v_mov_b32_e32 v17, s80
-; GFX9-NEXT: v_perm_b32 v25, s39, v25, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v14, v2
+; GFX9-NEXT: v_mov_b32_e32 v17, s82
+; GFX9-NEXT: v_readlane_b32 s16, v30, 6
+; GFX9-NEXT: v_perm_b32 v25, s50, v25, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v13, v2
; GFX9-NEXT: v_perm_b32 v12, s25, v17, v1
-; GFX9-NEXT: v_mov_b32_e32 v17, s66
+; GFX9-NEXT: v_mov_b32_e32 v17, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; GFX9-NEXT: v_mov_b32_e32 v18, s56
-; GFX9-NEXT: v_perm_b32 v17, s36, v17, v1
+; GFX9-NEXT: v_mov_b32_e32 v18, s81
+; GFX9-NEXT: v_perm_b32 v17, s38, v17, v1
; GFX9-NEXT: v_or_b32_e32 v2, v12, v2
-; GFX9-NEXT: v_readlane_b32 s17, v30, 5
; GFX9-NEXT: v_perm_b32 v18, s26, v18, v1
-; GFX9-NEXT: v_mov_b32_e32 v26, s34
+; GFX9-NEXT: v_mov_b32_e32 v26, s36
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; GFX9-NEXT: v_mov_b32_e32 v19, s71
-; GFX9-NEXT: v_readlane_b32 s16, v30, 8
-; GFX9-NEXT: v_perm_b32 v26, s69, v26, v1
+; GFX9-NEXT: v_mov_b32_e32 v19, s80
+; GFX9-NEXT: v_perm_b32 v26, s37, v26, v1
; GFX9-NEXT: v_or_b32_e32 v2, v18, v2
; GFX9-NEXT: v_perm_b32 v19, s27, v19, v1
-; GFX9-NEXT: v_mov_b32_e32 v20, s16
+; GFX9-NEXT: v_mov_b32_e32 v20, s72
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; GFX9-NEXT: v_mov_b32_e32 v27, s59
-; GFX9-NEXT: v_perm_b32 v20, vcc_hi, v20, v1
+; GFX9-NEXT: v_mov_b32_e32 v27, s34
+; GFX9-NEXT: v_perm_b32 v20, s59, v20, v1
; GFX9-NEXT: v_or_b32_e32 v2, v19, v2
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_perm_b32 v2, s28, v27, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s94
-; GFX9-NEXT: v_perm_b32 v3, s37, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s48
+; GFX9-NEXT: v_mov_b32_e32 v28, vcc_lo
+; GFX9-NEXT: v_perm_b32 v3, s39, v3, v1
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; GFX9-NEXT: v_perm_b32 v2, s29, v28, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s72
+; GFX9-NEXT: v_mov_b32_e32 v3, s88
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_mov_b32_e32 v2, s35
-; GFX9-NEXT: v_perm_b32 v3, s31, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s47
+; GFX9-NEXT: v_perm_b32 v3, s35, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s44, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, vcc_lo
+; GFX9-NEXT: v_mov_b32_e32 v3, s30
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_mov_b32_e32 v2, s30
-; GFX9-NEXT: v_perm_b32 v3, s95, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s31
+; GFX9-NEXT: v_perm_b32 v3, vcc_hi, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s45, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s78
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_mov_b32_e32 v2, s93
-; GFX9-NEXT: v_perm_b32 v3, s92, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s95
+; GFX9-NEXT: v_perm_b32 v3, s94, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s42, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s90
+; GFX9-NEXT: v_readlane_b32 s16, v31, 33
+; GFX9-NEXT: v_mov_b32_e32 v3, s75
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_mov_b32_e32 v2, s91
-; GFX9-NEXT: v_perm_b32 v3, s89, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s16
+; GFX9-NEXT: v_perm_b32 v3, s91, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s43, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s76
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_mov_b32_e32 v2, s88
+; GFX9-NEXT: v_mov_b32_e32 v2, s90
; GFX9-NEXT: v_perm_b32 v3, s99, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s40, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_readlane_b32 s16, v31, 32
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s97
+; GFX9-NEXT: v_mov_b32_e32 v3, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
; GFX9-NEXT: v_mov_b32_e32 v2, s98
-; GFX9-NEXT: v_perm_b32 v3, s96, v3, v1
+; GFX9-NEXT: v_perm_b32 v3, s74, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s41, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s16, v31, 35
+; GFX9-NEXT: v_readlane_b32 s16, v31, 31
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: v_perm_b32 v2, s14, v2, v1
-; GFX9-NEXT: v_mov_b32_e32 v3, s74
-; GFX9-NEXT: v_readlane_b32 s14, v31, 34
+; GFX9-NEXT: v_mov_b32_e32 v3, s96
+; GFX9-NEXT: v_readlane_b32 s14, v31, 30
; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s14, v31, 33
+; GFX9-NEXT: v_readlane_b32 s14, v31, 29
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; GFX9-NEXT: v_mov_b32_e32 v2, s14
-; GFX9-NEXT: v_readlane_b32 s14, v31, 31
+; GFX9-NEXT: v_readlane_b32 s14, v31, 27
; GFX9-NEXT: v_mov_b32_e32 v3, s14
-; GFX9-NEXT: v_readlane_b32 s14, v31, 32
+; GFX9-NEXT: v_readlane_b32 s14, v31, 28
; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s15, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s14, v31, 30
+; GFX9-NEXT: v_readlane_b32 s14, v31, 26
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: v_mov_b32_e32 v2, s14
-; GFX9-NEXT: v_readlane_b32 s14, v30, 10
+; GFX9-NEXT: v_readlane_b32 s14, v30, 8
; GFX9-NEXT: v_perm_b32 v2, s12, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s14
-; GFX9-NEXT: v_readlane_b32 s12, v31, 29
+; GFX9-NEXT: v_readlane_b32 s12, v31, 25
; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s12, v31, 28
+; GFX9-NEXT: v_readlane_b32 s12, v31, 24
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; GFX9-NEXT: v_mov_b32_e32 v2, s12
-; GFX9-NEXT: v_readlane_b32 s12, v31, 26
+; GFX9-NEXT: v_readlane_b32 s12, v31, 22
; GFX9-NEXT: v_mov_b32_e32 v3, s12
-; GFX9-NEXT: v_readlane_b32 s12, v31, 27
+; GFX9-NEXT: v_readlane_b32 s12, v31, 23
; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s13, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s12, v31, 25
+; GFX9-NEXT: v_readlane_b32 s12, v31, 21
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; GFX9-NEXT: v_mov_b32_e32 v2, s12
-; GFX9-NEXT: v_readlane_b32 s12, v30, 12
+; GFX9-NEXT: v_readlane_b32 s12, v30, 10
; GFX9-NEXT: v_perm_b32 v2, s10, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s12
-; GFX9-NEXT: v_readlane_b32 s10, v31, 24
+; GFX9-NEXT: v_readlane_b32 s10, v31, 20
; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s10, v31, 23
+; GFX9-NEXT: v_readlane_b32 s10, v31, 19
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; GFX9-NEXT: v_mov_b32_e32 v2, s10
-; GFX9-NEXT: v_readlane_b32 s10, v31, 21
+; GFX9-NEXT: v_readlane_b32 s10, v31, 17
; GFX9-NEXT: v_mov_b32_e32 v3, s10
-; GFX9-NEXT: v_readlane_b32 s10, v31, 22
+; GFX9-NEXT: v_readlane_b32 s10, v31, 18
; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s11, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s10, v31, 20
+; GFX9-NEXT: v_readlane_b32 s10, v31, 16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; GFX9-NEXT: v_mov_b32_e32 v2, s10
-; GFX9-NEXT: v_readlane_b32 s10, v30, 14
+; GFX9-NEXT: v_readlane_b32 s10, v30, 12
; GFX9-NEXT: v_perm_b32 v2, s8, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s10
-; GFX9-NEXT: v_readlane_b32 s8, v31, 19
+; GFX9-NEXT: v_readlane_b32 s8, v31, 15
; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s8, v31, 18
+; GFX9-NEXT: v_readlane_b32 s8, v31, 14
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; GFX9-NEXT: v_mov_b32_e32 v2, s8
-; GFX9-NEXT: v_readlane_b32 s8, v31, 16
+; GFX9-NEXT: v_readlane_b32 s8, v31, 12
; GFX9-NEXT: v_mov_b32_e32 v3, s8
-; GFX9-NEXT: v_readlane_b32 s8, v31, 17
+; GFX9-NEXT: v_readlane_b32 s8, v31, 13
; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s9, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s8, v31, 15
+; GFX9-NEXT: v_readlane_b32 s8, v31, 11
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; GFX9-NEXT: v_mov_b32_e32 v2, s8
-; GFX9-NEXT: v_readlane_b32 s8, v30, 16
+; GFX9-NEXT: v_readlane_b32 s8, v30, 14
; GFX9-NEXT: v_perm_b32 v2, s6, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s8
-; GFX9-NEXT: v_readlane_b32 s6, v31, 14
+; GFX9-NEXT: v_readlane_b32 s6, v31, 10
; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s6, v31, 13
+; GFX9-NEXT: v_readlane_b32 s6, v31, 9
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; GFX9-NEXT: v_mov_b32_e32 v2, s6
-; GFX9-NEXT: v_readlane_b32 s6, v31, 11
+; GFX9-NEXT: v_readlane_b32 s6, v31, 7
; GFX9-NEXT: v_mov_b32_e32 v3, s6
-; GFX9-NEXT: v_readlane_b32 s6, v31, 12
+; GFX9-NEXT: v_readlane_b32 s6, v31, 8
; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s7, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s6, v31, 10
+; GFX9-NEXT: v_readlane_b32 s6, v31, 6
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; GFX9-NEXT: v_mov_b32_e32 v2, s6
-; GFX9-NEXT: v_readlane_b32 s6, v30, 18
+; GFX9-NEXT: v_readlane_b32 s6, v30, 16
; GFX9-NEXT: v_perm_b32 v2, s4, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s6
-; GFX9-NEXT: v_readlane_b32 s4, v31, 9
+; GFX9-NEXT: v_readlane_b32 s4, v31, 5
; GFX9-NEXT: v_perm_b32 v3, s4, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_readlane_b32 s4, v31, 8
+; GFX9-NEXT: v_readlane_b32 s4, v31, 4
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; GFX9-NEXT: v_mov_b32_e32 v2, s4
-; GFX9-NEXT: v_mov_b32_e32 v3, s75
+; GFX9-NEXT: v_mov_b32_e32 v3, s63
; GFX9-NEXT: v_perm_b32 v2, s5, v2, v1
; GFX9-NEXT: v_perm_b32 v1, s73, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: v_readlane_b32 s30, v29, 34
-; GFX9-NEXT: v_readlane_b32 s17, v30, 9
-; GFX9-NEXT: v_readlane_b32 s15, v30, 11
-; GFX9-NEXT: v_readlane_b32 s13, v30, 13
-; GFX9-NEXT: v_readlane_b32 s11, v30, 15
-; GFX9-NEXT: v_readlane_b32 s9, v30, 17
-; GFX9-NEXT: v_readlane_b32 s7, v30, 19
+; GFX9-NEXT: v_readlane_b32 s17, v30, 7
+; GFX9-NEXT: v_readlane_b32 s15, v30, 9
+; GFX9-NEXT: v_readlane_b32 s13, v30, 11
+; GFX9-NEXT: v_readlane_b32 s11, v30, 13
+; GFX9-NEXT: v_readlane_b32 s9, v30, 15
+; GFX9-NEXT: v_readlane_b32 s7, v30, 17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: v_readlane_b32 s31, v29, 35
; GFX9-NEXT: v_readlane_b32 s99, v29, 33
@@ -82452,24 +82479,24 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:184
; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v21
; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25
; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27
@@ -82477,7 +82504,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0
-; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -82543,13 +82570,13 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v38
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v39
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
@@ -82568,16 +82595,16 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v50
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v40
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192
@@ -82589,14 +82616,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:68
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52
; SI-NEXT: s_waitcnt vmcnt(14)
@@ -82800,7 +82827,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v49
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
@@ -82818,7 +82845,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
@@ -82828,12 +82855,12 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v54
+; SI-NEXT: v_or_b32_e32 v2, v2, v35
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
-; SI-NEXT: v_or_b32_e32 v3, v40, v3
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v3, v41, v3
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v1
@@ -82860,9 +82887,9 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr37
@@ -82870,14 +82897,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v53
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
@@ -82899,11 +82926,11 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
+; SI-NEXT: v_or_b32_e32 v5, v5, v51
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v56
@@ -82916,8 +82943,8 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v46
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v35
-; SI-NEXT: v_or_b32_e32 v8, v8, v44
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v49
+; SI-NEXT: v_or_b32_e32 v8, v8, v36
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xff, v33
@@ -82929,11 +82956,11 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v63
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v10, v10, v11
@@ -82954,9 +82981,9 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xff, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v38
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v57
@@ -82981,14 +83008,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v44
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -83420,7 +83447,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
@@ -83448,18 +83475,18 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v40, v2
+; SI-NEXT: v_or_b32_e32 v2, v41, v2
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -83486,7 +83513,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v1, v35, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
@@ -83500,7 +83527,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
+; SI-NEXT: v_or_b32_e32 v2, v53, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
@@ -83527,7 +83554,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
+; SI-NEXT: v_or_b32_e32 v5, v51, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -83549,9 +83576,9 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v44, v8
+; SI-NEXT: v_or_b32_e32 v8, v36, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -83595,7 +83622,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v11
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -83626,7 +83653,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v13
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v44
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
@@ -83995,35 +84022,35 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:104
; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:100
; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:96
; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:92
; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:60
; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:40
; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24
; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
@@ -84230,13 +84257,13 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: s_mov_b32 s6, 0xc0c0004
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v9, v33, v62, s6
+; VI-NEXT: v_perm_b32 v9, v62, v33, s6
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_perm_b32 v10, v63, v60, s6
+; VI-NEXT: v_perm_b32 v10, v60, v54, s6
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_perm_b32 v11, v53, v58, s6
+; VI-NEXT: v_perm_b32 v11, v58, v53, s6
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_perm_b32 v12, v51, v56, s6
+; VI-NEXT: v_perm_b32 v12, v56, v51, s6
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_perm_b32 v13, v37, v36, s6
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -84244,14 +84271,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_perm_b32 v15, v49, v48, s6
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; implicit-def: $vgpr45
@@ -84338,40 +84365,40 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v8, v8, v41, s6
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_perm_b32 v8, v55, v34, s6
+; VI-NEXT: v_perm_b32 v8, v55, v63, s6
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_perm_b32 v9, v61, v32, s6
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_perm_b32 v10, v59, v54, s6
+; VI-NEXT: v_perm_b32 v10, v59, v38, s6
; VI-NEXT: v_or_b32_e32 v10, v10, v11
; VI-NEXT: v_perm_b32 v11, v57, v52, s6
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v47, v38, s6
+; VI-NEXT: v_perm_b32 v12, v47, v34, s6
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_perm_b32 v13, v35, v46, s6
+; VI-NEXT: v_perm_b32 v13, v50, v46, s6
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_perm_b32 v14, v43, v50, s6
+; VI-NEXT: v_perm_b32 v14, v43, v35, s6
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_perm_b32 v15, v39, v42, s6
+; VI-NEXT: v_perm_b32 v15, v42, v39, s6
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v17, v16, s6
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
@@ -84731,10 +84758,10 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v31, 0x300
; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41
-; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60
-; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56
+; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v53
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v51
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36
; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44
; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48
@@ -84759,6 +84786,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_add_u16_e32 v0, 3, v0
; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1
@@ -84772,34 +84800,35 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23
-; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26
-; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: s_waitcnt vmcnt(13)
; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17
-; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: s_waitcnt vmcnt(12)
; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6
-; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: s_waitcnt vmcnt(11)
; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19
-; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: s_waitcnt vmcnt(9)
; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7
-; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: s_waitcnt vmcnt(8)
; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: s_waitcnt vmcnt(7)
; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: s_waitcnt vmcnt(6)
; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8
-; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -84904,9 +84933,9 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_add_u16_e32 v8, 3, v55
-; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34
+; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v9, 3, v33
+; VI-NEXT: v_add_u16_e32 v9, 3, v62
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v8, 0x300, v8
; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -84914,15 +84943,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v9, 3, v61
; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v10, 3, v63
+; VI-NEXT: v_add_u16_e32 v10, 3, v60
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v9, 0x300, v9
; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_add_u16_e32 v10, 3, v59
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v38
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v11, 3, v53
+; VI-NEXT: v_add_u16_e32 v11, 3, v58
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v10, 0x300, v10
; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -84930,20 +84959,20 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v11, 3, v57
; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v12, 3, v51
+; VI-NEXT: v_add_u16_e32 v12, 3, v56
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v11, 0x300, v11
; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v11, v11, v12
; VI-NEXT: v_add_u16_e32 v12, 3, v47
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v38
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v34
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v13, 3, v37
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v12, 0x300, v12
; VI-NEXT: v_add_u16_sdwa v13, v13, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_add_u16_e32 v13, 3, v35
+; VI-NEXT: v_add_u16_e32 v13, 3, v50
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v46
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 3, v45
@@ -84952,32 +84981,29 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v14, v14, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v13, v13, v14
; VI-NEXT: v_add_u16_e32 v14, 3, v43
-; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v50
+; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v35
; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v15, 3, v49
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 0x300, v14
; VI-NEXT: v_add_u16_sdwa v15, v15, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_add_u16_e32 v15, 3, v39
-; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v42
+; VI-NEXT: v_add_u16_e32 v15, 3, v42
+; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v39
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; VI-NEXT: v_add_u16_e32 v15, 0x300, v15
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_add_u16_e32 v16, 3, v16
; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -85280,31 +85306,31 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112
; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108
; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96
; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:88
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84
; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80
; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68
; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64
; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52
; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48
; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44
; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:32
; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:12
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(32)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
@@ -85382,7 +85408,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376
; GFX9-NEXT: s_waitcnt vmcnt(3)
@@ -85512,13 +85538,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6
+; GFX9-NEXT: v_perm_b32 v10, v55, v63, s6
; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6
; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6
; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6
; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6
; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6
; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -85602,40 +85629,39 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_perm_b32 v8, v35, v42, s6
-; GFX9-NEXT: v_perm_b32 v9, v41, v48, s6
+; GFX9-NEXT: v_perm_b32 v8, v48, v42, s6
+; GFX9-NEXT: v_perm_b32 v9, v41, v35, s6
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6
+; GFX9-NEXT: v_perm_b32 v9, v40, v39, s6
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6
+; GFX9-NEXT: v_perm_b32 v10, v32, v62, s6
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_perm_b32 v11, v54, v59, s6
+; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6
+; GFX9-NEXT: v_perm_b32 v12, v58, v52, s6
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6
+; GFX9-NEXT: v_perm_b32 v13, v47, v37, s6
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6
+; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6
; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14
; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr44
@@ -85778,202 +85804,202 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: .LBB58_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB58_4
@@ -85999,8 +86025,8 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48
-; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v35
+; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60
; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38
; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56
@@ -86010,56 +86036,53 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(24)
+; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0
-; GFX9-NEXT: s_waitcnt vmcnt(21)
-; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
+; GFX9-NEXT: s_waitcnt vmcnt(19)
; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3
; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8
; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
+; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
+; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
+; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
+; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20
; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7
; GFX9-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23
; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
+; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
+; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
+; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
+; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v1, 3, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -86163,7 +86186,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_add_u16_e32 v8, 3, v35
+; GFX9-NEXT: v_add_u16_e32 v8, 3, v48
; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v42
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 3, v41
@@ -86171,15 +86194,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_add_u16_e32 v9, 3, v39
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v40
+; GFX9-NEXT: v_add_u16_e32 v9, 3, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v39
; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v10, 3, v55
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_add_u16_e32 v10, 3, v63
+; GFX9-NEXT: v_add_u16_e32 v10, 3, v32
; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 3, v61
@@ -86187,16 +86210,16 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_add_u16_e32 v11, 3, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v59
+; GFX9-NEXT: v_add_u16_e32 v11, 3, v59
+; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v12, 3, v53
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_add_u16_e32 v12, 3, v37
-; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58
+; GFX9-NEXT: v_add_u16_e32 v12, 3, v58
+; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v52
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 3, v57
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -86204,14 +86227,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
; GFX9-NEXT: v_add_u16_e32 v13, 3, v47
-; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52
+; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v37
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v14, 3, v51
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_add_u16_e32 v14, 3, v33
+; GFX9-NEXT: v_add_u16_e32 v14, 3, v36
; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v15, 3, v45
@@ -86229,7 +86252,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_add_u16_e32 v16, 3, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -86238,7 +86261,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v17, 3, v17
; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -86447,9 +86470,12 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; GFX9-NEXT: v_add_u16_e32 v32, 3, v36
-; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+; GFX9-NEXT: v_add_u16_e32 v32, 3, v33
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v32
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: .LBB58_4: ; %end
@@ -93315,38 +93341,38 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s8, s4, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s4, 16
+; SI-NEXT: s_and_b32 s4, s49, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 1
; SI-NEXT: s_and_b32 s4, s50, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 2
+; SI-NEXT: v_writelane_b32 v34, s4, 3
; SI-NEXT: s_lshl_b32 s4, s50, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 1
+; SI-NEXT: v_writelane_b32 v34, s4, 2
; SI-NEXT: s_and_b32 s4, s51, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 4
+; SI-NEXT: v_writelane_b32 v34, s4, 5
; SI-NEXT: s_lshl_b32 s4, s51, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 3
+; SI-NEXT: v_writelane_b32 v34, s4, 4
; SI-NEXT: s_and_b32 s4, s52, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 6
+; SI-NEXT: v_writelane_b32 v34, s4, 7
; SI-NEXT: s_lshl_b32 s4, s52, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 5
+; SI-NEXT: v_writelane_b32 v34, s4, 6
; SI-NEXT: s_and_b32 s4, s53, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 8
+; SI-NEXT: v_writelane_b32 v34, s4, 9
; SI-NEXT: s_lshl_b32 s4, s53, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 7
+; SI-NEXT: v_writelane_b32 v34, s4, 8
; SI-NEXT: s_and_b32 s4, s54, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 10
+; SI-NEXT: v_writelane_b32 v34, s4, 11
; SI-NEXT: s_lshl_b32 s4, s54, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 9
+; SI-NEXT: v_writelane_b32 v34, s4, 10
; SI-NEXT: s_and_b32 s4, s55, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 12
+; SI-NEXT: v_writelane_b32 v34, s4, 13
; SI-NEXT: s_lshl_b32 s4, s55, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 11
+; SI-NEXT: v_writelane_b32 v34, s4, 12
; SI-NEXT: s_and_b32 s4, s64, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 14
+; SI-NEXT: v_writelane_b32 v34, s4, 15
; SI-NEXT: s_lshl_b32 s4, s64, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 13
-; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s4, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 14
; SI-NEXT: s_lshl_b32 s4, s29, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 15
+; SI-NEXT: v_writelane_b32 v34, s4, 16
; SI-NEXT: s_and_b32 s4, s27, 0xffff0000
; SI-NEXT: v_writelane_b32 v34, s4, 18
; SI-NEXT: s_lshl_b32 s4, s27, 16
@@ -93372,27 +93398,27 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: s_lshl_b32 s47, s39, 16
; SI-NEXT: s_and_b32 s58, s48, 0xffff0000
; SI-NEXT: s_lshl_b32 s57, s48, 16
-; SI-NEXT: s_and_b32 s60, s49, 0xffff0000
; SI-NEXT: s_lshl_b32 s59, s49, 16
+; SI-NEXT: s_and_b32 s92, s29, 0xffff0000
; SI-NEXT: s_and_b32 s94, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s93, s28, 16
; SI-NEXT: v_writelane_b32 v34, s4, 19
-; SI-NEXT: s_and_b32 s62, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s61, s25, 16
-; SI-NEXT: s_and_b32 s72, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s63, s24, 16
-; SI-NEXT: s_and_b32 s74, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s73, s23, 16
-; SI-NEXT: s_and_b32 s76, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s75, s22, 16
-; SI-NEXT: s_and_b32 s78, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s77, s21, 16
-; SI-NEXT: s_and_b32 s88, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s79, s20, 16
-; SI-NEXT: s_and_b32 s90, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s89, s19, 16
-; SI-NEXT: s_and_b32 s92, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s18, 16
+; SI-NEXT: s_and_b32 s61, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s60, s25, 16
+; SI-NEXT: s_and_b32 s63, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s24, 16
+; SI-NEXT: s_and_b32 s73, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s72, s23, 16
+; SI-NEXT: s_and_b32 s75, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s22, 16
+; SI-NEXT: s_and_b32 s77, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s21, 16
+; SI-NEXT: s_and_b32 s79, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s78, s20, 16
+; SI-NEXT: s_and_b32 s89, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s19, 16
+; SI-NEXT: s_and_b32 s91, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s18, 16
; SI-NEXT: s_and_b32 vcc_lo, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s95, s17, 16
; SI-NEXT: s_and_b32 s6, s16, 0xffff0000
@@ -93406,26 +93432,26 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr73
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr59
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr47
@@ -93489,25 +93515,25 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_mov_b32 s65, s63
-; SI-NEXT: s_mov_b32 s66, s72
-; SI-NEXT: s_mov_b32 s67, s73
-; SI-NEXT: s_mov_b32 s68, s74
-; SI-NEXT: s_mov_b32 s69, s75
-; SI-NEXT: s_mov_b32 s70, s76
-; SI-NEXT: s_mov_b32 s71, s77
-; SI-NEXT: s_mov_b32 s80, s78
-; SI-NEXT: s_mov_b32 s81, s79
-; SI-NEXT: s_mov_b32 s82, s88
-; SI-NEXT: s_mov_b32 s83, s89
-; SI-NEXT: s_mov_b32 s84, s90
-; SI-NEXT: s_mov_b32 s85, s91
-; SI-NEXT: s_mov_b32 s86, s92
+; SI-NEXT: s_mov_b32 s65, s62
+; SI-NEXT: s_mov_b32 s66, s63
+; SI-NEXT: s_mov_b32 s67, s72
+; SI-NEXT: s_mov_b32 s68, s73
+; SI-NEXT: s_mov_b32 s69, s74
+; SI-NEXT: s_mov_b32 s70, s75
+; SI-NEXT: s_mov_b32 s71, s76
+; SI-NEXT: s_mov_b32 s80, s77
+; SI-NEXT: s_mov_b32 s81, s78
+; SI-NEXT: s_mov_b32 s82, s79
+; SI-NEXT: s_mov_b32 s83, s88
+; SI-NEXT: s_mov_b32 s84, s89
+; SI-NEXT: s_mov_b32 s85, s90
+; SI-NEXT: s_mov_b32 s86, s91
; SI-NEXT: s_mov_b32 s87, s95
; SI-NEXT: s_mov_b32 s96, vcc_lo
-; SI-NEXT: s_mov_b32 vcc_lo, s61
+; SI-NEXT: s_mov_b32 vcc_lo, s60
; SI-NEXT: s_mov_b32 s97, vcc_hi
-; SI-NEXT: s_mov_b32 vcc_hi, s62
+; SI-NEXT: s_mov_b32 vcc_hi, s61
; SI-NEXT: s_mov_b32 s98, s6
; SI-NEXT: s_mov_b32 s4, s7
; SI-NEXT: s_mov_b32 s5, s8
@@ -93530,26 +93556,25 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: s_mov_b32 s47, s57
; SI-NEXT: s_mov_b32 s56, s58
; SI-NEXT: s_mov_b32 s57, s59
-; SI-NEXT: s_mov_b32 s58, s60
-; SI-NEXT: v_readlane_b32 s59, v34, 1
-; SI-NEXT: v_readlane_b32 s60, v34, 2
-; SI-NEXT: v_readlane_b32 s61, v34, 3
-; SI-NEXT: v_readlane_b32 s62, v34, 4
-; SI-NEXT: v_readlane_b32 s63, v34, 5
-; SI-NEXT: v_readlane_b32 s72, v34, 6
-; SI-NEXT: v_readlane_b32 s73, v34, 7
-; SI-NEXT: v_readlane_b32 s74, v34, 8
-; SI-NEXT: v_readlane_b32 s75, v34, 9
-; SI-NEXT: v_readlane_b32 s76, v34, 10
-; SI-NEXT: v_readlane_b32 s77, v34, 11
-; SI-NEXT: v_readlane_b32 s78, v34, 12
-; SI-NEXT: v_readlane_b32 s79, v34, 13
-; SI-NEXT: v_readlane_b32 s88, v34, 14
-; SI-NEXT: v_readlane_b32 s89, v34, 15
-; SI-NEXT: v_readlane_b32 s90, v34, 16
+; SI-NEXT: v_readlane_b32 s58, v34, 1
+; SI-NEXT: v_readlane_b32 s59, v34, 2
+; SI-NEXT: v_readlane_b32 s60, v34, 3
+; SI-NEXT: v_readlane_b32 s61, v34, 4
+; SI-NEXT: v_readlane_b32 s62, v34, 5
+; SI-NEXT: v_readlane_b32 s63, v34, 6
+; SI-NEXT: v_readlane_b32 s72, v34, 7
+; SI-NEXT: v_readlane_b32 s73, v34, 8
+; SI-NEXT: v_readlane_b32 s74, v34, 9
+; SI-NEXT: v_readlane_b32 s75, v34, 10
+; SI-NEXT: v_readlane_b32 s76, v34, 11
+; SI-NEXT: v_readlane_b32 s77, v34, 12
+; SI-NEXT: v_readlane_b32 s78, v34, 13
+; SI-NEXT: v_readlane_b32 s79, v34, 14
+; SI-NEXT: v_readlane_b32 s88, v34, 15
+; SI-NEXT: v_readlane_b32 s89, v34, 16
; SI-NEXT: v_readlane_b32 s6, v34, 17
-; SI-NEXT: v_readlane_b32 s91, v34, 18
-; SI-NEXT: v_readlane_b32 s92, v34, 19
+; SI-NEXT: v_readlane_b32 s90, v34, 18
+; SI-NEXT: v_readlane_b32 s91, v34, 19
; SI-NEXT: v_readlane_b32 s95, v34, 20
; SI-NEXT: s_cbranch_scc1 .LBB61_5
; SI-NEXT: ; %bb.4: ; %cmp.true
@@ -93622,14 +93647,14 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: s_lshl_b32 s77, s77, 16
; SI-NEXT: s_and_b32 s88, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s79, s29, 16
-; SI-NEXT: s_and_b32 s90, s28, 0xffff0000
+; SI-NEXT: s_and_b32 s92, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s89, s28, 16
; SI-NEXT: s_and_b32 s94, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s93, s27, 16
-; SI-NEXT: s_and_b32 s91, s6, 0xffff0000
+; SI-NEXT: s_and_b32 s90, s6, 0xffff0000
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_and_b32 s95, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s26, 16
+; SI-NEXT: s_lshl_b32 s91, s26, 16
; SI-NEXT: s_and_b32 vcc_hi, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, s25, 16
; SI-NEXT: s_and_b32 s66, s24, 0xffff0000
@@ -93693,9 +93718,9 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s91
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s90
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
; SI-NEXT: v_mul_f32_e64 v11, 1.0, s6
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
@@ -93703,7 +93728,7 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s93
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s92
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
; SI-NEXT: v_mul_f32_e64 v13, 1.0, s89
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
@@ -101486,11 +101511,11 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -101500,15 +101525,15 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB65_3
; SI-NEXT: .LBB65_2:
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr47
-; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
@@ -101524,8 +101549,6 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
@@ -101542,13 +101565,15 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: .LBB65_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s47, 1, 0
@@ -101558,9 +101583,9 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: v_readlane_b32 s47, v33, 2
; SI-NEXT: v_readlane_b32 s57, v33, 3
; SI-NEXT: v_readlane_b32 s59, v33, 4
-; SI-NEXT: v_readlane_b32 s38, v33, 5
-; SI-NEXT: v_readlane_b32 s39, v33, 6
-; SI-NEXT: v_readlane_b32 s61, v33, 7
+; SI-NEXT: v_readlane_b32 s61, v33, 5
+; SI-NEXT: v_readlane_b32 s38, v33, 6
+; SI-NEXT: v_readlane_b32 s39, v33, 7
; SI-NEXT: v_readlane_b32 s48, v33, 8
; SI-NEXT: v_readlane_b32 s63, v33, 9
; SI-NEXT: v_readlane_b32 s49, v33, 10
@@ -101603,40 +101628,40 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s46, s43, 16
-; SI-NEXT: s_lshr_b32 s47, s29, 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s46, s29, 16
+; SI-NEXT: s_lshr_b32 s47, s25, 16
+; SI-NEXT: s_lshr_b32 s76, s21, 16
; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s74, s9, 16
-; SI-NEXT: s_lshr_b32 s75, s11, 16
-; SI-NEXT: s_lshr_b32 s76, s13, 16
-; SI-NEXT: s_lshr_b32 s77, s25, 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s90, s9, 16
+; SI-NEXT: s_lshr_b32 s91, s11, 16
+; SI-NEXT: s_lshr_b32 s92, s13, 16
+; SI-NEXT: s_lshr_b32 s93, s15, 16
+; SI-NEXT: s_lshr_b32 s78, s17, 16
; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 16
-; SI-NEXT: s_mov_b32 s61, s46
-; SI-NEXT: s_mov_b32 s63, s47
-; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s78, s21, 16
-; SI-NEXT: s_lshr_b32 s79, s17, 16
-; SI-NEXT: s_mov_b32 s73, s77
-; SI-NEXT: s_mov_b32 s59, s76
-; SI-NEXT: s_mov_b32 s57, s75
-; SI-NEXT: s_mov_b32 s47, s74
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
+; SI-NEXT: s_mov_b32 s63, s46
+; SI-NEXT: s_mov_b32 s73, s47
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: s_lshr_b32 s36, s5, 16
; SI-NEXT: s_lshr_b32 s37, s7, 16
-; SI-NEXT: s_lshr_b32 s38, s15, 16
-; SI-NEXT: s_lshr_b32 s39, s41, 16
+; SI-NEXT: s_lshr_b32 s38, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s43, 16
; SI-NEXT: s_lshr_b32 s48, s45, 16
; SI-NEXT: s_lshr_b32 s49, s27, 16
; SI-NEXT: s_lshr_b32 s50, s23, 16
; SI-NEXT: s_lshr_b32 s51, s19, 16
-; SI-NEXT: s_mov_b32 s75, s78
-; SI-NEXT: s_mov_b32 s77, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_mov_b32 s77, s78
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_mov_b32 s61, s93
+; SI-NEXT: s_mov_b32 s59, s92
+; SI-NEXT: s_mov_b32 s57, s91
+; SI-NEXT: s_mov_b32 s47, s90
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -101644,11 +101669,35 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16
; SI-NEXT: .LBB65_5: ; %end
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_or_b32 s28, s28, s46
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s63, 16
+; SI-NEXT: s_or_b32 s29, s29, s46
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s88, 16
+; SI-NEXT: s_or_b32 s44, s44, s46
+; SI-NEXT: s_and_b32 s45, s45, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s48, 16
+; SI-NEXT: s_or_b32 s45, s45, s46
+; SI-NEXT: s_and_b32 s42, s42, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s78, 16
+; SI-NEXT: s_or_b32 s42, s42, s46
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s39, 16
+; SI-NEXT: s_or_b32 s43, s43, s46
+; SI-NEXT: s_and_b32 s40, s40, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s76, 16
+; SI-NEXT: s_or_b32 s40, s40, s46
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s38, 16
+; SI-NEXT: s_or_b32 s41, s41, s46
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s74, 16
; SI-NEXT: s_or_b32 s14, s14, s46
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
+; SI-NEXT: s_lshl_b32 s46, s61, 16
; SI-NEXT: s_or_b32 s15, s15, s46
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s46, s72, 16
@@ -101671,10 +101720,6 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s77, s77, 16
; SI-NEXT: s_and_b32 s21, s21, 0xffff
; SI-NEXT: s_lshl_b32 s75, s75, 16
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s73, 16
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s63, 16
; SI-NEXT: s_or_b32 s9, s9, s46
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s46, s58, 16
@@ -101684,14 +101729,8 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_or_b32 s21, s21, s75
; SI-NEXT: s_lshl_b32 s75, s94, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s73
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s90, 16
-; SI-NEXT: s_or_b32 s29, s29, s63
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s78, 16
-; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s46, s37, 16
@@ -101701,15 +101740,9 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_or_b32 s22, s22, s75
; SI-NEXT: s_and_b32 s23, s23, 0xffff
; SI-NEXT: s_lshl_b32 s75, s50, 16
-; SI-NEXT: s_or_b32 s26, s26, s73
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s49, 16
-; SI-NEXT: s_or_b32 s44, s44, s63
-; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s48, 16
-; SI-NEXT: s_or_b32 s43, s43, s61
-; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s74, 16
+; SI-NEXT: s_or_b32 s25, s25, s73
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s90, 16
; SI-NEXT: s_or_b32 s7, s7, s46
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s46, s56, 16
@@ -101721,24 +101754,16 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_or_b32 s23, s23, s75
; SI-NEXT: s_lshl_b32 s75, s92, 16
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s27, s27, s73
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s88, 16
-; SI-NEXT: s_or_b32 s45, s45, s63
-; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s76, 16
-; SI-NEXT: s_or_b32 s40, s40, s61
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s39, 16
+; SI-NEXT: s_or_b32 s26, s26, s73
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s49, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s46, s36, 16
; SI-NEXT: s_or_b32 s16, s16, s79
; SI-NEXT: s_or_b32 s20, s20, s77
; SI-NEXT: s_or_b32 s24, s24, s75
-; SI-NEXT: s_or_b32 s28, s28, s73
-; SI-NEXT: s_or_b32 s42, s42, s63
-; SI-NEXT: s_or_b32 s41, s41, s61
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s46
; SI-NEXT: v_readlane_b32 s30, v32, 10
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -102145,44 +102170,47 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v51, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20
; SI-NEXT: v_mov_b32_e32 v52, v18
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v15
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
; SI-NEXT: v_mov_b32_e32 v43, v11
; SI-NEXT: v_mov_b32_e32 v44, v10
; SI-NEXT: v_mov_b32_e32 v45, v9
@@ -102194,23 +102222,22 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v59, v3
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v28
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
@@ -102224,95 +102251,96 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB66_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v32
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v48
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v35
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v39
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v38
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v37
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -102325,23 +102353,20 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
@@ -102350,6 +102375,9 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
@@ -102372,19 +102400,23 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v51
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -102404,10 +102436,6 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
@@ -102475,15 +102503,13 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB66_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB66_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v62
; SI-NEXT: v_cvt_f32_f16_e32 v3, v61
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -102498,7 +102524,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v49
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_cvt_f32_f16_e32 v4, v59
; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
@@ -102510,7 +102536,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v32
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
@@ -102521,7 +102547,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v49
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v48
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v47
@@ -102532,7 +102558,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v35
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v45
@@ -102543,7 +102569,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v39
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v43
@@ -102554,7 +102580,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v41
@@ -102565,7 +102591,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v38
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v55
@@ -102587,103 +102613,103 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v37
+; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v51
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v37
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v51
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v63
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
@@ -102691,31 +102717,31 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -104753,11 +104779,11 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -104767,15 +104793,15 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB69_3
; SI-NEXT: .LBB69_2:
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr47
-; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
@@ -104791,8 +104817,6 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
@@ -104809,13 +104833,15 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: .LBB69_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s47, 1, 0
@@ -104825,9 +104851,9 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: v_readlane_b32 s47, v33, 2
; SI-NEXT: v_readlane_b32 s57, v33, 3
; SI-NEXT: v_readlane_b32 s59, v33, 4
-; SI-NEXT: v_readlane_b32 s38, v33, 5
-; SI-NEXT: v_readlane_b32 s39, v33, 6
-; SI-NEXT: v_readlane_b32 s61, v33, 7
+; SI-NEXT: v_readlane_b32 s61, v33, 5
+; SI-NEXT: v_readlane_b32 s38, v33, 6
+; SI-NEXT: v_readlane_b32 s39, v33, 7
; SI-NEXT: v_readlane_b32 s48, v33, 8
; SI-NEXT: v_readlane_b32 s63, v33, 9
; SI-NEXT: v_readlane_b32 s49, v33, 10
@@ -104870,40 +104896,40 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s46, s43, 16
-; SI-NEXT: s_lshr_b32 s47, s29, 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s46, s29, 16
+; SI-NEXT: s_lshr_b32 s47, s25, 16
+; SI-NEXT: s_lshr_b32 s76, s21, 16
; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s74, s9, 16
-; SI-NEXT: s_lshr_b32 s75, s11, 16
-; SI-NEXT: s_lshr_b32 s76, s13, 16
-; SI-NEXT: s_lshr_b32 s77, s25, 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s90, s9, 16
+; SI-NEXT: s_lshr_b32 s91, s11, 16
+; SI-NEXT: s_lshr_b32 s92, s13, 16
+; SI-NEXT: s_lshr_b32 s93, s15, 16
+; SI-NEXT: s_lshr_b32 s78, s17, 16
; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 16
-; SI-NEXT: s_mov_b32 s61, s46
-; SI-NEXT: s_mov_b32 s63, s47
-; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s78, s21, 16
-; SI-NEXT: s_lshr_b32 s79, s17, 16
-; SI-NEXT: s_mov_b32 s73, s77
-; SI-NEXT: s_mov_b32 s59, s76
-; SI-NEXT: s_mov_b32 s57, s75
-; SI-NEXT: s_mov_b32 s47, s74
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
+; SI-NEXT: s_mov_b32 s63, s46
+; SI-NEXT: s_mov_b32 s73, s47
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: s_lshr_b32 s36, s5, 16
; SI-NEXT: s_lshr_b32 s37, s7, 16
-; SI-NEXT: s_lshr_b32 s38, s15, 16
-; SI-NEXT: s_lshr_b32 s39, s41, 16
+; SI-NEXT: s_lshr_b32 s38, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s43, 16
; SI-NEXT: s_lshr_b32 s48, s45, 16
; SI-NEXT: s_lshr_b32 s49, s27, 16
; SI-NEXT: s_lshr_b32 s50, s23, 16
; SI-NEXT: s_lshr_b32 s51, s19, 16
-; SI-NEXT: s_mov_b32 s75, s78
-; SI-NEXT: s_mov_b32 s77, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_mov_b32 s77, s78
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_mov_b32 s61, s93
+; SI-NEXT: s_mov_b32 s59, s92
+; SI-NEXT: s_mov_b32 s57, s91
+; SI-NEXT: s_mov_b32 s47, s90
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -104911,11 +104937,35 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16
; SI-NEXT: .LBB69_5: ; %end
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_or_b32 s28, s28, s46
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s63, 16
+; SI-NEXT: s_or_b32 s29, s29, s46
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s88, 16
+; SI-NEXT: s_or_b32 s44, s44, s46
+; SI-NEXT: s_and_b32 s45, s45, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s48, 16
+; SI-NEXT: s_or_b32 s45, s45, s46
+; SI-NEXT: s_and_b32 s42, s42, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s78, 16
+; SI-NEXT: s_or_b32 s42, s42, s46
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s39, 16
+; SI-NEXT: s_or_b32 s43, s43, s46
+; SI-NEXT: s_and_b32 s40, s40, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s76, 16
+; SI-NEXT: s_or_b32 s40, s40, s46
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s38, 16
+; SI-NEXT: s_or_b32 s41, s41, s46
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s74, 16
; SI-NEXT: s_or_b32 s14, s14, s46
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
+; SI-NEXT: s_lshl_b32 s46, s61, 16
; SI-NEXT: s_or_b32 s15, s15, s46
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s46, s72, 16
@@ -104938,10 +104988,6 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s77, s77, 16
; SI-NEXT: s_and_b32 s21, s21, 0xffff
; SI-NEXT: s_lshl_b32 s75, s75, 16
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s73, 16
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s63, 16
; SI-NEXT: s_or_b32 s9, s9, s46
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s46, s58, 16
@@ -104951,14 +104997,8 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s21, s21, s75
; SI-NEXT: s_lshl_b32 s75, s94, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s73
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s90, 16
-; SI-NEXT: s_or_b32 s29, s29, s63
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s78, 16
-; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s46, s37, 16
@@ -104968,15 +105008,9 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s22, s22, s75
; SI-NEXT: s_and_b32 s23, s23, 0xffff
; SI-NEXT: s_lshl_b32 s75, s50, 16
-; SI-NEXT: s_or_b32 s26, s26, s73
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s49, 16
-; SI-NEXT: s_or_b32 s44, s44, s63
-; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s48, 16
-; SI-NEXT: s_or_b32 s43, s43, s61
-; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s74, 16
+; SI-NEXT: s_or_b32 s25, s25, s73
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s90, 16
; SI-NEXT: s_or_b32 s7, s7, s46
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s46, s56, 16
@@ -104988,24 +105022,16 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s23, s23, s75
; SI-NEXT: s_lshl_b32 s75, s92, 16
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s27, s27, s73
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s88, 16
-; SI-NEXT: s_or_b32 s45, s45, s63
-; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s76, 16
-; SI-NEXT: s_or_b32 s40, s40, s61
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s39, 16
+; SI-NEXT: s_or_b32 s26, s26, s73
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s49, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s46, s36, 16
; SI-NEXT: s_or_b32 s16, s16, s79
; SI-NEXT: s_or_b32 s20, s20, s77
; SI-NEXT: s_or_b32 s24, s24, s75
-; SI-NEXT: s_or_b32 s28, s28, s73
-; SI-NEXT: s_or_b32 s42, s42, s63
-; SI-NEXT: s_or_b32 s41, s41, s61
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s46
; SI-NEXT: v_readlane_b32 s30, v32, 10
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -105385,6 +105411,12 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32
+; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16
+; SI-NEXT: v_mov_b32_e32 v43, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
+; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: v_mov_b32_e32 v45, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19
; SI-NEXT: v_mov_b32_e32 v46, v8
@@ -105403,8 +105435,8 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
; SI-NEXT: v_mov_b32_e32 v61, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27
-; SI-NEXT: v_mov_b32_e32 v43, v11
-; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_mov_b32_e32 v40, v14
+; SI-NEXT: v_mov_b32_e32 v41, v13
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
@@ -105415,18 +105447,14 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45
@@ -105438,147 +105466,151 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v13
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB70_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_or_b32_e32 v8, v8, v32
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
+; SI-NEXT: v_or_b32_e32 v4, v4, v32
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: v_or_b32_e32 v0, v0, v49
-; SI-NEXT: v_or_b32_e32 v1, v1, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v41
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v40
-; SI-NEXT: v_or_b32_e32 v6, v6, v48
-; SI-NEXT: v_or_b32_e32 v7, v7, v55
-; SI-NEXT: v_or_b32_e32 v9, v9, v54
-; SI-NEXT: v_or_b32_e32 v10, v10, v39
-; SI-NEXT: v_or_b32_e32 v11, v11, v53
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_or_b32_e32 v1, v1, v55
+; SI-NEXT: v_or_b32_e32 v2, v2, v39
+; SI-NEXT: v_or_b32_e32 v3, v3, v54
+; SI-NEXT: v_or_b32_e32 v5, v5, v53
+; SI-NEXT: v_or_b32_e32 v6, v6, v38
+; SI-NEXT: v_or_b32_e32 v7, v7, v52
+; SI-NEXT: v_or_b32_e32 v8, v8, v35
+; SI-NEXT: v_or_b32_e32 v9, v9, v51
+; SI-NEXT: v_or_b32_e32 v10, v10, v37
+; SI-NEXT: v_or_b32_e32 v11, v11, v50
+; SI-NEXT: v_or_b32_e32 v12, v12, v33
+; SI-NEXT: v_or_b32_e32 v13, v13, v49
+; SI-NEXT: v_or_b32_e32 v14, v14, v36
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -105590,24 +105622,51 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v16, v16, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_or_b32_e32 v19, v19, v20
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
@@ -105627,51 +105686,33 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v12, v38
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v13, v52
-; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v14, v37
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v15, v51
-; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v36
-; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v17, v50
-; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v29, v30
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v35
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v15, v48
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v30, v30, v31
@@ -105709,72 +105750,63 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB70_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB70_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v32, v8
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v4, v32, v4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v60
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v59
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42
+; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v41
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_or_b32_e32 v1, v42, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v41, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v40, v5
-; SI-NEXT: v_or_b32_e32 v6, v48, v6
-; SI-NEXT: v_or_b32_e32 v7, v55, v7
-; SI-NEXT: v_or_b32_e32 v9, v54, v9
-; SI-NEXT: v_or_b32_e32 v10, v39, v10
-; SI-NEXT: v_or_b32_e32 v11, v53, v11
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v0, v34, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
+; SI-NEXT: v_or_b32_e32 v2, v39, v2
+; SI-NEXT: v_or_b32_e32 v3, v54, v3
+; SI-NEXT: v_or_b32_e32 v5, v53, v5
+; SI-NEXT: v_or_b32_e32 v6, v38, v6
+; SI-NEXT: v_or_b32_e32 v7, v52, v7
+; SI-NEXT: v_or_b32_e32 v8, v35, v8
+; SI-NEXT: v_or_b32_e32 v9, v51, v9
+; SI-NEXT: v_or_b32_e32 v10, v37, v10
+; SI-NEXT: v_or_b32_e32 v11, v50, v11
+; SI-NEXT: v_or_b32_e32 v12, v33, v12
+; SI-NEXT: v_or_b32_e32 v13, v49, v13
+; SI-NEXT: v_or_b32_e32 v14, v36, v14
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -105783,21 +105815,52 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_or_b32_e32 v19, v20, v19
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v21, v20
@@ -105820,70 +105883,46 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v24, v23
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v38, v12
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v25, v24
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v52, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v26, v25
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v37, v14
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v27, v26
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v51, v15
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v28, v27
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v36, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v29, v28
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v50, v17
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v30, v29
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v35, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v48, v15
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
@@ -106227,8 +106266,8 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
-; SI-NEXT: s_lshr_b32 s12, s11, 16
-; SI-NEXT: s_lshr_b32 s64, s13, 16
+; SI-NEXT: s_lshr_b32 s65, s11, 16
+; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s63, s15, 16
; SI-NEXT: s_lshr_b32 s72, s73, 16
; SI-NEXT: s_lshr_b32 s74, s75, 16
@@ -106247,8 +106286,8 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v33, s12, 0
-; SI-NEXT: v_writelane_b32 v33, s64, 1
+; SI-NEXT: v_writelane_b32 v33, s10, 0
+; SI-NEXT: v_writelane_b32 v33, s12, 1
; SI-NEXT: s_cbranch_scc0 .LBB71_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s5, s16, 0xffff
@@ -106338,24 +106377,24 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s14, s63
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s66, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s67, 16
-; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_or_b32 s67, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB71_3
; SI-NEXT: .LBB71_2:
; SI-NEXT: s_mov_b32 s14, s63
-; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
@@ -106512,15 +106551,15 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s66, s4, 0x30000
@@ -108447,23 +108486,23 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr48
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr48
; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr51
-; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr38
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr35
@@ -108665,26 +108704,26 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v18
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v6
; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v1
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; VI-NEXT: .LBB72_2: ; %Flow
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
@@ -108860,106 +108899,105 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v18
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v6
; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v1
; VI-NEXT: .LBB72_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
+; VI-NEXT: v_perm_b32 v11, v11, v38, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v4, v4, v51, s4
; VI-NEXT: v_perm_b32 v8, v8, v50, s4
-; VI-NEXT: v_perm_b32 v38, v38, v52, s4
-; VI-NEXT: v_perm_b32 v7, v7, v37, s4
-; VI-NEXT: v_perm_b32 v37, v45, v53, s4
-; VI-NEXT: v_perm_b32 v1, v1, v48, s4
-; VI-NEXT: v_perm_b32 v48, v47, v54, s4
-; VI-NEXT: v_perm_b32 v41, v61, v41, s4
-; VI-NEXT: v_perm_b32 v2, v2, v33, s4
-; VI-NEXT: v_perm_b32 v33, v58, v40, s4
-; VI-NEXT: v_perm_b32 v3, v3, v59, s4
-; VI-NEXT: v_perm_b32 v39, v62, v39, s4
-; VI-NEXT: v_perm_b32 v5, v5, v43, s4
-; VI-NEXT: v_perm_b32 v6, v6, v56, s4
+; VI-NEXT: v_perm_b32 v50, v45, v53, s4
+; VI-NEXT: v_perm_b32 v51, v57, v52, s4
+; VI-NEXT: v_perm_b32 v3, v3, v33, s4
+; VI-NEXT: v_perm_b32 v33, v62, v39, s4
+; VI-NEXT: v_perm_b32 v39, v47, v54, s4
+; VI-NEXT: v_perm_b32 v48, v48, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; VI-NEXT: v_or_b32_e32 v1, v1, v48
+; VI-NEXT: v_perm_b32 v6, v6, v43, s4
+; VI-NEXT: v_perm_b32 v10, v10, v44, s4
+; VI-NEXT: v_perm_b32 v2, v2, v59, s4
+; VI-NEXT: v_perm_b32 v40, v58, v40, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v7, v7, v60, s4
; VI-NEXT: v_perm_b32 v9, v9, v46, s4
-; VI-NEXT: v_perm_b32 v10, v10, v60, s4
-; VI-NEXT: v_perm_b32 v11, v11, v57, s4
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v38, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v12, v12, v36, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v14, v14, v38, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v36, v36, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v13, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v14, v14, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v36, v36, v52, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v50, v50, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v38, v52, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v52, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v16, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v16, v16, v52, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v51, v51, v52, s4
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v52, v52, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v52, s4
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v17, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v52, s4
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v52, v52, v53, s4
-; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v41
-; VI-NEXT: v_or_b32_e32 v1, v1, v53
+; VI-NEXT: v_perm_b32 v18, v18, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v44, v49, s4
+; VI-NEXT: v_perm_b32 v1, v37, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v3, v20, v55, s4
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v53, v53, v43, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
@@ -108969,7 +109007,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
@@ -108979,7 +109017,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
@@ -108989,7 +109027,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
@@ -109009,17 +109047,17 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; VI-NEXT: v_perm_b32 v1, v35, v34, s4
@@ -109222,162 +109260,161 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; kill: killed $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(25)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
@@ -109391,6 +109428,8 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB72_2
@@ -109417,173 +109456,176 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v2
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[27:28]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[23:24]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[19:20]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[17:18]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[15:16]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[11:12]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v14
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v4
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v11
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v5
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v1
; GFX9-NEXT: v_mov_b32_e32 v55, v53
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: .LBB72_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v38, v34
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB72_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: s_waitcnt vmcnt(24)
@@ -109621,12 +109663,12 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
+; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
+; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
@@ -109636,22 +109678,22 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v6
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
@@ -109727,163 +109769,167 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v21
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v7
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v5
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v3
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v1
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB72_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v5, v5, v37, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v33, s4
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v5, v5, v49, s4
; GFX9-NEXT: v_perm_b32 v4, v4, v52, s4
; GFX9-NEXT: v_perm_b32 v6, v6, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v8, v8, v33, s4
-; GFX9-NEXT: v_perm_b32 v2, v2, v46, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v45, s4
-; GFX9-NEXT: v_perm_b32 v41, v62, v41, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v47, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v11, v11, v38, s4
+; GFX9-NEXT: v_perm_b32 v41, v46, v41, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v62, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
-; GFX9-NEXT: v_perm_b32 v49, v49, v40, s4
-; GFX9-NEXT: v_perm_b32 v39, v56, v39, s4
-; GFX9-NEXT: v_perm_b32 v34, v34, v54, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v43, s4
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v11, v11, v37, s4
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v33, v50, v51, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v35, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v37, v37, v40, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v39, v58, v39, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v60, s4
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v12, v12, v37, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v35, v35, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v37, v37, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v49, v34, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v8, v8, v33, s4
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v17, v17, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v33, v34, v33, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v9, v9, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v10, v10, v34, s4
+; GFX9-NEXT: v_perm_b32 v34, v56, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v50, v50, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v38, v63, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v17, v17, v52, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v18, v18, v52, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v52, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v14, v51, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v51, v51, v45, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v51, v51, v45, s4
+; GFX9-NEXT: v_perm_b32 v52, v52, v45, s4
; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v48, v48, v45, s4
+; GFX9-NEXT: v_perm_b32 v50, v50, v45, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v44, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v54, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -109901,7 +109947,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -109910,33 +109956,33 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v13
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v1, v60, v55, s4
+; GFX9-NEXT: v_perm_b32 v1, v48, v55, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: v_perm_b32 v1, v53, v42, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v58, v36, s4
+; GFX9-NEXT: v_perm_b32 v1, v36, v35, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v19, v61, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v44, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: v_perm_b32 v1, v20, v63, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v57, s4
+; GFX9-NEXT: v_perm_b32 v1, v20, v59, s4
+; GFX9-NEXT: v_perm_b32 v2, v43, v57, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v21, v38, s4
+; GFX9-NEXT: v_perm_b32 v2, v21, v47, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
@@ -115691,24 +115737,24 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:184
; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v21
; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25
; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27
@@ -115716,7 +115762,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0
-; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -115782,13 +115828,13 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v38
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v39
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
@@ -115807,16 +115853,16 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v50
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v40
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192
@@ -115828,14 +115874,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:68
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52
; SI-NEXT: s_waitcnt vmcnt(14)
@@ -116039,7 +116085,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v49
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
@@ -116057,7 +116103,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
@@ -116067,12 +116113,12 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v54
+; SI-NEXT: v_or_b32_e32 v2, v2, v35
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
-; SI-NEXT: v_or_b32_e32 v3, v40, v3
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v3, v41, v3
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v1
@@ -116099,9 +116145,9 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr37
@@ -116109,14 +116155,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v53
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
@@ -116138,11 +116184,11 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
+; SI-NEXT: v_or_b32_e32 v5, v5, v51
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v56
@@ -116155,8 +116201,8 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v46
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v35
-; SI-NEXT: v_or_b32_e32 v8, v8, v44
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v49
+; SI-NEXT: v_or_b32_e32 v8, v8, v36
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xff, v33
@@ -116168,11 +116214,11 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v63
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v10, v10, v11
@@ -116193,9 +116239,9 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xff, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v38
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v57
@@ -116220,14 +116266,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v44
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -116659,7 +116705,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
@@ -116687,18 +116733,18 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_or_b32_e32 v1, v41, v1
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v40, v2
+; SI-NEXT: v_or_b32_e32 v2, v41, v2
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v53, v3
+; SI-NEXT: v_or_b32_e32 v3, v34, v3
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -116725,7 +116771,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v1, v35, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
@@ -116739,7 +116785,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
+; SI-NEXT: v_or_b32_e32 v2, v53, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
@@ -116766,7 +116812,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
+; SI-NEXT: v_or_b32_e32 v5, v51, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -116788,9 +116834,9 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v44, v8
+; SI-NEXT: v_or_b32_e32 v8, v36, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -116834,7 +116880,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v11
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -116865,7 +116911,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v13
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v44
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
@@ -117234,35 +117280,35 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:104
; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:100
; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:96
; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:92
; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:60
; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:40
; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24
; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
@@ -117469,13 +117515,13 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: s_mov_b32 s6, 0xc0c0004
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v9, v33, v62, s6
+; VI-NEXT: v_perm_b32 v9, v62, v33, s6
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_perm_b32 v10, v63, v60, s6
+; VI-NEXT: v_perm_b32 v10, v60, v54, s6
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_perm_b32 v11, v53, v58, s6
+; VI-NEXT: v_perm_b32 v11, v58, v53, s6
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_perm_b32 v12, v51, v56, s6
+; VI-NEXT: v_perm_b32 v12, v56, v51, s6
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_perm_b32 v13, v37, v36, s6
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -117483,14 +117529,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_perm_b32 v15, v49, v48, s6
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; implicit-def: $vgpr45
@@ -117577,40 +117623,40 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v8, v8, v41, s6
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_perm_b32 v8, v55, v34, s6
+; VI-NEXT: v_perm_b32 v8, v55, v63, s6
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_perm_b32 v9, v61, v32, s6
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_perm_b32 v10, v59, v54, s6
+; VI-NEXT: v_perm_b32 v10, v59, v38, s6
; VI-NEXT: v_or_b32_e32 v10, v10, v11
; VI-NEXT: v_perm_b32 v11, v57, v52, s6
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v47, v38, s6
+; VI-NEXT: v_perm_b32 v12, v47, v34, s6
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_perm_b32 v13, v35, v46, s6
+; VI-NEXT: v_perm_b32 v13, v50, v46, s6
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_perm_b32 v14, v43, v50, s6
+; VI-NEXT: v_perm_b32 v14, v43, v35, s6
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_perm_b32 v15, v39, v42, s6
+; VI-NEXT: v_perm_b32 v15, v42, v39, s6
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v17, v16, s6
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
@@ -117970,10 +118016,10 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v31, 0x300
; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41
-; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60
-; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56
+; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v53
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v51
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36
; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44
; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48
@@ -117998,6 +118044,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_add_u16_e32 v0, 3, v0
; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1
@@ -118011,34 +118058,35 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23
-; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26
-; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: s_waitcnt vmcnt(13)
; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17
-; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: s_waitcnt vmcnt(12)
; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6
-; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: s_waitcnt vmcnt(11)
; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19
-; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: s_waitcnt vmcnt(9)
; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7
-; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: s_waitcnt vmcnt(8)
; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: s_waitcnt vmcnt(7)
; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: s_waitcnt vmcnt(6)
; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8
-; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -118143,9 +118191,9 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_add_u16_e32 v8, 3, v55
-; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34
+; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v9, 3, v33
+; VI-NEXT: v_add_u16_e32 v9, 3, v62
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v8, 0x300, v8
; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -118153,15 +118201,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v9, 3, v61
; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v10, 3, v63
+; VI-NEXT: v_add_u16_e32 v10, 3, v60
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v9, 0x300, v9
; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_add_u16_e32 v10, 3, v59
-; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v54
+; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v38
; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v11, 3, v53
+; VI-NEXT: v_add_u16_e32 v11, 3, v58
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v10, 0x300, v10
; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -118169,20 +118217,20 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v11, 3, v57
; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52
; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; VI-NEXT: v_add_u16_e32 v12, 3, v51
+; VI-NEXT: v_add_u16_e32 v12, 3, v56
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v11, 0x300, v11
; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v11, v11, v12
; VI-NEXT: v_add_u16_e32 v12, 3, v47
-; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v38
+; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v34
; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v13, 3, v37
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v12, 0x300, v12
; VI-NEXT: v_add_u16_sdwa v13, v13, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v12, v12, v13
-; VI-NEXT: v_add_u16_e32 v13, 3, v35
+; VI-NEXT: v_add_u16_e32 v13, 3, v50
; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v46
; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 3, v45
@@ -118191,32 +118239,29 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v14, v14, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v13, v13, v14
; VI-NEXT: v_add_u16_e32 v14, 3, v43
-; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v50
+; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v35
; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v15, 3, v49
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_e32 v14, 0x300, v14
; VI-NEXT: v_add_u16_sdwa v15, v15, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v14, v14, v15
-; VI-NEXT: v_add_u16_e32 v15, 3, v39
-; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v42
+; VI-NEXT: v_add_u16_e32 v15, 3, v42
+; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v39
; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; VI-NEXT: v_add_u16_e32 v15, 0x300, v15
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_add_u16_e32 v16, 3, v16
; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; VI-NEXT: s_waitcnt vmcnt(2)
; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -118519,31 +118564,31 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112
; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108
; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96
; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:88
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84
; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80
; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68
; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64
; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52
; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48
; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44
; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:32
; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:12
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(32)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
@@ -118621,7 +118666,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376
; GFX9-NEXT: s_waitcnt vmcnt(3)
@@ -118751,13 +118796,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6
+; GFX9-NEXT: v_perm_b32 v10, v55, v63, s6
; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6
; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6
; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6
; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6
; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6
; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -118841,40 +118887,39 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_perm_b32 v8, v35, v42, s6
-; GFX9-NEXT: v_perm_b32 v9, v41, v48, s6
+; GFX9-NEXT: v_perm_b32 v8, v48, v42, s6
+; GFX9-NEXT: v_perm_b32 v9, v41, v35, s6
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6
+; GFX9-NEXT: v_perm_b32 v9, v40, v39, s6
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6
+; GFX9-NEXT: v_perm_b32 v10, v32, v62, s6
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_perm_b32 v11, v54, v59, s6
+; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6
+; GFX9-NEXT: v_perm_b32 v12, v58, v52, s6
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6
+; GFX9-NEXT: v_perm_b32 v13, v47, v37, s6
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6
+; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6
; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14
; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr44
@@ -119017,202 +119062,202 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: .LBB74_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB74_4
@@ -119238,8 +119283,8 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48
-; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v35
+; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60
; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38
; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56
@@ -119249,56 +119294,53 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(24)
+; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0
-; GFX9-NEXT: s_waitcnt vmcnt(21)
-; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2
+; GFX9-NEXT: s_waitcnt vmcnt(19)
; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3
; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8
; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
+; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
+; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
+; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
+; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v9
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19
; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20
; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7
; GFX9-NEXT: v_lshlrev_b16_e32 v22, 8, v22
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23
; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24
; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
+; GFX9-NEXT: v_lshlrev_b16_e32 v26, 8, v26
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
+; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
+; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; GFX9-NEXT: v_lshlrev_b16_e32 v29, 8, v29
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
+; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
+; GFX9-NEXT: v_lshlrev_b16_e32 v31, 8, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v1, 3, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -119402,7 +119444,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX9-NEXT: v_add_u16_e32 v8, 3, v35
+; GFX9-NEXT: v_add_u16_e32 v8, 3, v48
; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v42
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 3, v41
@@ -119410,15 +119452,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8
-; GFX9-NEXT: v_add_u16_e32 v9, 3, v39
-; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v40
+; GFX9-NEXT: v_add_u16_e32 v9, 3, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v39
; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v10, 3, v55
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9
-; GFX9-NEXT: v_add_u16_e32 v10, 3, v63
+; GFX9-NEXT: v_add_u16_e32 v10, 3, v32
; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62
; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 3, v61
@@ -119426,16 +119468,16 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10
-; GFX9-NEXT: v_add_u16_e32 v11, 3, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v59
+; GFX9-NEXT: v_add_u16_e32 v11, 3, v59
+; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v12, 3, v53
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12
; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11
-; GFX9-NEXT: v_add_u16_e32 v12, 3, v37
-; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58
+; GFX9-NEXT: v_add_u16_e32 v12, 3, v58
+; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v52
; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 3, v57
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -119443,14 +119485,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12
; GFX9-NEXT: v_add_u16_e32 v13, 3, v47
-; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52
+; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v37
; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v14, 3, v51
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13
; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14
; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13
-; GFX9-NEXT: v_add_u16_e32 v14, 3, v33
+; GFX9-NEXT: v_add_u16_e32 v14, 3, v36
; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46
; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v15, 3, v45
@@ -119468,7 +119510,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_add_u16_e32 v16, 3, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -119477,7 +119519,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u16_e32 v17, 3, v17
; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
@@ -119686,9 +119728,12 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-; GFX9-NEXT: v_add_u16_e32 v32, 3, v36
-; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+; GFX9-NEXT: v_add_u16_e32 v32, 3, v33
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33
+; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v32
; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31
; GFX9-NEXT: .LBB74_4: ; %end
@@ -135371,44 +135416,47 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v51, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20
; SI-NEXT: v_mov_b32_e32 v52, v18
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v15
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
; SI-NEXT: v_mov_b32_e32 v43, v11
; SI-NEXT: v_mov_b32_e32 v44, v10
; SI-NEXT: v_mov_b32_e32 v45, v9
@@ -135420,23 +135468,22 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v59, v3
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v28
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
@@ -135450,95 +135497,96 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB82_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v32
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v48
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v35
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v39
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v38
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v37
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -135551,23 +135599,20 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; kill: killed $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: ; kill: killed $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
@@ -135576,6 +135621,9 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
@@ -135598,19 +135646,23 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v51
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -135630,10 +135682,6 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
@@ -135701,15 +135749,13 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB82_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB82_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v50
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v62
; SI-NEXT: v_cvt_f32_f16_e32 v3, v61
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -135724,7 +135770,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v49
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_cvt_f32_f16_e32 v4, v59
; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
@@ -135736,7 +135782,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v32
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
@@ -135747,7 +135793,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v49
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v48
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v47
@@ -135758,7 +135804,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v35
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v45
@@ -135769,7 +135815,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v39
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v43
@@ -135780,7 +135826,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v41
@@ -135791,7 +135837,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v38
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v55
@@ -135813,103 +135859,103 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v37
+; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v51
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v37
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v51
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v63
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
@@ -135917,31 +135963,31 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -138604,6 +138650,12 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32
+; SI-NEXT: v_mov_b32_e32 v42, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16
+; SI-NEXT: v_mov_b32_e32 v43, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
+; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: v_mov_b32_e32 v45, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19
; SI-NEXT: v_mov_b32_e32 v46, v8
@@ -138622,8 +138674,8 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
; SI-NEXT: v_mov_b32_e32 v61, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27
-; SI-NEXT: v_mov_b32_e32 v43, v11
-; SI-NEXT: v_mov_b32_e32 v44, v10
+; SI-NEXT: v_mov_b32_e32 v40, v14
+; SI-NEXT: v_mov_b32_e32 v41, v13
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
@@ -138634,18 +138686,14 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17
; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45
@@ -138657,147 +138705,151 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v13
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB86_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_or_b32_e32 v8, v8, v32
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
+; SI-NEXT: v_or_b32_e32 v4, v4, v32
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: v_or_b32_e32 v0, v0, v49
-; SI-NEXT: v_or_b32_e32 v1, v1, v42
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v41
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v40
-; SI-NEXT: v_or_b32_e32 v6, v6, v48
-; SI-NEXT: v_or_b32_e32 v7, v7, v55
-; SI-NEXT: v_or_b32_e32 v9, v9, v54
-; SI-NEXT: v_or_b32_e32 v10, v10, v39
-; SI-NEXT: v_or_b32_e32 v11, v11, v53
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_or_b32_e32 v1, v1, v55
+; SI-NEXT: v_or_b32_e32 v2, v2, v39
+; SI-NEXT: v_or_b32_e32 v3, v3, v54
+; SI-NEXT: v_or_b32_e32 v5, v5, v53
+; SI-NEXT: v_or_b32_e32 v6, v6, v38
+; SI-NEXT: v_or_b32_e32 v7, v7, v52
+; SI-NEXT: v_or_b32_e32 v8, v8, v35
+; SI-NEXT: v_or_b32_e32 v9, v9, v51
+; SI-NEXT: v_or_b32_e32 v10, v10, v37
+; SI-NEXT: v_or_b32_e32 v11, v11, v50
+; SI-NEXT: v_or_b32_e32 v12, v12, v33
+; SI-NEXT: v_or_b32_e32 v13, v13, v49
+; SI-NEXT: v_or_b32_e32 v14, v14, v36
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -138809,24 +138861,51 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; kill: killed $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v16, v16, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_or_b32_e32 v19, v19, v20
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
@@ -138846,51 +138925,33 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v12, v38
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v13, v52
-; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v14, v37
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v15, v51
-; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v36
-; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v17, v50
-; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v29, v30
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v35
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v15, v48
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v30, v30, v31
@@ -138928,72 +138989,63 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB86_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB86_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v32, v8
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v4, v32, v4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v60
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v59
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v58
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42
+; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v41
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_or_b32_e32 v1, v42, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v41, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v40, v5
-; SI-NEXT: v_or_b32_e32 v6, v48, v6
-; SI-NEXT: v_or_b32_e32 v7, v55, v7
-; SI-NEXT: v_or_b32_e32 v9, v54, v9
-; SI-NEXT: v_or_b32_e32 v10, v39, v10
-; SI-NEXT: v_or_b32_e32 v11, v53, v11
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v0, v34, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
+; SI-NEXT: v_or_b32_e32 v2, v39, v2
+; SI-NEXT: v_or_b32_e32 v3, v54, v3
+; SI-NEXT: v_or_b32_e32 v5, v53, v5
+; SI-NEXT: v_or_b32_e32 v6, v38, v6
+; SI-NEXT: v_or_b32_e32 v7, v52, v7
+; SI-NEXT: v_or_b32_e32 v8, v35, v8
+; SI-NEXT: v_or_b32_e32 v9, v51, v9
+; SI-NEXT: v_or_b32_e32 v10, v37, v10
+; SI-NEXT: v_or_b32_e32 v11, v50, v11
+; SI-NEXT: v_or_b32_e32 v12, v33, v12
+; SI-NEXT: v_or_b32_e32 v13, v49, v13
+; SI-NEXT: v_or_b32_e32 v14, v36, v14
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -139002,21 +139054,52 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_or_b32_e32 v19, v20, v19
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v21, v20
@@ -139039,70 +139122,46 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v24, v23
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v38, v12
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v25, v24
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v52, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v26, v25
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v37, v14
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v27, v26
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v15, v51, v15
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v28, v27
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v36, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v29, v28
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v17, v50, v17
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v30, v29
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v35, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v48, v15
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
@@ -139446,8 +139505,8 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
-; SI-NEXT: s_lshr_b32 s12, s11, 16
-; SI-NEXT: s_lshr_b32 s64, s13, 16
+; SI-NEXT: s_lshr_b32 s65, s11, 16
+; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s63, s15, 16
; SI-NEXT: s_lshr_b32 s72, s73, 16
; SI-NEXT: s_lshr_b32 s74, s75, 16
@@ -139466,8 +139525,8 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v33, s12, 0
-; SI-NEXT: v_writelane_b32 v33, s64, 1
+; SI-NEXT: v_writelane_b32 v33, s10, 0
+; SI-NEXT: v_writelane_b32 v33, s12, 1
; SI-NEXT: s_cbranch_scc0 .LBB87_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s5, s16, 0xffff
@@ -139557,24 +139616,24 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s14, s63
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s66, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s67, 16
-; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_or_b32 s67, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB87_3
; SI-NEXT: .LBB87_2:
; SI-NEXT: s_mov_b32 s14, s63
-; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s12, s65
; SI-NEXT: s_mov_b32 s10, s67
; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
@@ -139731,15 +139790,15 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: v_readlane_b32 s5, v33, 0
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s66, s4, 0x30000
@@ -140459,33 +140518,51 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v29
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; kill: killed $vgpr21
; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; kill: killed $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; kill: killed $vgpr21
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; kill: killed $vgpr23
; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; kill: killed $vgpr21
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
@@ -140495,454 +140572,589 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v18
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124
; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:136
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; kill: killed $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:168
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v25
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; kill: killed $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; kill: killed $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; kill: killed $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; kill: killed $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; kill: killed $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(3) expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v0
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256
+; SI-NEXT: v_lshlrev_b32_e32 v11, 8, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v6
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:300
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:292
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:252
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:260
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v0
+; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v1
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v9
+; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v5
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:296
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:292
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:308
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:336
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:332
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:324
+; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v13
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:336
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:344
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:328
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:324
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:340
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v3
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v13
+; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v7
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v15
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:352
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:368
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:376
+; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v13
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:368
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:376
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:348
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:364
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360
; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:356
; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:372
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:384
+; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384
; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:380
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v61, 24, v13
-; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; kill: killed $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: v_lshlrev_b32_e32 v61, 24, v7
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v15
-; SI-NEXT: ; kill: killed $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; kill: killed $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v13
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:28
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:20
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:12
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:8
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:116
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:60
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:52
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:44
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:52
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:44
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:40
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB88_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v31, v7, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v29, v45, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v53
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v51
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v12
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v1, v53, v1
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v4, v48, v4
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v22
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v1, v4, v1
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v50
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v30, v45, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v55
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v54
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v28, v5, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v42
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v29, v60, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v56
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v52
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_or_b32_e32 v31, v40, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
+; SI-NEXT: v_or_b32_e32 v32, v47, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v41
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v14
+; SI-NEXT: v_or_b32_e32 v13, v14, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v2, v2, v11
+; SI-NEXT: v_or_b32_e32 v1, v1, v43
+; SI-NEXT: v_or_b32_e32 v4, v4, v59
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v4
+; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v13, v14, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v11, v11, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v13, v13, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v14, v15, v14
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
-; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v14, v15, v14
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v14, v15, v14
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v13, v13, v15
+; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
@@ -140952,7 +141164,7 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
@@ -140961,585 +141173,408 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v16, v15, v16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v16
+; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v15
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v15, v18, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v16, v18, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v18
-; SI-NEXT: v_or_b32_e32 v15, v18, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v18, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v18, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v18, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v18, v15, v18
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; SI-NEXT: v_or_b32_e32 v18, v16, v18
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v16, v19, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v19, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v19, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v21, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v21
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_or_b32_e32 v19, v16, v19
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v39, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v21, v16, v20
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
+; SI-NEXT: v_or_b32_e32 v3, v16, v3
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v3, v16, v3
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v48, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_or_b32_e32 v3, v3, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v16, v7
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
+; SI-NEXT: v_or_b32_e32 v7, v16, v7
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v7, v16, v7
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v49, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v49
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_or_b32_e32 v7, v7, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v50, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v23, v16, v20
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v51, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v25, v16, v20
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v52, v15, v19
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v52
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v22, v19, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v19
-; SI-NEXT: v_or_b32_e32 v26, v19, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v51
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v1
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_or_b32_e32 v27, v16, v20
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v2
+; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v25, v2, v15
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v24, v17, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v30, v15, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
+; SI-NEXT: v_or_b32_e32 v12, v16, v12
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v7
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v28, v5, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v10
-; SI-NEXT: v_or_b32_e32 v32, v4, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v9
-; SI-NEXT: v_or_b32_e32 v33, v4, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v34, v47, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v41
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v42
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_or_b32_e32 v35, v60, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v56
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v46
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v36, v5, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v44
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_or_b32_e32 v27, v55, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v37, v61, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v58
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v57
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_or_b32_e32 v3, v3, v43
-; SI-NEXT: v_or_b32_e32 v4, v4, v63
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v6, v6, v12
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v9
+; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v46
+; SI-NEXT: v_or_b32_e32 v33, v6, v5
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v57
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v35, v62, v6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v44
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_or_b32_e32 v38, v62, v5
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v4
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: v_or_b32_e32 v34, v61, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v58
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: v_or_b32_e32 v5, v5, v63
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v5
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; kill: killed $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
@@ -141547,62 +141582,29 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB88_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: s_movk_i32 s6, 0x300
-; SI-NEXT: v_or_b32_e32 v8, v43, v8
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
-; SI-NEXT: v_or_b32_e32 v0, v45, v0
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v0, v8
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
-; SI-NEXT: v_or_b32_e32 v0, v10, v0
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_or_b32_e32 v6, v55, v6
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v6, v6, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v3
-; SI-NEXT: v_or_b32_e32 v0, v12, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_or_b32_e32 v1, v7, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v7, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v58
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v57
-; SI-NEXT: v_or_b32_e32 v11, v63, v11
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x300, v11
-; SI-NEXT: v_or_b32_e32 v13, v62, v13
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v56
+; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v58
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v57
+; SI-NEXT: v_or_b32_e32 v13, v63, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x300, v13
+; SI-NEXT: v_or_b32_e32 v14, v62, v14
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v13, v14, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v56
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v46
-; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v44
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: s_movk_i32 s6, 0x300
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13
+; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
; SI-NEXT: v_or_b32_e32 v15, v61, v15
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v41
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v42
@@ -141613,127 +141615,138 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v16, v60, v16
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v53
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_or_b32_e32 v9, v9, v16
-; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9
-; SI-NEXT: v_or_b32_e32 v14, v47, v14
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v9, v14, v9
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v9
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v3
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v54
+; SI-NEXT: v_or_b32_e32 v16, v18, v16
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v52
+; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_or_b32_e32 v18, v47, v18
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v16, v18, v16
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v49
+; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
+; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v50
+; SI-NEXT: v_or_b32_e32 v18, v43, v18
+; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18
+; SI-NEXT: v_or_b32_e32 v19, v45, v19
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v22
+; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_or_b32_e32 v5, v19, v5
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v0, v51, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_or_b32_e32 v17, v40, v17
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v1, v53, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_or_b32_e32 v5, v17, v5
+; SI-NEXT: v_or_b32_e32 v17, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v26
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v5, v1
-; SI-NEXT: v_or_b32_e32 v10, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v7
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v10
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v6
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_or_b32_e32 v1, v48, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v9, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v4, v0
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v10
+; SI-NEXT: v_or_b32_e32 v0, v11, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_or_b32_e32 v1, v17, v1
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v12, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v8
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v8, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v18
+; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v8
+; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v5
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v4
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v14, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v14
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v1, v6, v1
+; SI-NEXT: v_or_b32_e32 v10, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v17
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v6
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v16, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x3000000, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v10
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v1, v12, v1
+; SI-NEXT: v_or_b32_e32 v11, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v17, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v17
+; SI-NEXT: v_or_b32_e32 v12, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -141741,19 +141754,17 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v18, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v18
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v14
+; SI-NEXT: v_or_b32_e32 v19, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -141761,17 +141772,17 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v19, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v19
+; SI-NEXT: v_or_b32_e32 v20, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v20
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -141779,19 +141790,18 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v20, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v20
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v20
+; SI-NEXT: v_or_b32_e32 v21, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v21
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -141799,11 +141809,11 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v21, v1, v0
+; SI-NEXT: v_or_b32_e32 v22, v1, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v21
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v22
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -141820,13 +141830,11 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v23, v1, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
@@ -141838,15 +141846,20 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v24, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v24
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v7
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v9
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v10
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x3000000, v11
+; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v12
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v19
+; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v23
+; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v24
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
@@ -141857,33 +141870,35 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v25, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v3
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v26, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -141892,16 +141907,17 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v27, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v27
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -141910,181 +141926,178 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v28, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x3000000, v15
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v2
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v2
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v25
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v26
+; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v28
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v2
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v29, v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v29
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v30, v1, v0
-; SI-NEXT: v_or_b32_e32 v15, v30, v15
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x3000000, v11
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v27
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v25
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v26
-; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v28
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x3000000, v13
+; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v13, v30, v13
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v1
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v1
-; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v0
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v13
+; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v1
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v0
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v0
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: v_or_b32_e32 v14, v16, v14
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v16, v19, v16
-; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: v_or_b32_e32 v14, v16, v14
+; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v15, v16, v15
+; SI-NEXT: v_or_b32_e32 v14, v16, v14
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v16, v19, v16
-; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: v_or_b32_e32 v14, v16, v14
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v14
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: v_or_b32_e32 v19, v23, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v24, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: v_or_b32_e32 v19, v23, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v24, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: v_or_b32_e32 v19, v29, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v29, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: v_or_b32_e32 v19, v30, v19
-; SI-NEXT: v_or_b32_e32 v15, v19, v15
-; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v20, v30, v20
+; SI-NEXT: v_or_b32_e32 v16, v20, v16
+; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v30
-; SI-NEXT: v_or_b32_e32 v15, v30, v15
+; SI-NEXT: v_or_b32_e32 v16, v30, v16
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
; SI-NEXT: v_and_b32_e32 v30, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_or_b32_e32 v30, v31, v30
-; SI-NEXT: v_or_b32_e32 v15, v30, v15
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v16, v30, v16
+; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v31, v15
+; SI-NEXT: v_or_b32_e32 v16, v31, v16
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v31
; SI-NEXT: v_and_b32_e32 v31, 0xff, v31
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_or_b32_e32 v31, v32, v31
-; SI-NEXT: v_or_b32_e32 v15, v31, v15
+; SI-NEXT: v_or_b32_e32 v16, v31, v16
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v15
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v16
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v31
; SI-NEXT: v_and_b32_e32 v31, 0xff, v31
@@ -142103,317 +142116,348 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v31
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v15
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v16
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v30
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v19
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v20
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v29
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v23
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v24
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v28
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v16
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v14
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v27
; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v18
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v13
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v26
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v11
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v18
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v25
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v13
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v15
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v23
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v21
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v19
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v22
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v22
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v21
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v17
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v12
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v11
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v10
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v8
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v10
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v9
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v9
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v7
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v7
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v6
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v5
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v5
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v4
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v3
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v5
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v4
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v3
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v3
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v2
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v1
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
; SI-NEXT: .LBB88_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e32 v2, 1.0, v15
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v23
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v16
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v21
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v18
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v2, 1.0, v16
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v13
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v24
+; SI-NEXT: v_mul_f32_e32 v24, 1.0, v25
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v20
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v14
+; SI-NEXT: v_mul_f32_e32 v14, 1.0, v15
+; SI-NEXT: v_mul_f32_e32 v12, 1.0, v18
+; SI-NEXT: v_mul_f32_e32 v18, 1.0, v21
+; SI-NEXT: v_mul_f32_e32 v20, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v22, 1.0, v27
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v26, 1.0, v36
+; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28
+; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11
-; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
-; SI-NEXT: v_mul_f32_e32 v18, 1.0, v39
-; SI-NEXT: v_mul_f32_e32 v20, 1.0, v48
-; SI-NEXT: v_mul_f32_e32 v23, 1.0, v26
-; SI-NEXT: v_mul_f32_e32 v26, 1.0, v51
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7
-; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19
-; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14
+; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9
+; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12
+; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
+; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17
+; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
+; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_alignbit_b32 v1, v1, v2, 16
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; SI-NEXT: v_alignbit_b32 v2, v2, v3, 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_alignbit_b32 v3, v3, v4, 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_alignbit_b32 v4, v4, v5, 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_alignbit_b32 v5, v5, v6, 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v6, 1.0, v6
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_alignbit_b32 v6, v6, v7, 16
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_alignbit_b32 v7, v7, v8, 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v8, 1.0, v8
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_alignbit_b32 v8, v8, v9, 16
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_alignbit_b32 v9, v9, v10, 16
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v10, 1.0, v10
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_alignbit_b32 v10, v10, v12, 16
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v10, v10, v11, 16
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_alignbit_b32 v11, v12, v11, 16
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_alignbit_b32 v11, v11, v12, 16
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_alignbit_b32 v12, v12, v14, 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v12, v12, v13, 16
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_alignbit_b32 v13, v14, v13, 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_alignbit_b32 v13, v13, v14, 16
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_alignbit_b32 v14, v14, v15, 16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: v_alignbit_b32 v15, v15, v16, 16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_alignbit_b32 v16, v16, v17, 16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: v_alignbit_b32 v17, v17, v18, 16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_alignbit_b32 v18, v18, v19, 16
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
; SI-NEXT: v_alignbit_b32 v19, v19, v20, 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
; SI-NEXT: v_alignbit_b32 v20, v20, v21, 16
-; SI-NEXT: v_mul_f32_e32 v21, 1.0, v22
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_mul_f32_e32 v22, 1.0, v49
; SI-NEXT: v_alignbit_b32 v21, v21, v22, 16
-; SI-NEXT: v_mul_f32_e32 v22, 1.0, v25
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: v_alignbit_b32 v22, v22, v23, 16
-; SI-NEXT: v_mul_f32_e32 v23, 1.0, v24
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v50
; SI-NEXT: v_alignbit_b32 v23, v23, v24, 16
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v28
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_mul_f32_e32 v25, 1.0, v30
; SI-NEXT: v_alignbit_b32 v24, v24, v25, 16
-; SI-NEXT: v_mul_f32_e32 v25, 1.0, v31
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
; SI-NEXT: v_alignbit_b32 v25, v25, v26, 16
-; SI-NEXT: v_mul_f32_e32 v26, 1.0, v27
-; SI-NEXT: v_mul_f32_e32 v27, 1.0, v32
-; SI-NEXT: v_mul_f32_e32 v32, 1.0, v40
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v26, 1.0, v31
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
; SI-NEXT: v_alignbit_b32 v26, v26, v27, 16
-; SI-NEXT: v_mul_f32_e32 v27, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v27, 1.0, v30
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_mul_f32_e32 v28, 1.0, v52
-; SI-NEXT: v_alignbit_b32 v27, v27, v28, 16
-; SI-NEXT: v_mul_f32_e32 v28, 1.0, v34
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
-; SI-NEXT: v_mul_f32_e32 v29, 1.0, v33
-; SI-NEXT: v_alignbit_b32 v28, v28, v29, 16
-; SI-NEXT: v_mul_f32_e32 v29, 1.0, v35
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v54
-; SI-NEXT: v_alignbit_b32 v29, v29, v30, 16
; SI-NEXT: v_mul_f32_e32 v30, 1.0, v37
+; SI-NEXT: v_alignbit_b32 v27, v27, v30, 16
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v32
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_alignbit_b32 v28, v30, v28, 16
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v38
+; SI-NEXT: v_alignbit_b32 v29, v29, v30, 16
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v34
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; SI-NEXT: v_mul_f32_e32 v31, 1.0, v36
+; SI-NEXT: v_mul_f32_e32 v31, 1.0, v33
; SI-NEXT: v_alignbit_b32 v30, v30, v31, 16
-; SI-NEXT: v_mul_f32_e32 v31, 1.0, v38
+; SI-NEXT: v_mul_f32_e32 v31, 1.0, v35
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_mul_f32_e32 v32, 1.0, v39
; SI-NEXT: v_alignbit_b32 v31, v31, v32, 16
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v128i8_to_v64bf16:
@@ -143774,11 +143818,11 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:304
; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:320
; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:160
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:156
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:152
; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:144
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:140
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:136
; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:132
@@ -144021,20 +144065,20 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v10, v46, v45, s6
; GFX9-NEXT: v_or_b32_sdwa v11, v43, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-NEXT: v_perm_b32 v12, v55, v54, s6
-; GFX9-NEXT: v_perm_b32 v17, v32, v40, s6
+; GFX9-NEXT: v_perm_b32 v17, v32, v63, s6
; GFX9-NEXT: v_perm_b32 v18, v44, v34, s6
-; GFX9-NEXT: v_perm_b32 v19, v42, v63, s6
+; GFX9-NEXT: v_perm_b32 v19, v42, v40, s6
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
@@ -144515,9 +144559,9 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v11, v62, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v63
+; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v40
; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v41
-; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v63
; GFX9-NEXT: s_waitcnt vmcnt(21)
; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(20)
@@ -146740,348 +146784,350 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: v_writelane_b32 v56, s22, 7
; SI-NEXT: v_writelane_b32 v56, s21, 8
; SI-NEXT: v_writelane_b32 v56, s20, 9
-; SI-NEXT: v_writelane_b32 v56, s19, 10
-; SI-NEXT: v_writelane_b32 v56, s18, 11
-; SI-NEXT: v_writelane_b32 v56, s4, 12
+; SI-NEXT: v_writelane_b32 v56, s4, 10
; SI-NEXT: v_readfirstlane_b32 s4, v29
-; SI-NEXT: v_writelane_b32 v56, s4, 13
+; SI-NEXT: v_writelane_b32 v56, s4, 11
; SI-NEXT: v_readfirstlane_b32 s4, v28
-; SI-NEXT: v_writelane_b32 v56, s4, 14
+; SI-NEXT: v_writelane_b32 v56, s4, 12
; SI-NEXT: v_readfirstlane_b32 s4, v27
-; SI-NEXT: v_writelane_b32 v56, s4, 15
+; SI-NEXT: v_writelane_b32 v56, s4, 13
; SI-NEXT: v_readfirstlane_b32 s4, v26
-; SI-NEXT: v_writelane_b32 v56, s4, 16
+; SI-NEXT: v_writelane_b32 v56, s4, 14
; SI-NEXT: v_readfirstlane_b32 s4, v25
-; SI-NEXT: v_writelane_b32 v56, s4, 17
+; SI-NEXT: v_writelane_b32 v56, s4, 15
; SI-NEXT: v_readfirstlane_b32 s4, v24
-; SI-NEXT: v_writelane_b32 v56, s4, 18
+; SI-NEXT: v_writelane_b32 v56, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v23
-; SI-NEXT: v_writelane_b32 v56, s4, 19
+; SI-NEXT: v_writelane_b32 v56, s4, 17
; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332
-; SI-NEXT: v_writelane_b32 v56, s4, 20
+; SI-NEXT: v_writelane_b32 v56, s4, 18
; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: v_writelane_b32 v56, s4, 21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:316
+; SI-NEXT: v_writelane_b32 v56, s4, 19
; SI-NEXT: v_readfirstlane_b32 s4, v20
-; SI-NEXT: v_writelane_b32 v56, s4, 22
+; SI-NEXT: v_writelane_b32 v56, s4, 20
; SI-NEXT: v_readfirstlane_b32 s4, v19
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316
-; SI-NEXT: v_writelane_b32 v56, s4, 23
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:324
+; SI-NEXT: v_writelane_b32 v56, s4, 21
; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_writelane_b32 v56, s4, 24
+; SI-NEXT: v_writelane_b32 v56, s4, 22
; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_writelane_b32 v56, s4, 25
+; SI-NEXT: v_writelane_b32 v56, s4, 23
; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: v_writelane_b32 v56, s4, 26
+; SI-NEXT: v_writelane_b32 v56, s4, 24
; SI-NEXT: v_readfirstlane_b32 s4, v15
-; SI-NEXT: v_writelane_b32 v56, s4, 27
+; SI-NEXT: v_writelane_b32 v56, s4, 25
; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: v_writelane_b32 v56, s4, 28
+; SI-NEXT: v_writelane_b32 v56, s4, 26
; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: v_writelane_b32 v56, s4, 29
+; SI-NEXT: v_writelane_b32 v56, s4, 27
; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: v_writelane_b32 v56, s4, 30
-; SI-NEXT: v_readfirstlane_b32 s4, v11
-; SI-NEXT: v_writelane_b32 v56, s4, 31
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: v_writelane_b32 v56, s4, 32
-; SI-NEXT: v_readfirstlane_b32 s4, v9
-; SI-NEXT: v_writelane_b32 v56, s4, 33
-; SI-NEXT: s_mov_b32 s9, s16
-; SI-NEXT: v_readfirstlane_b32 s93, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264
-; SI-NEXT: v_readfirstlane_b32 s94, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
-; SI-NEXT: v_readfirstlane_b32 s18, v6
+; SI-NEXT: v_writelane_b32 v56, s4, 28
+; SI-NEXT: v_readfirstlane_b32 s49, v0
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s41, v9
+; SI-NEXT: v_readfirstlane_b32 s44, v8
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:284
+; SI-NEXT: v_readfirstlane_b32 s58, v7
+; SI-NEXT: v_readfirstlane_b32 s63, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
-; SI-NEXT: v_readfirstlane_b32 s16, v5
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264
+; SI-NEXT: v_readfirstlane_b32 s89, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: v_readfirstlane_b32 s22, v4
+; SI-NEXT: v_readfirstlane_b32 s72, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272
-; SI-NEXT: v_readfirstlane_b32 s52, v3
+; SI-NEXT: v_readfirstlane_b32 s93, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:292
-; SI-NEXT: v_readfirstlane_b32 s51, v0
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s29, v11
+; SI-NEXT: v_readfirstlane_b32 s22, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:296
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:292
; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
-; SI-NEXT: s_mov_b32 s11, s17
+; SI-NEXT: s_mov_b32 s6, s17
; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v21
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
-; SI-NEXT: v_readfirstlane_b32 s69, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232
-; SI-NEXT: v_readfirstlane_b32 s37, v23
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
-; SI-NEXT: v_readfirstlane_b32 s49, v20
+; SI-NEXT: v_readfirstlane_b32 s94, v22
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:216
+; SI-NEXT: v_readfirstlane_b32 s81, v25
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208
-; SI-NEXT: v_readfirstlane_b32 s55, v21
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224
-; SI-NEXT: v_readfirstlane_b32 s41, v8
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:208
+; SI-NEXT: v_readfirstlane_b32 s5, v20
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:224
+; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232
+; SI-NEXT: v_readfirstlane_b32 s23, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s92, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156
+; SI-NEXT: v_readfirstlane_b32 s86, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: v_readfirstlane_b32 s31, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
-; SI-NEXT: v_readfirstlane_b32 s68, v7
-; SI-NEXT: v_readfirstlane_b32 s23, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: v_readfirstlane_b32 s76, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
-; SI-NEXT: v_readfirstlane_b32 s73, v4
+; SI-NEXT: v_readfirstlane_b32 s38, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
+; SI-NEXT: v_readfirstlane_b32 s48, v6
+; SI-NEXT: v_readfirstlane_b32 s82, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
+; SI-NEXT: v_readfirstlane_b32 s7, v5
+; SI-NEXT: v_writelane_b32 v56, s7, 29
+; SI-NEXT: v_readfirstlane_b32 s7, v4
+; SI-NEXT: v_writelane_b32 v56, s7, 30
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
-; SI-NEXT: v_readfirstlane_b32 s53, v3
+; SI-NEXT: v_readfirstlane_b32 s7, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
-; SI-NEXT: v_readfirstlane_b32 s95, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
+; SI-NEXT: v_readfirstlane_b32 s39, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:188
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
-; SI-NEXT: v_readfirstlane_b32 s38, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172
+; SI-NEXT: v_readfirstlane_b32 s95, v11
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
-; SI-NEXT: v_readfirstlane_b32 s26, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164
+; SI-NEXT: v_readfirstlane_b32 s70, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:164
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
-; SI-NEXT: v_readfirstlane_b32 s91, v15
+; SI-NEXT: v_readfirstlane_b32 s76, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
-; SI-NEXT: v_readfirstlane_b32 s64, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204
+; SI-NEXT: v_readfirstlane_b32 s37, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
-; SI-NEXT: v_readfirstlane_b32 s54, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196
+; SI-NEXT: v_readfirstlane_b32 s28, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
+; SI-NEXT: v_writelane_b32 v56, s7, 31
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s89, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
-; SI-NEXT: v_readfirstlane_b32 s72, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
-; SI-NEXT: v_readfirstlane_b32 s30, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92
+; SI-NEXT: v_readfirstlane_b32 s98, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88
-; SI-NEXT: v_readfirstlane_b32 s90, v1
+; SI-NEXT: v_readfirstlane_b32 s78, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
+; SI-NEXT: v_readfirstlane_b32 s92, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80
-; SI-NEXT: v_readfirstlane_b32 s31, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
-; SI-NEXT: v_readfirstlane_b32 s28, v2
+; SI-NEXT: v_readfirstlane_b32 s67, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
-; SI-NEXT: v_readfirstlane_b32 s19, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
-; SI-NEXT: v_readfirstlane_b32 s66, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12
+; SI-NEXT: v_readfirstlane_b32 s34, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:12
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
-; SI-NEXT: v_readfirstlane_b32 s88, v29
+; SI-NEXT: v_readfirstlane_b32 s87, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32
-; SI-NEXT: v_readfirstlane_b32 s21, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28
+; SI-NEXT: v_readfirstlane_b32 s85, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:28
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
-; SI-NEXT: v_readfirstlane_b32 s78, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
+; SI-NEXT: v_readfirstlane_b32 s71, v24
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:20
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
-; SI-NEXT: v_readfirstlane_b32 s77, v19
+; SI-NEXT: v_readfirstlane_b32 s60, v19
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44
; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40
-; SI-NEXT: v_readfirstlane_b32 s27, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36
+; SI-NEXT: v_readfirstlane_b32 s96, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
-; SI-NEXT: v_readfirstlane_b32 s36, v20
-; SI-NEXT: v_readfirstlane_b32 s75, v9
-; SI-NEXT: v_readfirstlane_b32 s57, v39
-; SI-NEXT: v_readfirstlane_b32 s48, v33
-; SI-NEXT: v_readfirstlane_b32 s24, v8
-; SI-NEXT: v_readfirstlane_b32 s46, v6
-; SI-NEXT: v_readfirstlane_b32 s61, v35
-; SI-NEXT: v_readfirstlane_b32 s79, v5
-; SI-NEXT: v_readfirstlane_b32 s25, v36
-; SI-NEXT: v_readfirstlane_b32 s42, v4
-; SI-NEXT: v_readfirstlane_b32 s60, v37
-; SI-NEXT: v_readfirstlane_b32 s59, v3
-; SI-NEXT: v_readfirstlane_b32 s62, v38
+; SI-NEXT: v_readfirstlane_b32 s35, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
+; SI-NEXT: v_readfirstlane_b32 s20, v25
+; SI-NEXT: v_readfirstlane_b32 s11, v14
+; SI-NEXT: v_readfirstlane_b32 s13, v52
+; SI-NEXT: v_readfirstlane_b32 s43, v0
+; SI-NEXT: v_readfirstlane_b32 s73, v53
+; SI-NEXT: v_writelane_b32 v56, s73, 32
+; SI-NEXT: v_readfirstlane_b32 s84, v33
+; SI-NEXT: v_readfirstlane_b32 s83, v8
+; SI-NEXT: v_readfirstlane_b32 s80, v34
+; SI-NEXT: v_writelane_b32 v56, s18, 33
+; SI-NEXT: v_readfirstlane_b32 s88, v7
+; SI-NEXT: v_readfirstlane_b32 s47, v39
+; SI-NEXT: v_writelane_b32 v56, s19, 34
+; SI-NEXT: v_writelane_b32 v56, s6, 35
+; SI-NEXT: v_writelane_b32 v56, s16, 36
+; SI-NEXT: v_readfirstlane_b32 s97, v4
+; SI-NEXT: v_readfirstlane_b32 s77, v37
+; SI-NEXT: v_readfirstlane_b32 s90, v3
+; SI-NEXT: v_readfirstlane_b32 s45, v38
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s39, v7
-; SI-NEXT: v_readfirstlane_b32 s70, v34
-; SI-NEXT: v_readfirstlane_b32 s74, v28
-; SI-NEXT: v_readfirstlane_b32 s35, v10
-; SI-NEXT: v_readfirstlane_b32 s44, v31
-; SI-NEXT: v_readfirstlane_b32 s40, v11
-; SI-NEXT: v_readfirstlane_b32 s12, v32
-; SI-NEXT: v_readfirstlane_b32 s17, v15
-; SI-NEXT: v_readfirstlane_b32 s34, v30
-; SI-NEXT: v_readfirstlane_b32 s20, v12
-; SI-NEXT: v_readfirstlane_b32 s65, v26
-; SI-NEXT: v_readfirstlane_b32 s50, v13
-; SI-NEXT: v_readfirstlane_b32 s67, v27
-; SI-NEXT: v_readfirstlane_b32 s7, v14
-; SI-NEXT: v_readfirstlane_b32 s99, v53
-; SI-NEXT: v_readfirstlane_b32 s29, v18
-; SI-NEXT: v_readfirstlane_b32 s10, v52
-; SI-NEXT: v_readfirstlane_b32 s15, v0
-; SI-NEXT: v_readfirstlane_b32 s58, v16
-; SI-NEXT: v_readfirstlane_b32 s13, v49
-; SI-NEXT: v_readfirstlane_b32 s45, v1
-; SI-NEXT: v_writelane_b32 v47, s45, 0
-; SI-NEXT: v_readfirstlane_b32 s43, v50
+; SI-NEXT: v_readfirstlane_b32 s74, v5
+; SI-NEXT: v_readfirstlane_b32 s75, v35
+; SI-NEXT: v_readfirstlane_b32 s59, v36
+; SI-NEXT: v_readfirstlane_b32 s56, v6
+; SI-NEXT: v_writelane_b32 v56, s41, 37
+; SI-NEXT: v_readfirstlane_b32 s69, v31
+; SI-NEXT: v_readfirstlane_b32 s68, v10
+; SI-NEXT: v_readfirstlane_b32 s66, v32
+; SI-NEXT: v_writelane_b32 v56, s44, 38
+; SI-NEXT: v_writelane_b32 v56, s89, 39
+; SI-NEXT: v_readfirstlane_b32 s27, v9
+; SI-NEXT: v_writelane_b32 v56, s72, 40
+; SI-NEXT: v_readfirstlane_b32 s25, v15
+; SI-NEXT: v_writelane_b32 v56, s29, 41
+; SI-NEXT: v_readfirstlane_b32 s7, v28
+; SI-NEXT: v_writelane_b32 v56, s58, 42
+; SI-NEXT: v_writelane_b32 v56, s22, 43
+; SI-NEXT: v_writelane_b32 v56, s63, 44
+; SI-NEXT: v_writelane_b32 v56, s93, 45
+; SI-NEXT: v_readfirstlane_b32 s62, v30
+; SI-NEXT: v_writelane_b32 v56, vcc_lo, 46
+; SI-NEXT: v_writelane_b32 v56, vcc_hi, 47
+; SI-NEXT: v_writelane_b32 v56, s49, 48
+; SI-NEXT: v_readfirstlane_b32 s91, v11
+; SI-NEXT: v_readfirstlane_b32 s26, v17
+; SI-NEXT: v_readfirstlane_b32 s30, v26
+; SI-NEXT: v_readfirstlane_b32 s36, v27
+; SI-NEXT: v_readfirstlane_b32 s79, v18
+; SI-NEXT: v_readfirstlane_b32 s17, v16
+; SI-NEXT: v_readfirstlane_b32 s57, v12
+; SI-NEXT: v_readfirstlane_b32 s46, v49
+; SI-NEXT: v_readfirstlane_b32 s40, v13
+; SI-NEXT: v_readfirstlane_b32 s12, v51
+; SI-NEXT: v_writelane_b32 v47, s12, 0
; SI-NEXT: v_writelane_b32 v47, s13, 1
-; SI-NEXT: v_readfirstlane_b32 s47, v17
+; SI-NEXT: v_readfirstlane_b32 s14, v1
; SI-NEXT: v_writelane_b32 v47, s43, 2
-; SI-NEXT: v_readfirstlane_b32 s56, v2
-; SI-NEXT: v_writelane_b32 v47, s47, 3
-; SI-NEXT: v_writelane_b32 v47, s56, 4
-; SI-NEXT: v_readfirstlane_b32 s63, v48
-; SI-NEXT: v_writelane_b32 v47, s57, 5
-; SI-NEXT: v_writelane_b32 v47, s63, 6
-; SI-NEXT: v_writelane_b32 v47, s58, 7
-; SI-NEXT: v_writelane_b32 v47, s59, 8
-; SI-NEXT: v_writelane_b32 v47, s60, 9
-; SI-NEXT: v_writelane_b32 v47, s62, 10
-; SI-NEXT: v_writelane_b32 v47, s75, 11
-; SI-NEXT: v_writelane_b32 v47, s79, 12
-; SI-NEXT: v_writelane_b32 v47, s61, 13
-; SI-NEXT: v_writelane_b32 v47, s25, 14
-; SI-NEXT: v_writelane_b32 v47, s42, 15
-; SI-NEXT: v_writelane_b32 v47, s38, 16
-; SI-NEXT: v_writelane_b32 v47, s95, 17
-; SI-NEXT: v_writelane_b32 v47, s26, 18
-; SI-NEXT: v_writelane_b32 v47, s39, 19
-; SI-NEXT: v_writelane_b32 v47, s48, 20
-; SI-NEXT: v_writelane_b32 v47, s23, 21
-; SI-NEXT: v_writelane_b32 v47, s91, 22
-; SI-NEXT: v_writelane_b32 v47, s70, 23
-; SI-NEXT: v_writelane_b32 v47, s76, 24
-; SI-NEXT: v_writelane_b32 v47, s46, 25
-; SI-NEXT: v_writelane_b32 v47, s41, 26
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s6, v54
-; SI-NEXT: v_writelane_b32 v47, s40, 27
-; SI-NEXT: v_writelane_b32 v56, s6, 34
-; SI-NEXT: v_writelane_b32 v47, s44, 28
-; SI-NEXT: v_writelane_b32 v56, s11, 35
-; SI-NEXT: v_writelane_b32 v47, s92, 29
-; SI-NEXT: v_writelane_b32 v56, s9, 36
-; SI-NEXT: v_writelane_b32 v47, s68, 30
-; SI-NEXT: v_writelane_b32 v56, s93, 37
-; SI-NEXT: v_writelane_b32 v47, s12, 31
-; SI-NEXT: v_writelane_b32 v56, s16, 38
-; SI-NEXT: v_writelane_b32 v47, s28, 32
-; SI-NEXT: v_writelane_b32 v56, s22, 39
-; SI-NEXT: v_writelane_b32 v47, s73, 33
-; SI-NEXT: v_writelane_b32 v56, s94, 40
-; SI-NEXT: v_writelane_b32 v47, s24, 34
-; SI-NEXT: v_writelane_b32 v56, s18, 41
-; SI-NEXT: v_writelane_b32 v47, s17, 35
-; SI-NEXT: v_writelane_b32 v56, s52, 42
-; SI-NEXT: v_writelane_b32 v47, s74, 36
-; SI-NEXT: v_writelane_b32 v56, vcc_lo, 43
-; SI-NEXT: v_writelane_b32 v47, s31, 37
-; SI-NEXT: v_writelane_b32 v56, vcc_hi, 44
-; SI-NEXT: v_writelane_b32 v47, s53, 38
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s71, v29
-; SI-NEXT: v_writelane_b32 v56, s51, 45
-; SI-NEXT: v_writelane_b32 v47, s72, 39
-; SI-NEXT: v_readfirstlane_b32 s80, v43
-; SI-NEXT: v_writelane_b32 v56, s71, 46
-; SI-NEXT: v_writelane_b32 v47, s30, 40
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_readfirstlane_b32 s81, v44
-; SI-NEXT: v_writelane_b32 v56, s80, 47
-; SI-NEXT: v_writelane_b32 v47, s34, 41
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s82, v25
-; SI-NEXT: v_writelane_b32 v56, s81, 48
-; SI-NEXT: v_writelane_b32 v47, s77, 42
-; SI-NEXT: v_readfirstlane_b32 s83, v41
-; SI-NEXT: v_writelane_b32 v56, s82, 49
-; SI-NEXT: v_writelane_b32 v47, s66, 43
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s84, v42
-; SI-NEXT: v_writelane_b32 v56, s83, 50
-; SI-NEXT: v_writelane_b32 v47, s35, 44
-; SI-NEXT: v_readfirstlane_b32 s85, v23
-; SI-NEXT: v_writelane_b32 v56, s84, 51
-; SI-NEXT: v_writelane_b32 v47, s27, 45
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s86, v24
-; SI-NEXT: v_writelane_b32 v56, s85, 52
-; SI-NEXT: v_writelane_b32 v47, s88, 46
-; SI-NEXT: v_readfirstlane_b32 s87, v55
-; SI-NEXT: v_writelane_b32 v56, s86, 53
-; SI-NEXT: v_writelane_b32 v47, s50, 47
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s96, v40
-; SI-NEXT: v_writelane_b32 v56, s87, 54
-; SI-NEXT: v_writelane_b32 v47, s65, 48
-; SI-NEXT: v_readfirstlane_b32 s97, v21
-; SI-NEXT: v_writelane_b32 v56, s96, 55
-; SI-NEXT: v_writelane_b32 v47, s90, 49
-; SI-NEXT: v_readfirstlane_b32 s98, v22
-; SI-NEXT: v_writelane_b32 v56, s97, 56
-; SI-NEXT: v_writelane_b32 v47, s89, 50
-; SI-NEXT: v_writelane_b32 v56, s98, 57
-; SI-NEXT: v_writelane_b32 v47, s67, 51
-; SI-NEXT: v_readfirstlane_b32 s8, v19
-; SI-NEXT: v_writelane_b32 v56, s99, 58
-; SI-NEXT: v_writelane_b32 v47, s21, 52
-; SI-NEXT: v_writelane_b32 v56, s8, 59
-; SI-NEXT: v_writelane_b32 v47, s20, 53
-; SI-NEXT: v_readfirstlane_b32 s14, v51
-; SI-NEXT: v_writelane_b32 v56, s29, 60
-; SI-NEXT: v_writelane_b32 v47, s19, 54
-; SI-NEXT: v_writelane_b32 v56, s14, 61
-; SI-NEXT: v_writelane_b32 v47, s78, 55
-; SI-NEXT: v_writelane_b32 v56, s10, 62
-; SI-NEXT: v_writelane_b32 v47, s36, 56
-; SI-NEXT: v_writelane_b32 v56, s15, 63
-; SI-NEXT: v_writelane_b32 v47, s7, 57
+; SI-NEXT: v_writelane_b32 v47, s14, 3
+; SI-NEXT: v_readfirstlane_b32 s15, v50
+; SI-NEXT: v_writelane_b32 v47, s46, 4
+; SI-NEXT: v_writelane_b32 v47, s15, 5
+; SI-NEXT: v_readfirstlane_b32 s42, v2
+; SI-NEXT: v_writelane_b32 v47, s40, 6
+; SI-NEXT: v_writelane_b32 v47, s42, 7
+; SI-NEXT: v_readfirstlane_b32 s61, v48
+; SI-NEXT: v_writelane_b32 v47, s47, 8
+; SI-NEXT: v_writelane_b32 v47, s61, 9
+; SI-NEXT: v_writelane_b32 v47, s57, 10
+; SI-NEXT: v_writelane_b32 v47, s90, 11
+; SI-NEXT: v_writelane_b32 v47, s77, 12
+; SI-NEXT: v_writelane_b32 v47, s45, 13
+; SI-NEXT: v_writelane_b32 v47, s88, 14
+; SI-NEXT: v_writelane_b32 v47, s74, 15
+; SI-NEXT: v_writelane_b32 v47, s75, 16
+; SI-NEXT: v_writelane_b32 v47, s59, 17
+; SI-NEXT: v_writelane_b32 v47, s97, 18
+; SI-NEXT: v_writelane_b32 v47, s37, 19
+; SI-NEXT: v_writelane_b32 v47, s28, 20
+; SI-NEXT: v_writelane_b32 v47, s39, 21
+; SI-NEXT: v_writelane_b32 v47, s95, 22
+; SI-NEXT: v_writelane_b32 v47, s76, 23
+; SI-NEXT: v_writelane_b32 v47, s70, 24
+; SI-NEXT: v_writelane_b32 v47, s83, 25
+; SI-NEXT: v_writelane_b32 v47, s84, 26
+; SI-NEXT: v_writelane_b32 v47, s48, 27
+; SI-NEXT: v_writelane_b32 v47, s80, 28
+; SI-NEXT: v_writelane_b32 v47, s31, 29
+; SI-NEXT: v_writelane_b32 v47, s56, 30
+; SI-NEXT: v_writelane_b32 v47, s68, 31
+; SI-NEXT: v_writelane_b32 v47, s69, 32
+; SI-NEXT: v_writelane_b32 v47, s82, 33
+; SI-NEXT: v_writelane_b32 v47, s38, 34
+; SI-NEXT: v_writelane_b32 v47, s66, 35
+; SI-NEXT: v_writelane_b32 v47, s67, 36
+; SI-NEXT: v_writelane_b32 v47, s27, 37
+; SI-NEXT: v_writelane_b32 v47, s25, 38
+; SI-NEXT: v_writelane_b32 v47, s7, 39
+; SI-NEXT: v_writelane_b32 v47, s78, 40
+; SI-NEXT: v_writelane_b32 v47, s23, 41
+; SI-NEXT: v_writelane_b32 v47, s98, 42
+; SI-NEXT: v_writelane_b32 v47, s62, 43
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_readfirstlane_b32 s50, v29
+; SI-NEXT: v_writelane_b32 v47, s60, 44
+; SI-NEXT: v_readfirstlane_b32 s51, v43
+; SI-NEXT: v_writelane_b32 v56, s50, 49
+; SI-NEXT: v_writelane_b32 v47, s34, 45
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_readfirstlane_b32 s52, v44
+; SI-NEXT: v_writelane_b32 v56, s51, 50
+; SI-NEXT: v_writelane_b32 v47, s91, 46
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_readfirstlane_b32 s53, v24
+; SI-NEXT: v_writelane_b32 v56, s52, 51
+; SI-NEXT: v_writelane_b32 v47, s96, 47
+; SI-NEXT: v_readfirstlane_b32 s54, v41
+; SI-NEXT: v_writelane_b32 v56, s53, 52
+; SI-NEXT: v_writelane_b32 v47, s87, 48
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_readfirstlane_b32 s55, v42
+; SI-NEXT: v_writelane_b32 v56, s54, 53
+; SI-NEXT: v_writelane_b32 v47, s26, 49
+; SI-NEXT: v_readfirstlane_b32 s64, v22
+; SI-NEXT: v_writelane_b32 v56, s55, 54
+; SI-NEXT: v_writelane_b32 v47, s30, 50
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_readfirstlane_b32 s65, v23
+; SI-NEXT: v_writelane_b32 v56, s64, 55
+; SI-NEXT: v_writelane_b32 v47, s92, 51
+; SI-NEXT: v_readfirstlane_b32 s99, v55
+; SI-NEXT: v_writelane_b32 v56, s65, 56
+; SI-NEXT: v_writelane_b32 v47, s86, 52
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_readfirstlane_b32 s21, v40
+; SI-NEXT: v_writelane_b32 v56, s99, 57
+; SI-NEXT: v_writelane_b32 v47, s36, 53
+; SI-NEXT: v_readfirstlane_b32 s24, v20
+; SI-NEXT: v_writelane_b32 v56, s21, 58
+; SI-NEXT: v_writelane_b32 v47, s85, 54
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_readfirstlane_b32 s8, v21
+; SI-NEXT: v_writelane_b32 v56, s24, 59
+; SI-NEXT: v_writelane_b32 v47, s79, 55
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s10, v54
+; SI-NEXT: v_writelane_b32 v56, s8, 60
+; SI-NEXT: v_writelane_b32 v47, s35, 56
+; SI-NEXT: v_readfirstlane_b32 s9, v19
+; SI-NEXT: v_writelane_b32 v56, s10, 61
+; SI-NEXT: v_writelane_b32 v47, s71, 57
+; SI-NEXT: v_writelane_b32 v56, s9, 62
+; SI-NEXT: v_writelane_b32 v47, s20, 58
+; SI-NEXT: v_writelane_b32 v56, s11, 63
+; SI-NEXT: v_writelane_b32 v47, s17, 59
; SI-NEXT: s_cbranch_scc0 .LBB89_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s9, 0xff
+; SI-NEXT: v_writelane_b32 v46, s4, 16
+; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: v_writelane_b32 v46, s5, 17
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s11, 24
+; SI-NEXT: s_lshl_b32 s5, s6, 24
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_writelane_b32 v47, s4, 58
-; SI-NEXT: v_readlane_b32 s4, v56, 11
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s5, v56, 10
+; SI-NEXT: v_writelane_b32 v46, s4, 15
+; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s5, 24
+; SI-NEXT: s_lshl_b32 s5, s19, 24
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_writelane_b32 v47, s4, 60
+; SI-NEXT: v_writelane_b32 v47, s4, 61
; SI-NEXT: v_readlane_b32 s4, v56, 9
; SI-NEXT: v_readlane_b32 s5, v56, 8
; SI-NEXT: s_and_b32 s4, s4, 0xff
@@ -147089,894 +147135,906 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_readlane_b32 s5, v56, 7
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: v_readlane_b32 s9, v56, 6
+; SI-NEXT: v_readlane_b32 s6, v56, 6
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s5, s9, s5
-; SI-NEXT: v_writelane_b32 v47, s5, 61
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_writelane_b32 v47, s5, 62
; SI-NEXT: v_readlane_b32 s5, v56, 5
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: v_readlane_b32 s9, v56, 4
+; SI-NEXT: v_readlane_b32 s6, v56, 4
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s5, s9, s5
-; SI-NEXT: v_writelane_b32 v47, s5, 59
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_writelane_b32 v47, s5, 60
; SI-NEXT: v_readlane_b32 s5, v56, 3
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: v_readlane_b32 s9, v56, 2
+; SI-NEXT: v_readlane_b32 s6, v56, 2
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s5, s9, s5
-; SI-NEXT: v_writelane_b32 v47, s5, 62
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_writelane_b32 v46, s5, 0
; SI-NEXT: v_readlane_b32 s5, v56, 1
-; SI-NEXT: v_readlane_b32 s9, v56, 0
+; SI-NEXT: v_readlane_b32 s6, v56, 0
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: v_writelane_b32 v46, s4, 10
-; SI-NEXT: s_or_b32 s4, s5, s9
-; SI-NEXT: s_and_b32 s9, s51, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, vcc_lo, 24
-; SI-NEXT: v_writelane_b32 v46, s4, 11
-; SI-NEXT: s_or_b32 s4, s11, s9
-; SI-NEXT: s_and_b32 s9, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s52, 24
-; SI-NEXT: s_or_b32 s52, s11, s9
-; SI-NEXT: s_and_b32 s9, s22, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s16, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 1
-; SI-NEXT: s_and_b32 s9, s18, 0xff
-; SI-NEXT: s_lshl_b32 s11, s94, 8
-; SI-NEXT: v_writelane_b32 v47, s4, 63
-; SI-NEXT: s_or_b32 s51, s9, s11
-; SI-NEXT: s_and_b32 s9, s93, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 33
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s4, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_readlane_b32 s4, v56, 32
-; SI-NEXT: v_writelane_b32 v46, s9, 2
-; SI-NEXT: s_and_b32 s9, s4, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 31
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 0
-; SI-NEXT: v_readlane_b32 s9, v56, 30
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 29
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 4
-; SI-NEXT: v_readlane_b32 s9, v56, 28
-; SI-NEXT: v_readlane_b32 s11, v56, 27
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s11, s11, 8
-; SI-NEXT: s_or_b32 vcc_lo, s9, s11
-; SI-NEXT: v_readlane_b32 s9, v56, 26
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 25
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 5
-; SI-NEXT: v_readlane_b32 s9, v56, 24
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 23
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 3
-; SI-NEXT: v_readlane_b32 s9, v56, 22
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 21
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 7
-; SI-NEXT: v_readlane_b32 s9, v56, 20
-; SI-NEXT: v_readlane_b32 s11, v56, 19
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s11, s11, 8
-; SI-NEXT: s_or_b32 s5, s9, s11
-; SI-NEXT: v_readlane_b32 s9, v56, 18
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 17
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 8
-; SI-NEXT: v_readlane_b32 s9, v56, 16
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 15
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 6
-; SI-NEXT: v_readlane_b32 s9, v56, 14
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s11, v56, 13
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_writelane_b32 v46, s9, 9
-; SI-NEXT: v_readlane_b32 s9, v56, 12
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s11, s81, 8
-; SI-NEXT: s_or_b32 vcc_hi, s9, s11
-; SI-NEXT: s_and_b32 s9, s71, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s80, 24
-; SI-NEXT: s_or_b32 s71, s11, s9
-; SI-NEXT: s_and_b32 s9, s85, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s84, 24
-; SI-NEXT: s_or_b32 s80, s11, s9
-; SI-NEXT: s_and_b32 s9, s82, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s83, 24
-; SI-NEXT: s_or_b32 s81, s11, s9
-; SI-NEXT: s_and_b32 s9, s97, 0xff
-; SI-NEXT: s_lshl_b32 s11, s96, 8
-; SI-NEXT: s_or_b32 s4, s9, s11
-; SI-NEXT: s_and_b32 s9, s86, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s87, 24
-; SI-NEXT: s_or_b32 s82, s11, s9
-; SI-NEXT: s_and_b32 s9, s8, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s6, s6, 24
-; SI-NEXT: s_or_b32 s83, s6, s9
-; SI-NEXT: s_and_b32 s6, s98, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s99, 24
-; SI-NEXT: s_or_b32 s84, s9, s6
-; SI-NEXT: s_and_b32 s6, s15, 0xff
-; SI-NEXT: s_lshl_b32 s9, s10, 8
-; SI-NEXT: s_or_b32 s93, s6, s9
-; SI-NEXT: s_and_b32 s6, s29, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s14, 24
-; SI-NEXT: s_or_b32 s85, s9, s6
-; SI-NEXT: s_and_b32 s6, s47, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s43, 24
-; SI-NEXT: s_or_b32 s86, s9, s6
-; SI-NEXT: s_and_b32 s6, s45, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s13, 24
-; SI-NEXT: s_or_b32 s87, s9, s6
-; SI-NEXT: s_and_b32 s6, s58, 0xff
-; SI-NEXT: s_lshl_b32 s9, s63, 8
-; SI-NEXT: s_or_b32 s94, s6, s9
-; SI-NEXT: s_and_b32 s6, s56, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s57, 24
-; SI-NEXT: s_or_b32 s96, s9, s6
-; SI-NEXT: s_and_b32 s6, s75, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s62, 24
-; SI-NEXT: s_or_b32 s97, s9, s6
-; SI-NEXT: s_and_b32 s6, s59, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_or_b32 s5, s5, s6
+; SI-NEXT: s_and_b32 s6, s49, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s60, 24
-; SI-NEXT: s_or_b32 s98, s9, s6
-; SI-NEXT: s_and_b32 s6, s42, 0xff
-; SI-NEXT: s_lshl_b32 s9, s25, 8
-; SI-NEXT: s_or_b32 s16, s6, s9
-; SI-NEXT: s_and_b32 s6, s79, 0xff
+; SI-NEXT: s_lshl_b32 s18, vcc_lo, 24
+; SI-NEXT: s_or_b32 s6, s18, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 1
+; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s61, 24
-; SI-NEXT: s_or_b32 s99, s9, s6
-; SI-NEXT: s_and_b32 s6, s46, 0xff
+; SI-NEXT: s_lshl_b32 s18, s93, 24
+; SI-NEXT: s_or_b32 s6, s18, s6
+; SI-NEXT: v_writelane_b32 v47, s6, 63
+; SI-NEXT: s_and_b32 s6, s72, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s9, s70, 24
-; SI-NEXT: s_or_b32 s6, s9, s6
-; SI-NEXT: s_and_b32 s9, s39, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s48, 24
-; SI-NEXT: s_or_b32 s10, s11, s9
-; SI-NEXT: s_and_b32 s9, s24, 0xff
-; SI-NEXT: s_lshl_b32 s11, s12, 8
-; SI-NEXT: s_or_b32 s22, s9, s11
-; SI-NEXT: s_and_b32 s9, s40, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s44, 24
-; SI-NEXT: s_or_b32 s29, s11, s9
-; SI-NEXT: s_and_b32 s9, s35, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s34, 24
-; SI-NEXT: s_or_b32 s8, s11, s9
-; SI-NEXT: s_and_b32 s9, s17, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s74, 24
-; SI-NEXT: s_or_b32 s15, s11, s9
-; SI-NEXT: s_and_b32 s9, s20, 0xff
-; SI-NEXT: s_lshl_b32 s11, s67, 8
-; SI-NEXT: s_or_b32 s18, s9, s11
-; SI-NEXT: s_and_b32 s9, s50, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s65, 24
-; SI-NEXT: s_or_b32 s43, s11, s9
-; SI-NEXT: s_and_b32 s9, s7, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s36, 24
-; SI-NEXT: s_or_b32 s14, s11, s9
-; SI-NEXT: s_and_b32 s9, s88, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s66, 24
-; SI-NEXT: s_or_b32 s47, s11, s9
-; SI-NEXT: s_and_b32 s9, s78, 0xff
-; SI-NEXT: s_lshl_b32 s11, s21, 8
-; SI-NEXT: s_or_b32 s20, s9, s11
-; SI-NEXT: s_and_b32 s9, s27, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s77, 24
-; SI-NEXT: s_or_b32 s42, s11, s9
-; SI-NEXT: s_and_b32 s9, s19, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s89, 24
-; SI-NEXT: s_or_b32 s45, s11, s9
-; SI-NEXT: s_and_b32 s9, s72, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s31, 24
-; SI-NEXT: s_or_b32 s13, s11, s9
-; SI-NEXT: s_and_b32 s11, s90, 0xff
-; SI-NEXT: s_lshl_b32 s12, s30, 8
-; SI-NEXT: s_or_b32 s19, s11, s12
-; SI-NEXT: s_and_b32 s11, s28, 0xff
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_lshl_b32 s12, s92, 24
-; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s53, 0xff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s27, s73, 24
-; SI-NEXT: s_or_b32 s27, s27, s12
-; SI-NEXT: s_and_b32 s12, s76, 0xff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s40, s23, 24
-; SI-NEXT: s_or_b32 s40, s40, s12
-; SI-NEXT: s_and_b32 s12, s68, 0xff
-; SI-NEXT: s_lshl_b32 s41, s41, 8
-; SI-NEXT: s_or_b32 s21, s12, s41
-; SI-NEXT: s_and_b32 s12, s26, 0xff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s41, s38, 24
-; SI-NEXT: s_or_b32 s41, s41, s12
-; SI-NEXT: s_and_b32 s12, s91, 0xff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s44, s95, 24
-; SI-NEXT: s_or_b32 s12, s44, s12
-; SI-NEXT: s_and_b32 s44, s54, 0xff
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_lshl_b32 s46, s64, 24
-; SI-NEXT: s_or_b32 s44, s46, s44
-; SI-NEXT: s_and_b32 s46, s49, 0xff
-; SI-NEXT: s_lshl_b32 s95, s37, 8
-; SI-NEXT: s_or_b32 s23, s46, s95
-; SI-NEXT: s_and_b32 s46, s55, 0xff
-; SI-NEXT: v_readlane_b32 s7, v46, 10
-; SI-NEXT: s_mov_b32 s25, s37
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_lshl_b32 s95, s69, 24
-; SI-NEXT: s_lshl_b32 s37, s7, 16
-; SI-NEXT: v_readlane_b32 s7, v46, 11
-; SI-NEXT: s_mov_b32 s78, s54
-; SI-NEXT: s_mov_b32 s77, s64
-; SI-NEXT: s_mov_b32 s30, s49
-; SI-NEXT: s_mov_b32 s75, s55
-; SI-NEXT: s_mov_b32 s17, s69
-; SI-NEXT: s_or_b32 s46, s95, s46
-; SI-NEXT: s_lshl_b32 s36, s7, 16
-; SI-NEXT: s_lshl_b32 s35, s51, 16
-; SI-NEXT: s_lshl_b32 s34, vcc_lo, 16
-; SI-NEXT: s_lshl_b32 s31, s5, 16
-; SI-NEXT: s_lshl_b32 s28, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s24, s4, 16
-; SI-NEXT: s_lshl_b32 s26, s93, 16
-; SI-NEXT: s_lshl_b32 s95, s94, 16
-; SI-NEXT: s_lshl_b32 s94, s16, 16
-; SI-NEXT: s_lshl_b32 s93, s22, 16
-; SI-NEXT: s_lshl_b32 s92, s18, 16
-; SI-NEXT: s_lshl_b32 s91, s20, 16
-; SI-NEXT: s_lshl_b32 s90, s19, 16
-; SI-NEXT: s_lshl_b32 s89, s21, 16
-; SI-NEXT: s_lshl_b32 s76, s23, 16
+; SI-NEXT: s_lshl_b32 s18, s89, 24
+; SI-NEXT: s_or_b32 s6, s18, s6
+; SI-NEXT: s_and_b32 s18, s63, 0xff
+; SI-NEXT: s_lshl_b32 s19, s58, 8
+; SI-NEXT: s_or_b32 s18, s18, s19
+; SI-NEXT: s_and_b32 s19, s44, 0xff
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s41, s41, 24
+; SI-NEXT: v_writelane_b32 v46, s6, 2
+; SI-NEXT: s_or_b32 s16, s41, s19
+; SI-NEXT: s_and_b32 s19, s22, 0xff
+; SI-NEXT: v_writelane_b32 v46, s16, 3
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s41, s29, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 28
+; SI-NEXT: s_or_b32 s6, s41, s19
+; SI-NEXT: s_and_b32 s19, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 27
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s41, s16, 24
+; SI-NEXT: s_or_b32 s16, s41, s19
+; SI-NEXT: v_writelane_b32 v46, s16, 5
+; SI-NEXT: v_readlane_b32 s16, v56, 26
+; SI-NEXT: s_and_b32 s19, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 25
+; SI-NEXT: s_lshl_b32 s41, s16, 8
+; SI-NEXT: v_readlane_b32 s16, v56, 24
+; SI-NEXT: s_or_b32 s19, s19, s41
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 23
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s44, s16, 24
+; SI-NEXT: s_or_b32 s16, s44, s41
+; SI-NEXT: v_writelane_b32 v46, s16, 6
+; SI-NEXT: v_readlane_b32 s16, v56, 22
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 21
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s44, s16, 24
+; SI-NEXT: s_or_b32 s16, s44, s41
+; SI-NEXT: v_writelane_b32 v46, s16, 4
+; SI-NEXT: v_readlane_b32 s16, v56, 20
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 19
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s44, s16, 24
+; SI-NEXT: s_or_b32 s16, s44, s41
+; SI-NEXT: v_writelane_b32 v46, s16, 8
+; SI-NEXT: v_readlane_b32 s16, v56, 18
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 17
+; SI-NEXT: s_lshl_b32 s44, s16, 8
+; SI-NEXT: v_readlane_b32 s16, v56, 16
+; SI-NEXT: s_or_b32 s44, s41, s44
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 15
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s58, s16, 24
+; SI-NEXT: s_or_b32 s16, s58, s41
+; SI-NEXT: v_writelane_b32 v46, s16, 9
+; SI-NEXT: v_readlane_b32 s16, v56, 14
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 13
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s58, s16, 24
+; SI-NEXT: s_or_b32 s16, s58, s41
+; SI-NEXT: v_writelane_b32 v46, s16, 7
+; SI-NEXT: v_readlane_b32 s16, v56, 12
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 11
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s58, s16, 24
+; SI-NEXT: s_or_b32 s16, s58, s41
+; SI-NEXT: v_writelane_b32 v46, s16, 11
+; SI-NEXT: v_readlane_b32 s16, v56, 10
+; SI-NEXT: s_and_b32 s41, s16, 0xff
+; SI-NEXT: s_lshl_b32 s58, s52, 8
+; SI-NEXT: s_or_b32 s58, s41, s58
+; SI-NEXT: s_and_b32 s41, s50, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s63, s51, 24
+; SI-NEXT: s_or_b32 s16, s63, s41
+; SI-NEXT: s_and_b32 s41, s64, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s63, s55, 24
+; SI-NEXT: v_writelane_b32 v46, s16, 12
+; SI-NEXT: s_or_b32 s16, s63, s41
+; SI-NEXT: s_and_b32 s41, s53, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s63, s54, 24
+; SI-NEXT: v_writelane_b32 v46, s16, 10
+; SI-NEXT: s_or_b32 s16, s63, s41
+; SI-NEXT: s_and_b32 s41, s24, 0xff
+; SI-NEXT: s_lshl_b32 s63, s21, 8
+; SI-NEXT: s_or_b32 s63, s41, s63
+; SI-NEXT: s_and_b32 s41, s65, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s99, 24
+; SI-NEXT: v_writelane_b32 v46, s16, 13
+; SI-NEXT: s_or_b32 s16, s72, s41
+; SI-NEXT: s_and_b32 s41, s9, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s10, 24
+; SI-NEXT: s_or_b32 s49, s72, s41
+; SI-NEXT: s_and_b32 s41, s8, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s29, s73, 24
+; SI-NEXT: s_or_b32 s50, s29, s41
+; SI-NEXT: s_and_b32 s29, s43, 0xff
+; SI-NEXT: s_lshl_b32 s41, s13, 8
+; SI-NEXT: s_or_b32 s29, s29, s41
+; SI-NEXT: s_and_b32 s41, s11, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s12, 24
+; SI-NEXT: s_or_b32 s51, s72, s41
+; SI-NEXT: s_and_b32 s41, s40, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s15, 24
+; SI-NEXT: s_or_b32 s52, s72, s41
+; SI-NEXT: s_and_b32 s41, s14, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s46, 24
+; SI-NEXT: s_or_b32 s53, s72, s41
+; SI-NEXT: s_and_b32 s41, s57, 0xff
+; SI-NEXT: s_lshl_b32 s72, s61, 8
+; SI-NEXT: s_or_b32 s89, s41, s72
+; SI-NEXT: s_and_b32 s41, s42, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s47, 24
+; SI-NEXT: s_or_b32 s54, s72, s41
+; SI-NEXT: s_and_b32 s41, s88, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s45, 24
+; SI-NEXT: s_or_b32 s55, s72, s41
+; SI-NEXT: s_and_b32 s41, s90, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s77, 24
+; SI-NEXT: s_or_b32 s64, s72, s41
+; SI-NEXT: s_and_b32 s41, s97, 0xff
+; SI-NEXT: s_lshl_b32 s72, s59, 8
+; SI-NEXT: s_or_b32 s93, s41, s72
+; SI-NEXT: s_and_b32 s41, s74, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s75, 24
+; SI-NEXT: s_or_b32 s65, s72, s41
+; SI-NEXT: s_and_b32 s41, s56, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s80, 24
+; SI-NEXT: s_or_b32 s12, s72, s41
+; SI-NEXT: s_and_b32 s41, s83, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s84, 24
+; SI-NEXT: s_or_b32 s15, s72, s41
+; SI-NEXT: s_and_b32 s41, s27, 0xff
+; SI-NEXT: s_lshl_b32 s72, s66, 8
+; SI-NEXT: v_writelane_b32 v46, s16, 14
+; SI-NEXT: s_or_b32 s16, s41, s72
+; SI-NEXT: s_and_b32 s41, s68, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s69, 24
+; SI-NEXT: s_or_b32 s14, s72, s41
+; SI-NEXT: s_and_b32 s41, s91, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s62, 24
+; SI-NEXT: s_or_b32 s11, s72, s41
+; SI-NEXT: s_and_b32 s41, s25, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s7, 24
+; SI-NEXT: s_or_b32 s10, s72, s41
+; SI-NEXT: s_and_b32 s41, s79, 0xff
+; SI-NEXT: s_lshl_b32 s72, s36, 8
+; SI-NEXT: s_or_b32 s22, s41, s72
+; SI-NEXT: s_and_b32 s41, s26, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s30, 24
+; SI-NEXT: s_or_b32 s8, s72, s41
+; SI-NEXT: s_and_b32 s41, s17, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s20, 24
+; SI-NEXT: s_or_b32 s9, s72, s41
+; SI-NEXT: s_and_b32 s41, s87, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s34, 24
+; SI-NEXT: s_or_b32 s24, s72, s41
+; SI-NEXT: s_and_b32 s41, s71, 0xff
+; SI-NEXT: s_lshl_b32 s72, s85, 8
+; SI-NEXT: s_or_b32 s17, s41, s72
+; SI-NEXT: s_and_b32 s41, s96, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s60, 24
+; SI-NEXT: s_or_b32 vcc_hi, s72, s41
+; SI-NEXT: s_and_b32 s41, s35, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s86, 24
+; SI-NEXT: s_or_b32 s21, s72, s41
+; SI-NEXT: s_and_b32 s41, s23, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s78, 24
+; SI-NEXT: s_or_b32 vcc_lo, s72, s41
+; SI-NEXT: s_and_b32 s41, s92, 0xff
+; SI-NEXT: s_lshl_b32 s72, s98, 8
+; SI-NEXT: s_or_b32 s20, s41, s72
+; SI-NEXT: s_and_b32 s41, s67, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s82, 24
+; SI-NEXT: v_readlane_b32 s7, v56, 31
+; SI-NEXT: s_or_b32 s13, s72, s41
+; SI-NEXT: s_and_b32 s41, s7, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 30
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s7, 24
+; SI-NEXT: v_readlane_b32 s7, v56, 29
+; SI-NEXT: s_or_b32 s91, s72, s41
+; SI-NEXT: s_and_b32 s41, s7, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s48, 24
+; SI-NEXT: s_or_b32 s92, s72, s41
+; SI-NEXT: s_and_b32 s41, s38, 0xff
+; SI-NEXT: s_lshl_b32 s72, s31, 8
+; SI-NEXT: s_or_b32 s26, s41, s72
+; SI-NEXT: s_and_b32 s41, s70, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s95, 24
+; SI-NEXT: s_or_b32 s90, s72, s41
+; SI-NEXT: s_and_b32 s41, s76, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s39, 24
+; SI-NEXT: s_or_b32 s79, s72, s41
+; SI-NEXT: s_and_b32 s41, s28, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s37, 24
+; SI-NEXT: s_or_b32 s88, s72, s41
+; SI-NEXT: s_and_b32 s41, s81, 0xff
+; SI-NEXT: s_lshl_b32 s72, s94, 8
+; SI-NEXT: v_readlane_b32 s7, v46, 17
+; SI-NEXT: s_or_b32 s23, s41, s72
+; SI-NEXT: s_mov_b32 s45, s7
+; SI-NEXT: s_and_b32 s41, s7, 0xff
+; SI-NEXT: v_readlane_b32 s7, v46, 16
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_lshl_b32 s72, s7, 24
+; SI-NEXT: s_mov_b32 s62, s81
+; SI-NEXT: s_mov_b32 s59, s94
+; SI-NEXT: s_mov_b32 s61, s7
+; SI-NEXT: s_or_b32 s99, s72, s41
+; SI-NEXT: s_lshl_b32 s78, s4, 16
+; SI-NEXT: s_lshl_b32 s77, s5, 16
+; SI-NEXT: s_lshl_b32 s41, s18, 16
+; SI-NEXT: s_lshl_b32 s76, s19, 16
+; SI-NEXT: s_lshl_b32 s75, s44, 16
+; SI-NEXT: s_lshl_b32 s74, s58, 16
+; SI-NEXT: s_lshl_b32 s73, s63, 16
+; SI-NEXT: s_lshl_b32 s72, s29, 16
+; SI-NEXT: s_lshl_b32 s63, s89, 16
+; SI-NEXT: s_lshl_b32 s58, s93, 16
+; SI-NEXT: s_lshl_b32 s44, s16, 16
+; SI-NEXT: s_lshl_b32 s29, s22, 16
+; SI-NEXT: s_lshl_b32 s19, s17, 16
+; SI-NEXT: s_lshl_b32 s93, s20, 16
+; SI-NEXT: s_lshl_b32 s89, s26, 16
+; SI-NEXT: s_lshl_b32 s18, s23, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB89_3
; SI-NEXT: .LBB89_2:
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: s_mov_b32 s78, s54
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: s_mov_b32 s77, s64
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: s_mov_b32 s30, s49
+; SI-NEXT: s_mov_b32 s62, s81
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: s_mov_b32 s25, s37
+; SI-NEXT: s_mov_b32 s59, s94
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: s_mov_b32 s75, s55
+; SI-NEXT: s_mov_b32 s45, s5
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: s_mov_b32 s17, s69
+; SI-NEXT: s_mov_b32 s61, s4
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; kill: killed $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr28
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr24
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr26
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr97
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr99
-; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr29
-; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr15
-; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr47
-; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr45
-; SI-NEXT: ; implicit-def: $sgpr13
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr11
-; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr29
+; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr24
+; SI-NEXT: ; implicit-def: $sgpr19
+; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr21
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr13
+; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr41
-; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr18
+; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; kill: killed $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: .LBB89_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: v_readlane_b32 s7, v47, 58
-; SI-NEXT: v_readlane_b32 s49, v47, 59
-; SI-NEXT: v_readlane_b32 s39, v47, 60
-; SI-NEXT: v_readlane_b32 s48, v47, 61
-; SI-NEXT: v_readlane_b32 s50, v47, 62
-; SI-NEXT: v_readlane_b32 s51, v47, 63
-; SI-NEXT: v_readlane_b32 s55, v46, 0
-; SI-NEXT: v_readlane_b32 s53, v46, 1
-; SI-NEXT: v_readlane_b32 s54, v46, 2
-; SI-NEXT: v_readlane_b32 s66, v46, 3
-; SI-NEXT: v_readlane_b32 s64, v46, 4
-; SI-NEXT: v_readlane_b32 s65, v46, 5
-; SI-NEXT: v_readlane_b32 s69, v46, 6
-; SI-NEXT: v_readlane_b32 s67, v46, 7
-; SI-NEXT: v_readlane_b32 s68, v46, 8
-; SI-NEXT: v_readlane_b32 s70, v46, 9
-; SI-NEXT: s_mov_b32 s5, s6
-; SI-NEXT: s_mov_b32 s4, s8
-; SI-NEXT: s_mov_b32 s38, s10
+; SI-NEXT: v_readlane_b32 s7, v47, 60
+; SI-NEXT: v_readlane_b32 s97, v47, 61
+; SI-NEXT: v_readlane_b32 s98, v47, 62
+; SI-NEXT: v_readlane_b32 s87, v47, 63
+; SI-NEXT: v_readlane_b32 s96, v46, 0
+; SI-NEXT: v_readlane_b32 s86, v46, 1
+; SI-NEXT: s_mov_b32 s83, s6
+; SI-NEXT: v_readlane_b32 s6, v46, 2
+; SI-NEXT: v_readlane_b32 s85, v46, 3
+; SI-NEXT: v_readlane_b32 s80, v46, 4
+; SI-NEXT: v_readlane_b32 s84, v46, 5
+; SI-NEXT: v_readlane_b32 s82, v46, 6
+; SI-NEXT: v_readlane_b32 s69, v46, 7
+; SI-NEXT: v_readlane_b32 s81, v46, 8
+; SI-NEXT: v_readlane_b32 s71, v46, 9
+; SI-NEXT: v_readlane_b32 s66, v46, 10
+; SI-NEXT: v_readlane_b32 s70, v46, 11
+; SI-NEXT: v_readlane_b32 s68, v46, 12
+; SI-NEXT: v_readlane_b32 s67, v46, 13
+; SI-NEXT: v_readlane_b32 s48, v46, 14
+; SI-NEXT: s_mov_b32 s38, s12
+; SI-NEXT: s_mov_b32 s35, s11
+; SI-NEXT: s_mov_b32 s39, s15
+; SI-NEXT: s_mov_b32 s37, s14
+; SI-NEXT: s_mov_b32 s30, s9
+; SI-NEXT: s_mov_b32 s36, s10
+; SI-NEXT: s_mov_b32 s34, s8
+; SI-NEXT: s_mov_b32 s5, s99
+; SI-NEXT: v_readlane_b32 s99, v46, 15
; SI-NEXT: s_cbranch_scc1 .LBB89_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s4, s30, 3
+; SI-NEXT: s_add_i32 s4, s62, 3
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s25, 8
-; SI-NEXT: s_add_i32 s6, s75, 3
+; SI-NEXT: s_lshl_b32 s5, s59, 8
+; SI-NEXT: s_add_i32 s6, s45, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s5, s17, 24
+; SI-NEXT: s_lshl_b32 s5, s61, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_addk_i32 s4, 0x300
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s5, s4
-; SI-NEXT: v_readlane_b32 s4, v47, 22
-; SI-NEXT: s_add_i32 s4, s4, 3
-; SI-NEXT: v_readlane_b32 s5, v47, 17
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_add_i32 s7, s78, 3
; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: v_readlane_b32 s5, v47, 23
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: v_readlane_b32 s6, v47, 21
+; SI-NEXT: v_readlane_b32 s7, v47, 20
+; SI-NEXT: s_and_b32 s5, s5, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_readlane_b32 s6, v47, 19
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s5, s77, 24
+; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_addk_i32 s4, 0x300
-; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v47, 30
-; SI-NEXT: s_add_i32 s25, s5, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 26
-; SI-NEXT: v_readlane_b32 s8, v47, 18
-; SI-NEXT: s_and_b32 s5, s25, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s8, 3
-; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_readlane_b32 s7, v47, 16
-; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_addk_i32 s5, 0x300
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_readlane_b32 s7, v47, 38
-; SI-NEXT: s_add_i32 s42, s7, 3
-; SI-NEXT: v_readlane_b32 s8, v47, 33
-; SI-NEXT: v_readlane_b32 s9, v47, 24
-; SI-NEXT: s_and_b32 s7, s42, 0xff
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_readlane_b32 s6, v47, 34
+; SI-NEXT: s_add_i32 s21, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 29
+; SI-NEXT: v_readlane_b32 s8, v47, 24
+; SI-NEXT: s_and_b32 s6, s21, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
+; SI-NEXT: s_add_i32 s18, s8, 3
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v47, 22
+; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_or_b32 s7, s7, s18
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 31
+; SI-NEXT: s_add_i32 s8, s7, 3
+; SI-NEXT: s_and_b32 s7, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 30
+; SI-NEXT: v_readlane_b32 s9, v56, 29
; SI-NEXT: s_lshl_b32 s8, s8, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s18, s9, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v47, 21
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s8, v47, 27
+; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s8, s8, s18
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v47, 49
-; SI-NEXT: s_add_i32 s72, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v47, 40
-; SI-NEXT: v_readlane_b32 s10, v47, 32
-; SI-NEXT: s_and_b32 s8, s72, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_add_i32 s29, s10, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v47, 29
-; SI-NEXT: s_and_b32 s11, s29, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s9, s9, s11
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s12, s9, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 54
-; SI-NEXT: s_add_i32 s77, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v47, 50
-; SI-NEXT: v_readlane_b32 s10, v47, 39
-; SI-NEXT: s_and_b32 s8, s77, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_add_i32 s43, s10, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v47, 37
-; SI-NEXT: s_and_b32 s11, s43, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s9, s9, s11
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s11, s9, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 55
-; SI-NEXT: s_add_i32 s78, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v47, 52
-; SI-NEXT: v_readlane_b32 s10, v47, 45
-; SI-NEXT: s_and_b32 s8, s78, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_add_i32 s59, s10, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: v_readlane_b32 s8, v47, 51
+; SI-NEXT: s_add_i32 s45, s8, 3
; SI-NEXT: v_readlane_b32 s9, v47, 42
-; SI-NEXT: s_and_b32 s15, s59, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_and_b32 s8, s45, 0xff
+; SI-NEXT: s_lshl_b32 s10, s9, 8
+; SI-NEXT: v_readlane_b32 s9, v47, 33
+; SI-NEXT: s_or_b32 s8, s10, s8
+; SI-NEXT: s_lshl_b32 s10, s9, 24
+; SI-NEXT: v_readlane_b32 s9, v47, 36
+; SI-NEXT: s_add_i32 s23, s9, 3
+; SI-NEXT: s_and_b32 s18, s23, 0xff
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s9, s9, s15
+; SI-NEXT: v_readlane_b32 s9, v47, 56
+; SI-NEXT: s_or_b32 s10, s10, s18
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s9, s9, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 57
-; SI-NEXT: s_add_i32 s88, s8, 3
-; SI-NEXT: v_readlane_b32 s10, v47, 56
-; SI-NEXT: s_and_b32 s8, s88, 0xff
-; SI-NEXT: s_lshl_b32 s15, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v47, 43
-; SI-NEXT: s_or_b32 s8, s15, s8
-; SI-NEXT: s_lshl_b32 s15, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v47, 46
+; SI-NEXT: s_add_i32 s59, s9, 3
+; SI-NEXT: v_readlane_b32 s9, v47, 52
+; SI-NEXT: s_or_b32 s8, s10, s8
+; SI-NEXT: s_and_b32 s10, s59, 0xff
+; SI-NEXT: s_lshl_b32 s18, s9, 8
+; SI-NEXT: v_readlane_b32 s9, v47, 40
+; SI-NEXT: s_or_b32 s10, s18, s10
+; SI-NEXT: s_lshl_b32 s18, s9, 24
+; SI-NEXT: v_readlane_b32 s9, v47, 41
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_addk_i32 s10, 0x300
+; SI-NEXT: v_readlane_b32 s11, v47, 54
+; SI-NEXT: s_or_b32 s9, s18, s9
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s18, s11, 8
+; SI-NEXT: v_readlane_b32 s11, v47, 44
+; SI-NEXT: s_or_b32 s9, s9, s10
+; SI-NEXT: v_readlane_b32 s10, v47, 57
+; SI-NEXT: s_lshl_b32 s12, s11, 24
+; SI-NEXT: v_readlane_b32 s11, v47, 47
; SI-NEXT: s_add_i32 s60, s10, 3
-; SI-NEXT: s_and_b32 s16, s60, 0xff
+; SI-NEXT: s_add_i32 s15, s11, 3
+; SI-NEXT: s_and_b32 s10, s60, 0xff
+; SI-NEXT: s_and_b32 s15, s15, 0xff
+; SI-NEXT: v_readlane_b32 s11, v47, 59
+; SI-NEXT: s_or_b32 s10, s18, s10
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_add_i32 s62, s11, 3
+; SI-NEXT: v_readlane_b32 s11, v47, 58
+; SI-NEXT: s_or_b32 s12, s12, s15
+; SI-NEXT: s_addk_i32 s10, 0x300
+; SI-NEXT: s_lshl_b32 s15, s11, 8
+; SI-NEXT: v_readlane_b32 s11, v47, 45
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s11, 24
+; SI-NEXT: v_readlane_b32 s11, v47, 48
+; SI-NEXT: s_or_b32 s10, s12, s10
+; SI-NEXT: s_and_b32 s12, s62, 0xff
+; SI-NEXT: s_add_i32 s40, s11, 3
+; SI-NEXT: s_or_b32 s12, s15, s12
+; SI-NEXT: s_and_b32 s15, s40, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_addk_i32 s12, 0x300
+; SI-NEXT: v_readlane_b32 s11, v47, 55
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s12, s12, 0xffff
+; SI-NEXT: s_add_i32 s57, s11, 3
+; SI-NEXT: v_readlane_b32 s11, v47, 53
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_and_b32 s13, s57, 0xff
+; SI-NEXT: s_lshl_b32 s15, s11, 8
+; SI-NEXT: v_readlane_b32 s11, v47, 50
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_lshl_b32 s15, s11, 24
+; SI-NEXT: v_readlane_b32 s11, v47, 49
+; SI-NEXT: s_add_i32 s42, s11, 3
+; SI-NEXT: s_and_b32 s18, s42, 0xff
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_addk_i32 s13, 0x300
+; SI-NEXT: s_or_b32 s15, s15, s18
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: v_readlane_b32 s11, v47, 46
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_add_i32 s14, s11, 3
+; SI-NEXT: v_readlane_b32 s11, v47, 43
+; SI-NEXT: v_readlane_b32 s15, v47, 38
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 8
+; SI-NEXT: s_add_i32 s24, s15, 3
+; SI-NEXT: s_or_b32 s11, s11, s14
+; SI-NEXT: v_readlane_b32 s14, v47, 39
+; SI-NEXT: s_and_b32 s15, s24, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 24
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_addk_i32 s11, 0x300
+; SI-NEXT: s_or_b32 s14, s14, s15
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s11
+; SI-NEXT: v_readlane_b32 s11, v47, 37
+; SI-NEXT: s_add_i32 s25, s11, 3
+; SI-NEXT: v_readlane_b32 s15, v47, 35
+; SI-NEXT: v_readlane_b32 s16, v47, 31
+; SI-NEXT: s_and_b32 s11, s25, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 8
+; SI-NEXT: s_add_i32 s17, s16, 3
+; SI-NEXT: s_or_b32 s11, s15, s11
+; SI-NEXT: v_readlane_b32 s15, v47, 32
+; SI-NEXT: s_and_b32 s16, s17, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
+; SI-NEXT: s_addk_i32 s11, 0x300
; SI-NEXT: s_or_b32 s15, s15, s16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s15, s15, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 53
-; SI-NEXT: s_add_i32 s61, s8, 3
-; SI-NEXT: v_readlane_b32 s10, v47, 51
-; SI-NEXT: s_and_b32 s8, s61, 0xff
-; SI-NEXT: s_lshl_b32 s16, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v47, 48
-; SI-NEXT: s_or_b32 s8, s16, s8
-; SI-NEXT: s_lshl_b32 s16, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v47, 47
-; SI-NEXT: s_add_i32 s62, s10, 3
-; SI-NEXT: s_and_b32 s17, s62, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: v_readlane_b32 s10, v47, 41
-; SI-NEXT: s_or_b32 s16, s16, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 44
-; SI-NEXT: s_lshl_b32 s17, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v47, 36
-; SI-NEXT: s_add_i32 s58, s8, 3
-; SI-NEXT: s_lshl_b32 s14, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v47, 35
-; SI-NEXT: s_and_b32 s8, s58, 0xff
-; SI-NEXT: s_add_i32 s13, s10, 3
-; SI-NEXT: s_or_b32 s8, s17, s8
-; SI-NEXT: s_and_b32 s13, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s17, s13, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 34
-; SI-NEXT: s_add_i32 s10, s8, 3
-; SI-NEXT: s_and_b32 s8, s10, 0xff
-; SI-NEXT: v_readlane_b32 s10, v47, 31
-; SI-NEXT: v_readlane_b32 s13, v47, 27
-; SI-NEXT: s_lshl_b32 s10, s10, 8
-; SI-NEXT: s_add_i32 s19, s13, 3
-; SI-NEXT: s_or_b32 s8, s10, s8
-; SI-NEXT: v_readlane_b32 s10, v47, 28
-; SI-NEXT: s_and_b32 s13, s19, 0xff
-; SI-NEXT: s_lshl_b32 s10, s10, 24
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s10, s10, s13
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s19, s10, s8
-; SI-NEXT: v_readlane_b32 s8, v47, 25
-; SI-NEXT: s_add_i32 s18, s8, 3
-; SI-NEXT: v_readlane_b32 s10, v47, 23
-; SI-NEXT: v_readlane_b32 s13, v47, 19
-; SI-NEXT: s_and_b32 s8, s18, 0xff
-; SI-NEXT: s_lshl_b32 s10, s10, 8
-; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: s_or_b32 s8, s10, s8
-; SI-NEXT: v_readlane_b32 s10, v47, 20
-; SI-NEXT: s_and_b32 s13, s13, 0xff
-; SI-NEXT: s_lshl_b32 s10, s10, 24
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_or_b32 s10, s10, s13
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s20, s10, s8
-; SI-NEXT: s_add_i32 s10, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v47, 15
-; SI-NEXT: s_add_i32 s18, s4, 0x3000000
-; SI-NEXT: s_add_i32 s14, s16, 0x3000000
-; SI-NEXT: s_add_i32 s4, s17, 0x3000000
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s16, v47, 14
-; SI-NEXT: v_readlane_b32 s17, v47, 12
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s16, s15, s11
+; SI-NEXT: v_readlane_b32 s11, v47, 30
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: v_readlane_b32 s15, v47, 28
+; SI-NEXT: v_readlane_b32 s17, v47, 25
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 8
; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: s_or_b32 s7, s16, s7
-; SI-NEXT: v_readlane_b32 s16, v47, 13
+; SI-NEXT: s_or_b32 s11, s15, s11
+; SI-NEXT: v_readlane_b32 s15, v47, 26
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s16, s16, 24
+; SI-NEXT: s_lshl_b32 s15, s15, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_or_b32 s16, s16, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 11
-; SI-NEXT: s_add_i32 s13, s15, 0x3000000
-; SI-NEXT: s_add_i32 s15, s19, 0x3000000
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 10
-; SI-NEXT: v_readlane_b32 s19, v47, 8
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_addk_i32 s11, 0x300
+; SI-NEXT: s_or_b32 s15, s15, s17
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s18, s15, s11
+; SI-NEXT: s_add_i32 s17, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v47, 18
+; SI-NEXT: s_add_i32 s15, s7, 0x3000000
+; SI-NEXT: s_add_i32 s11, s12, 0x3000000
+; SI-NEXT: s_add_i32 s12, s13, 0x3000000
+; SI-NEXT: s_add_i32 s13, s14, 0x3000000
+; SI-NEXT: s_add_i32 s14, s16, 0x3000000
+; SI-NEXT: s_add_i32 s16, s18, 0x3000000
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 17
+; SI-NEXT: v_readlane_b32 s18, v47, 15
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
+; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v47, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s18
+; SI-NEXT: s_or_b32 s18, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 14
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 13
+; SI-NEXT: v_readlane_b32 s19, v47, 11
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: s_or_b32 s7, s17, s7
-; SI-NEXT: v_readlane_b32 s17, v47, 9
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v47, 12
; SI-NEXT: s_and_b32 s19, s19, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s19, s19, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s19
-; SI-NEXT: s_or_b32 s17, s17, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 7
-; SI-NEXT: s_add_i32 s8, s5, 0x3000000
-; SI-NEXT: s_add_i32 s5, s20, 0x3000000
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s19, v47, 6
-; SI-NEXT: v_readlane_b32 s20, v47, 4
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s19, s19, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s19
+; SI-NEXT: s_or_b32 s19, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 10
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 9
+; SI-NEXT: v_readlane_b32 s20, v47, 7
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_or_b32 s7, s19, s7
-; SI-NEXT: v_readlane_b32 s19, v47, 5
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v47, 8
; SI-NEXT: s_and_b32 s20, s20, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s19, s19, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s19, s19, s20
-; SI-NEXT: s_or_b32 s19, s19, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s20, v47, 2
-; SI-NEXT: v_readlane_b32 s21, v47, 0
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s20
+; SI-NEXT: s_or_b32 s20, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 6
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 5
+; SI-NEXT: v_readlane_b32 s21, v47, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s21, s21, 3
-; SI-NEXT: s_or_b32 s7, s20, s7
-; SI-NEXT: v_readlane_b32 s20, v47, 1
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v47, 4
; SI-NEXT: s_and_b32 s21, s21, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s20, s20, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s21, s21, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s21
-; SI-NEXT: s_or_b32 s20, s20, s7
-; SI-NEXT: v_readlane_b32 s7, v56, 63
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s21, v56, 62
-; SI-NEXT: v_readlane_b32 s22, v56, 60
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s21, s21, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s21
+; SI-NEXT: s_or_b32 s21, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 2
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 1
+; SI-NEXT: v_readlane_b32 s22, v56, 63
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_or_b32 s7, s21, s7
-; SI-NEXT: v_readlane_b32 s21, v56, 61
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v47, 0
; SI-NEXT: s_and_b32 s22, s22, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s21, s21, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s21, s21, s22
-; SI-NEXT: s_or_b32 s21, s21, s7
-; SI-NEXT: v_readlane_b32 s7, v56, 59
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_and_b32 s22, s7, 0xff
-; SI-NEXT: v_readlane_b32 s7, v56, 34
-; SI-NEXT: v_readlane_b32 s23, v56, 57
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s22
+; SI-NEXT: s_or_b32 s22, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v56, 62
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 61
+; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s23, v56, 60
+; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: s_or_b32 s7, s7, s22
-; SI-NEXT: v_readlane_b32 s22, v56, 58
+; SI-NEXT: s_and_b32 s7, s6, 0xffff
+; SI-NEXT: v_readlane_b32 s6, v56, 32
; SI-NEXT: s_and_b32 s23, s23, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s22, s22, 24
+; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_lshl_b32 s23, s23, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s23
-; SI-NEXT: s_or_b32 s22, s22, s7
-; SI-NEXT: v_readlane_b32 s7, v56, 56
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s23, v56, 55
-; SI-NEXT: v_readlane_b32 s24, v56, 53
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s23, s23, 8
+; SI-NEXT: s_or_b32 s6, s6, s23
+; SI-NEXT: s_or_b32 s23, s6, s7
+; SI-NEXT: v_readlane_b32 s6, v56, 59
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 58
+; SI-NEXT: v_readlane_b32 s24, v56, 56
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_or_b32 s7, s23, s7
-; SI-NEXT: v_readlane_b32 s23, v56, 54
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 57
; SI-NEXT: s_and_b32 s24, s24, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s23, s23, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s24, s24, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_or_b32 s23, s23, s7
-; SI-NEXT: v_readlane_b32 s7, v56, 52
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s24, v56, 51
-; SI-NEXT: v_readlane_b32 s25, v56, 49
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s24, s24, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s24
+; SI-NEXT: s_or_b32 s24, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v56, 55
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 54
+; SI-NEXT: v_readlane_b32 s25, v56, 52
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_or_b32 s7, s24, s7
-; SI-NEXT: v_readlane_b32 s24, v56, 50
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 53
; SI-NEXT: s_and_b32 s25, s25, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s24, s24, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s25, s25, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s25
-; SI-NEXT: s_or_b32 s7, s24, s7
-; SI-NEXT: s_add_i32 s24, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 12
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s25, v56, 48
-; SI-NEXT: v_readlane_b32 s26, v56, 46
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s25, s25, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s25
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s25, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 10
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 51
+; SI-NEXT: v_readlane_b32 s26, v56, 49
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_or_b32 s7, s25, s7
-; SI-NEXT: v_readlane_b32 s25, v56, 47
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 50
; SI-NEXT: s_and_b32 s26, s26, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s25, s25, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s26
-; SI-NEXT: s_or_b32 s7, s25, s7
-; SI-NEXT: s_add_i32 s25, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 16
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s26, v56, 15
-; SI-NEXT: v_readlane_b32 s27, v56, 14
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s26, s26, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s26
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s26, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 14
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 13
+; SI-NEXT: v_readlane_b32 s27, v56, 12
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_or_b32 s7, s26, s7
-; SI-NEXT: v_readlane_b32 s26, v56, 13
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 11
; SI-NEXT: s_and_b32 s27, s27, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s26, s26, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s26, s26, s27
-; SI-NEXT: s_or_b32 s7, s26, s7
-; SI-NEXT: s_add_i32 s26, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 20
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s27, v56, 19
-; SI-NEXT: v_readlane_b32 s28, v56, 18
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s27
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s27, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 18
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 17
+; SI-NEXT: v_readlane_b32 s28, v56, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_or_b32 s7, s27, s7
-; SI-NEXT: v_readlane_b32 s27, v56, 17
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 15
; SI-NEXT: s_and_b32 s28, s28, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s27, s27, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s28, s28, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: s_or_b32 s7, s27, s7
-; SI-NEXT: s_add_i32 s27, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 24
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s28, v56, 23
-; SI-NEXT: v_readlane_b32 s29, v56, 22
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s28, s28, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s28
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s28, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 22
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 21
+; SI-NEXT: v_readlane_b32 s29, v56, 20
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_or_b32 s7, s28, s7
-; SI-NEXT: v_readlane_b32 s28, v56, 21
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 19
; SI-NEXT: s_and_b32 s29, s29, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s28, s28, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s29, s29, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s28, s28, s29
-; SI-NEXT: s_or_b32 s7, s28, s7
-; SI-NEXT: s_add_i32 s28, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 28
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s29, v56, 27
-; SI-NEXT: v_readlane_b32 s40, v56, 26
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s29, s29, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s29
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s29, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 26
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 25
+; SI-NEXT: v_readlane_b32 s40, v56, 24
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s40, s40, 3
-; SI-NEXT: s_or_b32 s7, s29, s7
-; SI-NEXT: v_readlane_b32 s29, v56, 25
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 23
; SI-NEXT: s_and_b32 s40, s40, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s29, s29, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s29, s29, s40
-; SI-NEXT: s_or_b32 s7, s29, s7
-; SI-NEXT: s_add_i32 s29, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 32
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s40, v56, 31
-; SI-NEXT: v_readlane_b32 s41, v56, 30
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s40, s40, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s40
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s40, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 43
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 41
+; SI-NEXT: v_readlane_b32 s41, v56, 28
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s41, s41, 3
-; SI-NEXT: s_or_b32 s7, s40, s7
-; SI-NEXT: v_readlane_b32 s40, v56, 29
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 27
; SI-NEXT: s_and_b32 s41, s41, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s40, s40, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s41, s41, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s40, s40, s41
-; SI-NEXT: s_or_b32 s7, s40, s7
-; SI-NEXT: s_add_i32 s40, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 41
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s41, v56, 40
-; SI-NEXT: v_readlane_b32 s42, v56, 37
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s41, s41, 8
-; SI-NEXT: s_add_i32 s42, s42, 3
-; SI-NEXT: s_or_b32 s7, s41, s7
-; SI-NEXT: v_readlane_b32 s41, v56, 33
-; SI-NEXT: s_and_b32 s42, s42, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s41, s41, 24
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s41, s41, s42
-; SI-NEXT: s_or_b32 s7, s41, s7
-; SI-NEXT: s_add_i32 s41, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 44
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s42, v56, 42
-; SI-NEXT: v_readlane_b32 s43, v56, 39
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s42, s42, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s41
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s42, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 44
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 42
+; SI-NEXT: v_readlane_b32 s41, v56, 38
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
+; SI-NEXT: s_add_i32 s41, s41, 3
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 37
+; SI-NEXT: s_and_b32 s41, s41, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s41
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s41, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 47
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 45
+; SI-NEXT: v_readlane_b32 s43, v56, 40
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s43, s43, 3
-; SI-NEXT: s_or_b32 s7, s42, s7
-; SI-NEXT: v_readlane_b32 s42, v56, 38
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 39
; SI-NEXT: s_and_b32 s43, s43, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s42, s42, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s42, s42, s43
-; SI-NEXT: s_or_b32 s7, s42, s7
-; SI-NEXT: s_add_i32 s42, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 1
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s43, v56, 0
-; SI-NEXT: v_readlane_b32 s44, v56, 45
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s43, s43, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s43
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s43, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 1
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 0
+; SI-NEXT: v_readlane_b32 s44, v56, 48
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s44, s44, 3
-; SI-NEXT: s_or_b32 s7, s43, s7
-; SI-NEXT: v_readlane_b32 s43, v56, 43
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readlane_b32 s7, v56, 46
; SI-NEXT: s_and_b32 s44, s44, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s43, s43, 24
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s43, s43, s44
-; SI-NEXT: s_or_b32 s7, s43, s7
-; SI-NEXT: s_add_i32 s43, s7, 0x3000000
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s44
+; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_readlane_b32 s7, v56, 5
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: v_readlane_b32 s44, v56, 4
@@ -147993,249 +148051,251 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s44, s44, s45
; SI-NEXT: s_or_b32 s7, s44, s7
-; SI-NEXT: s_add_i32 s44, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 9
-; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: v_readlane_b32 s44, v56, 9
+; SI-NEXT: s_add_i32 s44, s44, 3
; SI-NEXT: v_readlane_b32 s45, v56, 8
; SI-NEXT: v_readlane_b32 s46, v56, 7
-; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: s_and_b32 s44, s44, 0xff
; SI-NEXT: s_lshl_b32 s45, s45, 8
; SI-NEXT: s_add_i32 s46, s46, 3
-; SI-NEXT: s_or_b32 s7, s45, s7
+; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: v_readlane_b32 s45, v56, 6
; SI-NEXT: s_and_b32 s46, s46, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
+; SI-NEXT: s_addk_i32 s44, 0x300
; SI-NEXT: s_lshl_b32 s45, s45, 24
; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
; SI-NEXT: s_or_b32 s45, s45, s46
-; SI-NEXT: s_or_b32 s7, s45, s7
-; SI-NEXT: s_add_i32 s45, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v56, 36
-; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_or_b32 s44, s45, s44
+; SI-NEXT: v_readlane_b32 s45, v56, 36
+; SI-NEXT: s_add_i32 s45, s45, 3
; SI-NEXT: v_readlane_b32 s46, v56, 35
-; SI-NEXT: v_readlane_b32 s47, v56, 11
-; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: v_readlane_b32 s47, v56, 33
+; SI-NEXT: s_and_b32 s45, s45, 0xff
; SI-NEXT: s_lshl_b32 s46, s46, 8
; SI-NEXT: s_add_i32 s47, s47, 3
-; SI-NEXT: s_or_b32 s7, s46, s7
-; SI-NEXT: v_readlane_b32 s46, v56, 10
+; SI-NEXT: s_or_b32 s45, s46, s45
+; SI-NEXT: v_readlane_b32 s46, v56, 34
; SI-NEXT: s_and_b32 s47, s47, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
+; SI-NEXT: s_addk_i32 s45, 0x300
; SI-NEXT: s_lshl_b32 s46, s46, 24
; SI-NEXT: s_lshl_b32 s47, s47, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_and_b32 s45, s45, 0xffff
; SI-NEXT: s_or_b32 s46, s46, s47
-; SI-NEXT: s_or_b32 s7, s46, s7
-; SI-NEXT: s_add_i32 s6, s6, 0x3000000
-; SI-NEXT: s_add_i32 s12, s12, 0x3000000
-; SI-NEXT: s_add_i32 s11, s11, 0x3000000
+; SI-NEXT: s_or_b32 s45, s46, s45
+; SI-NEXT: s_add_i32 s4, s4, 0x3000000
+; SI-NEXT: s_add_i32 s5, s5, 0x3000000
+; SI-NEXT: s_add_i32 s8, s8, 0x3000000
; SI-NEXT: s_add_i32 s9, s9, 0x3000000
-; SI-NEXT: s_add_i32 s16, s16, 0x3000000
-; SI-NEXT: s_add_i32 s17, s17, 0x3000000
+; SI-NEXT: s_add_i32 s10, s10, 0x3000000
+; SI-NEXT: s_add_i32 s18, s18, 0x3000000
; SI-NEXT: s_add_i32 s19, s19, 0x3000000
; SI-NEXT: s_add_i32 s20, s20, 0x3000000
; SI-NEXT: s_add_i32 s21, s21, 0x3000000
; SI-NEXT: s_add_i32 s22, s22, 0x3000000
; SI-NEXT: s_add_i32 s23, s23, 0x3000000
+; SI-NEXT: s_add_i32 s24, s24, 0x3000000
+; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: s_add_i32 s7, s7, 0x3000000
-; SI-NEXT: s_and_b32 s39, s7, 0xffff0000
+; SI-NEXT: s_add_i32 s44, s44, 0x3000000
+; SI-NEXT: s_add_i32 s45, s45, 0x3000000
+; SI-NEXT: s_and_b32 s97, s45, 0xffff0000
+; SI-NEXT: s_lshl_b32 s99, s45, 16
+; SI-NEXT: s_and_b32 s98, s44, 0xffff0000
+; SI-NEXT: s_lshl_b32 s78, s44, 16
+; SI-NEXT: s_and_b32 s96, s7, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_and_b32 s48, s45, 0xffff0000
-; SI-NEXT: s_lshl_b32 s37, s45, 16
-; SI-NEXT: s_and_b32 s50, s44, 0xffff0000
-; SI-NEXT: s_lshl_b32 s49, s44, 16
-; SI-NEXT: s_and_b32 s51, s43, 0xffff0000
-; SI-NEXT: s_lshl_b32 s36, s43, 16
-; SI-NEXT: s_and_b32 s53, s42, 0xffff0000
-; SI-NEXT: s_lshl_b32 s52, s42, 16
-; SI-NEXT: s_and_b32 s54, s41, 0xffff0000
-; SI-NEXT: s_lshl_b32 s35, s41, 16
-; SI-NEXT: s_and_b32 s64, s40, 0xffff0000
-; SI-NEXT: s_lshl_b32 s55, s40, 16
-; SI-NEXT: s_and_b32 s65, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s34, s29, 16
-; SI-NEXT: s_and_b32 s67, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s66, s28, 16
-; SI-NEXT: s_and_b32 s68, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 s31, s27, 16
-; SI-NEXT: s_and_b32 s70, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s69, s26, 16
-; SI-NEXT: s_and_b32 s71, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s28, s25, 16
-; SI-NEXT: s_and_b32 s81, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s80, s24, 16
-; SI-NEXT: s_and_b32 s82, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s24, s23, 16
-; SI-NEXT: s_and_b32 s84, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s83, s22, 16
-; SI-NEXT: s_and_b32 s85, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s26, s21, 16
-; SI-NEXT: s_and_b32 s87, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s86, s20, 16
-; SI-NEXT: s_and_b32 s96, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s95, s19, 16
-; SI-NEXT: s_and_b32 s98, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s97, s17, 16
-; SI-NEXT: s_and_b32 s99, s16, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s16, 16
-; SI-NEXT: s_and_b32 s38, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_and_b32 s29, s15, 0xffff0000
-; SI-NEXT: s_lshl_b32 s93, s15, 16
-; SI-NEXT: s_and_b32 s15, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_and_b32 s43, s14, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s14, 16
-; SI-NEXT: s_and_b32 s47, s13, 0xffff0000
-; SI-NEXT: s_lshl_b32 s14, s13, 16
-; SI-NEXT: s_and_b32 s42, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s9, 16
-; SI-NEXT: s_and_b32 s13, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s45, s11, 16
-; SI-NEXT: s_and_b32 s11, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s12, 16
-; SI-NEXT: s_and_b32 s40, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s27, s10, 16
-; SI-NEXT: s_and_b32 s41, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s89, s8, 16
-; SI-NEXT: s_and_b32 s44, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s12, s18, 16
-; SI-NEXT: s_and_b32 s46, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s76, s6, 16
+; SI-NEXT: s_and_b32 s86, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s77, s6, 16
+; SI-NEXT: s_and_b32 s6, s43, 0xffff0000
+; SI-NEXT: s_lshl_b32 s87, s43, 16
+; SI-NEXT: s_and_b32 s85, s41, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_and_b32 s84, s42, 0xffff0000
+; SI-NEXT: s_lshl_b32 s83, s42, 16
+; SI-NEXT: s_and_b32 s82, s40, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s40, 16
+; SI-NEXT: s_and_b32 s81, s29, 0xffff0000
+; SI-NEXT: s_lshl_b32 s80, s29, 16
+; SI-NEXT: s_and_b32 s71, s28, 0xffff0000
+; SI-NEXT: s_lshl_b32 s75, s28, 16
+; SI-NEXT: s_and_b32 s70, s27, 0xffff0000
+; SI-NEXT: s_lshl_b32 s69, s27, 16
+; SI-NEXT: s_and_b32 s68, s26, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s26, 16
+; SI-NEXT: s_and_b32 s67, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s66, s25, 16
+; SI-NEXT: s_and_b32 s48, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s73, s24, 16
+; SI-NEXT: s_and_b32 s50, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s49, s23, 16
+; SI-NEXT: s_and_b32 s51, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s72, s22, 16
+; SI-NEXT: s_and_b32 s53, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s52, s21, 16
+; SI-NEXT: s_and_b32 s54, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s63, s20, 16
+; SI-NEXT: s_and_b32 s64, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s55, s19, 16
+; SI-NEXT: s_and_b32 s65, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s58, s18, 16
+; SI-NEXT: s_and_b32 s39, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 s38, s16, 16
+; SI-NEXT: s_and_b32 s37, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s44, s14, 16
+; SI-NEXT: s_and_b32 s36, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s35, s13, 16
+; SI-NEXT: s_and_b32 s34, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s29, s12, 16
+; SI-NEXT: s_and_b32 s24, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s30, s11, 16
+; SI-NEXT: s_and_b32 vcc_hi, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s19, s10, 16
+; SI-NEXT: s_and_b32 vcc_lo, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 s21, s9, 16
+; SI-NEXT: s_and_b32 s13, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s93, s8, 16
+; SI-NEXT: s_and_b32 s92, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s91, s15, 16
+; SI-NEXT: s_and_b32 s90, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s89, s17, 16
+; SI-NEXT: s_and_b32 s88, s5, 0xffff0000
+; SI-NEXT: s_lshl_b32 s79, s5, 16
+; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s18, s4, 16
; SI-NEXT: .LBB89_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s39
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s97
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s99
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s48
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s98
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s37
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s78
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s50
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s96
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s49
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s7
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s51
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s86
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s36
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s77
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s53
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s6
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s52
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s87
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s54
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s85
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s41
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s64
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s84
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s55
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s83
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s65
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s82
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s76
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s81
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s66
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s80
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s68
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s71
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s75
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s70
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s69
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s71
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s68
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s74
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s81
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s67
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s80
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s66
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s82
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s48
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s73
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s84
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s50
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s83
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s49
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s85
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s51
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s72
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s87
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s53
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s86
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s52
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s96
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s54
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s63
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s98
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s64
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s97
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s55
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s99
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s65
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s58
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s38
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s39
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s38
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s37
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s44
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s36
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s35
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s34
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s29
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s24
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s30
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, vcc_hi
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s19
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, vcc_lo
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s13
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s93
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s92
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s91
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s90
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
; SI-NEXT: v_mul_f32_e64 v29, 1.0, s89
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s88
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s79
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s5
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s18
; SI-NEXT: v_readlane_b32 s30, v45, 34
; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16
; SI-NEXT: v_readlane_b32 s31, v45, 35
@@ -148333,8 +148393,8 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_readfirstlane_b32 s11, v2
; VI-NEXT: v_readfirstlane_b32 s6, v1
; VI-NEXT: v_readfirstlane_b32 s8, v0
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324
@@ -148345,39 +148405,39 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:304
; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:300
; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:292
; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:288
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:284
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:280
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:280
; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:276
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:272
; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:268
; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:260
; VI-NEXT: s_cmp_lg_u64 vcc, 0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:256
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:252
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:248
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:244
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:240
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:244
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:240
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
@@ -148417,19 +148477,19 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:172
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:168
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:168
; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:160
; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:156
; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:148
; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:140
; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:120
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:108
@@ -148441,128 +148501,112 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:64
; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36
; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12
; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB89_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v27, v27, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_perm_b32 v15, v15, v62, s4
-; VI-NEXT: v_or_b32_e32 v15, v15, v27
-; VI-NEXT: v_perm_b32 v27, v32, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_perm_b32 v25, v25, v49, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v15, v15, v63, s4
+; VI-NEXT: v_or_b32_e32 v15, v15, v25
+; VI-NEXT: v_perm_b32 v25, v32, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_perm_b32 v28, v60, v28, s4
; VI-NEXT: v_perm_b32 v17, v17, v16, s4
-; VI-NEXT: v_or_b32_e32 v16, v28, v27
-; VI-NEXT: v_perm_b32 v27, v47, v45, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_e32 v16, v28, v25
+; VI-NEXT: v_perm_b32 v25, v47, v46, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_perm_b32 v18, v29, v18, s4
-; VI-NEXT: v_or_b32_e32 v18, v18, v27
-; VI-NEXT: v_perm_b32 v27, v44, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_perm_b32 v19, v43, v19, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v27
-; VI-NEXT: v_perm_b32 v27, v21, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_mov_b32_e32 v43, v20
-; VI-NEXT: v_perm_b32 v20, v26, v20, s4
-; VI-NEXT: v_or_b32_e32 v20, v20, v27
-; VI-NEXT: v_perm_b32 v27, v22, v25, s4
-; VI-NEXT: v_perm_b32 v21, v23, v54, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v25
+; VI-NEXT: v_perm_b32 v25, v45, v30, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v19, v44, v19, s4
+; VI-NEXT: v_or_b32_e32 v19, v19, v25
+; VI-NEXT: v_perm_b32 v25, v55, v24, s4
+; VI-NEXT: v_mov_b32_e32 v45, v44
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_mov_b32_e32 v44, v20
+; VI-NEXT: v_perm_b32 v20, v27, v20, s4
+; VI-NEXT: v_or_b32_e32 v20, v20, v25
+; VI-NEXT: v_perm_b32 v25, v22, v26, s4
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_e32 v21, v21, v27
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v49, v31
-; VI-NEXT: v_mov_b32_e32 v62, v49
-; VI-NEXT: v_perm_b32 v29, v49, v55, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v32, v57, v56, s4
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v42, v41
-; VI-NEXT: v_mov_b32_e32 v41, v12
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_mov_b32_e32 v31, v10
-; VI-NEXT: v_or_b32_e32 v17, v17, v32
-; VI-NEXT: v_perm_b32 v28, v42, v31, s4
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_e32 v21, v21, v25
; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v0, s17
; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s21
; VI-NEXT: v_perm_b32 v3, s22, v3, v11
; VI-NEXT: v_perm_b32 v0, s16, v0, v11
@@ -148576,97 +148620,113 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_perm_b32 v3, s26, v3, v11
; VI-NEXT: v_perm_b32 v2, s24, v2, v11
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: v_perm_b32 v4, s8, v4, v11
; VI-NEXT: v_perm_b32 v3, s28, v3, v11
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, s10
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_perm_b32 v5, s14, v5, v11
; VI-NEXT: v_perm_b32 v4, s11, v4, v11
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s41
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_perm_b32 v6, s46, v6, v11
; VI-NEXT: v_perm_b32 v5, s42, v5, v11
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, s57
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s45
; VI-NEXT: v_perm_b32 v7, s63, v7, v11
; VI-NEXT: v_perm_b32 v6, s58, v6, v11
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s61
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s62
; VI-NEXT: v_perm_b32 v8, s73, v8, v11
; VI-NEXT: v_perm_b32 v7, s74, v7, v11
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s9
; VI-NEXT: v_perm_b32 v9, s40, v9, v11
; VI-NEXT: v_perm_b32 v8, s76, v8, v11
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v27, v23, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v48, v31
+; VI-NEXT: v_mov_b32_e32 v31, v10
; VI-NEXT: v_mov_b32_e32 v10, s43
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_perm_b32 v10, s56, v10, v11
; VI-NEXT: v_perm_b32 v9, s44, v9, v11
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_mov_b32_e32 v42, v41
+; VI-NEXT: v_mov_b32_e32 v41, v12
; VI-NEXT: v_mov_b32_e32 v12, s59
; VI-NEXT: v_or_b32_e32 v9, v9, v10
+; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: v_perm_b32 v25, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_mov_b32_e32 v10, s47
; VI-NEXT: v_perm_b32 v12, s72, v12, v11
; VI-NEXT: v_perm_b32 v10, s60, v10, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v35, v34, s4
+; VI-NEXT: v_perm_b32 v12, v34, v33, s4
; VI-NEXT: v_perm_b32 v11, s75, v13, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v50, v37, s4
+; VI-NEXT: v_perm_b32 v12, v51, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v39, v36, s4
+; VI-NEXT: v_perm_b32 v13, v39, v35, s4
; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v59, v48, s4
+; VI-NEXT: v_perm_b32 v13, v62, v50, s4
+; VI-NEXT: v_mov_b32_e32 v62, v48
+; VI-NEXT: v_perm_b32 v29, v48, v52, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v57, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_or_b32_e32 v17, v17, v32
+; VI-NEXT: v_perm_b32 v28, v42, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v34, v46, v38, s4
-; VI-NEXT: v_perm_b32 v14, v14, v58, s4
-; VI-NEXT: v_or_b32_e32 v13, v34, v13
+; VI-NEXT: v_perm_b32 v33, v58, v38, s4
+; VI-NEXT: v_perm_b32 v14, v14, v59, s4
+; VI-NEXT: v_or_b32_e32 v13, v33, v13
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v34, v63, v51, s4
-; VI-NEXT: v_or_b32_e32 v14, v34, v14
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_mov_b32_e32 v34, v30
-; VI-NEXT: v_mov_b32_e32 v35, v52
-; VI-NEXT: v_mov_b32_e32 v48, v55
-; VI-NEXT: s_waitcnt vmcnt(11)
-; VI-NEXT: v_mov_b32_e32 v37, v49
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v33, v36, v43, s4
+; VI-NEXT: v_or_b32_e32 v14, v33, v14
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: v_mov_b32_e32 v34, v52
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_perm_b32 v22, v23, v22, s4
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v22, v22, v27
+; VI-NEXT: v_or_b32_e32 v22, v22, v25
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_mov_b32_e32 v63, v30
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_mov_b32_e32 v37, v48
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_mov_b32_e32 v58, v32
+; VI-NEXT: v_mov_b32_e32 v43, v32
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_mov_b32_e32 v51, v31
+; VI-NEXT: v_mov_b32_e32 v33, v31
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v24, v24, v23, s4
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
@@ -148685,115 +148745,116 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
; VI-NEXT: v_or_b32_e32 v25, v26, v25
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v26, v53, v26, s4
+; VI-NEXT: v_perm_b32 v26, v40, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v40, s4
+; VI-NEXT: v_perm_b32 v27, v27, v54, s4
; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v27, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
; VI-NEXT: v_or_b32_e32 v27, v28, v27
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v52, s4
+; VI-NEXT: v_perm_b32 v28, v28, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v50, v29
+; VI-NEXT: v_mov_b32_e32 v49, v29
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v46, v30
+; VI-NEXT: v_mov_b32_e32 v51, v30
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v33, v30
+; VI-NEXT: v_mov_b32_e32 v36, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v63, v31
+; VI-NEXT: v_mov_b32_e32 v50, v31
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v59, v31
+; VI-NEXT: v_mov_b32_e32 v39, v31
; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v36, v31
+; VI-NEXT: v_mov_b32_e32 v59, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v39, v32
+; VI-NEXT: v_mov_b32_e32 v58, v32
; VI-NEXT: v_perm_b32 v31, v32, v31, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v38, v32
-; VI-NEXT: v_perm_b32 v32, v49, v32, s4
+; VI-NEXT: v_perm_b32 v32, v48, v32, s4
; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB89_3
; VI-NEXT: .LBB89_2:
-; VI-NEXT: v_mov_b32_e32 v39, v4
+; VI-NEXT: v_mov_b32_e32 v58, v4
; VI-NEXT: v_mov_b32_e32 v62, v31
; VI-NEXT: v_mov_b32_e32 v37, v3
-; VI-NEXT: v_mov_b32_e32 v35, v52
-; VI-NEXT: v_mov_b32_e32 v63, v9
-; VI-NEXT: v_mov_b32_e32 v36, v1
-; VI-NEXT: v_mov_b32_e32 v48, v55
-; VI-NEXT: v_mov_b32_e32 v58, v6
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: v_mov_b32_e32 v50, v9
+; VI-NEXT: v_mov_b32_e32 v59, v1
+; VI-NEXT: v_mov_b32_e32 v34, v52
+; VI-NEXT: v_mov_b32_e32 v43, v6
; VI-NEXT: v_mov_b32_e32 v38, v0
-; VI-NEXT: v_mov_b32_e32 v34, v42
-; VI-NEXT: v_mov_b32_e32 v33, v5
-; VI-NEXT: v_mov_b32_e32 v51, v49
-; VI-NEXT: v_mov_b32_e32 v59, v2
-; VI-NEXT: v_mov_b32_e32 v50, v8
-; VI-NEXT: v_mov_b32_e32 v46, v7
-; VI-NEXT: v_mov_b32_e32 v43, v20
+; VI-NEXT: v_mov_b32_e32 v63, v48
+; VI-NEXT: v_mov_b32_e32 v36, v5
+; VI-NEXT: v_mov_b32_e32 v33, v42
+; VI-NEXT: v_mov_b32_e32 v39, v2
+; VI-NEXT: v_mov_b32_e32 v49, v8
+; VI-NEXT: v_mov_b32_e32 v51, v7
+; VI-NEXT: v_mov_b32_e32 v45, v44
+; VI-NEXT: v_mov_b32_e32 v44, v20
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB89_3: ; %Flow
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
; VI-NEXT: s_cbranch_scc1 .LBB89_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v0, v0, v36, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: v_perm_b32 v0, v0, v59, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v37
; VI-NEXT: v_perm_b32 v0, v0, v38, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v50
+; VI-NEXT: v_perm_b32 v0, v0, v36, s4
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43
+; VI-NEXT: v_perm_b32 v21, v0, v39, s4
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v63
-; VI-NEXT: v_perm_b32 v0, v0, v33, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
-; VI-NEXT: v_perm_b32 v63, v0, v59, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v22, v0, v50, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
-; VI-NEXT: v_perm_b32 v23, v0, v46, s4
+; VI-NEXT: v_perm_b32 v22, v0, v49, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33
+; VI-NEXT: v_perm_b32 v23, v0, v51, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s72, s72, 3
@@ -148816,7 +148877,6 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_mov_b32_e32 v46, s21
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v58, s19
; VI-NEXT: s_add_i32 s16, s16, 3
@@ -148825,42 +148885,42 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: v_perm_b32 v24, v0, v35, s4
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v25, v0, v48, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v0, v34, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v28, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v31, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
@@ -148874,87 +148934,86 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v1, v0, s4
+; VI-NEXT: v_perm_b32 v20, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v44, v0, v1, s4
+; VI-NEXT: v_perm_b32 v63, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v45, v0, v1, s4
+; VI-NEXT: v_perm_b32 v32, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v1, v0, s4
+; VI-NEXT: v_perm_b32 v46, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v47, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v56, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v57, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v19, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v18, v0, v43, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v0, v44, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v60, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v45
+; VI-NEXT: v_mov_b32_e32 v45, s21
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v61, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v40, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v42, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v10, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
@@ -148963,177 +149022,177 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v12, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v14, v0, v32, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v55
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v32, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v34, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v33, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v36, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v35, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v37, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v38, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v39, v0, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; VI-NEXT: v_perm_b32 v46, s20, v46, v0
+; VI-NEXT: v_perm_b32 v45, s20, v45, v0
; VI-NEXT: v_perm_b32 v58, s18, v58, v0
; VI-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v46
+; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v45
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v39, s75, v1, v0
+; VI-NEXT: v_perm_b32 v48, s75, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: v_perm_b32 v33, s72, v1, v0
+; VI-NEXT: v_perm_b32 v34, s72, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_perm_b32 v35, s60, v1, v0
+; VI-NEXT: v_perm_b32 v36, s60, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v9, s56, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: v_perm_b32 v48, s44, v1, v0
+; VI-NEXT: v_perm_b32 v49, s44, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: v_perm_b32 v8, s40, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_perm_b32 v49, s76, v1, v0
+; VI-NEXT: v_perm_b32 v50, s76, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v7, s73, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: v_perm_b32 v50, s74, v1, v0
+; VI-NEXT: v_perm_b32 v51, s74, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s57
; VI-NEXT: v_perm_b32 v6, s63, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: v_perm_b32 v51, s58, v1, v0
+; VI-NEXT: v_perm_b32 v52, s58, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s41
; VI-NEXT: v_perm_b32 v5, s46, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_perm_b32 v52, s42, v1, v0
+; VI-NEXT: v_perm_b32 v53, s42, v1, v0
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v48
-; VI-NEXT: v_or_b32_sdwa v5, v5, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v6, v6, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v7, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v8, v8, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v9, v9, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v10
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v11
-; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v12
-; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v13
-; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
+; VI-NEXT: v_or_b32_sdwa v5, v5, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v6, v6, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v7, v7, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v8, v8, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v9, v9, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v10
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v11
+; VI-NEXT: v_lshlrev_b32_e32 v51, 16, v12
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v13
+; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v14
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v34
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
-; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v37
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
-; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v35
-; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v12, v12, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v35
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v38
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v39
+; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v48
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v36
+; VI-NEXT: v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v11, v11, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v1, s10
; VI-NEXT: v_perm_b32 v4, s14, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: v_perm_b32 v53, s11, v1, v0
+; VI-NEXT: v_perm_b32 v54, s11, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_perm_b32 v3, s8, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: v_perm_b32 v54, s28, v1, v0
+; VI-NEXT: v_perm_b32 v55, s28, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: v_perm_b32 v2, s26, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_perm_b32 v55, s24, v1, v0
+; VI-NEXT: v_perm_b32 v43, s24, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s23
; VI-NEXT: v_perm_b32 v1, s22, v1, v0
; VI-NEXT: v_perm_b32 v0, s16, v59, v0
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
+; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v43
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v54
-; VI-NEXT: v_or_b32_sdwa v4, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v16, v50, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v17, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v63
-; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v22
-; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v23
-; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v25
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v26
+; VI-NEXT: v_or_b32_sdwa v15, v53, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v16, v51, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v17, v49, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v21
+; VI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
+; VI-NEXT: v_add_u32_e32 v38, vcc, 0x300, v23
+; VI-NEXT: v_lshlrev_b32_e32 v39, 16, v24
+; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v25
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v26
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v29
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v30
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v31
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v62
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v21
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v44
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v45
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v20
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v47
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v20
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v63
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v32
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v46
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v47
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v56
; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v57
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v19
@@ -149143,29 +149202,30 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v42
; VI-NEXT: v_or_b32_sdwa v0, v58, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v2, v2, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v3, v3, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v1, v1, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v2, v2, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v3, v3, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v4, v4, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v18, v18, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v19, v19, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v20, v20, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v21, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v34
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; VI-NEXT: v_or_b32_sdwa v22, v22, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; VI-NEXT: v_or_b32_sdwa v22, v22, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v27, v48, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v28, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v29, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v30, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v31, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v27, v49, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v28, v39, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v29, v37, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v30, v35, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v31, v33, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -149237,6 +149297,21 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readfirstlane_b32 s13, v25
+; GFX9-NEXT: v_readfirstlane_b32 s43, v2
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:280
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:264
+; GFX9-NEXT: v_readfirstlane_b32 s15, v3
+; GFX9-NEXT: v_readfirstlane_b32 s10, v4
+; GFX9-NEXT: v_readfirstlane_b32 s47, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v5
+; GFX9-NEXT: v_readfirstlane_b32 s59, v6
+; GFX9-NEXT: v_readfirstlane_b32 s14, v8
+; GFX9-NEXT: v_readfirstlane_b32 s12, v9
+; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s42, v13
; GFX9-NEXT: v_readfirstlane_b32 s46, v12
; GFX9-NEXT: v_readfirstlane_b32 s61, v11
@@ -149245,120 +149320,76 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
-; GFX9-NEXT: v_readfirstlane_b32 s13, v25
-; GFX9-NEXT: v_readfirstlane_b32 s40, v24
-; GFX9-NEXT: v_readfirstlane_b32 s60, v22
-; GFX9-NEXT: v_readfirstlane_b32 s43, v2
-; GFX9-NEXT: v_readfirstlane_b32 s6, v1
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; GFX9-NEXT: v_readfirstlane_b32 s59, v6
-; GFX9-NEXT: v_readfirstlane_b32 s15, v3
-; GFX9-NEXT: v_readfirstlane_b32 s10, v4
-; GFX9-NEXT: v_readfirstlane_b32 s47, v7
-; GFX9-NEXT: v_readfirstlane_b32 s8, v5
-; GFX9-NEXT: v_readfirstlane_b32 s12, v9
-; GFX9-NEXT: v_readfirstlane_b32 s14, v8
-; GFX9-NEXT: v_readfirstlane_b32 s63, v10
-; GFX9-NEXT: v_readfirstlane_b32 s11, v20
+; GFX9-NEXT: v_readfirstlane_b32 s41, v19
+; GFX9-NEXT: v_readfirstlane_b32 s6, v1
; GFX9-NEXT: v_readfirstlane_b32 s74, v30
; GFX9-NEXT: v_readfirstlane_b32 s44, v29
; GFX9-NEXT: v_readfirstlane_b32 s56, v28
; GFX9-NEXT: v_readfirstlane_b32 s62, v27
; GFX9-NEXT: v_readfirstlane_b32 s72, v26
-; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s60, v22
; GFX9-NEXT: v_readfirstlane_b32 s9, v21
-; GFX9-NEXT: v_readfirstlane_b32 s41, v19
; GFX9-NEXT: v_readfirstlane_b32 s76, v18
; GFX9-NEXT: v_readfirstlane_b32 s45, v17
; GFX9-NEXT: v_readfirstlane_b32 s58, v16
; GFX9-NEXT: v_readfirstlane_b32 s73, v15
; GFX9-NEXT: v_readfirstlane_b32 s75, v14
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:288
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:284
+; GFX9-NEXT: v_readfirstlane_b32 s40, v24
+; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s63, v10
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:260
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:324
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:320
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:312
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:308
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:304
-; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:296
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:280
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312
; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
-; GFX9-NEXT: s_waitcnt vmcnt(27)
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:272
-; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:268
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:260
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:256
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:252
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:304
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:248
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:240
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:232
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:228
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:224
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:220
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:216
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:212
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:208
; GFX9-NEXT: s_waitcnt vmcnt(0)
@@ -149367,173 +149398,204 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:196
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:192
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:188
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:184
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:180
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:176
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:172
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:172
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:168
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:168
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:164
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:160
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:156
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:152
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:152
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:148
; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:140
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:136
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:132
; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:124
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:124
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:120
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(30)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(29)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB89_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v25, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v48, s19
-; GFX9-NEXT: v_mov_b32_e32 v10, s17
-; GFX9-NEXT: v_perm_b32 v48, s18, v48, v25
-; GFX9-NEXT: v_perm_b32 v10, s16, v10, v25
-; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v48
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v51, v53
+; GFX9-NEXT: v_mov_b32_e32 v53, v32
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b32 s4, 0x6050400
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v0, v24, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v24, v59, v57, s5
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v52, v3
+; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
+; GFX9-NEXT: v_perm_b32 v12, v33, v26, s4
+; GFX9-NEXT: v_perm_b32 v26, v60, v45, s5
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v63, v42
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v25, 0xc0c0004
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v50, s21
+; GFX9-NEXT: v_perm_b32 v43, s20, v50, v25
+; GFX9-NEXT: v_mov_b32_e32 v50, s23
+; GFX9-NEXT: v_perm_b32 v50, s22, v50, v25
+; GFX9-NEXT: v_mov_b32_e32 v42, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v50
+; GFX9-NEXT: v_mov_b32_e32 v50, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: v_perm_b32 v3, s26, v3, v25
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v58, v4
+; GFX9-NEXT: v_mov_b32_e32 v56, v4
; GFX9-NEXT: v_perm_b32 v2, s24, v2, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s6
; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: v_perm_b32 v4, s7, v4, v25
-; GFX9-NEXT: v_mov_b32_e32 v63, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v42
-; GFX9-NEXT: v_mov_b32_e32 v42, v5
+; GFX9-NEXT: v_mov_b32_e32 v58, v5
; GFX9-NEXT: v_perm_b32 v3, s28, v3, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s8
-; GFX9-NEXT: v_mov_b32_e32 v48, s21
; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v4, s15
; GFX9-NEXT: v_perm_b32 v5, s10, v5, v25
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v23, s20, v48, v25
-; GFX9-NEXT: v_mov_b32_e32 v48, s23
+; GFX9-NEXT: v_mov_b32_e32 v34, v6
; GFX9-NEXT: v_perm_b32 v4, s43, v4, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s12
-; GFX9-NEXT: v_perm_b32 v48, s22, v48, v25
; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v5, s47
; GFX9-NEXT: v_perm_b32 v6, s14, v6, v25
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v48
-; GFX9-NEXT: v_mov_b32_e32 v48, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v7
+; GFX9-NEXT: v_mov_b32_e32 v49, v7
; GFX9-NEXT: v_perm_b32 v5, s59, v5, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s42
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v10, s19
; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v6, s61
; GFX9-NEXT: v_perm_b32 v7, s46, v7, v25
-; GFX9-NEXT: v_mov_b32_e32 v53, v47
-; GFX9-NEXT: v_mov_b32_e32 v47, v43
-; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: v_mov_b32_e32 v9, s17
+; GFX9-NEXT: v_perm_b32 v10, s18, v10, v25
+; GFX9-NEXT: v_mov_b32_e32 v46, v47
+; GFX9-NEXT: v_mov_b32_e32 v47, v44
+; GFX9-NEXT: v_mov_b32_e32 v44, v8
; GFX9-NEXT: v_perm_b32 v6, s63, v6, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s45
+; GFX9-NEXT: v_perm_b32 v9, s16, v9, v25
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v7, s73
; GFX9-NEXT: v_perm_b32 v8, s58, v8, v25
-; GFX9-NEXT: v_mov_b32_e32 v51, v61
-; GFX9-NEXT: v_mov_b32_e32 v61, v32
-; GFX9-NEXT: v_mov_b32_e32 v32, v9
+; GFX9-NEXT: v_or_b32_sdwa v0, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v7, s75, v7, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v10, 0x6050400
@@ -149541,243 +149603,242 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v8, s76
; GFX9-NEXT: v_perm_b32 v9, s9, v9, v10
-; GFX9-NEXT: v_or_b32_sdwa v1, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v1, v24, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v8, s41, v8, v10
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_mov_b32_e32 v22, s40
+; GFX9-NEXT: v_mov_b32_e32 v24, s40
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v9, s57
-; GFX9-NEXT: v_perm_b32 v22, s13, v22, v10
-; GFX9-NEXT: s_mov_b32 s4, 0x6050400
+; GFX9-NEXT: v_perm_b32 v24, s13, v24, v10
; GFX9-NEXT: v_perm_b32 v9, s60, v9, v25
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
-; GFX9-NEXT: v_or_b32_sdwa v9, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v22, s72
-; GFX9-NEXT: v_mov_b32_e32 v23, s56
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_perm_b32 v13, s74, v13, v25
+; GFX9-NEXT: v_perm_b32 v25, v35, v21, s5
+; GFX9-NEXT: v_or_b32_sdwa v9, v24, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v24, s72
+; GFX9-NEXT: v_mov_b32_e32 v43, s56
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v34, v36, s4
-; GFX9-NEXT: v_perm_b32 v22, s62, v22, v10
-; GFX9-NEXT: v_perm_b32 v10, s44, v23, v10
+; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: v_perm_b32 v24, s62, v24, v10
+; GFX9-NEXT: v_perm_b32 v10, s44, v43, v10
; GFX9-NEXT: v_or_b32_sdwa v11, v11, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v37, v26, s4
+; GFX9-NEXT: v_perm_b32 v15, v15, v22, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, v21
+; GFX9-NEXT: v_or_b32_sdwa v17, v25, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v13, v36, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v13, v49, v39, s4
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v13, v39, v38, s4
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v22, v27, v28, s5
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v22, v62, v55, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_perm_b32 v24, v27, v28, s5
+; GFX9-NEXT: v_or_b32_sdwa v13, v13, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v62, v61, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_perm_b32 v14, v14, v29, s4
-; GFX9-NEXT: v_perm_b32 v15, v15, v56, s4
-; GFX9-NEXT: v_or_b32_sdwa v14, v22, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v14, v24, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v22, v30, v31, s5
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v22, v38, v46, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
-; GFX9-NEXT: v_or_b32_sdwa v16, v22, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v22, v41, v57, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v18, v50, v18, s5
-; GFX9-NEXT: v_or_b32_sdwa v18, v22, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v22, v40, v59, s5
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v23, v35, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v19, v45, v19, s5
-; GFX9-NEXT: v_or_b32_sdwa v19, v22, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v20, v54, v20, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_or_b32_sdwa v17, v23, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v58
-; GFX9-NEXT: v_mov_b32_e32 v54, v42
-; GFX9-NEXT: v_mov_b32_e32 v50, v60
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v30, v31, s5
+; GFX9-NEXT: v_or_b32_sdwa v15, v15, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v37, v57, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v16, v24, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_perm_b32 v24, v41, v45, s5
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_perm_b32 v18, v48, v18, s5
+; GFX9-NEXT: v_or_b32_sdwa v18, v24, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v40, v52, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_perm_b32 v19, v54, v19, s5
+; GFX9-NEXT: v_or_b32_sdwa v19, v24, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v55, v20, s5
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v54, v58
+; GFX9-NEXT: v_mov_b32_e32 v38, v32
+; GFX9-NEXT: v_mov_b32_e32 v55, v42
+; GFX9-NEXT: v_mov_b32_e32 v48, v59
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v22, v60, v40, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_or_b32_sdwa v20, v22, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v22, v58, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_mov_b32_e32 v60, v40
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: v_perm_b32 v21, v44, v21, s5
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_mov_b32_e32 v58, v29
+; GFX9-NEXT: v_perm_b32 v25, v25, v53, s4
+; GFX9-NEXT: v_mov_b32_e32 v53, v51
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v23, v32, v23, s5
-; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v24, v33, v24, s5
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v25, v25, v61, s4
-; GFX9-NEXT: v_mov_b32_e32 v61, v51
-; GFX9-NEXT: v_mov_b32_e32 v33, v48
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_mov_b32_e32 v36, v28
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_mov_b32_e32 v32, v26
+; GFX9-NEXT: v_perm_b32 v24, v59, v41, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v20, v24, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v58, v60, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v21, v24, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v42, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v42, v63
+; GFX9-NEXT: v_mov_b32_e32 v59, v41
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v26, v47, v26, s5
+; GFX9-NEXT: v_mov_b32_e32 v47, v46
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_mov_b32_e32 v44, v27
+; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_mov_b32_e32 v34, v30
-; GFX9-NEXT: v_mov_b32_e32 v39, v31
-; GFX9-NEXT: v_mov_b32_e32 v47, v53
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v55, v35
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v57, v35
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v21, v43, v21, s5
-; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v43, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v44, s4
+; GFX9-NEXT: v_mov_b32_e32 v62, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v42, v22, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v42, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v63
+; GFX9-NEXT: v_perm_b32 v22, v34, v22, s5
+; GFX9-NEXT: v_or_b32_sdwa v22, v24, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v56, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v56, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v52, v23, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v52, v29
+; GFX9-NEXT: v_perm_b32 v23, v49, v23, s5
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v49, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v48, s4
+; GFX9-NEXT: v_perm_b32 v24, v24, v50, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v25, v51, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v53, s4
+; GFX9-NEXT: v_perm_b32 v26, v26, v46, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: v_mov_b32_e32 v46, v28
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v36, v28
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v46, v53
+; GFX9-NEXT: v_mov_b32_e32 v33, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v37, v28
+; GFX9-NEXT: v_mov_b32_e32 v58, v29
; GFX9-NEXT: v_perm_b32 v28, v28, v29, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v62, v29
+; GFX9-NEXT: v_mov_b32_e32 v34, v29
; GFX9-NEXT: v_perm_b32 v29, v29, v30, s4
; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v49, v30
-; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_mov_b32_e32 v39, v30
+; GFX9-NEXT: v_perm_b32 v30, v30, v32, s5
; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v51, v31
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v30
+; GFX9-NEXT: v_perm_b32 v30, v40, v30, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v48, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4
+; GFX9-NEXT: v_perm_b32 v31, v31, v32, s4
; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v61, v32
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v63, v31
-; GFX9-NEXT: v_perm_b32 v31, v38, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v37, v31, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v56, v35
-; GFX9-NEXT: v_perm_b32 v35, v53, v35, s5
+; GFX9-NEXT: v_perm_b32 v35, v35, v32, s5
+; GFX9-NEXT: v_mov_b32_e32 v50, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v31, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_mov_b64 s[4:5], 0
-; GFX9-NEXT: v_mov_b32_e32 v53, v57
-; GFX9-NEXT: v_mov_b32_e32 v35, v38
+; GFX9-NEXT: v_mov_b32_e32 v35, v37
+; GFX9-NEXT: v_mov_b32_e32 v37, v40
; GFX9-NEXT: s_branch .LBB89_3
; GFX9-NEXT: .LBB89_2:
; GFX9-NEXT: v_mov_b32_e32 v39, v51
-; GFX9-NEXT: v_mov_b32_e32 v51, v53
-; GFX9-NEXT: v_mov_b32_e32 v50, v60
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v52
+; GFX9-NEXT: v_mov_b32_e32 v48, v59
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v46, v0
-; GFX9-NEXT: v_mov_b32_e32 v56, v22
-; GFX9-NEXT: v_mov_b32_e32 v34, v6
-; GFX9-NEXT: v_mov_b32_e32 v62, v2
-; GFX9-NEXT: v_mov_b32_e32 v55, v1
-; GFX9-NEXT: v_mov_b32_e32 v49, v23
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v43, v21
+; GFX9-NEXT: v_mov_b32_e32 v57, v0
+; GFX9-NEXT: v_mov_b32_e32 v61, v1
+; GFX9-NEXT: v_mov_b32_e32 v62, v10
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: v_mov_b32_e32 v33, v25
+; GFX9-NEXT: v_mov_b32_e32 v55, v3
; GFX9-NEXT: v_mov_b32_e32 v54, v5
-; GFX9-NEXT: v_mov_b32_e32 v45, v4
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB89_3: ; %Flow
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB89_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v57
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v0, v0, v56, s5
-; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v50, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v0, 3, v63
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s5
-; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
+; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v0, 3, v51
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
+; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
+; GFX9-NEXT: v_perm_b32 v0, v0, v38, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s74, s74, 3
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: s_add_i32 s56, s56, 3
@@ -149799,81 +149860,73 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: s_add_i32 s22, s22, 3
+; GFX9-NEXT: v_mov_b32_e32 v32, s23
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
-; GFX9-NEXT: v_perm_b32 v0, v0, v49, s5
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v34
-; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_add_u32_sdwa v37, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: v_perm_b32 v0, v0, v34, s5
; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
-; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
-; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
+; GFX9-NEXT: v_perm_b32 v0, v0, v33, s5
+; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v56
; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v44
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
+; GFX9-NEXT: v_mov_b32_e32 v33, s17
; GFX9-NEXT: v_mov_b32_e32 v34, s19
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v36, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v0, 3, v42
-; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v44, s5
; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v0
; GFX9-NEXT: v_add_u32_e32 v0, 3, v47
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v37, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_sdwa v26, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v26, v37, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v27, v36, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v28, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v29, v35, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v37, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v53
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_or_b32_sdwa v30, v35, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_sdwa v38, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v25, v38, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, s17
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v39, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v24, v39, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
@@ -149881,131 +149934,129 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v63, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v23, v63, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v49, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v22, v49, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v22, v62, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v21, v62, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
+; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v21, v50, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v50
-; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v48
+; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
; GFX9-NEXT: v_add_u32_sdwa v51, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v20, v51, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v52, s5
; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v19, v52, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v53, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v45, s5
; GFX9-NEXT: v_add_u32_sdwa v53, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v18, v53, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v57, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
; GFX9-NEXT: v_add_u32_sdwa v54, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v17, v54, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: v_perm_b32 v0, v0, v40, s5
; GFX9-NEXT: v_add_u32_sdwa v55, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v16, v55, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v1, 3, v41
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v40, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v15, v40, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v41, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v14, v41, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
@@ -150013,42 +150064,42 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v42, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v13, v42, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v43, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0
-; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0
; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0
; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v33
; GFX9-NEXT: v_or_b32_sdwa v12, v43, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0
; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v2, 3, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v44, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -150108,11 +150159,13 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: v_add_u32_sdwa v61, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v1, s21
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0
-; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1
+; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v2, v61, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v3, v60, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v4, v59, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -150123,6 +150176,8 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: v_or_b32_sdwa v9, v46, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v10, v45, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v11, v44, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: .LBB89_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -151192,7 +151247,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32
; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:8
; SI-NEXT: v_mov_b32_e32 v31, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
@@ -151202,72 +151257,70 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v63
-; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v62
-; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61
+; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v4
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61
-; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v60
+; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v60
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v59
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v11
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v12
+; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v24
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v27
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v15
-; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v15
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v18
+; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v18
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v20
+; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v20
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v22
+; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v22
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v26
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v24
+; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v26
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v23
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
@@ -151299,90 +151352,96 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v33
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v33
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39
; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v39
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v58
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v8
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v47
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v42
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v51
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v50
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v45, 1.0, v51
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
@@ -151429,72 +151488,72 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v33
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: v_mul_f32_e32 v51, 1.0, v59
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_mul_f32_e32 v43, 1.0, v30
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v57
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v29
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v27
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v27
; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v25
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v23
+; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v24
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v21
+; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v21
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v19
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v19
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v17
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v36
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; kill: killed $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; kill: killed $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: v_mul_f32_e32 v41, 1.0, v15
-; SI-NEXT: v_mul_f32_e32 v49, 1.0, v49
-; SI-NEXT: v_mul_f32_e32 v53, 1.0, v17
-; SI-NEXT: v_mul_f32_e32 v47, 1.0, v43
-; SI-NEXT: v_mul_f32_e32 v55, 1.0, v55
-; SI-NEXT: v_mul_f32_e32 v43, 1.0, v19
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v44
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v40
-; SI-NEXT: v_mul_f32_e32 v42, 1.0, v21
-; SI-NEXT: v_mul_f32_e32 v61, 1.0, v54
-; SI-NEXT: v_mul_f32_e32 v19, 1.0, v52
-; SI-NEXT: v_mul_f32_e32 v63, 1.0, v23
-; SI-NEXT: v_mul_f32_e32 v45, 1.0, v50
-; SI-NEXT: v_mul_f32_e32 v56, 1.0, v48
-; SI-NEXT: v_mul_f32_e32 v22, 1.0, v25
-; SI-NEXT: v_mul_f32_e32 v46, 1.0, v37
-; SI-NEXT: v_mul_f32_e32 v58, 1.0, v36
-; SI-NEXT: v_mul_f32_e32 v36, 1.0, v35
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v34
-; SI-NEXT: v_mul_f32_e32 v39, 1.0, v28
-; SI-NEXT: v_mul_f32_e32 v60, 1.0, v32
-; SI-NEXT: v_mul_f32_e32 v13, 1.0, v29
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
-; SI-NEXT: v_mul_f32_e32 v57, 1.0, v57
-; SI-NEXT: v_mul_f32_e32 v62, 1.0, v38
-; SI-NEXT: v_mul_f32_e32 v44, 1.0, v33
+; SI-NEXT: v_mul_f32_e32 v46, 1.0, v55
+; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
+; SI-NEXT: v_mul_f32_e32 v55, 1.0, v17
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v40
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v27
+; SI-NEXT: v_mul_f32_e32 v27, 1.0, v19
+; SI-NEXT: v_mul_f32_e32 v19, 1.0, v54
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v53
+; SI-NEXT: v_mul_f32_e32 v53, 1.0, v21
+; SI-NEXT: v_mul_f32_e32 v42, 1.0, v52
+; SI-NEXT: v_mul_f32_e32 v58, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v33, 1.0, v49
+; SI-NEXT: v_mul_f32_e32 v59, 1.0, v48
+; SI-NEXT: v_mul_f32_e32 v60, 1.0, v25
+; SI-NEXT: v_mul_f32_e32 v47, 1.0, v38
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v37
+; SI-NEXT: v_mul_f32_e32 v22, 1.0, v35
+; SI-NEXT: v_mul_f32_e32 v63, 1.0, v34
+; SI-NEXT: v_mul_f32_e32 v39, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v61, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v49, 1.0, v56
+; SI-NEXT: v_mul_f32_e32 v56, 1.0, v36
+; SI-NEXT: v_mul_f32_e32 v44, 1.0, v62
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; kill: killed $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; kill: killed $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr54
@@ -151508,9 +151567,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr9
@@ -151525,16 +151582,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; kill: killed $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; kill: killed $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_mul_f32_e32 v51, 1.0, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -151626,416 +151682,414 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB90_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_alignbit_b32 v38, v0, v1, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v35, v0, v1, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v32, v0, v1, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v29, v0, v1, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v25, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_alignbit_b32 v40, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v21, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v33
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v57
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_alignbit_b32 v54, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v18, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_alignbit_b32 v52, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: v_alignbit_b32 v15, v0, v41, 16
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v50, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v12, v0, v53, 16
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
+; SI-NEXT: v_alignbit_b32 v12, v0, v55, 16
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_alignbit_b32 v48, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: v_alignbit_b32 v9, v0, v43, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v6
+; SI-NEXT: v_alignbit_b32 v9, v0, v27, 16
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_alignbit_b32 v37, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v8, v0, v42, 16
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v10
+; SI-NEXT: v_alignbit_b32 v8, v0, v53, 16
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v51
+; SI-NEXT: v_alignbit_b32 v11, v10, v43, 16
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v34, v0, v1, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v5, v0, v63, 16
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v19
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; SI-NEXT: v_alignbit_b32 v5, v0, v58, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
-; SI-NEXT: v_alignbit_b32 v4, v1, v22, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v59
+; SI-NEXT: v_alignbit_b32 v4, v1, v60, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13
; SI-NEXT: v_alignbit_b32 v28, v1, v2, 16
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v58
-; SI-NEXT: v_alignbit_b32 v3, v1, v36, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16
+; SI-NEXT: v_alignbit_b32 v3, v1, v22, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v19
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; kill: killed $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; kill: killed $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; kill: killed $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_alignbit_b32 v26, v1, v2, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v39
+; SI-NEXT: v_alignbit_b32 v2, v1, v61, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v42
+; SI-NEXT: v_alignbit_b32 v23, v1, v6, 16
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v33
+; SI-NEXT: v_alignbit_b32 v20, v6, v7, 16
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v49
+; SI-NEXT: v_alignbit_b32 v1, v1, v56, 16
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_alignbit_b32 v17, v6, v7, 16
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v63
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v14, v6, v7, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v44
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v7, v6, v30, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v62
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v57
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v36
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v41
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v27
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v53
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v46
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v13
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v61
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v19
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v45
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v42
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v46
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v33
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v16
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v47
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v63
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v51
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v44
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v40, v38, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v54, v35, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v48, v25, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v48, v25, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v48, v25, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v37, v21, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v37, v21, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v37, v21, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v28, v12, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v28, v12, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v28, v12, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_alignbit_b32 v26, v1, v2, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v60
-; SI-NEXT: v_alignbit_b32 v2, v1, v13, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v61
-; SI-NEXT: v_alignbit_b32 v23, v1, v7, 16
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v45
-; SI-NEXT: v_alignbit_b32 v20, v7, v11, 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v26, v9, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v26, v9, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v26, v9, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v23, v8, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v23, v8, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v23, v8, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v46
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57
-; SI-NEXT: v_alignbit_b32 v1, v1, v62, 16
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v59
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v33
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v27
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v41
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v49
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v53
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v24
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v19
-; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v47
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_alignbit_b32 v17, v7, v11, 16
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 24
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 16
-; SI-NEXT: v_alignbit_b32 v14, v7, v39, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16
-; SI-NEXT: v_alignbit_b32 v11, v7, v30, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v11, v2, 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v51
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v11, v2, 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v7, v7, v44, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v11, v2, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v40
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v54
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v52
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v50
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v48
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v37
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v34
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v0
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v28
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v26
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v23
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v20
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v17
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v14
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v11
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v7
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
@@ -152093,579 +152147,576 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: v_mov_b32_e32 v62, v10
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr10
; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: v_alignbit_b32 v36, v40, v38, 8
+; SI-NEXT: v_alignbit_b32 v57, v54, v35, 16
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; kill: killed $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: .LBB90_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB90_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v57
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v62
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
; SI-NEXT: v_alignbit_b32 v1, v1, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v61
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v16
; SI-NEXT: v_alignbit_b32 v2, v2, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v22
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v59
; SI-NEXT: v_alignbit_b32 v3, v3, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v22
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v60
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v51
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v19
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v45
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v63
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_alignbit_b32 v4, v4, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v10
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_alignbit_b32 v5, v7, v5, 16
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v13
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v42
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v16
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v51
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v7, v7, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v8
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v22
+; SI-NEXT: v_alignbit_b32 v11, v62, v0, 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v53
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_alignbit_b32 v8, v9, v8, 16
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v10
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v11, v9, v0, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v55
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v43
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v9, v12, v9, 16
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16
-; SI-NEXT: v_alignbit_b32 v14, v12, v0, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v46
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v49
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v53
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_alignbit_b32 v9, v6, v9, 16
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v10
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: v_alignbit_b32 v12, v15, v12, 16
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v19
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v29
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v17, v15, v0, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v14, v6, v0, 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v45
-; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v41
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v10
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v22
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_alignbit_b32 v15, v18, v15, 16
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v22
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
-; SI-NEXT: v_alignbit_b32 v25, v28, v25, 16
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v32
-; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_alignbit_b32 v29, v32, v29, 16
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v35
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v35
-; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v38
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v30
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v50
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v52
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v54
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v40
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_add_f32_e32 v51, 0x40c00000, v50
; SI-NEXT: v_add_f32_e32 v53, 0x40c00000, v52
; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v54
-; SI-NEXT: v_add_f32_e32 v41, 0x40c00000, v40
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v51
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v53
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41
-; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v20, v18, v0, 16
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v61
+; SI-NEXT: v_alignbit_b32 v17, v15, v0, 16
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_alignbit_b32 v29, v32, v29, 16
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v41
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_alignbit_b32 v15, v18, v15, 16
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v24
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v41, 0x40c00000, v40
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_alignbit_b32 v20, v18, v0, 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v42
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_alignbit_b32 v18, v21, v18, 16
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v27
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v23, v21, v0, 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v21, v24, v21, 16
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v6
-; SI-NEXT: v_alignbit_b32 v26, v24, v0, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v47
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v24
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v27
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v21, v25, v21, 16
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v19
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v26, v25, v0, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v22
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_alignbit_b32 v25, v28, v25, 16
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v19
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v28, v28, v0, 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v19
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v10
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v27
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v13
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v24
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v28, v28, v0, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v24
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_alignbit_b32 v0, v32, v0, 16
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
; SI-NEXT: v_alignbit_b32 v32, v35, v32, 16
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v33
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v34, v35, v34, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v33
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v35
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v35
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v35
; SI-NEXT: v_alignbit_b32 v35, v38, v35, 16
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v36
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v37, v38, v37, 16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v36
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v33
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: v_mov_b32_e32 v27, v36
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
; SI-NEXT: v_alignbit_b32 v38, v49, v38, 16
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v39
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v39
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v48, v49, v48, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v39
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v50, v50, v49, 16
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v52, v52, v49, 16
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v54, v54, v49, 16
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v57, v54, v35, 16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v40, v40, v49, 16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v41
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 24
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v55
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 16
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v53
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v40, v38, 8
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v51
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 24
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v54, v35, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v48, v25, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v48, v25, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v48, v25, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v37, v21, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v37, v21, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v37, v21, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v28, v12, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v28, v12, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v28, v12, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v26, v9, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v26, v9, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v26, v9, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v23, v8, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v23, v8, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v23, v8, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v11, v2, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v11, v2, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v11, v2, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v40
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v54
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v52
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v50
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v48
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v37
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v34
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v0
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v28
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v26
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v23
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v20
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v41
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v17
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v55
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v14
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v53
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v11
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v51
+; SI-NEXT: v_alignbit_b32 v36, v40, v38, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v7
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: .LBB90_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v38
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v36
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v40
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152675,31 +152726,29 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:4
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v35
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v57
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:8
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v54
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152709,14 +152758,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:12
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v32
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152726,14 +152775,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:16
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v52
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152743,14 +152792,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:20
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v29
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152760,14 +152809,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:24
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v50
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152777,14 +152826,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:28
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v25
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152794,14 +152843,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:32
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v48
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152811,14 +152860,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:36
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v21
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152828,14 +152877,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:40
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v37
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152845,14 +152894,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:44
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v18
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152862,29 +152911,31 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:48
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v34
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v27
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v13, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:52
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v15
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
@@ -152895,27 +152946,29 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v10, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:60
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v12
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10
@@ -152925,29 +152978,31 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v6, v10, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:64
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v59
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v10, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:68
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9
@@ -152957,14 +153012,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v6, v9, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:72
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v26
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9
@@ -152974,14 +153029,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v6, v9, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:76
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8
@@ -152991,14 +153046,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v6, v8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:80
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v23
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8
@@ -153010,12 +153065,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
@@ -153025,14 +153080,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v5
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:88
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v20
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
@@ -153044,12 +153099,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
@@ -153059,14 +153114,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v4
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:96
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v17
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
@@ -153078,12 +153133,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
@@ -153093,17 +153148,17 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:104
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v14
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -153112,12 +153167,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -153127,31 +153182,29 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:112
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v11
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v62
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
@@ -153161,17 +153214,17 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:120
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v7
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -153250,93 +153303,69 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr46
-; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr43
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; kill: killed $vgpr40
; VI-NEXT: ; implicit-def: $vgpr40
@@ -153397,190 +153426,217 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; kill: killed $vgpr33
; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB90_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v19
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v19
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v18
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v18
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v18
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v4
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v2
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v2
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v2
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v1
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v32
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v32
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v32
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v31
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v30
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v30
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v30
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v29
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v29
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v28
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v28
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v28
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v27
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v27
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v26
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v26
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v26
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v25
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v25
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v24
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v24
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v23
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v23
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v22
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v22
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v21
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v21
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v14
; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v21
; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v20
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v17
-; VI-NEXT: v_mov_b32_e32 v40, v42
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; VI-NEXT: v_mov_b32_e32 v40, v54
; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v4
-; VI-NEXT: v_mov_b32_e32 v42, v48
+; VI-NEXT: v_mov_b32_e32 v42, v46
+; VI-NEXT: v_mov_b32_e32 v46, v48
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5
; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5
; VI-NEXT: .LBB90_2: ; %Flow
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB90_4
; VI-NEXT: ; %bb.3: ; %cmp.true
; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v18
@@ -154169,239 +154225,237 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v4
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v2
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v2
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v2
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v1
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v32
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v32
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v31
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v30
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v30
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v30
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v29
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v29
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v28
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v28
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v28
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v27
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v27
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v40, v33
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v26
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[23:24]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v26
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v26
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v25
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[21:22]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v25
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v24
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v24
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[19:20]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v24
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v23
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v23
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v19
-; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[17:18]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v19
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v14
; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v6
; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5
; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v1
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v21
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v21
; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v20
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v17
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
; VI-NEXT: .LBB90_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v40, v57, v40, s4
-; VI-NEXT: v_perm_b32 v6, v6, v33, s4
-; VI-NEXT: v_perm_b32 v8, v8, v34, s4
+; VI-NEXT: v_perm_b32 v40, v46, v40, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v46, v1, v54, s4
+; VI-NEXT: v_perm_b32 v54, v2, v60, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v6, v6, v49, s4
; VI-NEXT: v_perm_b32 v9, v9, v38, s4
-; VI-NEXT: v_perm_b32 v12, v12, v50, s4
+; VI-NEXT: v_perm_b32 v11, v11, v35, s4
+; VI-NEXT: v_perm_b32 v13, v13, v50, s4
; VI-NEXT: v_perm_b32 v14, v14, v52, s4
-; VI-NEXT: v_perm_b32 v49, v49, v41, s4
-; VI-NEXT: v_perm_b32 v3, v3, v46, s4
+; VI-NEXT: v_perm_b32 v17, v17, v33, s4
+; VI-NEXT: v_perm_b32 v41, v44, v41, s4
+; VI-NEXT: v_perm_b32 v3, v3, v57, s4
; VI-NEXT: v_perm_b32 v4, v4, v43, s4
; VI-NEXT: v_perm_b32 v5, v5, v55, s4
; VI-NEXT: v_perm_b32 v7, v7, v63, s4
+; VI-NEXT: v_perm_b32 v8, v8, v45, s4
; VI-NEXT: v_perm_b32 v10, v10, v61, s4
-; VI-NEXT: v_perm_b32 v11, v11, v53, s4
-; VI-NEXT: v_perm_b32 v13, v13, v59, s4
+; VI-NEXT: v_perm_b32 v12, v12, v59, s4
; VI-NEXT: v_perm_b32 v15, v15, v56, s4
-; VI-NEXT: v_perm_b32 v17, v17, v62, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v57, v1, v54, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v54, v2, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v48, v48, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v33, v39, v1, s4
+; VI-NEXT: v_perm_b32 v39, v39, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v34, v44, v1, s4
+; VI-NEXT: v_perm_b32 v49, v62, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v35, v35, v1, s4
+; VI-NEXT: v_perm_b32 v38, v53, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v58, v1, s4
+; VI-NEXT: v_perm_b32 v35, v58, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v39, v47, v1, s4
+; VI-NEXT: v_perm_b32 v50, v47, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v50, v60, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v52, v2, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v18, v18, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v52, v2, v1, s4
+; VI-NEXT: v_perm_b32 v33, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
-; VI-NEXT: v_or_b32_e32 v1, v57, v1
+; VI-NEXT: v_or_b32_e32 v1, v46, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
@@ -154410,7 +154464,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v54, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v41
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
@@ -154430,7 +154484,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
@@ -154440,7 +154494,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
@@ -154450,7 +154504,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
@@ -154460,7 +154514,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
@@ -154470,7 +154524,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
@@ -154480,30 +154534,30 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v33
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v19, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v37, v36, s4
+; VI-NEXT: v_perm_b32 v2, v51, v36, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_perm_b32 v1, v20, v51, s4
+; VI-NEXT: v_perm_b32 v1, v20, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v21, v45, s4
+; VI-NEXT: v_perm_b32 v1, v21, v34, s4
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v42, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -154662,9 +154716,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32
+; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32
; GFX9-NEXT: v_mov_b32_e32 v62, v0
; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr0
@@ -154695,40 +154749,36 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: v_mov_b32_e32 v38, v16
+; GFX9-NEXT: v_mov_b32_e32 v37, v15
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr16
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
; GFX9-NEXT: ; implicit-def: $vgpr31
@@ -154810,6 +154860,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; kill: killed $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
@@ -154818,18 +154876,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
@@ -154837,16 +154887,19 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
@@ -154866,212 +154919,226 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v15
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v38
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v38
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v13
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v12
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v13
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v12
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v10
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v8
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v6
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v42
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(40)
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v41
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v59
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(43)
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v58
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v29
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v28
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v27
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v26
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v25
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v24
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v23
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v22
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[37:38]
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14]
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12]
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v12
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v10
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v10
; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v9
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v8
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v8
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v7
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v6
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v5
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[41:42]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v12
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v11
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v10
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v10
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v8
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v8
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[58:59]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v7
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v4
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v6
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v6
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v2
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v59
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v42
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v42
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v30
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v30
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v30
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v29
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v28
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v28
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v27
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v26
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v26
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v24
; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v24
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v23
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v22
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v22
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v4
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v20
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v17
-; GFX9-NEXT: v_mov_b32_e32 v36, v33
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v1
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v17
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB90_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v18
@@ -155084,30 +155151,30 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v33, v32, v33, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v33, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v17
; GFX9-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v32, v31, v32, vcc
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v9, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v31, v32, vcc
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v20
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v33, v0, v33, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -155115,81 +155182,77 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v20
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v31, v18, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v34, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v19
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v32, v0, v32, s7
+; GFX9-NEXT: v_perm_b32 v15, v0, v9, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v19
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v20, v18, v20, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v34, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v22
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v32, v0, v31, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v22
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v45, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v13, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v31, v0, v20, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v11, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v46, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v14, v11, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v20, v0, v45, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v24
-; GFX9-NEXT: v_perm_b32 v19, v0, v46, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v11, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v24
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v13, v11, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -155197,70 +155260,71 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v23
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v50, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v23
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v20, v50, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v9, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v51, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v26
-; GFX9-NEXT: v_perm_b32 v19, v51, v0, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v26
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v9, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v20, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v25
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v25
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v10, v9, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v19, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_mov_b32_e32 v44, v20
-; GFX9-NEXT: v_mov_b32_e32 v43, v19
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v9, v9, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -155268,169 +155332,185 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v27
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v53, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v46, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v27
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v20, v53, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v10, v46, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v52, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v30
-; GFX9-NEXT: v_perm_b32 v19, v52, v0, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v45, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v28, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v33, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v40, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v27, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v28, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v42
-; GFX9-NEXT: v_perm_b32 v20, v30, v28, s7
-; GFX9-NEXT: v_perm_b32 v19, v29, v27, s7
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v59
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v27, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v42
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v59
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; GFX9-NEXT: v_cndmask_b32_e32 v26, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_waitcnt vmcnt(55)
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v41
+; GFX9-NEXT: s_waitcnt vmcnt(62)
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v58
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v49, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v44, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v41
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v58
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; GFX9-NEXT: v_cndmask_b32_e32 v25, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v48, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v2
-; GFX9-NEXT: v_perm_b32 v20, v49, v26, s7
-; GFX9-NEXT: v_perm_b32 v19, v48, v25, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v43, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
+; GFX9-NEXT: v_perm_b32 v9, v45, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v24, v18, v19, vcc
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; GFX9-NEXT: v_perm_b32 v10, v40, v33, s7
+; GFX9-NEXT: v_perm_b32 v9, v27, v28, s7
; GFX9-NEXT: v_cndmask_b32_e32 v22, v17, v18, vcc
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_perm_b32 v10, v44, v26, s7
+; GFX9-NEXT: v_perm_b32 v9, v43, v25, s7
; GFX9-NEXT: v_cndmask_b32_e32 v23, v17, v18, vcc
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v17, vcc
+; GFX9-NEXT: v_perm_b32 v10, v22, v24, s7
+; GFX9-NEXT: v_perm_b32 v9, v21, v23, s7
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v17, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v47, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_perm_b32 v19, v22, v24, s7
-; GFX9-NEXT: v_perm_b32 v18, v21, v23, s7
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v3
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v17, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v47, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v29, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
@@ -155444,10 +155524,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v5, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v30, v2, v5, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
@@ -155474,20 +155551,20 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v31, v32, vcc
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
-; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
-; GFX9-NEXT: v_bfe_u32 v31, v0, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v33, v32, v33, vcc
-; GFX9-NEXT: v_add3_u32 v31, v31, v0, s6
-; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v0
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX9-NEXT: v_bfe_u32 v31, v10, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v56, v32, v39, vcc
+; GFX9-NEXT: v_add3_u32 v31, v31, v10, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v10
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10
; GFX9-NEXT: v_cndmask_b32_e32 v10, v31, v32, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v9
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
@@ -155495,27 +155572,28 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v9, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v34, v32, v34, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v57, v32, v39, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v9, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v9
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
; GFX9-NEXT: v_cndmask_b32_e32 v9, v31, v32, vcc
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v12
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
+; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
-; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v54, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
-; GFX9-NEXT: v_bfe_u32 v31, v0, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v58, v32, v54, vcc
-; GFX9-NEXT: v_add3_u32 v31, v31, v0, s6
-; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v0
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX9-NEXT: v_bfe_u32 v31, v12, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v58, v32, v39, vcc
+; GFX9-NEXT: v_add3_u32 v31, v31, v12, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v12
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12
; GFX9-NEXT: v_cndmask_b32_e32 v12, v31, v32, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v11
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
@@ -155523,27 +155601,28 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v54, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v11, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v59, v32, v54, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v59, v32, v39, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v11, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v14
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
+; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
-; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v56, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
-; GFX9-NEXT: v_bfe_u32 v31, v0, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v56, vcc
-; GFX9-NEXT: v_add3_u32 v31, v31, v0, s6
-; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v0
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX9-NEXT: v_bfe_u32 v31, v14, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v41, vcc
+; GFX9-NEXT: v_add3_u32 v31, v31, v14, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v14
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
; GFX9-NEXT: v_cndmask_b32_e32 v14, v31, v32, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v13
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
@@ -155551,92 +155630,25 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v56, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v56, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v41, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v13
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_cndmask_b32_e32 v61, v31, v32, vcc
-; GFX9-NEXT: v_perm_b32 v57, v14, v1, s7
-; GFX9-NEXT: v_perm_b32 v56, v61, v0, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v59
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v41, v17, v19, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v28
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v27
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v53
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v52
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v38, v8, v3, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v26
-; GFX9-NEXT: v_perm_b32 v37, v7, v2, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v25
-; GFX9-NEXT: v_perm_b32 v35, v9, v34, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v18
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v23
-; GFX9-NEXT: v_perm_b32 v42, v18, v20, s7
-; GFX9-NEXT: v_perm_b32 v39, v5, v4, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v20
-; GFX9-NEXT: v_perm_b32 v40, v6, v47, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
-; GFX9-NEXT: v_perm_b32 v36, v10, v33, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v46
-; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v16
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v38
; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_cndmask_b32_e32 v61, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1
; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v13
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v16
+; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v38
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; GFX9-NEXT: v_bfe_u32 v16, v13, 16, 1
; GFX9-NEXT: v_cndmask_b32_e32 v60, v31, v32, vcc
@@ -155644,595 +155656,667 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v13
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
; GFX9-NEXT: v_cndmask_b32_e32 v13, v16, v31, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v15
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v37
; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v37
; GFX9-NEXT: v_bfe_u32 v31, v16, 16, 1
; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; GFX9-NEXT: v_add3_u32 v31, v31, v16, s6
; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v16
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; GFX9-NEXT: v_bfe_u32 v16, v15, 16, 1
-; GFX9-NEXT: v_perm_b32 v55, v12, v58, s7
; GFX9-NEXT: v_cndmask_b32_e32 v63, v31, v63, vcc
; GFX9-NEXT: v_add3_u32 v16, v16, v15, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v15
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v54, v11, v59, s7
; GFX9-NEXT: v_perm_b32 v32, v13, v60, s7
; GFX9-NEXT: v_cndmask_b32_e32 v15, v16, v31, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v60
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v34
-; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v31, v15, v63, s7
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v15
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v61
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[41:42]
+; GFX9-NEXT: v_perm_b32 v42, v14, v1, s7
+; GFX9-NEXT: v_perm_b32 v41, v61, v0, s7
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v58
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v56
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v36, v29, v17, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v28
+; GFX9-NEXT: v_perm_b32 v55, v10, v56, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v10
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v44
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v43
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v40
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v27
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v46
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v45
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v25
+; GFX9-NEXT: v_perm_b32 v52, v7, v2, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v24
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v19
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v22
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v23
+; GFX9-NEXT: v_perm_b32 v31, v15, v63, s7
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v63
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v32
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[45:46]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v51, v19, v47, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v60
+; GFX9-NEXT: v_perm_b32 v50, v18, v20, s7
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v6, v12, v58, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_perm_b32 v5, v11, v59, s7
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v11, v50
+; GFX9-NEXT: v_mov_b32_e32 v12, v51
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[56:57]
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v53, v8, v3, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_perm_b32 v35, v30, v4, s7
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v34
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v54, v9, v57, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v47
+; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[31:32]
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v6
+; GFX9-NEXT: s_waitcnt vmcnt(34)
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v50
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v51
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[54:55]
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[41:42]
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[35:36]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[37:38]
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[54:55]
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[39:40]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[59:60]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[33:34]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[50:51]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[43:44]
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[43:44]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[48:49]
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[52:53]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[35:36]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[11:12]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[39:40]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[50:51]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[37:38]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[58:59]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[33:34]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[43:44]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[56:57]
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v40
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v40
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v39
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v51
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v51
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v50
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v12
+; GFX9-NEXT: v_mov_b32_e32 v51, v47
+; GFX9-NEXT: s_waitcnt vmcnt(34)
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v55
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v54
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v42
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v42
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v41
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v6
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v5
+; GFX9-NEXT: v_mov_b32_e32 v42, v38
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v42
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v55
+; GFX9-NEXT: v_mov_b32_e32 v41, v37
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v42
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v54
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; GFX9-NEXT: v_mov_b32_e32 v42, v59
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v53
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v42
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v53
+; GFX9-NEXT: v_mov_b32_e32 v41, v58
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v42
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v52
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v40
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v39
-; GFX9-NEXT: v_mov_b32_e32 v32, v42
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v60
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v60
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v5, v9
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v36
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v36
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v6, v10
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v13
+; GFX9-NEXT: v_mov_b32_e32 v59, v49
+; GFX9-NEXT: v_mov_b32_e32 v58, v48
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v42
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v42
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v55
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v34
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v31, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v31
+; GFX9-NEXT: v_mov_b32_e32 v31, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v31
+; GFX9-NEXT: v_mov_b32_e32 v31, v56
+; GFX9-NEXT: v_mov_b32_e32 v32, v57
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v33
-; GFX9-NEXT: v_mov_b32_e32 v32, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v31, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(27)
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[52:53]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v42, v8
-; GFX9-NEXT: v_mov_b32_e32 v41, v7
-; GFX9-NEXT: v_mov_b32_e32 v7, v9
-; GFX9-NEXT: v_mov_b32_e32 v8, v10
-; GFX9-NEXT: v_mov_b32_e32 v9, v11
-; GFX9-NEXT: v_mov_b32_e32 v10, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v61
-; GFX9-NEXT: v_mov_b32_e32 v56, v47
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v40
-; GFX9-NEXT: v_mov_b32_e32 v50, v39
-; GFX9-NEXT: v_mov_b32_e32 v39, v35
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v44
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v44
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v43
-; GFX9-NEXT: v_mov_b32_e32 v31, v48
-; GFX9-NEXT: v_mov_b32_e32 v32, v49
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v31
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[52:53]
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_mov_b32_e32 v56, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
-; GFX9-NEXT: v_mov_b32_e32 v31, v52
-; GFX9-NEXT: v_mov_b32_e32 v32, v53
-; GFX9-NEXT: v_mov_b32_e32 v53, v33
-; GFX9-NEXT: v_mov_b32_e32 v52, v63
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v31
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v35, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v31
; GFX9-NEXT: .LBB90_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v32, v1, v55, s4
-; GFX9-NEXT: v_perm_b32 v34, v2, v50, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v31, v54, v35, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v36, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v37, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v39, s4
-; GFX9-NEXT: v_perm_b32 v33, v45, v33, s4
-; GFX9-NEXT: v_perm_b32 v17, v17, v63, s4
-; GFX9-NEXT: v_perm_b32 v18, v18, v58, s4
-; GFX9-NEXT: v_perm_b32 v0, v19, v0, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v35, v46, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v36, v2, v1, s4
+; GFX9-NEXT: v_perm_b32 v32, v1, v53, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v3, v35, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v15, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v55, s4
+; GFX9-NEXT: v_perm_b32 v17, v17, v45, s4
+; GFX9-NEXT: v_perm_b32 v18, v18, v57, s4
+; GFX9-NEXT: v_perm_b32 v0, v21, v0, s4
+; GFX9-NEXT: v_perm_b32 v31, v36, v31, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v6, v6, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v37, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v33, v40, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v7, v7, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v48, v50, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v8, v8, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v38, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v35, v16, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v9, v9, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v54, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v10, v10, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v39, v39, v52, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v11, v11, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v12, v12, v61, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v12, v12, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v52, v1, v52, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v1, v54, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v13, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v14, v14, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v51, v1, v54, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v56, v54, s4
-; GFX9-NEXT: v_perm_b32 v15, v15, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshl_or_b32 v0, v50, 16, v0
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v53, v1, v53, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v36, v51, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v15, v37, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v1, s4
+; GFX9-NEXT: v_perm_b32 v16, v38, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v31, 16, v32
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v38, v63, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v34
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v34, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v13
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v46, v42, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v57, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v47, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v20, v61, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v47, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v21, v49, s4
+; GFX9-NEXT: v_perm_b32 v1, v19, v44, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v1
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:72
+; GFX9-NEXT: v_perm_b32 v1, v20, v43, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v22, v48, s4
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v0, v22, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_perm_b32 v0, v23, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v24, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_perm_b32 v0, v25, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v26, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v27, v53, s4
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v28, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v30, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_perm_b32 v0, v41, v0, s4
+; GFX9-NEXT: v_perm_b32 v0, v58, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v0, v42, v0, s4
+; GFX9-NEXT: v_perm_b32 v0, v59, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
@@ -156334,8 +156418,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v103, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v102, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v133, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v132, off, s32
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr107_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
@@ -156351,36 +156435,36 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr92_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr91_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr90_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr89_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr88_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr79_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
@@ -156394,14 +156478,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
@@ -156429,7 +156513,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
@@ -156468,19 +156552,19 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[146:147], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[147:148], 24, v[3:4]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[102:103]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[132:133]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[116:117], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[128:129], 24, v[9:10]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[7:8]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[148:149], 24, v[1:2]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[23:24]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[19:20]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v15
@@ -156504,9 +156588,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v103
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v103
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v102
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v133
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v133
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v132
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v25
@@ -156521,15 +156605,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.l, v37.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v135.l, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v35.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v101.l, v34.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.l, v33.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v32.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.l, v39.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v38.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v31.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v31.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[115:116], 24, v[17:18]
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v107.h, v1.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v1.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v106.h, v2.l
@@ -156542,22 +156626,22 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v5.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v7.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.h, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.h, v8.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v99.h, v8.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v100.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.h, v9.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.h, v9.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.h, v10.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.h, v10.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v11.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.h, v11.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v12.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.h, v12.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.h, v13.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v13.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.h, v14.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.h, v14.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v15.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.h, v15.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, v16.l
@@ -156590,10 +156674,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v29.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v30.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v30.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v102.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v103.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v103.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v132.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.h, v132.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v133.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.h, v133.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
@@ -156609,7 +156693,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133
; GFX11-TRUE16-NEXT: .LBB90_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_4
@@ -156822,13 +156906,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v103
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v133
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v103
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v133
; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v53, v17, v24, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
@@ -156838,14 +156922,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v102
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v132
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v34.l, v150.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v167.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v177, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v102
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v132
; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_cndmask_b32 v52, v19, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -157020,7 +157104,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v113, v6, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v103, v6, v20, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v17, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v9, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
@@ -157031,12 +157115,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v11
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v178.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v112, v6, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v102, v6, v18, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v19, v9, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v12, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v4.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.l, v4.h
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[48:49]
; GFX11-TRUE16-NEXT: v_add3_u32 v9, v18, v12, 0x7fff
; GFX11-TRUE16-NEXT: v_add3_u32 v18, v19, v10, 0x7fff
@@ -157045,7 +157129,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v19, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.l, v6.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.l, v6.h
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[54:55]
; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v19, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v17, vcc_lo
@@ -157054,22 +157138,23 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v14
; GFX11-TRUE16-NEXT: v_add3_u32 v11, v12, v19, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v129, v18, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v118, v18, v20, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v9.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.l, v9.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v106.h
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v128, v11, v12 :: v_dual_add_f32 v11, 0x40c00000, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v117, v11, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v11, 0x40c00000, v17 :: v_dual_add_f32 v12, 0x40c00000, v14
; GFX11-TRUE16-NEXT: v_add3_u32 v14, v18, v10, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v11, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v12, 16, 1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[112:113]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[128:129], 24, v[102:103]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[52:53]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v14, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v18
@@ -157079,8 +157164,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v20, v12, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v12
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v10.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v133, v17, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v10.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v131, v17, v18, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v13
; GFX11-TRUE16-NEXT: v_add3_u32 v13, v21, v14, 0x7fff
@@ -157091,9 +157176,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[146:147], 24, v[84:85]
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v11.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v11.h
; GFX11-TRUE16-NEXT: v_add3_u32 v16, v19, v12, 0x7fff
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v132, v13, v17 :: v_dual_add_f32 v13, 0x40c00000, v18
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v130, v13, v17 :: v_dual_add_f32 v13, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v15
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v12
; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
@@ -157121,22 +157206,22 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v99.l, v8.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.l, v12.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[116:117], 24, v[128:129]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v12.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[117:118]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[147:148], 24, v[82:83]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[98:99]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v145, v18, v20, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v14.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[132:133]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[130:131]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[148:149], 24, v[67:68]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[50:51]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v144, v16, v21, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v17.h
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[37:38]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[33:34]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.h, v8.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[33:34]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[115:116], 24, v[31:32]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.h, v8.h
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[144:145]
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v5.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.h, v2.h
@@ -157145,7 +157230,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v11.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v100.h, v6.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v7.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v7.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.h, v4.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v17.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v12.h
@@ -157154,21 +157239,21 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v145
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v145
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v144
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v133
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v133
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v132
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 24, v129
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v129
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v128
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v113
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v113
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 8, v112
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v131
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v131
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v130
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 24, v118
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v118
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v117
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v103
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v103
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 8, v102
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 24, v99
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v99
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 8, v98
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 24, v85
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v85
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 8, v84
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v84
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v82
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 24, v68
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 8, v68
@@ -157178,7 +157263,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v53
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v52
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 8, v51
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 8, v50
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v49
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v48
@@ -157205,7 +157290,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v82.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v147.h
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v92, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v146, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v147, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v93, 0xc0c0004
@@ -157217,10 +157302,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v8, 16, v7
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v9, v91, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v10, v90, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v130.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v128.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v98.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v116.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v112.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v114.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v102.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v7, 16, v6
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v8, v89, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v9, v134, 0xc0c0004
@@ -157229,16 +157314,16 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v100.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v96.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v8, 16, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v128.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v117.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v10, 16, v9
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v11, v78, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v128, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v77, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v113.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v103.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v86.h
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v80.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v129.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v118.h
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v75, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v74, 0xc0c0004
; GFX11-TRUE16-NEXT: s_clause 0x1
@@ -157248,9 +157333,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v70.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v12, 16, v11
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v14, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v132.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v130.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v69.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v133.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v131.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v65.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v10.l, v144.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v64.h
@@ -157268,7 +157353,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v44, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v43, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v76, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v115, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v16, 16, v15
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
@@ -157288,7 +157373,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v97, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v112, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v58, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v56, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v47, 0xc0c0004
@@ -157335,7 +157420,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v54.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v178.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v55.h
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v129, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v101, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v87, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v65, 0xc0c0004
@@ -157401,150 +157486,152 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-LABEL: bitcast_v64bf16_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x17 ; 96-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:104
+; GFX11-FAKE16-NEXT: s_clause 0x18 ; 100-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:108
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:104
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:100
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:100
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:96
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:92
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:92
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:88
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:88
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:84
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:84
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v79, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v79, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v88, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr112
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr102
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr101
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr98
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr99
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr100
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
@@ -157562,98 +157649,98 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[31:32]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v51
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 24, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 24, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v30
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 24, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v25
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v23
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v22
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v21
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v20
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[23:24]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[19:20]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[25:26]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
; GFX11-FAKE16-NEXT: .LBB90_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB90_4
@@ -157665,12 +157752,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v33, v33
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v17
; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_add_f32_e32 v35, 0x40c00000, v17
; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v33, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v35, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v17, v17, v33, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v17, v17, v36, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v36, v48, v35, 0x7fff
; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v34
; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v34, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v34
@@ -157687,578 +157777,574 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v18, v37, v39 :: v_dual_lshlrev_b32 v37, 16, v20
; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-FAKE16-NEXT: v_perm_b32 v54, v18, v17, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v79, 16, v18
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v88, 16, v18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v37
; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v35, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v35
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v48, v35, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v34, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v34
; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v54
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v54
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v40, v36, v39, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v37
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v75, v36, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v20, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v53, v40, v33, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v34, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v36
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v34
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v34, 0x7fff
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v20, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v34, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v36, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v53
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v40
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v36 :: v_dual_add_f32 v39, 0x40c00000, v19
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v18, v17, 0x7060302
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v35, v38, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v36, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v39, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v49, v36, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v39
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v75, v33, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v37, v48, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v49, v36, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
; GFX11-FAKE16-NEXT: v_add3_u32 v38, v34, v39, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 16, v20
; GFX11-FAKE16-NEXT: v_perm_b32 v71, v20, v19, 0x7060302
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v35, v37, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v48
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v71
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v68
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v71
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v38, v49, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v21
; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v79, 16, v35
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v38, 0x40c00000, v38 :: v_dual_add_f32 v49, 0x40c00000, v21
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v69
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v38, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v75
; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v36, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v36
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v38, 0x40c00000, v38 :: v_dual_add_f32 v49, 0x40c00000, v21
; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v36, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 16, v35
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v38, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v49, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v37, v48, vcc_lo
; GFX11-FAKE16-NEXT: v_add3_u32 v37, v51, v38, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v48, v36, v49, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v49
; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v22, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v22
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v22, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v39, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v24
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
-; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v22
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 16, v22
; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v50
+; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v37, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v38, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v38
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v24
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v48, v51, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v23
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v24, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v38, 0x7fff
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v48, 0x40c00000, v48 :: v_dual_add_f32 v51, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v37
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v39, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v48, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v48, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v51, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 16, v37
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v81
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v55, v48, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v81
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v49, v52, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v48
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v26
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v38, v51, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v51
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v53, v48, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v48
; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v52
+; GFX11-FAKE16-NEXT: v_add3_u32 v50, v38, v51, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v51
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v39, v49, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
-; GFX11-FAKE16-NEXT: v_perm_b32 v83, v24, v23, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v48, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v48
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v50, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v25
; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v26
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v50, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v25
; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v48, 0x7fff
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v26, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v55, 0x40c00000, v25
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v26
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v50, 0x40c00000, v50 :: v_dual_add_f32 v53, 0x40c00000, v25
+; GFX11-FAKE16-NEXT: v_perm_b32 v83, v24, v23, 0x7060302
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v49, v52, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v50, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v55, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v65, v50, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v51, v64, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v50, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v53, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v82, v39, v38, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v51, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v28
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v50, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v50
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v28
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v48, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v55
; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v64
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v49, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
-; GFX11-FAKE16-NEXT: v_perm_b32 v85, v26, v25, 0x7060302
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v54
+; GFX11-FAKE16-NEXT: v_add3_u32 v52, v48, v53, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v53
; GFX11-FAKE16-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v49, v51, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v50, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v50
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v52, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v50
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v28, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v28
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v52, v55, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v28, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v50, 0x7fff
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v52
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v28, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v65, 0x40c00000, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v51, v64, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v67, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v28, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v52, 0x40c00000, v52 :: v_dual_add_f32 v55, 0x40c00000, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v85, v26, v25, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v51, v54, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v65, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v26
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v55, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v67, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v55, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v30
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_add3_u32 v64, v50, v65, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v67, 0x400000, v65
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v53, v64, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v30
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v65, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v66
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v51, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
-; GFX11-FAKE16-NEXT: v_perm_b32 v87, v28, v27, 0x7060302
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v54, v50, v55, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v55
; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v64, v67, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v29
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v51, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v54, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v52, 0x7fff
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v64, 0x40c00000, v64
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v30, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v67, 0x40c00000, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v55, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v30, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v54, 0x40c00000, v54 :: v_dual_add_f32 v65, 0x40c00000, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v87, v28, v27, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v53, v64, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v67, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v49
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v51
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v69, v64, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v65, v68, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v64
+; GFX11-FAKE16-NEXT: v_bfe_u32 v67, v54, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v65, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v28
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v55, v66, vcc_lo
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v32
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
-; GFX11-FAKE16-NEXT: v_add3_u32 v66, v52, v67, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v67
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v32
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v67, v54, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v54
; GFX11-FAKE16-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
-; GFX11-FAKE16-NEXT: v_perm_b32 v97, v30, v29, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v52, v55, v65 :: v_dual_add_f32 v55, 0x40c00000, v68
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v67, v67
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v66
+; GFX11-FAKE16-NEXT: v_add3_u32 v64, v52, v65, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v67, 0x400000, v65
; GFX11-FAKE16-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v55, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v66, v69, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v53, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v54, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v54
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v32, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, 0x400000, v32
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v53, v64, v67, vcc_lo
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v31
-; GFX11-FAKE16-NEXT: v_bfe_u32 v67, v32, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v31
; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v55
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v66, 0x40c00000, v66
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
-; GFX11-FAKE16-NEXT: v_add3_u32 v67, v67, v32, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v69, 0x40c00000, v31
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, 0x400000, v32
-; GFX11-FAKE16-NEXT: v_bfe_u32 v99, v66, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v65, v68, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v54, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v32, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v64, 0x40c00000, v64 :: v_dual_add_f32 v67, 0x40c00000, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v97, v30, v29, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v55, v66, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v69, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v2
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v99, v66, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v99, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v67, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v51
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v65, v98, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v98, 16, v2
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v99, v64, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v64
; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v67, v98, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v67, 0x400000, v66
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v66, v66
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v69, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, 0x400000, v69
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v64, 0x40c00000, v98
+; GFX11-FAKE16-NEXT: v_add3_u32 v66, v54, v67, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, 0x400000, v67
; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v99, v32, v31, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v65, v67, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v67, 0x40c00000, v68
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v54, v55, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v67, v67
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, 0x400000, v64
+; GFX11-FAKE16-NEXT: v_bfe_u32 v67, v2, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v102, 0x400000, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, 0x400000, v67
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v66, v55, v98, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v67, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v68, 0x40c00000, v68
-; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v2, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v55, v66, v99, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v67, v67
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v67, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v68, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v80, v37, v36, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v101, 0x40c00000, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v98, v66, v65, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v55, v100, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v64, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v67, v67, v2, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v66, 0x40c00000, v66 :: v_dual_add_f32 v101, 0x40c00000, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v99, v32, v31, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v65, v100, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-FAKE16-NEXT: v_add3_u32 v67, v103, v68, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v101, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v100, 16, v4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v66, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v101, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v67, v102, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v4
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v103, v66, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v67, 0x400000, v66
; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v69, v102, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v68
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v101, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v102, 0x400000, v101
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v66, v66
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v66, 0x40c00000, v102
+; GFX11-FAKE16-NEXT: v_add3_u32 v100, v64, v101, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v101
; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v36
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v67, v67, v69, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v69, 0x40c00000, v100
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v65, v67, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v101, v101
-; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v4, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v69
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v68, v55, v102, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v69, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v67, v66, 16, 1
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v3
; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v66
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v100, v103, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v67, v67, v66, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v102, 0x40c00000, v102
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v66, v66
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v113, 0x40c00000, v3
; GFX11-FAKE16-NEXT: v_add3_u32 v103, v103, v4, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v69, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v102, 0x40c00000, v102 :: v_dual_add_f32 v113, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v68, v67, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v82, v39, v38, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v55, v112, vcc_lo
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v4
; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v102, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v67, v112, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v113, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v112, 16, v6
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v69, v115, v102, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v66, v113, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v67, v115, v102, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v113
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v103, v114, vcc_lo
; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v102
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v6
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v102, v102
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v113, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v113
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v112, 0x40c00000, v112
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v69, v69, v103
+; GFX11-FAKE16-NEXT: v_add3_u32 v112, v66, v113, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v100, v65, v64, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v2
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v66, v67, v103 :: v_dual_add_f32 v67, 0x40c00000, v114
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v113, v113
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v113, 16, v5
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_lshlrev_b32 v113, 16, v5
; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v112
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v133, v55, v114, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v112, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v134, v112, v115, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v67, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v6, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v113, 0x40c00000, v113
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v112, v112
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v112, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v67
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v67, v67
+; GFX11-FAKE16-NEXT: v_add3_u32 v112, v112, v67, 0x7fff
; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v6, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v6
; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v113, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v3, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v133, v69, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v135, v55, v115, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v67, v112, v115, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v112, v117, v113, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v115, 16, v8
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v113
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v114, v116, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v113
+; GFX11-FAKE16-NEXT: v_add3_u32 v114, v117, v113, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v8
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v113, v113
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v5, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v5
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v84, v49, v48, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v145, v112, v114 :: v_dual_add_f32 v114, 0x40c00000, v115
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; GFX11-FAKE16-NEXT: v_add3_u32 v112, v112, v5, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v6, v67, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v144, v114, v115, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v114, 0x40c00000, v116
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v115, 16, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v7
; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v114
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v55, v116, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v114, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v115, 0x40c00000, v115
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v114, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v112, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v114
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v114, 0x7fff
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v8, 0x7fff
; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v114, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v115, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v113, v6, v135, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v145, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v132, v55, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v133, v115, v118, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v114, v119, v115, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v128, v116, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v116, v118, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v115
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v115, v115
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v7, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v86, v51, v50, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v134, v114, v116, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v117
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v117, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v118
+; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v10, 0x40c00000, v10 :: v_dual_cndmask_b32 v135, v115, v117
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v9
; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v116
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v55, v118, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v116, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v117
-; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v114, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v118
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v116, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v117, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v96, v64, v52, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v48
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v2
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v129, v117, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v130, v55, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v10, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v118, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v131, v117, v128, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v119, 16, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v118, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v115, v8, v132, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v118, v128, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v117
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v119, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v118
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v9
; GFX11-FAKE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v131, v116, v118 :: v_dual_add_f32 v116, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v8, v133, 0x7060302
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v132, v117, v119 :: v_dual_add_f32 v117, 0x40c00000, v128
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v67
-; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v116, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v55, v128, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v55, 16, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v114, v7, v135, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v80, v37, v36, 0x7060302
+; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v117, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v116, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v117
; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v116, 0x7fff
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v55, 0x40c00000, v55
-; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v12, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v12, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v12
; GFX11-FAKE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v144, v117, v119, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v55, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v145, v118, v128, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v116, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v55
-; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v114, v7, v134, 0x7060302
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v129, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v118, v128, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v14
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v11, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v41, v10, v131, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v119, v129 :: v_dual_lshlrev_b32 v119, 16, v14
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v41, v9, v131, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[114:115]
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v55, 0x40c00000, v118
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v129, v116, v117, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v119, v11, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v40, v9, v132, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v183, v12, v145, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v130, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v128, v11, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v119, 16, v13
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v55, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v42, v10, v130, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v11, v116, v117 :: v_dual_add_f32 v116, 0x40c00000, v118
-; GFX11-FAKE16-NEXT: v_add3_u32 v117, v119, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v55
-; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
-; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v86, v51, v50, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v128, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v117, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v116
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v119, v14, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v118, v117, v118, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add3_u32 v119, v128, v116, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v128, v14, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v119, v118, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add3_u32 v128, v129, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v129, 16, v16
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v13, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX11-FAKE16-NEXT: v_perm_b32 v181, v11, v129, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[100:101]
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v55, v117 :: v_dual_add_f32 v55, 0x40c00000, v128
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v147, v13, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v182, v11, v130, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v144, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v116, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v129
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v147, v13, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v13
; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v55, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v119, v119, v146, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v44, v14, v118, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v70
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v116, v117, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v117, v128, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v55
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
+; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v128, v128, v146, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v146, 16, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v43, v13, v119, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v182, v12, v144, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v117, v117, v128, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v146
+; GFX11-FAKE16-NEXT: v_perm_b32 v43, v14, v119, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v102, v134, v66, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v49, v48, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v146
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v129, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v116
; GFX11-FAKE16-NEXT: v_bfe_u32 v146, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 24, v44
-; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v116, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v128, v146, v16, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v117, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v148, 0x400000, v117
+; GFX11-FAKE16-NEXT: v_perm_b32 v42, v13, v128, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v118, v118, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v129, v146, v16, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v148, 0x400000, v116
-; GFX11-FAKE16-NEXT: v_add3_u32 v147, v147, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v147, v147, v117, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v149, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v128, v146, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
-; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v15, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v64
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v44
-; GFX11-FAKE16-NEXT: v_perm_b32 v46, v16, v117, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v128, v147, v148, vcc_lo
+; GFX11-FAKE16-NEXT: v_perm_b32 v98, v55, v54, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v129, v146, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v15, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v96, v53, v52, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v177, v16, v118, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v129, v147, v148, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v116, v149, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[114:115]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[100:101]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v133
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v69
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v55, v149, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v176, v15, v129, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v66
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v50
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[112:113]
-; GFX11-FAKE16-NEXT: v_perm_b32 v45, v15, v128, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[86:87]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v117
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[45:46]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[43:44]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[181:182]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[41:42]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v118
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v119
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v144
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v145
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[80:81]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[176:177]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[42:43]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[182:183]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[40:41]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v129
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v130
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v131
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v132
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v133
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v135
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v134
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v53
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[102:103]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[98:99]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[86:87]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[70:71]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v118
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v119
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v128
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v145
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v144
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v30
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[102:103]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[98:99]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[84:85]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[80:81]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v128
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v129
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v130
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v131
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v132
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v39
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[96:97]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[82:83]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[70:71]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[53:54]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 24, v46
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v46
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[84:85]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[82:83]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[68:69]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v176
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v43
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v43
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v182
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v181
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v42
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v42
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v41
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v42
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v183
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v183
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v40
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v115
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v115
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v114
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v113
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v113
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v113
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v112
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v103
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v103
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v103
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v102
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v101
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v101
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v100
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v102
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v100
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v99
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v99
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v98
@@ -158268,50 +158354,52 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 24, v87
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v87
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 24, v85
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v82
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v80
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v42, v79 :: v_dual_mov_b32 v41, v78
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, v77 :: v_dual_mov_b32 v54, v76
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v70
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, v88 :: v_dual_mov_b32 v40, v79
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, v78 :: v_dual_mov_b32 v70, v77
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v69, v76
; GFX11-FAKE16-NEXT: .LBB90_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_perm_b32 v53, v160, v67, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v61, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v66, v150, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v148, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v53, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v161, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v151, v58, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v53, v149, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v52, 16, v1
; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v103, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v53, v147, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v148, v56, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v114, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v132, v48, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v66, 16, v2
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v64, 16, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v133, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v53, 16, v3
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v112, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v49, v144, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v49, v145, v49, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v113, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v134, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v53, v135, v45, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v66, v131, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v53, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v132, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v48, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v43, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v130, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v131, v36, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v39, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v129, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v181, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v128, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v180, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v119, v178, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v130, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v128, v179, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v49, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v66, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v53, 16, v6
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v55, 16, v8
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -158319,62 +158407,62 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v39, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v48, 16, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v176, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v118, v34, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v167, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v117, v165, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v163, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v116, v33, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v162, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v55, v151, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v40, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v119, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v118, v166, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v164, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v117, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v163, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v116, v160, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v74, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v75, v67, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v74, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v42, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v41, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v71, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v41, v72, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v40, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v71, v61, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v80, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v54, v68, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v70, v65, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v81, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v183, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v69, v47, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v82, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v179, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v180, v54, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v177, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v178, v46, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v84, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v166, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v167, v51, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v85, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v164, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v165, v43, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v23, v27, v86, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v161, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v162, v50, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v18, 16, v17
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v20, 16, v19
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v22, 16, v21
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v28, v87, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v149, v102, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v150, v102, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23
; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v96, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v146, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v147, v38, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v97, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v25, v145, v101, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v146, v101, 0xc0c0004
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v98, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v135, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v144, v37, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v99, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v133, v100, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v134, v100, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v23, 16, v22
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v25, 16, v24
@@ -158387,31 +158475,32 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x17 ; 96-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v79, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v78, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:88
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:92
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:96
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:100
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:104
+; GFX11-FAKE16-NEXT: s_clause 0x18 ; 100-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v88, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v79, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v78, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:84
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:88
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:92
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:96
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:100
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:104
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:108
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -158436,9 +158525,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
@@ -158489,17 +158578,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v63, s99, 33
; SI-NEXT: v_writelane_b32 v63, s30, 34
; SI-NEXT: v_writelane_b32 v63, s31, 35
+; SI-NEXT: v_readfirstlane_b32 s92, v5
; SI-NEXT: v_readfirstlane_b32 s90, v6
-; SI-NEXT: v_readfirstlane_b32 s78, v8
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s92, 16
; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s74, v10
-; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s30, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s91
-; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s92
+; SI-NEXT: v_readfirstlane_b32 s78, v8
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s91
; SI-NEXT: v_readfirstlane_b32 s42, v18
; SI-NEXT: v_readfirstlane_b32 s44, v17
; SI-NEXT: v_readfirstlane_b32 s46, v16
@@ -158508,16 +158597,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readfirstlane_b32 s60, v13
; SI-NEXT: v_readfirstlane_b32 s62, v12
; SI-NEXT: v_readfirstlane_b32 s72, v11
-; SI-NEXT: s_lshl_b32 s74, s74, 16
+; SI-NEXT: v_readfirstlane_b32 s74, v10
; SI-NEXT: v_readfirstlane_b32 s76, v9
+; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
; SI-NEXT: v_readfirstlane_b32 s88, v7
-; SI-NEXT: v_readfirstlane_b32 s92, v5
; SI-NEXT: v_readfirstlane_b32 s94, v4
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3
+; SI-NEXT: v_readfirstlane_b32 s30, v2
; SI-NEXT: v_readfirstlane_b32 s34, v1
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s90
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
@@ -158562,14 +158652,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s62, s62, 16
; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
; SI-NEXT: s_lshl_b32 s72, s72, 16
+; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s74, 16
; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
; SI-NEXT: s_lshl_b32 s76, s76, 16
; SI-NEXT: s_lshl_b32 s78, s78, 16
; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s92, 16
; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
; SI-NEXT: s_lshl_b32 s94, s94, 16
; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
@@ -158579,288 +158668,246 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v19
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s79
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s23
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s11
; SI-NEXT: v_mul_f32_e64 v25, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s31
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, vcc_hi
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s93
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s89
-; SI-NEXT: v_mul_f32_e64 v37, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s77
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s76
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s61
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s59
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v52, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s88
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s57
; SI-NEXT: v_mul_f32_e64 v15, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s47
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s45
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s43
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s42
; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr61 : SGPR spill to VGPR lane
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB91_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readfirstlane_b32 s4, v7
+; SI-NEXT: v_readfirstlane_b32 s4, v28
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
+; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v1
+; SI-NEXT: v_readfirstlane_b32 s4, v31
; SI-NEXT: s_lshr_b32 s87, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
+; SI-NEXT: v_readfirstlane_b32 s4, v26
+; SI-NEXT: v_readfirstlane_b32 s50, v59
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
+; SI-NEXT: v_readfirstlane_b32 s4, v60
+; SI-NEXT: v_mov_b32_e32 v30, v35
+; SI-NEXT: v_mov_b32_e32 v35, v9
+; SI-NEXT: v_mov_b32_e32 v9, v13
+; SI-NEXT: v_mov_b32_e32 v13, v21
+; SI-NEXT: v_mov_b32_e32 v21, v25
+; SI-NEXT: v_mov_b32_e32 v25, v29
+; SI-NEXT: v_mov_b32_e32 v29, v34
+; SI-NEXT: v_mov_b32_e32 v34, v48
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[82:83], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v9
+; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_lshr_b32 s51, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: v_readfirstlane_b32 s4, v57
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v20
+; SI-NEXT: v_readfirstlane_b32 s4, v58
+; SI-NEXT: v_mov_b32_e32 v58, v49
+; SI-NEXT: v_mov_b32_e32 v60, v1
+; SI-NEXT: v_mov_b32_e32 v49, v51
+; SI-NEXT: v_mov_b32_e32 v51, v5
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[68:69], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v31
+; SI-NEXT: v_readfirstlane_b32 s4, v35
; SI-NEXT: s_lshr_b32 s67, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v28
+; SI-NEXT: v_readfirstlane_b32 s4, v22
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v47
+; SI-NEXT: v_readfirstlane_b32 s4, v20
; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v17
+; SI-NEXT: v_readfirstlane_b32 s4, v9
; SI-NEXT: s_lshr_b32 s79, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v57
+; SI-NEXT: v_readfirstlane_b32 s4, v11
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v58
+; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: s_lshr_b64 s[38:39], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v36
+; SI-NEXT: v_readfirstlane_b32 s4, v13
; SI-NEXT: s_lshr_b32 s43, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v60
+; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v30
+; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_readfirstlane_b32 s86, v27
; SI-NEXT: s_lshr_b64 s[92:93], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v25
+; SI-NEXT: v_readfirstlane_b32 s4, v21
+; SI-NEXT: v_mov_b32_e32 v27, v38
; SI-NEXT: s_lshr_b32 s89, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v34
+; SI-NEXT: v_readfirstlane_b32 s4, v27
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v35
+; SI-NEXT: v_readfirstlane_b32 s4, v58
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v50
+; SI-NEXT: v_readfirstlane_b32 s4, v25
; SI-NEXT: s_lshr_b32 s37, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v39
+; SI-NEXT: v_readfirstlane_b32 s4, v60
+; SI-NEXT: v_mov_b32_e32 v38, v52
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v48
+; SI-NEXT: v_readfirstlane_b32 s4, v38
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v33
+; SI-NEXT: v_readfirstlane_b32 s4, v29
; SI-NEXT: s_lshr_b32 s15, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v52
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: v_readfirstlane_b32 s14, v38
+; SI-NEXT: v_readfirstlane_b32 s4, v49
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v54
-; SI-NEXT: v_mov_b32_e32 v38, v53
+; SI-NEXT: v_readfirstlane_b32 s4, v51
; SI-NEXT: s_lshr_b64 s[76:77], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v38
+; SI-NEXT: v_readfirstlane_b32 s4, v34
; SI-NEXT: s_lshr_b32 s73, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: v_mov_b32_e32 v34, v32
-; SI-NEXT: v_readfirstlane_b32 s36, v32
-; SI-NEXT: v_mov_b32_e32 v32, v17
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v17, v13
+; SI-NEXT: v_readfirstlane_b32 s4, v17
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_mov_b32_e32 v13, v25
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v25, v21
-; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s42, v56
-; SI-NEXT: v_mov_b32_e32 v56, v36
-; SI-NEXT: v_mov_b32_e32 v36, v35
-; SI-NEXT: v_mov_b32_e32 v35, v50
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v50, v48
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v47, v31
-; SI-NEXT: v_mov_b32_e32 v31, v30
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16
-; SI-NEXT: v_mov_b32_e32 v30, v9
-; SI-NEXT: v_mov_b32_e32 v9, v5
-; SI-NEXT: v_readfirstlane_b32 s58, v5
-; SI-NEXT: v_mov_b32_e32 v5, v33
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v33, v29
-; SI-NEXT: v_readfirstlane_b32 s44, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s86, v3
+; SI-NEXT: v_mov_b32_e32 v52, v54
+; SI-NEXT: v_readfirstlane_b32 s14, v52
; SI-NEXT: s_lshr_b64 s[94:95], s[14:15], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: v_readfirstlane_b32 s6, v6
; SI-NEXT: s_lshr_b64 s[98:99], s[86:87], 16
; SI-NEXT: s_mov_b32 s97, s98
-; SI-NEXT: v_readfirstlane_b32 s50, v11
; SI-NEXT: s_lshr_b64 s[84:85], s[50:51], 16
; SI-NEXT: s_mov_b32 s83, s84
-; SI-NEXT: v_readfirstlane_b32 s66, v18
+; SI-NEXT: v_readfirstlane_b32 s66, v56
; SI-NEXT: s_lshr_b64 s[70:71], s[66:67], 16
; SI-NEXT: s_mov_b32 s69, s70
-; SI-NEXT: v_readfirstlane_b32 s78, v23
+; SI-NEXT: v_readfirstlane_b32 s78, v16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_readfirstlane_b32 s4, v59
+; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[78:79], 16
; SI-NEXT: s_mov_b32 s55, s64
+; SI-NEXT: v_readfirstlane_b32 s42, v8
; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 16
; SI-NEXT: s_mov_b32 s39, s30
-; SI-NEXT: v_readfirstlane_b32 s88, v59
+; SI-NEXT: v_readfirstlane_b32 s88, v2
; SI-NEXT: s_lshr_b64 s[80:81], s[88:89], 16
; SI-NEXT: s_mov_b32 s93, s80
+; SI-NEXT: v_readfirstlane_b32 s36, v37
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_readfirstlane_b32 s4, v48
+; SI-NEXT: s_lshr_b32 s59, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v47
+; SI-NEXT: s_lshr_b32 s5, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v46
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[36:37], 16
; SI-NEXT: s_mov_b32 s75, s48
; SI-NEXT: s_mov_b32 vcc_hi, s94
-; SI-NEXT: v_readfirstlane_b32 s72, v51
+; SI-NEXT: v_mov_b32_e32 v54, v32
+; SI-NEXT: v_readfirstlane_b32 s72, v54
; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16
-; SI-NEXT: s_mov_b32 s77, s60
-; SI-NEXT: v_readfirstlane_b32 s22, v43
-; SI-NEXT: v_readfirstlane_b32 s18, v41
-; SI-NEXT: v_readfirstlane_b32 s12, v22
-; SI-NEXT: v_mov_b32_e32 v28, v1
-; SI-NEXT: v_mov_b32_e32 v1, v54
-; SI-NEXT: v_mov_b32_e32 v52, v51
-; SI-NEXT: v_mov_b32_e32 v3, v45
-; SI-NEXT: v_mov_b32_e32 v7, v44
-; SI-NEXT: v_mov_b32_e32 v10, v4
-; SI-NEXT: v_mov_b32_e32 v11, v42
-; SI-NEXT: v_mov_b32_e32 v14, v12
-; SI-NEXT: v_mov_b32_e32 v16, v24
-; SI-NEXT: v_mov_b32_e32 v18, v15
-; SI-NEXT: v_mov_b32_e32 v20, v8
-; SI-NEXT: v_mov_b32_e32 v23, v6
-; SI-NEXT: v_mov_b32_e32 v19, v2
-; SI-NEXT: s_lshr_b32 s88, s98, 8
-; SI-NEXT: s_lshr_b32 s61, s84, 8
-; SI-NEXT: s_lshr_b32 s72, s70, 8
-; SI-NEXT: s_lshr_b32 s95, s80, 8
-; SI-NEXT: s_mov_b32 s86, s60
-; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v47
-; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v32
-; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v56
-; SI-NEXT: v_lshrrev_b32_e32 v57, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v35
-; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v5
-; SI-NEXT: v_mov_b32_e32 v2, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: s_lshr_b32 s59, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v55
-; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v37
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[58:59], 16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s4, v48
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s4, v5
; SI-NEXT: s_lshr_b32 s45, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v46
+; SI-NEXT: v_readfirstlane_b32 s4, v44
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v45
+; SI-NEXT: v_readfirstlane_b32 s4, v43
; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v53
+; SI-NEXT: v_readfirstlane_b32 s4, v33
; SI-NEXT: s_lshr_b32 s29, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v44
+; SI-NEXT: v_readfirstlane_b32 s4, v41
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v4
+; SI-NEXT: v_readfirstlane_b32 s4, v10
; SI-NEXT: s_lshr_b64 s[24:25], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v49
+; SI-NEXT: v_readfirstlane_b32 s4, v36
; SI-NEXT: s_lshr_b32 s23, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v42
+; SI-NEXT: v_readfirstlane_b32 s4, v55
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
+; SI-NEXT: v_readfirstlane_b32 s4, v14
; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v40
+; SI-NEXT: v_readfirstlane_b32 s4, v39
; SI-NEXT: s_lshr_b32 s19, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v24
+; SI-NEXT: v_readfirstlane_b32 s4, v50
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v15
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v26
+; SI-NEXT: v_readfirstlane_b32 s4, v7
; SI-NEXT: s_lshr_b32 s13, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v8
+; SI-NEXT: v_readfirstlane_b32 s4, v19
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v6
+; SI-NEXT: v_readfirstlane_b32 s4, v18
; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s5, v27
+; SI-NEXT: v_readfirstlane_b32 s5, v24
; SI-NEXT: s_lshr_b32 s7, s5, 16
; SI-NEXT: s_mov_b32 s5, s7
; SI-NEXT: s_lshr_b64 s[8:9], s[6:7], 16
@@ -158942,13 +158989,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s8, 44
; SI-NEXT: v_writelane_b32 v62, s9, 45
; SI-NEXT: s_lshr_b64 s[8:9], vcc, 8
+; SI-NEXT: s_mov_b32 s77, s60
; SI-NEXT: v_writelane_b32 v62, s8, 42
; SI-NEXT: v_writelane_b32 v62, s9, 43
; SI-NEXT: s_lshr_b64 s[8:9], s[76:77], 24
; SI-NEXT: v_writelane_b32 v62, s8, 54
; SI-NEXT: v_writelane_b32 v62, s9, 55
; SI-NEXT: s_lshr_b64 s[8:9], s[76:77], 16
+; SI-NEXT: v_readfirstlane_b32 s58, v1
; SI-NEXT: v_writelane_b32 v62, s8, 52
+; SI-NEXT: s_lshr_b64 s[56:57], s[58:59], 16
; SI-NEXT: v_writelane_b32 v62, s9, 53
; SI-NEXT: s_lshr_b64 s[8:9], s[76:77], 8
; SI-NEXT: s_mov_b32 s63, s56
@@ -158958,6 +159008,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s8, 60
; SI-NEXT: v_writelane_b32 v62, s9, 61
; SI-NEXT: s_lshr_b64 s[8:9], s[62:63], 16
+; SI-NEXT: v_readfirstlane_b32 s44, v45
; SI-NEXT: v_writelane_b32 v62, s8, 58
; SI-NEXT: s_lshr_b64 s[52:53], s[44:45], 16
; SI-NEXT: v_writelane_b32 v62, s9, 59
@@ -158969,8 +159020,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 2
; SI-NEXT: v_writelane_b32 v61, s9, 3
; SI-NEXT: s_lshr_b64 s[8:9], s[46:47], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s28, v29
+; SI-NEXT: v_readfirstlane_b32 s28, v42
; SI-NEXT: v_writelane_b32 v61, s8, 0
; SI-NEXT: s_lshr_b64 s[26:27], s[28:29], 16
; SI-NEXT: v_writelane_b32 v61, s9, 1
@@ -158982,6 +159032,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 8
; SI-NEXT: v_writelane_b32 v61, s9, 9
; SI-NEXT: s_lshr_b64 s[8:9], s[40:41], 16
+; SI-NEXT: v_readfirstlane_b32 s22, v40
; SI-NEXT: v_writelane_b32 v61, s8, 6
; SI-NEXT: s_lshr_b64 s[20:21], s[22:23], 16
; SI-NEXT: v_writelane_b32 v61, s9, 7
@@ -158993,6 +159044,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 14
; SI-NEXT: v_writelane_b32 v61, s9, 15
; SI-NEXT: s_lshr_b64 s[8:9], s[24:25], 16
+; SI-NEXT: v_readfirstlane_b32 s18, v53
; SI-NEXT: v_writelane_b32 v61, s8, 12
; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16
; SI-NEXT: v_writelane_b32 v61, s9, 13
@@ -159004,6 +159056,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 20
; SI-NEXT: v_writelane_b32 v61, s9, 21
; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 16
+; SI-NEXT: v_readfirstlane_b32 s12, v23
; SI-NEXT: v_writelane_b32 v61, s8, 18
; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16
; SI-NEXT: v_writelane_b32 v61, s9, 19
@@ -159025,16 +159078,35 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s9, 33
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
; SI-NEXT: v_writelane_b32 v61, s8, 30
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v3, v14
+; SI-NEXT: v_mov_b32_e32 v14, v53
+; SI-NEXT: v_mov_b32_e32 v22, v18
; SI-NEXT: v_writelane_b32 v61, s9, 31
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 8
+; SI-NEXT: v_mov_b32_e32 v18, v33
+; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v33
+; SI-NEXT: v_mov_b32_e32 v33, v24
; SI-NEXT: v_writelane_b32 v61, s8, 28
-; SI-NEXT: v_mov_b32_e32 v4, v43
-; SI-NEXT: v_mov_b32_e32 v12, v41
-; SI-NEXT: v_mov_b32_e32 v15, v22
+; SI-NEXT: v_mov_b32_e32 v24, v7
+; SI-NEXT: v_mov_b32_e32 v26, v33
+; SI-NEXT: v_mov_b32_e32 v11, v41
+; SI-NEXT: v_mov_b32_e32 v12, v10
+; SI-NEXT: v_mov_b32_e32 v2, v55
+; SI-NEXT: v_mov_b32_e32 v16, v50
+; SI-NEXT: v_mov_b32_e32 v4, v15
+; SI-NEXT: v_mov_b32_e32 v15, v23
+; SI-NEXT: v_mov_b32_e32 v20, v19
+; SI-NEXT: v_mov_b32_e32 v19, v6
+; SI-NEXT: s_lshr_b32 s88, s98, 8
+; SI-NEXT: s_lshr_b32 s61, s84, 8
+; SI-NEXT: s_lshr_b32 s72, s70, 8
; SI-NEXT: s_lshr_b32 s57, s64, 8
; SI-NEXT: s_lshr_b32 s58, s30, 8
+; SI-NEXT: s_lshr_b32 s95, s80, 8
; SI-NEXT: s_lshr_b32 s44, s48, 8
; SI-NEXT: s_lshr_b32 s27, s94, 8
+; SI-NEXT: s_mov_b32 s86, s60
; SI-NEXT: s_lshr_b32 s28, s60, 8
; SI-NEXT: s_mov_b32 s78, s56
; SI-NEXT: s_lshr_b32 s21, s56, 8
@@ -159048,209 +159120,214 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b32 s12, s90, 8
; SI-NEXT: v_writelane_b32 v61, s9, 29
; SI-NEXT: s_mov_b64 s[8:9], 0
-; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v28
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v30
-; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v38
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v21
-; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v48
-; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v53
-; SI-NEXT: v_mov_b32_e32 v22, v49
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v49
-; SI-NEXT: v_mov_b32_e32 v24, v40
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v40
-; SI-NEXT: v_mov_b32_e32 v28, v26
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v26
+; SI-NEXT: v_lshrrev_b32_e32 v57, 24, v31
+; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v30
+; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v35
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v9
+; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v21
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v27
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v37, v38
-; SI-NEXT: v_mov_b32_e32 v49, v21
-; SI-NEXT: v_mov_b32_e32 v26, v48
-; SI-NEXT: v_mov_b32_e32 v27, v29
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v29
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v34
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v48
+; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v5
+; SI-NEXT: v_mov_b32_e32 v6, v36
+; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v36
+; SI-NEXT: v_mov_b32_e32 v23, v39
+; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v39
+; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v24
+; SI-NEXT: v_mov_b32_e32 v24, v33
+; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v26
+; SI-NEXT: v_mov_b32_e32 v33, v37
+; SI-NEXT: v_mov_b32_e32 v39, v52
+; SI-NEXT: v_mov_b32_e32 v37, v54
+; SI-NEXT: v_mov_b32_e32 v36, v49
+; SI-NEXT: v_mov_b32_e32 v49, v51
+; SI-NEXT: v_mov_b32_e32 v26, v31
+; SI-NEXT: v_mov_b32_e32 v31, v35
+; SI-NEXT: v_mov_b32_e32 v35, v1
+; SI-NEXT: v_mov_b32_e32 v28, v59
; SI-NEXT: s_branch .LBB91_3
; SI-NEXT: .LBB91_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v19, v2
+; SI-NEXT: v_mov_b32_e32 v22, v18
; SI-NEXT: v_writelane_b32 v62, s4, 0
; SI-NEXT: v_writelane_b32 v62, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v2, v27
+; SI-NEXT: v_mov_b32_e32 v18, v33
; SI-NEXT: v_writelane_b32 v62, s4, 2
; SI-NEXT: v_writelane_b32 v62, s5, 3
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v18, v15
+; SI-NEXT: v_mov_b32_e32 v33, v37
; SI-NEXT: v_writelane_b32 v62, s4, 4
; SI-NEXT: v_writelane_b32 v62, s5, 5
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v15, v22
+; SI-NEXT: v_mov_b32_e32 v58, v49
; SI-NEXT: v_writelane_b32 v62, s4, 6
; SI-NEXT: v_writelane_b32 v62, s5, 7
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v28, v26
+; SI-NEXT: v_mov_b32_e32 v37, v32
; SI-NEXT: v_writelane_b32 v62, s4, 8
; SI-NEXT: v_writelane_b32 v62, s5, 9
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v22, v49
+; SI-NEXT: v_mov_b32_e32 v49, v5
; SI-NEXT: v_writelane_b32 v62, s4, 10
; SI-NEXT: v_writelane_b32 v62, s5, 11
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v37, v53
+; SI-NEXT: v_mov_b32_e32 v26, v31
; SI-NEXT: v_writelane_b32 v62, s4, 12
; SI-NEXT: v_writelane_b32 v62, s5, 13
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v30, v35
; SI-NEXT: v_writelane_b32 v62, s4, 14
; SI-NEXT: v_writelane_b32 v62, s5, 15
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr15
-; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: v_mov_b32_e32 v33, v29
+; SI-NEXT: v_mov_b32_e32 v31, v9
; SI-NEXT: v_writelane_b32 v62, s4, 16
; SI-NEXT: v_writelane_b32 v62, s5, 17
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v25, v21
+; SI-NEXT: v_mov_b32_e32 v9, v13
+; SI-NEXT: v_mov_b32_e32 v13, v21
+; SI-NEXT: v_mov_b32_e32 v21, v25
+; SI-NEXT: v_mov_b32_e32 v25, v29
+; SI-NEXT: v_mov_b32_e32 v29, v34
+; SI-NEXT: v_mov_b32_e32 v34, v48
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: v_writelane_b32 v62, s4, 18
; SI-NEXT: v_writelane_b32 v62, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v17, v13
+; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: v_mov_b32_e32 v20, v19
; SI-NEXT: v_writelane_b32 v62, s4, 20
; SI-NEXT: v_writelane_b32 v62, s5, 21
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v9, v5
+; SI-NEXT: v_mov_b32_e32 v19, v6
; SI-NEXT: v_writelane_b32 v62, s4, 22
; SI-NEXT: v_writelane_b32 v62, s5, 23
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v1, v54
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_mov_b32_e32 v4, v15
; SI-NEXT: v_writelane_b32 v62, s4, 24
; SI-NEXT: v_writelane_b32 v62, s5, 25
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v52, v51
+; SI-NEXT: v_mov_b32_e32 v16, v50
; SI-NEXT: v_writelane_b32 v62, s4, 26
; SI-NEXT: v_writelane_b32 v62, s5, 27
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v50, v48
+; SI-NEXT: v_mov_b32_e32 v15, v23
; SI-NEXT: v_writelane_b32 v62, s4, 28
; SI-NEXT: v_writelane_b32 v62, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v39, v38
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v3, v14
; SI-NEXT: v_writelane_b32 v62, s4, 30
; SI-NEXT: v_writelane_b32 v62, s5, 31
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v36, v35
+; SI-NEXT: v_mov_b32_e32 v2, v55
; SI-NEXT: v_writelane_b32 v62, s4, 32
; SI-NEXT: v_writelane_b32 v62, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v34, v32
+; SI-NEXT: v_mov_b32_e32 v14, v53
; SI-NEXT: v_writelane_b32 v62, s4, 34
; SI-NEXT: v_writelane_b32 v62, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v31, v30
+; SI-NEXT: v_mov_b32_e32 v23, v39
; SI-NEXT: v_writelane_b32 v62, s4, 36
; SI-NEXT: v_writelane_b32 v62, s5, 37
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v23, v6
+; SI-NEXT: v_mov_b32_e32 v12, v10
; SI-NEXT: v_writelane_b32 v62, s4, 38
; SI-NEXT: v_writelane_b32 v62, s5, 39
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v20, v8
+; SI-NEXT: v_mov_b32_e32 v11, v41
; SI-NEXT: v_writelane_b32 v62, s4, 40
; SI-NEXT: v_writelane_b32 v62, s5, 41
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v16, v24
+; SI-NEXT: v_mov_b32_e32 v6, v36
; SI-NEXT: v_writelane_b32 v62, s4, 42
; SI-NEXT: v_writelane_b32 v62, s5, 43
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v14, v12
+; SI-NEXT: s_mov_b64 s[8:9], -1
; SI-NEXT: v_writelane_b32 v62, s4, 44
; SI-NEXT: v_writelane_b32 v62, s5, 45
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v11, v42
+; SI-NEXT: v_mov_b32_e32 v27, v38
; SI-NEXT: v_writelane_b32 v62, s4, 46
; SI-NEXT: v_writelane_b32 v62, s5, 47
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v12, v41
+; SI-NEXT: v_mov_b32_e32 v39, v54
; SI-NEXT: v_writelane_b32 v62, s4, 48
; SI-NEXT: v_writelane_b32 v62, s5, 49
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v24, v40
+; SI-NEXT: v_mov_b32_e32 v60, v1
; SI-NEXT: v_writelane_b32 v62, s4, 50
; SI-NEXT: v_writelane_b32 v62, s5, 51
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v10, v4
+; SI-NEXT: v_mov_b32_e32 v38, v52
; SI-NEXT: v_writelane_b32 v62, s4, 52
; SI-NEXT: v_writelane_b32 v62, s5, 53
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v7, v44
+; SI-NEXT: v_mov_b32_e32 v36, v51
; SI-NEXT: v_writelane_b32 v62, s4, 54
; SI-NEXT: v_writelane_b32 v62, s5, 55
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v4, v43
-; SI-NEXT: v_writelane_b32 v62, s4, 56
-; SI-NEXT: v_writelane_b32 v62, s5, 57
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v3, v45
-; SI-NEXT: v_writelane_b32 v62, s4, 58
-; SI-NEXT: v_writelane_b32 v62, s5, 59
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b64 s[8:9], -1
-; SI-NEXT: v_writelane_b32 v62, s4, 60
-; SI-NEXT: v_writelane_b32 v62, s5, 61
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr43
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $sgpr28
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $sgpr21
-; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $sgpr22
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $sgpr18
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $vcc_lo
@@ -159275,6 +159352,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr13
+; SI-NEXT: v_writelane_b32 v62, s4, 56
+; SI-NEXT: v_writelane_b32 v62, s5, 57
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v62, s4, 58
+; SI-NEXT: v_writelane_b32 v62, s5, 59
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v62, s4, 60
+; SI-NEXT: v_writelane_b32 v62, s5, 61
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v62, s4, 62
; SI-NEXT: v_writelane_b32 v62, s5, 63
; SI-NEXT: ; implicit-def: $sgpr4
@@ -159333,375 +159419,371 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s5, 35
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: .LBB91_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v54, v1
-; SI-NEXT: v_mov_b32_e32 v5, v9
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec
; SI-NEXT: s_cselect_b32 s5, 1, 0
; SI-NEXT: s_cmp_lg_u32 s5, 1
; SI-NEXT: s_cbranch_scc1 .LBB91_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v20
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
+; SI-NEXT: v_readfirstlane_b32 s4, v20
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v19
-; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v18
+; SI-NEXT: v_readfirstlane_b32 s4, v22
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_readfirstlane_b32 s5, v55
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
-; SI-NEXT: v_readfirstlane_b32 s8, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s5, v19
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_readfirstlane_b32 s8, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v15
; SI-NEXT: s_lshr_b32 s7, s5, 16
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_readfirstlane_b32 s6, v20
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v7
; SI-NEXT: s_lshr_b64 s[90:91], s[6:7], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: v_readfirstlane_b32 s12, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v14
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v28
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: s_lshr_b64 s[10:11], s[8:9], 16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v11
-; SI-NEXT: v_readfirstlane_b32 s8, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12
-; SI-NEXT: v_readfirstlane_b32 s6, v15
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_readfirstlane_b32 s6, v4
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: s_lshr_b32 s13, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: v_readfirstlane_b32 s18, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v14
+; SI-NEXT: s_lshr_b64 s[10:11], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
+; SI-NEXT: v_readfirstlane_b32 s18, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v12
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v4
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_readfirstlane_b32 s22, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v7
-; SI-NEXT: v_readfirstlane_b32 s6, v11
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v22
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v11
+; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: s_lshr_b32 s19, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s6, v7
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v4
-; SI-NEXT: s_lshr_b32 s23, s6, 16
; SI-NEXT: s_lshr_b64 s[24:25], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v36
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v60
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_readfirstlane_b32 s12, v15
; SI-NEXT: s_mov_b32 s5, s7
; SI-NEXT: v_writelane_b32 v61, s4, 34
; SI-NEXT: v_writelane_b32 v61, s5, 35
-; SI-NEXT: s_lshr_b64 s[26:27], s[22:23], 16
-; SI-NEXT: s_mov_b32 s25, s26
; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16
; SI-NEXT: s_mov_b32 s17, s34
; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16
; SI-NEXT: s_mov_b32 s11, s20
; SI-NEXT: s_mov_b32 s5, s90
-; SI-NEXT: s_lshr_b32 s18, s26, 8
; SI-NEXT: s_lshr_b32 s91, s34, 8
; SI-NEXT: s_lshr_b32 s12, s20, 8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v4
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v11
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v15
-; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v55
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_readfirstlane_b32 s6, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v27
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53
-; SI-NEXT: v_readfirstlane_b32 s28, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v6
+; SI-NEXT: v_readfirstlane_b32 s22, v7
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v2
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v33
-; SI-NEXT: s_lshr_b32 s29, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v3
+; SI-NEXT: s_lshr_b32 s23, s6, 16
+; SI-NEXT: s_lshr_b64 s[26:27], s[22:23], 16
+; SI-NEXT: s_mov_b32 s25, s26
+; SI-NEXT: s_lshr_b32 s18, s26, 8
+; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v7
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v57, 24, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v26
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: s_lshr_b32 s45, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v49
+; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6
+; SI-NEXT: v_readfirstlane_b32 s28, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_readfirstlane_b32 s6, v6
+; SI-NEXT: s_lshr_b32 s29, s6, 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
+; SI-NEXT: s_mov_b32 s41, s56
+; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v5
+; SI-NEXT: v_readfirstlane_b32 s44, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: s_lshr_b32 s59, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v37
+; SI-NEXT: v_readfirstlane_b32 s6, v7
+; SI-NEXT: v_readfirstlane_b32 s8, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v35
+; SI-NEXT: s_lshr_b32 s45, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v10
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s44, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v25
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v6
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v48
+; SI-NEXT: v_readfirstlane_b32 s58, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v49
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s6, v8
+; SI-NEXT: v_readfirstlane_b32 s8, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v37
+; SI-NEXT: s_lshr_b32 s59, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v11
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v34
+; SI-NEXT: v_readfirstlane_b32 s72, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v38
; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
; SI-NEXT: v_readfirstlane_b32 s6, v10
+; SI-NEXT: v_readfirstlane_b32 s8, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v39
; SI-NEXT: s_lshr_b32 s73, s6, 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v5
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s58, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v54
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s72, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v50
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v39
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s14, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v36
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_readfirstlane_b32 s6, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v29
+; SI-NEXT: v_readfirstlane_b32 s14, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s6, v11
+; SI-NEXT: v_readfirstlane_b32 s8, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v33
+; SI-NEXT: s_lshr_b32 s15, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v12
+; SI-NEXT: v_readfirstlane_b32 s36, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v12
+; SI-NEXT: s_lshr_b32 s37, s6, 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v30
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: s_lshr_b64 s[48:49], s[36:37], 16
+; SI-NEXT: s_mov_b32 s75, s48
+; SI-NEXT: s_lshr_b64 s[98:99], s[14:15], 16
+; SI-NEXT: s_mov_b32 vcc_hi, s98
; SI-NEXT: s_lshr_b64 s[94:95], s[72:73], 16
; SI-NEXT: s_mov_b32 s77, s94
; SI-NEXT: s_lshr_b64 s[60:61], s[58:59], 16
; SI-NEXT: s_mov_b32 s63, s60
; SI-NEXT: s_lshr_b64 s[52:53], s[44:45], 16
; SI-NEXT: s_mov_b32 s47, s52
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_mov_b32 s41, s56
+; SI-NEXT: s_lshr_b32 s44, s48, 8
+; SI-NEXT: s_lshr_b32 s27, s98, 8
; SI-NEXT: s_lshr_b32 s28, s94, 8
; SI-NEXT: s_lshr_b32 s21, s60, 8
; SI-NEXT: s_lshr_b32 s22, s52, 8
-; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v7
-; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v3
-; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34
-; SI-NEXT: v_readfirstlane_b32 s6, v12
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: s_lshr_b32 s15, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s36, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v31
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: s_lshr_b64 s[98:99], s[14:15], 16
-; SI-NEXT: s_mov_b32 vcc_hi, s98
-; SI-NEXT: s_lshr_b32 s27, s98, 8
+; SI-NEXT: s_mov_b32 s36, s20
; SI-NEXT: s_mov_b32 s14, s90
-; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v12
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v5
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v11
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v10
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v7
+; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v2
+; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v15
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_readfirstlane_b32 s6, v14
-; SI-NEXT: s_lshr_b32 s37, s6, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: s_lshr_b64 s[48:49], s[36:37], 16
-; SI-NEXT: s_mov_b32 s75, s48
-; SI-NEXT: s_lshr_b32 s44, s48, 8
-; SI-NEXT: s_mov_b32 s36, s20
-; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v14
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s88, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: s_lshr_b64 s[92:93], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v14
+; SI-NEXT: v_readfirstlane_b32 s88, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v21
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_readfirstlane_b32 s6, v14
; SI-NEXT: s_lshr_b32 s89, s6, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[80:81], s[88:89], 16
; SI-NEXT: s_mov_b32 s93, s80
; SI-NEXT: s_lshr_b32 s95, s80, 8
-; SI-NEXT: v_lshrrev_b32_e32 v57, 24, v16
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s42, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v14
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_readfirstlane_b32 s6, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: s_lshr_b64 s[38:39], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s6, v17
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v15
+; SI-NEXT: v_readfirstlane_b32 s42, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_readfirstlane_b32 s6, v15
; SI-NEXT: s_lshr_b32 s43, s6, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 16
; SI-NEXT: s_mov_b32 s39, s30
; SI-NEXT: s_lshr_b32 s58, s30, 8
; SI-NEXT: s_mov_b32 s42, s26
-; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s78, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16
+; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v9
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v15
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v13
; SI-NEXT: s_lshr_b32 s79, s6, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s78, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[64:65], s[78:79], 16
; SI-NEXT: s_mov_b32 s55, s64
; SI-NEXT: s_lshr_b32 s57, s64, 8
; SI-NEXT: s_mov_b32 s78, s60
-; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v13
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s66, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v9
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s67, s6, 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s66, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[70:71], s[66:67], 16
; SI-NEXT: s_mov_b32 s69, s70
; SI-NEXT: s_lshr_b32 s72, s70, 8
; SI-NEXT: s_mov_b32 s66, s56
; SI-NEXT: s_lshr_b32 s56, s56, 8
-; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v9
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s50, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[82:83], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v5
; SI-NEXT: s_lshr_b32 s51, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s8, v8
+; SI-NEXT: s_lshr_b64 s[82:83], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s50, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[84:85], s[50:51], 16
; SI-NEXT: s_mov_b32 s83, s84
; SI-NEXT: s_lshr_b32 s61, s84, 8
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[96:97], s[8:9], 16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_readfirstlane_b32 s6, v1
-; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v1
; SI-NEXT: s_lshr_b32 s87, s6, 16
+; SI-NEXT: s_lshr_b64 s[96:97], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_readfirstlane_b32 s86, v6
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s86, v16
; SI-NEXT: s_lshr_b64 s[8:9], s[86:87], 16
; SI-NEXT: s_mov_b32 s97, s8
; SI-NEXT: s_lshr_b64 s[6:7], s[96:97], 24
@@ -159855,7 +159937,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_mov_b32 s98, s8
; SI-NEXT: s_mov_b32 s86, s94
; SI-NEXT: s_lshr_b32 s6, s90, 8
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v5
; SI-NEXT: .LBB91_5: ; %end
; SI-NEXT: v_readlane_b32 s8, v62, 0
; SI-NEXT: s_and_b32 s5, s96, 0xff
@@ -159871,7 +159952,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s98, 0xff
; SI-NEXT: s_lshl_b32 s8, s88, 8
@@ -159880,7 +159960,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v8
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v57
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 6
@@ -159908,7 +159988,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v6
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v56
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 12
@@ -159936,7 +160016,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v60
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v47
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 18
@@ -159965,7 +160045,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 24
@@ -159994,7 +160074,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v58
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v45
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 30
@@ -160023,7 +160103,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v57
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 36
@@ -160052,7 +160132,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v56
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v43
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 42
@@ -160083,7 +160163,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s9, v62, 49
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 50
@@ -160111,7 +160191,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v46
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v41
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 56
@@ -160140,7 +160220,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 62
@@ -160168,7 +160248,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v44
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v55
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 4
@@ -160197,7 +160277,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v43
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v53
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 10
@@ -160226,7 +160306,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v42
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v50
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 16
@@ -160254,7 +160334,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v10
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 22
@@ -160282,7 +160362,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v40
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v8
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 28
; SI-NEXT: s_and_b32 s5, s5, 0xffff
@@ -160312,7 +160392,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v55
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
@@ -160375,9 +160455,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -160386,8 +160466,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -160796,8 +160876,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s45, s44, 16
; VI-NEXT: v_add_f32_e32 v1, s45, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
@@ -160819,8 +160899,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s44, s43, 16
; VI-NEXT: s_and_b32 s43, s43, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v2, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; VI-NEXT: v_add_f32_e32 v1, s44, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -160837,8 +160917,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s43, s42, 16
; VI-NEXT: v_add_f32_e32 v1, s43, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
@@ -160860,8 +160940,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s42, s41, 16
; VI-NEXT: s_and_b32 s41, s41, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v2, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; VI-NEXT: v_add_f32_e32 v1, s42, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -160878,8 +160958,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s41, s40, 16
; VI-NEXT: v_add_f32_e32 v1, s41, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
@@ -160901,8 +160981,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s40, s15, 16
; VI-NEXT: s_and_b32 s15, s15, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v2, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: v_add_f32_e32 v1, s40, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -160918,8 +160998,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_lshl_b32 s15, s14, 16
; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: s_lshl_b32 s15, s14, 16
; VI-NEXT: v_add_f32_e32 v1, s15, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -160936,11 +161018,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_lshrrev_b64 v[1:2], 16, v[1:2]
-; VI-NEXT: v_mov_b32_e32 v2, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s14, s13, 16
+; VI-NEXT: v_lshrrev_b64 v[58:59], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s14, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -160957,17 +161036,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s13, s12, 16
+; VI-NEXT: s_and_b32 s12, s12, 0xffff0000
+; VI-NEXT: v_mov_b32_e32 v59, v5
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_add_f32_e32 v1, s13, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: s_and_b32 s12, s12, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; VI-NEXT: v_add_f32_e32 v2, s12, v43
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
@@ -160978,7 +161058,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s12, s11, 16
-; VI-NEXT: v_lshrrev_b64 v[58:59], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s12, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -160997,10 +161077,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s11, s10, 16
; VI-NEXT: s_and_b32 s10, s10, 0xffff0000
-; VI-NEXT: v_mov_b32_e32 v59, v6
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v61, v5
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: v_add_f32_e32 v1, s11, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161017,7 +161097,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s10, s9, 16
-; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s10, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161036,8 +161116,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s9, s8, 16
; VI-NEXT: s_and_b32 s8, s8, 0xffff0000
-; VI-NEXT: v_mov_b32_e32 v61, v6
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2]
+; VI-NEXT: v_mov_b32_e32 v57, v5
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s9, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161054,7 +161134,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s8, s7, 16
-; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s8, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161072,7 +161152,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s7, s6, 16
-; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s7, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161090,7 +161170,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s6, s17, 16
-; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161108,7 +161188,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s6, s16, 16
-; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161125,11 +161205,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_lshrrev_b64 v[1:2], 16, v[1:2]
-; VI-NEXT: v_mov_b32_e32 v2, v30
; VI-NEXT: s_lshl_b32 s6, s19, 16
-; VI-NEXT: v_mov_b32_e32 v25, v2
-; VI-NEXT: v_mov_b32_e32 v24, v1
+; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161147,7 +161224,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s6, s18, 16
-; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[47:48], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161165,7 +161242,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s6, s21, 16
-; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161183,7 +161260,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s6, s20, 16
-; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
@@ -161263,8 +161340,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: s_and_b32 s6, s24, 0xffff0000
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; VI-NEXT: v_add_f32_e32 v2, s6, v43
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
@@ -161275,24 +161350,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s6, s27, 16
-; VI-NEXT: v_mov_b32_e32 v37, v31
; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[1:2]
; VI-NEXT: v_add_f32_e32 v1, s6, v43
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[36:37]
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
-; VI-NEXT: v_mov_b32_e32 v34, v26
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: s_and_b32 s6, s27, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; VI-NEXT: v_add_f32_e32 v2, s6, v43
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[33:34]
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -161368,6 +161435,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
@@ -161385,468 +161454,470 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v42, v2, v3, vcc
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_mov_b32_e32 v52, v50
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_mov_b32_e32 v57, v28
+; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[51:52]
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[56:57]
-; VI-NEXT: v_mov_b32_e32 v47, v6
+; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[42:43]
+; VI-NEXT: v_mov_b32_e32 v7, v44
+; VI-NEXT: v_mov_b32_e32 v3, v44
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v31, v46
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[30:31]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[46:47]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[60:61]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[58:59]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(10)
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[20:21]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(10)
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[34:35]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v37, v21
+; VI-NEXT: v_mov_b32_e32 v33, v26
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[36:37]
+; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[32:33]
+; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v32
+; VI-NEXT: v_mov_b32_e32 v33, v32
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v32
+; VI-NEXT: v_mov_b32_e32 v41, v39
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[6:7]
+; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v26
+; VI-NEXT: v_mov_b32_e32 v35, v47
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[40:41]
+; VI-NEXT: v_mov_b32_e32 v4, v47
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v47
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v26
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v46
+; VI-NEXT: v_mov_b32_e32 v55, v53
; VI-NEXT: v_mov_b32_e32 v49, v38
+; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[54:55]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[34:35]
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49]
-; VI-NEXT: v_mov_b32_e32 v49, v44
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v49
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[42:43]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v51
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v48
+; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v36
+; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v34
+; VI-NEXT: v_mov_b32_e32 v29, v5
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[28:29]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[56:57]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[60:61]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[58:59]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v26
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v48
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v21
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_mov_b32_e32 v55, v13
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v13
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[44:45]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[42:43]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v3
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v49
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v39
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v39
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v39
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v39
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v40
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v40
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v53
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v53
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v50
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v50
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v50
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v51
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v26
+; VI-NEXT: v_mov_b32_e32 v32, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v46
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v21
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v46
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v21
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v47
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v28
-; VI-NEXT: v_mov_b32_e32 v32, v26
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v26
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v55, v53
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[54:55]
-; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v28
-; VI-NEXT: v_mov_b32_e32 v41, v39
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[40:41]
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v52, v50
-; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[51:52]
-; VI-NEXT: v_mov_b32_e32 v7, v44
-; VI-NEXT: v_mov_b32_e32 v13, v24
-; VI-NEXT: v_mov_b32_e32 v14, v25
-; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v28
-; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[6:7]
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
-; VI-NEXT: v_mov_b32_e32 v29, v30
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v30
-; VI-NEXT: v_mov_b32_e32 v30, v13
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v50
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v38
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[2:3]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v56
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v56
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(10)
-; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v56, v11
-; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v1
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
+; VI-NEXT: v_mov_b32_e32 v47, v26
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v30
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v30
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v30
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v36
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_mov_b32_e32 v2, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v2
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v28
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v28
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: v_mov_b32_e32 v23, v45
+; VI-NEXT: v_mov_b32_e32 v28, v42
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v34
; VI-NEXT: s_waitcnt vmcnt(8)
-; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v1
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; VI-NEXT: v_mov_b32_e32 v11, v60
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[41:42]
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v1
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v58
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v58
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v2
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v56
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v56
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v56
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v23
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v28
+; VI-NEXT: v_mov_b32_e32 v46, v42
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v28
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_mov_b32_e32 v2, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v2
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_mov_b32_e32 v2, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v58
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v20
-; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(8)
-; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: v_mov_b32_e32 v55, v26
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v5, 24, v1
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v5, v45
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
-; VI-NEXT: v_mov_b32_e32 v60, v16
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v5
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v5
-; VI-NEXT: v_mov_b32_e32 v5, v41
-; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v48
-; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v48
-; VI-NEXT: v_mov_b32_e32 v35, v31
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v31
-; VI-NEXT: v_mov_b32_e32 v31, v3
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v36
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v36
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v33
-; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v33
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v30
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v34
-; VI-NEXT: v_mov_b32_e32 v28, v34
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v34
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v2
-; VI-NEXT: v_mov_b32_e32 v37, v2
+; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v2
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v1
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_mov_b32_e32 v27, v26
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v58
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v58
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v58
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_mov_b32_e32 v2, v25
+; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v2
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v2
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_mov_b32_e32 v2, v26
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; VI-NEXT: v_mov_b32_e32 v57, v26
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v2
+; VI-NEXT: v_mov_b32_e32 v2, v44
+; VI-NEXT: v_mov_b32_e32 v43, v25
+; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v13
+; VI-NEXT: v_mov_b32_e32 v44, v18
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v2
+; VI-NEXT: v_mov_b32_e32 v58, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v23
; VI-NEXT: s_branch .LBB91_6
; VI-NEXT: .LBB91_5:
; VI-NEXT: v_mov_b32_e32 v1, s64
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s58
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s65
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s65
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s87
; VI-NEXT: v_readlane_b32 s58, v62, 12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s58
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s50
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s86
; VI-NEXT: v_readlane_b32 s47, v62, 13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 17
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 19
-; VI-NEXT: v_mov_b32_e32 v31, s47
+; VI-NEXT: v_mov_b32_e32 v9, s47
+; VI-NEXT: v_mov_b32_e32 v8, s6
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s7
; VI-NEXT: v_readlane_b32 s47, v62, 20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 22
-; VI-NEXT: v_mov_b32_e32 v21, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 23
-; VI-NEXT: v_mov_b32_e32 v25, s47
+; VI-NEXT: v_mov_b32_e32 v49, s47
; VI-NEXT: v_readlane_b32 s47, v62, 24
-; VI-NEXT: v_mov_b32_e32 v14, s47
+; VI-NEXT: v_mov_b32_e32 v59, s47
; VI-NEXT: v_readlane_b32 s47, v62, 25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 27
-; VI-NEXT: v_mov_b32_e32 v9, s47
-; VI-NEXT: v_mov_b32_e32 v8, s6
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s7
-; VI-NEXT: v_mov_b32_e32 v20, s78
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v20, s88
-; VI-NEXT: v_mov_b32_e32 v27, s43
-; VI-NEXT: v_mov_b32_e32 v26, s34
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v26, s36
+; VI-NEXT: v_mov_b32_e32 v14, s47
+; VI-NEXT: v_mov_b32_e32 v13, s78
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, s88
; VI-NEXT: v_readlane_b32 s47, v62, 28
-; VI-NEXT: v_mov_b32_e32 v3, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 29
; VI-NEXT: v_mov_b32_e32 v52, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 29
+; VI-NEXT: v_mov_b32_e32 v21, s47
; VI-NEXT: v_readlane_b32 s47, v62, 30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s8
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v20, s90
; VI-NEXT: v_readlane_b32 s47, v62, 32
-; VI-NEXT: v_mov_b32_e32 v43, s47
+; VI-NEXT: v_mov_b32_e32 v5, s47
; VI-NEXT: v_readlane_b32 s47, v62, 33
-; VI-NEXT: v_mov_b32_e32 v44, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 34
-; VI-NEXT: v_mov_b32_e32 v18, s47
+; VI-NEXT: v_mov_b32_e32 v16, s47
; VI-NEXT: v_readlane_b32 s47, v62, 35
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v2, s47
; VI-NEXT: v_readlane_b32 s47, v62, 36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s47
; VI-NEXT: v_readlane_b32 s47, v62, 37
-; VI-NEXT: v_mov_b32_e32 v59, s47
+; VI-NEXT: v_mov_b32_e32 v41, s47
; VI-NEXT: v_readlane_b32 s47, v62, 38
-; VI-NEXT: v_mov_b32_e32 v4, s47
+; VI-NEXT: v_mov_b32_e32 v20, s47
; VI-NEXT: v_readlane_b32 s47, v62, 39
-; VI-NEXT: v_mov_b32_e32 v13, s47
+; VI-NEXT: v_mov_b32_e32 v31, s47
; VI-NEXT: v_readlane_b32 s47, v62, 40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, s90
+; VI-NEXT: v_mov_b32_e32 v2, s47
; VI-NEXT: v_readlane_b32 s47, v62, 41
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s73
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s47
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s73
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s57
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s72
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s81
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s62
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s83
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s82
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s63
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s61
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s70
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s80
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s71
; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s9
-; VI-NEXT: v_mov_b32_e32 v20, vcc_lo
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s84
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s72
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s81
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s83
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s82
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s63
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s61
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s70
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s80
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s71
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s60
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s67
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s69
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s68
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s66
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s56
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, vcc_lo
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s67
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s59
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s69
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s66
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s52
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s56
; VI-NEXT: v_readlane_b32 s46, v62, 43
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s53
-; VI-NEXT: v_mov_b32_e32 v47, s46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s53
+; VI-NEXT: v_mov_b32_e32 v25, s46
; VI-NEXT: v_readlane_b32 s46, v62, 44
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s51
-; VI-NEXT: v_mov_b32_e32 v58, s46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s51
+; VI-NEXT: v_mov_b32_e32 v61, s46
; VI-NEXT: v_readlane_b32 s46, v62, 45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s46
; VI-NEXT: v_readlane_b32 s46, v62, 46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s46
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s10
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, s30
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s46
; VI-NEXT: v_readlane_b32 s46, v62, 47
; VI-NEXT: v_mov_b32_e32 v6, s4
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s11
-; VI-NEXT: v_mov_b32_e32 v49, s5
+; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: v_readlane_b32 s4, v62, 10
-; VI-NEXT: v_mov_b32_e32 v57, s46
+; VI-NEXT: v_mov_b32_e32 v60, s46
; VI-NEXT: v_readlane_b32 s46, v62, 48
; VI-NEXT: v_readlane_b32 s5, v62, 11
-; VI-NEXT: v_mov_b32_e32 v61, s46
+; VI-NEXT: v_mov_b32_e32 v27, s46
; VI-NEXT: v_readlane_b32 s46, v62, 49
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s46
; VI-NEXT: v_readlane_b32 s46, v62, 50
-; VI-NEXT: v_mov_b32_e32 v34, s46
+; VI-NEXT: v_mov_b32_e32 v11, s46
; VI-NEXT: v_readlane_b32 s46, v62, 51
-; VI-NEXT: v_mov_b32_e32 v42, s46
+; VI-NEXT: v_mov_b32_e32 v7, s46
; VI-NEXT: v_readlane_b32 s46, v62, 52
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s46
+; VI-NEXT: v_mov_b32_e32 v26, s46
; VI-NEXT: v_readlane_b32 s46, v62, 53
-; VI-NEXT: v_mov_b32_e32 v46, s46
+; VI-NEXT: v_mov_b32_e32 v35, s46
; VI-NEXT: v_readlane_b32 s46, v62, 54
-; VI-NEXT: v_mov_b32_e32 v5, s46
+; VI-NEXT: v_mov_b32_e32 v42, s46
; VI-NEXT: v_readlane_b32 s46, v62, 55
-; VI-NEXT: v_mov_b32_e32 v11, s46
+; VI-NEXT: v_mov_b32_e32 v56, s46
; VI-NEXT: v_readlane_b32 s46, v62, 56
-; VI-NEXT: v_mov_b32_e32 v20, s30
; VI-NEXT: v_readlane_b32 s47, v62, 42
-; VI-NEXT: v_mov_b32_e32 v23, s46
+; VI-NEXT: v_mov_b32_e32 v18, s46
; VI-NEXT: v_readlane_b32 s46, v62, 57
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v26, s38
-; VI-NEXT: v_mov_b32_e32 v7, s47
-; VI-NEXT: v_mov_b32_e32 v56, s85
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s12
-; VI-NEXT: v_mov_b32_e32 v60, s57
-; VI-NEXT: v_mov_b32_e32 v16, s46
+; VI-NEXT: v_mov_b32_e32 v32, s87
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s11
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, s34
+; VI-NEXT: v_mov_b32_e32 v29, s47
+; VI-NEXT: v_mov_b32_e32 v44, s85
+; VI-NEXT: v_mov_b32_e32 v23, s46
; VI-NEXT: v_mov_b32_e32 v40, s28
; VI-NEXT: v_mov_b32_e32 v39, s29
; VI-NEXT: v_mov_b32_e32 v54, s26
@@ -161856,32 +161927,41 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_mov_b32_e32 v48, s22
; VI-NEXT: v_mov_b32_e32 v38, s23
; VI-NEXT: v_mov_b32_e32 v36, s20
-; VI-NEXT: v_mov_b32_e32 v35, s21
-; VI-NEXT: v_mov_b32_e32 v33, s18
-; VI-NEXT: v_mov_b32_e32 v32, s19
-; VI-NEXT: v_mov_b32_e32 v30, s16
-; VI-NEXT: v_mov_b32_e32 v29, s17
-; VI-NEXT: v_mov_b32_e32 v28, s40
-; VI-NEXT: v_mov_b32_e32 v55, s41
-; VI-NEXT: v_mov_b32_e32 v37, s42
-; VI-NEXT: v_mov_b32_e32 v41, s44
+; VI-NEXT: v_mov_b32_e32 v37, s21
+; VI-NEXT: v_mov_b32_e32 v34, s18
+; VI-NEXT: v_mov_b32_e32 v4, s19
+; VI-NEXT: v_mov_b32_e32 v33, s16
+; VI-NEXT: v_mov_b32_e32 v47, s17
+; VI-NEXT: v_mov_b32_e32 v55, s40
+; VI-NEXT: v_mov_b32_e32 v43, s41
+; VI-NEXT: v_mov_b32_e32 v58, s42
+; VI-NEXT: v_mov_b32_e32 v57, s43
+; VI-NEXT: v_mov_b32_e32 v46, s44
; VI-NEXT: v_mov_b32_e32 v45, s45
; VI-NEXT: v_mov_b32_e32 v22, s74
; VI-NEXT: v_mov_b32_e32 v24, s76
-; VI-NEXT: v_mov_b32_e32 v20, s52
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s13
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s14
; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s15
+; VI-NEXT: v_mov_b32_e32 v8, s12
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, s36
; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v13, s38
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s14
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v8, s15
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s4
; VI-NEXT: v_readlane_b32 s4, v62, 8
; VI-NEXT: v_readlane_b32 s5, v62, 9
@@ -161900,28 +161980,32 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_mov_b32_e32 v19, s4
; VI-NEXT: .LBB91_6: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v19, v3, v19, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v15, v25, v15, s4
-; VI-NEXT: v_perm_b32 v25, v38, v9, s4
-; VI-NEXT: v_perm_b32 v4, v4, v24, s4
-; VI-NEXT: v_perm_b32 v24, v33, v18, s4
-; VI-NEXT: v_perm_b32 v18, v50, v21, s4
-; VI-NEXT: v_perm_b32 v13, v30, v13, s4
-; VI-NEXT: v_perm_b32 v30, v32, v59, s4
-; VI-NEXT: v_perm_b32 v32, v36, v52, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_perm_b32 v7, v29, v7, s4
-; VI-NEXT: v_perm_b32 v2, v37, v2, s4
-; VI-NEXT: v_or_b32_e32 v4, v13, v4
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
-; VI-NEXT: v_perm_b32 v22, v44, v22, s4
-; VI-NEXT: v_perm_b32 v33, v35, v43, s4
-; VI-NEXT: v_perm_b32 v35, v48, v14, s4
-; VI-NEXT: v_perm_b32 v31, v51, v31, s4
-; VI-NEXT: v_perm_b32 v5, v41, v5, s4
-; VI-NEXT: v_perm_b32 v16, v45, v16, s4
-; VI-NEXT: v_perm_b32 v48, v55, v57, s4
+; VI-NEXT: v_perm_b32 v1, v1, v22, s4
+; VI-NEXT: v_perm_b32 v22, v4, v41, s4
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v30, v33, v31, s4
+; VI-NEXT: v_perm_b32 v20, v20, v24, s4
+; VI-NEXT: v_perm_b32 v24, v47, v29, s4
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v36, v21, s4
+; VI-NEXT: v_perm_b32 v13, v52, v19, s4
+; VI-NEXT: v_perm_b32 v19, v37, v5, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_perm_b32 v16, v34, v16, s4
+; VI-NEXT: v_or_b32_e32 v20, v30, v20
+; VI-NEXT: v_perm_b32 v17, v32, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: v_perm_b32 v15, v49, v15, s4
+; VI-NEXT: v_perm_b32 v28, v48, v59, s4
+; VI-NEXT: v_perm_b32 v14, v38, v14, s4
+; VI-NEXT: v_perm_b32 v9, v51, v9, s4
+; VI-NEXT: v_perm_b32 v23, v45, v23, s4
+; VI-NEXT: v_perm_b32 v2, v58, v2, s4
+; VI-NEXT: v_perm_b32 v26, v57, v26, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -161954,192 +162038,190 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v12, v4, v12, s4
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v10, v29, v10, s4
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v6, v6, v33, s4
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v34, v35, v36, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: v_perm_b32 v31, v40, v31, s4
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v5, v50, v4, s4
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v29, v53, v29, s4
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v8, v33, v8, s4
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v32, v39, v32, s4
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v27, v27, v35, s4
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v25, v25, v36, s4
+; VI-NEXT: v_perm_b32 v35, v55, v61, s4
+; VI-NEXT: v_perm_b32 v36, v43, v60, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v4, v54, v4, s4
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v3, v3, v33, s4
+; VI-NEXT: v_perm_b32 v33, v46, v42, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v20, v30, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_or_b32_e32 v20, v24, v20
+; VI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v3, v12, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v54, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v3, v10, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v53, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v40, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v16, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v22, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v13
+; VI-NEXT: v_or_b32_e32 v1, v21, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v3, v17, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v13, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v19, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v15
+; VI-NEXT: v_or_b32_e32 v1, v28, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v36, v39, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v29, v46, v38, s4
-; VI-NEXT: v_perm_b32 v6, v6, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v38, v28, v58, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v37, v61, v37, s4
-; VI-NEXT: v_perm_b32 v8, v3, v8, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_perm_b32 v39, v47, v27, s4
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v3, v49, v3, s4
+; VI-NEXT: v_perm_b32 v1, v13, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v12
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v13, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v7, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v22
-; VI-NEXT: v_or_b32_e32 v4, v24, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v7, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v30, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v19
-; VI-NEXT: v_or_b32_e32 v4, v32, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v9, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v10
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v7, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v33, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v15
-; VI-NEXT: v_or_b32_e32 v4, v35, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v7, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v25, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v12
-; VI-NEXT: v_or_b32_e32 v4, v31, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v7, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v18, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v10
-; VI-NEXT: v_or_b32_e32 v4, v9, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v4, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v29, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v17
+; VI-NEXT: v_or_b32_e32 v1, v31, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v7, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v21, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v17
-; VI-NEXT: v_or_b32_e32 v4, v26, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v7, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v36, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; VI-NEXT: v_or_b32_e32 v4, v6, v4
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v6, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v29
-; VI-NEXT: v_or_b32_e32 v3, v5, v3
-; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v3, v23, v11, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v3, v16, v3
-; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_perm_b32 v2, v42, v34, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v4, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v32, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v8
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v4, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_or_b32_e32 v1, v33, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v1, v18, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v23, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v27
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_perm_b32 v1, v7, v11, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v26, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
-; VI-NEXT: v_or_b32_e32 v1, v38, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v25
+; VI-NEXT: v_or_b32_e32 v1, v35, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v48, v1
+; VI-NEXT: v_or_b32_e32 v1, v36, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v20, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -162147,24 +162229,24 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -162172,12 +162254,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -162185,11 +162267,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -162197,12 +162279,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -162210,10 +162292,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v60, v56, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v2, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -162232,8 +162316,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -162242,8 +162326,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -162622,1106 +162706,1126 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: s_cbranch_scc1 .LBB91_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_and_b32 s46, s45, 0xffff0000
-; GFX9-NEXT: v_mov_b32_e32 v22, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v1, s46, v22
+; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v1, s46, v3
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc
; GFX9-NEXT: s_lshl_b32 s45, s45, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s45, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s45, v3
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; GFX9-NEXT: s_and_b32 s45, s44, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v1, s45, v22
-; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s45, v3
+; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v1
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
; GFX9-NEXT: s_lshl_b32 s44, s44, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s44, v22
-; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
-; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s44, v3
+; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v1
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6
; GFX9-NEXT: s_and_b32 s44, s43, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v3, s44, v22
-; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s44, v3
+; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s43, s43, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s43, v22
-; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s43, v3
+; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v7
; GFX9-NEXT: s_and_b32 s43, s42, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v3, s43, v22
-; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v6, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s43, v3
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc
; GFX9-NEXT: s_lshl_b32 s42, s42, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s42, v22
-; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s42, v3
+; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v7
+; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v8
; GFX9-NEXT: s_and_b32 s42, s41, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v5, s42, v22
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s42, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s41, s41, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s41, v22
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s41, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s41, s40, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v6, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v5, s41, v22
-; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v13, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s41, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s40, s40, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s40, v22
-; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s40, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v5
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v9
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s40, s13, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v5, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s40, v22
-; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_or_b32_sdwa v12, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s40, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s13, s13, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s13, v22
-; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
-; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s13, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v8, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s13, v22
-; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v9, v9, v7
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v10, vcc
+; GFX9-NEXT: v_or_b32_sdwa v15, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s13, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s12, s12, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v22
-; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v9, v9, v7
-; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v10, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v11
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s12, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s12, s15, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v7, v7, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s12, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v14, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s12, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s12, s15, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s12, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s12, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s12, s14, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v14, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s12, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v19, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s12, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s12, s14, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s12, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s12, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v13, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s12, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v18, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s12, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s11, s11, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s11, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s11, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v19, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s11, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v21, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s11, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s10, s10, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s10, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s10, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v18, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s10, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v20, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s10, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s9, s9, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s9, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s9, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v21, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s9, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v23, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s9, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s8, s8, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s8, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s8, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v20, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s8, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v22, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s8, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s7, s7, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s7, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s7, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v25, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s7, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v25, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s7, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s6, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v24, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v24, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s17, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v27, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v36, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s16, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v15
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v26, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v35, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s19, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v29, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v52, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s18, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v28, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v51, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s21, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v51, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v54, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s20, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v50, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v53, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s23, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v57
; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v41, v9, v60 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v41, v4, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v4
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s6, s22, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v4
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v7
; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v40, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v40, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v10, vcc
; GFX9-NEXT: s_lshl_b32 s6, s25, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v11, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v10
; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v43, v9, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v43, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
; GFX9-NEXT: s_lshl_b32 s6, s24, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v26
; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v42, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v42, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
; GFX9-NEXT: s_lshl_b32 s6, s27, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v26
; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v45, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v45, v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
; GFX9-NEXT: s_lshl_b32 s6, s26, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v26
; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v44, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v44, v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
; GFX9-NEXT: s_lshl_b32 s6, s29, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v26
; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v47, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v47, v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
; GFX9-NEXT: s_lshl_b32 s6, s28, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v26
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v46, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s6, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v46, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s5, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX9-NEXT: v_add_f32_e32 v4, s5, v3
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v26
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v56, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v9, s5, v22
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
+; GFX9-NEXT: v_or_b32_sdwa v56, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v4, s5, v3
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v4
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
; GFX9-NEXT: s_lshl_b32 s4, s4, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v9, s4, v22
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v10, v10, v9
-; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v57
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v55, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[24:25]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[20:21]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[18:19]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v9, v16, vcc
+; GFX9-NEXT: v_add_f32_e32 v3, s4, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v16, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v3
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v55, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[24:25]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[22:23]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[20:21]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v56
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v56
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v55
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v47
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v47
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v46
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v25
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v25
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v24
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v21
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v21
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v20
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v19
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v19
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v18
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v14
-; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[44:45]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v14
-; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[55:56]
-; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[42:43]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[46:47]
-; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[40:41]
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[28:29]
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v8
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[26:27]
-; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v28
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v26
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v24, v23
-; GFX9-NEXT: v_mov_b32_e32 v3, v16
-; GFX9-NEXT: v_mov_b32_e32 v21, v17
-; GFX9-NEXT: v_mov_b32_e32 v26, v60
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[50:51]
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v12, v15
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v41
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[12:13]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v56
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v56
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v55
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v47
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v47
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v46
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v45
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v45
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v44
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v43
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v25
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v25
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v24
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v23
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v23
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v22
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v21
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v21
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v20
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v19
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v19
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v18
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v15
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v15
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v14
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[55:56]
+; GFX9-NEXT: v_lshrrev_b64 v[29:30], 24, v[46:47]
+; GFX9-NEXT: v_lshrrev_b64 v[32:33], 24, v[44:45]
+; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[51:52]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v13
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[42:43]
+; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[35:36]
+; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v13
+; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[40:41]
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v35
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v13, v17
+; GFX9-NEXT: v_mov_b32_e32 v1, v57
+; GFX9-NEXT: v_mov_b32_e32 v12, v11
+; GFX9-NEXT: v_mov_b32_e32 v15, v8
+; GFX9-NEXT: v_mov_b32_e32 v14, v61
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[53:54]
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v5
+; GFX9-NEXT: v_mov_b32_e32 v21, v10
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v53
; GFX9-NEXT: s_branch .LBB91_6
; GFX9-NEXT: .LBB91_5:
; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s28
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s29
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s26
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s27
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s24
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s8
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s9
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s10
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s11
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s14
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s15
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s12
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s13
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s56
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s50
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s51
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s99
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s47
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s86
-; GFX9-NEXT: v_mov_b32_e32 v4, s83
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s96
; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s69
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v7, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s82
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s68
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: v_mov_b32_e32 v10, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s81
-; GFX9-NEXT: v_mov_b32_e32 v11, s4
+; GFX9-NEXT: v_mov_b32_e32 v5, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s67
-; GFX9-NEXT: v_mov_b32_e32 v56, s4
+; GFX9-NEXT: v_mov_b32_e32 v28, s4
+; GFX9-NEXT: v_mov_b32_e32 v27, s78
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s88
+; GFX9-NEXT: v_mov_b32_e32 v2, s83
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s69
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s82
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s68
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s81
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s67
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s80
-; GFX9-NEXT: v_mov_b32_e32 v12, s4
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s80
+; GFX9-NEXT: v_mov_b32_e32 v39, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s66
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s71
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s66
+; GFX9-NEXT: v_mov_b32_e32 v34, s4
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s71
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
-; GFX9-NEXT: v_mov_b32_e32 v4, s41
-; GFX9-NEXT: v_mov_b32_e32 v25, s4
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s65
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: v_mov_b32_e32 v59, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
-; GFX9-NEXT: v_mov_b32_e32 v61, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: v_mov_b32_e32 v32, s4
-; GFX9-NEXT: v_mov_b32_e32 v31, s78
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v31, s88
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
-; GFX9-NEXT: v_mov_b32_e32 v35, s4
+; GFX9-NEXT: v_mov_b32_e32 v50, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: v_mov_b32_e32 v22, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v31, s90
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v60, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v55, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v31, s92
-; GFX9-NEXT: v_mov_b32_e32 v4, s53
-; GFX9-NEXT: v_mov_b32_e32 v49, s4
+; GFX9-NEXT: v_mov_b32_e32 v3, s53
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s64
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v31, s94
-; GFX9-NEXT: v_mov_b32_e32 v54, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s64
+; GFX9-NEXT: v_mov_b32_e32 v41, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s46
-; GFX9-NEXT: v_mov_b32_e32 v50, s4
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s90
+; GFX9-NEXT: v_mov_b32_e32 v3, s46
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s38
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s38
+; GFX9-NEXT: v_mov_b32_e32 v58, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s49
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s49
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s5
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 31
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s48
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s48
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s28
; GFX9-NEXT: v_mov_b32_e32 v43, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 32
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s87
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s87
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s29
; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s98
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s98
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s26
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s97
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s97
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s27
+; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s70
-; GFX9-NEXT: v_mov_b32_e32 v58, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 36
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s85
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s70
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s6
; GFX9-NEXT: v_mov_b32_e32 v44, s4
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s57
+; GFX9-NEXT: v_readlane_b32 s4, v62, 36
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s85
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s7
+; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s57
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s8
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s9
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s10
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 40
-; GFX9-NEXT: v_mov_b32_e32 v29, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s11
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 41
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s92
+; GFX9-NEXT: v_mov_b32_e32 v1, s14
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s15
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: v_mov_b32_e32 v6, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s12
+; GFX9-NEXT: v_mov_b32_e32 v24, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: v_mov_b32_e32 v5, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s13
+; GFX9-NEXT: v_mov_b32_e32 v23, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s56
+; GFX9-NEXT: v_mov_b32_e32 v20, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: v_mov_b32_e32 v8, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s50
+; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s51
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: v_mov_b32_e32 v19, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s99
+; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 2
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s47
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s41
; GFX9-NEXT: v_readlane_b32 s5, v62, 3
-; GFX9-NEXT: v_mov_b32_e32 v31, vcc_lo
-; GFX9-NEXT: v_mov_b32_e32 v30, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s86
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s65
+; GFX9-NEXT: v_mov_b32_e32 v26, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v3, s25
-; GFX9-NEXT: v_mov_b32_e32 v21, s22
-; GFX9-NEXT: v_mov_b32_e32 v26, s23
-; GFX9-NEXT: v_mov_b32_e32 v27, s20
-; GFX9-NEXT: v_mov_b32_e32 v7, s21
-; GFX9-NEXT: v_mov_b32_e32 v14, s18
-; GFX9-NEXT: v_mov_b32_e32 v28, s19
-; GFX9-NEXT: v_mov_b32_e32 v2, s16
-; GFX9-NEXT: v_mov_b32_e32 v13, s17
-; GFX9-NEXT: v_mov_b32_e32 v57, s55
-; GFX9-NEXT: v_mov_b32_e32 v24, s84
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v16, s42
-; GFX9-NEXT: v_mov_b32_e32 v17, s52
-; GFX9-NEXT: v_mov_b32_e32 v46, s43
-; GFX9-NEXT: v_mov_b32_e32 v47, s54
-; GFX9-NEXT: v_mov_b32_e32 v60, s44
-; GFX9-NEXT: v_mov_b32_e32 v10, s59
-; GFX9-NEXT: v_mov_b32_e32 v23, s45
-; GFX9-NEXT: v_mov_b32_e32 v9, s39
+; GFX9-NEXT: v_mov_b32_e32 v13, s24
+; GFX9-NEXT: v_mov_b32_e32 v12, s25
+; GFX9-NEXT: v_mov_b32_e32 v15, s22
+; GFX9-NEXT: v_mov_b32_e32 v14, s23
+; GFX9-NEXT: v_mov_b32_e32 v19, s20
+; GFX9-NEXT: v_mov_b32_e32 v25, s21
+; GFX9-NEXT: v_mov_b32_e32 v22, s18
+; GFX9-NEXT: v_mov_b32_e32 v35, s19
+; GFX9-NEXT: v_mov_b32_e32 v36, s16
+; GFX9-NEXT: v_mov_b32_e32 v52, s17
+; GFX9-NEXT: v_mov_b32_e32 v9, s55
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v21, s96
+; GFX9-NEXT: v_mov_b32_e32 v1, s84
+; GFX9-NEXT: v_mov_b32_e32 v18, s40
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v56, s42
+; GFX9-NEXT: v_mov_b32_e32 v61, s52
+; GFX9-NEXT: v_mov_b32_e32 v11, s43
+; GFX9-NEXT: v_mov_b32_e32 v17, s54
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v2, s59
+; GFX9-NEXT: v_mov_b32_e32 v57, s45
+; GFX9-NEXT: v_mov_b32_e32 v31, s39
; GFX9-NEXT: v_readlane_b32 s5, v62, 1
-; GFX9-NEXT: v_mov_b32_e32 v33, s4
-; GFX9-NEXT: v_mov_b32_e32 v36, s58
-; GFX9-NEXT: v_mov_b32_e32 v37, s60
-; GFX9-NEXT: v_mov_b32_e32 v38, s62
-; GFX9-NEXT: v_mov_b32_e32 v48, s72
-; GFX9-NEXT: v_mov_b32_e32 v52, s74
-; GFX9-NEXT: v_mov_b32_e32 v53, s76
-; GFX9-NEXT: v_mov_b32_e32 v31, s30
-; GFX9-NEXT: v_mov_b32_e32 v34, s34
+; GFX9-NEXT: v_mov_b32_e32 v29, s4
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s94
+; GFX9-NEXT: v_mov_b32_e32 v32, s58
+; GFX9-NEXT: v_mov_b32_e32 v33, s60
+; GFX9-NEXT: v_mov_b32_e32 v37, s62
+; GFX9-NEXT: v_mov_b32_e32 v38, s72
+; GFX9-NEXT: v_mov_b32_e32 v48, s74
+; GFX9-NEXT: v_mov_b32_e32 v49, s76
+; GFX9-NEXT: v_mov_b32_e32 v30, s34
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, vcc_lo
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s30
; GFX9-NEXT: .LBB91_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v12, v12, v53, s4
-; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_e32 v2, v2, v12
-; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v37, s4
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v5, v5, v48, s4
+; GFX9-NEXT: v_perm_b32 v22, v22, v43, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: v_or_b32_e32 v5, v22, v5
+; GFX9-NEXT: v_perm_b32 v22, v28, v40, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_perm_b32 v16, v16, v38, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v10, v10, v58, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: v_perm_b32 v39, v39, v49, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v30, s4
+; GFX9-NEXT: v_perm_b32 v26, v61, v27, s4
+; GFX9-NEXT: v_perm_b32 v27, v36, v46, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v39
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v30, v57, v30, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v34, s4
-; GFX9-NEXT: v_perm_b32 v17, v17, v31, s4
+; GFX9-NEXT: v_or_b32_e32 v27, v27, v30
+; GFX9-NEXT: v_perm_b32 v30, v34, v44, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_readlane_b32 s30, v63, 34
; GFX9-NEXT: v_readlane_b32 s31, v63, 35
; GFX9-NEXT: v_readlane_b32 s99, v63, 33
@@ -163759,152 +163863,136 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v48, v52, v48, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v38, v52, v38, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v37, v52, v37, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v36, v52, v36, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v33, v52, v33, s4
-; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v2, v13, v44, s4
-; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v14, v43, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_perm_b32 v2, v56, v40, s4
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v28, v41, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v27, v50, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v48
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_perm_b32 v2, v15, v42, s4
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v7, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v21, v55, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v38
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_perm_b32 v2, v24, v49, s4
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v26, v54, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v33, v37, v33, s4
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v32, v37, v32, s4
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v29, v37, v29, s4
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: v_perm_b32 v5, v35, v42, s4
+; GFX9-NEXT: v_or_b32_e32 v5, v5, v22
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_perm_b32 v5, v19, v53, s4
+; GFX9-NEXT: v_or_b32_e32 v5, v5, v16
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: v_perm_b32 v5, v25, v54, s4
+; GFX9-NEXT: v_or_b32_e32 v5, v5, v10
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_perm_b32 v5, v15, v55, s4
+; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: v_perm_b32 v5, v14, v41, s4
+; GFX9-NEXT: v_or_b32_e32 v1, v5, v1
+; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen
+; GFX9-NEXT: v_perm_b32 v27, v52, v45, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v37
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v13, v50, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v33
+; GFX9-NEXT: v_or_b32_e32 v27, v27, v30
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
+; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v3, v39, s4
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v12, v60, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v22, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v5, v21, v5, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v36
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v32
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v32, s4
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v61, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v33
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v29
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v9
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_perm_b32 v1, v60, v8, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; GFX9-NEXT: v_perm_b32 v1, v8, v47, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_perm_b32 v2, v9, v18, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v3, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v23, v19, s4
+; GFX9-NEXT: v_perm_b32 v1, v57, v4, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v16, v6, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; GFX9-NEXT: v_perm_b32 v1, v56, v24, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_perm_b32 v2, v47, v5, s4
+; GFX9-NEXT: v_perm_b32 v2, v17, v23, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: v_perm_b32 v1, v46, v4, s4
+; GFX9-NEXT: v_perm_b32 v1, v11, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v20, v29, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v18, v51, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v25, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v6, v2, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163912,12 +164000,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163925,11 +164013,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163937,12 +164025,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163950,11 +164038,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163962,12 +164050,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163975,11 +164063,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -163987,12 +164075,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -164000,11 +164088,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -164012,12 +164100,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -164025,11 +164113,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -164050,8 +164138,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -164061,90 +164149,92 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1
; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:92
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-TRUE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:72
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:12
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:8
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s34, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s35, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s36, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s37, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s38, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s39, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s48, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s49, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s50, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s51, 9
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s52, 10
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s53, 11
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s54, 12
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s55, 13
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s64, 14
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s65, 15
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s66, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s67, 17
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s68, 18
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s69, 19
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s70, 20
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s71, 21
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s80, 22
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s81, 23
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s82, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s83, 25
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s84, 26
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s85, 27
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s86, 28
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s87, 29
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s96, 30
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s97, 31
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s98, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s99, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s100, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s101, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s102, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s103, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s104, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s30, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s31, 8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s34, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s35, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s36, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s37, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s38, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s39, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s48, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s49, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s50, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s51, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s52, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s53, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s54, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s55, 13
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s64, 14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s65, 15
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s66, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s67, 17
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s68, 18
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s69, 19
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s70, 20
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s71, 21
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s80, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s81, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s82, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s83, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s84, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s85, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s86, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s87, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s96, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s97, 31
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s98, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s99, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s100, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s101, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s102, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s103, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s104, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s30, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s31, 8
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
@@ -164161,149 +164251,149 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr79 : SGPR spill to VGPR lane
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78 : SGPR spill to VGPR lane
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 20
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 20
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s21, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s10, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s28, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 21
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 21
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s27, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s27, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s27, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 19
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 19
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s26, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s26, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s25, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 23
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s25, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s25, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s24, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s23, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s23, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 22
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s23, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s22, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s22, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 26
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s20, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s19, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s18, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 27
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s17, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s16, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s3, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 25
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s5, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s5, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 29
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s5, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s4, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s4, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 30
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s7, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s7, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 28
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s6, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 0
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s6, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 17
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 17
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s9, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 1
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s9, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s9, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s8, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 31
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 31
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s41, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s11, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 3
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s40, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s11, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s11, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s10, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 2
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s29, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s13, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s13, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s13, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 5
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s29, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s12, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 18
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 18
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s29, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s12, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 6
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 14
; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s15, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s15, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s15, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s14, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 15
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 15
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s14, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s41, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s41, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 12
; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s40, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 4
; GFX11-TRUE16-NEXT: s_mov_b32 s31, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s42, s72
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 13
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 13
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
; GFX11-TRUE16-NEXT: s_mov_b32 s72, s76
; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 10
; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 11
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[20:21], 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 9
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[18:19], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 7
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[16:17], 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 5
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[2:3], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 3
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 1
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
; GFX11-TRUE16-NEXT: s_mov_b32 s75, s77
; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
@@ -164377,8 +164467,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s43, 1
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
@@ -164388,8 +164478,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s43, 3
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
@@ -164397,8 +164487,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s43, 5
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
@@ -164406,8 +164496,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s43, 7
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
@@ -164415,8 +164505,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s42, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s43, 9
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
@@ -164426,7 +164516,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s44, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s44, 10
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
@@ -164436,14 +164526,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s45, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s45, 11
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s44, 12
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s45, 13
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s44, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s45, 13
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 14
-; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 15
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s74, 14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v79, s75, 15
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
; GFX11-TRUE16-NEXT: .LBB91_3: ; %Flow
; GFX11-TRUE16-NEXT: s_and_b32 s77, s31, exec_lo
@@ -164638,12 +164728,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v81.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v86, v82, 0x5040100
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v54.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v15, v16
@@ -164673,819 +164763,820 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v99, v83, 0x5040100
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v20, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v18, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v102, v97, 0x5040100
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v67.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v20, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v20, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v19, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v113, v100, 0x5040100
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v21, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v21, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v20, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v67.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v103.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v103.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v20, v21
; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v20, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v114.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v112.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v21, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v21, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v118, v116, 0x5040100
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v115.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v83.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v20, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v20, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v129, v117, 0x5040100
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v99.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v55.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v21, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v21, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v112.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v131, v119, 0x5040100
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v20, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v20, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v115.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v54.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v133, v128, 0x5040100
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v21, v20
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v22
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v135, v130, 0x5040100
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v135, v130, 0x5040100
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v55.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v23, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.l, v132.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v21, v24
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v82.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v21, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v132.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v17, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v14
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v27, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v20, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v27, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v15
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v15 :: v_dual_add_nc_u32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v23, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v13
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v13, v15, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v27, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v17, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v27, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v15 :: v_dual_add_nc_u32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v23, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v13
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v13, v15, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v27, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v21
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v16 :: v_dual_add_nc_u32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, v27, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v20, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v14 :: v_dual_add_nc_u32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, v23, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v16, vcc_lo
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, v21, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v14
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v13, 16, 1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v20 :: v_dual_add_nc_u32 v20, 0x7fff, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v164.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v43.l, v149.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v20, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v22, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v16 :: v_dual_add_nc_u32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v43, v162, v149, 0x5040100
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v20, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v17, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, v21, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v16, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v21, v28, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v14, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v14, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v17, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v20, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, 0x400000, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 16, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v163.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v21, v27, v28, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v44, v177, v176, 0x5040100
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v43.h, v162.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v181, v178, v166, 0x5040100
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v20, v29, vcc_lo
+; GFX11-TRUE16-NEXT: v_perm_b32 v45, v164, v163, 0x5040100
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v23, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: v_perm_b32 v42, v165, v161, 0x5040100
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v20
; GFX11-TRUE16-NEXT: v_perm_b32 v41, v151, v144, 0x5040100
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v25, vcc_lo
; GFX11-TRUE16-NEXT: v_perm_b32 v40, v160, v148, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v180, v179, v167, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v101, v98, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v96, v87, 0x5040100
; GFX11-TRUE16-NEXT: v_perm_b32 v51, v147, v134, 0x5040100
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v16
; GFX11-TRUE16-NEXT: v_perm_b32 v50, v150, v145, 0x5040100
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[180:181]
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v85, v84, 0x5040100
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.h, v146.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[44:45]
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v101, v98, 0x5040100
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.h, v146.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v182, v178, v166, 0x5040100
+; GFX11-TRUE16-NEXT: v_perm_b32 v181, v179, v167, 0x5040100
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v71, v70, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v102, v97, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v113, v100, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v131, v119, 0x5040100
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v133, v128, 0x5040100
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[42:43]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[40:41]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v43
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v43
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v42
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v40
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[50:51]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v86.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v96, v87, 0x5040100
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v118, v116, 0x5040100
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v129, v117, 0x5040100
+; GFX11-TRUE16-NEXT: v_perm_b32 v44, v177, v176, 0x5040100
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[42:43]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 24, v43
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v43
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[40:41]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[26:27]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[181:182]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[48:49]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[38:39]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[18:19]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v180
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v45
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v45
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v50
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v39
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v39
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v38
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[32:33]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[44:45]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[33:34]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v51
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 24, v181
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v181
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v44
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v41
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v41
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v33
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v33
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v182
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 8, v182
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v181
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v44
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v42
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v40
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 24, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v19
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 24, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, v74 :: v_dual_mov_b32 v40, v73
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, v74 :: v_dual_mov_b32 v40, v75
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v73
; GFX11-TRUE16-NEXT: s_branch .LBB91_6
; GFX11-TRUE16-NEXT: .LBB91_5:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s17 :: v_dual_mov_b32 v117, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 16
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s1 :: v_dual_mov_b32 v97, s7
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s26 :: v_dual_mov_b32 v166, s27
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 17
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v176, s24 :: v_dual_mov_b32 v163, s25
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s22 :: v_dual_mov_b32 v148, s20
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s29 :: v_dual_mov_b32 v149, s23
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v144, s21 :: v_dual_mov_b32 v145, s18
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s19 :: v_dual_mov_b32 v53, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 19
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s16 :: v_dual_mov_b32 v119, s3
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v128, s2 :: v_dual_mov_b32 v103, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s65
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s4 :: v_dual_mov_b32 v83, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s6 :: v_dual_mov_b32 v87, s10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s8 :: v_dual_mov_b32 v179, s61
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s11 :: v_dual_mov_b32 v177, s45
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v181, s71 :: v_dual_mov_b32 v112, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s9 :: v_dual_mov_b32 v100, s6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s10 :: v_dual_mov_b32 v44, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s55 :: v_dual_mov_b32 v98, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v179, s61 :: v_dual_mov_b32 v82, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v177, s45 :: v_dual_mov_b32 v42, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 22
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v178, s73 :: v_dual_mov_b32 v165, s56
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v164, s57 :: v_dual_mov_b32 v151, s42
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 23
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 23
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v162, s60 :: v_dual_mov_b32 v147, s100
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v160, s104 :: v_dual_mov_b32 v135, s84
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s65 :: v_dual_mov_b32 v150, s98
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v133, s66 :: v_dual_mov_b32 v146, s82
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s98 :: v_dual_mov_b32 v133, s66
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s82 :: v_dual_mov_b32 v131, s68
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s68 :: v_dual_mov_b32 v46, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 25
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s53 :: v_dual_mov_b32 v114, s54
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s51 :: v_dual_mov_b32 v102, s52
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s49 :: v_dual_mov_b32 v96, s72
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s50 :: v_dual_mov_b32 v86, s48
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 27
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s38 :: v_dual_mov_b32 v84, s12
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s13 :: v_dual_mov_b32 v81, s39
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s14 :: v_dual_mov_b32 v71, s36
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v69, s37
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 29
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s40 :: v_dual_mov_b32 v68, s34
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s0 :: v_dual_mov_b32 v18, s59
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 30
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 30
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s28 :: v_dual_mov_b32 v55, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s87 :: v_dual_mov_b32 v182, s83
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v181, s87 :: v_dual_mov_b32 v180, s99
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 31
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s99 :: v_dual_mov_b32 v180, s81
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s97 :: v_dual_mov_b32 v40, s67
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 31
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s97 :: v_dual_mov_b32 v2, s83
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s71 :: v_dual_mov_b32 v182, s81
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s30 :: v_dual_mov_b32 v17, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s43 :: v_dual_mov_b32 v13, s62
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s46
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s55 :: v_dual_mov_b32 v41, s67
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s59 :: v_dual_mov_b32 v25, s30
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s47 :: v_dual_mov_b32 v26, s103
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s44 :: v_dual_mov_b32 v10, s102
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s63 :: v_dual_mov_b32 v18, s62
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s47 :: v_dual_mov_b32 v19, s43
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s69
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s58 :: v_dual_mov_b32 v32, s96
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s101 :: v_dual_mov_b32 v8, s86
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s80
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s85 :: v_dual_mov_b32 v6, s70
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s76 :: v_dual_mov_b32 v23, s92
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s44 :: v_dual_mov_b32 v12, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s58 :: v_dual_mov_b32 v32, s103
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s0 :: v_dual_mov_b32 v39, s64
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s101 :: v_dual_mov_b32 v10, s102
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s85 :: v_dual_mov_b32 v8, s86
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s78 :: v_dual_mov_b32 v3, s94
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v1, vcc_lo
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s96 :: v_dual_mov_b32 v34, s80
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s69 :: v_dual_mov_b32 v6, s70
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s64
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s88 :: v_dual_mov_b32 v2, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 14
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 15
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 12
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s76 :: v_dual_mov_b32 v21, s92
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s88 :: v_dual_mov_b32 v3, s94
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v1, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s74
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s78 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 13
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 11
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 10
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 11
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 9
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 7
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 7
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 5
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 3
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 3
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v79, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v79, 1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s0
; GFX11-TRUE16-NEXT: .LBB91_6: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v129, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v36, v133, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v129, v36, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v117, v117, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v62, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v129, v116, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v133, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; GFX11-TRUE16-NEXT: v_perm_b32 v116, v131, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v150, v30, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118
; GFX11-TRUE16-NEXT: v_perm_b32 v128, v128, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v146, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v119, v119, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v116
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v117, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v117, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v146, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v135, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v145, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v129, v118
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v118, v128, v36
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v135, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v150, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v128, v147, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v36, v132, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v160, v30, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v119, v119, v131
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v118, v128, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v132, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX11-TRUE16-NEXT: v_perm_b32 v129, v130, v56, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
-; GFX11-TRUE16-NEXT: v_perm_b32 v130, v145, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v131, v134, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v147, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v51, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v160, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v151, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v165, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v119, v119, v60, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v128
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v36, v35
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v148, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v165, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v35, v31
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v129, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v148, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v144, v43, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v129, v48
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v130, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v161, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v28
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v177, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v119, v119, v131
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v134, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v35, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v51
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v176, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v179, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v132
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v161, v41, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v71, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v164, v2, 0xc0c0004
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[116:119], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v35, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v162, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v151, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v118, v48, v29
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v149, v183, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v71, v23, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v96, v21, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v36, v144, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v70, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v119, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v178, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v85, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v167, v181, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v87, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v101, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v36, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v178, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v70, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v85, v20, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v36, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v177, v28, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v164, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v166, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v53, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v96, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v163, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v118, v118, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v53, v50, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v84, v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v81, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v98, v11, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v21
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v99, v25, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v179, v27, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v176, v181, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v36, v163, v180, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v55, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v68, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v81, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v87, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v101, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v162, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v51, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v166, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v52, v4, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v65, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v69, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v86, v26, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v113, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v80, v8, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v102, v19, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v115, v15, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v114, v24, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v167, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v27
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v35, v28
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v36, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v54, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v86, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v98, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v99, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v149, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v55, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v68, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v119, v2, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v65, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v69, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v82, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v113, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v100, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v102, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v115, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v35, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v54, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v67, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v67, v48, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v2
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v64, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v66, v6, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v80, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v82, v10, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v66, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v83, v12, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v100, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v97, v14, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v112, v18, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v97, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v112, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v17, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v48, v49
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v34, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v35, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v31
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v33
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v18, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v35, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v36, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v19, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v21, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v20
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[116:119], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[28:31], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[116:119], off offset:48
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:72
-; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v76, 7
-; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v76, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v76, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v76, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v76, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v76, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v76, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v76, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v76, 0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v75, 31
-; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v75, 30
-; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v75, 29
-; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v75, 28
-; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v75, 27
-; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v75, 26
-; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v75, 25
-; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v75, 24
-; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v75, 23
-; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v75, 22
-; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v75, 21
-; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v75, 20
-; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v75, 19
-; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v75, 18
-; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v75, 17
-; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v75, 16
-; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v75, 15
-; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v75, 14
-; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v75, 13
-; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v75, 12
-; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v75, 11
-; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v75, 10
-; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v75, 9
-; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v75, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v75, 7
-; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v75, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v75, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v75, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v75, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v75, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v75, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v75, 0
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:76
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v77, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v77, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v77, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v77, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v77, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v77, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v77, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v77, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v77, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v76, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v76, 30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v76, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v76, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v76, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v76, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v76, 25
+; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v76, 24
+; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v76, 23
+; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v76, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v76, 21
+; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v76, 20
+; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v76, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v76, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v76, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v76, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v76, 15
+; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v76, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v76, 13
+; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v76, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v76, 11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v76, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v76, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v76, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v76, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v76, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v76, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v76, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v76, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v76, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v76, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v76, 0
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1
; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:92
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -165495,92 +165586,94 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:88
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v79, s32 offset:92
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v88, s32 offset:96
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:76
+; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:8
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:4
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s34, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s35, 1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s36, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s37, 3
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s38, 4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s39, 5
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s48, 6
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s49, 7
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s50, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s51, 9
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s52, 10
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s53, 11
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s54, 12
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s55, 13
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s64, 14
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s65, 15
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s66, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s67, 17
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s68, 18
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s69, 19
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s70, 20
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s71, 21
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s80, 22
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s81, 23
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s82, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s83, 25
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s84, 26
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s85, 27
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s86, 28
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s87, 29
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s96, 30
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s97, 31
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s98, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s99, 1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s100, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s101, 3
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s102, 4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s103, 5
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s104, 6
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s30, 7
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s31, 8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s31, 8
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
@@ -165597,149 +165690,149 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr88 : SGPR spill to VGPR lane
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr79 : SGPR spill to VGPR lane
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr78 : SGPR spill to VGPR lane
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB91_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 20
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s10, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s28, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 21
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s27, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s27, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s27, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 19
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s26, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s26, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s25, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 23
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s25, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s24, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s23, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s23, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 22
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s23, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s22, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s22, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 26
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s20, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s19, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s18, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 27
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s17, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s16, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s3, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 25
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s2, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s5, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 29
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s5, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s4, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s4, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 30
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s7, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s7, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 28
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s6, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 0
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s6, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 17
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s9, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 1
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s9, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s9, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s8, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 31
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s11, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 3
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s40, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s11, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s11, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s10, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 2
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s13, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s13, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s13, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 5
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s12, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 18
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s12, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 6
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 14
; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s15, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s15, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s15, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s14, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 15
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s14, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s41, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s41, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 12
; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s40, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 4
; GFX11-FAKE16-NEXT: s_mov_b32 s31, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s42, s72
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 13
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
; GFX11-FAKE16-NEXT: s_mov_b32 s72, s76
; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 10
; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 11
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[20:21], 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 9
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[18:19], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 6
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 7
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[16:17], 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 5
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[2:3], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 3
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 1
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
; GFX11-FAKE16-NEXT: s_mov_b32 s75, s77
; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
@@ -165813,8 +165906,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s43, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s43, 1
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
@@ -165824,8 +165917,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s43, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s43, 3
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
@@ -165833,8 +165926,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s43, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s43, 5
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
@@ -165842,8 +165935,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 6
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s43, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s43, 7
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
@@ -165851,8 +165944,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s42, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s43, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s42, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s43, 9
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
@@ -165862,7 +165955,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s44, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s44, 10
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
@@ -165872,14 +165965,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s45, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s45, 11
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s44, 12
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s45, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s44, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s45, 13
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s74, 14
-; GFX11-FAKE16-NEXT: v_writelane_b32 v79, s75, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s74, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v88, s75, 15
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
; GFX11-FAKE16-NEXT: .LBB91_3: ; %Flow
; GFX11-FAKE16-NEXT: s_and_b32 s77, s31, exec_lo
@@ -166081,870 +166174,870 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v67, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v13, v10, v17 :: v_dual_add_nc_u32 v12, v15, v16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v17, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v15, v16
; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s8
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v16
; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v17, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v12, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v12
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v17
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v16, v17
; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
; GFX11-FAKE16-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s6, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v81
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v12, v19 :: v_dual_add_nc_u32 v14, v17, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v84, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v19, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s6
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
; GFX11-FAKE16-NEXT: s_and_b32 s6, s5, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v18, v17
; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-FAKE16-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v20, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v71
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v19, v20
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v69
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v80, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v86
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v17, v20
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s4
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v17, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s4, s1, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v20, v21
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v16, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v22, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v81
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v84, 16, v9
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v96, 16, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v17
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v20, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s1, s0, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v86
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v70, 16, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v82
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v17, v20
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v17, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v82
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v87
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v98, 16, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v97
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v17
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v102, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v87
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v20, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v101, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v99
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v101, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v99
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v17, v20
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v112, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v100
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v113, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v103
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v112, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v100
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v114, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v115
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v33, v113, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v103
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v32, v114, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v17
; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v32, v118, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v116
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v118, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v116
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v129, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v117
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v130, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v22
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v129, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v117
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v49, v130, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v17, v20
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v119
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v23, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v119
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v21, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v17, vcc_lo
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v133, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v24
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v48, v133, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v16, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v22, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v20, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v15, v20
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v10, v10, v17 :: v_dual_add_nc_u32 v11, v11, v16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v128
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v128
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v132
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v51, v134, 16, v21
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v98, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v50, v144, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v15, v19, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v132
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v51, v134, 16, v17
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v85, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v50, v144, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v11, v15, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v97
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[48:49]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v131
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v131
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v146, 16, v16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v17, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v11, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, v20, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v21, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v146, 16, v20
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v21, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v22, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v23, v19
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v16, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v11
; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v14
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v22, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v20, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v53
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v80, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v21, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v145
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v83
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v17, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v54, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v145
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v135
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v148, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v13
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v148, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v22, v20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v20, v16
; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v24, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v22, v17
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v69
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v18
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v23 :: v_dual_add_nc_u32 v15, v15, v20
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v149
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v147
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v149
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v14
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v10, v10, v21 :: v_dual_add_nc_u32 v11, v11, v16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v42, v162, 16, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v147
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v150, 16, v19
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v161, 16, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v43
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v161, 16, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v45
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v21, v14
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v55
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, v17, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v14, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v23, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v24, v18
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v27, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v11
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v16, v17, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v21, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, v22, v14
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v23, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v14
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v27
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v11, v23
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v16, v17, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v23
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v22, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v24
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v17, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v17, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v23, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v27, v21
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v29, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v23, v17
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v25, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v14, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v17, v20, v28, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v18, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v28, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v22, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v24, v24, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v27, v33, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v151
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v24
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v21
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v18, v29, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v53
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v23
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v160
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v14
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v22, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v54, 16, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v55
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v163
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v164
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v18
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v166
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v22, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v17
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v23, v29, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v151
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v160
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v164
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v163
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v47, v167, 16, v16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v165, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[42:43]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v166
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v177, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v44
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v150, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v178, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v176, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[18:19]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[180:181]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[46:47]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[44:45]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v43
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v42
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, v76
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v64, 16, v3
; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v66
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v47, v167, 16, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v165, 16, v21
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v176, 16, v18
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v102, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v96, 16, v9
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v68, 16, v3
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v85, 16, v7
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v70, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v177, 16, v14
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v179, v178, 16, v15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v42, v162, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[46:47]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[44:45]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[40:41]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v45
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v44
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v43
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v40
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[50:51]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[40:41]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[37:38]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v37
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[32:33]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[12:13]
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v68, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[179:180]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[42:43]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[50:51]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[26:27]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v51
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 24, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v47
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v47
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v46
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v43
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v42
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v180
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 24, v47
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v47
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v46
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v41
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v41
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 24, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v40
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 24, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 24, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, v40
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v42, v75 :: v_dual_mov_b32 v41, v74
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, v75
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, v73
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, v74
; GFX11-FAKE16-NEXT: s_branch .LBB91_6
; GFX11-FAKE16-NEXT: .LBB91_5:
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v145, s18 :: v_dual_mov_b32 v116, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 16
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s1 :: v_dual_mov_b32 v178, s61
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v164, s26 :: v_dual_mov_b32 v163, s27
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v129, s0 :: v_dual_mov_b32 v112, s51
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 17
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s60 :: v_dual_mov_b32 v166, s24
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v151, s25 :: v_dual_mov_b32 v160, s22
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v147, s23 :: v_dual_mov_b32 v118, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 18
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, s29
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v149, s20 :: v_dual_mov_b32 v132, s16
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v135, s21 :: v_dual_mov_b32 v128, s17
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v52, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v131, s19 :: v_dual_mov_b32 v100, s5
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v119, s2 :: v_dual_mov_b32 v82, s9
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 20
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s65
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s65 :: v_dual_mov_b32 v131, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s5 :: v_dual_mov_b32 v119, s2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s9 :: v_dual_mov_b32 v43, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 20
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v117, s3 :: v_dual_mov_b32 v86, s10
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v103, s4 :: v_dual_mov_b32 v176, s45
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 21
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s6 :: v_dual_mov_b32 v162, s104
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s7 :: v_dual_mov_b32 v148, s42
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 22
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s8 :: v_dual_mov_b32 v150, s98
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s11 :: v_dual_mov_b32 v146, s100
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 23
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v177, s73 :: v_dual_mov_b32 v144, s82
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v167, s57 :: v_dual_mov_b32 v134, s84
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 24
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v165, s56 :: v_dual_mov_b32 v130, s68
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v133, s66 :: v_dual_mov_b32 v114, s53
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 25
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v113, s54 :: v_dual_mov_b32 v102, s49
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v101, s52 :: v_dual_mov_b32 v98, s50
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 26
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s72 :: v_dual_mov_b32 v85, s38
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s48 :: v_dual_mov_b32 v83, s12
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 27
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s13 :: v_dual_mov_b32 v80, s39
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s14 :: v_dual_mov_b32 v70, s36
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 28
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v66, s40
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s37 :: v_dual_mov_b32 v68, s34
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 29
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s41 :: v_dual_mov_b32 v64, s35
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s28 :: v_dual_mov_b32 v54, s75
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 30
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v179, s87 :: v_dual_mov_b32 v36, s97
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s99 :: v_dual_mov_b32 v182, s83
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v180, s87 :: v_dual_mov_b32 v179, s99
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s97 :: v_dual_mov_b32 v183, s83
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 31
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v181, s71 :: v_dual_mov_b32 v180, s81
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 31
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v182, s71 :: v_dual_mov_b32 v181, s81
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s55 :: v_dual_mov_b32 v40, s67
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 0
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s59 :: v_dual_mov_b32 v15, s63
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s30 :: v_dual_mov_b32 v25, s47
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v72, s0 :: v_dual_mov_b32 v17, s59
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v21, s30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s63 :: v_dual_mov_b32 v26, s62
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s47 :: v_dual_mov_b32 v18, s44
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 1
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s62 :: v_dual_mov_b32 v17, s43
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s44 :: v_dual_mov_b32 v26, s58
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s43 :: v_dual_mov_b32 v12, s101
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s58 :: v_dual_mov_b32 v32, s103
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 2
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s46 :: v_dual_mov_b32 v9, s101
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s103 :: v_dual_mov_b32 v7, s85
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s46 :: v_dual_mov_b32 v8, s86
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s102 :: v_dual_mov_b32 v6, s70
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v50, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 3
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v32, s80
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s102 :: v_dual_mov_b32 v31, s96
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s86 :: v_dual_mov_b32 v5, s69
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v37, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 4
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, s70
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s76 :: v_dual_mov_b32 v21, s92
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v3, s94
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v49, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v33, s96
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s85 :: v_dual_mov_b32 v48, s64
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s74 :: v_dual_mov_b32 v10, s76
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v38, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s69 :: v_dual_mov_b32 v14, s78
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s88 :: v_dual_mov_b32 v16, s90
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s94 :: v_dual_mov_b32 v50, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s92 :: v_dual_mov_b32 v1, vcc_lo
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v51, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 5
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v1, vcc_lo
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s74
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s88 :: v_dual_mov_b32 v2, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 6
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 14
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s80 :: v_dual_mov_b32 v4, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 15
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v22, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v23, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 12
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 11
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s64 :: v_dual_mov_b32 v27, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 10
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 11
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 8
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 7
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 6
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 7
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v33, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 4
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 5
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v30, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 3
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v34, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 2
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 3
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v35, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v79, 0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v79, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v88, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v88, 1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v48, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v35, s0
; GFX11-FAKE16-NEXT: .LBB91_6: ; %end
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v129, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v133, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v116, v72, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v118, v118, v62, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v129, v115, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; GFX11-FAKE16-NEXT: v_perm_b32 v115, v130, v61, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v133, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v116, v116, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-FAKE16-NEXT: v_perm_b32 v119, v119, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v144, v30, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118
; GFX11-FAKE16-NEXT: v_perm_b32 v130, v117, v60, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v133, 16, v115
-; GFX11-FAKE16-NEXT: v_perm_b32 v33, v150, v33, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v119, v119, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v116, v48
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v116, v35
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, v119, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v134, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v150, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v119, v128, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v128, v146, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v132, v58, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v162, v28, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, v129, v118
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v144, v34, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, v130, v133
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; GFX11-FAKE16-NEXT: v_perm_b32 v130, v145, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, v119, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v134, v57, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v119, v128, v56, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v128, v146, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v132, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v130, v130, v33
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v162, v29, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v33, v148, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX11-FAKE16-NEXT: v_perm_b32 v131, v131, v46, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v132, 16, v128
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, v35, v34
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v149, v43, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v165, v28, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v135, v42, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v176, v27, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, v119, v48
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, v131, v132
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v160, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, v34, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v149, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v165, v24, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, v119, v35
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v130, v130, v29
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, v131, v132
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v148, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v160, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[115:118], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v34, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, v35, v33
-; GFX11-FAKE16-NEXT: v_perm_b32 v33, v167, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v166, v181, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v178, v23, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v70, v21, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, v48, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v151, v180, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v33
-; GFX11-FAKE16-NEXT: v_perm_b32 v119, v164, v179, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v30, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v161, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v135, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v176, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, v35, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v147, v2, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v178, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v70, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, v34, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v166, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v34, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v177, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v164, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, v2, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v177, v179, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v69, v5, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v85, v20, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v96, v19, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v35, v48
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v119, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v163, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v52, v2, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v83, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v85, v16, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v80, v31, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v86, v9, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v102, v18, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v161, v40, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, v29, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v52, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v96, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v130, v34, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v163, v36, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v23, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v64, v38, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v83, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v80, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v167, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v86, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, v22, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v64, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v16
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v71, v8, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v84, v30, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v97, v11, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v26, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v147, v183, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v84, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v102, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v151, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v54, v1, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v68, v3, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v67, v32, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v55, v37, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v81, v10, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v18
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v112, v14, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v101, v25, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v114, v13, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v113, v24, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, v28, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v53, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v67, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v98, v27, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v55, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v81, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v97, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v16
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v112, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v82, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v101, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v114, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v113, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, v30, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v53, v50, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v66, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v66, v49, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v65, v6, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v82, v12, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v99, v16, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v87, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v13, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v18, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v99, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v87, v25, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v103, v22, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v100, v15, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v28, v1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v29, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v17, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v23, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v103, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v100, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v24, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v28, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v18, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v20, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v22, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v11, v21
; GFX11-FAKE16-NEXT: s_clause 0x5
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[115:118], off offset:32
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:48
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:4
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:8
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:76
-; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v77, 7
-; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v77, 8
-; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v77, 6
-; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v77, 5
-; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v77, 4
-; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v77, 3
-; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v77, 2
-; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v77, 1
-; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v77, 0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v76, 31
-; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v76, 30
-; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v76, 29
-; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v76, 28
-; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v76, 27
-; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v76, 26
-; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v76, 25
-; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v76, 24
-; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v76, 23
-; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v76, 22
-; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v76, 21
-; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v76, 20
-; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v76, 19
-; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v76, 18
-; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v76, 17
-; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v76, 16
-; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v76, 15
-; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v76, 14
-; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v76, 13
-; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v76, 12
-; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v76, 11
-; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v76, 10
-; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v76, 9
-; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v76, 8
-; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v76, 7
-; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v76, 6
-; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v76, 5
-; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v76, 4
-; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v76, 3
-; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v76, 2
-; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v76, 1
-; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v76, 0
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[12:15], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[16:19], off offset:112
+; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v78, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v78, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v78, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v78, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v78, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v78, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v78, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v78, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v78, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v77, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v77, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v77, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v77, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v77, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v77, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v77, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v77, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v77, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v77, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v77, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v77, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v77, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v77, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v77, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v77, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v77, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v77, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v77, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v77, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v77, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v77, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v77, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v77, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v77, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v77, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v77, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v77, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v77, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v77, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v77, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v77, 0
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
; GFX11-FAKE16-NEXT: scratch_load_b32 v78, off, s32 offset:88
; GFX11-FAKE16-NEXT: scratch_load_b32 v79, off, s32 offset:92
+; GFX11-FAKE16-NEXT: scratch_load_b32 v88, off, s32 offset:96
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
@@ -166985,1035 +167078,1003 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v60, v24
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v59, v16
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v46, v8
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v41, v0
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, v22
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v24, v16
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:972 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:388
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16
; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:56
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:48
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:88
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:120
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:184
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v7
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v13
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v15
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v11
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v21
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v23
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v19
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v29
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v27
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v7
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v61, v6
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v8
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v37
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v10
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v4
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v14
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v12
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v20
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v22
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v22
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v18
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v18
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:136
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v28
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v30
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v32
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v32
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v33
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v33
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v34
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v34
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:208
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:204
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v5
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:200
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:240
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:252
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:252
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v4
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(6) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v3
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:228
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:276
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v7
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v5
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:232
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268
-; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v3
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:264
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:272
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v5
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3) expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:264
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:340
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v3
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:260
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v5
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 24, v4
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:340
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:304
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:292
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:300
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:336
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:332
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v14
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:328
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:336
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:324
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:332
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v2
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:376
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v3
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:384
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:292
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v18
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:328
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:368
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:364
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:360
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v16
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v14
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v18
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:352
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:376
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:348
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:372
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:368
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:364
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:360
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:356
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:384
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:380
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v20
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v21
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v5
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:36
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:36
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:100
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:100
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3) expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v6
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v27
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v29
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v13
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v14
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:968 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v26
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:968 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:20
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v33, 8, v8
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:44
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB92_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v41
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v6, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_mov_b32_e32 v61, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v6, v0, v6
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v12, v0, v7
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v13, v7, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
+; SI-NEXT: v_mov_b32_e32 v11, v24
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v15, v7
+; SI-NEXT: v_mov_b32_e32 v17, v33
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v6, v1, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v7, v0, v7
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v14, v0, v10
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v10, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v10, v0, v10
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v16, v0, v11
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v17, v11, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v11, v0, v11
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v19, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v20, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v25, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v21, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v22, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v18, v3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_mov_b32_e32 v3, v42
+; SI-NEXT: v_or_b32_e32 v6, v6, v18
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v13, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v48, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v27, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v42, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:972 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v23, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v12, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v8, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v49, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v24, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v22, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v43, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v49, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v50, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v29, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v27, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v52, v2, v1
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v32, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v28, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v53, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v50, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v34, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v29, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v47, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v36, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v30, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v56, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v52, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v44, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v46, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v33, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v35, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v58, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v34, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v60, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v31, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v53, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v61, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v63, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v35, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v24, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_or_b32_e32 v14, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v36, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v5, v1, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v4, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v54, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v41, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v48, v1, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v37, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v38, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v45, v3, v25
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v59, v25, v59
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v40, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; SI-NEXT: v_or_b32_e32 v1, v0, v25
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; SI-NEXT: v_or_b32_e32 v57, v10, v25
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v39, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v38, v10, v51
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v15, v19, v10
+; SI-NEXT: v_and_b32_e32 v19, 0xff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_or_b32_e32 v19, v28, v19
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v54
+; SI-NEXT: v_or_b32_e32 v33, v10, v23
+; SI-NEXT: v_and_b32_e32 v23, 0xff, v11
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v62
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v39, v10
+; SI-NEXT: v_alignbit_b32 v11, v6, v13, 16
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v20, v20, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v39, 0xff, v39
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v21, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v43, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v28, v25, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v21, v21, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v30, v25, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v23, v23, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v42, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v40, v25, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v62, v25, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v9, v25, v17
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v44, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v16, v25, v3
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_or_b32_e32 v9, v9, v44
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v25
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v37, v25, v3
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v25
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v63, v18, v63
+; SI-NEXT: v_or_b32_e32 v26, v25, v3
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v25
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v5, v5, v18
+; SI-NEXT: v_or_b32_e32 v25, v25, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v55, v39, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v39, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v39, v39, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v51, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v51, v51, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v54, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v54, v54, v3
+; SI-NEXT: v_or_b32_e32 v3, v20, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v27
+; SI-NEXT: v_or_b32_e32 v20, v13, v42
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v21
+; SI-NEXT: v_or_b32_e32 v0, v13, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v8
+; SI-NEXT: v_or_b32_e32 v21, v13, v49
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v8, v13, v22
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v43
+; SI-NEXT: v_or_b32_e32 v43, v13, v50
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v28
+; SI-NEXT: v_alignbit_b32 v17, v20, v12, 16
+; SI-NEXT: v_or_b32_e32 v12, v13, v29
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v30
+; SI-NEXT: v_or_b32_e32 v30, v23, v32
+; SI-NEXT: v_alignbit_b32 v27, v43, v29, 16
+; SI-NEXT: v_alignbit_b32 v22, v21, v22, 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v32, v26, v18
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v13, v13, v52
+; SI-NEXT: v_alignbit_b32 v23, v13, v32, 16
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v45, v18, v45
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v32, v23, v53
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v28, v23, v34
+; SI-NEXT: v_alignbit_b32 v23, v32, v34, 16
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v26, v47, v18
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v40, v23, v47
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v62
+; SI-NEXT: v_or_b32_e32 v29, v23, v36
+; SI-NEXT: v_alignbit_b32 v23, v40, v36, 16
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v47, v56, v18
-; SI-NEXT: v_or_b32_e32 v56, v2, v58
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v55
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v57, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v62, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v4, v4, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v4, v12
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v31, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v59
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v51, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v60
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v57, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v58, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v62, v18, v0
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v18, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v1, v18, v1
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v9, v18, v9
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v55, v18, v55
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v61
-; SI-NEXT: v_or_b32_e32 v60, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v46, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v61, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v41, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v59, v18, v59
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v6
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v4, v8, v12, 16
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v13
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v31
-; SI-NEXT: v_or_b32_e32 v4, v4, v7
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v12, v4, v14, 16
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v12, v12, v10
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v51
-; SI-NEXT: v_or_b32_e32 v15, v13, v16
-; SI-NEXT: v_alignbit_b32 v13, v12, v16, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v51, v13, v11
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v57
-; SI-NEXT: v_or_b32_e32 v17, v13, v19
-; SI-NEXT: v_alignbit_b32 v13, v51, v19, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v14, v13, v25
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v58
-; SI-NEXT: v_or_b32_e32 v16, v13, v21
-; SI-NEXT: v_alignbit_b32 v13, v14, v21, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v31, v13, v48
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v62
-; SI-NEXT: v_or_b32_e32 v57, v13, v23
-; SI-NEXT: v_alignbit_b32 v13, v31, v23, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v13, v13, v49
-; SI-NEXT: v_alignbit_b32 v0, v13, v27, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28
-; SI-NEXT: v_or_b32_e32 v24, v0, v50
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v24, v29, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v30
-; SI-NEXT: v_or_b32_e32 v21, v0, v52
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v22, v0, v33
-; SI-NEXT: v_alignbit_b32 v0, v21, v33, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v34
-; SI-NEXT: v_or_b32_e32 v19, v0, v53
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v29, v0, v35
-; SI-NEXT: v_alignbit_b32 v0, v19, v35, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v36
-; SI-NEXT: v_or_b32_e32 v23, v0, v54
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v60
-; SI-NEXT: v_or_b32_e32 v20, v0, v37
-; SI-NEXT: v_alignbit_b32 v0, v23, v37, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v38
-; SI-NEXT: v_or_b32_e32 v30, v0, v40
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v46
-; SI-NEXT: v_or_b32_e32 v27, v0, v39
-; SI-NEXT: v_alignbit_b32 v0, v30, v39, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v28, v0, v42
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
-; SI-NEXT: v_or_b32_e32 v34, v0, v44
-; SI-NEXT: v_alignbit_b32 v0, v28, v44, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v63
-; SI-NEXT: v_or_b32_e32 v33, v0, v5
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v41
-; SI-NEXT: v_or_b32_e32 v36, v0, v32
-; SI-NEXT: v_alignbit_b32 v0, v33, v32, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
-; SI-NEXT: v_or_b32_e32 v35, v0, v26
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
-; SI-NEXT: v_or_b32_e32 v38, v0, v47
-; SI-NEXT: v_alignbit_b32 v0, v35, v47, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v56
-; SI-NEXT: v_or_b32_e32 v37, v0, v2
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v39, v0, v3
-; SI-NEXT: v_alignbit_b32 v0, v37, v3, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v36, v23, v56
+; SI-NEXT: v_alignbit_b32 v9, v36, v44, 16
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v46
+; SI-NEXT: v_or_b32_e32 v44, v9, v35
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v9, v9, v58
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v9, v44, v58, 16
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v60
+; SI-NEXT: v_or_b32_e32 v46, v9, v31
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v37
+; SI-NEXT: v_or_b32_e32 v60, v9, v61
+; SI-NEXT: v_alignbit_b32 v9, v46, v61, 16
+; SI-NEXT: v_or_b32_e32 v61, v5, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v25
+; SI-NEXT: v_or_b32_e32 v25, v5, v41
+; SI-NEXT: v_alignbit_b32 v5, v61, v41, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v48
+; SI-NEXT: v_or_b32_e32 v41, v5, v2
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v37, v5, v45
+; SI-NEXT: v_alignbit_b32 v5, v41, v45, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v59
+; SI-NEXT: v_mov_b32_e32 v16, v29
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v63
+; SI-NEXT: v_or_b32_e32 v29, v5, v1
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v39
+; SI-NEXT: v_or_b32_e32 v58, v9, v24
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v26
+; SI-NEXT: v_or_b32_e32 v26, v5, v57
+; SI-NEXT: v_alignbit_b32 v5, v29, v57, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v38
+; SI-NEXT: v_or_b32_e32 v55, v5, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v51
+; SI-NEXT: v_or_b32_e32 v45, v5, v15
+; SI-NEXT: v_alignbit_b32 v5, v55, v15, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v33
+; SI-NEXT: v_or_b32_e32 v34, v5, v10
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; SI-NEXT: v_or_b32_e32 v57, v5, v19
+; SI-NEXT: v_alignbit_b32 v5, v34, v19, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v18
+; SI-NEXT: v_mov_b32_e32 v18, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -168163,271 +168224,322 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v42
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v49
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v50
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v52
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v53
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v47
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_or_b32_e32 v63, v9, v14
+; SI-NEXT: v_alignbit_b32 v14, v58, v14, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v56
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_mov_b32_e32 v18, v57
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v48
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v49
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v50
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v52
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v54
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_mov_b32_e32 v9, v30
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v14, v28
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v10
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: .LBB92_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB92_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
-; SI-NEXT: v_or_b32_e32 v2, v58, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
; SI-NEXT: s_movk_i32 s6, 0x300
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
-; SI-NEXT: v_or_b32_e32 v3, v57, v3
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v55
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v62, v4
-; SI-NEXT: v_mov_b32_e32 v20, v1
-; SI-NEXT: v_add_i32_e32 v37, vcc, 0x3000000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v37
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v6, v0, v6
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x300, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v4, v4, v6
-; SI-NEXT: v_add_i32_e32 v39, vcc, 0x3000000, v4
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v30
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_or_b32_e32 v3, v28, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v25, v3, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v62
+; SI-NEXT: v_or_b32_e32 v1, v23, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_or_b32_e32 v3, v39, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v6, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v28, v5
+; SI-NEXT: v_add_i32_e32 v57, vcc, 0x3000000, v25
+; SI-NEXT: v_add_i32_e32 v34, vcc, 0x3000000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v34
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v3, v0, v3
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v6, v56, v6
-; SI-NEXT: v_or_b32_e32 v3, v6, v3
-; SI-NEXT: v_add_i32_e32 v38, vcc, 0x3000000, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v6, v45, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v19, v3
+; SI-NEXT: v_or_b32_e32 v5, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v7
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v15, v3
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v45, vcc, 0x3000000, v5
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v1, v51, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v7, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v55, vcc, 0x3000000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v55
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v47, v7
-; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_add_i32_e32 v35, vcc, 0x3000000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v35
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v10, v3
+; SI-NEXT: v_or_b32_e32 v9, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_or_b32_e32 v1, v59, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v0, v7
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v26, v7
-; SI-NEXT: v_or_b32_e32 v1, v7, v1
-; SI-NEXT: v_add_i32_e32 v36, vcc, 0x3000000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v8, v3
+; SI-NEXT: v_or_b32_e32 v3, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v37, vcc, 0x3000000, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v7, v63, v7
-; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v5, v5, v8
-; SI-NEXT: v_or_b32_e32 v5, v5, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v33, vcc, 0x3000000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v33
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v0, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_or_b32_e32 v0, v7, v0
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v34, vcc, 0x3000000, v0
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_or_b32_e32 v27, v8, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v41, vcc, 0x3000000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v41
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v28
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v8
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v32
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v61, vcc, 0x3000000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v30
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168436,14 +168548,15 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v63, vcc, 0x3000000, v10
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168452,16 +168565,16 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v11
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v23
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v58, vcc, 0x3000000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168470,16 +168583,15 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v12
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v60, vcc, 0x3000000, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168488,14 +168600,16 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v46, vcc, 0x3000000, v13
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v46
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168504,15 +168618,15 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v14
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v14
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168521,31 +168635,31 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v44, vcc, 0x3000000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
+; SI-NEXT: v_or_b32_e32 v16, v33, v16
; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v16
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168553,16 +168667,16 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v18, v19, v18
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v24
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v36, vcc, 0x3000000, v17
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168571,15 +168685,15 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_or_b32_e32 v18, v19, v18
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v18
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v18
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -168587,400 +168701,412 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_or_b32_e32 v25, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v40, vcc, 0x3000000, v19
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_or_b32_e32 v26, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v26
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_or_b32_e32 v31, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v15
-; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v20
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xff, v21
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v32, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v32
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v32, vcc, 0x3000000, v21
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v48, v20, v19
-; SI-NEXT: v_or_b32_e32 v0, v48, v0
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v25
-; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v10
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v19
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v31
+; SI-NEXT: v_and_b32_e32 v23, 0xff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v22
+; SI-NEXT: v_or_b32_e32 v23, v26, v23
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v0, v23, v0
+; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v9
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v28
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v14
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v51, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v59
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v43, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v27, v43, v12, 16
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v46
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v22, v21, v8, 16
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:972 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v41
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v17, v20, v18, 16
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v0, v8, v7, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v0
+; SI-NEXT: v_alignbit_b32 v0, v13, v9, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v32, v14, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v40, v16, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v4, v6, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v36, v5, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v0, v44, v7, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v12, v15, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v46, v60, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v51, v17, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v58, v63, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v14, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v61, v25, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v31, v18, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v13, v3, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v24, v5, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v41, v37, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v29, v26, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v21, v22, 16
+; SI-NEXT: v_alignbit_b32 v0, v55, v45, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v34, v57, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v6
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v19, v29, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v23, v20, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v13
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v30, v27, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v28, v34, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v33, v36, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v35, v38, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_alignbit_b32 v11, v6, v3, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v37, v39, 16
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
; SI-NEXT: .LBB92_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v44
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v8
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v27
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v52
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v17
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v6, v6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v51
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v43
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v50
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v48
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v8, v8, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v14
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v18
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v10, v10, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v31
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v52
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v56
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v12, v12, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v40
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v49
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v36
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v22
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v44
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v53
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v54
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_or_b32_e32 v18, v18, v21
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v25
-; SI-NEXT: v_or_b32_e32 v19, v19, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v60
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v46
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v63
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v58
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v30
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v61
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v34
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v25, v25, v27
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v27, v27, v28
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v45
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; SI-NEXT: v_or_b32_e32 v28, v28, v29
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v29, v29, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v57
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
@@ -168997,20 +169123,8 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v36
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v33
-; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v38
-; SI-NEXT: v_or_b32_e32 v28, v28, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v35
-; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v39
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v37
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v34
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -170373,11 +170487,11 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:304
; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:320
; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:160
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:156
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:152
; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:144
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:140
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:136
; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:132
@@ -170620,20 +170734,20 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v10, v46, v45, s6
; GFX9-NEXT: v_or_b32_sdwa v11, v43, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-NEXT: v_perm_b32 v12, v55, v54, s6
-; GFX9-NEXT: v_perm_b32 v17, v32, v40, s6
+; GFX9-NEXT: v_perm_b32 v17, v32, v63, s6
; GFX9-NEXT: v_perm_b32 v18, v44, v34, s6
-; GFX9-NEXT: v_perm_b32 v19, v42, v63, s6
+; GFX9-NEXT: v_perm_b32 v19, v42, v40, s6
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
@@ -171114,9 +171228,9 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v11, v62, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v63
+; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v40
; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v41
-; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v63
; GFX9-NEXT: s_waitcnt vmcnt(21)
; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(20)
@@ -173365,368 +173479,373 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s4, v20
; SI-NEXT: v_writelane_b32 v56, s4, 24
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316
; SI-NEXT: v_writelane_b32 v56, s4, 25
-; SI-NEXT: v_readfirstlane_b32 s4, v17
+; SI-NEXT: v_readfirstlane_b32 s4, v18
; SI-NEXT: v_writelane_b32 v56, s4, 26
-; SI-NEXT: v_readfirstlane_b32 s4, v16
+; SI-NEXT: v_readfirstlane_b32 s4, v17
; SI-NEXT: v_writelane_b32 v56, s4, 27
-; SI-NEXT: v_readfirstlane_b32 s4, v9
+; SI-NEXT: v_readfirstlane_b32 s4, v16
; SI-NEXT: v_writelane_b32 v56, s4, 28
-; SI-NEXT: v_readfirstlane_b32 s4, v8
+; SI-NEXT: v_readfirstlane_b32 s4, v11
; SI-NEXT: v_writelane_b32 v56, s4, 29
+; SI-NEXT: v_readfirstlane_b32 s4, v10
+; SI-NEXT: v_readfirstlane_b32 s85, v15
+; SI-NEXT: v_readfirstlane_b32 s87, v14
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296
+; SI-NEXT: v_readfirstlane_b32 s97, v13
+; SI-NEXT: v_readfirstlane_b32 s99, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300
+; SI-NEXT: v_writelane_b32 v56, s4, 30
+; SI-NEXT: v_readfirstlane_b32 s4, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292
+; SI-NEXT: v_writelane_b32 v56, s4, 31
+; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288
-; SI-NEXT: v_readfirstlane_b32 s4, v7
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264
+; SI-NEXT: v_readfirstlane_b32 s86, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
-; SI-NEXT: v_readfirstlane_b32 s87, v6
+; SI-NEXT: v_readfirstlane_b32 s96, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
-; SI-NEXT: v_readfirstlane_b32 s97, v5
+; SI-NEXT: v_writelane_b32 v56, s4, 32
+; SI-NEXT: v_readfirstlane_b32 s4, v5
+; SI-NEXT: v_writelane_b32 v56, s4, 33
+; SI-NEXT: v_readfirstlane_b32 s4, v4
+; SI-NEXT: v_writelane_b32 v56, s4, 34
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: v_readfirstlane_b32 s99, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272
; SI-NEXT: v_readfirstlane_b32 s76, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268
-; SI-NEXT: v_readfirstlane_b32 s21, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292
-; SI-NEXT: v_readfirstlane_b32 s96, v13
-; SI-NEXT: v_readfirstlane_b32 s98, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:300
-; SI-NEXT: v_readfirstlane_b32 s77, v11
-; SI-NEXT: v_readfirstlane_b32 s22, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:264
-; SI-NEXT: v_writelane_b32 v56, s4, 30
-; SI-NEXT: v_readfirstlane_b32 s85, v15
-; SI-NEXT: v_readfirstlane_b32 s86, v14
-; SI-NEXT: v_readfirstlane_b32 s23, v0
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s35, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v21
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 s83, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:224
-; SI-NEXT: v_readfirstlane_b32 s6, v23
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
-; SI-NEXT: v_readfirstlane_b32 s4, v2
-; SI-NEXT: v_writelane_b32 v56, s4, 31
+; SI-NEXT: v_readfirstlane_b32 s65, v21
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224
; SI-NEXT: v_readfirstlane_b32 s4, v1
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:248
-; SI-NEXT: v_writelane_b32 v56, s4, 32
-; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v0
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s68, v23
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
+; SI-NEXT: v_readfirstlane_b32 s64, v19
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
-; SI-NEXT: v_writelane_b32 v56, s6, 33
-; SI-NEXT: v_readfirstlane_b32 s6, v24
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:208
-; SI-NEXT: v_writelane_b32 v56, s6, 34
+; SI-NEXT: v_readfirstlane_b32 s17, v20
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208
+; SI-NEXT: v_writelane_b32 v56, s4, 35
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s45, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
+; SI-NEXT: v_readfirstlane_b32 s69, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
+; SI-NEXT: v_readfirstlane_b32 s47, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
+; SI-NEXT: v_readfirstlane_b32 s15, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
+; SI-NEXT: v_readfirstlane_b32 s40, v13
+; SI-NEXT: v_readfirstlane_b32 s92, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
; SI-NEXT: v_readfirstlane_b32 s56, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s90, v11
+; SI-NEXT: v_readfirstlane_b32 s84, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
-; SI-NEXT: v_readfirstlane_b32 s31, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
-; SI-NEXT: v_readfirstlane_b32 s6, v18
-; SI-NEXT: v_writelane_b32 v56, s6, 35
-; SI-NEXT: v_readfirstlane_b32 s6, v17
-; SI-NEXT: v_writelane_b32 v56, s6, 36
-; SI-NEXT: v_readfirstlane_b32 s94, v6
+; SI-NEXT: v_readfirstlane_b32 s61, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:204
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
-; SI-NEXT: v_readfirstlane_b32 s18, v13
-; SI-NEXT: v_readfirstlane_b32 s6, v11
-; SI-NEXT: v_readfirstlane_b32 s47, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
-; SI-NEXT: v_writelane_b32 v56, s6, 37
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
-; SI-NEXT: v_readfirstlane_b32 s6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:184
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
-; SI-NEXT: v_readfirstlane_b32 s59, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
-; SI-NEXT: v_readfirstlane_b32 s66, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
-; SI-NEXT: v_readfirstlane_b32 s44, v5
+; SI-NEXT: v_readfirstlane_b32 s62, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
-; SI-NEXT: v_writelane_b32 v56, s6, 38
+; SI-NEXT: v_readfirstlane_b32 s41, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
+; SI-NEXT: v_readfirstlane_b32 s66, v3
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s62, v22
-; SI-NEXT: v_readfirstlane_b32 s74, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:28
+; SI-NEXT: v_readfirstlane_b32 s80, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
+; SI-NEXT: v_readfirstlane_b32 s89, v24
+; SI-NEXT: v_readfirstlane_b32 s93, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28
; SI-NEXT: s_waitcnt expcnt(3)
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
-; SI-NEXT: v_readfirstlane_b32 s65, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
-; SI-NEXT: v_readfirstlane_b32 s70, v23
+; SI-NEXT: v_readfirstlane_b32 s63, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
+; SI-NEXT: v_readfirstlane_b32 s20, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
+; SI-NEXT: v_readfirstlane_b32 s72, v23
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
-; SI-NEXT: v_readfirstlane_b32 s73, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
-; SI-NEXT: v_readfirstlane_b32 s71, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:52
+; SI-NEXT: v_readfirstlane_b32 s67, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: v_readfirstlane_b32 s94, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52
; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
-; SI-NEXT: v_readfirstlane_b32 s57, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
-; SI-NEXT: v_readfirstlane_b32 s60, v19
+; SI-NEXT: v_readfirstlane_b32 s83, v19
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44
; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40
-; SI-NEXT: v_readfirstlane_b32 s72, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92
+; SI-NEXT: v_readfirstlane_b32 s44, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88
-; SI-NEXT: v_readfirstlane_b32 s75, v1
+; SI-NEXT: v_readfirstlane_b32 s91, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
-; SI-NEXT: v_readfirstlane_b32 s30, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:4
+; SI-NEXT: v_readfirstlane_b32 s60, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
+; SI-NEXT: v_readfirstlane_b32 s73, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32
-; SI-NEXT: v_readfirstlane_b32 s53, v4
+; SI-NEXT: v_readfirstlane_b32 s53, v9
+; SI-NEXT: v_readfirstlane_b32 s54, v31
; SI-NEXT: v_writelane_b32 v47, s53, 0
-; SI-NEXT: v_readfirstlane_b32 s54, v3
-; SI-NEXT: v_writelane_b32 v47, s83, 1
-; SI-NEXT: v_readfirstlane_b32 s55, v37
-; SI-NEXT: v_writelane_b32 v47, s54, 2
-; SI-NEXT: v_readfirstlane_b32 s12, v38
-; SI-NEXT: v_writelane_b32 v47, s55, 3
-; SI-NEXT: v_writelane_b32 v47, s12, 4
-; SI-NEXT: v_readfirstlane_b32 s78, v8
-; SI-NEXT: v_readfirstlane_b32 s45, v7
-; SI-NEXT: v_readfirstlane_b32 s46, v33
-; SI-NEXT: v_readfirstlane_b32 s13, v10
-; SI-NEXT: v_writelane_b32 v47, s13, 5
-; SI-NEXT: v_readfirstlane_b32 s14, v34
+; SI-NEXT: v_readfirstlane_b32 s55, v32
+; SI-NEXT: v_writelane_b32 v47, s54, 1
+; SI-NEXT: v_writelane_b32 v47, s55, 2
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s88, v31
-; SI-NEXT: v_readfirstlane_b32 s95, v9
-; SI-NEXT: v_writelane_b32 v47, s95, 6
-; SI-NEXT: v_readfirstlane_b32 s29, v32
-; SI-NEXT: v_writelane_b32 v47, s88, 7
-; SI-NEXT: v_writelane_b32 v47, s29, 8
-; SI-NEXT: v_writelane_b32 v47, s78, 9
-; SI-NEXT: v_writelane_b32 v47, s45, 10
-; SI-NEXT: v_writelane_b32 v47, s46, 11
-; SI-NEXT: v_writelane_b32 v47, s47, 12
-; SI-NEXT: v_writelane_b32 v47, s56, 13
-; SI-NEXT: v_writelane_b32 v47, s57, 14
-; SI-NEXT: v_readfirstlane_b32 s15, v6
-; SI-NEXT: v_writelane_b32 v47, s14, 15
-; SI-NEXT: v_readfirstlane_b32 s91, v17
-; SI-NEXT: v_writelane_b32 v47, s15, 16
-; SI-NEXT: v_readfirstlane_b32 s93, v26
-; SI-NEXT: v_writelane_b32 v47, s91, 17
-; SI-NEXT: v_writelane_b32 v47, s93, 18
-; SI-NEXT: v_writelane_b32 v47, s60, 19
-; SI-NEXT: v_writelane_b32 v47, s61, 20
-; SI-NEXT: v_readfirstlane_b32 s63, v27
-; SI-NEXT: v_writelane_b32 v47, s62, 21
-; SI-NEXT: v_writelane_b32 v47, s63, 22
-; SI-NEXT: v_readfirstlane_b32 s25, v13
-; SI-NEXT: v_writelane_b32 v47, s72, 23
-; SI-NEXT: v_readfirstlane_b32 s42, v16
-; SI-NEXT: v_writelane_b32 v47, s25, 24
-; SI-NEXT: v_writelane_b32 v47, s74, 25
-; SI-NEXT: v_readfirstlane_b32 s64, v12
-; SI-NEXT: v_writelane_b32 v47, s75, 26
-; SI-NEXT: v_readfirstlane_b32 s92, v29
-; SI-NEXT: v_readfirstlane_b32 s79, v52
-; SI-NEXT: v_writelane_b32 v47, s64, 27
-; SI-NEXT: v_readfirstlane_b32 s89, v0
-; SI-NEXT: v_writelane_b32 v47, s92, 28
-; SI-NEXT: v_writelane_b32 v47, s65, 29
-; SI-NEXT: v_readfirstlane_b32 s34, v53
-; SI-NEXT: v_writelane_b32 v47, s94, 30
-; SI-NEXT: v_writelane_b32 v47, s18, 31
-; SI-NEXT: v_readfirstlane_b32 s41, v30
-; SI-NEXT: v_writelane_b32 v47, s44, 32
-; SI-NEXT: v_readfirstlane_b32 s58, v11
-; SI-NEXT: v_readfirstlane_b32 s37, v39
-; SI-NEXT: v_readfirstlane_b32 s16, v20
-; SI-NEXT: v_writelane_b32 v56, s16, 39
-; SI-NEXT: v_readfirstlane_b32 s17, v25
-; SI-NEXT: v_readfirstlane_b32 s40, v41
-; SI-NEXT: v_writelane_b32 v56, s17, 40
-; SI-NEXT: v_readfirstlane_b32 s6, v42
-; SI-NEXT: v_writelane_b32 v56, s40, 41
-; SI-NEXT: v_writelane_b32 v56, s6, 42
+; SI-NEXT: v_readfirstlane_b32 s88, v8
+; SI-NEXT: v_writelane_b32 v47, s69, 3
+; SI-NEXT: v_writelane_b32 v47, s88, 4
+; SI-NEXT: v_writelane_b32 v47, s17, 5
+; SI-NEXT: v_readfirstlane_b32 s78, v7
+; SI-NEXT: v_writelane_b32 v47, s92, 6
+; SI-NEXT: v_readfirstlane_b32 s30, v33
+; SI-NEXT: v_writelane_b32 v47, s78, 7
+; SI-NEXT: v_writelane_b32 v47, s30, 8
+; SI-NEXT: v_readfirstlane_b32 s13, v34
+; SI-NEXT: v_writelane_b32 v47, s90, 9
+; SI-NEXT: v_readfirstlane_b32 s14, v6
+; SI-NEXT: v_writelane_b32 v47, s13, 10
+; SI-NEXT: v_readfirstlane_b32 s81, v14
+; SI-NEXT: v_writelane_b32 v47, s14, 11
+; SI-NEXT: v_readfirstlane_b32 s82, v26
+; SI-NEXT: v_writelane_b32 v47, s81, 12
+; SI-NEXT: v_writelane_b32 v47, s82, 13
+; SI-NEXT: v_writelane_b32 v47, s83, 14
+; SI-NEXT: v_writelane_b32 v47, s84, 15
+; SI-NEXT: v_readfirstlane_b32 s74, v27
+; SI-NEXT: v_writelane_b32 v47, s89, 16
+; SI-NEXT: v_writelane_b32 v47, s74, 17
+; SI-NEXT: v_writelane_b32 v47, s44, 18
+; SI-NEXT: v_readfirstlane_b32 s46, v12
+; SI-NEXT: v_writelane_b32 v47, s45, 19
+; SI-NEXT: v_writelane_b32 v47, s46, 20
+; SI-NEXT: v_writelane_b32 v47, s47, 21
+; SI-NEXT: v_writelane_b32 v47, s93, 22
+; SI-NEXT: v_readfirstlane_b32 s58, v13
+; SI-NEXT: v_writelane_b32 v47, s91, 23
+; SI-NEXT: v_readfirstlane_b32 s59, v28
+; SI-NEXT: v_writelane_b32 v47, s58, 24
+; SI-NEXT: v_readfirstlane_b32 s31, v2
+; SI-NEXT: v_writelane_b32 v47, s59, 25
+; SI-NEXT: v_readfirstlane_b32 s34, v39
+; SI-NEXT: v_writelane_b32 v47, s60, 26
+; SI-NEXT: v_writelane_b32 v47, s61, 27
+; SI-NEXT: v_readfirstlane_b32 s36, v48
+; SI-NEXT: v_writelane_b32 v47, s15, 28
+; SI-NEXT: v_readfirstlane_b32 s16, v30
+; SI-NEXT: v_writelane_b32 v47, s62, 29
+; SI-NEXT: v_readfirstlane_b32 s19, v10
+; SI-NEXT: v_writelane_b32 v47, s16, 30
+; SI-NEXT: v_writelane_b32 v47, s19, 31
+; SI-NEXT: v_writelane_b32 v47, s40, 32
+; SI-NEXT: v_writelane_b32 v47, s63, 33
+; SI-NEXT: v_readfirstlane_b32 s48, v5
+; SI-NEXT: v_writelane_b32 v47, s72, 34
+; SI-NEXT: v_readfirstlane_b32 s49, v35
+; SI-NEXT: v_writelane_b32 v47, s41, 35
+; SI-NEXT: v_readfirstlane_b32 s50, v36
+; SI-NEXT: v_readfirstlane_b32 s29, v41
+; SI-NEXT: v_writelane_b32 v56, s29, 36
; SI-NEXT: v_readfirstlane_b32 s43, v51
-; SI-NEXT: v_writelane_b32 v56, s42, 43
-; SI-NEXT: v_readfirstlane_b32 s7, v23
-; SI-NEXT: v_writelane_b32 v56, s43, 44
-; SI-NEXT: v_writelane_b32 v56, s7, 45
-; SI-NEXT: v_writelane_b32 v56, s79, 46
+; SI-NEXT: v_readfirstlane_b32 s42, v18
+; SI-NEXT: v_writelane_b32 v56, s42, 37
+; SI-NEXT: v_readfirstlane_b32 s6, v23
+; SI-NEXT: v_writelane_b32 v56, s43, 38
+; SI-NEXT: v_readfirstlane_b32 s75, v52
+; SI-NEXT: v_writelane_b32 v56, s6, 39
+; SI-NEXT: v_readfirstlane_b32 s79, v0
+; SI-NEXT: v_writelane_b32 v56, s75, 40
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s90, v21
-; SI-NEXT: v_writelane_b32 v56, s89, 47
-; SI-NEXT: v_writelane_b32 v56, s90, 48
+; SI-NEXT: v_readfirstlane_b32 s95, v22
+; SI-NEXT: v_writelane_b32 v56, s79, 41
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v53
+; SI-NEXT: v_writelane_b32 v56, s95, 42
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s8, v54
-; SI-NEXT: v_writelane_b32 v56, s34, 49
+; SI-NEXT: v_readfirstlane_b32 s7, v54
+; SI-NEXT: v_writelane_b32 v56, vcc_lo, 43
+; SI-NEXT: v_writelane_b32 v56, s7, 44
+; SI-NEXT: v_writelane_b32 v56, s31, 45
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s36, v2
-; SI-NEXT: v_writelane_b32 v56, s8, 50
-; SI-NEXT: v_writelane_b32 v56, s36, 51
-; SI-NEXT: v_writelane_b32 v47, s41, 33
+; SI-NEXT: v_readfirstlane_b32 s8, v19
+; SI-NEXT: v_writelane_b32 v56, s34, 46
+; SI-NEXT: v_writelane_b32 v56, s8, 47
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s9, v19
-; SI-NEXT: v_writelane_b32 v56, s37, 52
-; SI-NEXT: v_writelane_b32 v47, s58, 34
-; SI-NEXT: v_readfirstlane_b32 s38, v48
-; SI-NEXT: v_writelane_b32 v56, s9, 53
-; SI-NEXT: v_writelane_b32 v47, s59, 35
+; SI-NEXT: v_readfirstlane_b32 s37, v16
+; SI-NEXT: v_writelane_b32 v56, s36, 48
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s39, v14
-; SI-NEXT: v_writelane_b32 v56, s38, 54
+; SI-NEXT: v_readfirstlane_b32 s38, v1
+; SI-NEXT: v_writelane_b32 v56, s37, 49
+; SI-NEXT: v_readfirstlane_b32 s39, v49
+; SI-NEXT: v_writelane_b32 v56, s38, 50
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_readfirstlane_b32 s9, v50
+; SI-NEXT: v_writelane_b32 v56, s39, 51
+; SI-NEXT: v_readfirstlane_b32 s10, v17
+; SI-NEXT: v_writelane_b32 v56, s9, 52
+; SI-NEXT: v_writelane_b32 v56, s10, 53
+; SI-NEXT: v_writelane_b32 v56, s48, 54
+; SI-NEXT: v_writelane_b32 v56, s49, 55
; SI-NEXT: v_writelane_b32 v47, s73, 36
+; SI-NEXT: v_readfirstlane_b32 s24, v4
+; SI-NEXT: v_writelane_b32 v56, s50, 56
+; SI-NEXT: v_writelane_b32 v47, s20, 37
+; SI-NEXT: v_writelane_b32 v56, s24, 57
+; SI-NEXT: v_writelane_b32 v47, s66, 38
+; SI-NEXT: v_readfirstlane_b32 s57, v20
+; SI-NEXT: v_readfirstlane_b32 s51, v3
+; SI-NEXT: v_writelane_b32 v56, s65, 58
+; SI-NEXT: v_writelane_b32 v47, s67, 39
+; SI-NEXT: v_readfirstlane_b32 s52, v37
+; SI-NEXT: v_writelane_b32 v56, s51, 59
+; SI-NEXT: v_writelane_b32 v47, s57, 40
+; SI-NEXT: v_readfirstlane_b32 s21, v15
+; SI-NEXT: v_readfirstlane_b32 s11, v38
+; SI-NEXT: v_writelane_b32 v56, s52, 60
+; SI-NEXT: v_writelane_b32 v47, s94, 41
+; SI-NEXT: v_writelane_b32 v56, s11, 61
+; SI-NEXT: v_writelane_b32 v47, s21, 42
+; SI-NEXT: v_readfirstlane_b32 s12, v11
+; SI-NEXT: v_readfirstlane_b32 s77, v55
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s48, v1
-; SI-NEXT: v_writelane_b32 v56, s39, 55
-; SI-NEXT: v_writelane_b32 v47, s70, 37
-; SI-NEXT: v_readfirstlane_b32 s49, v49
-; SI-NEXT: v_writelane_b32 v56, s48, 56
-; SI-NEXT: v_writelane_b32 v47, vcc_lo, 38
+; SI-NEXT: v_readfirstlane_b32 s26, v24
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s10, v50
-; SI-NEXT: v_writelane_b32 v56, s49, 57
-; SI-NEXT: v_writelane_b32 v47, s30, 39
-; SI-NEXT: v_readfirstlane_b32 s11, v15
-; SI-NEXT: v_writelane_b32 v56, s10, 58
-; SI-NEXT: v_writelane_b32 v47, vcc_hi, 40
-; SI-NEXT: v_readfirstlane_b32 s50, v5
-; SI-NEXT: v_writelane_b32 v56, s11, 59
-; SI-NEXT: v_writelane_b32 v47, s31, 41
-; SI-NEXT: v_readfirstlane_b32 s67, v24
-; SI-NEXT: v_readfirstlane_b32 s51, v35
-; SI-NEXT: v_writelane_b32 v56, s50, 60
-; SI-NEXT: v_writelane_b32 v47, s66, 42
-; SI-NEXT: v_readfirstlane_b32 s52, v36
-; SI-NEXT: v_writelane_b32 v56, s51, 61
-; SI-NEXT: v_writelane_b32 v47, s67, 43
-; SI-NEXT: v_readfirstlane_b32 s35, v18
-; SI-NEXT: v_readfirstlane_b32 s69, v55
+; SI-NEXT: v_readfirstlane_b32 s70, v40
+; SI-NEXT: v_readfirstlane_b32 s98, v21
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s81, v22
+; SI-NEXT: v_readfirstlane_b32 s27, v25
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 s68, v40
-; SI-NEXT: v_readfirstlane_b32 s20, v43
+; SI-NEXT: v_readfirstlane_b32 s25, v42
+; SI-NEXT: v_readfirstlane_b32 s22, v43
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s27, v28
+; SI-NEXT: v_readfirstlane_b32 s18, v29
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s19, v44
-; SI-NEXT: v_writelane_b32 v56, s52, 62
-; SI-NEXT: v_writelane_b32 v47, s71, 44
-; SI-NEXT: v_writelane_b32 v56, s4, 63
-; SI-NEXT: v_writelane_b32 v47, s35, 45
+; SI-NEXT: v_readfirstlane_b32 s23, v44
+; SI-NEXT: v_writelane_b32 v56, s68, 62
+; SI-NEXT: v_writelane_b32 v47, s80, 43
+; SI-NEXT: v_writelane_b32 v56, s12, 63
+; SI-NEXT: v_writelane_b32 v47, s56, 44
; SI-NEXT: s_cbranch_scc0 .LBB93_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_mov_b32 s80, s4
; SI-NEXT: v_readlane_b32 s4, v56, 13
; SI-NEXT: v_readlane_b32 s5, v56, 12
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s28, s4, s5
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 45
; SI-NEXT: v_readlane_b32 s4, v56, 5
; SI-NEXT: v_readlane_b32 s5, v56, 4
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s82, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v56, 31
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s76, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_writelane_b32 v47, s4, 46
-; SI-NEXT: s_and_b32 s4, s22, 0xff
-; SI-NEXT: s_lshl_b32 s5, s77, 8
-; SI-NEXT: s_or_b32 s84, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v56, 25
-; SI-NEXT: s_and_b32 s5, s21, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 8
-; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_writelane_b32 v47, s4, 47
-; SI-NEXT: v_readlane_b32 s4, v56, 18
-; SI-NEXT: v_readlane_b32 s5, v56, 17
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_writelane_b32 v47, s4, 48
-; SI-NEXT: s_and_b32 s4, s7, 0xff
-; SI-NEXT: s_lshl_b32 s5, s6, 8
+; SI-NEXT: s_and_b32 s4, s35, 0xff
+; SI-NEXT: s_lshl_b32 s5, s76, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 49
-; SI-NEXT: s_and_b32 s4, s9, 0xff
-; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 30
+; SI-NEXT: v_readlane_b32 s5, v56, 29
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 50
-; SI-NEXT: s_and_b32 s4, s11, 0xff
-; SI-NEXT: s_lshl_b32 s5, s10, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 26
+; SI-NEXT: v_readlane_b32 s5, v56, 25
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 51
-; SI-NEXT: s_and_b32 s4, s13, 0xff
-; SI-NEXT: s_lshl_b32 s5, s12, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 18
+; SI-NEXT: v_readlane_b32 s5, v56, 17
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 52
-; SI-NEXT: s_and_b32 s4, s15, 0xff
-; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: s_and_b32 s4, s6, 0xff
+; SI-NEXT: s_lshl_b32 s5, s25, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 53
-; SI-NEXT: s_and_b32 s4, s58, 0xff
-; SI-NEXT: s_lshl_b32 s5, s41, 8
+; SI-NEXT: s_and_b32 s4, s8, 0xff
+; SI-NEXT: s_lshl_b32 s5, s7, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 54
-; SI-NEXT: s_and_b32 s4, s35, 0xff
-; SI-NEXT: s_lshl_b32 s5, s67, 8
+; SI-NEXT: s_and_b32 s4, s10, 0xff
+; SI-NEXT: s_lshl_b32 s5, s9, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 55
-; SI-NEXT: s_and_b32 s4, s71, 0xff
-; SI-NEXT: s_lshl_b32 s5, s66, 8
-; SI-NEXT: s_or_b32 s71, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 8
-; SI-NEXT: s_or_b32 vcc_lo, s4, s5
-; SI-NEXT: s_and_b32 s4, s59, 0xff
-; SI-NEXT: s_lshl_b32 s5, s18, 8
-; SI-NEXT: s_or_b32 s31, s4, s5
+; SI-NEXT: s_and_b32 s4, s12, 0xff
+; SI-NEXT: s_lshl_b32 s5, s11, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 56
+; SI-NEXT: s_and_b32 s4, s14, 0xff
+; SI-NEXT: s_lshl_b32 s5, s13, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 57
+; SI-NEXT: s_and_b32 s4, s19, 0xff
+; SI-NEXT: s_lshl_b32 s5, s16, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 58
+; SI-NEXT: s_and_b32 s4, s21, 0xff
+; SI-NEXT: s_lshl_b32 s5, s57, 8
+; SI-NEXT: s_or_b32 s57, s4, s5
+; SI-NEXT: s_and_b32 s4, s94, 0xff
+; SI-NEXT: s_lshl_b32 s5, s67, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 59
+; SI-NEXT: s_and_b32 s4, s66, 0xff
+; SI-NEXT: s_lshl_b32 s5, s41, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 60
+; SI-NEXT: s_and_b32 s4, s40, 0xff
+; SI-NEXT: s_lshl_b32 s5, s15, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 61
; SI-NEXT: v_readlane_b32 s4, v56, 9
; SI-NEXT: v_readlane_b32 s5, v56, 8
; SI-NEXT: s_and_b32 s4, s4, 0xff
@@ -173743,58 +173862,65 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: v_readlane_b32 s6, v56, 10
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
-; SI-NEXT: s_or_b32 s58, s6, s4
-; SI-NEXT: v_readlane_b32 s4, v56, 1
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_and_b32 s6, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 0
-; SI-NEXT: v_writelane_b32 v47, s7, 56
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_lshl_b32 s7, s4, 8
+; SI-NEXT: v_writelane_b32 v47, s7, 62
+; SI-NEXT: s_or_b32 s4, s6, s4
+; SI-NEXT: s_or_b32 s5, s5, s7
+; SI-NEXT: v_readlane_b32 s6, v56, 1
+; SI-NEXT: v_readlane_b32 s7, v56, 0
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s7, s6, s7
-; SI-NEXT: s_and_b32 s6, s23, 0xff
-; SI-NEXT: v_readlane_b32 s8, v56, 32
+; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: v_readlane_b32 s6, v56, 35
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s9, s6, s8
+; SI-NEXT: v_readlane_b32 s6, v56, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
-; SI-NEXT: v_readlane_b32 s4, v56, 3
-; SI-NEXT: s_or_b32 s5, s8, s6
-; SI-NEXT: s_and_b32 s6, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 2
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v56, 30
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s9, 63
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_and_b32 s8, s87, 0xff
-; SI-NEXT: s_lshl_b32 s9, s4, 8
-; SI-NEXT: v_readlane_b32 s4, v56, 29
+; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_and_b32 s8, s96, 0xff
+; SI-NEXT: s_lshl_b32 s9, s86, 8
; SI-NEXT: s_or_b32 s9, s8, s9
-; SI-NEXT: s_and_b32 s8, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 28
+; SI-NEXT: v_readlane_b32 s8, v56, 32
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s10, v56, 31
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s10, s4, 24
-; SI-NEXT: s_or_b32 s4, s10, s8
-; SI-NEXT: s_and_b32 s8, s99, 0xff
-; SI-NEXT: v_writelane_b32 v47, s5, 57
+; SI-NEXT: s_lshl_b32 s10, s10, 24
+; SI-NEXT: s_or_b32 s11, s10, s8
+; SI-NEXT: v_readlane_b32 s8, v56, 34
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s10, v56, 33
+; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s10, s97, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: v_writelane_b32 v47, s4, 58
+; SI-NEXT: v_writelane_b32 v46, s11, 0
; SI-NEXT: s_or_b32 s8, s10, s8
-; SI-NEXT: s_or_b32 s9, s9, s4
-; SI-NEXT: s_and_b32 s10, s86, 0xff
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: s_and_b32 s10, s87, 0xff
; SI-NEXT: s_lshl_b32 s11, s85, 8
-; SI-NEXT: v_readlane_b32 s4, v56, 27
; SI-NEXT: s_or_b32 s11, s10, s11
-; SI-NEXT: s_and_b32 s10, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 26
+; SI-NEXT: v_readlane_b32 s10, v56, 28
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: v_readlane_b32 s12, v56, 27
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s12, s4, 24
-; SI-NEXT: s_or_b32 s4, s12, s10
-; SI-NEXT: s_and_b32 s10, s98, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s13, s12, s10
+; SI-NEXT: s_and_b32 s10, s99, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s12, s96, 24
+; SI-NEXT: s_lshl_b32 s12, s97, 24
; SI-NEXT: s_or_b32 s10, s12, s10
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: v_readlane_b32 s12, v56, 22
+; SI-NEXT: v_writelane_b32 v46, s13, 1
+; SI-NEXT: s_or_b32 s11, s11, s13
; SI-NEXT: s_and_b32 s13, s12, 0xff
; SI-NEXT: v_readlane_b32 s12, v56, 21
; SI-NEXT: s_lshl_b32 s12, s12, 8
@@ -173803,11 +173929,8 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s14, s12, 16
; SI-NEXT: v_readlane_b32 s12, v56, 19
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: v_writelane_b32 v47, s4, 59
-; SI-NEXT: s_or_b32 s11, s11, s4
-; SI-NEXT: s_or_b32 s4, s12, s14
+; SI-NEXT: s_or_b32 s66, s12, s14
; SI-NEXT: v_readlane_b32 s12, v56, 24
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s14, s12, 16
@@ -173816,339 +173939,356 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: v_readlane_b32 s14, v56, 14
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s15, s19, 8
+; SI-NEXT: s_lshl_b32 s15, s23, 8
; SI-NEXT: s_or_b32 s15, s14, s15
-; SI-NEXT: s_and_b32 s14, s27, 0xff
+; SI-NEXT: s_and_b32 s14, s18, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s18, s20, 24
-; SI-NEXT: s_or_b32 s66, s18, s14
+; SI-NEXT: s_lshl_b32 s16, s22, 24
+; SI-NEXT: s_or_b32 s67, s16, s14
; SI-NEXT: v_readlane_b32 s14, v56, 16
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s18, s14, 16
+; SI-NEXT: s_lshl_b32 s16, s14, 16
; SI-NEXT: v_readlane_b32 s14, v56, 15
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: v_writelane_b32 v47, s4, 60
-; SI-NEXT: s_or_b32 s13, s13, s4
-; SI-NEXT: s_mov_b32 s4, s20
-; SI-NEXT: s_or_b32 s14, s14, s18
-; SI-NEXT: s_and_b32 s18, s16, 0xff
-; SI-NEXT: s_lshl_b32 s20, s68, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s81, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s69, 24
-; SI-NEXT: s_or_b32 s67, s24, s20
-; SI-NEXT: s_and_b32 s20, s17, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s40, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s40, s24, s20
-; SI-NEXT: s_or_b32 s41, s18, s67
-; SI-NEXT: s_and_b32 s18, s89, 0xff
-; SI-NEXT: s_lshl_b32 s20, s79, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s42, 0xff
-; SI-NEXT: v_writelane_b32 v47, s68, 61
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s43, 24
-; SI-NEXT: v_writelane_b32 v47, s19, 62
-; SI-NEXT: s_or_b32 s19, s24, s20
-; SI-NEXT: s_and_b32 s20, s90, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s34, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s42, s24, s20
-; SI-NEXT: s_or_b32 s43, s18, s19
-; SI-NEXT: s_and_b32 s18, s39, 0xff
-; SI-NEXT: s_lshl_b32 s20, s38, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s36, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s37, 24
-; SI-NEXT: s_or_b32 s68, s24, s20
-; SI-NEXT: s_and_b32 s20, s48, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s49, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s34, s24, s20
-; SI-NEXT: s_or_b32 s35, s18, s68
-; SI-NEXT: s_and_b32 s18, s53, 0xff
-; SI-NEXT: s_lshl_b32 s20, s52, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s50, 0xff
-; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: v_writelane_b32 v46, s27, 0
-; SI-NEXT: s_lshl_b32 s27, s51, 24
-; SI-NEXT: s_or_b32 s26, s27, s20
-; SI-NEXT: s_and_b32 s20, s54, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s27, s55, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s36, s27, s20
-; SI-NEXT: s_or_b32 s37, s18, s26
-; SI-NEXT: s_and_b32 s18, s78, 0xff
-; SI-NEXT: s_lshl_b32 s20, s29, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s95, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s27, s88, 24
-; SI-NEXT: s_or_b32 s27, s27, s20
-; SI-NEXT: s_and_b32 s20, s45, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s78, s46, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s38, s78, s20
-; SI-NEXT: s_or_b32 s39, s18, s27
-; SI-NEXT: s_and_b32 s18, s25, 0xff
-; SI-NEXT: s_lshl_b32 s20, s63, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s91, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s78, s93, 24
-; SI-NEXT: v_writelane_b32 v46, s69, 1
-; SI-NEXT: s_or_b32 s69, s78, s20
-; SI-NEXT: s_and_b32 s20, s64, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s78, s92, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s48, s78, s20
-; SI-NEXT: s_or_b32 s49, s18, s69
-; SI-NEXT: s_and_b32 s18, s65, 0xff
-; SI-NEXT: s_lshl_b32 s20, s74, 8
-; SI-NEXT: s_or_b32 s20, s18, s20
-; SI-NEXT: s_and_b32 s18, s62, 0xff
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_lshl_b32 s78, s60, 24
-; SI-NEXT: s_or_b32 s18, s78, s18
-; SI-NEXT: s_and_b32 s78, s30, 0xff
-; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s79, s70, 24
+; SI-NEXT: s_or_b32 s14, s14, s16
+; SI-NEXT: s_and_b32 s16, s98, 0xff
+; SI-NEXT: s_mov_b32 s94, s17
+; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s26, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s77, 24
+; SI-NEXT: s_or_b32 s71, s19, s17
+; SI-NEXT: s_and_b32 s17, s27, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s29, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s40, s19, s17
+; SI-NEXT: s_or_b32 s41, s16, s71
+; SI-NEXT: s_and_b32 s16, s79, 0xff
+; SI-NEXT: s_lshl_b32 s17, s75, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s42, 0xff
+; SI-NEXT: v_writelane_b32 v46, s25, 2
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s43, 24
+; SI-NEXT: v_writelane_b32 v46, s26, 3
+; SI-NEXT: s_or_b32 s26, s19, s17
+; SI-NEXT: s_and_b32 s17, s95, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, vcc_lo, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s42, s19, s17
+; SI-NEXT: s_or_b32 s43, s16, s26
+; SI-NEXT: s_and_b32 s16, s37, 0xff
+; SI-NEXT: s_lshl_b32 s17, s36, 8
+; SI-NEXT: s_or_b32 s17, s16, s17
+; SI-NEXT: s_and_b32 s16, s31, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s19, s34, 24
+; SI-NEXT: v_writelane_b32 v46, s23, 4
+; SI-NEXT: s_or_b32 s23, s19, s16
+; SI-NEXT: s_and_b32 s19, s38, 0xff
+; SI-NEXT: v_writelane_b32 v46, s77, 5
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: v_writelane_b32 v46, s22, 6
+; SI-NEXT: s_lshl_b32 s22, s39, 24
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s34, s22, s19
+; SI-NEXT: s_mov_b32 s22, s35
+; SI-NEXT: s_or_b32 s35, s17, s23
+; SI-NEXT: s_and_b32 s17, s24, 0xff
+; SI-NEXT: s_lshl_b32 s19, s50, 8
+; SI-NEXT: s_or_b32 s19, s17, s19
+; SI-NEXT: s_and_b32 s17, s48, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s21, s49, 24
+; SI-NEXT: v_writelane_b32 v46, s18, 7
+; SI-NEXT: s_or_b32 s18, s21, s17
+; SI-NEXT: s_and_b32 s21, s51, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s52, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s36, s24, s21
+; SI-NEXT: s_or_b32 s37, s19, s18
+; SI-NEXT: s_and_b32 s19, s88, 0xff
+; SI-NEXT: s_lshl_b32 s21, s55, 8
+; SI-NEXT: s_or_b32 s19, s19, s21
+; SI-NEXT: s_and_b32 s21, s53, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s54, 24
+; SI-NEXT: v_writelane_b32 v46, s70, 8
+; SI-NEXT: s_or_b32 s70, s24, s21
+; SI-NEXT: s_and_b32 s21, s78, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s30, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s38, s24, s21
+; SI-NEXT: s_or_b32 s39, s19, s70
+; SI-NEXT: s_and_b32 s19, s46, 0xff
+; SI-NEXT: s_lshl_b32 s21, s74, 8
+; SI-NEXT: s_or_b32 s19, s19, s21
+; SI-NEXT: s_and_b32 s21, s81, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s82, 24
+; SI-NEXT: s_mov_b32 s17, s27
+; SI-NEXT: s_mov_b32 s27, s98
+; SI-NEXT: s_or_b32 s98, s24, s21
+; SI-NEXT: s_and_b32 s21, s58, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s59, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s48, s24, s21
+; SI-NEXT: s_or_b32 s49, s19, s98
+; SI-NEXT: s_and_b32 s19, s60, 0xff
+; SI-NEXT: s_lshl_b32 s21, s93, 8
+; SI-NEXT: s_or_b32 s21, s19, s21
+; SI-NEXT: s_and_b32 s19, s89, 0xff
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s24, s83, 24
+; SI-NEXT: s_or_b32 s19, s24, s19
+; SI-NEXT: s_and_b32 s24, s73, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_lshl_b32 s75, s72, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s50, s75, s24
+; SI-NEXT: s_or_b32 s51, s21, s19
+; SI-NEXT: s_and_b32 s21, s91, 0xff
+; SI-NEXT: s_lshl_b32 s24, s44, 8
+; SI-NEXT: s_or_b32 s21, s21, s24
+; SI-NEXT: s_and_b32 s24, s80, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_lshl_b32 s75, s90, 24
+; SI-NEXT: s_or_b32 s16, s75, s24
+; SI-NEXT: s_and_b32 s75, s20, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s78, s63, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s52, s78, s75
+; SI-NEXT: s_or_b32 s53, s21, s16
+; SI-NEXT: s_and_b32 s21, s84, 0xff
+; SI-NEXT: s_lshl_b32 s75, s56, 8
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_and_b32 s75, s92, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s78, s69, 24
+; SI-NEXT: s_or_b32 s78, s78, s75
+; SI-NEXT: s_and_b32 s75, s62, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s79, s61, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s54, s79, s75
+; SI-NEXT: s_or_b32 s55, s21, s78
+; SI-NEXT: s_and_b32 s21, s94, 0xff
+; SI-NEXT: s_lshl_b32 s75, s68, 8
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_and_b32 s75, s65, 0xff
+; SI-NEXT: v_readlane_b32 s24, v47, 49
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s79, s64, 24
+; SI-NEXT: s_and_b32 s44, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 50
+; SI-NEXT: s_or_b32 s88, s79, s75
+; SI-NEXT: s_lshl_b32 s79, s45, 24
+; SI-NEXT: s_and_b32 s45, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 51
+; SI-NEXT: s_and_b32 s75, s47, 0xff
+; SI-NEXT: s_and_b32 s46, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 52
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_and_b32 s47, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 53
+; SI-NEXT: s_mov_b32 s84, s64
+; SI-NEXT: s_or_b32 s64, s79, s75
+; SI-NEXT: s_and_b32 s79, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 54
+; SI-NEXT: s_and_b32 s89, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 55
+; SI-NEXT: s_and_b32 s90, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 56
+; SI-NEXT: s_and_b32 s91, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 57
+; SI-NEXT: v_readlane_b32 s20, v47, 45
+; SI-NEXT: s_and_b32 s92, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 58
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s50, s79, s78
-; SI-NEXT: s_or_b32 s51, s20, s18
-; SI-NEXT: s_and_b32 s20, s75, 0xff
-; SI-NEXT: s_lshl_b32 s78, s72, 8
-; SI-NEXT: s_or_b32 s78, s20, s78
-; SI-NEXT: s_and_b32 s20, s57, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s79, s47, 24
-; SI-NEXT: s_or_b32 s20, s79, s20
-; SI-NEXT: s_and_b32 s79, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s73, 24
-; SI-NEXT: s_and_b32 s78, s78, 0xffff
-; SI-NEXT: s_mov_b32 s17, s4
-; SI-NEXT: s_or_b32 s52, s88, s79
-; SI-NEXT: s_or_b32 s53, s78, s20
-; SI-NEXT: s_and_b32 s78, s61, 0xff
-; SI-NEXT: s_lshl_b32 s79, s56, 8
-; SI-NEXT: v_readlane_b32 s4, v56, 38
-; SI-NEXT: s_or_b32 s78, s78, s79
-; SI-NEXT: s_and_b32 s79, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 37
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s4, 24
-; SI-NEXT: s_or_b32 s16, s88, s79
-; SI-NEXT: s_and_b32 s79, s44, 0xff
-; SI-NEXT: s_and_b32 s78, s78, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v56, 34
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s94, 24
-; SI-NEXT: s_or_b32 s55, s78, s16
-; SI-NEXT: s_and_b32 s78, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 33
-; SI-NEXT: s_or_b32 s54, s88, s79
-; SI-NEXT: s_lshl_b32 s79, s4, 8
-; SI-NEXT: s_or_b32 s78, s78, s79
-; SI-NEXT: s_and_b32 s79, s83, 0xff
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s80, 24
-; SI-NEXT: v_readlane_b32 s4, v56, 36
-; SI-NEXT: v_writelane_b32 v47, s81, 63
-; SI-NEXT: s_or_b32 s88, s88, s79
-; SI-NEXT: s_and_b32 s79, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 35
-; SI-NEXT: s_lshl_b32 s89, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v47, 46
-; SI-NEXT: s_and_b32 s46, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 47
-; SI-NEXT: s_and_b32 s56, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 48
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_and_b32 s57, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 49
-; SI-NEXT: s_or_b32 s64, s89, s79
-; SI-NEXT: s_and_b32 s89, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 50
-; SI-NEXT: s_and_b32 s78, s78, 0xffff
-; SI-NEXT: s_and_b32 s30, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 51
-; SI-NEXT: s_or_b32 s65, s78, s88
-; SI-NEXT: s_and_b32 s78, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 52
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_and_b32 s93, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 59
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_and_b32 s95, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 60
+; SI-NEXT: s_or_b32 s74, s20, s4
+; SI-NEXT: s_mov_b32 s75, s5
+; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
+; SI-NEXT: s_or_b32 s65, s21, s88
+; SI-NEXT: v_readlane_b32 s21, v47, 47
+; SI-NEXT: s_and_b32 s30, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 61
+; SI-NEXT: v_writelane_b32 v47, s4, 45
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s5, 46
+; SI-NEXT: s_lshr_b64 s[4:5], s[6:7], 16
+; SI-NEXT: s_or_b32 s13, s13, s66
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_and_b32 s47, s84, 0xffff
-; SI-NEXT: s_and_b32 s79, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 53
-; SI-NEXT: s_lshr_b64 s[24:25], s[58:59], 16
-; SI-NEXT: s_or_b32 s7, s7, s5
-; SI-NEXT: s_or_b32 s15, s15, s66
-; SI-NEXT: s_mov_b32 s5, s85
-; SI-NEXT: s_and_b32 s44, s28, 0xffff
-; SI-NEXT: s_and_b32 s90, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 54
-; SI-NEXT: s_or_b32 s62, s46, s8
-; SI-NEXT: s_or_b32 s60, s47, s10
-; SI-NEXT: s_or_b32 s46, s89, s40
-; SI-NEXT: s_mov_b32 s47, s41
-; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 16
-; SI-NEXT: s_or_b32 s40, s79, s36
-; SI-NEXT: s_mov_b32 s41, s37
-; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
-; SI-NEXT: v_readlane_b32 s25, v47, 56
-; SI-NEXT: s_and_b32 s91, s4, 0xffff
-; SI-NEXT: s_and_b32 s93, s71, 0xffff
-; SI-NEXT: s_or_b32 s74, s44, s58
-; SI-NEXT: s_or_b32 s58, s56, s12
-; SI-NEXT: s_or_b32 s56, s57, s14
-; SI-NEXT: s_mov_b32 s57, s15
-; SI-NEXT: s_lshr_b64 s[70:71], s[14:15], 16
-; SI-NEXT: s_or_b32 s14, s90, s38
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s4, 47
+; SI-NEXT: s_or_b32 s15, s15, s67
+; SI-NEXT: s_or_b32 s72, s21, s6
+; SI-NEXT: v_writelane_b32 v47, s5, 48
+; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16
+; SI-NEXT: s_and_b32 s31, s24, 0xffff
+; SI-NEXT: s_or_b32 s68, s47, s14
+; SI-NEXT: s_mov_b32 s69, s15
+; SI-NEXT: s_lshr_b64 s[24:25], s[14:15], 16
+; SI-NEXT: s_or_b32 s14, s92, s38
; SI-NEXT: s_mov_b32 s15, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[38:39], 16
-; SI-NEXT: s_lshr_b32 s37, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 57
-; SI-NEXT: s_and_b32 s45, s82, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 55
-; SI-NEXT: s_mov_b32 s75, s59
+; SI-NEXT: v_readlane_b32 s21, v47, 62
+; SI-NEXT: s_and_b32 s94, s57, 0xffff
+; SI-NEXT: s_or_b32 s58, s46, s12
; SI-NEXT: s_mov_b32 s59, s13
-; SI-NEXT: s_lshr_b64 s[82:83], s[12:13], 16
-; SI-NEXT: s_or_b32 s12, s91, s48
+; SI-NEXT: s_or_b32 s12, s93, s48
; SI-NEXT: s_mov_b32 s13, s49
; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 58
-; SI-NEXT: s_and_b32 s92, s4, 0xffff
-; SI-NEXT: s_and_b32 s94, vcc_lo, 0xffff
-; SI-NEXT: s_and_b32 s95, s31, 0xffff
-; SI-NEXT: s_lshr_b32 s49, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 59
-; SI-NEXT: s_or_b32 s72, s45, s6
-; SI-NEXT: s_mov_b32 s73, s7
-; SI-NEXT: s_lshr_b64 vcc, s[6:7], 16
-; SI-NEXT: s_mov_b32 s63, s9
-; SI-NEXT: s_lshr_b64 s[28:29], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: v_readlane_b32 s21, v47, 63
+; SI-NEXT: s_or_b32 s60, s45, s10
; SI-NEXT: s_mov_b32 s61, s11
-; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16
-; SI-NEXT: s_mov_b32 s85, s5
-; SI-NEXT: s_or_b32 s10, s92, s50
+; SI-NEXT: s_lshr_b64 s[82:83], s[10:11], 16
+; SI-NEXT: s_or_b32 s10, s94, s50
; SI-NEXT: s_mov_b32 s11, s51
; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16
-; SI-NEXT: s_or_b32 s8, s93, s52
+; SI-NEXT: s_lshr_b32 s49, s21, 16
+; SI-NEXT: v_readlane_b32 s21, v46, 0
+; SI-NEXT: s_mov_b32 s73, s7
+; SI-NEXT: s_or_b32 s62, s44, s8
+; SI-NEXT: s_mov_b32 s63, s9
+; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 16
+; SI-NEXT: s_or_b32 s46, s79, s40
+; SI-NEXT: s_mov_b32 s47, s41
+; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 16
+; SI-NEXT: s_or_b32 s44, s89, s42
+; SI-NEXT: s_mov_b32 s45, s43
+; SI-NEXT: s_lshr_b64 s[28:29], s[42:43], 16
+; SI-NEXT: s_or_b32 s42, s90, s34
+; SI-NEXT: s_mov_b32 s43, s35
+; SI-NEXT: s_lshr_b64 s[34:35], s[34:35], 16
+; SI-NEXT: s_or_b32 s40, s91, s36
+; SI-NEXT: s_mov_b32 s41, s37
+; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
+; SI-NEXT: s_or_b32 s8, s95, s52
; SI-NEXT: s_mov_b32 s9, s53
; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
-; SI-NEXT: s_or_b32 s6, s94, s54
+; SI-NEXT: s_or_b32 s6, s30, s54
; SI-NEXT: s_mov_b32 s7, s55
; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16
-; SI-NEXT: s_or_b32 s4, s95, s64
+; SI-NEXT: s_or_b32 s4, s31, s64
; SI-NEXT: s_mov_b32 s5, s65
; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16
-; SI-NEXT: s_lshr_b32 s90, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 60
-; SI-NEXT: s_or_b32 s44, s30, s42
-; SI-NEXT: s_mov_b32 s45, s43
-; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 16
-; SI-NEXT: s_or_b32 s42, s78, s34
-; SI-NEXT: s_mov_b32 s43, s35
-; SI-NEXT: s_lshr_b64 s[34:35], s[34:35], 16
-; SI-NEXT: v_readlane_b32 s81, v47, 63
-; SI-NEXT: s_lshr_b32 s78, s25, 16
-; SI-NEXT: s_lshr_b32 s51, s66, 16
-; SI-NEXT: s_lshr_b32 s53, s67, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: v_readlane_b32 s19, v47, 62
-; SI-NEXT: s_lshr_b32 s65, s68, 16
-; SI-NEXT: s_lshr_b32 s79, s26, 16
-; SI-NEXT: s_lshr_b32 s89, s27, 16
-; SI-NEXT: v_readlane_b32 s27, v46, 0
-; SI-NEXT: s_lshr_b32 s91, s69, 16
-; SI-NEXT: v_readlane_b32 s69, v46, 1
-; SI-NEXT: v_readlane_b32 s68, v47, 61
+; SI-NEXT: s_lshr_b32 s51, s21, 16
+; SI-NEXT: v_readlane_b32 s21, v46, 1
+; SI-NEXT: s_mov_b32 s35, s22
+; SI-NEXT: v_readlane_b32 s77, v46, 5
+; SI-NEXT: s_lshr_b32 s53, s21, 16
+; SI-NEXT: s_lshr_b32 s55, s66, 16
+; SI-NEXT: v_readlane_b32 s25, v46, 2
+; SI-NEXT: s_lshr_b32 s65, s67, 16
+; SI-NEXT: s_lshr_b32 s79, s71, 16
+; SI-NEXT: s_lshr_b32 s89, s26, 16
+; SI-NEXT: v_readlane_b32 s26, v46, 3
+; SI-NEXT: s_lshr_b32 s91, s23, 16
+; SI-NEXT: v_readlane_b32 s23, v46, 4
; SI-NEXT: s_lshr_b32 s93, s18, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 s92, s16, 16
-; SI-NEXT: s_lshr_b32 s16, s88, 16
-; SI-NEXT: s_mov_b32 s20, s17
+; SI-NEXT: v_readlane_b32 s18, v46, 7
+; SI-NEXT: s_lshr_b32 s95, s70, 16
+; SI-NEXT: v_readlane_b32 s70, v46, 8
+; SI-NEXT: s_lshr_b32 s31, s98, 16
+; SI-NEXT: s_mov_b32 s98, s27
+; SI-NEXT: s_mov_b32 s27, s17
+; SI-NEXT: s_lshr_b32 s29, s19, 16
+; SI-NEXT: s_lshr_b32 s19, s16, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s78, 16
+; SI-NEXT: v_readlane_b32 s22, v46, 6
+; SI-NEXT: s_lshr_b32 s37, s88, 16
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB93_3
; SI-NEXT: .LBB93_2:
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b32 s84, s64
+; SI-NEXT: v_writelane_b32 v47, s4, 45
+; SI-NEXT: v_writelane_b32 v47, s5, 46
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: s_mov_b64 s[66:67], -1
+; SI-NEXT: v_writelane_b32 v47, s4, 47
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr24
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr28
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v47, s5, 48
; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr24
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr28
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr29
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $sgpr19
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr16
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: .LBB93_3: ; %Flow
-; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 s18, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s18, 1
+; SI-NEXT: s_and_b64 s[16:17], s[66:67], exec
+; SI-NEXT: s_cselect_b32 s16, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s16, 1
+; SI-NEXT: v_readlane_b32 s16, v47, 45
+; SI-NEXT: s_mov_b32 s78, s16
+; SI-NEXT: s_mov_b32 s88, s56
+; SI-NEXT: v_readlane_b32 s56, v47, 47
+; SI-NEXT: s_mov_b32 s90, s28
+; SI-NEXT: v_readlane_b32 s17, v47, 46
+; SI-NEXT: v_readlane_b32 s57, v47, 48
; SI-NEXT: s_cbranch_scc1 .LBB93_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_readlane_b32 s4, v47, 35
+; SI-NEXT: v_readlane_b32 s4, v47, 32
; SI-NEXT: s_add_i32 s4, s4, 3
-; SI-NEXT: v_readlane_b32 s5, v47, 31
-; SI-NEXT: v_readlane_b32 s6, v56, 36
+; SI-NEXT: v_readlane_b32 s5, v47, 28
+; SI-NEXT: v_readlane_b32 s6, v47, 21
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v56, 35
+; SI-NEXT: v_readlane_b32 s5, v47, 19
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
@@ -174156,31 +174296,30 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v56, 34
+; SI-NEXT: v_readlane_b32 s5, v47, 5
; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: v_readlane_b32 s6, v56, 33
-; SI-NEXT: v_readlane_b32 s7, v47, 1
+; SI-NEXT: v_readlane_b32 s6, v56, 62
+; SI-NEXT: v_readlane_b32 s7, v56, 58
; SI-NEXT: s_and_b32 s5, s5, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v56, 63
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s6, s84, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_addk_i32 s5, 0x300
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v47, 41
+; SI-NEXT: v_readlane_b32 s6, v47, 38
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 38
-; SI-NEXT: v_readlane_b32 s8, v47, 32
+; SI-NEXT: v_readlane_b32 s7, v47, 35
+; SI-NEXT: v_readlane_b32 s8, v47, 29
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 30
+; SI-NEXT: v_readlane_b32 s7, v47, 27
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
@@ -174188,15 +174327,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s7, s7, s8
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 20
+; SI-NEXT: v_readlane_b32 s7, v47, 15
; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s8, v47, 13
-; SI-NEXT: v_readlane_b32 s9, v56, 38
+; SI-NEXT: v_readlane_b32 s8, v47, 44
+; SI-NEXT: v_readlane_b32 s9, v47, 6
; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v56, 37
+; SI-NEXT: v_readlane_b32 s8, v47, 3
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
@@ -174204,15 +174343,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v47, 44
+; SI-NEXT: v_readlane_b32 s8, v47, 41
; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v47, 42
-; SI-NEXT: v_readlane_b32 s10, v47, 40
+; SI-NEXT: v_readlane_b32 s9, v47, 39
+; SI-NEXT: v_readlane_b32 s10, v47, 37
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v47, 36
+; SI-NEXT: v_readlane_b32 s9, v47, 33
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
@@ -174220,15 +174359,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s9, s9, s10
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v47, 26
+; SI-NEXT: v_readlane_b32 s9, v47, 23
; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: v_readlane_b32 s10, v47, 23
-; SI-NEXT: v_readlane_b32 s11, v47, 14
+; SI-NEXT: v_readlane_b32 s10, v47, 18
+; SI-NEXT: v_readlane_b32 s11, v47, 43
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_readlane_b32 s10, v47, 12
+; SI-NEXT: v_readlane_b32 s10, v47, 9
; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
@@ -174236,15 +174375,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_readlane_b32 s10, v47, 45
+; SI-NEXT: v_readlane_b32 s10, v47, 42
; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: v_readlane_b32 s11, v47, 43
-; SI-NEXT: v_readlane_b32 s12, v47, 39
+; SI-NEXT: v_readlane_b32 s11, v47, 40
+; SI-NEXT: v_readlane_b32 s12, v47, 36
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v47, 37
+; SI-NEXT: v_readlane_b32 s11, v47, 34
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
@@ -174252,15 +174391,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v47, 29
+; SI-NEXT: v_readlane_b32 s11, v47, 26
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_readlane_b32 s12, v47, 25
-; SI-NEXT: v_readlane_b32 s13, v47, 21
+; SI-NEXT: v_readlane_b32 s12, v47, 22
+; SI-NEXT: v_readlane_b32 s13, v47, 16
; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v47, 19
+; SI-NEXT: v_readlane_b32 s12, v47, 14
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
@@ -174268,15 +174407,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v47, 34
+; SI-NEXT: v_readlane_b32 s12, v47, 31
; SI-NEXT: s_add_i32 s12, s12, 3
-; SI-NEXT: v_readlane_b32 s13, v47, 33
-; SI-NEXT: v_readlane_b32 s14, v47, 27
+; SI-NEXT: v_readlane_b32 s13, v47, 30
+; SI-NEXT: v_readlane_b32 s14, v47, 24
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 8
; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v47, 28
+; SI-NEXT: v_readlane_b32 s13, v47, 25
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 24
; SI-NEXT: s_lshl_b32 s14, s14, 16
@@ -174284,15 +174423,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s13, s13, s14
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v47, 24
+; SI-NEXT: v_readlane_b32 s13, v47, 20
; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: v_readlane_b32 s14, v47, 22
-; SI-NEXT: v_readlane_b32 s15, v47, 17
+; SI-NEXT: v_readlane_b32 s14, v47, 17
+; SI-NEXT: v_readlane_b32 s15, v47, 12
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v47, 18
+; SI-NEXT: v_readlane_b32 s14, v47, 13
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_lshl_b32 s15, s15, 16
@@ -174300,15 +174439,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v47, 16
+; SI-NEXT: v_readlane_b32 s14, v47, 11
; SI-NEXT: s_add_i32 s14, s14, 3
-; SI-NEXT: v_readlane_b32 s15, v47, 15
-; SI-NEXT: v_readlane_b32 s16, v47, 10
+; SI-NEXT: v_readlane_b32 s15, v47, 10
+; SI-NEXT: v_readlane_b32 s16, v47, 7
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 8
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_readlane_b32 s15, v47, 11
+; SI-NEXT: v_readlane_b32 s15, v47, 8
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
@@ -174316,15 +174455,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s15, s15, s16
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_readlane_b32 s15, v47, 9
+; SI-NEXT: v_readlane_b32 s15, v47, 4
; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: v_readlane_b32 s16, v47, 8
-; SI-NEXT: v_readlane_b32 s17, v47, 6
+; SI-NEXT: v_readlane_b32 s16, v47, 2
+; SI-NEXT: v_readlane_b32 s17, v47, 0
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 8
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_readlane_b32 s16, v47, 7
+; SI-NEXT: v_readlane_b32 s16, v47, 1
; SI-NEXT: s_and_b32 s17, s17, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
@@ -174332,137 +174471,134 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_readlane_b32 s16, v47, 5
+; SI-NEXT: v_readlane_b32 s16, v56, 63
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 4
-; SI-NEXT: v_readlane_b32 s18, v47, 2
+; SI-NEXT: v_readlane_b32 s17, v56, 61
+; SI-NEXT: v_readlane_b32 s19, v56, 59
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 3
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 60
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s40, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 0
+; SI-NEXT: v_readlane_b32 s16, v56, 57
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 62
-; SI-NEXT: v_readlane_b32 s18, v56, 60
+; SI-NEXT: v_readlane_b32 s17, v56, 56
+; SI-NEXT: v_readlane_b32 s19, v56, 54
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 61
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 55
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s41, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 59
+; SI-NEXT: v_readlane_b32 s16, v56, 53
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 58
-; SI-NEXT: v_readlane_b32 s18, v56, 56
+; SI-NEXT: v_readlane_b32 s17, v56, 52
+; SI-NEXT: v_readlane_b32 s19, v56, 50
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 57
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 51
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s42, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 55
+; SI-NEXT: v_readlane_b32 s16, v56, 49
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 54
-; SI-NEXT: v_readlane_b32 s18, v56, 51
+; SI-NEXT: v_readlane_b32 s17, v56, 48
+; SI-NEXT: v_readlane_b32 s19, v56, 45
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 52
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 46
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s43, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 53
+; SI-NEXT: v_readlane_b32 s16, v56, 47
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 50
-; SI-NEXT: v_readlane_b32 s18, v56, 48
+; SI-NEXT: v_readlane_b32 s17, v56, 44
+; SI-NEXT: v_readlane_b32 s19, v56, 42
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 49
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 43
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s44, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 47
+; SI-NEXT: v_readlane_b32 s16, v56, 41
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 46
-; SI-NEXT: v_readlane_b32 s18, v56, 43
+; SI-NEXT: v_readlane_b32 s17, v56, 40
+; SI-NEXT: v_readlane_b32 s19, v56, 37
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 44
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 38
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s45, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 45
+; SI-NEXT: v_readlane_b32 s16, v56, 39
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 42
-; SI-NEXT: v_readlane_b32 s18, v56, 40
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s17, s25, 8
+; SI-NEXT: s_add_i32 s19, s27, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 41
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 36
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s46, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 39
-; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_add_i32 s16, s98, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s68, 8
-; SI-NEXT: s_add_i32 s18, s81, 3
+; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_add_i32 s19, s26, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s69, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s17, s77, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s47, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 18
@@ -174474,42 +174610,43 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_and_b32 s17, s16, 0xffff
; SI-NEXT: v_readlane_b32 s16, v56, 15
-; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s16, 24
; SI-NEXT: v_readlane_b32 s16, v56, 16
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_add_i32 s56, s16, 0x3000000
+; SI-NEXT: s_add_i32 s68, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 14
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s19, 8
-; SI-NEXT: s_add_i32 s18, s27, 3
+; SI-NEXT: s_lshl_b32 s17, s23, 8
+; SI-NEXT: s_add_i32 s19, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s20, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s17, s22, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s69, s16, 0x3000000
+; SI-NEXT: v_readlane_b32 s16, v56, 26
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 25
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s57, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s21, 3
-; SI-NEXT: s_and_b32 s17, s16, 0xff
-; SI-NEXT: v_readlane_b32 s16, v56, 25
-; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_and_b32 s17, s16, 0xffff
; SI-NEXT: v_readlane_b32 s16, v56, 23
-; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s16, 24
; SI-NEXT: v_readlane_b32 s16, v56, 24
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s58, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 22
@@ -174521,64 +174658,66 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_and_b32 s17, s16, 0xffff
; SI-NEXT: v_readlane_b32 s16, v56, 19
-; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s16, 24
; SI-NEXT: v_readlane_b32 s16, v56, 20
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s59, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s22, 3
+; SI-NEXT: v_readlane_b32 s16, v56, 30
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 29
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s77, 8
-; SI-NEXT: s_add_i32 s18, s98, 3
+; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_add_i32 s19, s99, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s96, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s17, s97, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s60, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s86, 3
-; SI-NEXT: v_readlane_b32 s18, v56, 27
+; SI-NEXT: s_add_i32 s16, s87, 3
+; SI-NEXT: v_readlane_b32 s18, v56, 28
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s85, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 26
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 27
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s61, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 31
-; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_add_i32 s16, s35, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s76, 8
-; SI-NEXT: s_add_i32 s18, s99, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s18, v56, 34
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s97, 24
+; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 33
+; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s16, s16, s18
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s62, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s87, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 30
-; SI-NEXT: v_readlane_b32 s18, v56, 29
+; SI-NEXT: s_add_i32 s16, s96, 3
+; SI-NEXT: v_readlane_b32 s18, v56, 32
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s86, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 28
+; SI-NEXT: v_readlane_b32 s17, v56, 31
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -174609,16 +174748,16 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: v_readlane_b32 s17, v56, 0
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s23, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 32
-; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_add_i32 s18, vcc_hi, 3
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 35
+; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s16, s16, s18
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s73, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 13
; SI-NEXT: s_add_i32 s16, s16, 3
@@ -174652,6 +174791,7 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
@@ -174664,8 +174804,10 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
; SI-NEXT: s_add_i32 s15, s15, 0x3000000
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s75, s16, 0x3000000
+; SI-NEXT: s_lshr_b64 s[78:79], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
@@ -174673,150 +174815,147 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[24:25], s[74:75], 16
-; SI-NEXT: s_lshr_b64 vcc, s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[28:29], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[82:83], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[70:71], s[56:57], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[80:81], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[20:21], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[24:25], s[68:69], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
-; SI-NEXT: s_lshr_b32 s37, s75, 16
-; SI-NEXT: s_lshr_b32 s39, s73, 16
-; SI-NEXT: s_lshr_b32 s49, s63, 16
-; SI-NEXT: s_lshr_b32 s90, s61, 16
-; SI-NEXT: s_lshr_b32 s78, s59, 16
-; SI-NEXT: s_lshr_b32 s51, s57, 16
-; SI-NEXT: s_lshr_b32 s53, s47, 16
-; SI-NEXT: s_lshr_b32 s55, s45, 16
-; SI-NEXT: s_lshr_b32 s65, s43, 16
-; SI-NEXT: s_lshr_b32 s79, s41, 16
-; SI-NEXT: s_lshr_b32 s89, s15, 16
-; SI-NEXT: s_lshr_b32 s91, s13, 16
-; SI-NEXT: s_lshr_b32 s93, s11, 16
-; SI-NEXT: s_lshr_b32 s95, s9, 16
-; SI-NEXT: s_lshr_b32 s92, s7, 16
-; SI-NEXT: s_lshr_b32 s16, s5, 16
+; SI-NEXT: s_lshr_b32 s39, s75, 16
+; SI-NEXT: s_lshr_b32 s49, s73, 16
+; SI-NEXT: s_lshr_b32 s51, s63, 16
+; SI-NEXT: s_lshr_b32 s53, s61, 16
+; SI-NEXT: s_lshr_b32 s55, s59, 16
+; SI-NEXT: s_lshr_b32 s65, s69, 16
+; SI-NEXT: s_lshr_b32 s79, s47, 16
+; SI-NEXT: s_lshr_b32 s89, s45, 16
+; SI-NEXT: s_lshr_b32 s91, s43, 16
+; SI-NEXT: s_lshr_b32 s93, s41, 16
+; SI-NEXT: s_lshr_b32 s95, s15, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s29, s11, 16
+; SI-NEXT: s_lshr_b32 s19, s9, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s7, 16
+; SI-NEXT: s_lshr_b32 s37, s5, 16
; SI-NEXT: .LBB93_5: ; %end
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: s_and_b32 s18, s74, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s24, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
-; SI-NEXT: s_and_b32 s19, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s37, 16
-; SI-NEXT: s_or_b32 s19, s19, s20
-; SI-NEXT: s_and_b32 s20, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s21, vcc_lo, 16
-; SI-NEXT: s_or_b32 s20, s20, s21
+; SI-NEXT: s_and_b32 s16, s74, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s78, 16
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s75, 0xffff
+; SI-NEXT: s_lshl_b32 s18, s39, 16
+; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_and_b32 s18, s72, 0xffff
+; SI-NEXT: s_lshl_b32 s21, s56, 16
+; SI-NEXT: s_or_b32 s18, s18, s21
; SI-NEXT: s_and_b32 s21, s73, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s39, 16
+; SI-NEXT: s_lshl_b32 s22, s49, 16
+; SI-NEXT: s_lshl_b32 s28, s20, 16
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_lshl_b32 s20, s90, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s62, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s28, 16
+; SI-NEXT: s_lshl_b32 s23, s80, 16
+; SI-NEXT: s_or_b32 s20, s44, s20
+; SI-NEXT: s_and_b32 s44, s45, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s89, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s49, 16
-; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_and_b32 s24, s60, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s80, 16
-; SI-NEXT: s_or_b32 s24, s24, s26
-; SI-NEXT: s_and_b32 s26, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s90, 16
-; SI-NEXT: s_or_b32 s25, s26, s25
-; SI-NEXT: s_and_b32 s26, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s82, 16
-; SI-NEXT: s_or_b32 s26, s26, s27
-; SI-NEXT: s_and_b32 s27, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s78, 16
-; SI-NEXT: s_or_b32 s17, s27, s17
-; SI-NEXT: s_and_b32 s27, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s70, 16
-; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: s_and_b32 s28, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s51, 16
-; SI-NEXT: s_or_b32 s28, s28, s29
-; SI-NEXT: s_and_b32 s29, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s84, 16
-; SI-NEXT: s_or_b32 s29, s29, s46
-; SI-NEXT: s_and_b32 s46, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s46, s46, s47
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
-; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s25, s51, 16
+; SI-NEXT: s_or_b32 s44, s44, s45
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s34, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s45, s34, 16
+; SI-NEXT: s_or_b32 s23, s23, s25
+; SI-NEXT: s_and_b32 s25, s60, 0xffff
+; SI-NEXT: s_lshl_b32 s26, s82, 16
+; SI-NEXT: s_or_b32 s42, s42, s45
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s65, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s45, s91, 16
+; SI-NEXT: s_or_b32 s25, s25, s26
+; SI-NEXT: s_and_b32 s26, s61, 0xffff
+; SI-NEXT: s_lshl_b32 s27, s53, 16
+; SI-NEXT: s_or_b32 s43, s43, s45
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s36, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s45, s36, 16
+; SI-NEXT: s_or_b32 s26, s26, s27
+; SI-NEXT: s_and_b32 s27, s58, 0xffff
+; SI-NEXT: s_or_b32 s40, s40, s45
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s79, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s45, s93, 16
+; SI-NEXT: s_or_b32 s27, s27, s28
+; SI-NEXT: s_and_b32 s28, s59, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s55, 16
+; SI-NEXT: s_or_b32 s41, s41, s45
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s38, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s45, s38, 16
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_or_b32 s28, s28, s58
+; SI-NEXT: s_and_b32 s56, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s24, 16
+; SI-NEXT: s_or_b32 s14, s14, s45
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s89, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s45, s95, 16
+; SI-NEXT: s_or_b32 s9, s9, s19
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s54, 16
+; SI-NEXT: s_or_b32 s56, s56, s58
+; SI-NEXT: s_and_b32 s57, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s65, 16
+; SI-NEXT: s_or_b32 s15, s15, s45
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s45, s48, 16
+; SI-NEXT: s_or_b32 s6, s6, s19
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s19, vcc_lo, 16
+; SI-NEXT: s_or_b32 s57, s57, s58
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s88, 16
+; SI-NEXT: s_or_b32 s12, s12, s45
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s91, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
-; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
+; SI-NEXT: s_lshl_b32 s45, s31, 16
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s93, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s95, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s92, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
+; SI-NEXT: s_lshl_b32 s29, s29, 16
+; SI-NEXT: s_or_b32 s7, s7, s19
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
+; SI-NEXT: s_lshl_b32 s19, s64, 16
+; SI-NEXT: s_or_b32 s46, s46, s58
+; SI-NEXT: s_and_b32 s47, s47, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s79, 16
+; SI-NEXT: s_or_b32 s13, s13, s45
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s50, 16
+; SI-NEXT: s_or_b32 s11, s11, s29
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s29, s52, 16
+; SI-NEXT: s_or_b32 s4, s4, s19
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s4, s4, s47
-; SI-NEXT: s_or_b32 s5, s5, s16
+; SI-NEXT: s_lshl_b32 s19, s37, 16
+; SI-NEXT: s_or_b32 s47, s47, s58
+; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_or_b32 s8, s8, s29
+; SI-NEXT: s_or_b32 s5, s5, s19
; SI-NEXT: v_readlane_b32 s30, v45, 34
-; SI-NEXT: v_mov_b32_e32 v0, s18
-; SI-NEXT: v_mov_b32_e32 v1, s19
-; SI-NEXT: v_mov_b32_e32 v2, s20
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v2, s18
; SI-NEXT: v_mov_b32_e32 v3, s21
; SI-NEXT: v_mov_b32_e32 v4, s22
; SI-NEXT: v_mov_b32_e32 v5, s23
-; SI-NEXT: v_mov_b32_e32 v6, s24
-; SI-NEXT: v_mov_b32_e32 v7, s25
-; SI-NEXT: v_mov_b32_e32 v8, s26
-; SI-NEXT: v_mov_b32_e32 v9, s17
-; SI-NEXT: v_mov_b32_e32 v10, s27
-; SI-NEXT: v_mov_b32_e32 v11, s28
-; SI-NEXT: v_mov_b32_e32 v12, s29
-; SI-NEXT: v_mov_b32_e32 v13, s46
-; SI-NEXT: v_mov_b32_e32 v14, s44
-; SI-NEXT: v_mov_b32_e32 v15, s45
+; SI-NEXT: v_mov_b32_e32 v6, s25
+; SI-NEXT: v_mov_b32_e32 v7, s26
+; SI-NEXT: v_mov_b32_e32 v8, s27
+; SI-NEXT: v_mov_b32_e32 v9, s28
+; SI-NEXT: v_mov_b32_e32 v10, s56
+; SI-NEXT: v_mov_b32_e32 v11, s57
+; SI-NEXT: v_mov_b32_e32 v12, s46
+; SI-NEXT: v_mov_b32_e32 v13, s47
+; SI-NEXT: v_mov_b32_e32 v14, s20
+; SI-NEXT: v_mov_b32_e32 v15, s44
; SI-NEXT: v_mov_b32_e32 v16, s42
; SI-NEXT: v_mov_b32_e32 v17, s43
; SI-NEXT: v_mov_b32_e32 v18, s40
@@ -174928,8 +175067,8 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s11, v2
; VI-NEXT: v_readfirstlane_b32 s6, v1
; VI-NEXT: v_readfirstlane_b32 s8, v0
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324
@@ -174940,39 +175079,39 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:304
; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:300
; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:292
; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:288
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:284
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:280
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:280
; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:276
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:272
; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:268
; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:260
; VI-NEXT: s_cmp_lg_u64 vcc, 0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:256
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:252
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:248
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:244
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:240
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:244
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:240
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
@@ -175012,19 +175151,19 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:172
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:168
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:168
; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:160
; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:156
; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:148
; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:140
; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:120
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:108
@@ -175036,128 +175175,112 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:64
; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36
; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12
; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB93_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v27, v27, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_perm_b32 v15, v15, v62, s4
-; VI-NEXT: v_or_b32_e32 v15, v15, v27
-; VI-NEXT: v_perm_b32 v27, v32, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_perm_b32 v25, v25, v49, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v15, v15, v63, s4
+; VI-NEXT: v_or_b32_e32 v15, v15, v25
+; VI-NEXT: v_perm_b32 v25, v32, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_perm_b32 v28, v60, v28, s4
; VI-NEXT: v_perm_b32 v17, v17, v16, s4
-; VI-NEXT: v_or_b32_e32 v16, v28, v27
-; VI-NEXT: v_perm_b32 v27, v47, v45, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_e32 v16, v28, v25
+; VI-NEXT: v_perm_b32 v25, v47, v46, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_perm_b32 v18, v29, v18, s4
-; VI-NEXT: v_or_b32_e32 v18, v18, v27
-; VI-NEXT: v_perm_b32 v27, v44, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_perm_b32 v19, v43, v19, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v27
-; VI-NEXT: v_perm_b32 v27, v21, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_mov_b32_e32 v43, v20
-; VI-NEXT: v_perm_b32 v20, v26, v20, s4
-; VI-NEXT: v_or_b32_e32 v20, v20, v27
-; VI-NEXT: v_perm_b32 v27, v22, v25, s4
-; VI-NEXT: v_perm_b32 v21, v23, v54, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v25
+; VI-NEXT: v_perm_b32 v25, v45, v30, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v19, v44, v19, s4
+; VI-NEXT: v_or_b32_e32 v19, v19, v25
+; VI-NEXT: v_perm_b32 v25, v55, v24, s4
+; VI-NEXT: v_mov_b32_e32 v45, v44
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_mov_b32_e32 v44, v20
+; VI-NEXT: v_perm_b32 v20, v27, v20, s4
+; VI-NEXT: v_or_b32_e32 v20, v20, v25
+; VI-NEXT: v_perm_b32 v25, v22, v26, s4
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_e32 v21, v21, v27
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v49, v31
-; VI-NEXT: v_mov_b32_e32 v62, v49
-; VI-NEXT: v_perm_b32 v29, v49, v55, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v32, v57, v56, s4
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v42, v41
-; VI-NEXT: v_mov_b32_e32 v41, v12
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_mov_b32_e32 v31, v10
-; VI-NEXT: v_or_b32_e32 v17, v17, v32
-; VI-NEXT: v_perm_b32 v28, v42, v31, s4
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_e32 v21, v21, v25
; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v0, s17
; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s21
; VI-NEXT: v_perm_b32 v3, s22, v3, v11
; VI-NEXT: v_perm_b32 v0, s16, v0, v11
@@ -175171,97 +175294,113 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_perm_b32 v3, s26, v3, v11
; VI-NEXT: v_perm_b32 v2, s24, v2, v11
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: v_perm_b32 v4, s8, v4, v11
; VI-NEXT: v_perm_b32 v3, s28, v3, v11
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, s10
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_perm_b32 v5, s14, v5, v11
; VI-NEXT: v_perm_b32 v4, s11, v4, v11
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s41
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_perm_b32 v6, s46, v6, v11
; VI-NEXT: v_perm_b32 v5, s42, v5, v11
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, s57
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s45
; VI-NEXT: v_perm_b32 v7, s63, v7, v11
; VI-NEXT: v_perm_b32 v6, s58, v6, v11
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s61
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s62
; VI-NEXT: v_perm_b32 v8, s73, v8, v11
; VI-NEXT: v_perm_b32 v7, s74, v7, v11
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s9
; VI-NEXT: v_perm_b32 v9, s40, v9, v11
; VI-NEXT: v_perm_b32 v8, s76, v8, v11
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v27, v23, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v48, v31
+; VI-NEXT: v_mov_b32_e32 v31, v10
; VI-NEXT: v_mov_b32_e32 v10, s43
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_perm_b32 v10, s56, v10, v11
; VI-NEXT: v_perm_b32 v9, s44, v9, v11
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_mov_b32_e32 v42, v41
+; VI-NEXT: v_mov_b32_e32 v41, v12
; VI-NEXT: v_mov_b32_e32 v12, s59
; VI-NEXT: v_or_b32_e32 v9, v9, v10
+; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: v_perm_b32 v25, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_mov_b32_e32 v10, s47
; VI-NEXT: v_perm_b32 v12, s72, v12, v11
; VI-NEXT: v_perm_b32 v10, s60, v10, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v35, v34, s4
+; VI-NEXT: v_perm_b32 v12, v34, v33, s4
; VI-NEXT: v_perm_b32 v11, s75, v13, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v50, v37, s4
+; VI-NEXT: v_perm_b32 v12, v51, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v39, v36, s4
+; VI-NEXT: v_perm_b32 v13, v39, v35, s4
; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v59, v48, s4
+; VI-NEXT: v_perm_b32 v13, v62, v50, s4
+; VI-NEXT: v_mov_b32_e32 v62, v48
+; VI-NEXT: v_perm_b32 v29, v48, v52, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v57, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_or_b32_e32 v17, v17, v32
+; VI-NEXT: v_perm_b32 v28, v42, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v34, v46, v38, s4
-; VI-NEXT: v_perm_b32 v14, v14, v58, s4
-; VI-NEXT: v_or_b32_e32 v13, v34, v13
+; VI-NEXT: v_perm_b32 v33, v58, v38, s4
+; VI-NEXT: v_perm_b32 v14, v14, v59, s4
+; VI-NEXT: v_or_b32_e32 v13, v33, v13
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v34, v63, v51, s4
-; VI-NEXT: v_or_b32_e32 v14, v34, v14
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_mov_b32_e32 v34, v30
-; VI-NEXT: v_mov_b32_e32 v35, v52
-; VI-NEXT: v_mov_b32_e32 v48, v55
-; VI-NEXT: s_waitcnt vmcnt(11)
-; VI-NEXT: v_mov_b32_e32 v37, v49
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v33, v36, v43, s4
+; VI-NEXT: v_or_b32_e32 v14, v33, v14
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: v_mov_b32_e32 v34, v52
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_perm_b32 v22, v23, v22, s4
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v22, v22, v27
+; VI-NEXT: v_or_b32_e32 v22, v22, v25
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_mov_b32_e32 v63, v30
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_mov_b32_e32 v37, v48
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_mov_b32_e32 v58, v32
+; VI-NEXT: v_mov_b32_e32 v43, v32
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_mov_b32_e32 v51, v31
+; VI-NEXT: v_mov_b32_e32 v33, v31
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v24, v24, v23, s4
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
@@ -175280,115 +175419,116 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
; VI-NEXT: v_or_b32_e32 v25, v26, v25
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v26, v53, v26, s4
+; VI-NEXT: v_perm_b32 v26, v40, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v40, s4
+; VI-NEXT: v_perm_b32 v27, v27, v54, s4
; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v27, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
; VI-NEXT: v_or_b32_e32 v27, v28, v27
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v52, s4
+; VI-NEXT: v_perm_b32 v28, v28, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v50, v29
+; VI-NEXT: v_mov_b32_e32 v49, v29
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v46, v30
+; VI-NEXT: v_mov_b32_e32 v51, v30
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v33, v30
+; VI-NEXT: v_mov_b32_e32 v36, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v63, v31
+; VI-NEXT: v_mov_b32_e32 v50, v31
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v59, v31
+; VI-NEXT: v_mov_b32_e32 v39, v31
; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v36, v31
+; VI-NEXT: v_mov_b32_e32 v59, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v39, v32
+; VI-NEXT: v_mov_b32_e32 v58, v32
; VI-NEXT: v_perm_b32 v31, v32, v31, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v38, v32
-; VI-NEXT: v_perm_b32 v32, v49, v32, s4
+; VI-NEXT: v_perm_b32 v32, v48, v32, s4
; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB93_3
; VI-NEXT: .LBB93_2:
-; VI-NEXT: v_mov_b32_e32 v39, v4
+; VI-NEXT: v_mov_b32_e32 v58, v4
; VI-NEXT: v_mov_b32_e32 v62, v31
; VI-NEXT: v_mov_b32_e32 v37, v3
-; VI-NEXT: v_mov_b32_e32 v35, v52
-; VI-NEXT: v_mov_b32_e32 v63, v9
-; VI-NEXT: v_mov_b32_e32 v36, v1
-; VI-NEXT: v_mov_b32_e32 v48, v55
-; VI-NEXT: v_mov_b32_e32 v58, v6
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: v_mov_b32_e32 v50, v9
+; VI-NEXT: v_mov_b32_e32 v59, v1
+; VI-NEXT: v_mov_b32_e32 v34, v52
+; VI-NEXT: v_mov_b32_e32 v43, v6
; VI-NEXT: v_mov_b32_e32 v38, v0
-; VI-NEXT: v_mov_b32_e32 v34, v42
-; VI-NEXT: v_mov_b32_e32 v33, v5
-; VI-NEXT: v_mov_b32_e32 v51, v49
-; VI-NEXT: v_mov_b32_e32 v59, v2
-; VI-NEXT: v_mov_b32_e32 v50, v8
-; VI-NEXT: v_mov_b32_e32 v46, v7
-; VI-NEXT: v_mov_b32_e32 v43, v20
+; VI-NEXT: v_mov_b32_e32 v63, v48
+; VI-NEXT: v_mov_b32_e32 v36, v5
+; VI-NEXT: v_mov_b32_e32 v33, v42
+; VI-NEXT: v_mov_b32_e32 v39, v2
+; VI-NEXT: v_mov_b32_e32 v49, v8
+; VI-NEXT: v_mov_b32_e32 v51, v7
+; VI-NEXT: v_mov_b32_e32 v45, v44
+; VI-NEXT: v_mov_b32_e32 v44, v20
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB93_3: ; %Flow
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
; VI-NEXT: s_cbranch_scc1 .LBB93_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v0, v0, v36, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: v_perm_b32 v0, v0, v59, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v37
; VI-NEXT: v_perm_b32 v0, v0, v38, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v50
+; VI-NEXT: v_perm_b32 v0, v0, v36, s4
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43
+; VI-NEXT: v_perm_b32 v21, v0, v39, s4
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v63
-; VI-NEXT: v_perm_b32 v0, v0, v33, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
-; VI-NEXT: v_perm_b32 v63, v0, v59, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v22, v0, v50, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
-; VI-NEXT: v_perm_b32 v23, v0, v46, s4
+; VI-NEXT: v_perm_b32 v22, v0, v49, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33
+; VI-NEXT: v_perm_b32 v23, v0, v51, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s72, s72, 3
@@ -175411,7 +175551,6 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_mov_b32_e32 v46, s21
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v58, s19
; VI-NEXT: s_add_i32 s16, s16, 3
@@ -175420,42 +175559,42 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: v_perm_b32 v24, v0, v35, s4
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v25, v0, v48, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v0, v34, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v28, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v31, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
@@ -175469,87 +175608,86 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v1, v0, s4
+; VI-NEXT: v_perm_b32 v20, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v44, v0, v1, s4
+; VI-NEXT: v_perm_b32 v63, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v45, v0, v1, s4
+; VI-NEXT: v_perm_b32 v32, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v1, v0, s4
+; VI-NEXT: v_perm_b32 v46, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v47, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v56, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v57, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v19, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v18, v0, v43, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v0, v44, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v60, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v45
+; VI-NEXT: v_mov_b32_e32 v45, s21
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v61, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v40, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v42, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v10, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
@@ -175558,177 +175696,177 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v12, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v14, v0, v32, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v55
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v32, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v34, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v33, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v36, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v35, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v37, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v38, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v39, v0, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; VI-NEXT: v_perm_b32 v46, s20, v46, v0
+; VI-NEXT: v_perm_b32 v45, s20, v45, v0
; VI-NEXT: v_perm_b32 v58, s18, v58, v0
; VI-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v46
+; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v45
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v39, s75, v1, v0
+; VI-NEXT: v_perm_b32 v48, s75, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: v_perm_b32 v33, s72, v1, v0
+; VI-NEXT: v_perm_b32 v34, s72, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_perm_b32 v35, s60, v1, v0
+; VI-NEXT: v_perm_b32 v36, s60, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v9, s56, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: v_perm_b32 v48, s44, v1, v0
+; VI-NEXT: v_perm_b32 v49, s44, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: v_perm_b32 v8, s40, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_perm_b32 v49, s76, v1, v0
+; VI-NEXT: v_perm_b32 v50, s76, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v7, s73, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: v_perm_b32 v50, s74, v1, v0
+; VI-NEXT: v_perm_b32 v51, s74, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s57
; VI-NEXT: v_perm_b32 v6, s63, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: v_perm_b32 v51, s58, v1, v0
+; VI-NEXT: v_perm_b32 v52, s58, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s41
; VI-NEXT: v_perm_b32 v5, s46, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_perm_b32 v52, s42, v1, v0
+; VI-NEXT: v_perm_b32 v53, s42, v1, v0
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v48
-; VI-NEXT: v_or_b32_sdwa v5, v5, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v6, v6, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v7, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v8, v8, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v9, v9, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v10
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v11
-; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v12
-; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v13
-; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
+; VI-NEXT: v_or_b32_sdwa v5, v5, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v6, v6, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v7, v7, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v8, v8, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v9, v9, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v10
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v11
+; VI-NEXT: v_lshlrev_b32_e32 v51, 16, v12
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v13
+; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v14
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v34
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
-; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v37
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
-; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v35
-; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v12, v12, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v35
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v38
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v39
+; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v48
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v36
+; VI-NEXT: v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v11, v11, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v1, s10
; VI-NEXT: v_perm_b32 v4, s14, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: v_perm_b32 v53, s11, v1, v0
+; VI-NEXT: v_perm_b32 v54, s11, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_perm_b32 v3, s8, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: v_perm_b32 v54, s28, v1, v0
+; VI-NEXT: v_perm_b32 v55, s28, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: v_perm_b32 v2, s26, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_perm_b32 v55, s24, v1, v0
+; VI-NEXT: v_perm_b32 v43, s24, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s23
; VI-NEXT: v_perm_b32 v1, s22, v1, v0
; VI-NEXT: v_perm_b32 v0, s16, v59, v0
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
+; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v43
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v54
-; VI-NEXT: v_or_b32_sdwa v4, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v16, v50, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v17, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v63
-; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v22
-; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v23
-; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v25
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v26
+; VI-NEXT: v_or_b32_sdwa v15, v53, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v16, v51, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v17, v49, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v21
+; VI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
+; VI-NEXT: v_add_u32_e32 v38, vcc, 0x300, v23
+; VI-NEXT: v_lshlrev_b32_e32 v39, 16, v24
+; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v25
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v26
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v29
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v30
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v31
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v62
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v21
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v44
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v45
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v20
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v47
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v20
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v63
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v32
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v46
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v47
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v56
; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v57
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v19
@@ -175738,29 +175876,30 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v42
; VI-NEXT: v_or_b32_sdwa v0, v58, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v2, v2, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v3, v3, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v1, v1, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v2, v2, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v3, v3, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v4, v4, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v18, v18, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v19, v19, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v20, v20, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v21, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v34
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; VI-NEXT: v_or_b32_sdwa v22, v22, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; VI-NEXT: v_or_b32_sdwa v22, v22, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v27, v48, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v28, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v29, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v30, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v31, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v27, v49, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v28, v39, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v29, v37, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v30, v35, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v31, v33, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -175832,6 +175971,21 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readfirstlane_b32 s13, v25
+; GFX9-NEXT: v_readfirstlane_b32 s43, v2
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:280
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:264
+; GFX9-NEXT: v_readfirstlane_b32 s15, v3
+; GFX9-NEXT: v_readfirstlane_b32 s10, v4
+; GFX9-NEXT: v_readfirstlane_b32 s47, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v5
+; GFX9-NEXT: v_readfirstlane_b32 s59, v6
+; GFX9-NEXT: v_readfirstlane_b32 s14, v8
+; GFX9-NEXT: v_readfirstlane_b32 s12, v9
+; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s42, v13
; GFX9-NEXT: v_readfirstlane_b32 s46, v12
; GFX9-NEXT: v_readfirstlane_b32 s61, v11
@@ -175840,120 +175994,76 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
-; GFX9-NEXT: v_readfirstlane_b32 s13, v25
-; GFX9-NEXT: v_readfirstlane_b32 s40, v24
-; GFX9-NEXT: v_readfirstlane_b32 s60, v22
-; GFX9-NEXT: v_readfirstlane_b32 s43, v2
-; GFX9-NEXT: v_readfirstlane_b32 s6, v1
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; GFX9-NEXT: v_readfirstlane_b32 s59, v6
-; GFX9-NEXT: v_readfirstlane_b32 s15, v3
-; GFX9-NEXT: v_readfirstlane_b32 s10, v4
-; GFX9-NEXT: v_readfirstlane_b32 s47, v7
-; GFX9-NEXT: v_readfirstlane_b32 s8, v5
-; GFX9-NEXT: v_readfirstlane_b32 s12, v9
-; GFX9-NEXT: v_readfirstlane_b32 s14, v8
-; GFX9-NEXT: v_readfirstlane_b32 s63, v10
-; GFX9-NEXT: v_readfirstlane_b32 s11, v20
+; GFX9-NEXT: v_readfirstlane_b32 s41, v19
+; GFX9-NEXT: v_readfirstlane_b32 s6, v1
; GFX9-NEXT: v_readfirstlane_b32 s74, v30
; GFX9-NEXT: v_readfirstlane_b32 s44, v29
; GFX9-NEXT: v_readfirstlane_b32 s56, v28
; GFX9-NEXT: v_readfirstlane_b32 s62, v27
; GFX9-NEXT: v_readfirstlane_b32 s72, v26
-; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s60, v22
; GFX9-NEXT: v_readfirstlane_b32 s9, v21
-; GFX9-NEXT: v_readfirstlane_b32 s41, v19
; GFX9-NEXT: v_readfirstlane_b32 s76, v18
; GFX9-NEXT: v_readfirstlane_b32 s45, v17
; GFX9-NEXT: v_readfirstlane_b32 s58, v16
; GFX9-NEXT: v_readfirstlane_b32 s73, v15
; GFX9-NEXT: v_readfirstlane_b32 s75, v14
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:288
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:284
+; GFX9-NEXT: v_readfirstlane_b32 s40, v24
+; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s63, v10
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:260
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:324
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:320
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:312
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:308
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:304
-; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:296
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:280
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312
; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
-; GFX9-NEXT: s_waitcnt vmcnt(27)
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:272
-; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:268
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:260
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:256
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:252
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:304
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:248
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:240
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:232
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:228
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:224
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:220
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:216
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:212
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:208
; GFX9-NEXT: s_waitcnt vmcnt(0)
@@ -175962,173 +176072,204 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:196
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:192
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:188
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:184
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:180
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:176
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:172
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:172
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:168
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:168
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:164
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:160
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:156
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:152
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:152
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:148
; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:140
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:136
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:132
; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:124
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:124
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:120
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(30)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(29)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB93_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v25, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v48, s19
-; GFX9-NEXT: v_mov_b32_e32 v10, s17
-; GFX9-NEXT: v_perm_b32 v48, s18, v48, v25
-; GFX9-NEXT: v_perm_b32 v10, s16, v10, v25
-; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v48
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v51, v53
+; GFX9-NEXT: v_mov_b32_e32 v53, v32
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b32 s4, 0x6050400
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v0, v24, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v24, v59, v57, s5
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v52, v3
+; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
+; GFX9-NEXT: v_perm_b32 v12, v33, v26, s4
+; GFX9-NEXT: v_perm_b32 v26, v60, v45, s5
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v63, v42
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v25, 0xc0c0004
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v50, s21
+; GFX9-NEXT: v_perm_b32 v43, s20, v50, v25
+; GFX9-NEXT: v_mov_b32_e32 v50, s23
+; GFX9-NEXT: v_perm_b32 v50, s22, v50, v25
+; GFX9-NEXT: v_mov_b32_e32 v42, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v50
+; GFX9-NEXT: v_mov_b32_e32 v50, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: v_perm_b32 v3, s26, v3, v25
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v58, v4
+; GFX9-NEXT: v_mov_b32_e32 v56, v4
; GFX9-NEXT: v_perm_b32 v2, s24, v2, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s6
; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: v_perm_b32 v4, s7, v4, v25
-; GFX9-NEXT: v_mov_b32_e32 v63, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v42
-; GFX9-NEXT: v_mov_b32_e32 v42, v5
+; GFX9-NEXT: v_mov_b32_e32 v58, v5
; GFX9-NEXT: v_perm_b32 v3, s28, v3, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s8
-; GFX9-NEXT: v_mov_b32_e32 v48, s21
; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v4, s15
; GFX9-NEXT: v_perm_b32 v5, s10, v5, v25
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v23, s20, v48, v25
-; GFX9-NEXT: v_mov_b32_e32 v48, s23
+; GFX9-NEXT: v_mov_b32_e32 v34, v6
; GFX9-NEXT: v_perm_b32 v4, s43, v4, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s12
-; GFX9-NEXT: v_perm_b32 v48, s22, v48, v25
; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v5, s47
; GFX9-NEXT: v_perm_b32 v6, s14, v6, v25
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v48
-; GFX9-NEXT: v_mov_b32_e32 v48, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v7
+; GFX9-NEXT: v_mov_b32_e32 v49, v7
; GFX9-NEXT: v_perm_b32 v5, s59, v5, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s42
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v10, s19
; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v6, s61
; GFX9-NEXT: v_perm_b32 v7, s46, v7, v25
-; GFX9-NEXT: v_mov_b32_e32 v53, v47
-; GFX9-NEXT: v_mov_b32_e32 v47, v43
-; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: v_mov_b32_e32 v9, s17
+; GFX9-NEXT: v_perm_b32 v10, s18, v10, v25
+; GFX9-NEXT: v_mov_b32_e32 v46, v47
+; GFX9-NEXT: v_mov_b32_e32 v47, v44
+; GFX9-NEXT: v_mov_b32_e32 v44, v8
; GFX9-NEXT: v_perm_b32 v6, s63, v6, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s45
+; GFX9-NEXT: v_perm_b32 v9, s16, v9, v25
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v7, s73
; GFX9-NEXT: v_perm_b32 v8, s58, v8, v25
-; GFX9-NEXT: v_mov_b32_e32 v51, v61
-; GFX9-NEXT: v_mov_b32_e32 v61, v32
-; GFX9-NEXT: v_mov_b32_e32 v32, v9
+; GFX9-NEXT: v_or_b32_sdwa v0, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v7, s75, v7, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v10, 0x6050400
@@ -176136,243 +176277,242 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v8, s76
; GFX9-NEXT: v_perm_b32 v9, s9, v9, v10
-; GFX9-NEXT: v_or_b32_sdwa v1, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v1, v24, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v8, s41, v8, v10
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_mov_b32_e32 v22, s40
+; GFX9-NEXT: v_mov_b32_e32 v24, s40
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v9, s57
-; GFX9-NEXT: v_perm_b32 v22, s13, v22, v10
-; GFX9-NEXT: s_mov_b32 s4, 0x6050400
+; GFX9-NEXT: v_perm_b32 v24, s13, v24, v10
; GFX9-NEXT: v_perm_b32 v9, s60, v9, v25
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
-; GFX9-NEXT: v_or_b32_sdwa v9, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v22, s72
-; GFX9-NEXT: v_mov_b32_e32 v23, s56
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_perm_b32 v13, s74, v13, v25
+; GFX9-NEXT: v_perm_b32 v25, v35, v21, s5
+; GFX9-NEXT: v_or_b32_sdwa v9, v24, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v24, s72
+; GFX9-NEXT: v_mov_b32_e32 v43, s56
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v34, v36, s4
-; GFX9-NEXT: v_perm_b32 v22, s62, v22, v10
-; GFX9-NEXT: v_perm_b32 v10, s44, v23, v10
+; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: v_perm_b32 v24, s62, v24, v10
+; GFX9-NEXT: v_perm_b32 v10, s44, v43, v10
; GFX9-NEXT: v_or_b32_sdwa v11, v11, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v37, v26, s4
+; GFX9-NEXT: v_perm_b32 v15, v15, v22, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, v21
+; GFX9-NEXT: v_or_b32_sdwa v17, v25, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v13, v36, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v13, v49, v39, s4
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v13, v39, v38, s4
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v22, v27, v28, s5
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v22, v62, v55, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_perm_b32 v24, v27, v28, s5
+; GFX9-NEXT: v_or_b32_sdwa v13, v13, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v62, v61, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_perm_b32 v14, v14, v29, s4
-; GFX9-NEXT: v_perm_b32 v15, v15, v56, s4
-; GFX9-NEXT: v_or_b32_sdwa v14, v22, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v14, v24, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v22, v30, v31, s5
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v22, v38, v46, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
-; GFX9-NEXT: v_or_b32_sdwa v16, v22, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v22, v41, v57, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v18, v50, v18, s5
-; GFX9-NEXT: v_or_b32_sdwa v18, v22, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v22, v40, v59, s5
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v23, v35, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v19, v45, v19, s5
-; GFX9-NEXT: v_or_b32_sdwa v19, v22, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v20, v54, v20, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_or_b32_sdwa v17, v23, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v58
-; GFX9-NEXT: v_mov_b32_e32 v54, v42
-; GFX9-NEXT: v_mov_b32_e32 v50, v60
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v30, v31, s5
+; GFX9-NEXT: v_or_b32_sdwa v15, v15, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v37, v57, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v16, v24, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_perm_b32 v24, v41, v45, s5
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_perm_b32 v18, v48, v18, s5
+; GFX9-NEXT: v_or_b32_sdwa v18, v24, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v40, v52, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_perm_b32 v19, v54, v19, s5
+; GFX9-NEXT: v_or_b32_sdwa v19, v24, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v55, v20, s5
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v54, v58
+; GFX9-NEXT: v_mov_b32_e32 v38, v32
+; GFX9-NEXT: v_mov_b32_e32 v55, v42
+; GFX9-NEXT: v_mov_b32_e32 v48, v59
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v22, v60, v40, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_or_b32_sdwa v20, v22, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v22, v58, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_mov_b32_e32 v60, v40
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: v_perm_b32 v21, v44, v21, s5
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_mov_b32_e32 v58, v29
+; GFX9-NEXT: v_perm_b32 v25, v25, v53, s4
+; GFX9-NEXT: v_mov_b32_e32 v53, v51
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v23, v32, v23, s5
-; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v24, v33, v24, s5
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v25, v25, v61, s4
-; GFX9-NEXT: v_mov_b32_e32 v61, v51
-; GFX9-NEXT: v_mov_b32_e32 v33, v48
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_mov_b32_e32 v36, v28
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_mov_b32_e32 v32, v26
+; GFX9-NEXT: v_perm_b32 v24, v59, v41, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v20, v24, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v58, v60, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v21, v24, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v42, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v42, v63
+; GFX9-NEXT: v_mov_b32_e32 v59, v41
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v26, v47, v26, s5
+; GFX9-NEXT: v_mov_b32_e32 v47, v46
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_mov_b32_e32 v44, v27
+; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_mov_b32_e32 v34, v30
-; GFX9-NEXT: v_mov_b32_e32 v39, v31
-; GFX9-NEXT: v_mov_b32_e32 v47, v53
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v55, v35
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v57, v35
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v21, v43, v21, s5
-; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v43, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v44, s4
+; GFX9-NEXT: v_mov_b32_e32 v62, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v42, v22, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v42, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v63
+; GFX9-NEXT: v_perm_b32 v22, v34, v22, s5
+; GFX9-NEXT: v_or_b32_sdwa v22, v24, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v56, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v56, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v52, v23, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v52, v29
+; GFX9-NEXT: v_perm_b32 v23, v49, v23, s5
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v49, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v48, s4
+; GFX9-NEXT: v_perm_b32 v24, v24, v50, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v25, v51, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v53, s4
+; GFX9-NEXT: v_perm_b32 v26, v26, v46, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: v_mov_b32_e32 v46, v28
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v36, v28
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v46, v53
+; GFX9-NEXT: v_mov_b32_e32 v33, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v37, v28
+; GFX9-NEXT: v_mov_b32_e32 v58, v29
; GFX9-NEXT: v_perm_b32 v28, v28, v29, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v62, v29
+; GFX9-NEXT: v_mov_b32_e32 v34, v29
; GFX9-NEXT: v_perm_b32 v29, v29, v30, s4
; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v49, v30
-; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_mov_b32_e32 v39, v30
+; GFX9-NEXT: v_perm_b32 v30, v30, v32, s5
; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v51, v31
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v30
+; GFX9-NEXT: v_perm_b32 v30, v40, v30, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v48, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4
+; GFX9-NEXT: v_perm_b32 v31, v31, v32, s4
; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v61, v32
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v63, v31
-; GFX9-NEXT: v_perm_b32 v31, v38, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v37, v31, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v56, v35
-; GFX9-NEXT: v_perm_b32 v35, v53, v35, s5
+; GFX9-NEXT: v_perm_b32 v35, v35, v32, s5
+; GFX9-NEXT: v_mov_b32_e32 v50, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v31, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_mov_b64 s[4:5], 0
-; GFX9-NEXT: v_mov_b32_e32 v53, v57
-; GFX9-NEXT: v_mov_b32_e32 v35, v38
+; GFX9-NEXT: v_mov_b32_e32 v35, v37
+; GFX9-NEXT: v_mov_b32_e32 v37, v40
; GFX9-NEXT: s_branch .LBB93_3
; GFX9-NEXT: .LBB93_2:
; GFX9-NEXT: v_mov_b32_e32 v39, v51
-; GFX9-NEXT: v_mov_b32_e32 v51, v53
-; GFX9-NEXT: v_mov_b32_e32 v50, v60
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v52
+; GFX9-NEXT: v_mov_b32_e32 v48, v59
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v46, v0
-; GFX9-NEXT: v_mov_b32_e32 v56, v22
-; GFX9-NEXT: v_mov_b32_e32 v34, v6
-; GFX9-NEXT: v_mov_b32_e32 v62, v2
-; GFX9-NEXT: v_mov_b32_e32 v55, v1
-; GFX9-NEXT: v_mov_b32_e32 v49, v23
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v43, v21
+; GFX9-NEXT: v_mov_b32_e32 v57, v0
+; GFX9-NEXT: v_mov_b32_e32 v61, v1
+; GFX9-NEXT: v_mov_b32_e32 v62, v10
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: v_mov_b32_e32 v33, v25
+; GFX9-NEXT: v_mov_b32_e32 v55, v3
; GFX9-NEXT: v_mov_b32_e32 v54, v5
-; GFX9-NEXT: v_mov_b32_e32 v45, v4
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB93_3: ; %Flow
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB93_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v57
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v0, v0, v56, s5
-; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v50, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v0, 3, v63
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s5
-; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
+; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v0, 3, v51
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
+; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
+; GFX9-NEXT: v_perm_b32 v0, v0, v38, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s74, s74, 3
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: s_add_i32 s56, s56, 3
@@ -176394,81 +176534,73 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: s_add_i32 s22, s22, 3
+; GFX9-NEXT: v_mov_b32_e32 v32, s23
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
-; GFX9-NEXT: v_perm_b32 v0, v0, v49, s5
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v34
-; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_add_u32_sdwa v37, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: v_perm_b32 v0, v0, v34, s5
; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
-; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
-; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
+; GFX9-NEXT: v_perm_b32 v0, v0, v33, s5
+; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v56
; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v44
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
+; GFX9-NEXT: v_mov_b32_e32 v33, s17
; GFX9-NEXT: v_mov_b32_e32 v34, s19
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v36, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v0, 3, v42
-; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v44, s5
; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v0
; GFX9-NEXT: v_add_u32_e32 v0, 3, v47
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v37, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_sdwa v26, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v26, v37, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v27, v36, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v28, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v29, v35, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v37, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v53
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_or_b32_sdwa v30, v35, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_sdwa v38, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v25, v38, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, s17
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v39, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v24, v39, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
@@ -176476,131 +176608,129 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v63, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v23, v63, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v49, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v22, v49, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v22, v62, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v21, v62, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
+; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v21, v50, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v50
-; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v48
+; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
; GFX9-NEXT: v_add_u32_sdwa v51, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v20, v51, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v52, s5
; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v19, v52, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v53, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v45, s5
; GFX9-NEXT: v_add_u32_sdwa v53, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v18, v53, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v57, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
; GFX9-NEXT: v_add_u32_sdwa v54, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v17, v54, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: v_perm_b32 v0, v0, v40, s5
; GFX9-NEXT: v_add_u32_sdwa v55, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v16, v55, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v1, 3, v41
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v40, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v15, v40, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v41, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v14, v41, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
@@ -176608,42 +176738,42 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v42, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v13, v42, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v43, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0
-; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0
; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0
; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v33
; GFX9-NEXT: v_or_b32_sdwa v12, v43, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0
; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v2, 3, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v44, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -176703,11 +176833,13 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: v_add_u32_sdwa v61, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v1, s21
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0
-; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1
+; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v2, v61, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v3, v60, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v4, v59, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -176718,6 +176850,8 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: v_or_b32_sdwa v9, v46, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v10, v45, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v11, v44, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: .LBB93_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -177788,207 +177922,100 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v31, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v32, v2
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v30
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v29
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v27
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v18
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v17
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v16
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v14
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v13
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v12
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v11
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v6
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v4
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v31
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; kill: killed $vgpr2
@@ -178007,487 +178034,18 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr4
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; kill: killed $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; kill: killed $vgpr43
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; kill: killed $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v52
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
-; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_cbranch_execz .LBB94_2
-; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_mov_b32_e32 v43, v41
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v45
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v51, v2, v31
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v50, v2, v31
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v41
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v48, v5, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40
-; SI-NEXT: v_mov_b32_e32 v40, v54
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v49, v5, v31
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v38, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v54
-; SI-NEXT: v_or_b32_e32 v39, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v9
-; SI-NEXT: v_mov_b32_e32 v54, v53
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v36, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53
-; SI-NEXT: v_or_b32_e32 v37, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v51, v1, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v34, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
-; SI-NEXT: v_or_b32_e32 v35, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v51, v1, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v32, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_or_b32_e32 v33, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v51, v1, 8
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v63, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v15
-; SI-NEXT: v_or_b32_e32 v31, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v2, v50, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v61, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v14
-; SI-NEXT: v_or_b32_e32 v62, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v2, v50, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v59, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13
-; SI-NEXT: v_or_b32_e32 v60, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v2, v50, 8
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v20, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v12
-; SI-NEXT: v_or_b32_e32 v58, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v49, v48, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v23
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr23
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v19, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v11
-; SI-NEXT: v_or_b32_e32 v56, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v49, v48, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v25
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v18, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; SI-NEXT: v_or_b32_e32 v46, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v49, v48, 8
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v27
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v17, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v9
-; SI-NEXT: v_or_b32_e32 v44, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v39, v38, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v29
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: v_or_b32_e32 v16, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; SI-NEXT: v_or_b32_e32 v42, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v39, v38, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v52
-; SI-NEXT: v_or_b32_e32 v7, v5, v3
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v47
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; SI-NEXT: v_or_b32_e32 v55, v3, v4
-; SI-NEXT: v_alignbit_b32 v3, v39, v38, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v37, v36, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v37, v36, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v37, v36, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v35, v34, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v35, v34, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v35, v34, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v33, v32, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v33, v32, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v33, v32, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v31, v63, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v31, v63, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v31, v63, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v62, v61, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v62, v61, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v62, v61, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v60, v59, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v60, v59, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v60, v59, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v58, v20, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v58, v20, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v58, v20, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v56, v19, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v56, v19, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v56, v19, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v46, v18, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v46, v18, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v46, v18, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v44, v17, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v44, v17, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v44, v17, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v42, v16, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v42, v16, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v42, v16, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v55, v7, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v55, v7, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v55, v7, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v49
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v39
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v37
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v35
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v31
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v62
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v60
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v58
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v56
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v46
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v44
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v42
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v55
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v45, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v43, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v41, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v40, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v54, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v57, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v6, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v15, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v14, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v13, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v12, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v11, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v10, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v9, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v8, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v5, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
@@ -178527,50 +178085,637 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v52
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
+; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
+; SI-NEXT: s_cbranch_execz .LBB94_2
+; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_mov_b32_e32 v43, v41
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v45
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v51, v2, v31
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v50, v2, v31
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v41
+; SI-NEXT: v_mov_b32_e32 v41, v40
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v2, v2, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v48, v5, v31
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v40
+; SI-NEXT: v_or_b32_e32 v49, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v7
+; SI-NEXT: v_mov_b32_e32 v40, v54
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v38, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v54
+; SI-NEXT: v_or_b32_e32 v39, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v9
+; SI-NEXT: v_mov_b32_e32 v54, v53
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; SI-NEXT: v_alignbit_b32 v3, v51, v1, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v36, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v53
+; SI-NEXT: v_or_b32_e32 v37, v5, v6
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v11
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; SI-NEXT: v_alignbit_b32 v3, v51, v1, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v34, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v53
+; SI-NEXT: v_or_b32_e32 v35, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v32, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; SI-NEXT: v_or_b32_e32 v33, v5, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v5, v51, v1, 8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v63, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v14
+; SI-NEXT: v_or_b32_e32 v31, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v2, v50, 24
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v17
+; SI-NEXT: v_bfe_u32 v3, v3, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v14, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v13, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v12, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v11, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v10, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v9, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v8, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v3, v7, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v61, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v13
+; SI-NEXT: v_or_b32_e32 v62, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v2, v50, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v19
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v59, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v12
+; SI-NEXT: v_or_b32_e32 v60, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v2, v50, 8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v57, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v22
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v11
+; SI-NEXT: v_or_b32_e32 v58, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v49, v48, 24
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v23
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v19, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v24
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v10
+; SI-NEXT: v_or_b32_e32 v56, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v49, v48, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v25
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v18, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v9
+; SI-NEXT: v_or_b32_e32 v46, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v49, v48, 8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v27
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v17, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v8
+; SI-NEXT: v_or_b32_e32 v44, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v39, v38, 24
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v29
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; SI-NEXT: v_or_b32_e32 v16, v5, v6
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; SI-NEXT: v_or_b32_e32 v42, v5, v6
+; SI-NEXT: v_alignbit_b32 v5, v39, v38, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_or_b32_e32 v15, v4, v5
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v52
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; SI-NEXT: v_or_b32_e32 v55, v4, v5
+; SI-NEXT: v_alignbit_b32 v4, v39, v38, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v37, v36, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v37, v36, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v37, v36, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v35, v34, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v35, v34, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v35, v34, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v33, v32, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v33, v32, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v33, v32, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v31, v63, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v31, v63, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v31, v63, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v62, v61, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v62, v61, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v62, v61, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v60, v59, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v60, v59, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v60, v59, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v58, v57, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v58, v57, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v58, v57, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v56, v19, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v56, v19, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v4, v56, v19, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v46, v18, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v46, v18, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v4, v46, v18, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v44, v17, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v44, v17, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v4, v44, v17, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v42, v16, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v42, v16, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v42, v16, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v55, v15, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v55, v15, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v4, v55, v15, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v51
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v2
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v49
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v39
+; SI-NEXT: v_bfe_u32 v3, v6, 8, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v37
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v35
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v33
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v31
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v62
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v60
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v58
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v56
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v46
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v44
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v42
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v55
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v4, v45, 8, 8
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v4, v43, 8, 8
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v4, v41, 8, 8
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v4, v40, 8, 8
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v4, v54, 8, 8
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_bfe_u32 v4, v53, 8, 8
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: v_mov_b32_e32 v45, v16
-; SI-NEXT: v_mov_b32_e32 v6, v20
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v53, v54
; SI-NEXT: v_mov_b32_e32 v54, v40
; SI-NEXT: v_mov_b32_e32 v40, v41
; SI-NEXT: v_mov_b32_e32 v41, v43
+; SI-NEXT: v_mov_b32_e32 v43, v15
; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: .LBB94_2: ; %Flow
-; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: s_xor_b64 exec, exec, s[4:5]
+; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB94_4
; SI-NEXT: ; %bb.3: ; %cmp.true
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v47
+; SI-NEXT: v_mov_b32_e32 v51, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
+; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
+; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v52
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v21
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v43, v2, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v47
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v52
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -178579,7 +178724,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
; SI-NEXT: v_or_b32_e32 v55, v1, v2
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v29
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -178599,7 +178744,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
; SI-NEXT: v_or_b32_e32 v42, v1, v2
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v27
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -178619,7 +178764,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
; SI-NEXT: v_or_b32_e32 v44, v1, v2
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v25
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -178639,7 +178784,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; SI-NEXT: v_or_b32_e32 v46, v1, v2
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v23
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -178649,462 +178794,448 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v26, v2, v1
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v1, v24
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v3
; SI-NEXT: v_cvt_f16_f32_e32 v23, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
-; SI-NEXT: v_or_b32_e32 v56, v1, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v23
+; SI-NEXT: v_or_b32_e32 v56, v1, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v21
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v22
-; SI-NEXT: v_or_b32_e32 v6, v3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v22
+; SI-NEXT: v_or_b32_e32 v57, v4, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v21
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v17
-; SI-NEXT: v_or_b32_e32 v58, v2, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v22
+; SI-NEXT: v_or_b32_e32 v58, v2, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v19
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v59, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v20
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v20
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v19
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v60, v3, v1
+; SI-NEXT: v_or_b32_e32 v60, v4, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v61, v4, v2
+; SI-NEXT: v_or_b32_e32 v61, v17, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v18
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v15
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v17, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
-; SI-NEXT: v_or_b32_e32 v62, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v17
+; SI-NEXT: v_or_b32_e32 v62, v1, v4
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v16
-; SI-NEXT: v_or_b32_e32 v63, v3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v15
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v15, v16
+; SI-NEXT: v_or_b32_e32 v63, v4, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v15, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v16, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v11
-; SI-NEXT: v_or_b32_e32 v31, v2, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v16
+; SI-NEXT: v_or_b32_e32 v31, v2, v4
; SI-NEXT: v_cvt_f32_f16_e32 v2, v13
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v14
; SI-NEXT: v_or_b32_e32 v32, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v13, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v14
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v13
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v33, v4, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v33, v3, v1
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v3
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v57
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v34, v4, v2
+; SI-NEXT: v_or_b32_e32 v34, v11, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v12
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v9
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v35, v1, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_or_b32_e32 v35, v1, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v9
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v53
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v10
-; SI-NEXT: v_or_b32_e32 v36, v3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v10
+; SI-NEXT: v_or_b32_e32 v36, v4, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v53, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v5
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v37, v2, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53
+; SI-NEXT: v_or_b32_e32 v37, v2, v4
; SI-NEXT: v_cvt_f32_f16_e32 v2, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v54
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v54
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v54, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v8
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v54, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v8
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v38, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v54
-; SI-NEXT: v_or_b32_e32 v39, v3, v1
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v39, v4, v1
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v1, v40
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v40, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v48, v4, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v48, v5, v2
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v49, v1, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v49, v1, v4
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v41
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v41, v2
-; SI-NEXT: v_or_b32_e32 v50, v3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v41
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v6
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_or_b32_e32 v50, v4, v1
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v41
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v51
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
+; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_or_b32_e32 v1, v3, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v7
-; SI-NEXT: v_or_b32_e32 v51, v4, v3
-; SI-NEXT: v_alignbit_b32 v3, v51, v1, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
+; SI-NEXT: v_or_b32_e32 v1, v4, v1
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v7
+; SI-NEXT: v_or_b32_e32 v51, v5, v4
+; SI-NEXT: v_alignbit_b32 v4, v51, v1, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v51, v1, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v51, v1, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v51, v1, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v51, v1, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v2, v50, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v2, v50, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v2, v50, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v2, v50, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v2, v50, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v2, v50, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v49, v48, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v49, v48, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v49, v48, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v49, v48, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v49, v48, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v49, v48, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v39, v38, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v39, v38, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v39, v38, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v39, v38, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v39, v38, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v39, v38, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v37, v36, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v37, v36, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v37, v36, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v37, v36, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v37, v36, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v37, v36, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v35, v34, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v35, v34, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v35, v34, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v35, v34, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v35, v34, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v35, v34, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v33, v32, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v33, v32, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v33, v32, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v33, v32, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v33, v32, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v33, v32, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v31, v63, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v31, v63, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v31, v63, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v31, v63, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v31, v63, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v31, v63, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v62, v61, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v62, v61, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v62, v61, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v62, v61, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v62, v61, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v62, v61, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v60, v59, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v60, v59, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v60, v59, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v60, v59, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v60, v59, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v60, v59, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v58, v6, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v58, v57, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v58, v6, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v58, v57, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v58, v6, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v58, v57, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v56, v26, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v56, v26, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v56, v26, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v56, v26, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v56, v26, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v56, v26, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v46, v28, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v46, v28, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v46, v28, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v46, v28, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v46, v28, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v46, v28, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v44, v30, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v44, v30, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v44, v30, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v44, v30, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v44, v30, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v44, v30, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v42, v45, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v42, v45, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v42, v45, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v42, v45, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v42, v45, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v42, v45, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v55, v43, 24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v55, v43, 24
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v3, v55, v43, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v3, v55, v43, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v55, v43, 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v4, v55, v43, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v51
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v49
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v2
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v39
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v49
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v37
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v39
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v35
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v37
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v35
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v31
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v33
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v62
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v31
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v60
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v62
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v58
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v60
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v56
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v58
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v46
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v56
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v44
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v46
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v55
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v44
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v42
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v55
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v3, v7, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v4, v7, 8, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v41, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v4, v41, 8, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v40, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v4, v40, 8, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v54, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v4, v54, 8, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v53, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v4, v53, 8, 8
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v3, v57, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v3, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v13, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v3, v15, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v16, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v17, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v19, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v3, v21, 8, 8
+; SI-NEXT: v_bfe_u32 v3, v22, 8, 8
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
@@ -179113,107 +179244,106 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v25, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v27, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v29, 8, 8
-; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v42
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_bfe_u32 v3, v52, 8, 8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: .LBB94_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
-; SI-NEXT: v_or_b32_e32 v1, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v3
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_or_b32_e32 v1, v1, v4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
-; SI-NEXT: v_or_b32_e32 v1, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v3
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_or_b32_e32 v1, v1, v4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
-; SI-NEXT: v_or_b32_e32 v1, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v3
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_or_b32_e32 v1, v1, v4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v41
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v3
+; SI-NEXT: v_or_b32_e32 v2, v4, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v48
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v3
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_or_b32_e32 v2, v4, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -179227,14 +179357,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v38
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179244,8 +179374,8 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -179259,14 +179389,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v36
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179276,8 +179406,8 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v37
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -179291,14 +179421,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v34
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179308,29 +179438,31 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179340,10 +179472,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179357,14 +179489,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179374,10 +179506,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179391,14 +179523,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v61
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179411,7 +179543,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v62
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179425,7 +179557,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v59
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
@@ -179442,10 +179574,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v60
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179461,12 +179593,12 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v57
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179476,7 +179608,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
@@ -179494,15 +179626,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179512,7 +179644,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
@@ -179530,15 +179662,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -179548,10 +179680,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v46
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179566,15 +179698,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -179584,10 +179716,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v44
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179601,14 +179733,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v45
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179618,31 +179750,31 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -179652,10 +179784,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v55
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -179707,993 +179839,1028 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, v30
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v14
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v52, v29
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v52
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v11
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v9
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v1
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v53
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v28
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v26
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v24
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v22
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v19
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v49
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v29
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v27
+; VI-NEXT: v_mov_b32_e32 v51, v28
+; VI-NEXT: v_mov_b32_e32 v28, v2
+; VI-NEXT: v_mov_b32_e32 v2, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v10
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v50, v27
+; VI-NEXT: v_mov_b32_e32 v27, v1
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v29
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v13
; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v50
+; VI-NEXT: v_mov_b32_e32 v60, v22
+; VI-NEXT: v_mov_b32_e32 v59, v21
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v11
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v25
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v16
+; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v12
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v30
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v51
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v26
; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v21
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v48
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr46
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr51
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; kill: killed $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v24
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v60
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v59
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v17
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v27
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v55
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v54
+; VI-NEXT: ; kill: killed $vgpr0
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr21
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr38
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB94_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_mov_b32_e32 v31, v15
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v27, v63
-; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v63, v27
-; VI-NEXT: v_mov_b32_e32 v27, v55
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v49
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v49
-; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v53
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v53
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v18
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_lshrrev_b32_e32 v13, 24, v16
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v16
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v15
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, v31
-; VI-NEXT: s_waitcnt vmcnt(7)
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v24
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v14
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v14
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v13
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v12
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v12
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v11
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v10
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v9
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v8
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v7
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v6
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v5
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v4
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v3
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v1
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v52
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v29
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v29
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v28
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v26
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v26
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v25
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v24
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v23
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
-; VI-NEXT: v_mov_b32_e32 v23, v39
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v24, v50
-; VI-NEXT: v_mov_b32_e32 v50, v33
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v21
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v20
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v19
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v17
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[48:49]
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, v27
-; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[52:53]
-; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[28:29]
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[25:26]
-; VI-NEXT: v_mov_b32_e32 v27, v26
-; VI-NEXT: v_mov_b32_e32 v26, v25
-; VI-NEXT: v_mov_b32_e32 v25, v40
+; VI-NEXT: v_lshrrev_b32_e32 v0, 24, v16
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v16
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v15
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 24, v14
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v14
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v13
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 24, v12
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v12
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v11
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v18
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v17
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[38:39], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[38:39], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[38:39], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[38:39], 24, v[59:60]
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[27:28]
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v8
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v1
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v1
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v0
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v7
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v6
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v6
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v5
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v4
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[0:1]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v4
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v3
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v28
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v28
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v27
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v55
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v55
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v54
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v30
+; VI-NEXT: v_mov_b32_e32 v0, v49
+; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v30
+; VI-NEXT: v_mov_b32_e32 v49, v0
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[54:55]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v29
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v51
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v51
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v50
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v26
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v26
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[50:51]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v25
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v24
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v24
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v23
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v60
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v60
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v59
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v20
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v20
+; VI-NEXT: v_mov_b32_e32 v0, v40
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[21:22]
-; VI-NEXT: v_mov_b32_e32 v40, v25
-; VI-NEXT: v_mov_b32_e32 v25, v26
-; VI-NEXT: v_mov_b32_e32 v26, v27
-; VI-NEXT: v_mov_b32_e32 v27, v43
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v19
+; VI-NEXT: v_mov_b32_e32 v40, v0
+; VI-NEXT: v_mov_b32_e32 v0, v43
; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[17:18]
-; VI-NEXT: v_mov_b32_e32 v28, v34
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v22, v51
-; VI-NEXT: v_mov_b32_e32 v51, v37
-; VI-NEXT: v_mov_b32_e32 v43, v27
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v48
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v18
+; VI-NEXT: v_mov_b32_e32 v43, v0
; VI-NEXT: .LBB94_2: ; %Flow
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB94_4
; VI-NEXT: ; %bb.3: ; %cmp.true
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v31, 0x200
-; VI-NEXT: v_add_f16_sdwa v13, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_add_f16_e32 v18, 0x200, v18
-; VI-NEXT: v_add_f16_sdwa v13, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v44, v18, v29
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_add_f16_e32 v17, 0x200, v17
-; VI-NEXT: v_add_f16_sdwa v13, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v43, v17, v29
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: v_add_f16_sdwa v47, v51, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v51, 0x200, v51
+; VI-NEXT: v_add_f16_sdwa v13, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v30, 0x200, v30
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: v_add_f16_sdwa v17, v27, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
+; VI-NEXT: v_add_f16_sdwa v18, v3, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
+; VI-NEXT: v_add_f16_sdwa v32, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
+; VI-NEXT: v_add_f16_sdwa v52, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
+; VI-NEXT: v_add_f16_sdwa v14, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_add_f16_sdwa v0, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
+; VI-NEXT: v_or_b32_e32 v44, v23, v0
+; VI-NEXT: v_add_f16_sdwa v0, v22, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: v_add_f16_sdwa v33, v25, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_add_f16_sdwa v11, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_add_f16_sdwa v1, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v15, 0x200, v15
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v43, v22, v0
+; VI-NEXT: v_add_f16_sdwa v0, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_add_f16_sdwa v13, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v46, v20, v0
+; VI-NEXT: v_add_f16_sdwa v0, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_or_b32_e32 v46, v20, v29
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v15, v17
-; VI-NEXT: v_mov_b32_e32 v16, v18
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: v_add_f16_sdwa v38, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
-; VI-NEXT: v_add_f16_sdwa v32, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_add_f16_sdwa v22, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
-; VI-NEXT: v_add_f16_sdwa v23, v12, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
-; VI-NEXT: v_or_b32_e32 v45, v19, v29
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_add_f16_sdwa v14, v49, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v49, 0x200, v49
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_add_f16_sdwa v24, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, 0x200, v18
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_add_f16_sdwa v33, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_f16_sdwa v13, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_or_b32_e32 v40, v20, v29
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v39, v19, v29
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_f16_sdwa v33, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_f16_sdwa v13, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_or_b32_e32 v57, v20, v29
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
-; VI-NEXT: v_add_f16_sdwa v13, v26, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v45, v19, v0
+; VI-NEXT: v_add_f16_sdwa v0, v60, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_add_f16_e32 v60, 0x200, v60
+; VI-NEXT: v_or_b32_e32 v40, v60, v0
+; VI-NEXT: v_add_f16_sdwa v0, v59, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v59, 0x200, v59
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_add_f16_sdwa v19, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
+; VI-NEXT: v_or_b32_e32 v39, v59, v0
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_add_f16_sdwa v0, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
+; VI-NEXT: v_or_b32_e32 v57, v24, v0
+; VI-NEXT: v_add_f16_sdwa v0, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_add_f16_sdwa v24, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
+; VI-NEXT: v_or_b32_e32 v56, v23, v0
+; VI-NEXT: v_add_f16_sdwa v0, v26, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; VI-NEXT: v_add_f16_e32 v26, 0x200, v26
-; VI-NEXT: v_add_f16_sdwa v33, v25, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v56, v19, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_or_b32_e32 v22, v26, v29
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
-; VI-NEXT: v_add_f16_sdwa v13, v28, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v38, v26, v0
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v33
+; VI-NEXT: v_add_f16_sdwa v33, v50, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v50, 0x200, v50
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_sdwa v23, v28, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v28, 0x200, v28
-; VI-NEXT: v_add_f16_sdwa v33, v27, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v26, v51
+; VI-NEXT: v_mov_b32_e32 v20, v27
+; VI-NEXT: v_mov_b32_e32 v21, v28
+; VI-NEXT: v_or_b32_e32 v37, v25, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v47
+; VI-NEXT: v_or_b32_e32 v59, v51, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v33
+; VI-NEXT: v_or_b32_e32 v58, v50, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v13
+; VI-NEXT: v_add_f16_sdwa v33, v29, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v29, 0x200, v29
+; VI-NEXT: v_or_b32_e32 v36, v30, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v33
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v26, v2, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
-; VI-NEXT: v_or_b32_e32 v21, v25, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_or_b32_e32 v59, v28, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v13, v53, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v53, 0x200, v53
-; VI-NEXT: v_add_f16_sdwa v33, v52, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v52, 0x200, v52
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v28, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
-; VI-NEXT: v_add_f16_sdwa v25, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_or_b32_e32 v58, v27, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_add_f16_sdwa v13, v1, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
-; VI-NEXT: v_add_f16_sdwa v27, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v36, v53, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
-; VI-NEXT: v_or_b32_e32 v35, v52, v29
-; VI-NEXT: v_add_f16_sdwa v33, v48, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v48, 0x200, v48
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v14
-; VI-NEXT: v_or_b32_e32 v34, v49, v29
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
-; VI-NEXT: v_add_f16_sdwa v53, v3, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v33, v48, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v26
-; VI-NEXT: v_or_b32_e32 v42, v2, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_or_b32_e32 v41, v1, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v27
-; VI-NEXT: v_or_b32_e32 v61, v4, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v53
-; VI-NEXT: v_or_b32_e32 v60, v3, v29
-; VI-NEXT: v_add_f16_sdwa v13, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v28
-; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
-; VI-NEXT: v_or_b32_e32 v55, v6, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_or_b32_e32 v54, v5, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v25
-; VI-NEXT: v_or_b32_e32 v63, v8, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v38
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v62, v7, v29
-; VI-NEXT: v_add_f16_sdwa v13, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v32
-; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
-; VI-NEXT: v_or_b32_e32 v52, v10, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v51, v9, v29
-; VI-NEXT: v_add_f16_sdwa v13, v11, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23
-; VI-NEXT: v_add_f16_e32 v11, 0x200, v11
-; VI-NEXT: v_or_b32_e32 v50, v12, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v49, v11, v29
-; VI-NEXT: v_add_f16_sdwa v13, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, 0x200, v17
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v24
-; VI-NEXT: v_or_b32_e32 v48, v18, v29
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[62:63]
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v47, v17, v29
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v35, v29, v0
+; VI-NEXT: v_add_f16_sdwa v0, v55, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v55, 0x200, v55
+; VI-NEXT: v_add_f16_sdwa v33, v54, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v54, 0x200, v54
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v25, v50
+; VI-NEXT: v_or_b32_e32 v34, v55, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v33
+; VI-NEXT: v_or_b32_e32 v33, v54, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v23
+; VI-NEXT: v_or_b32_e32 v42, v28, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v17
+; VI-NEXT: v_or_b32_e32 v41, v27, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v24
+; VI-NEXT: v_or_b32_e32 v61, v4, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v18
+; VI-NEXT: v_or_b32_e32 v60, v3, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v19
+; VI-NEXT: v_or_b32_e32 v55, v6, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
+; VI-NEXT: v_or_b32_e32 v54, v5, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v52
+; VI-NEXT: v_or_b32_e32 v63, v8, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v14
+; VI-NEXT: v_or_b32_e32 v62, v7, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v22
+; VI-NEXT: v_or_b32_e32 v51, v10, v0
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
+; VI-NEXT: v_mov_b32_e32 v27, v29
+; VI-NEXT: v_mov_b32_e32 v28, v30
+; VI-NEXT: v_or_b32_e32 v50, v9, v0
+; VI-NEXT: v_add_f16_sdwa v9, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v16, 0x200, v16
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
+; VI-NEXT: v_or_b32_e32 v49, v16, v0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; VI-NEXT: v_or_b32_e32 v48, v15, v0
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v1, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_f16_sdwa v37, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, 0x200, v18
-; VI-NEXT: v_add_f16_sdwa v31, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, 0x200, v17
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v37
-; VI-NEXT: v_or_b32_e32 v30, v18, v29
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v31
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v30
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v17, v29
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v29
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v48
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v47
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v50
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v49
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v51
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v62
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v55
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v54
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v61
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v60
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v41
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v59
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v58
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v22
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v21
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[47:48]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v56
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v40
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v39
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[49:50]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v46
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v45
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[56:57]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v43
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[51:52]
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v63
-; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[54:55]
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[60:61]
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v42
+; VI-NEXT: v_add_f16_sdwa v10, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v16, 0x200, v16
+; VI-NEXT: v_add_f16_e32 v15, 0x200, v15
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
+; VI-NEXT: v_or_b32_e32 v30, v16, v0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v29, v15, v0
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v12, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_f16_sdwa v53, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v16, 0x200, v16
+; VI-NEXT: v_add_f16_e32 v15, 0x200, v15
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v53
+; VI-NEXT: v_or_b32_e32 v1, v16, v0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v1
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v63
+; VI-NEXT: v_or_b32_e32 v0, v15, v0
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v0
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[0:1]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v30
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v29
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v49
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v48
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[48:49]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v51
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v50
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[50:51]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v62
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[62:63]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v55
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v54
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[54:55]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v61
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v60
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v42
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v34
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v33
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[33:34]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v36
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v35
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[35:36]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v59
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v58
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[58:59]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v38
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v37
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[37:38]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v57
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v56
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[56:57]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v40
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v39
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[38:39], 24, v[39:40]
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v46
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v45
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[45:46]
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[60:61]
+; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[41:42]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v13, v37, 8, 8
-; VI-NEXT: v_mov_b32_e32 v63, v23
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v44
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v43
; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[43:44]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v13, v24, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[39:40]
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[45:46]
-; VI-NEXT: v_mov_b32_e32 v43, v32
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v13, v63, 8, 8
-; VI-NEXT: v_mov_b32_e32 v40, v25
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v13, v43, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v13, v40, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v55, v28
-; VI-NEXT: v_lshrrev_b64 v[28:29], 24, v[33:34]
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[35:36]
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v60, v26
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v52
-; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v36
-; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[58:59]
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v57
-; VI-NEXT: v_mov_b32_e32 v32, v53
-; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v47, v27
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v18, v16
-; VI-NEXT: v_mov_b32_e32 v17, v15
-; VI-NEXT: v_mov_b32_e32 v15, v31
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v34
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v33
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v44
-; VI-NEXT: v_bfe_u32 v44, v55, 8, 8
-; VI-NEXT: v_bfe_u32 v46, v47, 8, 8
-; VI-NEXT: v_bfe_u32 v35, v60, 8, 8
-; VI-NEXT: v_bfe_u32 v22, v14, 8, 8
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v43, v52
+; VI-NEXT: v_mov_b32_e32 v52, v10
+; VI-NEXT: v_bfe_u32 v0, v53, 8, 8
+; VI-NEXT: v_mov_b32_e32 v30, v28
+; VI-NEXT: v_mov_b32_e32 v29, v27
+; VI-NEXT: v_mov_b32_e32 v28, v21
+; VI-NEXT: v_mov_b32_e32 v27, v20
+; VI-NEXT: v_mov_b32_e32 v21, v9
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v52, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v21, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v22, 8, 8
+; VI-NEXT: v_mov_b32_e32 v40, v19
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v43, 8, 8
+; VI-NEXT: v_mov_b32_e32 v46, v47
+; VI-NEXT: v_mov_b32_e32 v47, v24
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v40, 8, 8
+; VI-NEXT: v_mov_b32_e32 v36, v23
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v47, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v36, 8, 8
+; VI-NEXT: v_mov_b32_e32 v44, v13
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v51, v26
+; VI-NEXT: v_mov_b32_e32 v50, v25
+; VI-NEXT: v_mov_b32_e32 v9, v17
+; VI-NEXT: v_mov_b32_e32 v49, v11
+; VI-NEXT: v_mov_b32_e32 v10, v18
+; VI-NEXT: v_mov_b32_e32 v62, v53
+; VI-NEXT: v_mov_b32_e32 v53, v14
+; VI-NEXT: v_mov_b32_e32 v57, v22
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_bfe_u32 v24, v13, 8, 8
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(8)
-; VI-NEXT: v_bfe_u32 v58, v59, 8, 8
-; VI-NEXT: s_waitcnt vmcnt(7)
-; VI-NEXT: v_bfe_u32 v56, v57, 8, 8
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_bfe_u32 v13, v13, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_bfe_u32 v13, v13, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_bfe_u32 v13, v13, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_bfe_u32 v13, v13, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v22, v35, 8, 8
+; VI-NEXT: v_bfe_u32 v0, v56, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v44, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v46, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v58, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v61, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v63, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v0, v34, 8, 8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; VI-NEXT: .LBB94_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v30, v32, v54, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v10, v10, v50, s4
-; VI-NEXT: v_perm_b32 v8, v8, v51, s4
-; VI-NEXT: v_perm_b32 v2, v2, v61, s4
-; VI-NEXT: v_perm_b32 v18, v18, v45, s4
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v29, v13, v41, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v32, v38, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v1, v1, v29
+; VI-NEXT: v_perm_b32 v0, v9, v41, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v8, v8, v31, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_perm_b32 v37, v37, v42, s4
+; VI-NEXT: v_perm_b32 v39, v45, v39, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v27, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v3, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v28, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v28, v10, v48, s4
+; VI-NEXT: v_or_b32_e32 v0, v1, v0
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v4, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v3, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v13, v62, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v4, v4, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v25, v32, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v5, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v5, v5, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v6, v6, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v6, v6, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v26, v53, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v7, v7, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v7, v7, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v13, v33, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v49, v9, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v9, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v9, v9, v11, s4
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v10, v10, v11, s4
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v49, v13, v33, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v11, v12, s4
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v11, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v12, v12, v13, s4
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v50, v13, v33, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v51, v15, v33, s4
-; VI-NEXT: v_perm_b32 v13, v13, v16, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v48, v13, v14, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v14, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v14, v14, v16, s4
+; VI-NEXT: v_perm_b32 v49, v15, v16, s4
; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v34, s4
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v17, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v16, v34, s4
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v34, s4
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v60, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v30
-; VI-NEXT: v_or_b32_e32 v1, v3, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v47, v46, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v4, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v31
-; VI-NEXT: v_or_b32_e32 v1, v5, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v55, v44, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v6, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
-; VI-NEXT: v_or_b32_e32 v1, v7, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v33, v33, v42, s4
-; VI-NEXT: s_waitcnt vmcnt(8)
-; VI-NEXT: v_perm_b32 v34, v34, v39, s4
+; VI-NEXT: v_perm_b32 v16, v16, v17, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v40, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v8, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
-; VI-NEXT: v_or_b32_e32 v1, v9, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v17, v19, s4
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v18, v18, v19, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v36, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v27, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v28
+; VI-NEXT: v_or_b32_e32 v0, v3, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v47, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v4, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v25
+; VI-NEXT: v_or_b32_e32 v0, v5, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v40, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v6, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v26
+; VI-NEXT: v_or_b32_e32 v0, v7, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v43, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v8, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v31
+; VI-NEXT: v_or_b32_e32 v0, v9, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v57, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v10, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
+; VI-NEXT: v_or_b32_e32 v0, v11, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v21, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v12, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v48
+; VI-NEXT: v_or_b32_e32 v0, v13, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v52, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v14, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v49
+; VI-NEXT: v_or_b32_e32 v0, v15, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v62, v0, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v16, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v37
+; VI-NEXT: v_or_b32_e32 v0, v17, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v0, v35, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; VI-NEXT: v_or_b32_e32 v0, v18, v0
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v0, v20, v0, s4
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v0, v21, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v43, v1, s4
+; VI-NEXT: v_perm_b32 v1, v34, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v10, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
-; VI-NEXT: v_or_b32_e32 v1, v11, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v63, v1, s4
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v33, v38, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v12, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
-; VI-NEXT: v_or_b32_e32 v1, v13, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v14, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
-; VI-NEXT: v_or_b32_e32 v1, v15, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v0, v59, v0, s4
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v0, v60, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v16, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
-; VI-NEXT: v_or_b32_e32 v1, v17, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v1, v59, v58, s4
+; VI-NEXT: v_perm_b32 v1, v63, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v18, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v34
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v57, v56, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v21, s4
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v1, v5, s4
+; VI-NEXT: v_perm_b32 v0, v3, v0, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v3, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v0, v4, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: v_perm_b32 v1, v61, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v4, s4
+; VI-NEXT: v_perm_b32 v1, v1, v5, s4
+; VI-NEXT: v_perm_b32 v0, v3, v0, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: v_perm_b32 v1, v3, v36, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v0, v4, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v25, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v58, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_perm_b32 v0, v50, v0, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v0, v51, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: v_perm_b32 v1, v46, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v4, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_perm_b32 v0, v29, v0, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v3, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v0, v30, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v52, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v44, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_perm_b32 v0, v54, v0, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v53, v28, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v1, v1, v4, s4
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v1, v3, v23, s4
+; VI-NEXT: v_perm_b32 v0, v55, v0, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v22, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
+; VI-NEXT: v_perm_b32 v1, v56, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v0, v0, v1
+; VI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -180768,39 +180935,60 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
@@ -180808,30 +180996,31 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr50
-; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: s_nop 0
@@ -180906,220 +181095,198 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB94_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(33)
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v31
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v31
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v29
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v27
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v27
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v25
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v25
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v23
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v23
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v22
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v22
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v21
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v21
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v19
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v18
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(54)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v4
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4
; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18]
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2
@@ -181161,196 +181328,196 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
; GFX9-NEXT: v_pk_add_f16 v32, v32, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(40)
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v32
+; GFX9-NEXT: s_waitcnt vmcnt(42)
; GFX9-NEXT: v_pk_add_f16 v31, v31, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v31
; GFX9-NEXT: v_pk_add_f16 v30, v30, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v29, v29, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v30
; GFX9-NEXT: v_pk_add_f16 v28, v28, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v27, v27, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v29
; GFX9-NEXT: v_pk_add_f16 v26, v26, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v25, v25, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v28
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v28
; GFX9-NEXT: v_pk_add_f16 v24, v24, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v27
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v27
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v26
; GFX9-NEXT: v_pk_add_f16 v22, v22, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v21, v21, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v26
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v25
; GFX9-NEXT: v_pk_add_f16 v20, v20, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v19, v19, s6 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v25
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v24
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v24
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v20
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v20
; GFX9-NEXT: v_pk_add_f16 v18, v18, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v17, v17, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v19
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v17
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB94_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
@@ -181360,22 +181527,23 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v34, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v33, s4
; GFX9-NEXT: v_perm_b32 v7, v7, v35, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v38, s4
-; GFX9-NEXT: v_perm_b32 v11, v11, v48, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v52, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v63, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v60, s4
-; GFX9-NEXT: v_perm_b32 v12, v12, v58, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v38, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v49, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v59, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v53, s4
+; GFX9-NEXT: v_perm_b32 v10, v10, v52, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v51, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v48, s4
; GFX9-NEXT: v_perm_b32 v13, v13, v56, s4
-; GFX9-NEXT: v_perm_b32 v14, v14, v47, s4
+; GFX9-NEXT: v_perm_b32 v14, v14, v46, s4
; GFX9-NEXT: v_perm_b32 v15, v15, v45, s4
+; GFX9-NEXT: v_perm_b32 v48, v50, v40, s4
; GFX9-NEXT: v_perm_b32 v17, v17, v55, s4
; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v50, v1, s4
+; GFX9-NEXT: v_perm_b32 v44, v61, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -181383,16 +181551,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v36, v53, v1, s4
+; GFX9-NEXT: v_perm_b32 v36, v47, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v34, v49, v1, s4
+; GFX9-NEXT: v_perm_b32 v33, v62, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v49, v61, v40, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v35, v59, v1, s4
+; GFX9-NEXT: v_perm_b32 v35, v58, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -181400,14 +181567,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v48, v46, v1, s4
+; GFX9-NEXT: v_perm_b32 v34, v34, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v62, v1, s4
+; GFX9-NEXT: v_perm_b32 v39, v60, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v42, 16, v43
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
@@ -181417,7 +181584,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v41
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v44, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -181444,11 +181611,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
@@ -181471,7 +181638,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -181480,11 +181647,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v33, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v63, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
@@ -181534,7 +181701,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
@@ -182601,401 +182768,391 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_writelane_b32 v34, s99, 33
; SI-NEXT: v_writelane_b32 v34, s30, 34
; SI-NEXT: v_writelane_b32 v34, s31, 35
+; SI-NEXT: s_lshr_b32 s6, s18, 16
; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshr_b32 s6, s20, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v37, s20, 0
-; SI-NEXT: v_writelane_b32 v37, s23, 2
-; SI-NEXT: v_writelane_b32 v37, s6, 4
-; SI-NEXT: s_lshr_b32 s7, s22, 16
-; SI-NEXT: v_writelane_b32 v37, s22, 6
-; SI-NEXT: s_lshr_b32 s8, s24, 16
-; SI-NEXT: v_writelane_b32 v37, s7, 8
-; SI-NEXT: s_lshr_b32 s9, s26, 16
-; SI-NEXT: v_writelane_b32 v37, s8, 9
-; SI-NEXT: s_lshr_b32 s10, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s51, v1
-; SI-NEXT: v_writelane_b32 v37, s9, 10
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3
-; SI-NEXT: s_lshr_b32 s11, s51, 16
-; SI-NEXT: v_writelane_b32 v37, s10, 11
-; SI-NEXT: v_readfirstlane_b32 s89, v5
-; SI-NEXT: s_lshr_b32 s12, vcc_lo, 16
-; SI-NEXT: v_writelane_b32 v37, s11, 12
-; SI-NEXT: v_readfirstlane_b32 s70, v7
-; SI-NEXT: s_lshr_b32 s13, s89, 16
-; SI-NEXT: v_writelane_b32 v37, s12, 13
-; SI-NEXT: v_readfirstlane_b32 s92, v9
-; SI-NEXT: s_lshr_b32 s14, s70, 16
-; SI-NEXT: v_writelane_b32 v37, s13, 14
-; SI-NEXT: s_mov_b32 s79, s17
-; SI-NEXT: s_mov_b32 s85, s16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
-; SI-NEXT: s_lshr_b32 s87, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s93, v18
-; SI-NEXT: v_readfirstlane_b32 s36, v17
-; SI-NEXT: v_readfirstlane_b32 s16, v16
-; SI-NEXT: v_readfirstlane_b32 s95, v15
-; SI-NEXT: v_readfirstlane_b32 s65, v14
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_readfirstlane_b32 s66, v12
-; SI-NEXT: v_readfirstlane_b32 s64, v11
-; SI-NEXT: v_readfirstlane_b32 s71, v10
-; SI-NEXT: s_lshr_b32 s76, s92, 16
-; SI-NEXT: v_readfirstlane_b32 s80, v8
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v6
-; SI-NEXT: v_readfirstlane_b32 s54, v4
+; SI-NEXT: s_lshr_b32 s7, s20, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v37, s6, 0
+; SI-NEXT: s_lshr_b32 s8, s22, 16
+; SI-NEXT: v_writelane_b32 v37, s7, 2
+; SI-NEXT: s_lshr_b32 s9, s24, 16
+; SI-NEXT: v_writelane_b32 v37, s8, 4
+; SI-NEXT: s_lshr_b32 s10, s26, 16
+; SI-NEXT: v_writelane_b32 v37, s9, 5
+; SI-NEXT: s_lshr_b32 s11, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s55, v1
+; SI-NEXT: v_writelane_b32 v37, s10, 6
+; SI-NEXT: v_readfirstlane_b32 s90, v3
+; SI-NEXT: s_lshr_b32 s12, s55, 16
+; SI-NEXT: v_writelane_b32 v37, s11, 7
+; SI-NEXT: v_readfirstlane_b32 s93, v5
+; SI-NEXT: s_lshr_b32 s13, s90, 16
+; SI-NEXT: v_writelane_b32 v37, s12, 8
+; SI-NEXT: v_readfirstlane_b32 s97, v18
+; SI-NEXT: v_readfirstlane_b32 s87, v17
+; SI-NEXT: v_readfirstlane_b32 s35, v16
+; SI-NEXT: v_readfirstlane_b32 s81, v15
+; SI-NEXT: v_readfirstlane_b32 s82, v14
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v13
+; SI-NEXT: v_readfirstlane_b32 s94, v12
+; SI-NEXT: v_readfirstlane_b32 s98, v11
+; SI-NEXT: v_readfirstlane_b32 s66, v10
+; SI-NEXT: v_readfirstlane_b32 s64, v9
+; SI-NEXT: v_readfirstlane_b32 s71, v8
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v7
+; SI-NEXT: v_readfirstlane_b32 s91, v6
+; SI-NEXT: s_lshr_b32 s14, s93, 16
+; SI-NEXT: v_readfirstlane_b32 s78, v4
; SI-NEXT: v_readfirstlane_b32 s53, v2
-; SI-NEXT: v_writelane_b32 v37, s14, 15
+; SI-NEXT: v_writelane_b32 v37, s13, 9
; SI-NEXT: s_lshr_b32 s49, s29, 16
-; SI-NEXT: s_lshr_b32 s91, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s50, s23, 16
-; SI-NEXT: s_lshr_b32 s48, s21, 16
-; SI-NEXT: s_lshr_b32 s97, s19, 16
-; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s96, s93, 16
-; SI-NEXT: s_lshr_b32 s37, s36, 16
-; SI-NEXT: s_lshr_b32 s94, s16, 16
-; SI-NEXT: s_lshr_b32 s30, s95, 16
-; SI-NEXT: s_lshr_b32 s90, s65, 16
-; SI-NEXT: s_lshr_b32 s78, s17, 16
+; SI-NEXT: s_lshr_b32 s51, s27, 16
+; SI-NEXT: s_lshr_b32 s89, s25, 16
+; SI-NEXT: s_lshr_b32 s52, s23, 16
+; SI-NEXT: s_lshr_b32 s50, s21, 16
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_lshr_b32 s88, s17, 16
+; SI-NEXT: s_lshr_b32 s31, s16, 16
+; SI-NEXT: s_lshr_b32 s86, s97, 16
+; SI-NEXT: s_lshr_b32 s84, s87, 16
+; SI-NEXT: s_lshr_b32 s80, s35, 16
+; SI-NEXT: s_lshr_b32 s96, s81, 16
+; SI-NEXT: s_lshr_b32 s83, s82, 16
+; SI-NEXT: s_lshr_b32 s34, vcc_hi, 16
+; SI-NEXT: s_lshr_b32 s95, s94, 16
+; SI-NEXT: s_lshr_b32 s99, s98, 16
; SI-NEXT: s_lshr_b32 s67, s66, 16
-; SI-NEXT: s_lshr_b32 s77, s64, 16
-; SI-NEXT: s_lshr_b32 s86, s71, 16
-; SI-NEXT: s_lshr_b32 s81, s80, 16
-; SI-NEXT: s_lshr_b32 s88, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s55, s54, 16
-; SI-NEXT: s_lshr_b32 s39, s53, 16
+; SI-NEXT: s_lshr_b32 s76, s64, 16
+; SI-NEXT: s_lshr_b32 s70, s71, 16
+; SI-NEXT: s_lshr_b32 s15, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s92, s91, 16
+; SI-NEXT: s_lshr_b32 s79, s78, 16
+; SI-NEXT: s_lshr_b32 s54, s53, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v37, s76, 16
+; SI-NEXT: v_writelane_b32 v37, s14, 10
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v37, s77, 17
-; SI-NEXT: v_writelane_b32 v37, s78, 18
+; SI-NEXT: v_writelane_b32 v37, s15, 11
+; SI-NEXT: v_writelane_b32 v37, s76, 12
; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB95_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_and_b32 s4, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s74, s4, s5
-; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_and_b32 s4, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s75, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s72, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s48, 16
; SI-NEXT: s_or_b32 s73, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s48, 16
+; SI-NEXT: s_lshl_b32 s5, s50, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s50, 16
+; SI-NEXT: s_lshl_b32 s5, s52, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
+; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s52, 16
+; SI-NEXT: s_lshl_b32 s5, s89, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s9, 16
+; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s51, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s10, 16
+; SI-NEXT: s_lshl_b32 s5, s11, 16
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s49, 16
; SI-NEXT: s_or_b32 s57, s4, s5
-; SI-NEXT: s_and_b32 s4, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s11, 16
+; SI-NEXT: s_and_b32 s4, s55, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s39, 16
+; SI-NEXT: s_lshl_b32 s5, s54, 16
; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: s_and_b32 s4, s90, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s13, 16
; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s54, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s55, 16
+; SI-NEXT: s_and_b32 s4, s78, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s79, 16
; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s89, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s13, 16
+; SI-NEXT: s_and_b32 s4, s93, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_and_b32 s4, s91, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s14, 16
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s14, s4, s5
-; SI-NEXT: s_and_b32 s4, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_and_b32 s4, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s15, s4, s5
-; SI-NEXT: s_and_b32 s4, s92, 0xffff
+; SI-NEXT: s_and_b32 s4, s64, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s12, s4, s5
-; SI-NEXT: s_and_b32 s4, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s66, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s13, s4, s5
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_and_b32 s4, s98, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_or_b32 s10, s4, s5
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_or_b32 s11, s4, s5
+; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_or_b32 s8, s4, s5
+; SI-NEXT: s_and_b32 s4, s82, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_or_b32 s9, s4, s5
+; SI-NEXT: s_and_b32 s4, s81, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_or_b32 s6, s4, s5
+; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_or_b32 s7, s4, s5
+; SI-NEXT: s_and_b32 s4, s87, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: s_and_b32 s5, s97, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s86, 16
+; SI-NEXT: s_or_b32 s5, s5, s76
+; SI-NEXT: s_lshr_b32 s76, s75, 8
+; SI-NEXT: v_writelane_b32 v35, s76, 2
+; SI-NEXT: s_lshr_b32 s76, s73, 8
+; SI-NEXT: v_writelane_b32 v35, s76, 1
+; SI-NEXT: s_lshr_b32 s76, s63, 8
+; SI-NEXT: v_writelane_b32 v35, s76, 0
+; SI-NEXT: s_lshr_b32 s76, s59, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 63
+; SI-NEXT: s_lshr_b32 s76, s47, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 62
+; SI-NEXT: s_lshr_b32 s76, s61, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 61
+; SI-NEXT: s_lshr_b32 s76, s57, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 60
+; SI-NEXT: s_lshr_b32 s76, s45, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 59
+; SI-NEXT: s_lshr_b32 s76, s43, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 58
+; SI-NEXT: s_lshr_b32 s76, s41, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 57
+; SI-NEXT: s_lshr_b32 s76, s15, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 56
+; SI-NEXT: s_lshr_b32 s76, s13, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 55
+; SI-NEXT: s_lshr_b32 s76, s11, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 54
+; SI-NEXT: s_lshr_b32 s76, s9, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 53
+; SI-NEXT: s_lshr_b32 s76, s7, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 52
+; SI-NEXT: s_lshr_b32 s76, s5, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 51
+; SI-NEXT: s_bfe_u32 s76, s88, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 50
+; SI-NEXT: s_bfe_u32 s76, s48, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 49
+; SI-NEXT: s_bfe_u32 s76, s50, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 48
+; SI-NEXT: s_bfe_u32 s76, s52, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 47
+; SI-NEXT: s_bfe_u32 s76, s89, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 46
+; SI-NEXT: s_bfe_u32 s76, s51, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 45
+; SI-NEXT: s_bfe_u32 s76, s49, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 44
+; SI-NEXT: s_bfe_u32 s76, s54, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 43
+; SI-NEXT: s_bfe_u32 s76, s79, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 42
+; SI-NEXT: s_bfe_u32 s76, s92, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 41
; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 17
+; SI-NEXT: v_writelane_b32 v37, s77, 18
+; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 15
+; SI-NEXT: v_writelane_b32 v37, s77, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 13
+; SI-NEXT: v_writelane_b32 v37, s77, 14
+; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 24
; SI-NEXT: v_writelane_b32 v37, s76, 23
; SI-NEXT: v_writelane_b32 v37, s77, 24
-; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
; SI-NEXT: v_writelane_b32 v37, s76, 21
; SI-NEXT: v_writelane_b32 v37, s77, 22
-; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 8
; SI-NEXT: v_writelane_b32 v37, s76, 19
; SI-NEXT: v_writelane_b32 v37, s77, 20
-; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 24
; SI-NEXT: v_writelane_b32 v37, s76, 29
; SI-NEXT: v_writelane_b32 v37, s77, 30
-; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 16
; SI-NEXT: v_writelane_b32 v37, s76, 27
-; SI-NEXT: s_and_b32 s4, s64, 0xffff
; SI-NEXT: v_writelane_b32 v37, s77, 28
-; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 8
-; SI-NEXT: s_or_b32 s10, s4, s5
-; SI-NEXT: s_and_b32 s4, s66, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s67, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 8
; SI-NEXT: v_writelane_b32 v37, s76, 25
-; SI-NEXT: s_or_b32 s11, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: v_writelane_b32 v37, s77, 26
-; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 24
-; SI-NEXT: s_or_b32 s8, s4, s5
-; SI-NEXT: s_and_b32 s4, s65, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s90, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 24
; SI-NEXT: v_writelane_b32 v37, s76, 35
-; SI-NEXT: s_or_b32 s9, s4, s5
-; SI-NEXT: s_and_b32 s4, s95, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: v_writelane_b32 v37, s77, 36
-; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 16
-; SI-NEXT: s_or_b32 s6, s4, s5
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 16
; SI-NEXT: v_writelane_b32 v37, s76, 33
-; SI-NEXT: s_or_b32 s7, s4, s5
-; SI-NEXT: s_and_b32 s4, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: v_writelane_b32 v37, s77, 34
-; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 8
-; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s93, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s96, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 8
; SI-NEXT: v_writelane_b32 v37, s76, 31
-; SI-NEXT: s_or_b32 s5, s5, s20
-; SI-NEXT: s_lshr_b32 s20, s75, 8
; SI-NEXT: v_writelane_b32 v37, s77, 32
-; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 24
-; SI-NEXT: v_writelane_b32 v35, s20, 2
-; SI-NEXT: s_lshr_b32 s20, s73, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 24
; SI-NEXT: v_writelane_b32 v37, s76, 41
-; SI-NEXT: v_writelane_b32 v35, s20, 1
-; SI-NEXT: s_lshr_b32 s20, s63, 8
; SI-NEXT: v_writelane_b32 v37, s77, 42
-; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 16
-; SI-NEXT: v_writelane_b32 v35, s20, 0
-; SI-NEXT: s_lshr_b32 s20, s59, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 16
; SI-NEXT: v_writelane_b32 v37, s76, 39
-; SI-NEXT: v_writelane_b32 v36, s20, 63
-; SI-NEXT: s_lshr_b32 s20, s47, 8
; SI-NEXT: v_writelane_b32 v37, s77, 40
-; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 8
-; SI-NEXT: v_writelane_b32 v36, s20, 62
-; SI-NEXT: s_lshr_b32 s20, s61, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 8
; SI-NEXT: v_writelane_b32 v37, s76, 37
-; SI-NEXT: v_writelane_b32 v36, s20, 61
-; SI-NEXT: s_lshr_b32 s20, s57, 8
; SI-NEXT: v_writelane_b32 v37, s77, 38
-; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 24
-; SI-NEXT: v_writelane_b32 v36, s20, 60
-; SI-NEXT: s_lshr_b32 s20, s45, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 24
; SI-NEXT: v_writelane_b32 v37, s76, 47
-; SI-NEXT: v_writelane_b32 v36, s20, 59
-; SI-NEXT: s_lshr_b32 s20, s43, 8
; SI-NEXT: v_writelane_b32 v37, s77, 48
-; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v36, s20, 58
-; SI-NEXT: s_lshr_b32 s20, s41, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 16
; SI-NEXT: v_writelane_b32 v37, s76, 45
-; SI-NEXT: v_writelane_b32 v36, s20, 57
-; SI-NEXT: s_lshr_b32 s20, s15, 8
; SI-NEXT: v_writelane_b32 v37, s77, 46
-; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v36, s20, 56
-; SI-NEXT: s_lshr_b32 s20, s13, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 8
; SI-NEXT: v_writelane_b32 v37, s76, 43
-; SI-NEXT: v_writelane_b32 v36, s20, 55
-; SI-NEXT: s_lshr_b32 s20, s11, 8
; SI-NEXT: v_writelane_b32 v37, s77, 44
-; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v36, s20, 54
-; SI-NEXT: s_lshr_b32 s20, s9, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 24
; SI-NEXT: v_writelane_b32 v37, s76, 53
-; SI-NEXT: v_writelane_b32 v36, s20, 53
-; SI-NEXT: s_lshr_b32 s20, s7, 8
; SI-NEXT: v_writelane_b32 v37, s77, 54
-; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v36, s20, 52
-; SI-NEXT: s_lshr_b32 s20, s5, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 16
; SI-NEXT: v_writelane_b32 v37, s76, 51
-; SI-NEXT: v_writelane_b32 v36, s20, 51
-; SI-NEXT: s_bfe_u32 s20, s97, 0x80008
; SI-NEXT: v_writelane_b32 v37, s77, 52
-; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v36, s20, 50
-; SI-NEXT: s_bfe_u32 s20, s48, 0x80008
+; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 8
; SI-NEXT: v_writelane_b32 v37, s76, 49
-; SI-NEXT: v_writelane_b32 v36, s20, 49
-; SI-NEXT: s_bfe_u32 s20, s50, 0x80008
; SI-NEXT: v_writelane_b32 v37, s77, 50
-; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v36, s20, 48
-; SI-NEXT: s_bfe_u32 s20, s52, 0x80008
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
; SI-NEXT: v_writelane_b32 v37, s76, 59
-; SI-NEXT: v_writelane_b32 v36, s20, 47
-; SI-NEXT: s_bfe_u32 s20, s91, 0x80008
; SI-NEXT: v_writelane_b32 v37, s77, 60
-; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v36, s20, 46
-; SI-NEXT: s_bfe_u32 s20, s49, 0x80008
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16
; SI-NEXT: v_writelane_b32 v37, s76, 57
-; SI-NEXT: v_writelane_b32 v36, s20, 45
-; SI-NEXT: s_bfe_u32 s20, s39, 0x80008
; SI-NEXT: v_writelane_b32 v37, s77, 58
-; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v36, s20, 44
-; SI-NEXT: s_bfe_u32 s20, s55, 0x80008
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 8
; SI-NEXT: v_writelane_b32 v37, s76, 55
-; SI-NEXT: v_writelane_b32 v36, s20, 43
; SI-NEXT: v_writelane_b32 v37, s77, 56
-; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
; SI-NEXT: v_writelane_b32 v36, s76, 1
; SI-NEXT: v_writelane_b32 v36, s77, 2
-; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
; SI-NEXT: v_writelane_b32 v37, s76, 63
; SI-NEXT: v_writelane_b32 v36, s77, 0
-; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 8
; SI-NEXT: v_writelane_b32 v37, s76, 61
; SI-NEXT: v_writelane_b32 v37, s77, 62
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
; SI-NEXT: v_writelane_b32 v36, s76, 7
; SI-NEXT: v_writelane_b32 v36, s77, 8
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
; SI-NEXT: v_writelane_b32 v36, s76, 5
; SI-NEXT: v_writelane_b32 v36, s77, 6
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8
; SI-NEXT: v_writelane_b32 v36, s76, 3
; SI-NEXT: v_writelane_b32 v36, s77, 4
-; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 24
; SI-NEXT: v_writelane_b32 v36, s76, 13
; SI-NEXT: v_writelane_b32 v36, s77, 14
-; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
; SI-NEXT: v_writelane_b32 v36, s76, 11
; SI-NEXT: v_writelane_b32 v36, s77, 12
-; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
; SI-NEXT: v_writelane_b32 v36, s76, 9
; SI-NEXT: v_writelane_b32 v36, s77, 10
-; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
; SI-NEXT: v_writelane_b32 v36, s76, 19
; SI-NEXT: v_writelane_b32 v36, s77, 20
-; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
; SI-NEXT: v_writelane_b32 v36, s76, 17
; SI-NEXT: v_writelane_b32 v36, s77, 18
-; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
; SI-NEXT: v_writelane_b32 v36, s76, 15
; SI-NEXT: v_writelane_b32 v36, s77, 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
; SI-NEXT: v_writelane_b32 v36, s76, 25
; SI-NEXT: v_writelane_b32 v36, s77, 26
-; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16
; SI-NEXT: v_writelane_b32 v36, s76, 23
; SI-NEXT: v_writelane_b32 v36, s77, 24
-; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 8
; SI-NEXT: v_writelane_b32 v36, s76, 21
; SI-NEXT: v_writelane_b32 v36, s77, 22
-; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
; SI-NEXT: v_writelane_b32 v36, s76, 31
; SI-NEXT: v_writelane_b32 v36, s77, 32
-; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
; SI-NEXT: v_writelane_b32 v36, s76, 29
; SI-NEXT: v_writelane_b32 v36, s77, 30
-; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 8
; SI-NEXT: v_writelane_b32 v36, s76, 27
; SI-NEXT: v_writelane_b32 v36, s77, 28
-; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
-; SI-NEXT: s_mov_b32 s77, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v36, s78, 35
-; SI-NEXT: v_writelane_b32 v36, s79, 36
-; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v36, s78, 33
-; SI-NEXT: v_writelane_b32 v36, s79, 34
-; SI-NEXT: s_lshr_b64 s[82:83], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v36, s82, 41
-; SI-NEXT: v_writelane_b32 v36, s83, 42
-; SI-NEXT: s_lshr_b64 s[82:83], s[6:7], 16
-; SI-NEXT: v_writelane_b32 v36, s82, 39
-; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 24
-; SI-NEXT: s_bfe_u32 s22, s69, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s83, 40
-; SI-NEXT: s_lshr_b64 s[82:83], s[6:7], 8
-; SI-NEXT: s_mov_b32 s79, s77
-; SI-NEXT: s_mov_b32 s77, s69
-; SI-NEXT: s_lshr_b64 s[68:69], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v36, s82, 37
-; SI-NEXT: s_mov_b32 s69, s77
-; SI-NEXT: s_mov_b32 s77, s99
-; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 8
-; SI-NEXT: s_mov_b32 s84, s30
-; SI-NEXT: s_bfe_u32 s20, s88, 0x80008
-; SI-NEXT: s_bfe_u32 s34, s81, 0x80008
-; SI-NEXT: s_bfe_u32 s35, s86, 0x80008
-; SI-NEXT: s_bfe_u32 s30, s67, 0x80008
-; SI-NEXT: s_bfe_u32 s31, s90, 0x80008
-; SI-NEXT: s_bfe_u32 s38, s94, 0x80008
-; SI-NEXT: s_bfe_u32 s23, s96, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s83, 38
-; SI-NEXT: s_mov_b32 s99, s77
-; SI-NEXT: s_mov_b64 s[82:83], 0
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 37
+; SI-NEXT: v_writelane_b32 v36, s77, 38
+; SI-NEXT: s_mov_b32 s38, s31
+; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 16
+; SI-NEXT: v_writelane_b32 v36, s30, 35
+; SI-NEXT: v_writelane_b32 v36, s31, 36
+; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 8
+; SI-NEXT: v_writelane_b32 v36, s30, 33
+; SI-NEXT: v_writelane_b32 v36, s31, 34
+; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
+; SI-NEXT: s_mov_b32 s31, s38
+; SI-NEXT: s_lshr_b64 s[38:39], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v36, s38, 39
+; SI-NEXT: s_bfe_u32 s85, s70, 0x80008
+; SI-NEXT: s_bfe_u32 s65, s67, 0x80008
+; SI-NEXT: s_bfe_u32 s36, s95, 0x80008
+; SI-NEXT: s_bfe_u32 s37, s83, 0x80008
+; SI-NEXT: s_bfe_u32 s68, s80, 0x80008
+; SI-NEXT: s_bfe_u32 s69, s86, 0x80008
+; SI-NEXT: s_lshr_b64 s[76:77], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v36, s39, 40
+; SI-NEXT: s_mov_b64 s[38:39], 0
; SI-NEXT: s_branch .LBB95_3
; SI-NEXT: .LBB95_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b32 s84, s30
-; SI-NEXT: v_writelane_b32 v37, s4, 19
-; SI-NEXT: v_writelane_b32 v37, s5, 20
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b64 s[82:83], -1
-; SI-NEXT: v_writelane_b32 v37, s4, 21
-; SI-NEXT: v_writelane_b32 v37, s5, 22
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: s_mov_b64 s[38:39], -1
+; SI-NEXT: v_writelane_b32 v37, s4, 13
+; SI-NEXT: v_writelane_b32 v37, s5, 14
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr22
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr20
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr23
+; SI-NEXT: ; implicit-def: $sgpr85
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
@@ -183005,16 +183162,31 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: v_writelane_b32 v37, s4, 15
+; SI-NEXT: v_writelane_b32 v37, s5, 16
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v37, s4, 17
+; SI-NEXT: v_writelane_b32 v37, s5, 18
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v37, s4, 19
+; SI-NEXT: v_writelane_b32 v37, s5, 20
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v37, s4, 21
+; SI-NEXT: v_writelane_b32 v37, s5, 22
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v37, s4, 23
; SI-NEXT: v_writelane_b32 v37, s5, 24
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v37, s4, 25
; SI-NEXT: v_writelane_b32 v37, s5, 26
; SI-NEXT: ; implicit-def: $sgpr4
@@ -183041,15 +183213,6 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 37
-; SI-NEXT: v_writelane_b32 v37, s5, 38
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 39
-; SI-NEXT: v_writelane_b32 v37, s5, 40
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 41
-; SI-NEXT: v_writelane_b32 v37, s5, 42
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
@@ -183086,7 +183249,14 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v37, s4, 37
+; SI-NEXT: v_writelane_b32 v37, s5, 38
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v37, s4, 39
+; SI-NEXT: v_writelane_b32 v37, s5, 40
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v37, s4, 41
+; SI-NEXT: v_writelane_b32 v37, s5, 42
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v37, s4, 43
; SI-NEXT: v_writelane_b32 v37, s5, 44
@@ -183177,31 +183347,28 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v36, s4, 37
; SI-NEXT: v_writelane_b32 v36, s5, 38
+; SI-NEXT: v_writelane_b32 v36, s76, 39
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 39
-; SI-NEXT: v_writelane_b32 v36, s5, 40
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 41
-; SI-NEXT: v_writelane_b32 v36, s5, 42
-; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s77, 40
+; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: .LBB95_3: ; %Flow
-; SI-NEXT: s_and_b64 s[82:83], s[82:83], exec
+; SI-NEXT: s_and_b64 s[38:39], s[38:39], exec
; SI-NEXT: s_cselect_b32 s77, 1, 0
; SI-NEXT: s_cmp_lg_u32 s77, 1
; SI-NEXT: s_cbranch_scc1 .LBB95_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s36
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s37
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s96
-; SI-NEXT: v_readlane_b32 s8, v37, 18
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s87
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s84
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s86
+; SI-NEXT: v_readlane_b32 s12, v37, 12
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s93
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s84
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s97
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s96
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -183213,17 +183380,17 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s5, v1
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: v_readfirstlane_b32 s6, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s95
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s81
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s94
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s80
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s16
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s35
; SI-NEXT: v_readfirstlane_b32 s7, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s8
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s34
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -183231,38 +183398,37 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
+; SI-NEXT: v_cvt_f32_f16_e32 v3, vcc_hi
; SI-NEXT: v_readfirstlane_b32 s7, v2
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s90
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s83
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v5, v3
-; SI-NEXT: v_readlane_b32 s10, v37, 17
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s65
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s82
; SI-NEXT: v_readfirstlane_b32 s9, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s10
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s99
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: v_readfirstlane_b32 s9, v3
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: v_readfirstlane_b32 s10, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s64
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s98
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: v_readfirstlane_b32 s10, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s67
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s95
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v6, v4
-; SI-NEXT: v_readlane_b32 s12, v37, 16
+; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s66
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s94
; SI-NEXT: v_readfirstlane_b32 s11, v6
; SI-NEXT: v_cvt_f32_f16_e32 v6, s12
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -183270,20 +183436,19 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
-; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: v_readfirstlane_b32 s12, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s92
; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: v_readfirstlane_b32 s12, v5
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s64
; SI-NEXT: v_readfirstlane_b32 s11, v4
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: v_readfirstlane_b32 s12, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s86
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s67
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v7, v5
-; SI-NEXT: v_readlane_b32 s14, v37, 15
+; SI-NEXT: v_readlane_b32 s14, v37, 11
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s66
; SI-NEXT: v_readfirstlane_b32 s13, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s14
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
@@ -183296,272 +183461,269 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s13, v5
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: v_readfirstlane_b32 s14, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s70
+; SI-NEXT: v_cvt_f32_f16_e32 v6, vcc_lo
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: v_readfirstlane_b32 s14, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s70
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v6
-; SI-NEXT: v_readlane_b32 s16, v37, 14
+; SI-NEXT: v_readlane_b32 s40, v37, 10
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s71
; SI-NEXT: v_readfirstlane_b32 s15, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s16
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s40
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: v_readfirstlane_b32 s16, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s89
+; SI-NEXT: v_readfirstlane_b32 s40, v7
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s93
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: v_readfirstlane_b32 s15, v6
; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_or_b32 s15, s40, s15
+; SI-NEXT: v_readfirstlane_b32 s40, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s92
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v9, v7
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_readfirstlane_b32 s16, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s88
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v9
-; SI-NEXT: s_or_b32 s40, s17, s16
+; SI-NEXT: v_readlane_b32 s42, v37, 9
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, vcc_hi
-; SI-NEXT: v_readlane_b32 s17, v37, 13
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s17
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s91
+; SI-NEXT: v_readfirstlane_b32 s41, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s42
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_readfirstlane_b32 s16, v7
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, vcc_lo
-; SI-NEXT: s_or_b32 s41, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s55
+; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_or_b32 s40, s41, s40
+; SI-NEXT: v_readfirstlane_b32 s41, v7
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: v_readfirstlane_b32 s42, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s90
+; SI-NEXT: s_or_b32 s41, s42, s41
+; SI-NEXT: v_readfirstlane_b32 s42, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s79
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v10, v8
-; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readlane_b32 s44, v37, 8
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s54
-; SI-NEXT: v_readfirstlane_b32 s17, v10
-; SI-NEXT: s_or_b32 s42, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v37, 12
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s78
+; SI-NEXT: v_readfirstlane_b32 s43, v10
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s44
+; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s17
-; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
-; SI-NEXT: v_readlane_b32 s20, v37, 6
-; SI-NEXT: v_readfirstlane_b32 s17, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s51
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: v_readfirstlane_b32 s16, v8
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: v_readfirstlane_b32 s44, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s55
+; SI-NEXT: s_or_b32 s42, s43, s42
+; SI-NEXT: v_readfirstlane_b32 s43, v8
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s43, s44, s43
+; SI-NEXT: v_readfirstlane_b32 s44, v10
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s54
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
-; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_cvt_f16_f32_e32 v11, v9
-; SI-NEXT: s_or_b32 s43, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s39
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v11
-; SI-NEXT: s_or_b32 s44, s17, s16
+; SI-NEXT: v_readlane_b32 s46, v37, 7
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v10
; SI-NEXT: v_cvt_f32_f16_e32 v10, s53
-; SI-NEXT: v_readlane_b32 s17, v37, 11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s17
+; SI-NEXT: v_readfirstlane_b32 s45, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s46
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_readfirstlane_b32 s16, v9
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v10
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v10
; SI-NEXT: v_cvt_f32_f16_e32 v10, s28
-; SI-NEXT: s_or_b32 s45, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v11
+; SI-NEXT: v_readfirstlane_b32 s28, v11
; SI-NEXT: v_cvt_f32_f16_e32 v11, s49
+; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v12, v10
-; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v11
; SI-NEXT: v_cvt_f32_f16_e32 v11, s29
-; SI-NEXT: v_readfirstlane_b32 s17, v12
-; SI-NEXT: s_or_b32 s56, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v37, 10
+; SI-NEXT: v_readfirstlane_b32 s45, v9
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: v_readlane_b32 s29, v37, 6
+; SI-NEXT: s_or_b32 s45, s46, s45
+; SI-NEXT: v_readfirstlane_b32 s46, v12
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s29
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s17
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
-; SI-NEXT: v_readfirstlane_b32 s17, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s26
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: v_readfirstlane_b32 s16, v10
+; SI-NEXT: v_readfirstlane_b32 s29, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s26
+; SI-NEXT: s_lshl_b32 s28, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s26, v12
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s51
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_cvt_f16_f32_e32 v13, v11
-; SI-NEXT: s_or_b32 s57, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s91
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: s_or_b32 s60, s17, s16
+; SI-NEXT: s_or_b32 s56, s46, s28
+; SI-NEXT: v_readfirstlane_b32 s28, v10
+; SI-NEXT: s_lshl_b32 s28, s28, 16
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v12
; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
-; SI-NEXT: v_readlane_b32 s17, v37, 9
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s17
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_readlane_b32 s27, v37, 5
+; SI-NEXT: s_or_b32 s57, s29, s28
+; SI-NEXT: v_readfirstlane_b32 s28, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_readfirstlane_b32 s16, v11
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v12
+; SI-NEXT: v_readfirstlane_b32 s27, v12
; SI-NEXT: v_cvt_f32_f16_e32 v12, s24
-; SI-NEXT: s_or_b32 s61, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s52
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: v_readfirstlane_b32 s24, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s89
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v14, v12
-; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s60, s28, s26
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s25
-; SI-NEXT: v_readfirstlane_b32 s17, v14
-; SI-NEXT: s_or_b32 s46, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v37, 8
+; SI-NEXT: v_readfirstlane_b32 s26, v11
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: v_readlane_b32 s25, v37, 4
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s17
+; SI-NEXT: s_or_b32 s61, s27, s26
+; SI-NEXT: v_readfirstlane_b32 s26, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s25
+; SI-NEXT: v_readfirstlane_b32 s25, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s22
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s85
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s20
-; SI-NEXT: v_readfirstlane_b32 s16, v12
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_or_b32 s46, s26, s24
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_readlane_b32 s20, v37, 2
+; SI-NEXT: v_readfirstlane_b32 s24, v12
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: s_or_b32 s47, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s20
-; SI-NEXT: v_readfirstlane_b32 s16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s50
-; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s47, s25, s24
+; SI-NEXT: v_readfirstlane_b32 s24, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s23
+; SI-NEXT: v_readfirstlane_b32 s22, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s52
+; SI-NEXT: v_readlane_b32 s23, v37, 2
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: s_or_b32 s58, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v37, 4
-; SI-NEXT: v_readlane_b32 s20, v37, 0
; SI-NEXT: v_cvt_f16_f32_e32 v15, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s17
-; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s23
+; SI-NEXT: v_readfirstlane_b32 s23, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s20
-; SI-NEXT: v_readfirstlane_b32 s16, v15
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s59, s17, s16
-; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
-; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
+; SI-NEXT: s_lshl_b32 s22, s22, 16
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: s_lshr_b64 s[22:23], s[58:59], 16
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s21
-; SI-NEXT: v_readfirstlane_b32 s16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s48
-; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_or_b32 s62, s17, s16
+; SI-NEXT: s_or_b32 s58, s24, s22
+; SI-NEXT: v_readfirstlane_b32 s22, v15
+; SI-NEXT: s_lshl_b32 s22, s22, 16
+; SI-NEXT: s_or_b32 s59, s23, s22
+; SI-NEXT: v_readfirstlane_b32 s20, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s50
+; SI-NEXT: v_readfirstlane_b32 s22, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s21
+; SI-NEXT: v_readlane_b32 s21, v37, 0
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v18, v14
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s18
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s99
-; SI-NEXT: v_readfirstlane_b32 s16, v18
-; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s21
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_or_b32 s63, s17, s16
+; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v36, s54, 11
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: v_readfirstlane_b32 s21, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s18
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s19
-; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v37, s18, 59
-; SI-NEXT: v_writelane_b32 v37, s19, 60
-; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v37, s18, 57
-; SI-NEXT: v_writelane_b32 v37, s19, 58
-; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v36, s18, 1
-; SI-NEXT: v_writelane_b32 v36, s19, 2
-; SI-NEXT: v_readfirstlane_b32 s16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s97
-; SI-NEXT: v_writelane_b32 v36, s64, 15
-; SI-NEXT: v_writelane_b32 v36, s65, 16
+; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_writelane_b32 v36, s55, 12
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
+; SI-NEXT: v_readfirstlane_b32 s18, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s48
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: s_lshr_b64 s[64:65], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v36, s64, 25
-; SI-NEXT: v_writelane_b32 v36, s65, 26
+; SI-NEXT: s_or_b32 s62, s22, s20
+; SI-NEXT: v_readfirstlane_b32 s20, v18
+; SI-NEXT: v_writelane_b32 v36, s64, 19
+; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_writelane_b32 v36, s65, 20
; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 24
+; SI-NEXT: s_or_b32 s63, s21, s20
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_writelane_b32 v36, s64, 31
+; SI-NEXT: v_readfirstlane_b32 s20, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s19
+; SI-NEXT: v_writelane_b32 v36, s64, 25
; SI-NEXT: v_cvt_f16_f32_e32 v22, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s87
-; SI-NEXT: v_writelane_b32 v36, s65, 32
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s31
+; SI-NEXT: v_writelane_b32 v36, s65, 26
; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v36, s64, 29
-; SI-NEXT: v_writelane_b32 v36, s65, 30
+; SI-NEXT: v_writelane_b32 v36, s64, 23
+; SI-NEXT: v_writelane_b32 v36, s65, 24
; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 8
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
-; SI-NEXT: v_writelane_b32 v36, s64, 27
+; SI-NEXT: v_writelane_b32 v36, s64, 21
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_writelane_b32 v36, s65, 28
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s16
+; SI-NEXT: v_writelane_b32 v36, s65, 22
; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 24
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: v_writelane_b32 v37, s64, 6
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_writelane_b32 v37, s65, 7
+; SI-NEXT: v_writelane_b32 v36, s64, 31
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: v_writelane_b32 v36, s65, 32
; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 16
-; SI-NEXT: s_or_b32 s72, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v22
-; SI-NEXT: v_writelane_b32 v36, s64, 35
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: s_or_b32 s72, s20, s18
+; SI-NEXT: v_readfirstlane_b32 s18, v22
+; SI-NEXT: v_writelane_b32 v36, s64, 29
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: v_readfirstlane_b32 s16, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16
-; SI-NEXT: v_writelane_b32 v36, s65, 36
+; SI-NEXT: v_writelane_b32 v36, s65, 30
; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 8
-; SI-NEXT: s_or_b32 s73, s17, s16
+; SI-NEXT: s_or_b32 s73, s16, s18
; SI-NEXT: v_readfirstlane_b32 s16, v14
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s69
-; SI-NEXT: v_writelane_b32 v36, s64, 33
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s79
-; SI-NEXT: v_writelane_b32 v36, s65, 34
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s88
+; SI-NEXT: v_writelane_b32 v36, s64, 27
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s17
+; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 24
+; SI-NEXT: v_writelane_b32 v36, s65, 28
; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v36, s64, 41
-; SI-NEXT: v_writelane_b32 v36, s65, 42
+; SI-NEXT: v_writelane_b32 v37, s18, 53
+; SI-NEXT: v_writelane_b32 v36, s64, 37
+; SI-NEXT: v_writelane_b32 v37, s19, 54
+; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 16
+; SI-NEXT: v_writelane_b32 v36, s65, 38
; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 16
; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v14
-; SI-NEXT: v_writelane_b32 v36, s64, 39
+; SI-NEXT: v_writelane_b32 v37, s18, 51
+; SI-NEXT: v_writelane_b32 v36, s64, 35
; SI-NEXT: v_cvt_f16_f32_e32 v26, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16
-; SI-NEXT: v_writelane_b32 v36, s65, 40
+; SI-NEXT: v_writelane_b32 v37, s19, 52
+; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v36, s65, 36
; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_writelane_b32 v36, s64, 37
-; SI-NEXT: v_writelane_b32 v36, s65, 38
+; SI-NEXT: v_writelane_b32 v37, s18, 59
+; SI-NEXT: v_writelane_b32 v36, s64, 33
+; SI-NEXT: v_writelane_b32 v37, s19, 60
+; SI-NEXT: v_writelane_b32 v36, s65, 34
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_writelane_b32 v37, s64, 0
@@ -183571,46 +183733,47 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_writelane_b32 v37, s64, 4
+; SI-NEXT: v_writelane_b32 v37, s64, 2
; SI-NEXT: s_or_b32 s75, s17, s16
-; SI-NEXT: v_writelane_b32 v37, s65, 5
+; SI-NEXT: v_writelane_b32 v37, s65, 3
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 8
; SI-NEXT: s_lshr_b64 s[50:51], s[74:75], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[74:75], 16
; SI-NEXT: s_lshr_b64 s[52:53], s[74:75], 8
-; SI-NEXT: s_lshr_b64 s[36:37], s[72:73], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[72:73], 24
+; SI-NEXT: s_lshr_b64 s[88:89], s[72:73], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[72:73], 8
-; SI-NEXT: s_lshr_b64 s[30:31], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[62:63], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[62:63], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[62:63], 8
+; SI-NEXT: s_lshr_b64 s[20:21], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[22:23], s[58:59], 16
; SI-NEXT: s_lshr_b64 s[26:27], s[58:59], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 24
; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 8
-; SI-NEXT: s_lshr_b64 s[82:83], s[60:61], 24
-; SI-NEXT: s_lshr_b64 s[84:85], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[86:87], s[60:61], 8
+; SI-NEXT: s_lshr_b64 s[80:81], s[60:61], 24
+; SI-NEXT: s_lshr_b64 s[82:83], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[60:61], 8
; SI-NEXT: s_lshr_b64 s[68:69], s[56:57], 8
; SI-NEXT: s_lshr_b64 s[70:71], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v37, s64, 2
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
-; SI-NEXT: s_lshr_b64 s[20:21], s[58:59], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[46:47], 16
-; SI-NEXT: s_lshr_b32 s97, s75, 8
-; SI-NEXT: s_lshr_b32 s87, s73, 8
-; SI-NEXT: s_lshr_b32 s85, s63, 8
-; SI-NEXT: s_lshr_b32 s83, s59, 8
-; SI-NEXT: s_lshr_b32 s69, s47, 8
-; SI-NEXT: s_lshr_b32 s53, s61, 8
-; SI-NEXT: s_lshr_b32 s51, s57, 8
-; SI-NEXT: s_lshr_b32 s49, s45, 8
-; SI-NEXT: s_lshr_b32 s39, s43, 8
-; SI-NEXT: s_lshr_b32 s37, s41, 8
-; SI-NEXT: s_lshr_b32 s35, s15, 8
-; SI-NEXT: s_lshr_b32 s31, s13, 8
-; SI-NEXT: s_lshr_b32 s91, s11, 8
-; SI-NEXT: s_lshr_b32 s77, s9, 8
-; SI-NEXT: s_lshr_b32 s27, s7, 8
-; SI-NEXT: s_lshr_b32 s23, s5, 8
+; SI-NEXT: v_writelane_b32 v36, s64, 39
+; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[86:87], s[46:47], 24
+; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 16
+; SI-NEXT: s_lshr_b32 s85, s75, 8
+; SI-NEXT: s_lshr_b32 s83, s73, 8
+; SI-NEXT: s_lshr_b32 s81, s63, 8
+; SI-NEXT: s_lshr_b32 s69, s59, 8
+; SI-NEXT: s_lshr_b32 s53, s47, 8
+; SI-NEXT: s_lshr_b32 s51, s61, 8
+; SI-NEXT: s_lshr_b32 s49, s57, 8
+; SI-NEXT: s_lshr_b32 s39, s45, 8
+; SI-NEXT: s_lshr_b32 s37, s43, 8
+; SI-NEXT: s_lshr_b32 s35, s41, 8
+; SI-NEXT: s_lshr_b32 s31, s15, 8
+; SI-NEXT: s_lshr_b32 s89, s13, 8
+; SI-NEXT: s_lshr_b32 s77, s11, 8
+; SI-NEXT: s_lshr_b32 s27, s9, 8
+; SI-NEXT: s_lshr_b32 s23, s7, 8
+; SI-NEXT: s_lshr_b32 s21, s5, 8
; SI-NEXT: v_bfe_u32 v32, v26, 8, 8
; SI-NEXT: v_bfe_u32 v31, v22, 8, 8
; SI-NEXT: v_bfe_u32 v30, v18, 8, 8
@@ -183630,195 +183793,193 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshr_b64 s[24:25], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[28:29], s[44:45], 8
; SI-NEXT: s_lshr_b64 s[94:95], s[42:43], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[98:99], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 8
-; SI-NEXT: s_lshr_b64 s[88:89], s[40:41], 24
-; SI-NEXT: s_lshr_b64 s[78:79], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[92:93], s[40:41], 16
; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[80:81], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 8
; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v37, s65, 3
+; SI-NEXT: v_writelane_b32 v36, s65, 40
; SI-NEXT: s_mov_b32 s64, s70
; SI-NEXT: s_branch .LBB95_6
; SI-NEXT: .LBB95_5:
-; SI-NEXT: v_mov_b32_e32 v3, s90
-; SI-NEXT: v_mov_b32_e32 v9, s39
-; SI-NEXT: v_mov_b32_e32 v10, s49
-; SI-NEXT: v_mov_b32_e32 v11, s91
-; SI-NEXT: v_mov_b32_e32 v12, s52
-; SI-NEXT: v_mov_b32_e32 v15, s50
-; SI-NEXT: v_mov_b32_e32 v18, s48
-; SI-NEXT: v_mov_b32_e32 v14, s38
-; SI-NEXT: v_readlane_b32 s38, v37, 27
-; SI-NEXT: v_readlane_b32 s50, v37, 23
-; SI-NEXT: v_readlane_b32 s48, v37, 25
-; SI-NEXT: v_readlane_b32 s90, v37, 21
-; SI-NEXT: v_readlane_b32 s52, v37, 19
-; SI-NEXT: v_readlane_b32 s39, v37, 28
-; SI-NEXT: v_readlane_b32 s51, v37, 24
-; SI-NEXT: v_readlane_b32 s49, v37, 26
-; SI-NEXT: v_readlane_b32 s91, v37, 22
-; SI-NEXT: v_readlane_b32 s53, v37, 20
-; SI-NEXT: v_writelane_b32 v37, s78, 0
-; SI-NEXT: v_writelane_b32 v37, s79, 1
-; SI-NEXT: v_mov_b32_e32 v26, s69
-; SI-NEXT: v_readlane_b32 s16, v36, 43
-; SI-NEXT: v_writelane_b32 v37, s68, 4
+; SI-NEXT: v_readlane_b32 s16, v36, 41
+; SI-NEXT: v_mov_b32_e32 v21, s16
+; SI-NEXT: v_readlane_b32 s16, v36, 42
; SI-NEXT: v_mov_b32_e32 v23, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 44
-; SI-NEXT: v_writelane_b32 v37, s69, 5
+; SI-NEXT: v_readlane_b32 s16, v36, 43
; SI-NEXT: v_mov_b32_e32 v24, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 45
-; SI-NEXT: v_writelane_b32 v37, s98, 2
+; SI-NEXT: v_readlane_b32 s16, v36, 44
; SI-NEXT: v_mov_b32_e32 v25, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 46
-; SI-NEXT: v_writelane_b32 v37, s99, 3
+; SI-NEXT: v_readlane_b32 s16, v36, 45
; SI-NEXT: v_mov_b32_e32 v27, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 47
-; SI-NEXT: v_readlane_b32 s68, v37, 55
+; SI-NEXT: v_readlane_b32 s16, v36, 46
; SI-NEXT: v_mov_b32_e32 v28, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 48
-; SI-NEXT: v_readlane_b32 s69, v37, 56
-; SI-NEXT: v_writelane_b32 v37, s76, 6
+; SI-NEXT: v_readlane_b32 s16, v36, 47
; SI-NEXT: v_mov_b32_e32 v29, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 49
-; SI-NEXT: v_writelane_b32 v37, s77, 7
-; SI-NEXT: v_mov_b32_e32 v1, s96
-; SI-NEXT: v_mov_b32_e32 v5, s86
-; SI-NEXT: v_mov_b32_e32 v22, s97
-; SI-NEXT: v_mov_b32_e32 v13, s23
-; SI-NEXT: v_mov_b32_e32 v16, s31
-; SI-NEXT: v_mov_b32_e32 v17, s30
-; SI-NEXT: v_mov_b32_e32 v19, s35
-; SI-NEXT: v_mov_b32_e32 v20, s34
+; SI-NEXT: v_readlane_b32 s16, v36, 48
; SI-NEXT: v_mov_b32_e32 v30, s16
-; SI-NEXT: v_readlane_b32 s16, v36, 50
-; SI-NEXT: v_mov_b32_e32 v32, s22
-; SI-NEXT: v_readlane_b32 s76, v37, 43
-; SI-NEXT: v_readlane_b32 s96, v37, 47
-; SI-NEXT: v_readlane_b32 s86, v37, 49
-; SI-NEXT: v_readlane_b32 s84, v37, 51
-; SI-NEXT: v_readlane_b32 s82, v37, 53
-; SI-NEXT: v_readlane_b32 s22, v37, 39
-; SI-NEXT: v_readlane_b32 s26, v37, 37
-; SI-NEXT: v_readlane_b32 s30, v37, 33
-; SI-NEXT: v_readlane_b32 s36, v37, 29
-; SI-NEXT: v_readlane_b32 s34, v37, 31
-; SI-NEXT: v_mov_b32_e32 v2, s94
-; SI-NEXT: v_mov_b32_e32 v4, s67
-; SI-NEXT: v_mov_b32_e32 v6, s81
-; SI-NEXT: v_mov_b32_e32 v7, s88
-; SI-NEXT: v_mov_b32_e32 v8, s55
-; SI-NEXT: v_mov_b32_e32 v21, s20
+; SI-NEXT: v_readlane_b32 s16, v36, 49
; SI-NEXT: v_mov_b32_e32 v31, s16
-; SI-NEXT: v_readlane_b32 s64, v36, 23
-; SI-NEXT: v_readlane_b32 s66, v36, 21
-; SI-NEXT: v_readlane_b32 s77, v37, 44
-; SI-NEXT: v_readlane_b32 s54, v36, 19
-; SI-NEXT: v_readlane_b32 s80, v36, 17
-; SI-NEXT: v_readlane_b32 vcc_lo, v36, 9
-; SI-NEXT: v_readlane_b32 s94, v36, 7
+; SI-NEXT: v_readlane_b32 s16, v36, 50
+; SI-NEXT: v_mov_b32_e32 v10, s49
+; SI-NEXT: v_mov_b32_e32 v11, s51
+; SI-NEXT: v_mov_b32_e32 v12, s89
+; SI-NEXT: v_mov_b32_e32 v15, s52
+; SI-NEXT: v_mov_b32_e32 v18, s50
+; SI-NEXT: v_mov_b32_e32 v22, s48
+; SI-NEXT: v_mov_b32_e32 v26, s88
+; SI-NEXT: v_mov_b32_e32 v32, s16
+; SI-NEXT: v_readlane_b32 s88, v37, 21
+; SI-NEXT: v_readlane_b32 s50, v37, 17
+; SI-NEXT: v_readlane_b32 s48, v37, 19
+; SI-NEXT: v_readlane_b32 s16, v37, 15
+; SI-NEXT: v_readlane_b32 s52, v37, 13
+; SI-NEXT: v_readlane_b32 s89, v37, 22
+; SI-NEXT: v_readlane_b32 s51, v37, 18
+; SI-NEXT: v_readlane_b32 s49, v37, 20
+; SI-NEXT: v_readlane_b32 s17, v37, 16
+; SI-NEXT: v_readlane_b32 s53, v37, 14
+; SI-NEXT: v_writelane_b32 v37, s76, 0
+; SI-NEXT: v_writelane_b32 v37, s77, 1
+; SI-NEXT: v_writelane_b32 v37, s30, 2
+; SI-NEXT: v_writelane_b32 v37, s31, 3
+; SI-NEXT: v_mov_b32_e32 v2, s80
+; SI-NEXT: v_mov_b32_e32 v3, s83
+; SI-NEXT: v_mov_b32_e32 v13, s69
+; SI-NEXT: v_mov_b32_e32 v14, s68
+; SI-NEXT: v_mov_b32_e32 v16, s37
+; SI-NEXT: v_mov_b32_e32 v17, s36
+; SI-NEXT: v_mov_b32_e32 v20, s85
+; SI-NEXT: v_readlane_b32 s68, v37, 49
+; SI-NEXT: v_readlane_b32 s76, v37, 37
+; SI-NEXT: v_readlane_b32 s84, v37, 43
+; SI-NEXT: v_readlane_b32 s82, v37, 45
+; SI-NEXT: v_readlane_b32 s80, v37, 47
+; SI-NEXT: v_readlane_b32 s20, v37, 35
+; SI-NEXT: v_readlane_b32 s22, v37, 33
+; SI-NEXT: v_readlane_b32 s30, v37, 29
+; SI-NEXT: v_readlane_b32 s26, v37, 31
+; SI-NEXT: v_readlane_b32 s36, v37, 27
+; SI-NEXT: v_readlane_b32 s38, v37, 23
+; SI-NEXT: v_readlane_b32 s34, v37, 25
+; SI-NEXT: v_mov_b32_e32 v1, s86
+; SI-NEXT: v_mov_b32_e32 v4, s95
+; SI-NEXT: v_mov_b32_e32 v5, s67
+; SI-NEXT: v_mov_b32_e32 v7, s92
+; SI-NEXT: v_mov_b32_e32 v8, s79
+; SI-NEXT: v_mov_b32_e32 v9, s54
+; SI-NEXT: v_mov_b32_e32 v19, s65
+; SI-NEXT: v_readlane_b32 s69, v37, 50
+; SI-NEXT: v_readlane_b32 s64, v36, 17
+; SI-NEXT: v_readlane_b32 s66, v36, 15
+; SI-NEXT: v_readlane_b32 s77, v37, 38
+; SI-NEXT: v_readlane_b32 s78, v36, 13
+; SI-NEXT: v_readlane_b32 vcc_lo, v36, 3
+; SI-NEXT: v_readlane_b32 s94, v36, 1
+; SI-NEXT: v_readlane_b32 s96, v37, 39
+; SI-NEXT: v_readlane_b32 s86, v37, 41
+; SI-NEXT: v_readlane_b32 s85, v37, 44
+; SI-NEXT: v_readlane_b32 s98, v37, 63
; SI-NEXT: v_readlane_b32 s92, v36, 5
-; SI-NEXT: v_readlane_b32 s98, v37, 45
-; SI-NEXT: v_readlane_b32 s97, v37, 48
-; SI-NEXT: v_readlane_b32 s87, v37, 50
-; SI-NEXT: v_readlane_b32 s18, v36, 3
-; SI-NEXT: v_readlane_b32 s78, v36, 11
-; SI-NEXT: v_readlane_b32 s24, v37, 63
-; SI-NEXT: v_readlane_b32 s88, v36, 13
-; SI-NEXT: v_readlane_b32 s85, v37, 52
-; SI-NEXT: v_readlane_b32 s83, v37, 54
-; SI-NEXT: v_readlane_b32 s28, v37, 61
-; SI-NEXT: v_readlane_b32 s20, v37, 41
-; SI-NEXT: v_readlane_b32 s23, v37, 40
-; SI-NEXT: v_readlane_b32 s16, v37, 35
-; SI-NEXT: v_readlane_b32 s27, v37, 38
-; SI-NEXT: v_readlane_b32 s31, v37, 34
-; SI-NEXT: v_readlane_b32 s37, v37, 30
-; SI-NEXT: v_readlane_b32 s35, v37, 32
-; SI-NEXT: v_readlane_b32 s65, v36, 24
-; SI-NEXT: v_readlane_b32 s67, v36, 22
-; SI-NEXT: v_readlane_b32 s55, v36, 20
-; SI-NEXT: v_readlane_b32 s81, v36, 18
-; SI-NEXT: v_readlane_b32 vcc_hi, v36, 10
-; SI-NEXT: v_readlane_b32 s95, v36, 8
+; SI-NEXT: v_readlane_b32 s18, v37, 61
+; SI-NEXT: v_readlane_b32 s90, v36, 7
+; SI-NEXT: v_readlane_b32 s83, v37, 46
+; SI-NEXT: v_readlane_b32 s81, v37, 48
+; SI-NEXT: v_readlane_b32 s24, v37, 57
+; SI-NEXT: v_readlane_b32 s54, v36, 9
+; SI-NEXT: v_readlane_b32 s28, v37, 55
+; SI-NEXT: v_readlane_b32 s21, v37, 36
+; SI-NEXT: v_readlane_b32 s23, v37, 34
+; SI-NEXT: v_readlane_b32 s31, v37, 30
+; SI-NEXT: v_readlane_b32 s27, v37, 32
+; SI-NEXT: v_readlane_b32 s37, v37, 28
+; SI-NEXT: v_readlane_b32 s39, v37, 24
+; SI-NEXT: v_readlane_b32 s35, v37, 26
+; SI-NEXT: v_mov_b32_e32 v6, s70
+; SI-NEXT: v_readlane_b32 s65, v36, 18
+; SI-NEXT: v_readlane_b32 s67, v36, 16
+; SI-NEXT: v_readlane_b32 s79, v36, 14
+; SI-NEXT: v_readlane_b32 vcc_hi, v36, 4
+; SI-NEXT: v_readlane_b32 s95, v36, 2
+; SI-NEXT: v_readlane_b32 s97, v37, 40
+; SI-NEXT: v_readlane_b32 s87, v37, 42
+; SI-NEXT: v_readlane_b32 s99, v36, 0
; SI-NEXT: v_readlane_b32 s93, v36, 6
-; SI-NEXT: v_readlane_b32 s99, v37, 46
-; SI-NEXT: v_readlane_b32 s19, v36, 4
-; SI-NEXT: v_readlane_b32 s79, v36, 12
-; SI-NEXT: v_readlane_b32 s25, v36, 0
-; SI-NEXT: v_readlane_b32 s89, v36, 14
-; SI-NEXT: v_readlane_b32 s29, v37, 62
-; SI-NEXT: v_readlane_b32 s21, v37, 42
-; SI-NEXT: v_readlane_b32 s17, v37, 36
-; SI-NEXT: v_readlane_b32 s23, v36, 51
-; SI-NEXT: v_readlane_b32 s27, v36, 52
-; SI-NEXT: v_readlane_b32 s77, v36, 53
-; SI-NEXT: v_readlane_b32 s91, v36, 54
-; SI-NEXT: v_readlane_b32 s31, v36, 55
-; SI-NEXT: v_readlane_b32 s35, v36, 56
-; SI-NEXT: v_readlane_b32 s37, v36, 57
-; SI-NEXT: v_readlane_b32 s39, v36, 58
-; SI-NEXT: v_readlane_b32 s49, v36, 59
-; SI-NEXT: v_readlane_b32 s51, v36, 60
-; SI-NEXT: v_readlane_b32 s53, v36, 61
-; SI-NEXT: v_readlane_b32 s69, v36, 62
-; SI-NEXT: v_readlane_b32 s83, v36, 63
-; SI-NEXT: v_readlane_b32 s85, v35, 0
-; SI-NEXT: v_readlane_b32 s87, v35, 1
-; SI-NEXT: v_readlane_b32 s97, v35, 2
+; SI-NEXT: v_readlane_b32 s19, v37, 62
+; SI-NEXT: v_readlane_b32 s91, v36, 8
+; SI-NEXT: v_readlane_b32 s25, v37, 58
+; SI-NEXT: v_readlane_b32 s55, v36, 10
+; SI-NEXT: v_readlane_b32 s29, v37, 56
+; SI-NEXT: v_readlane_b32 s21, v36, 51
+; SI-NEXT: v_readlane_b32 s23, v36, 52
+; SI-NEXT: v_readlane_b32 s27, v36, 53
+; SI-NEXT: v_readlane_b32 s77, v36, 54
+; SI-NEXT: v_readlane_b32 s89, v36, 55
+; SI-NEXT: v_readlane_b32 s31, v36, 56
+; SI-NEXT: v_readlane_b32 s35, v36, 57
+; SI-NEXT: v_readlane_b32 s37, v36, 58
+; SI-NEXT: v_readlane_b32 s39, v36, 59
+; SI-NEXT: v_readlane_b32 s49, v36, 60
+; SI-NEXT: v_readlane_b32 s51, v36, 61
+; SI-NEXT: v_readlane_b32 s53, v36, 62
+; SI-NEXT: v_readlane_b32 s69, v36, 63
+; SI-NEXT: v_readlane_b32 s81, v35, 0
+; SI-NEXT: v_readlane_b32 s83, v35, 1
+; SI-NEXT: v_readlane_b32 s85, v35, 2
; SI-NEXT: .LBB95_6: ; %end
; SI-NEXT: s_lshl_b32 s17, s52, 8
; SI-NEXT: s_and_b32 s19, s74, 0xff
+; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_or_b32 s17, s19, s17
-; SI-NEXT: s_and_b32 s19, s90, 0xff
-; SI-NEXT: s_lshl_b32 s21, s50, 24
-; SI-NEXT: s_lshl_b32 s19, s19, 16
-; SI-NEXT: s_or_b32 s19, s21, s19
+; SI-NEXT: s_lshl_b32 s19, s50, 24
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s19
-; SI-NEXT: v_mov_b32_e32 v33, s17
-; SI-NEXT: s_and_b32 s17, s75, 0xff
-; SI-NEXT: s_lshl_b32 s19, s97, 8
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: v_mov_b32_e32 v33, s16
+; SI-NEXT: s_and_b32 s16, s75, 0xff
+; SI-NEXT: s_lshl_b32 s17, s85, 8
; SI-NEXT: v_and_b32_e32 v26, 0xff, v26
-; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v32
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v26, v32, v26
-; SI-NEXT: v_or_b32_e32 v26, s17, v26
-; SI-NEXT: s_lshl_b32 s17, s48, 8
-; SI-NEXT: s_and_b32 s19, s72, 0xff
+; SI-NEXT: v_or_b32_e32 v26, s16, v26
+; SI-NEXT: s_lshl_b32 s16, s48, 8
+; SI-NEXT: s_and_b32 s17, s72, 0xff
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s17, s88, 0xff
+; SI-NEXT: s_lshl_b32 s19, s38, 24
+; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s19, s17
-; SI-NEXT: s_and_b32 s19, s38, 0xff
-; SI-NEXT: s_lshl_b32 s21, s36, 24
-; SI-NEXT: s_lshl_b32 s19, s19, 16
-; SI-NEXT: s_or_b32 s19, s21, s19
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s19
-; SI-NEXT: v_mov_b32_e32 v32, s17
-; SI-NEXT: s_and_b32 s17, s73, 0xff
-; SI-NEXT: s_lshl_b32 s19, s87, 8
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_mov_b32_e32 v32, s16
+; SI-NEXT: s_and_b32 s16, s73, 0xff
+; SI-NEXT: s_lshl_b32 s17, s83, 8
; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
-; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v31
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v22, v31, v22
-; SI-NEXT: v_or_b32_e32 v22, s17, v22
-; SI-NEXT: s_lshl_b32 s17, s34, 8
-; SI-NEXT: s_and_b32 s19, s62, 0xff
-; SI-NEXT: s_or_b32 s17, s19, s17
-; SI-NEXT: s_and_b32 s19, s30, 0xff
-; SI-NEXT: s_lshl_b32 s16, s16, 24
-; SI-NEXT: s_lshl_b32 s19, s19, 16
-; SI-NEXT: s_or_b32 s16, s16, s19
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: v_or_b32_e32 v22, s16, v22
+; SI-NEXT: s_lshl_b32 s16, s34, 8
+; SI-NEXT: s_and_b32 s17, s62, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s17, s36, 0xff
+; SI-NEXT: s_lshl_b32 s19, s30, 24
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_or_b32 s17, s19, s17
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v31, s16
; SI-NEXT: s_and_b32 s16, s63, 0xff
-; SI-NEXT: s_lshl_b32 s17, s85, 8
+; SI-NEXT: s_lshl_b32 s17, s81, 8
; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
@@ -183837,7 +183998,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v30, s16
; SI-NEXT: s_and_b32 s16, s59, 0xff
-; SI-NEXT: s_lshl_b32 s17, s83, 8
+; SI-NEXT: s_lshl_b32 s17, s69, 8
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
@@ -183848,15 +184009,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s16, s76, 8
; SI-NEXT: s_and_b32 s17, s46, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s98, 0xff
-; SI-NEXT: s_lshl_b32 s19, s96, 24
+; SI-NEXT: s_and_b32 s17, s96, 0xff
+; SI-NEXT: s_lshl_b32 s19, s86, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v29, s16
; SI-NEXT: s_and_b32 s16, s47, 0xff
-; SI-NEXT: s_lshl_b32 s17, s69, 8
+; SI-NEXT: s_lshl_b32 s17, s53, 8
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
@@ -183864,18 +184025,18 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v12, v28, v12
; SI-NEXT: v_or_b32_e32 v12, s16, v12
-; SI-NEXT: s_lshl_b32 s16, s86, 8
+; SI-NEXT: s_lshl_b32 s16, s84, 8
; SI-NEXT: s_and_b32 s17, s60, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s84, 0xff
-; SI-NEXT: s_lshl_b32 s19, s82, 24
+; SI-NEXT: s_and_b32 s17, s82, 0xff
+; SI-NEXT: s_lshl_b32 s19, s80, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v28, s16
; SI-NEXT: s_and_b32 s16, s61, 0xff
-; SI-NEXT: s_lshl_b32 s17, s53, 8
+; SI-NEXT: s_lshl_b32 s17, s51, 8
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
; SI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:4
@@ -183899,19 +184060,19 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s17, s68, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s19, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s16, v37, 57
-; SI-NEXT: v_readlane_b32 s17, v37, 58
+; SI-NEXT: v_readlane_b32 s16, v37, 51
+; SI-NEXT: v_readlane_b32 s17, v37, 52
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s20, v37, 59
+; SI-NEXT: v_readlane_b32 s46, v37, 53
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s20, 24
+; SI-NEXT: s_lshl_b32 s17, s46, 24
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v11, s16
; SI-NEXT: s_and_b32 s16, s57, 0xff
-; SI-NEXT: s_lshl_b32 s17, s51, 8
+; SI-NEXT: s_lshl_b32 s17, s49, 8
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -183920,15 +184081,14 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v25
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_readlane_b32 s21, v37, 60
; SI-NEXT: v_or_b32_e32 v10, s16, v10
; SI-NEXT: s_and_b32 s16, s44, 0xff
; SI-NEXT: s_lshl_b32 s17, s28, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s24, 0xff
-; SI-NEXT: v_readlane_b32 s20, v36, 1
+; SI-NEXT: v_readlane_b32 s24, v37, 59
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s19, s20, 24
+; SI-NEXT: s_lshl_b32 s19, s24, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -183936,7 +184096,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v10, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
-; SI-NEXT: s_lshl_b32 s17, s49, 8
+; SI-NEXT: s_lshl_b32 s17, s39, 8
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -183949,7 +184109,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s42, 0xff
; SI-NEXT: s_lshl_b32 s17, s18, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s92, 0xff
+; SI-NEXT: s_and_b32 s17, s98, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s94, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -183959,7 +184119,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v9, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s39, 8
+; SI-NEXT: s_lshl_b32 s17, s37, 8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -183972,9 +184132,9 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s40, 0xff
; SI-NEXT: s_lshl_b32 s17, vcc_lo, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s78, 0xff
+; SI-NEXT: s_and_b32 s17, s92, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s88, 24
+; SI-NEXT: s_lshl_b32 s18, s90, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -183982,7 +184142,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v8, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s37, 8
+; SI-NEXT: s_lshl_b32 s17, s35, 8
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -183992,14 +184152,14 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v7, v8, v7
; SI-NEXT: v_or_b32_e32 v7, s16, v7
-; SI-NEXT: v_readlane_b32 s16, v36, 15
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s17, v36, 16
+; SI-NEXT: s_lshl_b32 s16, s54, 8
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: s_and_b32 s16, s80, 0xff
+; SI-NEXT: v_readlane_b32 s16, v36, 11
+; SI-NEXT: v_readlane_b32 s17, v36, 12
+; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s54, 24
+; SI-NEXT: s_lshl_b32 s17, s78, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_or_b32 s14, s14, s16
@@ -184007,7 +184167,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v7, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: s_lshl_b32 s15, s35, 8
+; SI-NEXT: s_lshl_b32 s15, s31, 8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_or_b32 s14, s14, s15
@@ -184021,7 +184181,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s14, s66, 8
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: s_and_b32 s14, s64, 0xff
-; SI-NEXT: v_readlane_b32 s16, v36, 25
+; SI-NEXT: v_readlane_b32 s16, v36, 19
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -184031,7 +184191,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v6, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s31, 8
+; SI-NEXT: s_lshl_b32 s13, s89, 8
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_or_b32 s12, s12, s13
@@ -184041,15 +184201,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v5, s12, v5
-; SI-NEXT: v_readlane_b32 s12, v36, 27
+; SI-NEXT: v_readlane_b32 s12, v36, 21
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v36, 28
+; SI-NEXT: v_readlane_b32 s13, v36, 22
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v36, 29
-; SI-NEXT: v_readlane_b32 s13, v36, 30
+; SI-NEXT: v_readlane_b32 s12, v36, 23
+; SI-NEXT: v_readlane_b32 s13, v36, 24
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v36, 31
+; SI-NEXT: v_readlane_b32 s14, v36, 25
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
@@ -184059,7 +184219,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v5, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s91, 8
+; SI-NEXT: s_lshl_b32 s11, s77, 8
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_or_b32 s10, s10, s11
@@ -184069,15 +184229,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v4, s10, v4
-; SI-NEXT: v_readlane_b32 s10, v36, 33
+; SI-NEXT: v_readlane_b32 s10, v36, 27
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v36, 34
+; SI-NEXT: v_readlane_b32 s11, v36, 28
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v36, 35
-; SI-NEXT: v_readlane_b32 s11, v36, 36
+; SI-NEXT: v_readlane_b32 s10, v36, 29
+; SI-NEXT: v_readlane_b32 s11, v36, 30
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v37, 6
+; SI-NEXT: v_readlane_b32 s12, v36, 31
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
@@ -184087,7 +184247,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s77, 8
+; SI-NEXT: s_lshl_b32 s9, s27, 8
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -184097,15 +184257,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v3, s8, v3
-; SI-NEXT: v_readlane_b32 s8, v36, 37
+; SI-NEXT: v_readlane_b32 s8, v36, 33
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s9, v36, 38
+; SI-NEXT: v_readlane_b32 s9, v36, 34
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: v_readlane_b32 s8, v36, 39
-; SI-NEXT: v_readlane_b32 s9, v36, 40
+; SI-NEXT: v_readlane_b32 s8, v36, 35
+; SI-NEXT: v_readlane_b32 s9, v36, 36
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v36, 41
+; SI-NEXT: v_readlane_b32 s10, v36, 37
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
@@ -184115,7 +184275,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v3, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s27, 8
+; SI-NEXT: s_lshl_b32 s7, s23, 8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -184125,13 +184285,13 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v2, s6, v2
-; SI-NEXT: v_readlane_b32 s6, v37, 2
+; SI-NEXT: v_readlane_b32 s6, v36, 39
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s7, v37, 3
+; SI-NEXT: v_readlane_b32 s7, v36, 40
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_readlane_b32 s6, v37, 4
-; SI-NEXT: v_readlane_b32 s7, v37, 5
+; SI-NEXT: v_readlane_b32 s6, v37, 2
+; SI-NEXT: v_readlane_b32 s7, v37, 3
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: v_readlane_b32 s8, v37, 0
; SI-NEXT: s_lshl_b32 s6, s6, 16
@@ -184143,7 +184303,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s23, 8
+; SI-NEXT: s_lshl_b32 s5, s21, 8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -184154,11 +184314,12 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
; SI-NEXT: v_readlane_b32 s30, v34, 34
-; SI-NEXT: v_readlane_b32 s21, v36, 2
-; SI-NEXT: v_readlane_b32 s17, v36, 26
-; SI-NEXT: v_readlane_b32 s15, v36, 32
-; SI-NEXT: v_readlane_b32 s13, v37, 7
-; SI-NEXT: v_readlane_b32 s11, v36, 42
+; SI-NEXT: v_readlane_b32 s47, v37, 54
+; SI-NEXT: v_readlane_b32 s25, v37, 60
+; SI-NEXT: v_readlane_b32 s17, v36, 20
+; SI-NEXT: v_readlane_b32 s15, v36, 26
+; SI-NEXT: v_readlane_b32 s13, v36, 32
+; SI-NEXT: v_readlane_b32 s11, v36, 38
; SI-NEXT: v_readlane_b32 s9, v37, 1
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v34, 35
@@ -184209,8 +184370,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -184601,320 +184762,319 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB95_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_mov_b32_e32 v3, 0x200
-; VI-NEXT: v_add_f16_e32 v44, s46, v3
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v44
-; VI-NEXT: v_add_f16_e32 v1, s45, v3
+; VI-NEXT: v_mov_b32_e32 v8, 0x200
+; VI-NEXT: v_add_f16_e32 v52, s46, v8
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
+; VI-NEXT: v_add_f16_e32 v1, s45, v8
; VI-NEXT: s_lshr_b32 s45, s44, 16
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v22, v1, v2
-; VI-NEXT: v_add_f16_e32 v12, s45, v3
-; VI-NEXT: v_add_f16_e32 v1, s44, v3
+; VI-NEXT: v_add_f16_e32 v38, s45, v8
+; VI-NEXT: v_add_f16_e32 v1, s44, v8
; VI-NEXT: s_lshr_b32 s44, s43, 16
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
-; VI-NEXT: v_add_f16_e32 v49, s44, v3
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v38
+; VI-NEXT: v_add_f16_e32 v49, s44, v8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v49
-; VI-NEXT: v_add_f16_e32 v1, s43, v3
+; VI-NEXT: v_add_f16_e32 v1, s43, v8
; VI-NEXT: s_lshr_b32 s43, s42, 16
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v24, v1, v2
-; VI-NEXT: v_add_f16_e32 v58, s43, v3
-; VI-NEXT: v_add_f16_e32 v1, s42, v3
+; VI-NEXT: v_add_f16_e32 v1, s43, v8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; VI-NEXT: v_add_f16_e32 v1, s42, v8
; VI-NEXT: s_lshr_b32 s42, s41, 16
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v58
-; VI-NEXT: v_add_f16_e32 v61, s42, v3
+; VI-NEXT: v_add_f16_e32 v58, s42, v8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v23, v1, v2
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v61
-; VI-NEXT: v_add_f16_e32 v52, s41, v3
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
+; VI-NEXT: v_add_f16_e32 v44, s41, v8
; VI-NEXT: s_lshr_b32 s41, s40, 16
-; VI-NEXT: v_or_b32_e32 v26, v52, v1
-; VI-NEXT: v_add_f16_e32 v1, s41, v3
+; VI-NEXT: v_or_b32_e32 v26, v44, v1
+; VI-NEXT: v_add_f16_e32 v1, s41, v8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v1
-; VI-NEXT: v_add_f16_e32 v1, s40, v3
+; VI-NEXT: v_add_f16_e32 v1, s40, v8
; VI-NEXT: s_lshr_b32 s40, s15, 16
-; VI-NEXT: v_add_f16_e32 v36, s40, v3
+; VI-NEXT: v_add_f16_e32 v61, s40, v8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v25, v1, v2
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
-; VI-NEXT: v_add_f16_e32 v35, s15, v3
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v61
+; VI-NEXT: v_add_f16_e32 v2, s15, v8
; VI-NEXT: s_lshr_b32 s15, s14, 16
-; VI-NEXT: v_or_b32_e32 v7, v35, v1
-; VI-NEXT: v_add_f16_e32 v1, s15, v3
-; VI-NEXT: v_add_f16_e32 v2, s14, v3
+; VI-NEXT: v_or_b32_e32 v7, v2, v1
+; VI-NEXT: v_add_f16_e32 v1, s15, v8
+; VI-NEXT: v_add_f16_e32 v51, s14, v8
; VI-NEXT: s_lshr_b32 s14, s13, 16
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v47, s14, v3
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v6, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v47
-; VI-NEXT: v_add_f16_e32 v2, s13, v3
+; VI-NEXT: v_add_f16_e32 v60, s14, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v6, v51, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
+; VI-NEXT: v_add_f16_e32 v2, s13, v8
; VI-NEXT: s_lshr_b32 s13, s12, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v28, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s13, v3
-; VI-NEXT: v_add_f16_e32 v2, s12, v3
+; VI-NEXT: v_add_f16_e32 v1, s13, v8
+; VI-NEXT: v_add_f16_e32 v2, s12, v8
; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v48, s12, v3
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_e32 v47, s12, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v27, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
-; VI-NEXT: v_add_f16_e32 v2, s11, v3
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v47
+; VI-NEXT: v_add_f16_e32 v2, s11, v8
; VI-NEXT: s_lshr_b32 s11, s10, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v5, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s11, v3
-; VI-NEXT: v_add_f16_e32 v2, s10, v3
+; VI-NEXT: v_add_f16_e32 v1, s11, v8
+; VI-NEXT: v_add_f16_e32 v2, s10, v8
; VI-NEXT: s_lshr_b32 s10, s9, 16
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v56, s10, v3
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_e32 v57, s10, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v4, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v56
-; VI-NEXT: v_add_f16_e32 v2, s9, v3
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v57
+; VI-NEXT: v_add_f16_e32 v2, s9, v8
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: v_or_b32_e32 v30, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s9, v3
-; VI-NEXT: v_add_f16_e32 v41, s8, v3
+; VI-NEXT: v_add_f16_e32 v1, s9, v8
+; VI-NEXT: v_add_f16_e32 v42, s8, v8
; VI-NEXT: s_lshr_b32 s8, s7, 16
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v38, s8, v3
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v41, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
-; VI-NEXT: v_add_f16_e32 v2, s7, v3
+; VI-NEXT: v_add_f16_e32 v59, s8, v8
+; VI-NEXT: v_or_b32_e32 v29, v42, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
+; VI-NEXT: v_add_f16_e32 v41, s7, v8
; VI-NEXT: s_lshr_b32 s7, s6, 16
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v2, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s7, v3
-; VI-NEXT: v_add_f16_e32 v8, s6, v3
-; VI-NEXT: s_lshr_b32 s6, s17, 16
+; VI-NEXT: v_or_b32_e32 v2, v41, v1
+; VI-NEXT: v_add_f16_e32 v1, s7, v8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v59, s6, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v1, v8, v1
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v59
-; VI-NEXT: v_add_f16_e32 v8, s17, v3
+; VI-NEXT: v_add_f16_e32 v3, s6, v8
+; VI-NEXT: s_lshr_b32 s6, s17, 16
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_add_f16_e32 v3, s6, v8
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; VI-NEXT: v_add_f16_e32 v9, s17, v8
; VI-NEXT: s_lshr_b32 s6, s16, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v32, v8, v9
-; VI-NEXT: v_add_f16_e32 v8, s6, v3
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v32, v9, v10
+; VI-NEXT: v_add_f16_e32 v9, s6, v8
; VI-NEXT: s_lshr_b32 s6, s19, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v8
-; VI-NEXT: v_add_f16_e32 v8, s16, v3
-; VI-NEXT: v_add_f16_e32 v60, s6, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v31, v8, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v60
-; VI-NEXT: v_add_f16_e32 v8, s19, v3
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; VI-NEXT: v_add_f16_e32 v9, s16, v8
+; VI-NEXT: v_add_f16_e32 v35, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v9, v10
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
+; VI-NEXT: v_add_f16_e32 v9, s19, v8
; VI-NEXT: s_lshr_b32 s6, s18, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v20, v8, v9
-; VI-NEXT: v_add_f16_e32 v8, s6, v3
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v20, v9, v10
+; VI-NEXT: v_add_f16_e32 v9, s6, v8
; VI-NEXT: s_lshr_b32 s6, s21, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v8
-; VI-NEXT: v_add_f16_e32 v8, s18, v3
-; VI-NEXT: v_add_f16_e32 v55, s6, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v19, v8, v9
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; VI-NEXT: v_add_f16_e32 v9, s18, v8
+; VI-NEXT: v_add_f16_e32 v48, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v19, v9, v10
; VI-NEXT: s_lshr_b32 s7, s20, 16
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v55
-; VI-NEXT: v_add_f16_e32 v57, s21, v3
-; VI-NEXT: v_or_b32_e32 v34, v57, v8
-; VI-NEXT: v_add_f16_e32 v8, s7, v3
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v48
+; VI-NEXT: v_add_f16_e32 v37, s21, v8
+; VI-NEXT: v_or_b32_e32 v34, v37, v9
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s23, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_f16_e32 v50, s20, v3
-; VI-NEXT: v_add_f16_e32 v43, s6, v3
-; VI-NEXT: v_or_b32_e32 v33, v50, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_f16_e32 v54, s20, v8
+; VI-NEXT: v_add_f16_e32 v40, s6, v8
+; VI-NEXT: v_or_b32_e32 v33, v54, v9
; VI-NEXT: s_lshr_b32 s7, s22, 16
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v43
-; VI-NEXT: v_add_f16_e32 v8, s23, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v16, v8, v9
-; VI-NEXT: v_add_f16_e32 v8, s7, v3
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v40
+; VI-NEXT: v_add_f16_e32 v9, s23, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v16, v9, v10
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s25, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v8
-; VI-NEXT: v_add_f16_e32 v8, s22, v3
-; VI-NEXT: v_add_f16_e32 v51, s6, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v15, v8, v9
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; VI-NEXT: v_add_f16_e32 v9, s22, v8
+; VI-NEXT: v_add_f16_e32 v50, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v15, v9, v10
; VI-NEXT: s_lshr_b32 s7, s24, 16
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v51
-; VI-NEXT: v_add_f16_e32 v8, s25, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v14, v8, v9
-; VI-NEXT: v_add_f16_e32 v8, s7, v3
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v50
+; VI-NEXT: v_add_f16_e32 v9, s25, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v14, v9, v10
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s27, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v8
-; VI-NEXT: v_add_f16_e32 v8, s24, v3
-; VI-NEXT: v_add_f16_e32 v42, s6, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v13, v8, v9
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; VI-NEXT: v_add_f16_e32 v9, s24, v8
+; VI-NEXT: v_add_f16_e32 v43, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v13, v9, v10
; VI-NEXT: s_lshr_b32 s7, s26, 16
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v42
-; VI-NEXT: v_add_f16_e32 v8, s27, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v18, v8, v9
-; VI-NEXT: v_add_f16_e32 v8, s7, v3
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v43
+; VI-NEXT: v_add_f16_e32 v9, s27, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v18, v9, v10
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s29, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v8
-; VI-NEXT: v_add_f16_e32 v8, s26, v3
-; VI-NEXT: v_add_f16_e32 v53, s6, v3
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v17, v8, v9
+; VI-NEXT: v_mov_b32_e32 v46, v9
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; VI-NEXT: v_add_f16_e32 v9, s26, v8
+; VI-NEXT: v_add_f16_e32 v36, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v17, v9, v10
; VI-NEXT: s_lshr_b32 s7, s28, 16
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v53
-; VI-NEXT: v_add_f16_e32 v9, s29, v3
-; VI-NEXT: v_or_b32_e32 v11, v9, v8
-; VI-NEXT: v_add_f16_e32 v8, s7, v3
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; VI-NEXT: v_add_f16_e32 v10, s29, v8
+; VI-NEXT: v_or_b32_e32 v11, v10, v9
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s5, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_f16_e32 v9, s28, v3
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, v9
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_f16_e32 v10, s28, v8
; VI-NEXT: s_lshr_b32 s7, s4, 16
-; VI-NEXT: v_add_f16_e32 v40, s6, v3
-; VI-NEXT: v_or_b32_e32 v10, v9, v8
-; VI-NEXT: v_add_f16_e32 v8, s5, v3
-; VI-NEXT: v_add_f16_e32 v54, s7, v3
-; VI-NEXT: v_add_f16_e32 v39, s4, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v40
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v9, v8, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v54
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v8, v39, v3
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v1
+; VI-NEXT: v_add_f16_e32 v39, s6, v8
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v10, v10, v9
+; VI-NEXT: v_add_f16_e32 v9, s5, v8
+; VI-NEXT: v_add_f16_e32 v45, s7, v8
+; VI-NEXT: v_add_f16_e32 v12, s4, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v9, v9, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v45
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v8, v12, v8
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v9
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[8:9]
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v10
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[10:11]
+; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v18
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v17
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[17:18]
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v14
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v13
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v16
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v15
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v34
+; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v33
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[33:34]
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v20
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v19
+; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v31
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[31:32]
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v1
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v5
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v9
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[4:5]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v10
+; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v17
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[8:9]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v6
+; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[6:7]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v7
-; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[10:11]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v6
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v15
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[6:7]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v34
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[33:34]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v20
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[31:32]
-; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
-; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[25:26]
+; VI-NEXT: v_mov_b32_e32 v53, v45
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v30
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
-; VI-NEXT: v_mov_b32_e32 v24, v43
-; VI-NEXT: v_mov_b32_e32 v7, v36
+; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[25:26]
+; VI-NEXT: v_mov_b32_e32 v1, v38
+; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v24
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[23:24]
+; VI-NEXT: v_mov_b32_e32 v24, v40
+; VI-NEXT: v_mov_b32_e32 v45, v61
+; VI-NEXT: v_mov_b32_e32 v61, v2
+; VI-NEXT: v_mov_b32_e32 v2, v48
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v21
; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[21:22]
-; VI-NEXT: v_mov_b32_e32 v43, v61
-; VI-NEXT: v_mov_b32_e32 v61, v4
-; VI-NEXT: v_bfe_u32 v4, v47, 8, 8
-; VI-NEXT: v_mov_b32_e32 v37, v54
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v31
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v30
+; VI-NEXT: v_mov_b32_e32 v21, v37
+; VI-NEXT: v_mov_b32_e32 v37, v44
+; VI-NEXT: v_mov_b32_e32 v44, v58
+; VI-NEXT: v_mov_b32_e32 v40, v43
+; VI-NEXT: v_bfe_u32 v5, v43, 8, 8
+; VI-NEXT: v_mov_b32_e32 v43, v4
+; VI-NEXT: v_bfe_u32 v4, v59, 8, 8
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v25
-; VI-NEXT: v_mov_b32_e32 v32, v58
-; VI-NEXT: v_mov_b32_e32 v11, v12
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v23
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v22
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v21
-; VI-NEXT: v_mov_b32_e32 v22, v50
-; VI-NEXT: v_mov_b32_e32 v21, v57
-; VI-NEXT: v_mov_b32_e32 v54, v40
-; VI-NEXT: v_bfe_u32 v2, v40, 8, 8
-; VI-NEXT: v_mov_b32_e32 v36, v53
-; VI-NEXT: v_bfe_u32 v57, v53, 8, 8
-; VI-NEXT: v_mov_b32_e32 v50, v42
-; VI-NEXT: v_bfe_u32 v5, v42, 8, 8
-; VI-NEXT: v_mov_b32_e32 v42, v51
-; VI-NEXT: v_bfe_u32 v25, v51, 8, 8
-; VI-NEXT: v_bfe_u32 v29, v24, 8, 8
-; VI-NEXT: v_bfe_u32 v30, v55, 8, 8
-; VI-NEXT: v_bfe_u32 v28, v60, 8, 8
-; VI-NEXT: v_bfe_u32 v15, v59, 8, 8
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v53, v38, 8, 8
-; VI-NEXT: v_mov_b32_e32 v38, v52
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v52, v56, 8, 8
-; VI-NEXT: v_bfe_u32 v56, v48, 8, 8
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v40, v7
-; VI-NEXT: v_bfe_u32 v47, v7, 8, 8
-; VI-NEXT: v_bfe_u32 v51, v43, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v23
+; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v22
+; VI-NEXT: v_mov_b32_e32 v22, v54
+; VI-NEXT: v_bfe_u32 v26, v39, 8, 8
+; VI-NEXT: v_bfe_u32 v28, v36, 8, 8
+; VI-NEXT: v_mov_b32_e32 v48, v50
+; VI-NEXT: v_bfe_u32 v56, v50, 8, 8
+; VI-NEXT: v_bfe_u32 v25, v24, 8, 8
+; VI-NEXT: v_bfe_u32 v12, v2, 8, 8
+; VI-NEXT: v_bfe_u32 v58, v35, 8, 8
+; VI-NEXT: v_bfe_u32 v15, v3, 8, 8
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v57, v57, 8, 8
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v59, v47, 8, 8
+; VI-NEXT: v_mov_b32_e32 v47, v31
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v31, v60, 8, 8
+; VI-NEXT: v_bfe_u32 v60, v45, 8, 8
+; VI-NEXT: v_bfe_u32 v50, v44, 8, 8
; VI-NEXT: v_bfe_u32 v4, v49, 8, 8
-; VI-NEXT: v_bfe_u32 v7, v44, 8, 8
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v7, v52, 8, 8
; VI-NEXT: s_branch .LBB95_6
; VI-NEXT: .LBB95_5:
; VI-NEXT: v_mov_b32_e32 v1, s44
@@ -184924,250 +185084,248 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v1, s42
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s43
+; VI-NEXT: v_mov_b32_e32 v2, s86
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s16
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s85
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s15
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s80
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s13
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s70
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s22
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s10
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s68
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s23
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s11
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s67
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s24
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s9
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s55
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s25
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s54
; VI-NEXT: v_readlane_b32 s6, v62, 6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s26
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v62, 7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v62, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v62, 9
-; VI-NEXT: v_mov_b32_e32 v59, s6
+; VI-NEXT: v_mov_b32_e32 v3, s6
; VI-NEXT: v_readlane_b32 s6, v62, 10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v62, 11
-; VI-NEXT: v_mov_b32_e32 v60, s6
+; VI-NEXT: v_mov_b32_e32 v35, s6
; VI-NEXT: v_readlane_b32 s6, v62, 12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v62, 13
-; VI-NEXT: v_mov_b32_e32 v55, s6
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v62, 14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_readlane_b32 s6, v62, 15
; VI-NEXT: v_mov_b32_e32 v24, s6
; VI-NEXT: v_readlane_b32 s6, v62, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 17
-; VI-NEXT: v_mov_b32_e32 v42, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 19
-; VI-NEXT: v_mov_b32_e32 v50, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s6
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s28
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s29
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, s4
+; VI-NEXT: v_mov_b32_e32 v26, s4
; VI-NEXT: v_readlane_b32 s4, v62, 22
-; VI-NEXT: v_mov_b32_e32 v57, s4
+; VI-NEXT: v_mov_b32_e32 v28, s4
; VI-NEXT: v_readlane_b32 s4, v62, 23
; VI-NEXT: v_mov_b32_e32 v5, s4
; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: v_mov_b32_e32 v25, s4
+; VI-NEXT: v_mov_b32_e32 v56, s4
; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: v_mov_b32_e32 v29, s4
+; VI-NEXT: v_mov_b32_e32 v25, s4
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: v_mov_b32_e32 v30, s4
+; VI-NEXT: v_mov_b32_e32 v12, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: v_mov_b32_e32 v28, s4
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s5
+; VI-NEXT: v_mov_b32_e32 v58, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v15, s4
+; VI-NEXT: v_mov_b32_e32 v4, s52
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s5
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s50
; VI-NEXT: v_mov_b32_e32 v7, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: v_mov_b32_e32 v33, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 45
; VI-NEXT: v_mov_b32_e32 v34, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: v_mov_b32_e32 v3, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v33, s4
; VI-NEXT: v_mov_b32_e32 v6, s71
; VI-NEXT: v_readlane_b32 s4, v62, 47
; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s64
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 49
; VI-NEXT: v_mov_b32_e32 v61, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v43, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
; VI-NEXT: v_mov_b32_e32 v27, s4
; VI-NEXT: v_readlane_b32 s4, v62, 53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s78
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s88
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s78
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s88
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s90
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, vcc_lo
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s90
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, vcc_lo
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s16
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s17
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: v_mov_b32_e32 v26, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_mov_b32_e32 v29, s4
; VI-NEXT: v_readlane_b32 s4, v62, 55
-; VI-NEXT: v_mov_b32_e32 v20, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: v_mov_b32_e32 v30, s4
; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: v_mov_b32_e32 v23, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s22
+; VI-NEXT: v_mov_b32_e32 v38, s4
; VI-NEXT: v_readlane_b32 s4, v62, 57
-; VI-NEXT: v_mov_b32_e32 v31, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s23
+; VI-NEXT: v_mov_b32_e32 v23, s4
; VI-NEXT: v_readlane_b32 s4, v62, 4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s24
+; VI-NEXT: v_readlane_b32 s6, v62, 17
; VI-NEXT: v_readlane_b32 s5, v62, 5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s25
+; VI-NEXT: v_mov_b32_e32 v48, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 18
; VI-NEXT: v_mov_b32_e32 v8, s4
; VI-NEXT: v_readlane_b32 s4, v62, 2
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s26
+; VI-NEXT: v_mov_b32_e32 v46, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 19
; VI-NEXT: v_readlane_b32 s5, v62, 3
-; VI-NEXT: v_mov_b32_e32 v1, s30
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v6, s64
+; VI-NEXT: v_mov_b32_e32 v6, s30
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s27
+; VI-NEXT: v_mov_b32_e32 v40, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 20
; VI-NEXT: v_mov_b32_e32 v9, s4
; VI-NEXT: v_readlane_b32 s4, v62, 0
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v38, s41
-; VI-NEXT: v_mov_b32_e32 v35, s15
-; VI-NEXT: v_mov_b32_e32 v41, s8
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v37, s41
+; VI-NEXT: v_mov_b32_e32 v51, s14
+; VI-NEXT: v_mov_b32_e32 v42, s8
+; VI-NEXT: v_mov_b32_e32 v41, s7
; VI-NEXT: v_mov_b32_e32 v22, s20
; VI-NEXT: v_mov_b32_e32 v21, s21
-; VI-NEXT: v_mov_b32_e32 v11, s51
-; VI-NEXT: v_mov_b32_e32 v44, s47
-; VI-NEXT: v_mov_b32_e32 v32, s86
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s51
+; VI-NEXT: v_mov_b32_e32 v52, s47
; VI-NEXT: v_mov_b32_e32 v49, s56
-; VI-NEXT: v_mov_b32_e32 v43, s84
-; VI-NEXT: v_mov_b32_e32 v40, s82
+; VI-NEXT: v_mov_b32_e32 v44, s84
+; VI-NEXT: v_mov_b32_e32 v45, s82
+; VI-NEXT: v_mov_b32_e32 v55, s6
; VI-NEXT: v_mov_b32_e32 v36, s53
-; VI-NEXT: v_mov_b32_e32 v37, s65
-; VI-NEXT: v_mov_b32_e32 v54, s69
-; VI-NEXT: v_mov_b32_e32 v53, s52
-; VI-NEXT: v_mov_b32_e32 v52, s59
-; VI-NEXT: v_mov_b32_e32 v56, s58
-; VI-NEXT: v_mov_b32_e32 v47, s83
-; VI-NEXT: v_mov_b32_e32 v51, s66
-; VI-NEXT: v_mov_b32_e32 v39, s57
-; VI-NEXT: v_mov_b32_e32 v45, s87
-; VI-NEXT: v_mov_b32_e32 v46, s81
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v53, s65
+; VI-NEXT: v_mov_b32_e32 v39, s69
+; VI-NEXT: v_mov_b32_e32 v57, s59
+; VI-NEXT: v_mov_b32_e32 v59, s58
+; VI-NEXT: v_mov_b32_e32 v31, s50
+; VI-NEXT: v_mov_b32_e32 v60, s83
+; VI-NEXT: v_mov_b32_e32 v50, s66
+; VI-NEXT: v_mov_b32_e32 v32, s57
+; VI-NEXT: v_mov_b32_e32 v47, s87
+; VI-NEXT: v_mov_b32_e32 v20, s81
; VI-NEXT: v_readlane_b32 s5, v62, 1
; VI-NEXT: v_mov_b32_e32 v10, s4
; VI-NEXT: v_mov_b32_e32 v13, s60
@@ -185176,20 +185334,20 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v18, s74
; VI-NEXT: v_mov_b32_e32 v19, s76
; VI-NEXT: v_mov_b32_e32 v6, s34
-; VI-NEXT: v_mov_b32_e32 v1, s36
+; VI-NEXT: v_mov_b32_e32 v11, s36
; VI-NEXT: v_mov_b32_e32 v14, s38
; VI-NEXT: .LBB95_6: ; %end
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v14, v11, v14, s4
-; VI-NEXT: v_perm_b32 v11, v32, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v15, v59, v15, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v8, v37, v8, s4
-; VI-NEXT: v_perm_b32 v2, v54, v2, s4
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v1, v14, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v3, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_perm_b32 v2, v2, v12, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v10, v46, v10, s4
+; VI-NEXT: v_perm_b32 v9, v55, v9, s4
+; VI-NEXT: v_perm_b32 v8, v53, v8, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -185222,159 +185380,157 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v19, v48, v19, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v1, v11, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v54, v19, s4
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v9, v12, v9, s4
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v34, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v48, v18, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v48, v17, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v54, v18, s4
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v48, v16, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v54, v17, s4
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v48, v13, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v16, v54, v16, s4
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v10, v48, v10, s4
+; VI-NEXT: v_perm_b32 v13, v54, v13, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v15
+; VI-NEXT: v_perm_b32 v1, v1, v33, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v18
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v33, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v15
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v18
+; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v15, v60, v28, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v15
+; VI-NEXT: v_perm_b32 v3, v35, v58, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v22, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v3, v55, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v21, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v16
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_perm_b32 v3, v24, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v24, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v13
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_perm_b32 v3, v42, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v48, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_perm_b32 v3, v50, v5, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v40, v5, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v9
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_perm_b32 v3, v36, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v36, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v8
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v39, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v38, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v44, v7, s4
+; VI-NEXT: v_perm_b32 v2, v52, v7, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
+; VI-NEXT: v_perm_b32 v1, v1, v23, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v26, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v49, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v20, s4
+; VI-NEXT: v_perm_b32 v1, v1, v30, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
@@ -185387,33 +185543,31 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v43, v51, s4
+; VI-NEXT: v_perm_b32 v2, v44, v50, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v38, v1, s4
+; VI-NEXT: v_perm_b32 v1, v37, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v51, v43, s4
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v40, v47, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v35, v1, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_perm_b32 v2, v45, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
@@ -185424,75 +185578,73 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v1, v61, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_perm_b32 v1, v1, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v56, s4
+; VI-NEXT: v_perm_b32 v1, v1, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v41, v1, s4
+; VI-NEXT: v_perm_b32 v2, v42, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v46, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v20, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v52, s4
+; VI-NEXT: v_perm_b32 v1, v1, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v39, s4
+; VI-NEXT: v_perm_b32 v2, v1, v32, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v45, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v41, v47, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v53, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -185511,8 +185663,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -187655,1035 +187807,1003 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v60, v24
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v59, v16
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v46, v8
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v41, v0
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, v22
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v24, v16
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:972 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:388
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16
; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:56
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:48
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:88
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:120
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:184
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v7
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v13
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v15
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v11
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v21
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v23
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v19
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v29
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v27
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v7
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v61, v6
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v8
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v37
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v10
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v4
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v14
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v12
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v20
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v22
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v22
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v18
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v18
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:136
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v28
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v30
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v32
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v32
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v33
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v33
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v34
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v34
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:208
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:204
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v5
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:200
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:240
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:252
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:252
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v4
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(6) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v3
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:228
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:276
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v7
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v5
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:232
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268
-; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v3
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:264
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:272
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v5
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3) expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v10
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:264
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:340
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v3
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:260
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v5
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 24, v4
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:340
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:304
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:292
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:300
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:336
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:336
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:332
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v14
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:328
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:324
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:332
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v2
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:376
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v3
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:384
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:292
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v18
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:328
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:368
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:364
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:360
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v16
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v14
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v18
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:352
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:376
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:348
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:372
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:368
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:364
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:360
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:356
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:384
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:380
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v20
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v21
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v5
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:36
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:36
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:100
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:100
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3) expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v6
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v27
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v29
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v13
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v14
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:968 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v26
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:968 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:20
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v33, 8, v8
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:44
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
+; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
+; SI-NEXT: s_cbranch_execz .LBB96_2
+; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
+; SI-NEXT: v_mov_b32_e32 v11, v24
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v15, v7
+; SI-NEXT: v_mov_b32_e32 v17, v33
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v6, v1, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v18, v3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_mov_b32_e32 v3, v42
+; SI-NEXT: v_or_b32_e32 v6, v6, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v13, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v27, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v42, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:972 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v12, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v8, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v49, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v22, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v43, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v50, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v29, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v52, v2, v1
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v32, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v53, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v34, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
-; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_cbranch_execz .LBB96_2
-; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v41
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v6, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_mov_b32_e32 v61, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v6, v0, v6
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v12, v0, v7
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v13, v7, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v7, v0, v7
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v14, v0, v10
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v15, v10, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v10, v0, v10
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v16, v0, v11
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v17, v11, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v11, v0, v11
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v19, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v20, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v25, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v21, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v22, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v48, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v23, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v24, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v49, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v27, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v28, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v50, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v29, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v30, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v52, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v33, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v34, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v53, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v35, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v36, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v54, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v37, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v38, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v40, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v39, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v43, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v42, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v44, v0, v18
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v63, v18, v63
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v5, v5, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v32, v26, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v45, v18, v45
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v26, v47, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v47, v56, v18
-; SI-NEXT: v_or_b32_e32 v56, v2, v58
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v55
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v57, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v62, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v4, v4, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v4, v12
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v31, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v59
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v51, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v60
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v57, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v58, v18, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v62, v18, v0
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v18, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v1, v18, v1
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v9, v18, v9
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v55, v18, v55
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v61
-; SI-NEXT: v_or_b32_e32 v60, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v46, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v61, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v41, v18, v41
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v59, v18, v59
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v6
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v4, v8, v12, 16
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v13
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v31
-; SI-NEXT: v_or_b32_e32 v4, v4, v7
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v12, v4, v14, 16
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v12, v12, v10
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v51
-; SI-NEXT: v_or_b32_e32 v15, v13, v16
-; SI-NEXT: v_alignbit_b32 v13, v12, v16, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v51, v13, v11
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v57
-; SI-NEXT: v_or_b32_e32 v17, v13, v19
-; SI-NEXT: v_alignbit_b32 v13, v51, v19, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v14, v13, v25
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v58
-; SI-NEXT: v_or_b32_e32 v16, v13, v21
-; SI-NEXT: v_alignbit_b32 v13, v14, v21, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v31, v13, v48
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v62
-; SI-NEXT: v_or_b32_e32 v57, v13, v23
-; SI-NEXT: v_alignbit_b32 v13, v31, v23, 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v13, v13, v49
-; SI-NEXT: v_alignbit_b32 v0, v13, v27, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28
-; SI-NEXT: v_or_b32_e32 v24, v0, v50
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v24, v29, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v30
-; SI-NEXT: v_or_b32_e32 v21, v0, v52
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v22, v0, v33
-; SI-NEXT: v_alignbit_b32 v0, v21, v33, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v34
-; SI-NEXT: v_or_b32_e32 v19, v0, v53
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v29, v0, v35
-; SI-NEXT: v_alignbit_b32 v0, v19, v35, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v36
-; SI-NEXT: v_or_b32_e32 v23, v0, v54
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v60
-; SI-NEXT: v_or_b32_e32 v20, v0, v37
-; SI-NEXT: v_alignbit_b32 v0, v23, v37, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v38
-; SI-NEXT: v_or_b32_e32 v30, v0, v40
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v46
-; SI-NEXT: v_or_b32_e32 v27, v0, v39
-; SI-NEXT: v_alignbit_b32 v0, v30, v39, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v28, v0, v42
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
-; SI-NEXT: v_or_b32_e32 v34, v0, v44
-; SI-NEXT: v_alignbit_b32 v0, v28, v44, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v63
-; SI-NEXT: v_or_b32_e32 v33, v0, v5
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v41
-; SI-NEXT: v_or_b32_e32 v36, v0, v32
-; SI-NEXT: v_alignbit_b32 v0, v33, v32, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
-; SI-NEXT: v_or_b32_e32 v35, v0, v26
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
-; SI-NEXT: v_or_b32_e32 v38, v0, v47
-; SI-NEXT: v_alignbit_b32 v0, v35, v47, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v56
-; SI-NEXT: v_or_b32_e32 v37, v0, v2
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v39, v0, v3
-; SI-NEXT: v_alignbit_b32 v0, v37, v3, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v47, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v36, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v56, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v44, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v46, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v35, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v58, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v60, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v31, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v61, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v63, v1, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v24, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_or_b32_e32 v14, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v1, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v4, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v41, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v48, v1, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v2, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v45, v3, v25
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v59, v25, v59
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; SI-NEXT: v_or_b32_e32 v1, v0, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; SI-NEXT: v_or_b32_e32 v57, v10, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v38, v10, v51
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v15, v19, v10
+; SI-NEXT: v_and_b32_e32 v19, 0xff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_or_b32_e32 v19, v28, v19
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v54
+; SI-NEXT: v_or_b32_e32 v33, v10, v23
+; SI-NEXT: v_and_b32_e32 v23, 0xff, v11
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v62
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v39, v10
+; SI-NEXT: v_alignbit_b32 v11, v6, v13, 16
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v20, v20, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v39, 0xff, v39
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v21, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v28, v25, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v21, v21, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v30, v25, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v23, v23, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v40, v25, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v62, v25, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v9, v25, v17
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v25, v3
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_or_b32_e32 v9, v9, v44
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v25
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v37, v25, v3
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v26, v25, v3
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v25, 0xff, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v25, v25, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v55, v39, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v39, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v39, v39, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v51, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v51, v51, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v54, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v54, v54, v3
+; SI-NEXT: v_or_b32_e32 v3, v20, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v27
+; SI-NEXT: v_or_b32_e32 v20, v13, v42
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v21
+; SI-NEXT: v_or_b32_e32 v0, v13, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v8
+; SI-NEXT: v_or_b32_e32 v21, v13, v49
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v8, v13, v22
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v43
+; SI-NEXT: v_or_b32_e32 v43, v13, v50
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v28
+; SI-NEXT: v_alignbit_b32 v17, v20, v12, 16
+; SI-NEXT: v_or_b32_e32 v12, v13, v29
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v30
+; SI-NEXT: v_or_b32_e32 v30, v23, v32
+; SI-NEXT: v_alignbit_b32 v27, v43, v29, 16
+; SI-NEXT: v_alignbit_b32 v22, v21, v22, 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v13, v13, v52
+; SI-NEXT: v_alignbit_b32 v23, v13, v32, 16
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v32, v23, v53
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v28, v23, v34
+; SI-NEXT: v_alignbit_b32 v23, v32, v34, 16
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v40, v23, v47
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v62
+; SI-NEXT: v_or_b32_e32 v29, v23, v36
+; SI-NEXT: v_alignbit_b32 v23, v40, v36, 16
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v36, v23, v56
+; SI-NEXT: v_alignbit_b32 v9, v36, v44, 16
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v46
+; SI-NEXT: v_or_b32_e32 v44, v9, v35
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v9, v9, v58
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v9, v44, v58, 16
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v60
+; SI-NEXT: v_or_b32_e32 v46, v9, v31
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v37
+; SI-NEXT: v_or_b32_e32 v60, v9, v61
+; SI-NEXT: v_alignbit_b32 v9, v46, v61, 16
+; SI-NEXT: v_or_b32_e32 v61, v5, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v25
+; SI-NEXT: v_or_b32_e32 v25, v5, v41
+; SI-NEXT: v_alignbit_b32 v5, v61, v41, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v48
+; SI-NEXT: v_or_b32_e32 v41, v5, v2
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v37, v5, v45
+; SI-NEXT: v_alignbit_b32 v5, v41, v45, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v59
+; SI-NEXT: v_mov_b32_e32 v16, v29
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v63
+; SI-NEXT: v_or_b32_e32 v29, v5, v1
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v39
+; SI-NEXT: v_or_b32_e32 v58, v9, v24
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v26
+; SI-NEXT: v_or_b32_e32 v26, v5, v57
+; SI-NEXT: v_alignbit_b32 v5, v29, v57, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v38
+; SI-NEXT: v_or_b32_e32 v55, v5, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v51
+; SI-NEXT: v_or_b32_e32 v45, v5, v15
+; SI-NEXT: v_alignbit_b32 v5, v55, v15, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v33
+; SI-NEXT: v_or_b32_e32 v34, v5, v10
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; SI-NEXT: v_or_b32_e32 v57, v5, v19
+; SI-NEXT: v_alignbit_b32 v5, v34, v19, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v18
+; SI-NEXT: v_mov_b32_e32 v18, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -188833,271 +188953,322 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v42
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v49
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v50
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v52
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v53
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v47
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_or_b32_e32 v63, v9, v14
+; SI-NEXT: v_alignbit_b32 v14, v58, v14, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v56
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_mov_b32_e32 v18, v57
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v48
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v49
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v50
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v52
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v54
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_mov_b32_e32 v9, v30
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v14, v28
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v10
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: .LBB96_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB96_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
-; SI-NEXT: v_or_b32_e32 v2, v58, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
; SI-NEXT: s_movk_i32 s6, 0x300
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
-; SI-NEXT: v_or_b32_e32 v3, v57, v3
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v55
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v62, v4
-; SI-NEXT: v_mov_b32_e32 v20, v1
-; SI-NEXT: v_add_i32_e32 v37, vcc, 0x3000000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v37
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v6, v0, v6
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x300, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v4, v4, v6
-; SI-NEXT: v_add_i32_e32 v39, vcc, 0x3000000, v4
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v30
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_or_b32_e32 v3, v28, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v25, v3, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v62
+; SI-NEXT: v_or_b32_e32 v1, v23, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_or_b32_e32 v3, v39, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v6, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v28, v5
+; SI-NEXT: v_add_i32_e32 v57, vcc, 0x3000000, v25
+; SI-NEXT: v_add_i32_e32 v34, vcc, 0x3000000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v34
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v3, v0, v3
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v6, v56, v6
-; SI-NEXT: v_or_b32_e32 v3, v6, v3
-; SI-NEXT: v_add_i32_e32 v38, vcc, 0x3000000, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v6, v45, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v19, v3
+; SI-NEXT: v_or_b32_e32 v5, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v7
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v15, v3
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v45, vcc, 0x3000000, v5
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v1, v51, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v7, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v55, vcc, 0x3000000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v55
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v47, v7
-; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_add_i32_e32 v35, vcc, 0x3000000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v35
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v10, v3
+; SI-NEXT: v_or_b32_e32 v9, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_or_b32_e32 v1, v59, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v0, v7
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v26, v7
-; SI-NEXT: v_or_b32_e32 v1, v7, v1
-; SI-NEXT: v_add_i32_e32 v36, vcc, 0x3000000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v8, v3
+; SI-NEXT: v_or_b32_e32 v3, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v37, vcc, 0x3000000, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v7, v63, v7
-; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v5, v5, v8
-; SI-NEXT: v_or_b32_e32 v5, v5, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v33, vcc, 0x3000000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v33
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v0, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_or_b32_e32 v0, v7, v0
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v34, vcc, 0x3000000, v0
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_or_b32_e32 v27, v8, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v41, vcc, 0x3000000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v41
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v28
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v8
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v32
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v61, vcc, 0x3000000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v30
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189106,14 +189277,15 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v63, vcc, 0x3000000, v10
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189122,16 +189294,16 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v11
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v23
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v58, vcc, 0x3000000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189140,16 +189312,15 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v12
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v60, vcc, 0x3000000, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189158,14 +189329,16 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v46, vcc, 0x3000000, v13
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v46
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189174,15 +189347,15 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v14
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v14
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189191,31 +189364,31 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v44, vcc, 0x3000000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
+; SI-NEXT: v_or_b32_e32 v16, v33, v16
; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16
; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v16
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189223,16 +189396,16 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v18, v19, v18
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
-; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v24
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v36, vcc, 0x3000000, v17
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189241,15 +189414,15 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_or_b32_e32 v18, v19, v18
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v18
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v18
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -189257,400 +189430,412 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_or_b32_e32 v25, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v40, vcc, 0x3000000, v19
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_or_b32_e32 v26, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v26
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_or_b32_e32 v31, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v15
-; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v20
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xff, v21
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v32, v20, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v32
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v32, vcc, 0x3000000, v21
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v48, v20, v19
-; SI-NEXT: v_or_b32_e32 v0, v48, v0
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v25
-; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v10
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v19
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v31
+; SI-NEXT: v_and_b32_e32 v23, 0xff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v22
+; SI-NEXT: v_or_b32_e32 v23, v26, v23
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v0, v23, v0
+; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v9
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v28
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v14
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v51, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v59
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v43, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v27, v43, v12, 16
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v46
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v22, v21, v8, 16
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:972 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v41
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v17, v20, v18, 16
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v0, v8, v7, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v0
+; SI-NEXT: v_alignbit_b32 v0, v13, v9, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v32, v14, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v40, v16, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v4, v6, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v36, v5, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v0, v44, v7, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v12, v15, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v46, v60, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v51, v17, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v58, v63, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v14, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v61, v25, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v31, v18, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v13, v3, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v24, v5, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v41, v37, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v29, v26, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v55, v45, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v21, v22, 16
+; SI-NEXT: v_alignbit_b32 v0, v34, v57, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v6
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v19, v29, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v23, v20, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v13
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v30, v27, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v28, v34, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v33, v36, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_alignbit_b32 v11, v6, v3, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v35, v38, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v37, v39, 16
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
; SI-NEXT: .LBB96_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v44
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v8
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v27
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v52
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v17
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v6, v6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v51
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v43
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v50
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v48
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v8, v8, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v14
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v18
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v10, v10, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v31
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v52
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v56
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v12, v12, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v40
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v49
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v36
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v22
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v44
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v53
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v54
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_or_b32_e32 v18, v18, v21
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v25
-; SI-NEXT: v_or_b32_e32 v19, v19, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v60
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v46
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v63
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v58
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v30
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v61
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v34
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v25, v25, v27
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v27, v27, v28
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v45
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; SI-NEXT: v_or_b32_e32 v28, v28, v29
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v29, v29, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v57
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
@@ -189667,20 +189852,8 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v36
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v33
-; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v38
-; SI-NEXT: v_or_b32_e32 v28, v28, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v35
-; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v39
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v37
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v34
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -191043,11 +191216,11 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:304
; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:320
; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:160
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:156
; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:152
; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:144
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:140
; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:136
; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:132
@@ -191290,20 +191463,20 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v10, v46, v45, s6
; GFX9-NEXT: v_or_b32_sdwa v11, v43, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-NEXT: v_perm_b32 v12, v55, v54, s6
-; GFX9-NEXT: v_perm_b32 v17, v32, v40, s6
+; GFX9-NEXT: v_perm_b32 v17, v32, v63, s6
; GFX9-NEXT: v_perm_b32 v18, v44, v34, s6
-; GFX9-NEXT: v_perm_b32 v19, v42, v63, s6
+; GFX9-NEXT: v_perm_b32 v19, v42, v40, s6
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
@@ -191784,9 +191957,9 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_sdwa v11, v62, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11
; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54
-; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v63
+; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v40
; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v41
-; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v40
+; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v63
; GFX9-NEXT: s_waitcnt vmcnt(21)
; GFX9-NEXT: v_add_u16_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(20)
@@ -194035,368 +194208,373 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s4, v20
; SI-NEXT: v_writelane_b32 v56, s4, 24
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316
; SI-NEXT: v_writelane_b32 v56, s4, 25
-; SI-NEXT: v_readfirstlane_b32 s4, v17
+; SI-NEXT: v_readfirstlane_b32 s4, v18
; SI-NEXT: v_writelane_b32 v56, s4, 26
-; SI-NEXT: v_readfirstlane_b32 s4, v16
+; SI-NEXT: v_readfirstlane_b32 s4, v17
; SI-NEXT: v_writelane_b32 v56, s4, 27
-; SI-NEXT: v_readfirstlane_b32 s4, v9
+; SI-NEXT: v_readfirstlane_b32 s4, v16
; SI-NEXT: v_writelane_b32 v56, s4, 28
-; SI-NEXT: v_readfirstlane_b32 s4, v8
+; SI-NEXT: v_readfirstlane_b32 s4, v11
; SI-NEXT: v_writelane_b32 v56, s4, 29
+; SI-NEXT: v_readfirstlane_b32 s4, v10
+; SI-NEXT: v_readfirstlane_b32 s85, v15
+; SI-NEXT: v_readfirstlane_b32 s87, v14
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296
+; SI-NEXT: v_readfirstlane_b32 s97, v13
+; SI-NEXT: v_readfirstlane_b32 s99, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300
+; SI-NEXT: v_writelane_b32 v56, s4, 30
+; SI-NEXT: v_readfirstlane_b32 s4, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292
+; SI-NEXT: v_writelane_b32 v56, s4, 31
+; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288
-; SI-NEXT: v_readfirstlane_b32 s4, v7
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264
+; SI-NEXT: v_readfirstlane_b32 s86, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
-; SI-NEXT: v_readfirstlane_b32 s87, v6
+; SI-NEXT: v_readfirstlane_b32 s96, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
-; SI-NEXT: v_readfirstlane_b32 s97, v5
+; SI-NEXT: v_writelane_b32 v56, s4, 32
+; SI-NEXT: v_readfirstlane_b32 s4, v5
+; SI-NEXT: v_writelane_b32 v56, s4, 33
+; SI-NEXT: v_readfirstlane_b32 s4, v4
+; SI-NEXT: v_writelane_b32 v56, s4, 34
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: v_readfirstlane_b32 s99, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272
; SI-NEXT: v_readfirstlane_b32 s76, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268
-; SI-NEXT: v_readfirstlane_b32 s21, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292
-; SI-NEXT: v_readfirstlane_b32 s96, v13
-; SI-NEXT: v_readfirstlane_b32 s98, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:300
-; SI-NEXT: v_readfirstlane_b32 s77, v11
-; SI-NEXT: v_readfirstlane_b32 s22, v10
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:264
-; SI-NEXT: v_writelane_b32 v56, s4, 30
-; SI-NEXT: v_readfirstlane_b32 s85, v15
-; SI-NEXT: v_readfirstlane_b32 s86, v14
-; SI-NEXT: v_readfirstlane_b32 s23, v0
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s35, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v21
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 s83, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:224
-; SI-NEXT: v_readfirstlane_b32 s6, v23
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
-; SI-NEXT: v_readfirstlane_b32 s4, v2
-; SI-NEXT: v_writelane_b32 v56, s4, 31
+; SI-NEXT: v_readfirstlane_b32 s65, v21
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224
; SI-NEXT: v_readfirstlane_b32 s4, v1
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:248
-; SI-NEXT: v_writelane_b32 v56, s4, 32
-; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v0
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s68, v23
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
+; SI-NEXT: v_readfirstlane_b32 s64, v19
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
-; SI-NEXT: v_writelane_b32 v56, s6, 33
-; SI-NEXT: v_readfirstlane_b32 s6, v24
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:208
-; SI-NEXT: v_writelane_b32 v56, s6, 34
+; SI-NEXT: v_readfirstlane_b32 s17, v20
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208
+; SI-NEXT: v_writelane_b32 v56, s4, 35
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s45, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
+; SI-NEXT: v_readfirstlane_b32 s69, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
+; SI-NEXT: v_readfirstlane_b32 s47, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
+; SI-NEXT: v_readfirstlane_b32 s15, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
+; SI-NEXT: v_readfirstlane_b32 s40, v13
+; SI-NEXT: v_readfirstlane_b32 s92, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
; SI-NEXT: v_readfirstlane_b32 s56, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s90, v11
+; SI-NEXT: v_readfirstlane_b32 s84, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
-; SI-NEXT: v_readfirstlane_b32 s31, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
-; SI-NEXT: v_readfirstlane_b32 s6, v18
-; SI-NEXT: v_writelane_b32 v56, s6, 35
-; SI-NEXT: v_readfirstlane_b32 s6, v17
-; SI-NEXT: v_writelane_b32 v56, s6, 36
-; SI-NEXT: v_readfirstlane_b32 s94, v6
+; SI-NEXT: v_readfirstlane_b32 s61, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:204
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
-; SI-NEXT: v_readfirstlane_b32 s18, v13
-; SI-NEXT: v_readfirstlane_b32 s6, v11
-; SI-NEXT: v_readfirstlane_b32 s47, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
-; SI-NEXT: v_writelane_b32 v56, s6, 37
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
-; SI-NEXT: v_readfirstlane_b32 s6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:184
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
-; SI-NEXT: v_readfirstlane_b32 s59, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
-; SI-NEXT: v_readfirstlane_b32 s66, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
-; SI-NEXT: v_readfirstlane_b32 s44, v5
+; SI-NEXT: v_readfirstlane_b32 s62, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
-; SI-NEXT: v_writelane_b32 v56, s6, 38
+; SI-NEXT: v_readfirstlane_b32 s41, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
+; SI-NEXT: v_readfirstlane_b32 s66, v3
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s62, v22
-; SI-NEXT: v_readfirstlane_b32 s74, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:28
+; SI-NEXT: v_readfirstlane_b32 s80, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
+; SI-NEXT: v_readfirstlane_b32 s89, v24
+; SI-NEXT: v_readfirstlane_b32 s93, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28
; SI-NEXT: s_waitcnt expcnt(3)
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
-; SI-NEXT: v_readfirstlane_b32 s65, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
-; SI-NEXT: v_readfirstlane_b32 s70, v23
+; SI-NEXT: v_readfirstlane_b32 s63, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
+; SI-NEXT: v_readfirstlane_b32 s20, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
+; SI-NEXT: v_readfirstlane_b32 s72, v23
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
-; SI-NEXT: v_readfirstlane_b32 s73, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
-; SI-NEXT: v_readfirstlane_b32 s71, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:52
+; SI-NEXT: v_readfirstlane_b32 s67, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: v_readfirstlane_b32 s94, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52
; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
-; SI-NEXT: v_readfirstlane_b32 s57, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
-; SI-NEXT: v_readfirstlane_b32 s60, v19
+; SI-NEXT: v_readfirstlane_b32 s83, v19
; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44
; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40
-; SI-NEXT: v_readfirstlane_b32 s72, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92
+; SI-NEXT: v_readfirstlane_b32 s44, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88
-; SI-NEXT: v_readfirstlane_b32 s75, v1
+; SI-NEXT: v_readfirstlane_b32 s91, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
-; SI-NEXT: v_readfirstlane_b32 s30, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:4
+; SI-NEXT: v_readfirstlane_b32 s60, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
+; SI-NEXT: v_readfirstlane_b32 s73, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32
-; SI-NEXT: v_readfirstlane_b32 s53, v4
+; SI-NEXT: v_readfirstlane_b32 s53, v9
+; SI-NEXT: v_readfirstlane_b32 s54, v31
; SI-NEXT: v_writelane_b32 v47, s53, 0
-; SI-NEXT: v_readfirstlane_b32 s54, v3
-; SI-NEXT: v_writelane_b32 v47, s83, 1
-; SI-NEXT: v_readfirstlane_b32 s55, v37
-; SI-NEXT: v_writelane_b32 v47, s54, 2
-; SI-NEXT: v_readfirstlane_b32 s12, v38
-; SI-NEXT: v_writelane_b32 v47, s55, 3
-; SI-NEXT: v_writelane_b32 v47, s12, 4
-; SI-NEXT: v_readfirstlane_b32 s78, v8
-; SI-NEXT: v_readfirstlane_b32 s45, v7
-; SI-NEXT: v_readfirstlane_b32 s46, v33
-; SI-NEXT: v_readfirstlane_b32 s13, v10
-; SI-NEXT: v_writelane_b32 v47, s13, 5
-; SI-NEXT: v_readfirstlane_b32 s14, v34
+; SI-NEXT: v_readfirstlane_b32 s55, v32
+; SI-NEXT: v_writelane_b32 v47, s54, 1
+; SI-NEXT: v_writelane_b32 v47, s55, 2
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s88, v31
-; SI-NEXT: v_readfirstlane_b32 s95, v9
-; SI-NEXT: v_writelane_b32 v47, s95, 6
-; SI-NEXT: v_readfirstlane_b32 s29, v32
-; SI-NEXT: v_writelane_b32 v47, s88, 7
-; SI-NEXT: v_writelane_b32 v47, s29, 8
-; SI-NEXT: v_writelane_b32 v47, s78, 9
-; SI-NEXT: v_writelane_b32 v47, s45, 10
-; SI-NEXT: v_writelane_b32 v47, s46, 11
-; SI-NEXT: v_writelane_b32 v47, s47, 12
-; SI-NEXT: v_writelane_b32 v47, s56, 13
-; SI-NEXT: v_writelane_b32 v47, s57, 14
-; SI-NEXT: v_readfirstlane_b32 s15, v6
-; SI-NEXT: v_writelane_b32 v47, s14, 15
-; SI-NEXT: v_readfirstlane_b32 s91, v17
-; SI-NEXT: v_writelane_b32 v47, s15, 16
-; SI-NEXT: v_readfirstlane_b32 s93, v26
-; SI-NEXT: v_writelane_b32 v47, s91, 17
-; SI-NEXT: v_writelane_b32 v47, s93, 18
-; SI-NEXT: v_writelane_b32 v47, s60, 19
-; SI-NEXT: v_writelane_b32 v47, s61, 20
-; SI-NEXT: v_readfirstlane_b32 s63, v27
-; SI-NEXT: v_writelane_b32 v47, s62, 21
-; SI-NEXT: v_writelane_b32 v47, s63, 22
-; SI-NEXT: v_readfirstlane_b32 s25, v13
-; SI-NEXT: v_writelane_b32 v47, s72, 23
-; SI-NEXT: v_readfirstlane_b32 s42, v16
-; SI-NEXT: v_writelane_b32 v47, s25, 24
-; SI-NEXT: v_writelane_b32 v47, s74, 25
-; SI-NEXT: v_readfirstlane_b32 s64, v12
-; SI-NEXT: v_writelane_b32 v47, s75, 26
-; SI-NEXT: v_readfirstlane_b32 s92, v29
-; SI-NEXT: v_readfirstlane_b32 s79, v52
-; SI-NEXT: v_writelane_b32 v47, s64, 27
-; SI-NEXT: v_readfirstlane_b32 s89, v0
-; SI-NEXT: v_writelane_b32 v47, s92, 28
-; SI-NEXT: v_writelane_b32 v47, s65, 29
-; SI-NEXT: v_readfirstlane_b32 s34, v53
-; SI-NEXT: v_writelane_b32 v47, s94, 30
-; SI-NEXT: v_writelane_b32 v47, s18, 31
-; SI-NEXT: v_readfirstlane_b32 s41, v30
-; SI-NEXT: v_writelane_b32 v47, s44, 32
-; SI-NEXT: v_readfirstlane_b32 s58, v11
-; SI-NEXT: v_readfirstlane_b32 s37, v39
-; SI-NEXT: v_readfirstlane_b32 s16, v20
-; SI-NEXT: v_writelane_b32 v56, s16, 39
-; SI-NEXT: v_readfirstlane_b32 s17, v25
-; SI-NEXT: v_readfirstlane_b32 s40, v41
-; SI-NEXT: v_writelane_b32 v56, s17, 40
-; SI-NEXT: v_readfirstlane_b32 s6, v42
-; SI-NEXT: v_writelane_b32 v56, s40, 41
-; SI-NEXT: v_writelane_b32 v56, s6, 42
+; SI-NEXT: v_readfirstlane_b32 s88, v8
+; SI-NEXT: v_writelane_b32 v47, s69, 3
+; SI-NEXT: v_writelane_b32 v47, s88, 4
+; SI-NEXT: v_writelane_b32 v47, s17, 5
+; SI-NEXT: v_readfirstlane_b32 s78, v7
+; SI-NEXT: v_writelane_b32 v47, s92, 6
+; SI-NEXT: v_readfirstlane_b32 s30, v33
+; SI-NEXT: v_writelane_b32 v47, s78, 7
+; SI-NEXT: v_writelane_b32 v47, s30, 8
+; SI-NEXT: v_readfirstlane_b32 s13, v34
+; SI-NEXT: v_writelane_b32 v47, s90, 9
+; SI-NEXT: v_readfirstlane_b32 s14, v6
+; SI-NEXT: v_writelane_b32 v47, s13, 10
+; SI-NEXT: v_readfirstlane_b32 s81, v14
+; SI-NEXT: v_writelane_b32 v47, s14, 11
+; SI-NEXT: v_readfirstlane_b32 s82, v26
+; SI-NEXT: v_writelane_b32 v47, s81, 12
+; SI-NEXT: v_writelane_b32 v47, s82, 13
+; SI-NEXT: v_writelane_b32 v47, s83, 14
+; SI-NEXT: v_writelane_b32 v47, s84, 15
+; SI-NEXT: v_readfirstlane_b32 s74, v27
+; SI-NEXT: v_writelane_b32 v47, s89, 16
+; SI-NEXT: v_writelane_b32 v47, s74, 17
+; SI-NEXT: v_writelane_b32 v47, s44, 18
+; SI-NEXT: v_readfirstlane_b32 s46, v12
+; SI-NEXT: v_writelane_b32 v47, s45, 19
+; SI-NEXT: v_writelane_b32 v47, s46, 20
+; SI-NEXT: v_writelane_b32 v47, s47, 21
+; SI-NEXT: v_writelane_b32 v47, s93, 22
+; SI-NEXT: v_readfirstlane_b32 s58, v13
+; SI-NEXT: v_writelane_b32 v47, s91, 23
+; SI-NEXT: v_readfirstlane_b32 s59, v28
+; SI-NEXT: v_writelane_b32 v47, s58, 24
+; SI-NEXT: v_readfirstlane_b32 s31, v2
+; SI-NEXT: v_writelane_b32 v47, s59, 25
+; SI-NEXT: v_readfirstlane_b32 s34, v39
+; SI-NEXT: v_writelane_b32 v47, s60, 26
+; SI-NEXT: v_writelane_b32 v47, s61, 27
+; SI-NEXT: v_readfirstlane_b32 s36, v48
+; SI-NEXT: v_writelane_b32 v47, s15, 28
+; SI-NEXT: v_readfirstlane_b32 s16, v30
+; SI-NEXT: v_writelane_b32 v47, s62, 29
+; SI-NEXT: v_readfirstlane_b32 s19, v10
+; SI-NEXT: v_writelane_b32 v47, s16, 30
+; SI-NEXT: v_writelane_b32 v47, s19, 31
+; SI-NEXT: v_writelane_b32 v47, s40, 32
+; SI-NEXT: v_writelane_b32 v47, s63, 33
+; SI-NEXT: v_readfirstlane_b32 s48, v5
+; SI-NEXT: v_writelane_b32 v47, s72, 34
+; SI-NEXT: v_readfirstlane_b32 s49, v35
+; SI-NEXT: v_writelane_b32 v47, s41, 35
+; SI-NEXT: v_readfirstlane_b32 s50, v36
+; SI-NEXT: v_readfirstlane_b32 s29, v41
+; SI-NEXT: v_writelane_b32 v56, s29, 36
; SI-NEXT: v_readfirstlane_b32 s43, v51
-; SI-NEXT: v_writelane_b32 v56, s42, 43
-; SI-NEXT: v_readfirstlane_b32 s7, v23
-; SI-NEXT: v_writelane_b32 v56, s43, 44
-; SI-NEXT: v_writelane_b32 v56, s7, 45
-; SI-NEXT: v_writelane_b32 v56, s79, 46
+; SI-NEXT: v_readfirstlane_b32 s42, v18
+; SI-NEXT: v_writelane_b32 v56, s42, 37
+; SI-NEXT: v_readfirstlane_b32 s6, v23
+; SI-NEXT: v_writelane_b32 v56, s43, 38
+; SI-NEXT: v_readfirstlane_b32 s75, v52
+; SI-NEXT: v_writelane_b32 v56, s6, 39
+; SI-NEXT: v_readfirstlane_b32 s79, v0
+; SI-NEXT: v_writelane_b32 v56, s75, 40
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s90, v21
-; SI-NEXT: v_writelane_b32 v56, s89, 47
-; SI-NEXT: v_writelane_b32 v56, s90, 48
+; SI-NEXT: v_readfirstlane_b32 s95, v22
+; SI-NEXT: v_writelane_b32 v56, s79, 41
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v53
+; SI-NEXT: v_writelane_b32 v56, s95, 42
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s8, v54
-; SI-NEXT: v_writelane_b32 v56, s34, 49
+; SI-NEXT: v_readfirstlane_b32 s7, v54
+; SI-NEXT: v_writelane_b32 v56, vcc_lo, 43
+; SI-NEXT: v_writelane_b32 v56, s7, 44
+; SI-NEXT: v_writelane_b32 v56, s31, 45
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s36, v2
-; SI-NEXT: v_writelane_b32 v56, s8, 50
-; SI-NEXT: v_writelane_b32 v56, s36, 51
-; SI-NEXT: v_writelane_b32 v47, s41, 33
+; SI-NEXT: v_readfirstlane_b32 s8, v19
+; SI-NEXT: v_writelane_b32 v56, s34, 46
+; SI-NEXT: v_writelane_b32 v56, s8, 47
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s9, v19
-; SI-NEXT: v_writelane_b32 v56, s37, 52
-; SI-NEXT: v_writelane_b32 v47, s58, 34
-; SI-NEXT: v_readfirstlane_b32 s38, v48
-; SI-NEXT: v_writelane_b32 v56, s9, 53
-; SI-NEXT: v_writelane_b32 v47, s59, 35
+; SI-NEXT: v_readfirstlane_b32 s37, v16
+; SI-NEXT: v_writelane_b32 v56, s36, 48
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s39, v14
-; SI-NEXT: v_writelane_b32 v56, s38, 54
+; SI-NEXT: v_readfirstlane_b32 s38, v1
+; SI-NEXT: v_writelane_b32 v56, s37, 49
+; SI-NEXT: v_readfirstlane_b32 s39, v49
+; SI-NEXT: v_writelane_b32 v56, s38, 50
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_readfirstlane_b32 s9, v50
+; SI-NEXT: v_writelane_b32 v56, s39, 51
+; SI-NEXT: v_readfirstlane_b32 s10, v17
+; SI-NEXT: v_writelane_b32 v56, s9, 52
+; SI-NEXT: v_writelane_b32 v56, s10, 53
+; SI-NEXT: v_writelane_b32 v56, s48, 54
+; SI-NEXT: v_writelane_b32 v56, s49, 55
; SI-NEXT: v_writelane_b32 v47, s73, 36
+; SI-NEXT: v_readfirstlane_b32 s24, v4
+; SI-NEXT: v_writelane_b32 v56, s50, 56
+; SI-NEXT: v_writelane_b32 v47, s20, 37
+; SI-NEXT: v_writelane_b32 v56, s24, 57
+; SI-NEXT: v_writelane_b32 v47, s66, 38
+; SI-NEXT: v_readfirstlane_b32 s57, v20
+; SI-NEXT: v_readfirstlane_b32 s51, v3
+; SI-NEXT: v_writelane_b32 v56, s65, 58
+; SI-NEXT: v_writelane_b32 v47, s67, 39
+; SI-NEXT: v_readfirstlane_b32 s52, v37
+; SI-NEXT: v_writelane_b32 v56, s51, 59
+; SI-NEXT: v_writelane_b32 v47, s57, 40
+; SI-NEXT: v_readfirstlane_b32 s21, v15
+; SI-NEXT: v_readfirstlane_b32 s11, v38
+; SI-NEXT: v_writelane_b32 v56, s52, 60
+; SI-NEXT: v_writelane_b32 v47, s94, 41
+; SI-NEXT: v_writelane_b32 v56, s11, 61
+; SI-NEXT: v_writelane_b32 v47, s21, 42
+; SI-NEXT: v_readfirstlane_b32 s12, v11
+; SI-NEXT: v_readfirstlane_b32 s77, v55
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s48, v1
-; SI-NEXT: v_writelane_b32 v56, s39, 55
-; SI-NEXT: v_writelane_b32 v47, s70, 37
-; SI-NEXT: v_readfirstlane_b32 s49, v49
-; SI-NEXT: v_writelane_b32 v56, s48, 56
-; SI-NEXT: v_writelane_b32 v47, vcc_lo, 38
+; SI-NEXT: v_readfirstlane_b32 s26, v24
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s10, v50
-; SI-NEXT: v_writelane_b32 v56, s49, 57
-; SI-NEXT: v_writelane_b32 v47, s30, 39
-; SI-NEXT: v_readfirstlane_b32 s11, v15
-; SI-NEXT: v_writelane_b32 v56, s10, 58
-; SI-NEXT: v_writelane_b32 v47, vcc_hi, 40
-; SI-NEXT: v_readfirstlane_b32 s50, v5
-; SI-NEXT: v_writelane_b32 v56, s11, 59
-; SI-NEXT: v_writelane_b32 v47, s31, 41
-; SI-NEXT: v_readfirstlane_b32 s67, v24
-; SI-NEXT: v_readfirstlane_b32 s51, v35
-; SI-NEXT: v_writelane_b32 v56, s50, 60
-; SI-NEXT: v_writelane_b32 v47, s66, 42
-; SI-NEXT: v_readfirstlane_b32 s52, v36
-; SI-NEXT: v_writelane_b32 v56, s51, 61
-; SI-NEXT: v_writelane_b32 v47, s67, 43
-; SI-NEXT: v_readfirstlane_b32 s35, v18
-; SI-NEXT: v_readfirstlane_b32 s69, v55
+; SI-NEXT: v_readfirstlane_b32 s70, v40
+; SI-NEXT: v_readfirstlane_b32 s98, v21
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s81, v22
+; SI-NEXT: v_readfirstlane_b32 s27, v25
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 s68, v40
-; SI-NEXT: v_readfirstlane_b32 s20, v43
+; SI-NEXT: v_readfirstlane_b32 s25, v42
+; SI-NEXT: v_readfirstlane_b32 s22, v43
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s27, v28
+; SI-NEXT: v_readfirstlane_b32 s18, v29
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s19, v44
-; SI-NEXT: v_writelane_b32 v56, s52, 62
-; SI-NEXT: v_writelane_b32 v47, s71, 44
-; SI-NEXT: v_writelane_b32 v56, s4, 63
-; SI-NEXT: v_writelane_b32 v47, s35, 45
+; SI-NEXT: v_readfirstlane_b32 s23, v44
+; SI-NEXT: v_writelane_b32 v56, s68, 62
+; SI-NEXT: v_writelane_b32 v47, s80, 43
+; SI-NEXT: v_writelane_b32 v56, s12, 63
+; SI-NEXT: v_writelane_b32 v47, s56, 44
; SI-NEXT: s_cbranch_scc0 .LBB97_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_mov_b32 s80, s4
; SI-NEXT: v_readlane_b32 s4, v56, 13
; SI-NEXT: v_readlane_b32 s5, v56, 12
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s28, s4, s5
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 45
; SI-NEXT: v_readlane_b32 s4, v56, 5
; SI-NEXT: v_readlane_b32 s5, v56, 4
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s82, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v56, 31
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s76, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_writelane_b32 v47, s4, 46
-; SI-NEXT: s_and_b32 s4, s22, 0xff
-; SI-NEXT: s_lshl_b32 s5, s77, 8
-; SI-NEXT: s_or_b32 s84, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v56, 25
-; SI-NEXT: s_and_b32 s5, s21, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 8
-; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_writelane_b32 v47, s4, 47
-; SI-NEXT: v_readlane_b32 s4, v56, 18
-; SI-NEXT: v_readlane_b32 s5, v56, 17
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_writelane_b32 v47, s4, 48
-; SI-NEXT: s_and_b32 s4, s7, 0xff
-; SI-NEXT: s_lshl_b32 s5, s6, 8
+; SI-NEXT: s_and_b32 s4, s35, 0xff
+; SI-NEXT: s_lshl_b32 s5, s76, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 49
-; SI-NEXT: s_and_b32 s4, s9, 0xff
-; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 30
+; SI-NEXT: v_readlane_b32 s5, v56, 29
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 50
-; SI-NEXT: s_and_b32 s4, s11, 0xff
-; SI-NEXT: s_lshl_b32 s5, s10, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 26
+; SI-NEXT: v_readlane_b32 s5, v56, 25
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 51
-; SI-NEXT: s_and_b32 s4, s13, 0xff
-; SI-NEXT: s_lshl_b32 s5, s12, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 18
+; SI-NEXT: v_readlane_b32 s5, v56, 17
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 52
-; SI-NEXT: s_and_b32 s4, s15, 0xff
-; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: s_and_b32 s4, s6, 0xff
+; SI-NEXT: s_lshl_b32 s5, s25, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 53
-; SI-NEXT: s_and_b32 s4, s58, 0xff
-; SI-NEXT: s_lshl_b32 s5, s41, 8
+; SI-NEXT: s_and_b32 s4, s8, 0xff
+; SI-NEXT: s_lshl_b32 s5, s7, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 54
-; SI-NEXT: s_and_b32 s4, s35, 0xff
-; SI-NEXT: s_lshl_b32 s5, s67, 8
+; SI-NEXT: s_and_b32 s4, s10, 0xff
+; SI-NEXT: s_lshl_b32 s5, s9, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_writelane_b32 v47, s4, 55
-; SI-NEXT: s_and_b32 s4, s71, 0xff
-; SI-NEXT: s_lshl_b32 s5, s66, 8
-; SI-NEXT: s_or_b32 s71, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 8
-; SI-NEXT: s_or_b32 vcc_lo, s4, s5
-; SI-NEXT: s_and_b32 s4, s59, 0xff
-; SI-NEXT: s_lshl_b32 s5, s18, 8
-; SI-NEXT: s_or_b32 s31, s4, s5
+; SI-NEXT: s_and_b32 s4, s12, 0xff
+; SI-NEXT: s_lshl_b32 s5, s11, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 56
+; SI-NEXT: s_and_b32 s4, s14, 0xff
+; SI-NEXT: s_lshl_b32 s5, s13, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 57
+; SI-NEXT: s_and_b32 s4, s19, 0xff
+; SI-NEXT: s_lshl_b32 s5, s16, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 58
+; SI-NEXT: s_and_b32 s4, s21, 0xff
+; SI-NEXT: s_lshl_b32 s5, s57, 8
+; SI-NEXT: s_or_b32 s57, s4, s5
+; SI-NEXT: s_and_b32 s4, s94, 0xff
+; SI-NEXT: s_lshl_b32 s5, s67, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 59
+; SI-NEXT: s_and_b32 s4, s66, 0xff
+; SI-NEXT: s_lshl_b32 s5, s41, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 60
+; SI-NEXT: s_and_b32 s4, s40, 0xff
+; SI-NEXT: s_lshl_b32 s5, s15, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 61
; SI-NEXT: v_readlane_b32 s4, v56, 9
; SI-NEXT: v_readlane_b32 s5, v56, 8
; SI-NEXT: s_and_b32 s4, s4, 0xff
@@ -194413,58 +194591,65 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_readlane_b32 s6, v56, 10
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
-; SI-NEXT: s_or_b32 s58, s6, s4
-; SI-NEXT: v_readlane_b32 s4, v56, 1
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_and_b32 s6, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 0
-; SI-NEXT: v_writelane_b32 v47, s7, 56
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_lshl_b32 s7, s4, 8
+; SI-NEXT: v_writelane_b32 v47, s7, 62
+; SI-NEXT: s_or_b32 s4, s6, s4
+; SI-NEXT: s_or_b32 s5, s5, s7
+; SI-NEXT: v_readlane_b32 s6, v56, 1
+; SI-NEXT: v_readlane_b32 s7, v56, 0
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s7, s6, s7
-; SI-NEXT: s_and_b32 s6, s23, 0xff
-; SI-NEXT: v_readlane_b32 s8, v56, 32
+; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: v_readlane_b32 s6, v56, 35
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s9, s6, s8
+; SI-NEXT: v_readlane_b32 s6, v56, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
-; SI-NEXT: v_readlane_b32 s4, v56, 3
-; SI-NEXT: s_or_b32 s5, s8, s6
-; SI-NEXT: s_and_b32 s6, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 2
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v56, 30
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s9, 63
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_and_b32 s8, s87, 0xff
-; SI-NEXT: s_lshl_b32 s9, s4, 8
-; SI-NEXT: v_readlane_b32 s4, v56, 29
+; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_and_b32 s8, s96, 0xff
+; SI-NEXT: s_lshl_b32 s9, s86, 8
; SI-NEXT: s_or_b32 s9, s8, s9
-; SI-NEXT: s_and_b32 s8, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 28
+; SI-NEXT: v_readlane_b32 s8, v56, 32
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s10, v56, 31
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s10, s4, 24
-; SI-NEXT: s_or_b32 s4, s10, s8
-; SI-NEXT: s_and_b32 s8, s99, 0xff
-; SI-NEXT: v_writelane_b32 v47, s5, 57
+; SI-NEXT: s_lshl_b32 s10, s10, 24
+; SI-NEXT: s_or_b32 s11, s10, s8
+; SI-NEXT: v_readlane_b32 s8, v56, 34
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s10, v56, 33
+; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s10, s97, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: v_writelane_b32 v47, s4, 58
+; SI-NEXT: v_writelane_b32 v46, s11, 0
; SI-NEXT: s_or_b32 s8, s10, s8
-; SI-NEXT: s_or_b32 s9, s9, s4
-; SI-NEXT: s_and_b32 s10, s86, 0xff
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: s_and_b32 s10, s87, 0xff
; SI-NEXT: s_lshl_b32 s11, s85, 8
-; SI-NEXT: v_readlane_b32 s4, v56, 27
; SI-NEXT: s_or_b32 s11, s10, s11
-; SI-NEXT: s_and_b32 s10, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 26
+; SI-NEXT: v_readlane_b32 s10, v56, 28
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: v_readlane_b32 s12, v56, 27
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s12, s4, 24
-; SI-NEXT: s_or_b32 s4, s12, s10
-; SI-NEXT: s_and_b32 s10, s98, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s13, s12, s10
+; SI-NEXT: s_and_b32 s10, s99, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s12, s96, 24
+; SI-NEXT: s_lshl_b32 s12, s97, 24
; SI-NEXT: s_or_b32 s10, s12, s10
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: v_readlane_b32 s12, v56, 22
+; SI-NEXT: v_writelane_b32 v46, s13, 1
+; SI-NEXT: s_or_b32 s11, s11, s13
; SI-NEXT: s_and_b32 s13, s12, 0xff
; SI-NEXT: v_readlane_b32 s12, v56, 21
; SI-NEXT: s_lshl_b32 s12, s12, 8
@@ -194473,11 +194658,8 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s14, s12, 16
; SI-NEXT: v_readlane_b32 s12, v56, 19
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: v_writelane_b32 v47, s4, 59
-; SI-NEXT: s_or_b32 s11, s11, s4
-; SI-NEXT: s_or_b32 s4, s12, s14
+; SI-NEXT: s_or_b32 s66, s12, s14
; SI-NEXT: v_readlane_b32 s12, v56, 24
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s14, s12, 16
@@ -194486,339 +194668,356 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: v_readlane_b32 s14, v56, 14
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s15, s19, 8
+; SI-NEXT: s_lshl_b32 s15, s23, 8
; SI-NEXT: s_or_b32 s15, s14, s15
-; SI-NEXT: s_and_b32 s14, s27, 0xff
+; SI-NEXT: s_and_b32 s14, s18, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s18, s20, 24
-; SI-NEXT: s_or_b32 s66, s18, s14
+; SI-NEXT: s_lshl_b32 s16, s22, 24
+; SI-NEXT: s_or_b32 s67, s16, s14
; SI-NEXT: v_readlane_b32 s14, v56, 16
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s18, s14, 16
+; SI-NEXT: s_lshl_b32 s16, s14, 16
; SI-NEXT: v_readlane_b32 s14, v56, 15
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: v_writelane_b32 v47, s4, 60
-; SI-NEXT: s_or_b32 s13, s13, s4
-; SI-NEXT: s_mov_b32 s4, s20
-; SI-NEXT: s_or_b32 s14, s14, s18
-; SI-NEXT: s_and_b32 s18, s16, 0xff
-; SI-NEXT: s_lshl_b32 s20, s68, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s81, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s69, 24
-; SI-NEXT: s_or_b32 s67, s24, s20
-; SI-NEXT: s_and_b32 s20, s17, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s40, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s40, s24, s20
-; SI-NEXT: s_or_b32 s41, s18, s67
-; SI-NEXT: s_and_b32 s18, s89, 0xff
-; SI-NEXT: s_lshl_b32 s20, s79, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s42, 0xff
-; SI-NEXT: v_writelane_b32 v47, s68, 61
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s43, 24
-; SI-NEXT: v_writelane_b32 v47, s19, 62
-; SI-NEXT: s_or_b32 s19, s24, s20
-; SI-NEXT: s_and_b32 s20, s90, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s34, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s42, s24, s20
-; SI-NEXT: s_or_b32 s43, s18, s19
-; SI-NEXT: s_and_b32 s18, s39, 0xff
-; SI-NEXT: s_lshl_b32 s20, s38, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s36, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s37, 24
-; SI-NEXT: s_or_b32 s68, s24, s20
-; SI-NEXT: s_and_b32 s20, s48, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s24, s49, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s34, s24, s20
-; SI-NEXT: s_or_b32 s35, s18, s68
-; SI-NEXT: s_and_b32 s18, s53, 0xff
-; SI-NEXT: s_lshl_b32 s20, s52, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s50, 0xff
-; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: v_writelane_b32 v46, s27, 0
-; SI-NEXT: s_lshl_b32 s27, s51, 24
-; SI-NEXT: s_or_b32 s26, s27, s20
-; SI-NEXT: s_and_b32 s20, s54, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s27, s55, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s36, s27, s20
-; SI-NEXT: s_or_b32 s37, s18, s26
-; SI-NEXT: s_and_b32 s18, s78, 0xff
-; SI-NEXT: s_lshl_b32 s20, s29, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s95, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s27, s88, 24
-; SI-NEXT: s_or_b32 s27, s27, s20
-; SI-NEXT: s_and_b32 s20, s45, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s78, s46, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s38, s78, s20
-; SI-NEXT: s_or_b32 s39, s18, s27
-; SI-NEXT: s_and_b32 s18, s25, 0xff
-; SI-NEXT: s_lshl_b32 s20, s63, 8
-; SI-NEXT: s_or_b32 s18, s18, s20
-; SI-NEXT: s_and_b32 s20, s91, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s78, s93, 24
-; SI-NEXT: v_writelane_b32 v46, s69, 1
-; SI-NEXT: s_or_b32 s69, s78, s20
-; SI-NEXT: s_and_b32 s20, s64, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s78, s92, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s48, s78, s20
-; SI-NEXT: s_or_b32 s49, s18, s69
-; SI-NEXT: s_and_b32 s18, s65, 0xff
-; SI-NEXT: s_lshl_b32 s20, s74, 8
-; SI-NEXT: s_or_b32 s20, s18, s20
-; SI-NEXT: s_and_b32 s18, s62, 0xff
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_lshl_b32 s78, s60, 24
-; SI-NEXT: s_or_b32 s18, s78, s18
-; SI-NEXT: s_and_b32 s78, s30, 0xff
-; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s79, s70, 24
+; SI-NEXT: s_or_b32 s14, s14, s16
+; SI-NEXT: s_and_b32 s16, s98, 0xff
+; SI-NEXT: s_mov_b32 s94, s17
+; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s26, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s77, 24
+; SI-NEXT: s_or_b32 s71, s19, s17
+; SI-NEXT: s_and_b32 s17, s27, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s29, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s40, s19, s17
+; SI-NEXT: s_or_b32 s41, s16, s71
+; SI-NEXT: s_and_b32 s16, s79, 0xff
+; SI-NEXT: s_lshl_b32 s17, s75, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s42, 0xff
+; SI-NEXT: v_writelane_b32 v46, s25, 2
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s43, 24
+; SI-NEXT: v_writelane_b32 v46, s26, 3
+; SI-NEXT: s_or_b32 s26, s19, s17
+; SI-NEXT: s_and_b32 s17, s95, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, vcc_lo, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s42, s19, s17
+; SI-NEXT: s_or_b32 s43, s16, s26
+; SI-NEXT: s_and_b32 s16, s37, 0xff
+; SI-NEXT: s_lshl_b32 s17, s36, 8
+; SI-NEXT: s_or_b32 s17, s16, s17
+; SI-NEXT: s_and_b32 s16, s31, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s19, s34, 24
+; SI-NEXT: v_writelane_b32 v46, s23, 4
+; SI-NEXT: s_or_b32 s23, s19, s16
+; SI-NEXT: s_and_b32 s19, s38, 0xff
+; SI-NEXT: v_writelane_b32 v46, s77, 5
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: v_writelane_b32 v46, s22, 6
+; SI-NEXT: s_lshl_b32 s22, s39, 24
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s34, s22, s19
+; SI-NEXT: s_mov_b32 s22, s35
+; SI-NEXT: s_or_b32 s35, s17, s23
+; SI-NEXT: s_and_b32 s17, s24, 0xff
+; SI-NEXT: s_lshl_b32 s19, s50, 8
+; SI-NEXT: s_or_b32 s19, s17, s19
+; SI-NEXT: s_and_b32 s17, s48, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s21, s49, 24
+; SI-NEXT: v_writelane_b32 v46, s18, 7
+; SI-NEXT: s_or_b32 s18, s21, s17
+; SI-NEXT: s_and_b32 s21, s51, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s52, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s36, s24, s21
+; SI-NEXT: s_or_b32 s37, s19, s18
+; SI-NEXT: s_and_b32 s19, s88, 0xff
+; SI-NEXT: s_lshl_b32 s21, s55, 8
+; SI-NEXT: s_or_b32 s19, s19, s21
+; SI-NEXT: s_and_b32 s21, s53, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s54, 24
+; SI-NEXT: v_writelane_b32 v46, s70, 8
+; SI-NEXT: s_or_b32 s70, s24, s21
+; SI-NEXT: s_and_b32 s21, s78, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s30, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s38, s24, s21
+; SI-NEXT: s_or_b32 s39, s19, s70
+; SI-NEXT: s_and_b32 s19, s46, 0xff
+; SI-NEXT: s_lshl_b32 s21, s74, 8
+; SI-NEXT: s_or_b32 s19, s19, s21
+; SI-NEXT: s_and_b32 s21, s81, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s82, 24
+; SI-NEXT: s_mov_b32 s17, s27
+; SI-NEXT: s_mov_b32 s27, s98
+; SI-NEXT: s_or_b32 s98, s24, s21
+; SI-NEXT: s_and_b32 s21, s58, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s24, s59, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s48, s24, s21
+; SI-NEXT: s_or_b32 s49, s19, s98
+; SI-NEXT: s_and_b32 s19, s60, 0xff
+; SI-NEXT: s_lshl_b32 s21, s93, 8
+; SI-NEXT: s_or_b32 s21, s19, s21
+; SI-NEXT: s_and_b32 s19, s89, 0xff
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s24, s83, 24
+; SI-NEXT: s_or_b32 s19, s24, s19
+; SI-NEXT: s_and_b32 s24, s73, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_lshl_b32 s75, s72, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s50, s75, s24
+; SI-NEXT: s_or_b32 s51, s21, s19
+; SI-NEXT: s_and_b32 s21, s91, 0xff
+; SI-NEXT: s_lshl_b32 s24, s44, 8
+; SI-NEXT: s_or_b32 s21, s21, s24
+; SI-NEXT: s_and_b32 s24, s80, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_lshl_b32 s75, s90, 24
+; SI-NEXT: s_or_b32 s16, s75, s24
+; SI-NEXT: s_and_b32 s75, s20, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s78, s63, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s52, s78, s75
+; SI-NEXT: s_or_b32 s53, s21, s16
+; SI-NEXT: s_and_b32 s21, s84, 0xff
+; SI-NEXT: s_lshl_b32 s75, s56, 8
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_and_b32 s75, s92, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s78, s69, 24
+; SI-NEXT: s_or_b32 s78, s78, s75
+; SI-NEXT: s_and_b32 s75, s62, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s79, s61, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s54, s79, s75
+; SI-NEXT: s_or_b32 s55, s21, s78
+; SI-NEXT: s_and_b32 s21, s94, 0xff
+; SI-NEXT: s_lshl_b32 s75, s68, 8
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_and_b32 s75, s65, 0xff
+; SI-NEXT: v_readlane_b32 s24, v47, 49
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s79, s64, 24
+; SI-NEXT: s_and_b32 s44, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 50
+; SI-NEXT: s_or_b32 s88, s79, s75
+; SI-NEXT: s_lshl_b32 s79, s45, 24
+; SI-NEXT: s_and_b32 s45, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 51
+; SI-NEXT: s_and_b32 s75, s47, 0xff
+; SI-NEXT: s_and_b32 s46, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 52
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_and_b32 s47, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 53
+; SI-NEXT: s_mov_b32 s84, s64
+; SI-NEXT: s_or_b32 s64, s79, s75
+; SI-NEXT: s_and_b32 s79, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 54
+; SI-NEXT: s_and_b32 s89, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 55
+; SI-NEXT: s_and_b32 s90, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 56
+; SI-NEXT: s_and_b32 s91, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 57
+; SI-NEXT: v_readlane_b32 s20, v47, 45
+; SI-NEXT: s_and_b32 s92, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 58
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s50, s79, s78
-; SI-NEXT: s_or_b32 s51, s20, s18
-; SI-NEXT: s_and_b32 s20, s75, 0xff
-; SI-NEXT: s_lshl_b32 s78, s72, 8
-; SI-NEXT: s_or_b32 s78, s20, s78
-; SI-NEXT: s_and_b32 s20, s57, 0xff
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s79, s47, 24
-; SI-NEXT: s_or_b32 s20, s79, s20
-; SI-NEXT: s_and_b32 s79, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s73, 24
-; SI-NEXT: s_and_b32 s78, s78, 0xffff
-; SI-NEXT: s_mov_b32 s17, s4
-; SI-NEXT: s_or_b32 s52, s88, s79
-; SI-NEXT: s_or_b32 s53, s78, s20
-; SI-NEXT: s_and_b32 s78, s61, 0xff
-; SI-NEXT: s_lshl_b32 s79, s56, 8
-; SI-NEXT: v_readlane_b32 s4, v56, 38
-; SI-NEXT: s_or_b32 s78, s78, s79
-; SI-NEXT: s_and_b32 s79, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 37
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s4, 24
-; SI-NEXT: s_or_b32 s16, s88, s79
-; SI-NEXT: s_and_b32 s79, s44, 0xff
-; SI-NEXT: s_and_b32 s78, s78, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v56, 34
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s94, 24
-; SI-NEXT: s_or_b32 s55, s78, s16
-; SI-NEXT: s_and_b32 s78, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 33
-; SI-NEXT: s_or_b32 s54, s88, s79
-; SI-NEXT: s_lshl_b32 s79, s4, 8
-; SI-NEXT: s_or_b32 s78, s78, s79
-; SI-NEXT: s_and_b32 s79, s83, 0xff
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s80, 24
-; SI-NEXT: v_readlane_b32 s4, v56, 36
-; SI-NEXT: v_writelane_b32 v47, s81, 63
-; SI-NEXT: s_or_b32 s88, s88, s79
-; SI-NEXT: s_and_b32 s79, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v56, 35
-; SI-NEXT: s_lshl_b32 s89, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v47, 46
-; SI-NEXT: s_and_b32 s46, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 47
-; SI-NEXT: s_and_b32 s56, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 48
-; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_and_b32 s57, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 49
-; SI-NEXT: s_or_b32 s64, s89, s79
-; SI-NEXT: s_and_b32 s89, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 50
-; SI-NEXT: s_and_b32 s78, s78, 0xffff
-; SI-NEXT: s_and_b32 s30, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 51
-; SI-NEXT: s_or_b32 s65, s78, s88
-; SI-NEXT: s_and_b32 s78, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 52
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_and_b32 s93, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 59
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_and_b32 s95, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 60
+; SI-NEXT: s_or_b32 s74, s20, s4
+; SI-NEXT: s_mov_b32 s75, s5
+; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
+; SI-NEXT: s_or_b32 s65, s21, s88
+; SI-NEXT: v_readlane_b32 s21, v47, 47
+; SI-NEXT: s_and_b32 s30, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v47, 61
+; SI-NEXT: v_writelane_b32 v47, s4, 45
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s5, 46
+; SI-NEXT: s_lshr_b64 s[4:5], s[6:7], 16
+; SI-NEXT: s_or_b32 s13, s13, s66
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_and_b32 s47, s84, 0xffff
-; SI-NEXT: s_and_b32 s79, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 53
-; SI-NEXT: s_lshr_b64 s[24:25], s[58:59], 16
-; SI-NEXT: s_or_b32 s7, s7, s5
-; SI-NEXT: s_or_b32 s15, s15, s66
-; SI-NEXT: s_mov_b32 s5, s85
-; SI-NEXT: s_and_b32 s44, s28, 0xffff
-; SI-NEXT: s_and_b32 s90, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 54
-; SI-NEXT: s_or_b32 s62, s46, s8
-; SI-NEXT: s_or_b32 s60, s47, s10
-; SI-NEXT: s_or_b32 s46, s89, s40
-; SI-NEXT: s_mov_b32 s47, s41
-; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 16
-; SI-NEXT: s_or_b32 s40, s79, s36
-; SI-NEXT: s_mov_b32 s41, s37
-; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
-; SI-NEXT: v_readlane_b32 s25, v47, 56
-; SI-NEXT: s_and_b32 s91, s4, 0xffff
-; SI-NEXT: s_and_b32 s93, s71, 0xffff
-; SI-NEXT: s_or_b32 s74, s44, s58
-; SI-NEXT: s_or_b32 s58, s56, s12
-; SI-NEXT: s_or_b32 s56, s57, s14
-; SI-NEXT: s_mov_b32 s57, s15
-; SI-NEXT: s_lshr_b64 s[70:71], s[14:15], 16
-; SI-NEXT: s_or_b32 s14, s90, s38
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s4, 47
+; SI-NEXT: s_or_b32 s15, s15, s67
+; SI-NEXT: s_or_b32 s72, s21, s6
+; SI-NEXT: v_writelane_b32 v47, s5, 48
+; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16
+; SI-NEXT: s_and_b32 s31, s24, 0xffff
+; SI-NEXT: s_or_b32 s68, s47, s14
+; SI-NEXT: s_mov_b32 s69, s15
+; SI-NEXT: s_lshr_b64 s[24:25], s[14:15], 16
+; SI-NEXT: s_or_b32 s14, s92, s38
; SI-NEXT: s_mov_b32 s15, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[38:39], 16
-; SI-NEXT: s_lshr_b32 s37, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 57
-; SI-NEXT: s_and_b32 s45, s82, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v47, 55
-; SI-NEXT: s_mov_b32 s75, s59
+; SI-NEXT: v_readlane_b32 s21, v47, 62
+; SI-NEXT: s_and_b32 s94, s57, 0xffff
+; SI-NEXT: s_or_b32 s58, s46, s12
; SI-NEXT: s_mov_b32 s59, s13
-; SI-NEXT: s_lshr_b64 s[82:83], s[12:13], 16
-; SI-NEXT: s_or_b32 s12, s91, s48
+; SI-NEXT: s_or_b32 s12, s93, s48
; SI-NEXT: s_mov_b32 s13, s49
; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 58
-; SI-NEXT: s_and_b32 s92, s4, 0xffff
-; SI-NEXT: s_and_b32 s94, vcc_lo, 0xffff
-; SI-NEXT: s_and_b32 s95, s31, 0xffff
-; SI-NEXT: s_lshr_b32 s49, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 59
-; SI-NEXT: s_or_b32 s72, s45, s6
-; SI-NEXT: s_mov_b32 s73, s7
-; SI-NEXT: s_lshr_b64 vcc, s[6:7], 16
-; SI-NEXT: s_mov_b32 s63, s9
-; SI-NEXT: s_lshr_b64 s[28:29], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: v_readlane_b32 s21, v47, 63
+; SI-NEXT: s_or_b32 s60, s45, s10
; SI-NEXT: s_mov_b32 s61, s11
-; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16
-; SI-NEXT: s_mov_b32 s85, s5
-; SI-NEXT: s_or_b32 s10, s92, s50
+; SI-NEXT: s_lshr_b64 s[82:83], s[10:11], 16
+; SI-NEXT: s_or_b32 s10, s94, s50
; SI-NEXT: s_mov_b32 s11, s51
; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16
-; SI-NEXT: s_or_b32 s8, s93, s52
+; SI-NEXT: s_lshr_b32 s49, s21, 16
+; SI-NEXT: v_readlane_b32 s21, v46, 0
+; SI-NEXT: s_mov_b32 s73, s7
+; SI-NEXT: s_or_b32 s62, s44, s8
+; SI-NEXT: s_mov_b32 s63, s9
+; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 16
+; SI-NEXT: s_or_b32 s46, s79, s40
+; SI-NEXT: s_mov_b32 s47, s41
+; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 16
+; SI-NEXT: s_or_b32 s44, s89, s42
+; SI-NEXT: s_mov_b32 s45, s43
+; SI-NEXT: s_lshr_b64 s[28:29], s[42:43], 16
+; SI-NEXT: s_or_b32 s42, s90, s34
+; SI-NEXT: s_mov_b32 s43, s35
+; SI-NEXT: s_lshr_b64 s[34:35], s[34:35], 16
+; SI-NEXT: s_or_b32 s40, s91, s36
+; SI-NEXT: s_mov_b32 s41, s37
+; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
+; SI-NEXT: s_or_b32 s8, s95, s52
; SI-NEXT: s_mov_b32 s9, s53
; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
-; SI-NEXT: s_or_b32 s6, s94, s54
+; SI-NEXT: s_or_b32 s6, s30, s54
; SI-NEXT: s_mov_b32 s7, s55
; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16
-; SI-NEXT: s_or_b32 s4, s95, s64
+; SI-NEXT: s_or_b32 s4, s31, s64
; SI-NEXT: s_mov_b32 s5, s65
; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16
-; SI-NEXT: s_lshr_b32 s90, s25, 16
-; SI-NEXT: v_readlane_b32 s25, v47, 60
-; SI-NEXT: s_or_b32 s44, s30, s42
-; SI-NEXT: s_mov_b32 s45, s43
-; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 16
-; SI-NEXT: s_or_b32 s42, s78, s34
-; SI-NEXT: s_mov_b32 s43, s35
-; SI-NEXT: s_lshr_b64 s[34:35], s[34:35], 16
-; SI-NEXT: v_readlane_b32 s81, v47, 63
-; SI-NEXT: s_lshr_b32 s78, s25, 16
-; SI-NEXT: s_lshr_b32 s51, s66, 16
-; SI-NEXT: s_lshr_b32 s53, s67, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: v_readlane_b32 s19, v47, 62
-; SI-NEXT: s_lshr_b32 s65, s68, 16
-; SI-NEXT: s_lshr_b32 s79, s26, 16
-; SI-NEXT: s_lshr_b32 s89, s27, 16
-; SI-NEXT: v_readlane_b32 s27, v46, 0
-; SI-NEXT: s_lshr_b32 s91, s69, 16
-; SI-NEXT: v_readlane_b32 s69, v46, 1
-; SI-NEXT: v_readlane_b32 s68, v47, 61
+; SI-NEXT: s_lshr_b32 s51, s21, 16
+; SI-NEXT: v_readlane_b32 s21, v46, 1
+; SI-NEXT: s_mov_b32 s35, s22
+; SI-NEXT: v_readlane_b32 s77, v46, 5
+; SI-NEXT: s_lshr_b32 s53, s21, 16
+; SI-NEXT: s_lshr_b32 s55, s66, 16
+; SI-NEXT: v_readlane_b32 s25, v46, 2
+; SI-NEXT: s_lshr_b32 s65, s67, 16
+; SI-NEXT: s_lshr_b32 s79, s71, 16
+; SI-NEXT: s_lshr_b32 s89, s26, 16
+; SI-NEXT: v_readlane_b32 s26, v46, 3
+; SI-NEXT: s_lshr_b32 s91, s23, 16
+; SI-NEXT: v_readlane_b32 s23, v46, 4
; SI-NEXT: s_lshr_b32 s93, s18, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 s92, s16, 16
-; SI-NEXT: s_lshr_b32 s16, s88, 16
-; SI-NEXT: s_mov_b32 s20, s17
+; SI-NEXT: v_readlane_b32 s18, v46, 7
+; SI-NEXT: s_lshr_b32 s95, s70, 16
+; SI-NEXT: v_readlane_b32 s70, v46, 8
+; SI-NEXT: s_lshr_b32 s31, s98, 16
+; SI-NEXT: s_mov_b32 s98, s27
+; SI-NEXT: s_mov_b32 s27, s17
+; SI-NEXT: s_lshr_b32 s29, s19, 16
+; SI-NEXT: s_lshr_b32 s19, s16, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s78, 16
+; SI-NEXT: v_readlane_b32 s22, v46, 6
+; SI-NEXT: s_lshr_b32 s37, s88, 16
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB97_3
; SI-NEXT: .LBB97_2:
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b32 s84, s64
+; SI-NEXT: v_writelane_b32 v47, s4, 45
+; SI-NEXT: v_writelane_b32 v47, s5, 46
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: s_mov_b64 s[66:67], -1
+; SI-NEXT: v_writelane_b32 v47, s4, 47
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr24
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr28
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v47, s5, 48
; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr24
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr28
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr29
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $sgpr19
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr16
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: .LBB97_3: ; %Flow
-; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 s18, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s18, 1
+; SI-NEXT: s_and_b64 s[16:17], s[66:67], exec
+; SI-NEXT: s_cselect_b32 s16, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s16, 1
+; SI-NEXT: v_readlane_b32 s16, v47, 45
+; SI-NEXT: s_mov_b32 s78, s16
+; SI-NEXT: s_mov_b32 s88, s56
+; SI-NEXT: v_readlane_b32 s56, v47, 47
+; SI-NEXT: s_mov_b32 s90, s28
+; SI-NEXT: v_readlane_b32 s17, v47, 46
+; SI-NEXT: v_readlane_b32 s57, v47, 48
; SI-NEXT: s_cbranch_scc1 .LBB97_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_readlane_b32 s4, v47, 35
+; SI-NEXT: v_readlane_b32 s4, v47, 32
; SI-NEXT: s_add_i32 s4, s4, 3
-; SI-NEXT: v_readlane_b32 s5, v47, 31
-; SI-NEXT: v_readlane_b32 s6, v56, 36
+; SI-NEXT: v_readlane_b32 s5, v47, 28
+; SI-NEXT: v_readlane_b32 s6, v47, 21
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v56, 35
+; SI-NEXT: v_readlane_b32 s5, v47, 19
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
@@ -194826,31 +195025,30 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v56, 34
+; SI-NEXT: v_readlane_b32 s5, v47, 5
; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: v_readlane_b32 s6, v56, 33
-; SI-NEXT: v_readlane_b32 s7, v47, 1
+; SI-NEXT: v_readlane_b32 s6, v56, 62
+; SI-NEXT: v_readlane_b32 s7, v56, 58
; SI-NEXT: s_and_b32 s5, s5, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v56, 63
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s6, s84, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_addk_i32 s5, 0x300
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v47, 41
+; SI-NEXT: v_readlane_b32 s6, v47, 38
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 38
-; SI-NEXT: v_readlane_b32 s8, v47, 32
+; SI-NEXT: v_readlane_b32 s7, v47, 35
+; SI-NEXT: v_readlane_b32 s8, v47, 29
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 30
+; SI-NEXT: v_readlane_b32 s7, v47, 27
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
@@ -194858,15 +195056,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s7, s7, s8
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 20
+; SI-NEXT: v_readlane_b32 s7, v47, 15
; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s8, v47, 13
-; SI-NEXT: v_readlane_b32 s9, v56, 38
+; SI-NEXT: v_readlane_b32 s8, v47, 44
+; SI-NEXT: v_readlane_b32 s9, v47, 6
; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v56, 37
+; SI-NEXT: v_readlane_b32 s8, v47, 3
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
@@ -194874,15 +195072,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v47, 44
+; SI-NEXT: v_readlane_b32 s8, v47, 41
; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v47, 42
-; SI-NEXT: v_readlane_b32 s10, v47, 40
+; SI-NEXT: v_readlane_b32 s9, v47, 39
+; SI-NEXT: v_readlane_b32 s10, v47, 37
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v47, 36
+; SI-NEXT: v_readlane_b32 s9, v47, 33
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
@@ -194890,15 +195088,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s9, s9, s10
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v47, 26
+; SI-NEXT: v_readlane_b32 s9, v47, 23
; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: v_readlane_b32 s10, v47, 23
-; SI-NEXT: v_readlane_b32 s11, v47, 14
+; SI-NEXT: v_readlane_b32 s10, v47, 18
+; SI-NEXT: v_readlane_b32 s11, v47, 43
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_readlane_b32 s10, v47, 12
+; SI-NEXT: v_readlane_b32 s10, v47, 9
; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
@@ -194906,15 +195104,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_readlane_b32 s10, v47, 45
+; SI-NEXT: v_readlane_b32 s10, v47, 42
; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: v_readlane_b32 s11, v47, 43
-; SI-NEXT: v_readlane_b32 s12, v47, 39
+; SI-NEXT: v_readlane_b32 s11, v47, 40
+; SI-NEXT: v_readlane_b32 s12, v47, 36
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v47, 37
+; SI-NEXT: v_readlane_b32 s11, v47, 34
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
@@ -194922,15 +195120,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v47, 29
+; SI-NEXT: v_readlane_b32 s11, v47, 26
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_readlane_b32 s12, v47, 25
-; SI-NEXT: v_readlane_b32 s13, v47, 21
+; SI-NEXT: v_readlane_b32 s12, v47, 22
+; SI-NEXT: v_readlane_b32 s13, v47, 16
; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v47, 19
+; SI-NEXT: v_readlane_b32 s12, v47, 14
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
@@ -194938,15 +195136,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v47, 34
+; SI-NEXT: v_readlane_b32 s12, v47, 31
; SI-NEXT: s_add_i32 s12, s12, 3
-; SI-NEXT: v_readlane_b32 s13, v47, 33
-; SI-NEXT: v_readlane_b32 s14, v47, 27
+; SI-NEXT: v_readlane_b32 s13, v47, 30
+; SI-NEXT: v_readlane_b32 s14, v47, 24
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 8
; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v47, 28
+; SI-NEXT: v_readlane_b32 s13, v47, 25
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 24
; SI-NEXT: s_lshl_b32 s14, s14, 16
@@ -194954,15 +195152,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s13, s13, s14
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v47, 24
+; SI-NEXT: v_readlane_b32 s13, v47, 20
; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: v_readlane_b32 s14, v47, 22
-; SI-NEXT: v_readlane_b32 s15, v47, 17
+; SI-NEXT: v_readlane_b32 s14, v47, 17
+; SI-NEXT: v_readlane_b32 s15, v47, 12
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v47, 18
+; SI-NEXT: v_readlane_b32 s14, v47, 13
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_lshl_b32 s15, s15, 16
@@ -194970,15 +195168,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v47, 16
+; SI-NEXT: v_readlane_b32 s14, v47, 11
; SI-NEXT: s_add_i32 s14, s14, 3
-; SI-NEXT: v_readlane_b32 s15, v47, 15
-; SI-NEXT: v_readlane_b32 s16, v47, 10
+; SI-NEXT: v_readlane_b32 s15, v47, 10
+; SI-NEXT: v_readlane_b32 s16, v47, 7
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 8
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_readlane_b32 s15, v47, 11
+; SI-NEXT: v_readlane_b32 s15, v47, 8
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
@@ -194986,15 +195184,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s15, s15, s16
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_readlane_b32 s15, v47, 9
+; SI-NEXT: v_readlane_b32 s15, v47, 4
; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: v_readlane_b32 s16, v47, 8
-; SI-NEXT: v_readlane_b32 s17, v47, 6
+; SI-NEXT: v_readlane_b32 s16, v47, 2
+; SI-NEXT: v_readlane_b32 s17, v47, 0
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 8
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_readlane_b32 s16, v47, 7
+; SI-NEXT: v_readlane_b32 s16, v47, 1
; SI-NEXT: s_and_b32 s17, s17, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
@@ -195002,137 +195200,134 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_readlane_b32 s16, v47, 5
+; SI-NEXT: v_readlane_b32 s16, v56, 63
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 4
-; SI-NEXT: v_readlane_b32 s18, v47, 2
+; SI-NEXT: v_readlane_b32 s17, v56, 61
+; SI-NEXT: v_readlane_b32 s19, v56, 59
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 3
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 60
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s40, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 0
+; SI-NEXT: v_readlane_b32 s16, v56, 57
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 62
-; SI-NEXT: v_readlane_b32 s18, v56, 60
+; SI-NEXT: v_readlane_b32 s17, v56, 56
+; SI-NEXT: v_readlane_b32 s19, v56, 54
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 61
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 55
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s41, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 59
+; SI-NEXT: v_readlane_b32 s16, v56, 53
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 58
-; SI-NEXT: v_readlane_b32 s18, v56, 56
+; SI-NEXT: v_readlane_b32 s17, v56, 52
+; SI-NEXT: v_readlane_b32 s19, v56, 50
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 57
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 51
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s42, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 55
+; SI-NEXT: v_readlane_b32 s16, v56, 49
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 54
-; SI-NEXT: v_readlane_b32 s18, v56, 51
+; SI-NEXT: v_readlane_b32 s17, v56, 48
+; SI-NEXT: v_readlane_b32 s19, v56, 45
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 52
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 46
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s43, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 53
+; SI-NEXT: v_readlane_b32 s16, v56, 47
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 50
-; SI-NEXT: v_readlane_b32 s18, v56, 48
+; SI-NEXT: v_readlane_b32 s17, v56, 44
+; SI-NEXT: v_readlane_b32 s19, v56, 42
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 49
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 43
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s44, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 47
+; SI-NEXT: v_readlane_b32 s16, v56, 41
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 46
-; SI-NEXT: v_readlane_b32 s18, v56, 43
+; SI-NEXT: v_readlane_b32 s17, v56, 40
+; SI-NEXT: v_readlane_b32 s19, v56, 37
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 44
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 38
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s45, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 45
+; SI-NEXT: v_readlane_b32 s16, v56, 39
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 42
-; SI-NEXT: v_readlane_b32 s18, v56, 40
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s17, s25, 8
+; SI-NEXT: s_add_i32 s19, s27, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 41
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 36
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s46, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 39
-; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_add_i32 s16, s98, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s68, 8
-; SI-NEXT: s_add_i32 s18, s81, 3
+; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_add_i32 s19, s26, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s69, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s17, s77, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s47, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 18
@@ -195144,42 +195339,43 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_and_b32 s17, s16, 0xffff
; SI-NEXT: v_readlane_b32 s16, v56, 15
-; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s16, 24
; SI-NEXT: v_readlane_b32 s16, v56, 16
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_add_i32 s56, s16, 0x3000000
+; SI-NEXT: s_add_i32 s68, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 14
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s19, 8
-; SI-NEXT: s_add_i32 s18, s27, 3
+; SI-NEXT: s_lshl_b32 s17, s23, 8
+; SI-NEXT: s_add_i32 s19, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s20, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s17, s22, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s69, s16, 0x3000000
+; SI-NEXT: v_readlane_b32 s16, v56, 26
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 25
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s57, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s21, 3
-; SI-NEXT: s_and_b32 s17, s16, 0xff
-; SI-NEXT: v_readlane_b32 s16, v56, 25
-; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_and_b32 s17, s16, 0xffff
; SI-NEXT: v_readlane_b32 s16, v56, 23
-; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s16, 24
; SI-NEXT: v_readlane_b32 s16, v56, 24
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s58, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 22
@@ -195191,64 +195387,66 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_and_b32 s17, s16, 0xffff
; SI-NEXT: v_readlane_b32 s16, v56, 19
-; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s16, 24
; SI-NEXT: v_readlane_b32 s16, v56, 20
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s59, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s22, 3
+; SI-NEXT: v_readlane_b32 s16, v56, 30
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 29
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s77, 8
-; SI-NEXT: s_add_i32 s18, s98, 3
+; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_add_i32 s19, s99, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s96, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s17, s97, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s60, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s86, 3
-; SI-NEXT: v_readlane_b32 s18, v56, 27
+; SI-NEXT: s_add_i32 s16, s87, 3
+; SI-NEXT: v_readlane_b32 s18, v56, 28
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s85, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s19, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 26
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s17, v56, 27
+; SI-NEXT: s_and_b32 s19, s19, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s61, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v56, 31
-; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_add_i32 s16, s35, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s76, 8
-; SI-NEXT: s_add_i32 s18, s99, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: v_readlane_b32 s18, v56, 34
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s97, 24
+; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 33
+; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s16, s16, s18
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s62, s16, 0x3000000
-; SI-NEXT: s_add_i32 s16, s87, 3
-; SI-NEXT: v_readlane_b32 s17, v56, 30
-; SI-NEXT: v_readlane_b32 s18, v56, 29
+; SI-NEXT: s_add_i32 s16, s96, 3
+; SI-NEXT: v_readlane_b32 s18, v56, 32
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s86, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 28
+; SI-NEXT: v_readlane_b32 s17, v56, 31
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -195279,16 +195477,16 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_readlane_b32 s17, v56, 0
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s23, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v56, 32
-; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_add_i32 s18, vcc_hi, 3
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 35
+; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s16, s16, s18
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s73, s16, 0x3000000
; SI-NEXT: v_readlane_b32 s16, v56, 13
; SI-NEXT: s_add_i32 s16, s16, 3
@@ -195322,6 +195520,7 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
@@ -195334,8 +195533,10 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
; SI-NEXT: s_add_i32 s15, s15, 0x3000000
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s75, s16, 0x3000000
+; SI-NEXT: s_lshr_b64 s[78:79], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
@@ -195343,150 +195544,147 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[24:25], s[74:75], 16
-; SI-NEXT: s_lshr_b64 vcc, s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[28:29], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[82:83], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[70:71], s[56:57], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[80:81], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[20:21], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[24:25], s[68:69], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
-; SI-NEXT: s_lshr_b32 s37, s75, 16
-; SI-NEXT: s_lshr_b32 s39, s73, 16
-; SI-NEXT: s_lshr_b32 s49, s63, 16
-; SI-NEXT: s_lshr_b32 s90, s61, 16
-; SI-NEXT: s_lshr_b32 s78, s59, 16
-; SI-NEXT: s_lshr_b32 s51, s57, 16
-; SI-NEXT: s_lshr_b32 s53, s47, 16
-; SI-NEXT: s_lshr_b32 s55, s45, 16
-; SI-NEXT: s_lshr_b32 s65, s43, 16
-; SI-NEXT: s_lshr_b32 s79, s41, 16
-; SI-NEXT: s_lshr_b32 s89, s15, 16
-; SI-NEXT: s_lshr_b32 s91, s13, 16
-; SI-NEXT: s_lshr_b32 s93, s11, 16
-; SI-NEXT: s_lshr_b32 s95, s9, 16
-; SI-NEXT: s_lshr_b32 s92, s7, 16
-; SI-NEXT: s_lshr_b32 s16, s5, 16
+; SI-NEXT: s_lshr_b32 s39, s75, 16
+; SI-NEXT: s_lshr_b32 s49, s73, 16
+; SI-NEXT: s_lshr_b32 s51, s63, 16
+; SI-NEXT: s_lshr_b32 s53, s61, 16
+; SI-NEXT: s_lshr_b32 s55, s59, 16
+; SI-NEXT: s_lshr_b32 s65, s69, 16
+; SI-NEXT: s_lshr_b32 s79, s47, 16
+; SI-NEXT: s_lshr_b32 s89, s45, 16
+; SI-NEXT: s_lshr_b32 s91, s43, 16
+; SI-NEXT: s_lshr_b32 s93, s41, 16
+; SI-NEXT: s_lshr_b32 s95, s15, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s29, s11, 16
+; SI-NEXT: s_lshr_b32 s19, s9, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s7, 16
+; SI-NEXT: s_lshr_b32 s37, s5, 16
; SI-NEXT: .LBB97_5: ; %end
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: s_and_b32 s18, s74, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s24, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
-; SI-NEXT: s_and_b32 s19, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s37, 16
-; SI-NEXT: s_or_b32 s19, s19, s20
-; SI-NEXT: s_and_b32 s20, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s21, vcc_lo, 16
-; SI-NEXT: s_or_b32 s20, s20, s21
+; SI-NEXT: s_and_b32 s16, s74, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s78, 16
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s75, 0xffff
+; SI-NEXT: s_lshl_b32 s18, s39, 16
+; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_and_b32 s18, s72, 0xffff
+; SI-NEXT: s_lshl_b32 s21, s56, 16
+; SI-NEXT: s_or_b32 s18, s18, s21
; SI-NEXT: s_and_b32 s21, s73, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s39, 16
+; SI-NEXT: s_lshl_b32 s22, s49, 16
+; SI-NEXT: s_lshl_b32 s28, s20, 16
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_lshl_b32 s20, s90, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s62, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s28, 16
+; SI-NEXT: s_lshl_b32 s23, s80, 16
+; SI-NEXT: s_or_b32 s20, s44, s20
+; SI-NEXT: s_and_b32 s44, s45, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s89, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s49, 16
-; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_and_b32 s24, s60, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s80, 16
-; SI-NEXT: s_or_b32 s24, s24, s26
-; SI-NEXT: s_and_b32 s26, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s90, 16
-; SI-NEXT: s_or_b32 s25, s26, s25
-; SI-NEXT: s_and_b32 s26, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s82, 16
-; SI-NEXT: s_or_b32 s26, s26, s27
-; SI-NEXT: s_and_b32 s27, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s78, 16
-; SI-NEXT: s_or_b32 s17, s27, s17
-; SI-NEXT: s_and_b32 s27, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s70, 16
-; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: s_and_b32 s28, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s51, 16
-; SI-NEXT: s_or_b32 s28, s28, s29
-; SI-NEXT: s_and_b32 s29, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s84, 16
-; SI-NEXT: s_or_b32 s29, s29, s46
-; SI-NEXT: s_and_b32 s46, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s46, s46, s47
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
-; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s25, s51, 16
+; SI-NEXT: s_or_b32 s44, s44, s45
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s34, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s45, s34, 16
+; SI-NEXT: s_or_b32 s23, s23, s25
+; SI-NEXT: s_and_b32 s25, s60, 0xffff
+; SI-NEXT: s_lshl_b32 s26, s82, 16
+; SI-NEXT: s_or_b32 s42, s42, s45
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s65, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s45, s91, 16
+; SI-NEXT: s_or_b32 s25, s25, s26
+; SI-NEXT: s_and_b32 s26, s61, 0xffff
+; SI-NEXT: s_lshl_b32 s27, s53, 16
+; SI-NEXT: s_or_b32 s43, s43, s45
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s36, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s45, s36, 16
+; SI-NEXT: s_or_b32 s26, s26, s27
+; SI-NEXT: s_and_b32 s27, s58, 0xffff
+; SI-NEXT: s_or_b32 s40, s40, s45
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s79, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s45, s93, 16
+; SI-NEXT: s_or_b32 s27, s27, s28
+; SI-NEXT: s_and_b32 s28, s59, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s55, 16
+; SI-NEXT: s_or_b32 s41, s41, s45
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s38, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s45, s38, 16
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_or_b32 s28, s28, s58
+; SI-NEXT: s_and_b32 s56, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s24, 16
+; SI-NEXT: s_or_b32 s14, s14, s45
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s89, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s45, s95, 16
+; SI-NEXT: s_or_b32 s9, s9, s19
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s54, 16
+; SI-NEXT: s_or_b32 s56, s56, s58
+; SI-NEXT: s_and_b32 s57, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s65, 16
+; SI-NEXT: s_or_b32 s15, s15, s45
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s45, s48, 16
+; SI-NEXT: s_or_b32 s6, s6, s19
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s19, vcc_lo, 16
+; SI-NEXT: s_or_b32 s57, s57, s58
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s88, 16
+; SI-NEXT: s_or_b32 s12, s12, s45
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s91, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
-; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
+; SI-NEXT: s_lshl_b32 s45, s31, 16
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s93, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s95, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s92, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
+; SI-NEXT: s_lshl_b32 s29, s29, 16
+; SI-NEXT: s_or_b32 s7, s7, s19
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
+; SI-NEXT: s_lshl_b32 s19, s64, 16
+; SI-NEXT: s_or_b32 s46, s46, s58
+; SI-NEXT: s_and_b32 s47, s47, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s79, 16
+; SI-NEXT: s_or_b32 s13, s13, s45
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s50, 16
+; SI-NEXT: s_or_b32 s11, s11, s29
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s29, s52, 16
+; SI-NEXT: s_or_b32 s4, s4, s19
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s4, s4, s47
-; SI-NEXT: s_or_b32 s5, s5, s16
+; SI-NEXT: s_lshl_b32 s19, s37, 16
+; SI-NEXT: s_or_b32 s47, s47, s58
+; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_or_b32 s8, s8, s29
+; SI-NEXT: s_or_b32 s5, s5, s19
; SI-NEXT: v_readlane_b32 s30, v45, 34
-; SI-NEXT: v_mov_b32_e32 v0, s18
-; SI-NEXT: v_mov_b32_e32 v1, s19
-; SI-NEXT: v_mov_b32_e32 v2, s20
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v2, s18
; SI-NEXT: v_mov_b32_e32 v3, s21
; SI-NEXT: v_mov_b32_e32 v4, s22
; SI-NEXT: v_mov_b32_e32 v5, s23
-; SI-NEXT: v_mov_b32_e32 v6, s24
-; SI-NEXT: v_mov_b32_e32 v7, s25
-; SI-NEXT: v_mov_b32_e32 v8, s26
-; SI-NEXT: v_mov_b32_e32 v9, s17
-; SI-NEXT: v_mov_b32_e32 v10, s27
-; SI-NEXT: v_mov_b32_e32 v11, s28
-; SI-NEXT: v_mov_b32_e32 v12, s29
-; SI-NEXT: v_mov_b32_e32 v13, s46
-; SI-NEXT: v_mov_b32_e32 v14, s44
-; SI-NEXT: v_mov_b32_e32 v15, s45
+; SI-NEXT: v_mov_b32_e32 v6, s25
+; SI-NEXT: v_mov_b32_e32 v7, s26
+; SI-NEXT: v_mov_b32_e32 v8, s27
+; SI-NEXT: v_mov_b32_e32 v9, s28
+; SI-NEXT: v_mov_b32_e32 v10, s56
+; SI-NEXT: v_mov_b32_e32 v11, s57
+; SI-NEXT: v_mov_b32_e32 v12, s46
+; SI-NEXT: v_mov_b32_e32 v13, s47
+; SI-NEXT: v_mov_b32_e32 v14, s20
+; SI-NEXT: v_mov_b32_e32 v15, s44
; SI-NEXT: v_mov_b32_e32 v16, s42
; SI-NEXT: v_mov_b32_e32 v17, s43
; SI-NEXT: v_mov_b32_e32 v18, s40
@@ -195598,8 +195796,8 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s11, v2
; VI-NEXT: v_readfirstlane_b32 s6, v1
; VI-NEXT: v_readfirstlane_b32 s8, v0
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32
; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324
@@ -195610,39 +195808,39 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:304
; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:300
; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:292
; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:288
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:284
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:280
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:280
; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:276
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:272
; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:268
; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:260
; VI-NEXT: s_cmp_lg_u64 vcc, 0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:256
; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:252
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:248
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:244
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:240
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:244
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:240
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
@@ -195682,19 +195880,19 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:172
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:168
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:168
; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:160
; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:156
; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:148
; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:140
; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:120
; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:116
; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:108
@@ -195706,128 +195904,112 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:84
; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:80
; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:64
; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:56
; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36
; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:28
; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:16
; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12
; VI-NEXT: s_waitcnt vmcnt(10)
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB97_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v27, v27, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_perm_b32 v15, v15, v62, s4
-; VI-NEXT: v_or_b32_e32 v15, v15, v27
-; VI-NEXT: v_perm_b32 v27, v32, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_perm_b32 v25, v25, v49, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v15, v15, v63, s4
+; VI-NEXT: v_or_b32_e32 v15, v15, v25
+; VI-NEXT: v_perm_b32 v25, v32, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_perm_b32 v28, v60, v28, s4
; VI-NEXT: v_perm_b32 v17, v17, v16, s4
-; VI-NEXT: v_or_b32_e32 v16, v28, v27
-; VI-NEXT: v_perm_b32 v27, v47, v45, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_e32 v16, v28, v25
+; VI-NEXT: v_perm_b32 v25, v47, v46, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_perm_b32 v18, v29, v18, s4
-; VI-NEXT: v_or_b32_e32 v18, v18, v27
-; VI-NEXT: v_perm_b32 v27, v44, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_perm_b32 v19, v43, v19, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v27
-; VI-NEXT: v_perm_b32 v27, v21, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_mov_b32_e32 v43, v20
-; VI-NEXT: v_perm_b32 v20, v26, v20, s4
-; VI-NEXT: v_or_b32_e32 v20, v20, v27
-; VI-NEXT: v_perm_b32 v27, v22, v25, s4
-; VI-NEXT: v_perm_b32 v21, v23, v54, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v25
+; VI-NEXT: v_perm_b32 v25, v45, v30, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v19, v44, v19, s4
+; VI-NEXT: v_or_b32_e32 v19, v19, v25
+; VI-NEXT: v_perm_b32 v25, v55, v24, s4
+; VI-NEXT: v_mov_b32_e32 v45, v44
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_mov_b32_e32 v44, v20
+; VI-NEXT: v_perm_b32 v20, v27, v20, s4
+; VI-NEXT: v_or_b32_e32 v20, v20, v25
+; VI-NEXT: v_perm_b32 v25, v22, v26, s4
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_e32 v21, v21, v27
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v49, v31
-; VI-NEXT: v_mov_b32_e32 v62, v49
-; VI-NEXT: v_perm_b32 v29, v49, v55, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v32, v57, v56, s4
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v42, v41
-; VI-NEXT: v_mov_b32_e32 v41, v12
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_mov_b32_e32 v31, v10
-; VI-NEXT: v_or_b32_e32 v17, v17, v32
-; VI-NEXT: v_perm_b32 v28, v42, v31, s4
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_e32 v21, v21, v25
; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v0, s17
; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s21
; VI-NEXT: v_perm_b32 v3, s22, v3, v11
; VI-NEXT: v_perm_b32 v0, s16, v0, v11
@@ -195841,97 +196023,113 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_perm_b32 v3, s26, v3, v11
; VI-NEXT: v_perm_b32 v2, s24, v2, v11
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: v_perm_b32 v4, s8, v4, v11
; VI-NEXT: v_perm_b32 v3, s28, v3, v11
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, s10
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_perm_b32 v5, s14, v5, v11
; VI-NEXT: v_perm_b32 v4, s11, v4, v11
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s41
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_perm_b32 v6, s46, v6, v11
; VI-NEXT: v_perm_b32 v5, s42, v5, v11
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, s57
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s45
; VI-NEXT: v_perm_b32 v7, s63, v7, v11
; VI-NEXT: v_perm_b32 v6, s58, v6, v11
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s61
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s62
; VI-NEXT: v_perm_b32 v8, s73, v8, v11
; VI-NEXT: v_perm_b32 v7, s74, v7, v11
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s9
; VI-NEXT: v_perm_b32 v9, s40, v9, v11
; VI-NEXT: v_perm_b32 v8, s76, v8, v11
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v27, v23, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v48, v31
+; VI-NEXT: v_mov_b32_e32 v31, v10
; VI-NEXT: v_mov_b32_e32 v10, s43
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_perm_b32 v10, s56, v10, v11
; VI-NEXT: v_perm_b32 v9, s44, v9, v11
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_mov_b32_e32 v42, v41
+; VI-NEXT: v_mov_b32_e32 v41, v12
; VI-NEXT: v_mov_b32_e32 v12, s59
; VI-NEXT: v_or_b32_e32 v9, v9, v10
+; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: v_perm_b32 v25, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: v_mov_b32_e32 v10, s47
; VI-NEXT: v_perm_b32 v12, s72, v12, v11
; VI-NEXT: v_perm_b32 v10, s60, v10, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v35, v34, s4
+; VI-NEXT: v_perm_b32 v12, v34, v33, s4
; VI-NEXT: v_perm_b32 v11, s75, v13, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v50, v37, s4
+; VI-NEXT: v_perm_b32 v12, v51, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v39, v36, s4
+; VI-NEXT: v_perm_b32 v13, v39, v35, s4
; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v59, v48, s4
+; VI-NEXT: v_perm_b32 v13, v62, v50, s4
+; VI-NEXT: v_mov_b32_e32 v62, v48
+; VI-NEXT: v_perm_b32 v29, v48, v52, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v57, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_or_b32_e32 v17, v17, v32
+; VI-NEXT: v_perm_b32 v28, v42, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v34, v46, v38, s4
-; VI-NEXT: v_perm_b32 v14, v14, v58, s4
-; VI-NEXT: v_or_b32_e32 v13, v34, v13
+; VI-NEXT: v_perm_b32 v33, v58, v38, s4
+; VI-NEXT: v_perm_b32 v14, v14, v59, s4
+; VI-NEXT: v_or_b32_e32 v13, v33, v13
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v34, v63, v51, s4
-; VI-NEXT: v_or_b32_e32 v14, v34, v14
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_mov_b32_e32 v34, v30
-; VI-NEXT: v_mov_b32_e32 v35, v52
-; VI-NEXT: v_mov_b32_e32 v48, v55
-; VI-NEXT: s_waitcnt vmcnt(11)
-; VI-NEXT: v_mov_b32_e32 v37, v49
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v33, v36, v43, s4
+; VI-NEXT: v_or_b32_e32 v14, v33, v14
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: v_mov_b32_e32 v34, v52
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
; VI-NEXT: v_perm_b32 v22, v23, v22, s4
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v22, v22, v27
+; VI-NEXT: v_or_b32_e32 v22, v22, v25
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_mov_b32_e32 v63, v30
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_mov_b32_e32 v37, v48
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_mov_b32_e32 v58, v32
+; VI-NEXT: v_mov_b32_e32 v43, v32
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_mov_b32_e32 v51, v31
+; VI-NEXT: v_mov_b32_e32 v33, v31
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v24, v24, v23, s4
; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
@@ -195950,115 +196148,116 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
; VI-NEXT: v_or_b32_e32 v25, v26, v25
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v26, v53, v26, s4
+; VI-NEXT: v_perm_b32 v26, v40, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v40, s4
+; VI-NEXT: v_perm_b32 v27, v27, v54, s4
; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v27, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
; VI-NEXT: v_or_b32_e32 v27, v28, v27
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v52, s4
+; VI-NEXT: v_perm_b32 v28, v28, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v50, v29
+; VI-NEXT: v_mov_b32_e32 v49, v29
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v46, v30
+; VI-NEXT: v_mov_b32_e32 v51, v30
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v33, v30
+; VI-NEXT: v_mov_b32_e32 v36, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v63, v31
+; VI-NEXT: v_mov_b32_e32 v50, v31
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v59, v31
+; VI-NEXT: v_mov_b32_e32 v39, v31
; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v36, v31
+; VI-NEXT: v_mov_b32_e32 v59, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v39, v32
+; VI-NEXT: v_mov_b32_e32 v58, v32
; VI-NEXT: v_perm_b32 v31, v32, v31, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v38, v32
-; VI-NEXT: v_perm_b32 v32, v49, v32, s4
+; VI-NEXT: v_perm_b32 v32, v48, v32, s4
; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB97_3
; VI-NEXT: .LBB97_2:
-; VI-NEXT: v_mov_b32_e32 v39, v4
+; VI-NEXT: v_mov_b32_e32 v58, v4
; VI-NEXT: v_mov_b32_e32 v62, v31
; VI-NEXT: v_mov_b32_e32 v37, v3
-; VI-NEXT: v_mov_b32_e32 v35, v52
-; VI-NEXT: v_mov_b32_e32 v63, v9
-; VI-NEXT: v_mov_b32_e32 v36, v1
-; VI-NEXT: v_mov_b32_e32 v48, v55
-; VI-NEXT: v_mov_b32_e32 v58, v6
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: v_mov_b32_e32 v50, v9
+; VI-NEXT: v_mov_b32_e32 v59, v1
+; VI-NEXT: v_mov_b32_e32 v34, v52
+; VI-NEXT: v_mov_b32_e32 v43, v6
; VI-NEXT: v_mov_b32_e32 v38, v0
-; VI-NEXT: v_mov_b32_e32 v34, v42
-; VI-NEXT: v_mov_b32_e32 v33, v5
-; VI-NEXT: v_mov_b32_e32 v51, v49
-; VI-NEXT: v_mov_b32_e32 v59, v2
-; VI-NEXT: v_mov_b32_e32 v50, v8
-; VI-NEXT: v_mov_b32_e32 v46, v7
-; VI-NEXT: v_mov_b32_e32 v43, v20
+; VI-NEXT: v_mov_b32_e32 v63, v48
+; VI-NEXT: v_mov_b32_e32 v36, v5
+; VI-NEXT: v_mov_b32_e32 v33, v42
+; VI-NEXT: v_mov_b32_e32 v39, v2
+; VI-NEXT: v_mov_b32_e32 v49, v8
+; VI-NEXT: v_mov_b32_e32 v51, v7
+; VI-NEXT: v_mov_b32_e32 v45, v44
+; VI-NEXT: v_mov_b32_e32 v44, v20
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB97_3: ; %Flow
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
; VI-NEXT: s_cbranch_scc1 .LBB97_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v0, v0, v36, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: v_perm_b32 v0, v0, v59, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v37
; VI-NEXT: v_perm_b32 v0, v0, v38, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v50
+; VI-NEXT: v_perm_b32 v0, v0, v36, s4
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43
+; VI-NEXT: v_perm_b32 v21, v0, v39, s4
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v63
-; VI-NEXT: v_perm_b32 v0, v0, v33, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
-; VI-NEXT: v_perm_b32 v63, v0, v59, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v22, v0, v50, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
-; VI-NEXT: v_perm_b32 v23, v0, v46, s4
+; VI-NEXT: v_perm_b32 v22, v0, v49, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33
+; VI-NEXT: v_perm_b32 v23, v0, v51, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s72, s72, 3
@@ -196081,7 +196280,6 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_mov_b32_e32 v46, s21
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v58, s19
; VI-NEXT: s_add_i32 s16, s16, 3
@@ -196090,42 +196288,42 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: v_perm_b32 v24, v0, v35, s4
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v25, v0, v48, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v0, v34, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v28, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v31, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
@@ -196139,87 +196337,86 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v1, v0, s4
+; VI-NEXT: v_perm_b32 v20, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v44, v0, v1, s4
+; VI-NEXT: v_perm_b32 v63, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v45, v0, v1, s4
+; VI-NEXT: v_perm_b32 v32, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v1, v0, s4
+; VI-NEXT: v_perm_b32 v46, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v47, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v56, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v57, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v19, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v18, v0, v43, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v0, v44, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v60, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v45
+; VI-NEXT: v_mov_b32_e32 v45, s21
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v61, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v40, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v42, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v10, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
@@ -196228,177 +196425,177 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v12, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v1, v0, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v14, v0, v32, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v55
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v32, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v34, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v33, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v36, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v35, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v37, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v38, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v39, v0, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; VI-NEXT: v_perm_b32 v46, s20, v46, v0
+; VI-NEXT: v_perm_b32 v45, s20, v45, v0
; VI-NEXT: v_perm_b32 v58, s18, v58, v0
; VI-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v46
+; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v45
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v39, s75, v1, v0
+; VI-NEXT: v_perm_b32 v48, s75, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: v_perm_b32 v33, s72, v1, v0
+; VI-NEXT: v_perm_b32 v34, s72, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_perm_b32 v35, s60, v1, v0
+; VI-NEXT: v_perm_b32 v36, s60, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v9, s56, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: v_perm_b32 v48, s44, v1, v0
+; VI-NEXT: v_perm_b32 v49, s44, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: v_perm_b32 v8, s40, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_perm_b32 v49, s76, v1, v0
+; VI-NEXT: v_perm_b32 v50, s76, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v7, s73, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: v_perm_b32 v50, s74, v1, v0
+; VI-NEXT: v_perm_b32 v51, s74, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s57
; VI-NEXT: v_perm_b32 v6, s63, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: v_perm_b32 v51, s58, v1, v0
+; VI-NEXT: v_perm_b32 v52, s58, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s41
; VI-NEXT: v_perm_b32 v5, s46, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_perm_b32 v52, s42, v1, v0
+; VI-NEXT: v_perm_b32 v53, s42, v1, v0
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v48
-; VI-NEXT: v_or_b32_sdwa v5, v5, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v6, v6, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v7, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v8, v8, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v9, v9, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v10
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v11
-; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v12
-; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v13
-; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
+; VI-NEXT: v_or_b32_sdwa v5, v5, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v6, v6, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v7, v7, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v8, v8, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v9, v9, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v10
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v11
+; VI-NEXT: v_lshlrev_b32_e32 v51, 16, v12
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v13
+; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v14
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v34
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
-; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v37
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
-; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v35
-; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v12, v12, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v35
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v37
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v38
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v39
+; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v48
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v36
+; VI-NEXT: v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v11, v11, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v1, s10
; VI-NEXT: v_perm_b32 v4, s14, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: v_perm_b32 v53, s11, v1, v0
+; VI-NEXT: v_perm_b32 v54, s11, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_perm_b32 v3, s8, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: v_perm_b32 v54, s28, v1, v0
+; VI-NEXT: v_perm_b32 v55, s28, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: v_perm_b32 v2, s26, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_perm_b32 v55, s24, v1, v0
+; VI-NEXT: v_perm_b32 v43, s24, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s23
; VI-NEXT: v_perm_b32 v1, s22, v1, v0
; VI-NEXT: v_perm_b32 v0, s16, v59, v0
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
+; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v43
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v54
-; VI-NEXT: v_or_b32_sdwa v4, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v16, v50, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v17, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v63
-; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v22
-; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v23
-; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v25
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v26
+; VI-NEXT: v_or_b32_sdwa v15, v53, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v16, v51, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v17, v49, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v21
+; VI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
+; VI-NEXT: v_add_u32_e32 v38, vcc, 0x300, v23
+; VI-NEXT: v_lshlrev_b32_e32 v39, 16, v24
+; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v25
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v26
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v29
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v30
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v31
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v62
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v21
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v44
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v45
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v20
-; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v47
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v20
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v63
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v32
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v46
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v47
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v56
; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v57
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v19
@@ -196408,29 +196605,30 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v42
; VI-NEXT: v_or_b32_sdwa v0, v58, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v2, v2, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v3, v3, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v1, v1, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v2, v2, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v3, v3, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v4, v4, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v18, v18, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v19, v19, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v20, v20, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v21, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v34
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; VI-NEXT: v_or_b32_sdwa v22, v22, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; VI-NEXT: v_or_b32_sdwa v22, v22, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v27, v48, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v28, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v29, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v30, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v31, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v27, v49, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v28, v39, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v29, v37, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v30, v35, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v31, v33, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -196502,6 +196700,21 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readfirstlane_b32 s13, v25
+; GFX9-NEXT: v_readfirstlane_b32 s43, v2
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:280
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:264
+; GFX9-NEXT: v_readfirstlane_b32 s15, v3
+; GFX9-NEXT: v_readfirstlane_b32 s10, v4
+; GFX9-NEXT: v_readfirstlane_b32 s47, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v5
+; GFX9-NEXT: v_readfirstlane_b32 s59, v6
+; GFX9-NEXT: v_readfirstlane_b32 s14, v8
+; GFX9-NEXT: v_readfirstlane_b32 s12, v9
+; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s42, v13
; GFX9-NEXT: v_readfirstlane_b32 s46, v12
; GFX9-NEXT: v_readfirstlane_b32 s61, v11
@@ -196510,120 +196723,76 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
-; GFX9-NEXT: v_readfirstlane_b32 s13, v25
-; GFX9-NEXT: v_readfirstlane_b32 s40, v24
-; GFX9-NEXT: v_readfirstlane_b32 s60, v22
-; GFX9-NEXT: v_readfirstlane_b32 s43, v2
-; GFX9-NEXT: v_readfirstlane_b32 s6, v1
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; GFX9-NEXT: v_readfirstlane_b32 s59, v6
-; GFX9-NEXT: v_readfirstlane_b32 s15, v3
-; GFX9-NEXT: v_readfirstlane_b32 s10, v4
-; GFX9-NEXT: v_readfirstlane_b32 s47, v7
-; GFX9-NEXT: v_readfirstlane_b32 s8, v5
-; GFX9-NEXT: v_readfirstlane_b32 s12, v9
-; GFX9-NEXT: v_readfirstlane_b32 s14, v8
-; GFX9-NEXT: v_readfirstlane_b32 s63, v10
-; GFX9-NEXT: v_readfirstlane_b32 s11, v20
+; GFX9-NEXT: v_readfirstlane_b32 s41, v19
+; GFX9-NEXT: v_readfirstlane_b32 s6, v1
; GFX9-NEXT: v_readfirstlane_b32 s74, v30
; GFX9-NEXT: v_readfirstlane_b32 s44, v29
; GFX9-NEXT: v_readfirstlane_b32 s56, v28
; GFX9-NEXT: v_readfirstlane_b32 s62, v27
; GFX9-NEXT: v_readfirstlane_b32 s72, v26
-; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s60, v22
; GFX9-NEXT: v_readfirstlane_b32 s9, v21
-; GFX9-NEXT: v_readfirstlane_b32 s41, v19
; GFX9-NEXT: v_readfirstlane_b32 s76, v18
; GFX9-NEXT: v_readfirstlane_b32 s45, v17
; GFX9-NEXT: v_readfirstlane_b32 s58, v16
; GFX9-NEXT: v_readfirstlane_b32 s73, v15
; GFX9-NEXT: v_readfirstlane_b32 s75, v14
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:288
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:284
+; GFX9-NEXT: v_readfirstlane_b32 s40, v24
+; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s63, v10
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:260
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:324
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:320
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:312
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:308
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:304
-; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:296
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:280
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312
; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
-; GFX9-NEXT: s_waitcnt vmcnt(27)
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:272
-; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:268
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:260
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:256
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:252
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:304
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:248
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:240
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:232
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:228
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:224
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:220
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:216
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:212
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:208
; GFX9-NEXT: s_waitcnt vmcnt(0)
@@ -196632,173 +196801,204 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:196
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:192
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:188
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:184
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:180
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:176
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:172
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:172
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:168
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:168
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:164
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:160
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:156
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:152
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:152
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:148
; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:140
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:136
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:132
; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:124
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:124
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:120
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(30)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(29)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB97_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v25, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v48, s19
-; GFX9-NEXT: v_mov_b32_e32 v10, s17
-; GFX9-NEXT: v_perm_b32 v48, s18, v48, v25
-; GFX9-NEXT: v_perm_b32 v10, s16, v10, v25
-; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v48
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v51, v53
+; GFX9-NEXT: v_mov_b32_e32 v53, v32
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b32 s4, 0x6050400
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v0, v24, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v24, v59, v57, s5
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v52, v3
+; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
+; GFX9-NEXT: v_perm_b32 v12, v33, v26, s4
+; GFX9-NEXT: v_perm_b32 v26, v60, v45, s5
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v63, v42
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v25, 0xc0c0004
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v50, s21
+; GFX9-NEXT: v_perm_b32 v43, s20, v50, v25
+; GFX9-NEXT: v_mov_b32_e32 v50, s23
+; GFX9-NEXT: v_perm_b32 v50, s22, v50, v25
+; GFX9-NEXT: v_mov_b32_e32 v42, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v50
+; GFX9-NEXT: v_mov_b32_e32 v50, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: v_perm_b32 v3, s26, v3, v25
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v58, v4
+; GFX9-NEXT: v_mov_b32_e32 v56, v4
; GFX9-NEXT: v_perm_b32 v2, s24, v2, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s6
; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: v_perm_b32 v4, s7, v4, v25
-; GFX9-NEXT: v_mov_b32_e32 v63, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v42
-; GFX9-NEXT: v_mov_b32_e32 v42, v5
+; GFX9-NEXT: v_mov_b32_e32 v58, v5
; GFX9-NEXT: v_perm_b32 v3, s28, v3, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s8
-; GFX9-NEXT: v_mov_b32_e32 v48, s21
; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v4, s15
; GFX9-NEXT: v_perm_b32 v5, s10, v5, v25
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v23, s20, v48, v25
-; GFX9-NEXT: v_mov_b32_e32 v48, s23
+; GFX9-NEXT: v_mov_b32_e32 v34, v6
; GFX9-NEXT: v_perm_b32 v4, s43, v4, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s12
-; GFX9-NEXT: v_perm_b32 v48, s22, v48, v25
; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v5, s47
; GFX9-NEXT: v_perm_b32 v6, s14, v6, v25
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v48
-; GFX9-NEXT: v_mov_b32_e32 v48, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v7
+; GFX9-NEXT: v_mov_b32_e32 v49, v7
; GFX9-NEXT: v_perm_b32 v5, s59, v5, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s42
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v10, s19
; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v6, s61
; GFX9-NEXT: v_perm_b32 v7, s46, v7, v25
-; GFX9-NEXT: v_mov_b32_e32 v53, v47
-; GFX9-NEXT: v_mov_b32_e32 v47, v43
-; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: v_mov_b32_e32 v9, s17
+; GFX9-NEXT: v_perm_b32 v10, s18, v10, v25
+; GFX9-NEXT: v_mov_b32_e32 v46, v47
+; GFX9-NEXT: v_mov_b32_e32 v47, v44
+; GFX9-NEXT: v_mov_b32_e32 v44, v8
; GFX9-NEXT: v_perm_b32 v6, s63, v6, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s45
+; GFX9-NEXT: v_perm_b32 v9, s16, v9, v25
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v7, s73
; GFX9-NEXT: v_perm_b32 v8, s58, v8, v25
-; GFX9-NEXT: v_mov_b32_e32 v51, v61
-; GFX9-NEXT: v_mov_b32_e32 v61, v32
-; GFX9-NEXT: v_mov_b32_e32 v32, v9
+; GFX9-NEXT: v_or_b32_sdwa v0, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v7, s75, v7, v25
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v10, 0x6050400
@@ -196806,243 +197006,242 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v8, s76
; GFX9-NEXT: v_perm_b32 v9, s9, v9, v10
-; GFX9-NEXT: v_or_b32_sdwa v1, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v1, v24, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v8, s41, v8, v10
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_mov_b32_e32 v22, s40
+; GFX9-NEXT: v_mov_b32_e32 v24, s40
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v9, s57
-; GFX9-NEXT: v_perm_b32 v22, s13, v22, v10
-; GFX9-NEXT: s_mov_b32 s4, 0x6050400
+; GFX9-NEXT: v_perm_b32 v24, s13, v24, v10
; GFX9-NEXT: v_perm_b32 v9, s60, v9, v25
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
-; GFX9-NEXT: v_or_b32_sdwa v9, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v22, s72
-; GFX9-NEXT: v_mov_b32_e32 v23, s56
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_perm_b32 v13, s74, v13, v25
+; GFX9-NEXT: v_perm_b32 v25, v35, v21, s5
+; GFX9-NEXT: v_or_b32_sdwa v9, v24, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v24, s72
+; GFX9-NEXT: v_mov_b32_e32 v43, s56
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX9-NEXT: v_perm_b32 v12, v34, v36, s4
-; GFX9-NEXT: v_perm_b32 v22, s62, v22, v10
-; GFX9-NEXT: v_perm_b32 v10, s44, v23, v10
+; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: v_perm_b32 v24, s62, v24, v10
+; GFX9-NEXT: v_perm_b32 v10, s44, v43, v10
; GFX9-NEXT: v_or_b32_sdwa v11, v11, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v37, v26, s4
+; GFX9-NEXT: v_perm_b32 v15, v15, v22, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, v21
+; GFX9-NEXT: v_or_b32_sdwa v17, v25, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v13, v36, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v13, v49, v39, s4
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v13, v39, v38, s4
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v22, v27, v28, s5
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v22, v62, v55, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_perm_b32 v24, v27, v28, s5
+; GFX9-NEXT: v_or_b32_sdwa v13, v13, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v62, v61, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_perm_b32 v14, v14, v29, s4
-; GFX9-NEXT: v_perm_b32 v15, v15, v56, s4
-; GFX9-NEXT: v_or_b32_sdwa v14, v22, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v14, v24, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v22, v30, v31, s5
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v22, v38, v46, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
-; GFX9-NEXT: v_or_b32_sdwa v16, v22, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v22, v41, v57, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v18, v50, v18, s5
-; GFX9-NEXT: v_or_b32_sdwa v18, v22, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v22, v40, v59, s5
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v23, v35, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v19, v45, v19, s5
-; GFX9-NEXT: v_or_b32_sdwa v19, v22, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v20, v54, v20, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_or_b32_sdwa v17, v23, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v58
-; GFX9-NEXT: v_mov_b32_e32 v54, v42
-; GFX9-NEXT: v_mov_b32_e32 v50, v60
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v30, v31, s5
+; GFX9-NEXT: v_or_b32_sdwa v15, v15, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v37, v57, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v16, v24, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_perm_b32 v24, v41, v45, s5
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_perm_b32 v18, v48, v18, s5
+; GFX9-NEXT: v_or_b32_sdwa v18, v24, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v40, v52, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_perm_b32 v19, v54, v19, s5
+; GFX9-NEXT: v_or_b32_sdwa v19, v24, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v55, v20, s5
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v54, v58
+; GFX9-NEXT: v_mov_b32_e32 v38, v32
+; GFX9-NEXT: v_mov_b32_e32 v55, v42
+; GFX9-NEXT: v_mov_b32_e32 v48, v59
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v22, v60, v40, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_or_b32_sdwa v20, v22, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v22, v58, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_mov_b32_e32 v60, v40
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: v_perm_b32 v21, v44, v21, s5
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_mov_b32_e32 v58, v29
+; GFX9-NEXT: v_perm_b32 v25, v25, v53, s4
+; GFX9-NEXT: v_mov_b32_e32 v53, v51
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v23, v32, v23, s5
-; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v24, v33, v24, s5
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v25, v25, v61, s4
-; GFX9-NEXT: v_mov_b32_e32 v61, v51
-; GFX9-NEXT: v_mov_b32_e32 v33, v48
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_mov_b32_e32 v36, v28
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_mov_b32_e32 v32, v26
+; GFX9-NEXT: v_perm_b32 v24, v59, v41, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v20, v24, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v58, v60, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_or_b32_sdwa v21, v24, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v42, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v42, v63
+; GFX9-NEXT: v_mov_b32_e32 v59, v41
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v26, v47, v26, s5
+; GFX9-NEXT: v_mov_b32_e32 v47, v46
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_mov_b32_e32 v44, v27
+; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_mov_b32_e32 v34, v30
-; GFX9-NEXT: v_mov_b32_e32 v39, v31
-; GFX9-NEXT: v_mov_b32_e32 v47, v53
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v55, v35
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v57, v35
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v21, v43, v21, s5
-; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v43, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v44, s4
+; GFX9-NEXT: v_mov_b32_e32 v62, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v42, v22, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v42, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v63
+; GFX9-NEXT: v_perm_b32 v22, v34, v22, s5
+; GFX9-NEXT: v_or_b32_sdwa v22, v24, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v24, v56, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v56, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v52, v23, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v52, v29
+; GFX9-NEXT: v_perm_b32 v23, v49, v23, s5
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v49, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v48, s4
+; GFX9-NEXT: v_perm_b32 v24, v24, v50, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v25, v51, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v53, s4
+; GFX9-NEXT: v_perm_b32 v26, v26, v46, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: v_mov_b32_e32 v46, v28
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v36, v28
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v46, v53
+; GFX9-NEXT: v_mov_b32_e32 v33, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v37, v28
+; GFX9-NEXT: v_mov_b32_e32 v58, v29
; GFX9-NEXT: v_perm_b32 v28, v28, v29, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v62, v29
+; GFX9-NEXT: v_mov_b32_e32 v34, v29
; GFX9-NEXT: v_perm_b32 v29, v29, v30, s4
; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v49, v30
-; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_mov_b32_e32 v39, v30
+; GFX9-NEXT: v_perm_b32 v30, v30, v32, s5
; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v51, v31
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v30
+; GFX9-NEXT: v_perm_b32 v30, v40, v30, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v48, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4
+; GFX9-NEXT: v_perm_b32 v31, v31, v32, s4
; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v61, v32
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v63, v31
-; GFX9-NEXT: v_perm_b32 v31, v38, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v37, v31, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v56, v35
-; GFX9-NEXT: v_perm_b32 v35, v53, v35, s5
+; GFX9-NEXT: v_perm_b32 v35, v35, v32, s5
+; GFX9-NEXT: v_mov_b32_e32 v50, v32
; GFX9-NEXT: v_or_b32_sdwa v31, v31, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_mov_b64 s[4:5], 0
-; GFX9-NEXT: v_mov_b32_e32 v53, v57
-; GFX9-NEXT: v_mov_b32_e32 v35, v38
+; GFX9-NEXT: v_mov_b32_e32 v35, v37
+; GFX9-NEXT: v_mov_b32_e32 v37, v40
; GFX9-NEXT: s_branch .LBB97_3
; GFX9-NEXT: .LBB97_2:
; GFX9-NEXT: v_mov_b32_e32 v39, v51
-; GFX9-NEXT: v_mov_b32_e32 v51, v53
-; GFX9-NEXT: v_mov_b32_e32 v50, v60
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v52
+; GFX9-NEXT: v_mov_b32_e32 v48, v59
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v46, v0
-; GFX9-NEXT: v_mov_b32_e32 v56, v22
-; GFX9-NEXT: v_mov_b32_e32 v34, v6
-; GFX9-NEXT: v_mov_b32_e32 v62, v2
-; GFX9-NEXT: v_mov_b32_e32 v55, v1
-; GFX9-NEXT: v_mov_b32_e32 v49, v23
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v43, v21
+; GFX9-NEXT: v_mov_b32_e32 v57, v0
+; GFX9-NEXT: v_mov_b32_e32 v61, v1
+; GFX9-NEXT: v_mov_b32_e32 v62, v10
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: v_mov_b32_e32 v33, v25
+; GFX9-NEXT: v_mov_b32_e32 v55, v3
; GFX9-NEXT: v_mov_b32_e32 v54, v5
-; GFX9-NEXT: v_mov_b32_e32 v45, v4
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB97_3: ; %Flow
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB97_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v57
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v0, v0, v56, s5
-; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v50, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v0, 3, v63
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s5
-; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
+; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v0, 3, v51
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
+; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
+; GFX9-NEXT: v_perm_b32 v0, v0, v38, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s74, s74, 3
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: s_add_i32 s56, s56, 3
@@ -197064,81 +197263,73 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: s_add_i32 s22, s22, 3
+; GFX9-NEXT: v_mov_b32_e32 v32, s23
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
-; GFX9-NEXT: v_perm_b32 v0, v0, v49, s5
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v34
-; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_add_u32_sdwa v37, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: v_perm_b32 v0, v0, v34, s5
; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
-; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
-; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
+; GFX9-NEXT: v_perm_b32 v0, v0, v33, s5
+; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v56
; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v44
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
+; GFX9-NEXT: v_mov_b32_e32 v33, s17
; GFX9-NEXT: v_mov_b32_e32 v34, s19
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v36, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v0, 3, v42
-; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v44, s5
; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v0
; GFX9-NEXT: v_add_u32_e32 v0, 3, v47
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v37, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_sdwa v26, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v26, v37, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v27, v36, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v28, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v29, v35, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v37, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v53
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_or_b32_sdwa v30, v35, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_sdwa v38, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v25, v38, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, s17
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v39, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v24, v39, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
@@ -197146,131 +197337,129 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v63, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v23, v63, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v49, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v22, v49, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v22, v62, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v21, v62, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
+; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v21, v50, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v50
-; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v48
+; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
; GFX9-NEXT: v_add_u32_sdwa v51, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v20, v51, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v52, s5
; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v19, v52, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v53, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v45, s5
; GFX9-NEXT: v_add_u32_sdwa v53, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v18, v53, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v57, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
; GFX9-NEXT: v_add_u32_sdwa v54, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v17, v54, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: v_perm_b32 v0, v0, v40, s5
; GFX9-NEXT: v_add_u32_sdwa v55, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v16, v55, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v1, 3, v41
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v40, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v15, v40, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v41, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v14, v41, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
@@ -197278,42 +197467,42 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v42, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v13, v42, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v43, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0
-; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0
; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0
; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v33
; GFX9-NEXT: v_or_b32_sdwa v12, v43, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0
; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v2, 3, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v44, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -197373,11 +197562,13 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_add_u32_sdwa v61, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v1, s21
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0
-; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1
+; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v2, v61, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v3, v60, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v4, v59, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -197388,6 +197579,8 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_or_b32_sdwa v9, v46, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v10, v45, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v11, v44, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: .LBB97_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -200364,451 +200557,454 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v29
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v27
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v25
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v23
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v21
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v28
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v22
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v17
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v15
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v13
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v11
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v9
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v7
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v17
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v16
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v27
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v24
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v21
+; VI-NEXT: s_waitcnt vmcnt(9)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v19
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v51
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v52
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; kill: killed $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v53
+; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v52
+; VI-NEXT: ; kill: killed $vgpr54
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB98_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v16
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v16
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v14
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v13
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v12
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v12
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v11
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v10
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v10
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v9
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v8
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v8
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v7
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v6
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v6
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v5
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v32, v7
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v16
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v15
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v14
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v13
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v12
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v11
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v10
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v9
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v8
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v5
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v34, v7
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v10
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v11
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v12
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v13
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v14
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v15
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v16
+; VI-NEXT: v_mov_b32_e32 v9, v14
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v15
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v8
; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
-; VI-NEXT: v_mov_b32_e32 v8, v5
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, v6
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, v5
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, v6
; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v6, 24, v4
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v4
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v3
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v6, v3
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 24, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, v3
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, v4
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v53
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v53
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v52
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v52
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v53
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, v2
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v52
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v52
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v52
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[51:52]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v30
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v29
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v29
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v30
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v28
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v28
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v27
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v27
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v28
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v26
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v26
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v25
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v25
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v26
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v24
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v24
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v23
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v23
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v24
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v22
-; VI-NEXT: v_mov_b32_e32 v42, v1
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[52:53]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v30
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v29
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v30
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v27
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v26
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v25
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v26
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v24
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v23
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v24
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v21
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v20
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v19
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v20
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v18
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v17
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v17
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v18
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v6, v4
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v40
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v30
-; VI-NEXT: v_mov_b32_e32 v35, v5
-; VI-NEXT: v_mov_b32_e32 v32, v7
-; VI-NEXT: v_mov_b32_e32 v40, v1
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v41
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18]
+; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v16
+; VI-NEXT: v_mov_b32_e32 v34, v16
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v18
+; VI-NEXT: v_mov_b32_e32 v41, v1
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: ; implicit-def: $vgpr5
@@ -200824,645 +201020,646 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: .LBB98_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB98_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v35, 3
-; VI-NEXT: v_add_u16_sdwa v33, v18, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_mov_b32_e32 v34, 3
+; VI-NEXT: v_add_u16_sdwa v33, v18, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v31, 3, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33
-; VI-NEXT: v_add_u16_sdwa v56, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v55, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v18, v31, v18
; VI-NEXT: v_add_u16_e32 v31, 3, v17
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v56
-; VI-NEXT: v_add_u16_sdwa v63, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v55
+; VI-NEXT: v_add_u16_sdwa v51, v20, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v17, v31, v17
; VI-NEXT: v_add_u16_e32 v31, 3, v20
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v63
-; VI-NEXT: v_add_u16_sdwa v53, v19, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v51
+; VI-NEXT: v_add_u16_sdwa v45, v19, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v20, v31, v20
; VI-NEXT: v_add_u16_e32 v31, 3, v19
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v53
-; VI-NEXT: v_add_u16_sdwa v60, v22, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v45
+; VI-NEXT: v_add_u16_sdwa v63, v22, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v19, v31, v19
; VI-NEXT: v_add_u16_e32 v31, 3, v22
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v60
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v63
+; VI-NEXT: v_add_u16_sdwa v54, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v22, v31, v22
; VI-NEXT: v_add_u16_e32 v31, 3, v21
-; VI-NEXT: v_add_u16_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_add_u16_sdwa v58, v24, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v54
+; VI-NEXT: v_add_u16_sdwa v61, v24, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v21, v31, v21
; VI-NEXT: v_add_u16_e32 v31, 3, v24
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v58
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v61
+; VI-NEXT: v_add_u16_sdwa v62, v23, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v24, v31, v24
; VI-NEXT: v_add_u16_e32 v31, 3, v23
-; VI-NEXT: v_add_u16_sdwa v23, v23, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_add_u16_sdwa v47, v26, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v62
+; VI-NEXT: v_add_u16_sdwa v58, v26, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v23, v31, v23
; VI-NEXT: v_add_u16_e32 v31, 3, v26
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v47
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v58
+; VI-NEXT: v_add_u16_sdwa v60, v25, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v26, v31, v26
; VI-NEXT: v_add_u16_e32 v31, 3, v25
-; VI-NEXT: v_add_u16_sdwa v25, v25, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_add_u16_sdwa v34, v28, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v60
+; VI-NEXT: v_add_u16_sdwa v47, v28, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v25, v31, v25
; VI-NEXT: v_add_u16_e32 v31, 3, v28
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v34
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
+; VI-NEXT: v_add_u16_sdwa v56, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v28, v31, v28
; VI-NEXT: v_add_u16_e32 v31, 3, v27
-; VI-NEXT: v_add_u16_sdwa v27, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_add_u16_sdwa v36, v30, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v56
+; VI-NEXT: v_add_u16_sdwa v44, v30, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v27, v31, v27
; VI-NEXT: v_add_u16_e32 v31, 3, v30
; VI-NEXT: v_add_u16_e32 v32, 3, v29
-; VI-NEXT: v_add_u16_sdwa v29, v29, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v36
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_add_u16_sdwa v46, v52, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v31, v51, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v46, v29, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v44
+; VI-NEXT: v_or_b32_e32 v30, v31, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v46
+; VI-NEXT: v_add_u16_sdwa v57, v53, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v29, v32, v29
-; VI-NEXT: v_add_u16_e32 v37, 3, v52
-; VI-NEXT: v_add_u16_e32 v38, 3, v51
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v46
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_add_u16_sdwa v49, v2, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v32, v37, v32
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v31, v38, v31
-; VI-NEXT: v_add_u16_e32 v37, 3, v2
-; VI-NEXT: v_add_u16_e32 v38, 3, v1
-; VI-NEXT: v_add_u16_sdwa v44, v1, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
-; VI-NEXT: v_or_b32_e32 v2, v37, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v44
-; VI-NEXT: v_add_u16_sdwa v48, v4, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v1, v38, v1
-; VI-NEXT: v_add_u16_e32 v37, 3, v4
-; VI-NEXT: v_add_u16_e32 v38, 3, v3
-; VI-NEXT: v_add_u16_sdwa v61, v3, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; VI-NEXT: v_add_u16_e32 v32, 3, v53
+; VI-NEXT: v_add_u16_sdwa v59, v52, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v57
+; VI-NEXT: v_add_u16_e32 v35, 3, v52
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v32, v32, v31
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v59
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v35, v31
+; VI-NEXT: v_add_u16_sdwa v35, v2, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v36, 3, v2
+; VI-NEXT: v_add_u16_e32 v37, 3, v1
+; VI-NEXT: v_add_u16_sdwa v52, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v2, v36, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
+; VI-NEXT: v_add_u16_sdwa v36, v4, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v4, v37, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v61
-; VI-NEXT: v_add_u16_sdwa v37, v6, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v3, v38, v3
-; VI-NEXT: v_add_u16_e32 v38, 3, v6
-; VI-NEXT: v_add_u16_e32 v39, 3, v5
-; VI-NEXT: v_add_u16_sdwa v59, v5, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v1, v37, v1
+; VI-NEXT: v_add_u16_e32 v38, 3, v4
+; VI-NEXT: v_add_u16_e32 v39, 3, v3
+; VI-NEXT: v_add_u16_sdwa v37, v3, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; VI-NEXT: v_or_b32_e32 v4, v38, v3
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
+; VI-NEXT: v_add_u16_sdwa v37, v6, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v3, v39, v3
+; VI-NEXT: v_add_u16_e32 v39, 3, v6
+; VI-NEXT: v_add_u16_e32 v48, 3, v5
+; VI-NEXT: v_add_u16_sdwa v38, v5, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
-; VI-NEXT: v_or_b32_e32 v6, v38, v5
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v59
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v5, v39, v5
-; VI-NEXT: v_add_u16_e32 v39, 3, v8
-; VI-NEXT: v_add_u16_sdwa v8, v8, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_e32 v38, 3, v7
-; VI-NEXT: v_add_u16_sdwa v57, v7, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v39, v39, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v38, v38, v7
-; VI-NEXT: v_add_u16_sdwa v7, v10, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v50, 3, v10
-; VI-NEXT: v_add_u16_e32 v10, 3, v9
-; VI-NEXT: v_add_u16_sdwa v45, v9, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v7
-; VI-NEXT: v_or_b32_e32 v52, v50, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v45
-; VI-NEXT: v_or_b32_e32 v51, v10, v9
-; VI-NEXT: v_add_u16_sdwa v9, v12, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_e32 v54, 3, v12
-; VI-NEXT: v_add_u16_sdwa v43, v11, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v6, v39, v5
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v38
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v5, v48, v5
+; VI-NEXT: v_add_u16_sdwa v48, v8, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v49, 3, v8
+; VI-NEXT: v_add_u16_e32 v39, 3, v7
+; VI-NEXT: v_add_u16_sdwa v38, v7, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v48
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v8, v49, v7
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v38
+; VI-NEXT: v_add_u16_sdwa v49, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v7, v39, v7
+; VI-NEXT: v_add_u16_e32 v39, 3, v10
+; VI-NEXT: v_add_u16_e32 v50, 3, v9
+; VI-NEXT: v_add_u16_sdwa v38, v9, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v49
+; VI-NEXT: v_or_b32_e32 v10, v39, v9
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v38
+; VI-NEXT: v_add_u16_sdwa v38, v12, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v9, v50, v9
+; VI-NEXT: v_add_u16_e32 v53, 3, v12
; VI-NEXT: v_add_u16_e32 v50, 3, v11
-; VI-NEXT: v_or_b32_e32 v12, v54, v10
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v43
-; VI-NEXT: v_add_u16_sdwa v62, v14, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v11, v50, v10
-; VI-NEXT: v_add_u16_e32 v55, 3, v14
-; VI-NEXT: v_add_u16_sdwa v50, v13, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v62
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_e32 v54, 3, v13
-; VI-NEXT: v_or_b32_e32 v14, v55, v10
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v50
-; VI-NEXT: v_or_b32_e32 v13, v54, v10
-; VI-NEXT: v_add_u16_sdwa v10, v16, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_sdwa v54, v15, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v16, 3, v16
-; VI-NEXT: v_add_u16_e32 v35, 3, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v10
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v16, v16, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v54
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v15, v35, v15
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v16
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v15
+; VI-NEXT: v_add_u16_sdwa v39, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; VI-NEXT: v_or_b32_e32 v12, v53, v11
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v39
+; VI-NEXT: v_add_u16_sdwa v39, v14, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v11, v50, v11
+; VI-NEXT: v_add_u16_e32 v40, 3, v14
+; VI-NEXT: v_add_u16_e32 v53, 3, v13
+; VI-NEXT: v_add_u16_sdwa v50, v13, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v39
+; VI-NEXT: v_or_b32_e32 v14, v40, v13
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v50
+; VI-NEXT: v_add_u16_sdwa v50, v16, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v13, v53, v13
+; VI-NEXT: v_add_u16_sdwa v53, v15, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v34, 3, v16
+; VI-NEXT: v_add_u16_e32 v40, 3, v15
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v50
+; VI-NEXT: v_or_b32_e32 v16, v34, v15
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v15, v40, v15
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v16
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v15
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[15:16]
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v14
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v13
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11
; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v52
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v51
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[51:52]
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v39
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v38
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[38:39]
-; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v6
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9
+; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7
+; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v5
; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v4
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v3
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v32
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v31
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v30
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v29
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v28
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v27
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v26
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v25
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v24
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v23
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v22
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v21
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v42, v1
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v18
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v17
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v39, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v38, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v49, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v48, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v37, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v36, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v35, 8, 8
+; VI-NEXT: v_mov_b32_e32 v32, v44
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v17
-; VI-NEXT: v_mov_b32_e32 v40, v10
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v40, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v31, v9
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v62, 8, 8
-; VI-NEXT: v_mov_b32_e32 v2, v34
-; VI-NEXT: v_mov_b32_e32 v34, v7
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v31, 8, 8
-; VI-NEXT: v_mov_b32_e32 v1, v36
-; VI-NEXT: v_mov_b32_e32 v36, v8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v34, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v36, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v37, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v48, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v49, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v46, 8, 8
-; VI-NEXT: v_mov_b32_e32 v38, v54
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v54, v1, 8, 8
-; VI-NEXT: v_bfe_u32 v1, v2, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v47, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v58, 8, 8
+; VI-NEXT: v_bfe_u32 v1, v57, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v32, 8, 8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v60, 8, 8
+; VI-NEXT: v_bfe_u32 v1, v47, 8, 8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v58, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v61, 8, 8
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v1, v63, 8, 8
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v35, v5
-; VI-NEXT: v_mov_b32_e32 v32, v11
-; VI-NEXT: v_mov_b32_e32 v55, v2
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v33, 8, 8
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v31, v54
+; VI-NEXT: v_mov_b32_e32 v41, v52
+; VI-NEXT: v_bfe_u32 v54, v50, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v51, 8, 8
+; VI-NEXT: v_bfe_u32 v44, v33, 8, 8
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; VI-NEXT: .LBB98_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v1, v44, v42, s4
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v41, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v61, v41, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_perm_b32 v3, v59, v35, s4
-; VI-NEXT: v_perm_b32 v4, v57, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v56, v39, s4
-; VI-NEXT: v_perm_b32 v10, v53, v10, s4
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_perm_b32 v11, v11, v12, s4
; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v4, v3, s4
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v4, v4, v5, s4
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v5, v5, v6, s4
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v6, v6, v7, s4
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v7, v7, v8, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v5, v45, v5, s4
-; VI-NEXT: v_perm_b32 v6, v43, v6, s4
-; VI-NEXT: v_perm_b32 v7, v50, v7, s4
-; VI-NEXT: v_perm_b32 v8, v38, v8, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v10, v45, v43, s4
+; VI-NEXT: v_perm_b32 v8, v8, v9, s4
+; VI-NEXT: v_perm_b32 v9, v55, v40, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v11, s4
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v49, v11, s4
+; VI-NEXT: v_perm_b32 v11, v35, v11, s4
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; VI-NEXT: v_or_b32_e32 v1, v1, v11
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v11, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v48, v2, s4
+; VI-NEXT: v_perm_b32 v2, v36, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v37, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v36, v2, s4
+; VI-NEXT: v_perm_b32 v2, v48, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v34, v2, s4
+; VI-NEXT: v_perm_b32 v2, v49, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v31, v2, s4
+; VI-NEXT: v_perm_b32 v2, v38, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v62, v2, s4
+; VI-NEXT: v_perm_b32 v2, v39, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v40, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v50, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v34, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v33, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v33, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v63, v2, s4
+; VI-NEXT: v_perm_b32 v2, v51, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v31, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v60, v2, s4
+; VI-NEXT: v_perm_b32 v2, v63, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: v_perm_b32 v2, v62, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v58, v2, s4
+; VI-NEXT: v_perm_b32 v2, v61, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: v_perm_b32 v2, v60, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v47, v2, s4
+; VI-NEXT: v_perm_b32 v2, v58, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: v_perm_b32 v2, v56, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v55, v2, s4
+; VI-NEXT: v_perm_b32 v2, v47, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: v_perm_b32 v2, v46, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v54, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: v_perm_b32 v2, v32, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v1, v2, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: v_perm_b32 v2, v59, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v46, v2, s4
+; VI-NEXT: v_perm_b32 v2, v57, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -201540,39 +201737,60 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr40
@@ -201580,30 +201798,31 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr50
-; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; kill: killed $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: s_nop 0
@@ -201678,220 +201897,198 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB98_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(33)
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v31
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v31
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v29
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v27
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v27
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v25
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v25
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v23
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v23
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v22
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v22
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v21
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v21
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v19
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v18
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(54)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v4
; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4
; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18]
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2
@@ -201932,196 +202129,196 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v2
; GFX9-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(40)
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v32
+; GFX9-NEXT: s_waitcnt vmcnt(42)
; GFX9-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v32
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v31
; GFX9-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v31
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v30
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v30
; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v30
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v29
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v28
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v28
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v28
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v27
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v27
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v26
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v26
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v26
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v25
; GFX9-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v25
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v24
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v24
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v24
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v20
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v20
; GFX9-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v19
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v17
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB98_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
@@ -202131,22 +202328,23 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v34, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v33, s4
; GFX9-NEXT: v_perm_b32 v7, v7, v35, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v38, s4
-; GFX9-NEXT: v_perm_b32 v11, v11, v48, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v52, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v63, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v60, s4
-; GFX9-NEXT: v_perm_b32 v12, v12, v58, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v38, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v49, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v59, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v53, s4
+; GFX9-NEXT: v_perm_b32 v10, v10, v52, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v51, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v48, s4
; GFX9-NEXT: v_perm_b32 v13, v13, v56, s4
-; GFX9-NEXT: v_perm_b32 v14, v14, v47, s4
+; GFX9-NEXT: v_perm_b32 v14, v14, v46, s4
; GFX9-NEXT: v_perm_b32 v15, v15, v45, s4
+; GFX9-NEXT: v_perm_b32 v48, v50, v40, s4
; GFX9-NEXT: v_perm_b32 v17, v17, v55, s4
; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v50, v1, s4
+; GFX9-NEXT: v_perm_b32 v44, v61, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -202154,16 +202352,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v36, v53, v1, s4
+; GFX9-NEXT: v_perm_b32 v36, v47, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v34, v49, v1, s4
+; GFX9-NEXT: v_perm_b32 v33, v62, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v49, v61, v40, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v35, v59, v1, s4
+; GFX9-NEXT: v_perm_b32 v35, v58, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
@@ -202171,14 +202368,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v48, v46, v1, s4
+; GFX9-NEXT: v_perm_b32 v34, v34, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v62, v1, s4
+; GFX9-NEXT: v_perm_b32 v39, v60, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v42, 16, v43
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
@@ -202188,7 +202385,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v41
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v44, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -202215,11 +202412,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
@@ -202242,7 +202439,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -202251,11 +202448,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v33, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v63, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
@@ -202305,7 +202502,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
@@ -203333,8 +203530,9 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: s_waitcnt expcnt(3)
; SI-NEXT: v_writelane_b32 v20, s34, 0
; SI-NEXT: v_writelane_b32 v20, s35, 1
; SI-NEXT: v_writelane_b32 v20, s36, 2
@@ -203371,57 +203569,58 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v20, s99, 33
; SI-NEXT: v_writelane_b32 v20, s30, 34
; SI-NEXT: v_writelane_b32 v20, s31, 35
+; SI-NEXT: v_readfirstlane_b32 s36, v16
+; SI-NEXT: s_lshr_b32 s4, s36, 16
+; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s92, v12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v23, s4, 0
; SI-NEXT: s_lshr_b32 s4, s92, 16
-; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; SI-NEXT: v_writelane_b32 v23, s4, 1
+; SI-NEXT: v_writelane_b32 v23, s19, 2
; SI-NEXT: s_lshr_b32 s5, s16, 16
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_writelane_b32 v21, s4, 0
-; SI-NEXT: v_writelane_b32 v21, s16, 1
-; SI-NEXT: v_writelane_b32 v21, s19, 2
-; SI-NEXT: v_writelane_b32 v21, s18, 3
-; SI-NEXT: v_writelane_b32 v21, s5, 4
-; SI-NEXT: v_writelane_b32 v21, s21, 5
+; SI-NEXT: v_writelane_b32 v23, s18, 3
+; SI-NEXT: v_writelane_b32 v23, s5, 4
+; SI-NEXT: v_writelane_b32 v23, s21, 5
; SI-NEXT: s_lshr_b32 s6, s18, 16
-; SI-NEXT: v_writelane_b32 v21, s20, 6
-; SI-NEXT: v_writelane_b32 v21, s6, 7
-; SI-NEXT: v_writelane_b32 v21, s23, 8
+; SI-NEXT: v_writelane_b32 v23, s20, 6
+; SI-NEXT: v_writelane_b32 v23, s6, 7
+; SI-NEXT: v_writelane_b32 v23, s23, 8
; SI-NEXT: s_lshr_b32 s7, s20, 16
-; SI-NEXT: v_writelane_b32 v21, s22, 9
+; SI-NEXT: v_writelane_b32 v23, s22, 9
; SI-NEXT: s_lshr_b32 s8, s22, 16
-; SI-NEXT: v_writelane_b32 v21, s7, 10
-; SI-NEXT: v_writelane_b32 v21, s8, 11
-; SI-NEXT: v_writelane_b32 v21, s27, 12
+; SI-NEXT: v_writelane_b32 v23, s7, 10
+; SI-NEXT: v_writelane_b32 v23, s8, 11
+; SI-NEXT: v_writelane_b32 v23, s27, 12
; SI-NEXT: s_lshr_b32 s9, s24, 16
-; SI-NEXT: v_writelane_b32 v21, s26, 13
-; SI-NEXT: v_writelane_b32 v21, s9, 14
-; SI-NEXT: v_writelane_b32 v21, s29, 15
+; SI-NEXT: v_writelane_b32 v23, s26, 13
+; SI-NEXT: v_writelane_b32 v23, s9, 14
+; SI-NEXT: v_writelane_b32 v23, s29, 15
; SI-NEXT: s_lshr_b32 s10, s26, 16
-; SI-NEXT: v_writelane_b32 v21, s28, 16
+; SI-NEXT: v_writelane_b32 v23, s28, 16
; SI-NEXT: s_lshr_b32 s11, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s86, v1
-; SI-NEXT: v_writelane_b32 v21, s10, 17
+; SI-NEXT: v_readfirstlane_b32 s38, v1
+; SI-NEXT: v_writelane_b32 v23, s10, 17
; SI-NEXT: v_readfirstlane_b32 s80, v3
-; SI-NEXT: s_lshr_b32 s12, s86, 16
-; SI-NEXT: v_writelane_b32 v21, s11, 18
+; SI-NEXT: s_lshr_b32 s12, s38, 16
+; SI-NEXT: v_writelane_b32 v23, s11, 18
; SI-NEXT: v_readfirstlane_b32 s76, v5
; SI-NEXT: s_lshr_b32 s13, s80, 16
-; SI-NEXT: v_writelane_b32 v21, s12, 19
+; SI-NEXT: v_writelane_b32 v23, s12, 19
; SI-NEXT: v_readfirstlane_b32 s84, v7
; SI-NEXT: s_lshr_b32 s14, s76, 16
-; SI-NEXT: v_writelane_b32 v21, s13, 20
+; SI-NEXT: v_writelane_b32 v23, s13, 20
; SI-NEXT: v_readfirstlane_b32 s87, v9
; SI-NEXT: s_lshr_b32 s15, s84, 16
-; SI-NEXT: v_writelane_b32 v21, s14, 21
+; SI-NEXT: v_writelane_b32 v23, s14, 21
; SI-NEXT: v_readfirstlane_b32 s94, v11
; SI-NEXT: s_lshr_b32 s74, s87, 16
-; SI-NEXT: v_writelane_b32 v21, s15, 22
+; SI-NEXT: v_writelane_b32 v23, s15, 22
; SI-NEXT: v_readfirstlane_b32 s34, v13
; SI-NEXT: s_lshr_b32 s78, s94, 16
-; SI-NEXT: v_writelane_b32 v21, s74, 23
+; SI-NEXT: v_writelane_b32 v23, s74, 23
; SI-NEXT: v_readfirstlane_b32 s50, v18
; SI-NEXT: v_readfirstlane_b32 s52, v17
-; SI-NEXT: v_readfirstlane_b32 s36, v16
; SI-NEXT: v_readfirstlane_b32 s48, v15
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v14
; SI-NEXT: s_lshr_b32 s79, s34, 16
@@ -203430,7 +203629,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s81, v6
; SI-NEXT: v_readfirstlane_b32 s83, v4
; SI-NEXT: v_readfirstlane_b32 s54, v2
-; SI-NEXT: v_writelane_b32 v21, s78, 24
+; SI-NEXT: v_writelane_b32 v23, s78, 24
; SI-NEXT: s_lshr_b32 s35, s29, 16
; SI-NEXT: s_lshr_b32 s37, s27, 16
; SI-NEXT: s_lshr_b32 s39, s25, 16
@@ -203440,19 +203639,19 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s55, s17, 16
; SI-NEXT: s_lshr_b32 s75, s50, 16
; SI-NEXT: s_lshr_b32 s91, s52, 16
-; SI-NEXT: s_lshr_b32 s71, s36, 16
; SI-NEXT: s_lshr_b32 s90, s48, 16
; SI-NEXT: s_lshr_b32 s77, vcc_lo, 16
; SI-NEXT: s_lshr_b32 s98, s85, 16
; SI-NEXT: s_lshr_b32 s93, s82, 16
; SI-NEXT: s_lshr_b32 s95, s81, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s83, 16
-; SI-NEXT: s_lshr_b32 s38, s54, 16
+; SI-NEXT: s_lshr_b32 s86, s54, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v21, s79, 25
+; SI-NEXT: v_writelane_b32 v23, s79, 25
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v21, s90, 26
-; SI-NEXT: v_writelane_b32 v21, s91, 27
+; SI-NEXT: v_writelane_b32 v23, s90, 26
+; SI-NEXT: v_writelane_b32 v23, s91, 27
+; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB99_2
; SI-NEXT: ; %bb.1: ; %cmp.false
@@ -203498,11 +203697,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s57, s4, s5
-; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_and_b32 s4, s38, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s54, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s38, 16
+; SI-NEXT: s_lshl_b32 s5, s86, 16
; SI-NEXT: s_or_b32 s45, s4, s5
; SI-NEXT: s_and_b32 s4, s80, 0xffff
; SI-NEXT: s_lshl_b32 s5, s13, 16
@@ -203530,213 +203729,216 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s13, s4, s5
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
-; SI-NEXT: v_readlane_b32 s18, v21, 0
-; SI-NEXT: s_lshr_b32 s16, s63, 8
+; SI-NEXT: v_readlane_b32 s20, v23, 1
; SI-NEXT: s_or_b32 s10, s4, s5
; SI-NEXT: s_and_b32 s4, s92, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s18, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s16, 42
-; SI-NEXT: s_lshr_b32 s16, s59, 8
+; SI-NEXT: s_lshl_b32 s5, s20, 16
; SI-NEXT: s_or_b32 s11, s4, s5
; SI-NEXT: s_and_b32 s4, s34, 0xffff
; SI-NEXT: s_lshl_b32 s5, s79, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 44
-; SI-NEXT: s_lshr_b32 s16, s47, 8
+; SI-NEXT: s_lshr_b32 s18, s89, 8
; SI-NEXT: s_or_b32 s8, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s77, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 46
-; SI-NEXT: s_lshr_b32 s16, s61, 8
+; SI-NEXT: v_writelane_b32 v21, s18, 44
+; SI-NEXT: s_lshr_b32 s18, s73, 8
; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s48, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 40
-; SI-NEXT: s_lshr_b32 s66, s15, 8
+; SI-NEXT: v_readlane_b32 s19, v23, 0
+; SI-NEXT: v_writelane_b32 v21, s18, 47
+; SI-NEXT: s_lshr_b32 s18, s63, 8
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: v_writelane_b32 v22, s66, 48
-; SI-NEXT: s_lshr_b32 s66, s13, 8
+; SI-NEXT: s_lshl_b32 s5, s19, 16
+; SI-NEXT: v_writelane_b32 v21, s18, 49
+; SI-NEXT: s_lshr_b32 s18, s59, 8
; SI-NEXT: s_or_b32 s7, s4, s5
; SI-NEXT: s_and_b32 s4, s52, 0xffff
; SI-NEXT: s_lshl_b32 s5, s91, 16
-; SI-NEXT: v_writelane_b32 v22, s66, 50
-; SI-NEXT: s_lshr_b32 s66, s11, 8
+; SI-NEXT: v_writelane_b32 v21, s18, 51
+; SI-NEXT: s_lshr_b32 s18, s47, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s50, 0xffff
-; SI-NEXT: s_lshl_b32 s65, s75, 16
-; SI-NEXT: v_writelane_b32 v22, s66, 52
-; SI-NEXT: s_lshr_b32 s66, s9, 8
-; SI-NEXT: s_or_b32 s5, s5, s65
-; SI-NEXT: v_writelane_b32 v22, s66, 54
-; SI-NEXT: s_lshr_b32 s66, s7, 8
-; SI-NEXT: v_writelane_b32 v22, s66, 56
-; SI-NEXT: s_lshr_b32 s66, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s66, 58
-; SI-NEXT: s_bfe_u32 s16, s51, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s16, 41
-; SI-NEXT: s_bfe_u32 s16, s49, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s16, 43
-; SI-NEXT: s_bfe_u32 s16, s39, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s16, 45
-; SI-NEXT: s_bfe_u32 s16, s37, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s16, 47
+; SI-NEXT: s_lshl_b32 s96, s75, 16
+; SI-NEXT: v_writelane_b32 v21, s18, 53
+; SI-NEXT: s_lshr_b32 s18, s61, 8
+; SI-NEXT: s_or_b32 s5, s5, s96
+; SI-NEXT: v_writelane_b32 v21, s18, 43
+; SI-NEXT: s_lshr_b32 s96, s15, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 55
+; SI-NEXT: s_lshr_b32 s96, s13, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 57
+; SI-NEXT: s_lshr_b32 s96, s11, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 59
+; SI-NEXT: s_lshr_b32 s96, s9, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 61
+; SI-NEXT: s_lshr_b32 s96, s7, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 63
+; SI-NEXT: s_bfe_u32 s18, s55, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 45
+; SI-NEXT: s_bfe_u32 s18, s53, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 46
+; SI-NEXT: s_bfe_u32 s18, s51, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 48
+; SI-NEXT: s_bfe_u32 s18, s49, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 50
+; SI-NEXT: s_bfe_u32 s18, s39, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 52
+; SI-NEXT: s_bfe_u32 s18, s37, 0x80008
+; SI-NEXT: s_lshr_b32 s96, s5, 8
+; SI-NEXT: v_writelane_b32 v21, s18, 54
+; SI-NEXT: s_bfe_u32 s18, s35, 0x80008
+; SI-NEXT: v_writelane_b32 v22, s96, 1
+; SI-NEXT: v_writelane_b32 v21, s18, 42
; SI-NEXT: s_bfe_u32 s96, s98, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s96, 49
-; SI-NEXT: s_bfe_u32 s96, s18, 0x80008
-; SI-NEXT: s_mov_b32 s18, s17
-; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 32
-; SI-NEXT: v_writelane_b32 v21, s17, 33
-; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 30
-; SI-NEXT: v_writelane_b32 v21, s17, 31
-; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 28
-; SI-NEXT: v_writelane_b32 v21, s17, 29
-; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 38
-; SI-NEXT: v_writelane_b32 v21, s17, 39
-; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 36
-; SI-NEXT: v_writelane_b32 v21, s17, 37
-; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 34
-; SI-NEXT: v_writelane_b32 v21, s17, 35
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 44
-; SI-NEXT: v_writelane_b32 v21, s17, 45
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 42
-; SI-NEXT: v_writelane_b32 v21, s17, 43
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 40
-; SI-NEXT: v_writelane_b32 v21, s17, 41
-; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 24
-; SI-NEXT: s_mov_b32 s17, s18
+; SI-NEXT: v_writelane_b32 v21, s96, 56
+; SI-NEXT: s_bfe_u32 s96, s20, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s96, 58
+; SI-NEXT: s_bfe_u32 s96, s77, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s96, 60
+; SI-NEXT: s_bfe_u32 s96, s19, 0x80008
+; SI-NEXT: s_lshr_b64 s[18:19], s[88:89], 24
+; SI-NEXT: v_writelane_b32 v23, s18, 32
+; SI-NEXT: v_writelane_b32 v23, s19, 33
+; SI-NEXT: s_lshr_b64 s[18:19], s[88:89], 16
+; SI-NEXT: v_writelane_b32 v23, s18, 30
+; SI-NEXT: v_writelane_b32 v23, s19, 31
+; SI-NEXT: s_lshr_b64 s[18:19], s[88:89], 8
+; SI-NEXT: v_writelane_b32 v23, s18, 28
+; SI-NEXT: v_writelane_b32 v23, s19, 29
+; SI-NEXT: s_lshr_b64 s[18:19], s[72:73], 24
+; SI-NEXT: v_writelane_b32 v23, s18, 38
+; SI-NEXT: v_writelane_b32 v23, s19, 39
+; SI-NEXT: s_lshr_b64 s[18:19], s[72:73], 16
+; SI-NEXT: v_writelane_b32 v23, s18, 36
+; SI-NEXT: v_writelane_b32 v23, s19, 37
+; SI-NEXT: s_lshr_b64 s[18:19], s[72:73], 8
+; SI-NEXT: v_writelane_b32 v23, s18, 34
+; SI-NEXT: v_writelane_b32 v23, s19, 35
+; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 24
+; SI-NEXT: v_writelane_b32 v23, s18, 44
+; SI-NEXT: v_writelane_b32 v23, s19, 45
+; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 16
+; SI-NEXT: v_writelane_b32 v23, s18, 42
+; SI-NEXT: v_writelane_b32 v23, s19, 43
+; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 8
+; SI-NEXT: v_writelane_b32 v23, s18, 40
+; SI-NEXT: v_writelane_b32 v23, s19, 41
+; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 24
+; SI-NEXT: v_writelane_b32 v23, s18, 50
+; SI-NEXT: v_writelane_b32 v23, s19, 51
; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 16
-; SI-NEXT: v_writelane_b32 v21, s18, 48
-; SI-NEXT: v_writelane_b32 v21, s19, 49
+; SI-NEXT: v_writelane_b32 v23, s18, 48
+; SI-NEXT: v_writelane_b32 v23, s19, 49
; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 8
-; SI-NEXT: v_writelane_b32 v21, s18, 46
-; SI-NEXT: v_writelane_b32 v21, s19, 47
+; SI-NEXT: v_writelane_b32 v23, s18, 46
+; SI-NEXT: v_writelane_b32 v23, s19, 47
; SI-NEXT: s_lshr_b64 s[18:19], s[46:47], 24
-; SI-NEXT: v_writelane_b32 v21, s18, 54
-; SI-NEXT: v_writelane_b32 v21, s19, 55
+; SI-NEXT: v_writelane_b32 v23, s18, 56
+; SI-NEXT: v_writelane_b32 v23, s19, 57
; SI-NEXT: s_lshr_b64 s[18:19], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v21, s18, 52
-; SI-NEXT: v_writelane_b32 v21, s19, 53
+; SI-NEXT: v_writelane_b32 v23, s18, 54
+; SI-NEXT: v_writelane_b32 v23, s19, 55
; SI-NEXT: s_lshr_b64 s[18:19], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v21, s18, 50
-; SI-NEXT: v_writelane_b32 v21, s19, 51
+; SI-NEXT: v_writelane_b32 v23, s18, 52
+; SI-NEXT: v_writelane_b32 v23, s19, 53
; SI-NEXT: s_lshr_b64 s[18:19], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v21, s18, 60
-; SI-NEXT: v_writelane_b32 v21, s19, 61
+; SI-NEXT: v_writelane_b32 v23, s18, 62
+; SI-NEXT: v_writelane_b32 v23, s19, 63
; SI-NEXT: s_lshr_b64 s[18:19], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v22, s96, 51
-; SI-NEXT: s_bfe_u32 s96, s77, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s18, 58
-; SI-NEXT: v_writelane_b32 v22, s96, 53
-; SI-NEXT: s_bfe_u32 s96, s71, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s19, 59
+; SI-NEXT: v_writelane_b32 v23, s18, 60
+; SI-NEXT: v_writelane_b32 v23, s19, 61
; SI-NEXT: s_lshr_b64 s[18:19], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v22, s96, 55
-; SI-NEXT: s_bfe_u32 s96, s75, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s18, 56
-; SI-NEXT: v_writelane_b32 v22, s96, 57
-; SI-NEXT: v_writelane_b32 v21, s19, 57
+; SI-NEXT: v_writelane_b32 v23, s18, 58
+; SI-NEXT: v_writelane_b32 v21, s96, 62
+; SI-NEXT: v_writelane_b32 v23, s19, 59
; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 0
-; SI-NEXT: v_writelane_b32 v22, s19, 1
+; SI-NEXT: v_writelane_b32 v21, s18, 2
+; SI-NEXT: v_writelane_b32 v21, s19, 3
; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v21, s18, 62
-; SI-NEXT: v_writelane_b32 v21, s19, 63
+; SI-NEXT: v_writelane_b32 v21, s18, 0
+; SI-NEXT: v_writelane_b32 v21, s19, 1
; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 6
-; SI-NEXT: v_writelane_b32 v22, s19, 7
+; SI-NEXT: v_writelane_b32 v21, s18, 8
+; SI-NEXT: v_writelane_b32 v21, s19, 9
; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s18, 4
-; SI-NEXT: v_writelane_b32 v22, s19, 5
+; SI-NEXT: v_writelane_b32 v21, s18, 6
+; SI-NEXT: v_writelane_b32 v21, s19, 7
; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v22, s18, 2
-; SI-NEXT: v_writelane_b32 v22, s19, 3
+; SI-NEXT: v_writelane_b32 v21, s18, 4
+; SI-NEXT: v_writelane_b32 v21, s19, 5
; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 12
-; SI-NEXT: v_writelane_b32 v22, s19, 13
+; SI-NEXT: v_writelane_b32 v21, s18, 14
+; SI-NEXT: v_writelane_b32 v21, s19, 15
; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s18, 10
-; SI-NEXT: v_writelane_b32 v22, s19, 11
+; SI-NEXT: v_writelane_b32 v21, s18, 12
+; SI-NEXT: v_writelane_b32 v21, s19, 13
; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v22, s18, 8
-; SI-NEXT: v_writelane_b32 v22, s19, 9
+; SI-NEXT: v_writelane_b32 v21, s18, 10
+; SI-NEXT: v_writelane_b32 v21, s19, 11
; SI-NEXT: s_lshr_b64 s[18:19], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 18
-; SI-NEXT: v_writelane_b32 v22, s19, 19
+; SI-NEXT: v_writelane_b32 v21, s18, 20
+; SI-NEXT: v_writelane_b32 v21, s19, 21
; SI-NEXT: s_lshr_b64 s[18:19], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s18, 16
-; SI-NEXT: v_writelane_b32 v22, s19, 17
+; SI-NEXT: v_writelane_b32 v21, s18, 18
+; SI-NEXT: v_writelane_b32 v21, s19, 19
; SI-NEXT: s_lshr_b64 s[18:19], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v22, s18, 14
-; SI-NEXT: v_writelane_b32 v22, s19, 15
+; SI-NEXT: v_writelane_b32 v21, s18, 16
+; SI-NEXT: v_writelane_b32 v21, s19, 17
; SI-NEXT: s_lshr_b64 s[18:19], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 24
-; SI-NEXT: v_writelane_b32 v22, s19, 25
+; SI-NEXT: v_writelane_b32 v21, s18, 26
+; SI-NEXT: v_writelane_b32 v21, s19, 27
; SI-NEXT: s_lshr_b64 s[18:19], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s18, 22
-; SI-NEXT: v_writelane_b32 v22, s19, 23
+; SI-NEXT: v_writelane_b32 v21, s18, 24
+; SI-NEXT: v_writelane_b32 v21, s19, 25
; SI-NEXT: s_lshr_b64 s[18:19], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v22, s18, 20
-; SI-NEXT: v_writelane_b32 v22, s19, 21
+; SI-NEXT: v_writelane_b32 v21, s18, 22
+; SI-NEXT: v_writelane_b32 v21, s19, 23
; SI-NEXT: s_lshr_b64 s[18:19], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 30
-; SI-NEXT: v_writelane_b32 v22, s19, 31
+; SI-NEXT: v_writelane_b32 v21, s18, 32
+; SI-NEXT: v_writelane_b32 v21, s19, 33
; SI-NEXT: s_lshr_b64 s[18:19], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v22, s18, 28
-; SI-NEXT: v_writelane_b32 v22, s19, 29
+; SI-NEXT: v_writelane_b32 v21, s18, 30
+; SI-NEXT: v_writelane_b32 v21, s19, 31
; SI-NEXT: s_lshr_b64 s[18:19], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v22, s18, 26
-; SI-NEXT: v_writelane_b32 v22, s19, 27
+; SI-NEXT: v_writelane_b32 v21, s18, 28
+; SI-NEXT: v_writelane_b32 v21, s19, 29
; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v22, s18, 36
-; SI-NEXT: s_mov_b32 s21, s71
-; SI-NEXT: s_lshr_b64 s[70:71], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v22, s19, 37
-; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s67, s57, 8
+; SI-NEXT: v_writelane_b32 v21, s18, 38
; SI-NEXT: s_lshr_b32 s90, s45, 8
-; SI-NEXT: s_lshr_b32 s78, s43, 8
-; SI-NEXT: s_mov_b32 s71, s21
-; SI-NEXT: v_writelane_b32 v22, s18, 34
-; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v21, s19, 39
+; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 8
+; SI-NEXT: s_bfe_u32 s78, vcc_hi, 0x80008
+; SI-NEXT: s_bfe_u32 s30, s93, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 36
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 24
+; SI-NEXT: s_mov_b32 s69, s90
+; SI-NEXT: s_lshr_b64 s[90:91], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s65, s57, 8
+; SI-NEXT: s_lshr_b32 s64, s43, 8
; SI-NEXT: s_lshr_b32 s74, s41, 8
-; SI-NEXT: s_bfe_u32 s65, vcc_hi, 0x80008
-; SI-NEXT: s_bfe_u32 s64, s93, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s19, 35
+; SI-NEXT: s_bfe_u32 s96, s75, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s19, 37
; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 8
-; SI-NEXT: s_mov_b32 s31, s78
-; SI-NEXT: s_mov_b32 s69, s90
-; SI-NEXT: s_mov_b32 s21, s67
+; SI-NEXT: s_mov_b32 s67, s78
+; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[6:7], 8
+; SI-NEXT: s_mov_b32 s91, s30
+; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 8
; SI-NEXT: s_bfe_u32 s97, s95, 0x80008
+; SI-NEXT: v_writelane_b32 v22, s96, 0
; SI-NEXT: s_mov_b32 s96, s75
-; SI-NEXT: v_writelane_b32 v22, s18, 32
+; SI-NEXT: v_writelane_b32 v21, s18, 34
+; SI-NEXT: s_mov_b32 s21, s65
; SI-NEXT: s_mov_b32 s79, s74
-; SI-NEXT: s_mov_b32 s91, s64
-; SI-NEXT: s_mov_b32 s67, s65
+; SI-NEXT: s_mov_b32 s31, s64
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 8
-; SI-NEXT: s_lshr_b32 s27, s89, 8
-; SI-NEXT: s_lshr_b32 s22, s73, 8
-; SI-NEXT: s_bfe_u32 s28, s55, 0x80008
-; SI-NEXT: s_bfe_u32 s23, s53, 0x80008
-; SI-NEXT: s_bfe_u32 s26, s35, 0x80008
-; SI-NEXT: s_bfe_u32 s99, s38, 0x80008
-; SI-NEXT: v_writelane_b32 v22, s19, 33
+; SI-NEXT: s_bfe_u32 s99, s86, 0x80008
+; SI-NEXT: s_lshr_b64 s[70:71], s[56:57], 8
+; SI-NEXT: v_writelane_b32 v21, s19, 35
; SI-NEXT: s_mov_b32 s65, s97
; SI-NEXT: s_lshr_b64 s[18:19], s[4:5], 16
; SI-NEXT: s_mov_b32 s75, s96
@@ -203745,21 +203947,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: .LBB99_2:
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: s_mov_b64 s[96:97], -1
-; SI-NEXT: v_writelane_b32 v21, s4, 28
-; SI-NEXT: v_writelane_b32 v21, s5, 29
+; SI-NEXT: v_writelane_b32 v23, s4, 28
+; SI-NEXT: v_writelane_b32 v23, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $sgpr28
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr22
-; SI-NEXT: ; implicit-def: $sgpr23
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr16
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr21
-; SI-NEXT: ; implicit-def: $sgpr26
; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr99
; SI-NEXT: ; implicit-def: $sgpr31
@@ -203779,47 +203975,58 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr18
; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: v_writelane_b32 v21, s4, 30
-; SI-NEXT: v_writelane_b32 v21, s5, 31
+; SI-NEXT: v_writelane_b32 v23, s4, 30
+; SI-NEXT: v_writelane_b32 v23, s5, 31
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 32
-; SI-NEXT: v_writelane_b32 v21, s5, 33
+; SI-NEXT: v_writelane_b32 v23, s4, 32
+; SI-NEXT: v_writelane_b32 v23, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 34
-; SI-NEXT: v_writelane_b32 v21, s5, 35
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 36
-; SI-NEXT: v_writelane_b32 v21, s5, 37
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 38
-; SI-NEXT: v_writelane_b32 v21, s5, 39
+; SI-NEXT: v_writelane_b32 v23, s4, 34
+; SI-NEXT: v_writelane_b32 v23, s5, 35
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v23, s4, 36
+; SI-NEXT: v_writelane_b32 v23, s5, 37
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v23, s4, 38
+; SI-NEXT: v_writelane_b32 v23, s5, 39
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 40
-; SI-NEXT: v_writelane_b32 v21, s5, 41
+; SI-NEXT: v_writelane_b32 v23, s4, 40
+; SI-NEXT: v_writelane_b32 v23, s5, 41
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 42
-; SI-NEXT: v_writelane_b32 v21, s5, 43
+; SI-NEXT: v_writelane_b32 v23, s4, 42
+; SI-NEXT: v_writelane_b32 v23, s5, 43
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 44
-; SI-NEXT: v_writelane_b32 v21, s5, 45
+; SI-NEXT: v_writelane_b32 v23, s4, 44
+; SI-NEXT: v_writelane_b32 v23, s5, 45
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 46
-; SI-NEXT: v_writelane_b32 v21, s5, 47
+; SI-NEXT: v_writelane_b32 v23, s4, 46
+; SI-NEXT: v_writelane_b32 v23, s5, 47
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 48
-; SI-NEXT: v_writelane_b32 v21, s5, 49
+; SI-NEXT: v_writelane_b32 v23, s4, 48
+; SI-NEXT: v_writelane_b32 v23, s5, 49
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v23, s4, 50
+; SI-NEXT: v_writelane_b32 v23, s5, 51
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
@@ -203855,108 +204062,112 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 50
-; SI-NEXT: v_writelane_b32 v21, s5, 51
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 52
-; SI-NEXT: v_writelane_b32 v21, s5, 53
+; SI-NEXT: v_writelane_b32 v23, s4, 52
+; SI-NEXT: v_writelane_b32 v23, s5, 53
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 54
-; SI-NEXT: v_writelane_b32 v21, s5, 55
+; SI-NEXT: v_writelane_b32 v23, s4, 54
+; SI-NEXT: v_writelane_b32 v23, s5, 55
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 56
-; SI-NEXT: v_writelane_b32 v21, s5, 57
+; SI-NEXT: v_writelane_b32 v23, s4, 56
+; SI-NEXT: v_writelane_b32 v23, s5, 57
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 58
-; SI-NEXT: v_writelane_b32 v21, s5, 59
+; SI-NEXT: v_writelane_b32 v23, s4, 58
+; SI-NEXT: v_writelane_b32 v23, s5, 59
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 60
-; SI-NEXT: v_writelane_b32 v21, s5, 61
+; SI-NEXT: v_writelane_b32 v23, s4, 60
+; SI-NEXT: v_writelane_b32 v23, s5, 61
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 62
-; SI-NEXT: v_writelane_b32 v21, s5, 63
+; SI-NEXT: v_writelane_b32 v23, s4, 62
+; SI-NEXT: v_writelane_b32 v23, s5, 63
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s4, 0
-; SI-NEXT: v_writelane_b32 v22, s5, 1
+; SI-NEXT: v_writelane_b32 v21, s4, 0
+; SI-NEXT: v_writelane_b32 v21, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 2
-; SI-NEXT: v_writelane_b32 v22, s5, 3
+; SI-NEXT: v_writelane_b32 v21, s4, 2
+; SI-NEXT: v_writelane_b32 v21, s5, 3
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 4
-; SI-NEXT: v_writelane_b32 v22, s5, 5
+; SI-NEXT: v_writelane_b32 v21, s4, 4
+; SI-NEXT: v_writelane_b32 v21, s5, 5
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 6
-; SI-NEXT: v_writelane_b32 v22, s5, 7
+; SI-NEXT: v_writelane_b32 v21, s4, 6
+; SI-NEXT: v_writelane_b32 v21, s5, 7
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 8
-; SI-NEXT: v_writelane_b32 v22, s5, 9
+; SI-NEXT: v_writelane_b32 v21, s4, 8
+; SI-NEXT: v_writelane_b32 v21, s5, 9
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 10
-; SI-NEXT: v_writelane_b32 v22, s5, 11
+; SI-NEXT: v_writelane_b32 v21, s4, 10
+; SI-NEXT: v_writelane_b32 v21, s5, 11
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 12
-; SI-NEXT: v_writelane_b32 v22, s5, 13
+; SI-NEXT: v_writelane_b32 v21, s4, 12
+; SI-NEXT: v_writelane_b32 v21, s5, 13
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 14
-; SI-NEXT: v_writelane_b32 v22, s5, 15
+; SI-NEXT: v_writelane_b32 v21, s4, 14
+; SI-NEXT: v_writelane_b32 v21, s5, 15
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 16
-; SI-NEXT: v_writelane_b32 v22, s5, 17
+; SI-NEXT: v_writelane_b32 v21, s4, 16
+; SI-NEXT: v_writelane_b32 v21, s5, 17
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 18
-; SI-NEXT: v_writelane_b32 v22, s5, 19
+; SI-NEXT: v_writelane_b32 v21, s4, 18
+; SI-NEXT: v_writelane_b32 v21, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 20
-; SI-NEXT: v_writelane_b32 v22, s5, 21
+; SI-NEXT: v_writelane_b32 v21, s4, 20
+; SI-NEXT: v_writelane_b32 v21, s5, 21
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 22
-; SI-NEXT: v_writelane_b32 v22, s5, 23
+; SI-NEXT: v_writelane_b32 v21, s4, 22
+; SI-NEXT: v_writelane_b32 v21, s5, 23
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 24
-; SI-NEXT: v_writelane_b32 v22, s5, 25
+; SI-NEXT: v_writelane_b32 v21, s4, 24
+; SI-NEXT: v_writelane_b32 v21, s5, 25
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 26
-; SI-NEXT: v_writelane_b32 v22, s5, 27
+; SI-NEXT: v_writelane_b32 v21, s4, 26
+; SI-NEXT: v_writelane_b32 v21, s5, 27
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 28
-; SI-NEXT: v_writelane_b32 v22, s5, 29
+; SI-NEXT: v_writelane_b32 v21, s4, 28
+; SI-NEXT: v_writelane_b32 v21, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 30
-; SI-NEXT: v_writelane_b32 v22, s5, 31
+; SI-NEXT: v_writelane_b32 v21, s4, 30
+; SI-NEXT: v_writelane_b32 v21, s5, 31
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v21, s4, 32
+; SI-NEXT: v_writelane_b32 v21, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 32
-; SI-NEXT: v_writelane_b32 v22, s5, 33
+; SI-NEXT: v_writelane_b32 v21, s4, 34
+; SI-NEXT: v_writelane_b32 v21, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 34
-; SI-NEXT: v_writelane_b32 v22, s5, 35
+; SI-NEXT: v_writelane_b32 v21, s4, 36
+; SI-NEXT: v_writelane_b32 v21, s5, 37
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 36
-; SI-NEXT: v_writelane_b32 v22, s5, 37
+; SI-NEXT: v_writelane_b32 v21, s4, 38
+; SI-NEXT: v_writelane_b32 v21, s5, 39
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: .LBB99_3: ; %Flow
-; SI-NEXT: v_writelane_b32 v22, s64, 38
; SI-NEXT: s_and_b64 s[96:97], s[96:97], exec
-; SI-NEXT: v_writelane_b32 v22, s65, 39
+; SI-NEXT: v_writelane_b32 v21, s64, 40
; SI-NEXT: s_cselect_b32 s96, 1, 0
+; SI-NEXT: v_writelane_b32 v21, s65, 41
; SI-NEXT: s_cmp_lg_u32 s96, 1
; SI-NEXT: s_mov_b32 s64, s18
; SI-NEXT: s_mov_b32 s96, s74
; SI-NEXT: s_mov_b32 s74, s78
; SI-NEXT: s_mov_b32 s78, s90
-; SI-NEXT: s_mov_b32 s90, s66
-; SI-NEXT: s_mov_b32 s66, s30
-; SI-NEXT: s_mov_b32 s30, s68
+; SI-NEXT: s_mov_b32 s90, s30
+; SI-NEXT: s_mov_b32 s30, s66
+; SI-NEXT: s_mov_b32 s66, s68
; SI-NEXT: s_mov_b32 s68, s20
; SI-NEXT: s_mov_b32 s20, s70
-; SI-NEXT: s_mov_b32 s70, s16
-; SI-NEXT: v_readlane_b32 s97, v22, 40
-; SI-NEXT: v_readlane_b32 s18, v21, 32
-; SI-NEXT: v_readlane_b32 s19, v21, 33
+; SI-NEXT: v_readlane_b32 s70, v23, 50
+; SI-NEXT: v_readlane_b32 s18, v23, 32
+; SI-NEXT: v_readlane_b32 s71, v23, 51
+; SI-NEXT: v_readlane_b32 s19, v23, 33
+; SI-NEXT: v_readlane_b32 s71, v21, 42
+; SI-NEXT: v_readlane_b32 s97, v21, 43
+; SI-NEXT: v_readlane_b32 s19, v21, 44
; SI-NEXT: s_cbranch_scc1 .LBB99_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s52, s52, 3
-; SI-NEXT: v_readlane_b32 s5, v21, 27
+; SI-NEXT: v_readlane_b32 s5, v23, 27
; SI-NEXT: s_and_b32 s4, s52, 0xffff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_add_i32 s50, s50, 3
@@ -203964,16 +204175,17 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s5, s50, 0xffff
; SI-NEXT: s_lshl_b32 s6, s75, 16
; SI-NEXT: s_add_i32 s48, s48, 3
-; SI-NEXT: v_readlane_b32 s7, v21, 26
+; SI-NEXT: v_readlane_b32 s7, v23, 26
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s48, 0xffff
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_add_i32 s36, s36, 3
+; SI-NEXT: v_readlane_b32 s8, v23, 0
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s71, 16
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_add_i32 s34, s34, 3
-; SI-NEXT: v_readlane_b32 s9, v21, 25
+; SI-NEXT: v_readlane_b32 s9, v23, 25
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s34, 0xffff
; SI-NEXT: s_lshl_b32 s9, s9, 16
@@ -203982,17 +204194,17 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s9, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s10, s77, 16
; SI-NEXT: s_add_i32 s94, s94, 3
-; SI-NEXT: v_readlane_b32 s11, v21, 24
+; SI-NEXT: v_readlane_b32 s11, v23, 24
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_and_b32 s10, s94, 0xffff
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_add_i32 s92, s92, 3
-; SI-NEXT: v_readlane_b32 s12, v21, 0
+; SI-NEXT: v_readlane_b32 s12, v23, 1
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s92, 0xffff
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: v_readlane_b32 s13, v21, 23
+; SI-NEXT: v_readlane_b32 s13, v23, 23
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_and_b32 s12, s87, 0xffff
; SI-NEXT: s_lshl_b32 s13, s13, 16
@@ -204001,7 +204213,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s13, s85, 0xffff
; SI-NEXT: s_lshl_b32 s14, s98, 16
; SI-NEXT: s_add_i32 s84, s84, 3
-; SI-NEXT: v_readlane_b32 s15, v21, 22
+; SI-NEXT: v_readlane_b32 s15, v23, 22
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_and_b32 s14, s84, 0xffff
; SI-NEXT: s_lshl_b32 s15, s15, 16
@@ -204010,112 +204222,111 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s15, s82, 0xffff
; SI-NEXT: s_lshl_b32 s40, s93, 16
; SI-NEXT: s_add_i32 s76, s76, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 21
+; SI-NEXT: v_readlane_b32 s18, v23, 21
; SI-NEXT: s_or_b32 s15, s40, s15
; SI-NEXT: s_and_b32 s40, s76, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s16, 16
+; SI-NEXT: s_lshl_b32 s41, s18, 16
; SI-NEXT: s_add_i32 s81, s81, 3
; SI-NEXT: s_or_b32 s40, s41, s40
; SI-NEXT: s_and_b32 s41, s81, 0xffff
; SI-NEXT: s_lshl_b32 s42, s95, 16
; SI-NEXT: s_add_i32 s80, s80, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 20
+; SI-NEXT: v_readlane_b32 s18, v23, 20
; SI-NEXT: s_or_b32 s41, s42, s41
; SI-NEXT: s_and_b32 s42, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s16, 16
+; SI-NEXT: s_lshl_b32 s43, s18, 16
; SI-NEXT: s_add_i32 s70, s83, 3
; SI-NEXT: s_or_b32 s42, s43, s42
; SI-NEXT: s_and_b32 s43, s70, 0xffff
; SI-NEXT: s_lshl_b32 s44, vcc_hi, 16
-; SI-NEXT: s_add_i32 s69, s86, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 19
+; SI-NEXT: s_add_i32 s69, s38, 3
+; SI-NEXT: v_readlane_b32 s18, v23, 19
; SI-NEXT: s_or_b32 s43, s44, s43
; SI-NEXT: s_and_b32 s44, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s16, 16
+; SI-NEXT: s_lshl_b32 s45, s18, 16
; SI-NEXT: s_add_i32 s67, s54, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 16
+; SI-NEXT: v_readlane_b32 s18, v23, 16
; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: s_and_b32 s45, s67, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
-; SI-NEXT: s_add_i32 s28, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 18
+; SI-NEXT: s_lshl_b32 s46, s86, 16
+; SI-NEXT: s_add_i32 s28, s18, 3
+; SI-NEXT: v_readlane_b32 s18, v23, 18
; SI-NEXT: s_or_b32 s45, s46, s45
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s16, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 15
+; SI-NEXT: s_lshl_b32 s46, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v23, 15
; SI-NEXT: s_or_b32 s28, s46, s28
-; SI-NEXT: s_add_i32 s29, s16, 3
+; SI-NEXT: s_add_i32 s29, s18, 3
; SI-NEXT: s_add_i32 s56, s28, 0x30000
; SI-NEXT: s_and_b32 s28, s29, 0xffff
; SI-NEXT: s_lshl_b32 s29, s35, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 13
+; SI-NEXT: v_readlane_b32 s18, v23, 13
; SI-NEXT: s_or_b32 s28, s29, s28
-; SI-NEXT: s_add_i32 s26, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 17
+; SI-NEXT: s_add_i32 s26, s18, 3
+; SI-NEXT: v_readlane_b32 s18, v23, 17
; SI-NEXT: s_add_i32 s57, s28, 0x30000
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s16, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 12
+; SI-NEXT: s_lshl_b32 s28, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v23, 12
; SI-NEXT: s_or_b32 s26, s28, s26
-; SI-NEXT: s_add_i32 s27, s16, 3
+; SI-NEXT: s_add_i32 s27, s18, 3
; SI-NEXT: s_add_i32 s60, s26, 0x30000
; SI-NEXT: s_and_b32 s26, s27, 0xffff
; SI-NEXT: s_lshl_b32 s27, s37, 16
; SI-NEXT: s_or_b32 s26, s27, s26
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 14
+; SI-NEXT: v_readlane_b32 s18, v23, 14
; SI-NEXT: s_add_i32 s61, s26, 0x30000
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s16, 16
+; SI-NEXT: s_lshl_b32 s26, s18, 16
; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s46, s24, 0x30000
; SI-NEXT: s_and_b32 s24, s25, 0xffff
; SI-NEXT: s_lshl_b32 s25, s39, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 9
+; SI-NEXT: v_readlane_b32 s18, v23, 9
; SI-NEXT: s_or_b32 s24, s25, s24
-; SI-NEXT: s_add_i32 s22, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 11
+; SI-NEXT: s_add_i32 s22, s18, 3
+; SI-NEXT: v_readlane_b32 s18, v23, 11
; SI-NEXT: s_add_i32 s47, s24, 0x30000
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s16, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 8
+; SI-NEXT: s_lshl_b32 s24, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v23, 8
; SI-NEXT: s_or_b32 s22, s24, s22
-; SI-NEXT: s_add_i32 s23, s16, 3
+; SI-NEXT: s_add_i32 s23, s18, 3
; SI-NEXT: s_add_i32 s58, s22, 0x30000
; SI-NEXT: s_and_b32 s22, s23, 0xffff
; SI-NEXT: s_lshl_b32 s23, s49, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 6
+; SI-NEXT: v_readlane_b32 s18, v23, 6
; SI-NEXT: s_or_b32 s22, s23, s22
-; SI-NEXT: s_add_i32 s20, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 10
+; SI-NEXT: s_add_i32 s20, s18, 3
+; SI-NEXT: v_readlane_b32 s18, v23, 10
; SI-NEXT: s_add_i32 s59, s22, 0x30000
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s16, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 5
+; SI-NEXT: s_lshl_b32 s22, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v23, 5
; SI-NEXT: s_or_b32 s20, s22, s20
-; SI-NEXT: s_add_i32 s21, s16, 3
+; SI-NEXT: s_add_i32 s21, s18, 3
; SI-NEXT: s_add_i32 s62, s20, 0x30000
; SI-NEXT: s_and_b32 s20, s21, 0xffff
; SI-NEXT: s_lshl_b32 s21, s51, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 3
+; SI-NEXT: v_readlane_b32 s18, v23, 3
; SI-NEXT: s_or_b32 s20, s21, s20
-; SI-NEXT: s_add_i32 s18, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 7
+; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: v_readlane_b32 s19, v23, 7
; SI-NEXT: s_add_i32 s63, s20, 0x30000
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s16, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 2
+; SI-NEXT: s_lshl_b32 s20, s19, 16
; SI-NEXT: s_or_b32 s18, s20, s18
-; SI-NEXT: s_add_i32 s19, s16, 3
; SI-NEXT: s_add_i32 s72, s18, 0x30000
+; SI-NEXT: v_readlane_b32 s18, v23, 2
+; SI-NEXT: s_add_i32 s19, s18, 3
; SI-NEXT: s_and_b32 s18, s19, 0xffff
; SI-NEXT: s_lshl_b32 s19, s53, 16
; SI-NEXT: s_or_b32 s18, s19, s18
-; SI-NEXT: v_readlane_b32 s16, v21, 1
; SI-NEXT: s_add_i32 s73, s18, 0x30000
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s18, v21, 4
+; SI-NEXT: v_readlane_b32 s18, v23, 4
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_or_b32 s16, s18, s16
@@ -204126,196 +204337,201 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s89, s16, 0x30000
; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 30
-; SI-NEXT: v_writelane_b32 v21, s17, 31
+; SI-NEXT: v_writelane_b32 v23, s16, 30
+; SI-NEXT: v_writelane_b32 v23, s17, 31
; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 28
-; SI-NEXT: v_writelane_b32 v21, s17, 29
+; SI-NEXT: v_writelane_b32 v23, s16, 28
+; SI-NEXT: v_writelane_b32 v23, s17, 29
; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 38
-; SI-NEXT: v_writelane_b32 v21, s17, 39
+; SI-NEXT: v_writelane_b32 v23, s16, 38
+; SI-NEXT: v_writelane_b32 v23, s17, 39
; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 36
-; SI-NEXT: v_writelane_b32 v21, s17, 37
+; SI-NEXT: v_writelane_b32 v23, s16, 36
+; SI-NEXT: v_writelane_b32 v23, s17, 37
; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 34
-; SI-NEXT: v_writelane_b32 v21, s17, 35
+; SI-NEXT: v_writelane_b32 v23, s16, 34
+; SI-NEXT: v_writelane_b32 v23, s17, 35
; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 44
-; SI-NEXT: v_writelane_b32 v21, s17, 45
+; SI-NEXT: v_writelane_b32 v23, s16, 44
+; SI-NEXT: v_writelane_b32 v23, s17, 45
; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 42
-; SI-NEXT: v_writelane_b32 v21, s17, 43
+; SI-NEXT: v_writelane_b32 v23, s16, 42
+; SI-NEXT: v_writelane_b32 v23, s17, 43
; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 40
-; SI-NEXT: v_writelane_b32 v21, s17, 41
+; SI-NEXT: v_writelane_b32 v23, s16, 40
+; SI-NEXT: v_writelane_b32 v23, s17, 41
; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 48
-; SI-NEXT: v_writelane_b32 v21, s17, 49
+; SI-NEXT: v_writelane_b32 v23, s16, 48
+; SI-NEXT: v_writelane_b32 v23, s17, 49
; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 46
-; SI-NEXT: v_writelane_b32 v21, s17, 47
+; SI-NEXT: v_writelane_b32 v23, s16, 46
+; SI-NEXT: v_writelane_b32 v23, s17, 47
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 54
-; SI-NEXT: v_writelane_b32 v21, s17, 55
+; SI-NEXT: v_writelane_b32 v23, s16, 56
+; SI-NEXT: v_writelane_b32 v23, s17, 57
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 52
-; SI-NEXT: v_writelane_b32 v21, s17, 53
+; SI-NEXT: v_writelane_b32 v23, s16, 54
+; SI-NEXT: v_writelane_b32 v23, s17, 55
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 50
-; SI-NEXT: v_writelane_b32 v21, s17, 51
+; SI-NEXT: v_writelane_b32 v23, s16, 52
+; SI-NEXT: v_writelane_b32 v23, s17, 53
; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 60
-; SI-NEXT: v_writelane_b32 v21, s17, 61
+; SI-NEXT: v_writelane_b32 v23, s16, 62
+; SI-NEXT: v_writelane_b32 v23, s17, 63
; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 58
-; SI-NEXT: v_writelane_b32 v21, s17, 59
+; SI-NEXT: v_writelane_b32 v23, s16, 60
+; SI-NEXT: v_writelane_b32 v23, s17, 61
; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 56
-; SI-NEXT: v_writelane_b32 v21, s17, 57
+; SI-NEXT: v_writelane_b32 v23, s16, 58
+; SI-NEXT: v_writelane_b32 v23, s17, 59
; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 0
-; SI-NEXT: v_writelane_b32 v22, s17, 1
+; SI-NEXT: v_writelane_b32 v21, s16, 2
+; SI-NEXT: v_writelane_b32 v21, s17, 3
; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16
; SI-NEXT: s_add_i32 s44, s44, 0x30000
; SI-NEXT: s_add_i32 s45, s45, 0x30000
-; SI-NEXT: v_writelane_b32 v21, s16, 62
-; SI-NEXT: v_writelane_b32 v21, s17, 63
+; SI-NEXT: v_writelane_b32 v21, s16, 0
+; SI-NEXT: v_writelane_b32 v21, s17, 1
; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 6
-; SI-NEXT: v_writelane_b32 v22, s17, 7
+; SI-NEXT: v_writelane_b32 v21, s16, 8
+; SI-NEXT: v_writelane_b32 v21, s17, 9
; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 4
-; SI-NEXT: v_writelane_b32 v22, s17, 5
+; SI-NEXT: v_writelane_b32 v21, s16, 6
+; SI-NEXT: v_writelane_b32 v21, s17, 7
; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 8
; SI-NEXT: s_add_i32 s42, s42, 0x30000
; SI-NEXT: s_add_i32 s43, s43, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 2
-; SI-NEXT: v_writelane_b32 v22, s17, 3
+; SI-NEXT: v_writelane_b32 v21, s16, 4
+; SI-NEXT: v_writelane_b32 v21, s17, 5
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 12
-; SI-NEXT: v_writelane_b32 v22, s17, 13
+; SI-NEXT: v_writelane_b32 v21, s16, 14
+; SI-NEXT: v_writelane_b32 v21, s17, 15
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 10
-; SI-NEXT: v_writelane_b32 v22, s17, 11
+; SI-NEXT: v_writelane_b32 v21, s16, 12
+; SI-NEXT: v_writelane_b32 v21, s17, 13
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8
; SI-NEXT: s_add_i32 s40, s40, 0x30000
; SI-NEXT: s_add_i32 s41, s41, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 8
-; SI-NEXT: v_writelane_b32 v22, s17, 9
+; SI-NEXT: v_writelane_b32 v21, s16, 10
+; SI-NEXT: v_writelane_b32 v21, s17, 11
; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 18
-; SI-NEXT: v_writelane_b32 v22, s17, 19
+; SI-NEXT: v_writelane_b32 v21, s16, 20
+; SI-NEXT: v_writelane_b32 v21, s17, 21
; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 16
-; SI-NEXT: v_writelane_b32 v22, s17, 17
+; SI-NEXT: v_writelane_b32 v21, s16, 18
+; SI-NEXT: v_writelane_b32 v21, s17, 19
; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 8
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 14
-; SI-NEXT: v_writelane_b32 v22, s17, 15
+; SI-NEXT: v_writelane_b32 v21, s16, 16
+; SI-NEXT: v_writelane_b32 v21, s17, 17
; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 24
-; SI-NEXT: v_writelane_b32 v22, s17, 25
+; SI-NEXT: v_writelane_b32 v21, s16, 26
+; SI-NEXT: v_writelane_b32 v21, s17, 27
; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 22
-; SI-NEXT: v_writelane_b32 v22, s17, 23
+; SI-NEXT: v_writelane_b32 v21, s16, 24
+; SI-NEXT: v_writelane_b32 v21, s17, 25
; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 8
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 20
-; SI-NEXT: v_writelane_b32 v22, s17, 21
+; SI-NEXT: v_writelane_b32 v21, s16, 22
+; SI-NEXT: v_writelane_b32 v21, s17, 23
; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 30
-; SI-NEXT: v_writelane_b32 v22, s17, 31
+; SI-NEXT: v_writelane_b32 v21, s16, 32
+; SI-NEXT: v_writelane_b32 v21, s17, 33
; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 28
-; SI-NEXT: v_writelane_b32 v22, s17, 29
+; SI-NEXT: v_writelane_b32 v21, s16, 30
+; SI-NEXT: v_writelane_b32 v21, s17, 31
; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 8
; SI-NEXT: s_add_i32 s10, s10, 0x30000
; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 26
-; SI-NEXT: v_writelane_b32 v22, s17, 27
+; SI-NEXT: v_writelane_b32 v21, s16, 28
+; SI-NEXT: v_writelane_b32 v21, s17, 29
; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 36
-; SI-NEXT: v_writelane_b32 v22, s17, 37
+; SI-NEXT: v_writelane_b32 v21, s16, 38
+; SI-NEXT: v_writelane_b32 v21, s17, 39
; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 34
-; SI-NEXT: v_writelane_b32 v22, s17, 35
+; SI-NEXT: v_writelane_b32 v21, s16, 36
+; SI-NEXT: v_writelane_b32 v21, s17, 37
; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 8
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 32
-; SI-NEXT: v_writelane_b32 v22, s17, 33
+; SI-NEXT: v_writelane_b32 v21, s16, 34
+; SI-NEXT: v_writelane_b32 v21, s17, 35
; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 38
-; SI-NEXT: v_writelane_b32 v22, s17, 39
+; SI-NEXT: v_writelane_b32 v21, s16, 40
+; SI-NEXT: v_writelane_b32 v21, s17, 41
+; SI-NEXT: s_lshr_b32 s16, s89, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 45
+; SI-NEXT: s_lshr_b32 s16, s73, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 46
+; SI-NEXT: s_lshr_b32 s16, s73, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 47
; SI-NEXT: s_lshr_b32 s16, s63, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 41
+; SI-NEXT: v_writelane_b32 v21, s16, 48
; SI-NEXT: s_lshr_b32 s16, s63, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 42
+; SI-NEXT: v_writelane_b32 v21, s16, 49
; SI-NEXT: s_lshr_b32 s16, s59, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 43
+; SI-NEXT: v_writelane_b32 v21, s16, 50
; SI-NEXT: s_lshr_b32 s16, s59, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 44
+; SI-NEXT: v_writelane_b32 v21, s16, 51
; SI-NEXT: s_lshr_b32 s16, s47, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 45
+; SI-NEXT: v_writelane_b32 v21, s16, 52
; SI-NEXT: s_lshr_b32 s16, s47, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 46
+; SI-NEXT: v_writelane_b32 v21, s16, 53
; SI-NEXT: s_lshr_b32 s16, s61, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 47
+; SI-NEXT: v_writelane_b32 v21, s16, 54
; SI-NEXT: s_lshr_b32 s16, s15, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 48
+; SI-NEXT: v_writelane_b32 v21, s16, 55
; SI-NEXT: s_lshr_b32 s16, s13, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 49
+; SI-NEXT: v_writelane_b32 v21, s16, 56
; SI-NEXT: s_lshr_b32 s16, s13, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 50
+; SI-NEXT: v_writelane_b32 v21, s16, 57
; SI-NEXT: s_lshr_b32 s16, s11, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 51
+; SI-NEXT: v_writelane_b32 v21, s16, 58
; SI-NEXT: s_lshr_b32 s16, s11, 16
; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: v_writelane_b32 v21, s16, 0
+; SI-NEXT: v_writelane_b32 v23, s16, 1
; SI-NEXT: s_lshr_b32 s16, s11, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 52
+; SI-NEXT: v_writelane_b32 v21, s16, 59
; SI-NEXT: s_lshr_b32 s16, s9, 24
; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 53
+; SI-NEXT: v_writelane_b32 v21, s16, 60
; SI-NEXT: s_lshr_b32 s16, s9, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 54
+; SI-NEXT: v_writelane_b32 v21, s16, 61
; SI-NEXT: s_lshr_b32 s16, s7, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 62
+; SI-NEXT: s_lshr_b32 s16, s7, 16
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 55
+; SI-NEXT: v_writelane_b32 v23, s16, 0
; SI-NEXT: s_lshr_b32 s16, s7, 8
+; SI-NEXT: s_lshr_b64 s[18:19], s[88:89], 24
; SI-NEXT: s_lshr_b64 s[70:71], s[58:59], 24
; SI-NEXT: s_lshr_b64 s[20:21], s[56:57], 8
-; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s16, 56
+; SI-NEXT: v_writelane_b32 v21, s16, 63
; SI-NEXT: s_lshr_b32 s16, s5, 24
-; SI-NEXT: s_lshr_b64 s[18:19], s[88:89], 24
-; SI-NEXT: s_lshr_b32 s28, s89, 24
; SI-NEXT: s_lshr_b32 s55, s89, 16
-; SI-NEXT: s_lshr_b32 s27, s89, 8
-; SI-NEXT: s_lshr_b32 s23, s73, 24
+; SI-NEXT: s_lshr_b32 s19, s89, 8
; SI-NEXT: s_lshr_b32 s53, s73, 16
-; SI-NEXT: s_lshr_b32 s22, s73, 8
; SI-NEXT: s_lshr_b32 s51, s63, 16
; SI-NEXT: s_lshr_b32 s49, s59, 16
; SI-NEXT: s_lshr_b32 s39, s47, 16
; SI-NEXT: s_lshr_b32 s37, s61, 16
; SI-NEXT: s_lshr_b32 s97, s61, 8
-; SI-NEXT: s_lshr_b32 s26, s57, 24
+; SI-NEXT: s_lshr_b32 s71, s57, 24
; SI-NEXT: s_lshr_b32 s35, s57, 16
; SI-NEXT: s_lshr_b32 s21, s57, 8
; SI-NEXT: s_lshr_b32 s99, s45, 24
-; SI-NEXT: s_lshr_b32 s38, s45, 16
+; SI-NEXT: s_lshr_b32 s86, s45, 16
; SI-NEXT: s_lshr_b32 s69, s45, 8
; SI-NEXT: s_lshr_b32 s67, s43, 24
; SI-NEXT: s_lshr_b32 vcc_hi, s43, 16
@@ -204327,17 +204543,16 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s93, s15, 16
; SI-NEXT: s_lshr_b32 s98, s13, 16
; SI-NEXT: s_lshr_b32 s77, s9, 16
-; SI-NEXT: s_lshr_b32 s71, s7, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 57
+; SI-NEXT: v_writelane_b32 v22, s16, 0
; SI-NEXT: s_lshr_b32 s75, s5, 16
; SI-NEXT: s_lshr_b32 s16, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 58
+; SI-NEXT: v_writelane_b32 v22, s16, 1
; SI-NEXT: .LBB99_5: ; %end
-; SI-NEXT: v_readlane_b32 s24, v21, 28
-; SI-NEXT: v_readlane_b32 s25, v21, 29
+; SI-NEXT: v_readlane_b32 s24, v23, 28
+; SI-NEXT: v_readlane_b32 s25, v23, 29
; SI-NEXT: s_and_b32 s16, s88, 0xff
; SI-NEXT: s_lshl_b32 s17, s24, 8
-; SI-NEXT: v_readlane_b32 s24, v21, 30
+; SI-NEXT: v_readlane_b32 s24, v23, 30
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s24, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
@@ -204347,62 +204562,65 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s89, 0xff
-; SI-NEXT: s_lshl_b32 s17, s27, 8
+; SI-NEXT: s_lshl_b32 s17, s19, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s55, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 45
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s28, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 34
+; SI-NEXT: v_readlane_b32 s18, v23, 34
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 35
+; SI-NEXT: v_readlane_b32 s19, v23, 35
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 36
+; SI-NEXT: v_readlane_b32 s18, v23, 36
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s72, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 37
+; SI-NEXT: v_readlane_b32 s19, v23, 37
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 38
+; SI-NEXT: v_readlane_b32 s18, v23, 38
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v21, 47
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s73, 0xff
-; SI-NEXT: s_lshl_b32 s17, s22, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s53, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 39
+; SI-NEXT: v_readlane_b32 s18, v21, 46
+; SI-NEXT: v_readlane_b32 s19, v23, 39
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s23, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 40
+; SI-NEXT: v_readlane_b32 s18, v23, 40
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 41
+; SI-NEXT: v_readlane_b32 s19, v23, 41
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 42
+; SI-NEXT: v_readlane_b32 s18, v23, 42
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s62, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 43
+; SI-NEXT: v_readlane_b32 s19, v23, 43
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 44
+; SI-NEXT: v_readlane_b32 s18, v23, 44
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 42
+; SI-NEXT: v_readlane_b32 s17, v21, 49
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
@@ -204410,21 +204628,21 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s51, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 41
-; SI-NEXT: v_readlane_b32 s19, v21, 45
+; SI-NEXT: v_readlane_b32 s18, v21, 48
+; SI-NEXT: v_readlane_b32 s19, v23, 45
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 46
+; SI-NEXT: v_readlane_b32 s18, v23, 46
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s19, v21, 47
+; SI-NEXT: v_readlane_b32 s19, v23, 47
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s58, 0xff
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 48
+; SI-NEXT: v_readlane_b32 s18, v23, 48
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
@@ -204432,7 +204650,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 44
+; SI-NEXT: v_readlane_b32 s17, v21, 51
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
@@ -204440,31 +204658,31 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s49, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 43
-; SI-NEXT: v_readlane_b32 s19, v21, 49
+; SI-NEXT: v_readlane_b32 s18, v21, 50
+; SI-NEXT: v_readlane_b32 s19, v23, 49
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 50
+; SI-NEXT: v_readlane_b32 s18, v23, 52
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 51
+; SI-NEXT: v_readlane_b32 s19, v23, 53
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 52
+; SI-NEXT: v_readlane_b32 s18, v23, 54
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s46, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 53
+; SI-NEXT: v_readlane_b32 s19, v23, 55
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 54
+; SI-NEXT: v_readlane_b32 s18, v23, 56
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 46
+; SI-NEXT: v_readlane_b32 s17, v21, 53
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
@@ -204472,25 +204690,25 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s39, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 45
-; SI-NEXT: v_readlane_b32 s19, v21, 55
+; SI-NEXT: v_readlane_b32 s18, v21, 52
+; SI-NEXT: v_readlane_b32 s19, v23, 57
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 56
+; SI-NEXT: v_readlane_b32 s18, v23, 58
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 57
+; SI-NEXT: v_readlane_b32 s19, v23, 59
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 58
+; SI-NEXT: v_readlane_b32 s18, v23, 60
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s60, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 59
+; SI-NEXT: v_readlane_b32 s19, v23, 61
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 60
+; SI-NEXT: v_readlane_b32 s18, v23, 62
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -204503,23 +204721,23 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s97, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s37, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 47
+; SI-NEXT: v_readlane_b32 s18, v21, 54
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: v_readlane_b32 s19, v21, 61
+; SI-NEXT: v_readlane_b32 s19, v23, 63
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 62
+; SI-NEXT: v_readlane_b32 s18, v21, 0
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s56, 0xff
; SI-NEXT: s_lshl_b32 s17, s20, 8
-; SI-NEXT: v_readlane_b32 s19, v21, 63
+; SI-NEXT: v_readlane_b32 s19, v21, 1
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 0
+; SI-NEXT: v_readlane_b32 s18, v21, 2
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -204532,24 +204750,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s21, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s35, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 1
+; SI-NEXT: v_readlane_b32 s19, v21, 3
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s26, 24
+; SI-NEXT: s_lshl_b32 s18, s71, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 2
+; SI-NEXT: v_readlane_b32 s18, v21, 4
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 3
+; SI-NEXT: v_readlane_b32 s19, v21, 5
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 4
+; SI-NEXT: v_readlane_b32 s18, v21, 6
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s44, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 5
+; SI-NEXT: v_readlane_b32 s19, v21, 7
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 6
+; SI-NEXT: v_readlane_b32 s18, v21, 8
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -204561,25 +204779,25 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s45, 0xff
; SI-NEXT: s_lshl_b32 s17, s69, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s38, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 7
+; SI-NEXT: s_and_b32 s17, s86, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 9
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s99, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 8
+; SI-NEXT: v_readlane_b32 s18, v21, 10
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 9
+; SI-NEXT: v_readlane_b32 s19, v21, 11
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 10
+; SI-NEXT: v_readlane_b32 s18, v21, 12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 11
+; SI-NEXT: v_readlane_b32 s19, v21, 13
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 12
+; SI-NEXT: v_readlane_b32 s18, v21, 14
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -204592,24 +204810,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s31, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, vcc_hi, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 13
+; SI-NEXT: v_readlane_b32 s19, v21, 15
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s67, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 14
+; SI-NEXT: v_readlane_b32 s18, v21, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 15
+; SI-NEXT: v_readlane_b32 s19, v21, 17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 16
+; SI-NEXT: v_readlane_b32 s18, v21, 18
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 17
+; SI-NEXT: v_readlane_b32 s19, v21, 19
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 18
+; SI-NEXT: v_readlane_b32 s18, v21, 20
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -204630,16 +204848,16 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 20
+; SI-NEXT: v_readlane_b32 s16, v21, 22
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v22, 21
+; SI-NEXT: v_readlane_b32 s17, v21, 23
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 19
+; SI-NEXT: v_readlane_b32 s19, v21, 21
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 22
-; SI-NEXT: v_readlane_b32 s17, v22, 23
+; SI-NEXT: v_readlane_b32 s16, v21, 24
+; SI-NEXT: v_readlane_b32 s17, v21, 25
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 24
+; SI-NEXT: v_readlane_b32 s18, v21, 26
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
@@ -204648,7 +204866,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 48
+; SI-NEXT: v_readlane_b32 s14, v21, 55
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s14, s15, s14
@@ -204661,15 +204879,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 26
+; SI-NEXT: v_readlane_b32 s14, v21, 28
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 27
+; SI-NEXT: v_readlane_b32 s15, v21, 29
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 28
-; SI-NEXT: v_readlane_b32 s15, v22, 29
+; SI-NEXT: v_readlane_b32 s14, v21, 30
+; SI-NEXT: v_readlane_b32 s15, v21, 31
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 30
+; SI-NEXT: v_readlane_b32 s16, v21, 32
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -204678,29 +204896,29 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 50
+; SI-NEXT: v_readlane_b32 s12, v21, 57
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s12, 0xffff
; SI-NEXT: s_and_b32 s12, s98, 0xff
; SI-NEXT: s_lshl_b32 s14, s12, 16
-; SI-NEXT: v_readlane_b32 s12, v22, 49
+; SI-NEXT: v_readlane_b32 s12, v21, 56
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 32
+; SI-NEXT: v_readlane_b32 s12, v21, 34
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 33
+; SI-NEXT: v_readlane_b32 s13, v21, 35
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 34
-; SI-NEXT: v_readlane_b32 s13, v22, 35
+; SI-NEXT: v_readlane_b32 s12, v21, 36
+; SI-NEXT: v_readlane_b32 s13, v21, 37
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 36
+; SI-NEXT: v_readlane_b32 s14, v21, 38
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
@@ -204709,15 +204927,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 52
+; SI-NEXT: v_readlane_b32 s10, v21, 59
; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s10, 0xffff
-; SI-NEXT: v_readlane_b32 s10, v21, 0
+; SI-NEXT: v_readlane_b32 s10, v23, 1
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s12, s10, 16
-; SI-NEXT: v_readlane_b32 s10, v22, 51
+; SI-NEXT: v_readlane_b32 s10, v21, 58
; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_or_b32 s10, s10, s12
; SI-NEXT: s_or_b32 s10, s11, s10
@@ -204727,23 +204945,23 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s10, s68, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: s_and_b32 s10, s30, 0xff
+; SI-NEXT: s_and_b32 s10, s66, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s66, 24
+; SI-NEXT: s_lshl_b32 s11, s30, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
-; SI-NEXT: v_readlane_b32 s8, v22, 54
+; SI-NEXT: v_readlane_b32 s8, v21, 61
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s8, 0xffff
; SI-NEXT: s_and_b32 s8, s77, 0xff
; SI-NEXT: s_lshl_b32 s10, s8, 16
-; SI-NEXT: v_readlane_b32 s8, v22, 53
+; SI-NEXT: v_readlane_b32 s8, v21, 60
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: s_or_b32 s8, s9, s8
@@ -204762,14 +204980,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 56
+; SI-NEXT: v_readlane_b32 s6, v21, 63
; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s6, 0xffff
-; SI-NEXT: s_and_b32 s6, s71, 0xff
+; SI-NEXT: v_readlane_b32 s6, v23, 0
+; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s8, s6, 16
-; SI-NEXT: v_readlane_b32 s6, v22, 55
+; SI-NEXT: v_readlane_b32 s6, v21, 62
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_or_b32 s6, s7, s6
@@ -204780,7 +204999,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s6, s96, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s64, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 38
+; SI-NEXT: v_readlane_b32 s8, v21, 40
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
@@ -204789,14 +205008,14 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s4, v22, 58
+; SI-NEXT: v_readlane_b32 s4, v22, 1
; SI-NEXT: s_and_b32 s5, s5, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 8
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s4, 0xffff
; SI-NEXT: s_and_b32 s4, s75, 0xff
; SI-NEXT: s_lshl_b32 s6, s4, 16
-; SI-NEXT: v_readlane_b32 s4, v22, 57
+; SI-NEXT: v_readlane_b32 s4, v22, 0
; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_or_b32 s4, s5, s4
@@ -204804,11 +205023,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s25, v21, 31
-; SI-NEXT: v_readlane_b32 s19, v22, 25
-; SI-NEXT: v_readlane_b32 s17, v22, 31
-; SI-NEXT: v_readlane_b32 s15, v22, 37
-; SI-NEXT: v_readlane_b32 s9, v22, 39
+; SI-NEXT: v_readlane_b32 s25, v23, 31
+; SI-NEXT: v_readlane_b32 s19, v21, 27
+; SI-NEXT: v_readlane_b32 s17, v21, 33
+; SI-NEXT: v_readlane_b32 s15, v21, 39
+; SI-NEXT: v_readlane_b32 s9, v21, 41
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
@@ -204849,6 +205068,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -204894,8 +205114,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v32, s30, 30
; VI-NEXT: v_writelane_b32 v32, s31, 31
; VI-NEXT: v_readfirstlane_b32 s44, v19
-; VI-NEXT: v_readfirstlane_b32 s5, v18
-; VI-NEXT: v_readfirstlane_b32 s4, v17
+; VI-NEXT: v_readfirstlane_b32 s51, v18
+; VI-NEXT: v_readfirstlane_b32 s50, v17
; VI-NEXT: v_readfirstlane_b32 s7, v16
; VI-NEXT: v_readfirstlane_b32 s6, v15
; VI-NEXT: v_readfirstlane_b32 s9, v14
@@ -204918,151 +205138,151 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB99_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 63
+; VI-NEXT: v_writelane_b32 v33, s46, 62
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: v_writelane_b32 v33, s46, 63
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 1
+; VI-NEXT: v_writelane_b32 v34, s46, 0
; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: v_writelane_b32 v33, s46, 19
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s46, 21
; VI-NEXT: s_lshr_b32 s46, s29, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s28, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s27, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 3
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s24, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s23, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s21, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s20, 8
; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s19, 8
; VI-NEXT: v_writelane_b32 v33, s46, 56
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: v_writelane_b32 v34, s46, 1
; VI-NEXT: s_lshr_b32 s46, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 61
+; VI-NEXT: v_writelane_b32 v33, s46, 60
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 62
-; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 33
-; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 34
-; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 6
-; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 7
-; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 61
+; VI-NEXT: s_lshr_b32 s46, s51, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s51, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: s_lshr_b32 s46, s51, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 3
+; VI-NEXT: s_lshr_b32 s46, s50, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: s_lshr_b32 s46, s50, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 7
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 9
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: v_writelane_b32 v34, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: v_writelane_b32 v34, s46, 12
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 14
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: v_writelane_b32 v34, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 17
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: v_writelane_b32 v34, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: v_writelane_b32 v34, s46, 19
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: v_writelane_b32 v34, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: v_writelane_b32 v34, s46, 22
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: v_writelane_b32 v34, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: v_writelane_b32 v34, s46, 24
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: v_writelane_b32 v34, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: v_writelane_b32 v34, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: v_writelane_b32 v34, s46, 27
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: v_writelane_b32 v34, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: v_writelane_b32 v34, s46, 29
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: v_writelane_b32 v34, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: v_writelane_b32 v34, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: v_writelane_b32 v34, s46, 32
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v34, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 16
; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s40, 8
@@ -205074,42 +205294,38 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s46, s43, 8
; VI-NEXT: v_writelane_b32 v33, s46, 57
; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 59
+; VI-NEXT: v_writelane_b32 v33, s46, 58
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 60
-; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
-; VI-NEXT: v_writelane_b32 v33, s46, 4
-; VI-NEXT: v_writelane_b32 v33, s47, 5
-; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
-; VI-NEXT: v_writelane_b32 v33, s46, 2
-; VI-NEXT: v_writelane_b32 v33, s47, 3
-; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 59
+; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: v_writelane_b32 v33, s47, 1
-; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s46, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 17
-; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
-; VI-NEXT: v_writelane_b32 v33, s46, 14
-; VI-NEXT: v_writelane_b32 v33, s47, 15
-; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[50:51], 24
; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: v_writelane_b32 v33, s47, 13
-; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: v_writelane_b32 v33, s47, 11
-; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: v_writelane_b32 v33, s47, 9
-; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; VI-NEXT: v_writelane_b32 v33, s46, 6
-; VI-NEXT: s_lshr_b64 s[74:75], s[44:45], 24
-; VI-NEXT: s_lshr_b64 s[90:91], s[28:29], 24
-; VI-NEXT: s_lshr_b64 vcc, s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[88:89], s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
; VI-NEXT: v_writelane_b32 v33, s47, 7
-; VI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 4
+; VI-NEXT: v_writelane_b32 v33, s47, 5
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: s_lshr_b64 s[56:57], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[52:53], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[54:55], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[88:89], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v33, s47, 3
+; VI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
; VI-NEXT: s_mov_b64 s[48:49], 0
; VI-NEXT: s_branch .LBB99_3
@@ -205119,13 +205335,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr30
; VI-NEXT: ; implicit-def: $sgpr88
-; VI-NEXT: ; implicit-def: $vcc_lo
-; VI-NEXT: ; implicit-def: $sgpr90
-; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr54
+; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr4
; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr76
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
@@ -205303,71 +205521,64 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: v_writelane_b32 v33, s47, 13
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: v_writelane_b32 v33, s46, 14
-; VI-NEXT: v_writelane_b32 v33, s47, 15
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: v_writelane_b32 v33, s46, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 17
; VI-NEXT: .LBB99_3: ; %Flow
-; VI-NEXT: v_writelane_b32 v33, s56, 18
-; VI-NEXT: v_writelane_b32 v33, s57, 19
-; VI-NEXT: v_readlane_b32 s50, v33, 16
-; VI-NEXT: v_readlane_b32 s51, v33, 17
+; VI-NEXT: v_writelane_b32 v33, s4, 14
+; VI-NEXT: v_writelane_b32 v33, s5, 15
+; VI-NEXT: v_writelane_b32 v33, s56, 16
; VI-NEXT: s_and_b64 s[46:47], s[48:49], exec
-; VI-NEXT: s_mov_b32 s34, s50
-; VI-NEXT: v_readlane_b32 s50, v33, 12
+; VI-NEXT: v_writelane_b32 v33, s57, 17
; VI-NEXT: s_cselect_b32 s46, 1, 0
-; VI-NEXT: v_readlane_b32 s51, v33, 13
; VI-NEXT: s_cmp_lg_u32 s46, 1
-; VI-NEXT: v_readlane_b32 s31, v33, 20
-; VI-NEXT: v_readlane_b32 s89, v33, 21
-; VI-NEXT: v_readlane_b32 s52, v33, 22
-; VI-NEXT: v_readlane_b32 s46, v33, 23
-; VI-NEXT: v_readlane_b32 s53, v33, 24
-; VI-NEXT: v_readlane_b32 s56, v33, 25
-; VI-NEXT: v_readlane_b32 s57, v33, 26
-; VI-NEXT: v_readlane_b32 s54, v33, 27
-; VI-NEXT: v_readlane_b32 s58, v33, 28
-; VI-NEXT: v_readlane_b32 s64, v33, 29
-; VI-NEXT: v_readlane_b32 s65, v33, 30
-; VI-NEXT: v_readlane_b32 s68, v33, 31
-; VI-NEXT: v_readlane_b32 s67, v33, 32
-; VI-NEXT: v_readlane_b32 s77, v33, 33
-; VI-NEXT: v_readlane_b32 s79, v33, 34
-; VI-NEXT: v_readlane_b32 s69, v33, 35
-; VI-NEXT: v_readlane_b32 s70, v33, 36
-; VI-NEXT: v_readlane_b32 s60, v33, 37
-; VI-NEXT: v_readlane_b32 s59, v33, 38
-; VI-NEXT: v_readlane_b32 s62, v33, 39
-; VI-NEXT: v_readlane_b32 s63, v33, 40
-; VI-NEXT: v_readlane_b32 s80, v33, 41
-; VI-NEXT: v_readlane_b32 s83, v33, 42
-; VI-NEXT: v_readlane_b32 s82, v33, 43
-; VI-NEXT: v_readlane_b32 s36, v33, 44
-; VI-NEXT: v_readlane_b32 s35, v33, 45
-; VI-NEXT: v_readlane_b32 s55, v33, 46
-; VI-NEXT: v_readlane_b32 s47, v33, 47
-; VI-NEXT: v_readlane_b32 s81, v33, 48
-; VI-NEXT: v_readlane_b32 s37, v33, 49
-; VI-NEXT: v_readlane_b32 s38, v33, 50
-; VI-NEXT: v_readlane_b32 s39, v33, 51
-; VI-NEXT: v_readlane_b32 s71, v33, 52
-; VI-NEXT: v_readlane_b32 s75, v33, 53
-; VI-NEXT: v_readlane_b32 s91, v33, 54
-; VI-NEXT: v_readlane_b32 s61, v33, 55
-; VI-NEXT: v_readlane_b32 s86, v33, 56
-; VI-NEXT: v_readlane_b32 vcc_hi, v33, 57
-; VI-NEXT: v_readlane_b32 s72, v33, 58
-; VI-NEXT: v_readlane_b32 s66, v33, 59
-; VI-NEXT: v_readlane_b32 s85, v33, 60
-; VI-NEXT: v_readlane_b32 s73, v33, 61
-; VI-NEXT: v_readlane_b32 s87, v33, 62
-; VI-NEXT: s_mov_b32 s84, s50
-; VI-NEXT: v_readlane_b32 s50, v33, 6
-; VI-NEXT: v_readlane_b32 s48, v33, 2
-; VI-NEXT: v_readlane_b32 s51, v33, 7
-; VI-NEXT: v_readlane_b32 s49, v33, 3
+; VI-NEXT: v_readlane_b32 s46, v33, 10
+; VI-NEXT: v_readlane_b32 s89, v33, 18
+; VI-NEXT: v_readlane_b32 s57, v33, 19
+; VI-NEXT: v_readlane_b32 s72, v33, 20
+; VI-NEXT: v_readlane_b32 s56, v33, 21
+; VI-NEXT: v_readlane_b32 s39, v33, 22
+; VI-NEXT: v_readlane_b32 s64, v33, 23
+; VI-NEXT: v_readlane_b32 s75, v33, 24
+; VI-NEXT: v_readlane_b32 s65, v33, 25
+; VI-NEXT: v_readlane_b32 s67, v33, 26
+; VI-NEXT: v_readlane_b32 s66, v33, 27
+; VI-NEXT: v_readlane_b32 s68, v33, 28
+; VI-NEXT: v_readlane_b32 s74, v33, 29
+; VI-NEXT: v_readlane_b32 s69, v33, 30
+; VI-NEXT: v_readlane_b32 s49, v33, 31
+; VI-NEXT: v_readlane_b32 s62, v33, 32
+; VI-NEXT: v_readlane_b32 s70, v33, 33
+; VI-NEXT: v_readlane_b32 s63, v33, 34
+; VI-NEXT: v_readlane_b32 s71, v33, 35
+; VI-NEXT: v_readlane_b32 s82, v33, 36
+; VI-NEXT: v_readlane_b32 s81, v33, 37
+; VI-NEXT: v_readlane_b32 s83, v33, 38
+; VI-NEXT: v_readlane_b32 s85, v33, 39
+; VI-NEXT: v_readlane_b32 s84, v33, 40
+; VI-NEXT: v_readlane_b32 s60, v33, 41
+; VI-NEXT: v_readlane_b32 s73, v33, 42
+; VI-NEXT: v_readlane_b32 vcc_lo, v33, 43
+; VI-NEXT: v_readlane_b32 s59, v33, 44
+; VI-NEXT: v_readlane_b32 s36, v33, 45
+; VI-NEXT: v_readlane_b32 s30, v33, 46
+; VI-NEXT: v_readlane_b32 s53, v33, 47
+; VI-NEXT: v_readlane_b32 s55, v33, 48
+; VI-NEXT: v_readlane_b32 s86, v33, 49
+; VI-NEXT: v_readlane_b32 s80, v33, 50
+; VI-NEXT: v_readlane_b32 s87, v33, 51
+; VI-NEXT: v_readlane_b32 s61, v33, 52
+; VI-NEXT: v_readlane_b32 vcc_hi, v33, 53
+; VI-NEXT: v_readlane_b32 s35, v33, 54
+; VI-NEXT: v_readlane_b32 s31, v33, 55
+; VI-NEXT: v_readlane_b32 s48, v33, 56
+; VI-NEXT: v_readlane_b32 s37, v33, 57
+; VI-NEXT: v_readlane_b32 s79, v33, 58
+; VI-NEXT: v_readlane_b32 s58, v33, 59
+; VI-NEXT: v_readlane_b32 s4, v33, 60
+; VI-NEXT: v_readlane_b32 s5, v33, 61
+; VI-NEXT: s_mov_b32 s90, s46
+; VI-NEXT: s_mov_b32 s46, s76
+; VI-NEXT: v_readlane_b32 s76, v33, 0
+; VI-NEXT: v_readlane_b32 s47, v33, 11
+; VI-NEXT: v_readlane_b32 s77, v33, 1
; VI-NEXT: s_cbranch_scc1 .LBB99_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_and_b32 s46, s43, 0xffff0000
@@ -205425,13 +205636,13 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s46, s6, 0xffff0000
; VI-NEXT: s_add_i32 s6, s6, 3
; VI-NEXT: s_and_b32 s6, s6, 0xffff
+; VI-NEXT: s_add_i32 s5, s51, 3
; VI-NEXT: s_or_b32 s6, s46, s6
-; VI-NEXT: s_and_b32 s46, s5, 0xffff0000
-; VI-NEXT: s_add_i32 s5, s5, 3
+; VI-NEXT: s_and_b32 s46, s51, 0xffff0000
; VI-NEXT: s_and_b32 s5, s5, 0xffff
+; VI-NEXT: s_add_i32 s4, s50, 3
; VI-NEXT: s_or_b32 s5, s46, s5
-; VI-NEXT: s_and_b32 s46, s4, 0xffff0000
-; VI-NEXT: s_add_i32 s4, s4, 3
+; VI-NEXT: s_and_b32 s46, s50, 0xffff0000
; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_or_b32 s4, s46, s4
; VI-NEXT: s_and_b32 s46, s17, 0xffff0000
@@ -205500,478 +205711,474 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s44, s44, 0xffff
; VI-NEXT: s_or_b32 s44, s46, s44
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 63
+; VI-NEXT: v_writelane_b32 v33, s46, 62
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: s_add_i32 s44, s44, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: s_add_i32 s18, s18, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 63
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: s_add_i32 s29, s29, 0x30000
+; VI-NEXT: s_add_i32 s51, s5, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: s_lshr_b32 s46, s18, 8
; VI-NEXT: v_writelane_b32 v34, s46, 1
-; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: s_add_i32 s27, s27, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 20
-; VI-NEXT: s_lshr_b32 s46, s29, 8
-; VI-NEXT: s_add_i32 s26, s26, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 44
-; VI-NEXT: s_lshr_b32 s46, s27, 8
-; VI-NEXT: s_add_i32 s25, s25, 0x30000
+; VI-NEXT: s_lshr_b32 s46, s51, 16
+; VI-NEXT: s_add_i32 s50, s4, 0x30000
; VI-NEXT: v_writelane_b32 v34, s46, 2
-; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: s_add_i32 s24, s24, 0x30000
+; VI-NEXT: s_lshr_b32 s46, s51, 8
; VI-NEXT: v_writelane_b32 v34, s46, 3
-; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: s_add_i32 s5, s5, 0x30000
+; VI-NEXT: s_lshr_b32 s46, s50, 16
+; VI-NEXT: s_add_i32 s7, s7, 0x30000
; VI-NEXT: v_writelane_b32 v34, s46, 4
-; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: s_lshr_b32 s46, s50, 8
; VI-NEXT: v_writelane_b32 v34, s46, 5
-; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: s_add_i32 s4, s4, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 34
-; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 6
-; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: s_add_i32 s7, s7, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 7
-; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: s_add_i32 s6, s6, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 7
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: s_add_i32 s9, s9, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 9
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: v_writelane_b32 v34, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 16
; VI-NEXT: s_add_i32 s8, s8, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: v_writelane_b32 v34, s46, 12
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 16
; VI-NEXT: s_add_i32 s11, s11, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 14
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: v_writelane_b32 v34, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 16
; VI-NEXT: s_add_i32 s10, s10, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 17
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: v_writelane_b32 v34, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 16
; VI-NEXT: s_add_i32 s13, s13, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: v_writelane_b32 v34, s46, 19
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: v_writelane_b32 v34, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: s_add_i32 s29, s29, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 16
; VI-NEXT: s_add_i32 s12, s12, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: s_add_i32 s21, s21, 0x30000
+; VI-NEXT: s_lshr_b32 s4, s29, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 22
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: s_add_i32 s44, s44, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s4, 41
+; VI-NEXT: s_lshr_b32 s4, s21, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 16
; VI-NEXT: s_add_i32 s15, s15, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s4, 50
+; VI-NEXT: v_writelane_b32 v34, s46, 24
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: s_add_i32 s21, s21, 0x30000
-; VI-NEXT: s_add_i32 s20, s20, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; VI-NEXT: s_add_i32 s27, s27, 0x30000
+; VI-NEXT: s_add_i32 s26, s26, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s88, 16
+; VI-NEXT: s_add_i32 s20, s20, 0x30000
+; VI-NEXT: s_add_i32 s23, s23, 0x30000
+; VI-NEXT: s_add_i32 s25, s25, 0x30000
+; VI-NEXT: s_add_i32 s24, s24, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: s_lshr_b64 s[48:49], s[20:21], 24
+; VI-NEXT: v_writelane_b32 v33, s89, 17
+; VI-NEXT: s_lshr_b64 s[88:89], s[26:27], 24
; VI-NEXT: s_add_i32 s14, s14, 0x30000
-; VI-NEXT: s_add_i32 s17, s17, 0x30000
-; VI-NEXT: s_add_i32 s16, s16, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: s_lshr_b32 s72, s24, 8
+; VI-NEXT: s_lshr_b32 s73, s23, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 27
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s48, 4
-; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s88, 14
+; VI-NEXT: s_lshr_b64 s[52:53], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[54:55], s[20:21], 24
+; VI-NEXT: s_add_i32 s19, s19, 0x30000
+; VI-NEXT: s_add_i32 s28, s28, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s49, 5
-; VI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v33, s89, 15
+; VI-NEXT: s_mov_b32 s53, s72
+; VI-NEXT: s_mov_b32 s55, s73
+; VI-NEXT: s_lshr_b64 s[72:73], s[50:51], 24
; VI-NEXT: s_add_i32 s41, s41, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s60, s29, 24
+; VI-NEXT: s_lshr_b32 s61, s28, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 29
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s34, 0
-; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
+; VI-NEXT: v_writelane_b32 v33, s72, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s35, 1
-; VI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
-; VI-NEXT: s_add_i32 s42, s42, 0x30000
-; VI-NEXT: s_add_i32 s40, s40, 0x30000
-; VI-NEXT: s_add_i32 s28, s28, 0x30000
-; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s73, 13
+; VI-NEXT: s_mov_b32 s39, s61
+; VI-NEXT: s_mov_b32 s72, s60
+; VI-NEXT: s_lshr_b64 s[60:61], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: s_lshr_b64 s[84:85], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s34, 14
-; VI-NEXT: s_add_i32 s23, s23, 0x30000
-; VI-NEXT: s_add_i32 s22, s22, 0x30000
-; VI-NEXT: s_lshr_b32 s59, s29, 16
-; VI-NEXT: s_lshr_b32 s66, s28, 8
-; VI-NEXT: s_lshr_b32 s76, s20, 16
-; VI-NEXT: s_lshr_b32 s55, s16, 16
-; VI-NEXT: v_writelane_b32 v34, s46, 35
-; VI-NEXT: s_lshr_b32 s77, s40, 16
-; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: s_lshr_b32 s71, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s35, 15
-; VI-NEXT: s_mov_b32 s34, s84
-; VI-NEXT: s_lshr_b64 s[84:85], s[8:9], 24
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
-; VI-NEXT: s_mov_b32 s35, s55
-; VI-NEXT: s_mov_b32 s55, s66
-; VI-NEXT: s_mov_b32 s66, s46
-; VI-NEXT: s_mov_b32 s46, s59
-; VI-NEXT: s_mov_b32 s85, s71
-; VI-NEXT: s_mov_b32 s71, s77
-; VI-NEXT: s_mov_b32 s59, s76
-; VI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
-; VI-NEXT: v_readlane_b32 s31, v33, 20
-; VI-NEXT: v_writelane_b32 v33, s76, 10
-; VI-NEXT: v_writelane_b32 v33, s77, 11
-; VI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
-; VI-NEXT: v_writelane_b32 v33, s76, 8
+; VI-NEXT: v_writelane_b32 v33, s60, 8
+; VI-NEXT: s_add_i32 s40, s40, 0x30000
+; VI-NEXT: s_add_i32 s17, s17, 0x30000
+; VI-NEXT: s_add_i32 s16, s16, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: v_writelane_b32 v33, s61, 9
+; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
+; VI-NEXT: s_lshr_b32 s47, s44, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: s_lshr_b64 s[88:89], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v33, s60, 6
+; VI-NEXT: s_mov_b32 s89, s47
+; VI-NEXT: v_writelane_b32 v33, s61, 7
+; VI-NEXT: s_mov_b32 s61, s46
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: v_readlane_b32 s60, v33, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: s_add_i32 s43, s43, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s77, 9
-; VI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; VI-NEXT: s_add_i32 s22, s22, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s47, 5
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: s_add_i32 s42, s42, 0x30000
+; VI-NEXT: s_lshr_b32 s5, s23, 24
+; VI-NEXT: s_lshr_b32 s74, s16, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s16, 8
; VI-NEXT: s_lshr_b32 s78, s40, 8
; VI-NEXT: s_lshr_b32 s79, s43, 24
-; VI-NEXT: s_lshr_b64 s[74:75], s[44:45], 24
-; VI-NEXT: s_lshr_b64 s[90:91], s[28:29], 24
-; VI-NEXT: v_writelane_b32 v33, s76, 18
-; VI-NEXT: s_add_i32 s19, s19, 0x30000
-; VI-NEXT: s_add_i32 s18, s18, 0x30000
-; VI-NEXT: s_lshr_b32 s58, s44, 8
-; VI-NEXT: s_lshr_b32 s61, s25, 24
-; VI-NEXT: s_lshr_b32 s36, s5, 24
-; VI-NEXT: s_lshr_b32 s50, s43, 16
-; VI-NEXT: s_lshr_b32 s51, s43, 8
-; VI-NEXT: s_lshr_b64 vcc, s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[88:89], s[24:25], 24
-; VI-NEXT: s_mov_b32 s75, s78
-; VI-NEXT: s_mov_b32 s91, s79
-; VI-NEXT: v_writelane_b32 v33, s77, 19
+; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: s_lshr_b32 s80, s42, 16
+; VI-NEXT: s_mov_b32 s73, s74
+; VI-NEXT: s_mov_b32 s74, s5
+; VI-NEXT: s_mov_b32 s5, vcc_hi
+; VI-NEXT: s_mov_b32 s35, s79
+; VI-NEXT: s_mov_b32 vcc_hi, s78
+; VI-NEXT: v_writelane_b32 v33, s47, 3
; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
-; VI-NEXT: s_lshr_b32 s52, s29, 24
-; VI-NEXT: s_lshr_b32 s53, s28, 16
-; VI-NEXT: s_lshr_b32 s56, s27, 24
-; VI-NEXT: s_lshr_b32 s57, s27, 16
-; VI-NEXT: s_lshr_b32 s54, s26, 16
-; VI-NEXT: s_lshr_b32 s64, s25, 16
-; VI-NEXT: s_lshr_b32 s65, s24, 16
-; VI-NEXT: s_lshr_b32 s68, s23, 24
-; VI-NEXT: s_lshr_b32 s67, s23, 16
-; VI-NEXT: s_lshr_b32 s47, s23, 8
-; VI-NEXT: s_lshr_b32 s69, s22, 16
-; VI-NEXT: s_lshr_b32 s81, s22, 8
+; VI-NEXT: s_lshr_b32 s57, s44, 8
+; VI-NEXT: s_lshr_b32 s56, s29, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s28, 8
+; VI-NEXT: s_lshr_b32 s64, s27, 24
+; VI-NEXT: s_lshr_b32 s75, s27, 16
+; VI-NEXT: s_lshr_b32 s59, s27, 8
+; VI-NEXT: s_lshr_b32 s65, s26, 16
+; VI-NEXT: s_lshr_b32 s36, s26, 8
+; VI-NEXT: s_lshr_b32 s67, s25, 24
+; VI-NEXT: s_lshr_b32 s66, s25, 16
+; VI-NEXT: s_lshr_b32 s30, s25, 8
+; VI-NEXT: s_lshr_b32 s68, s24, 16
+; VI-NEXT: s_lshr_b32 s69, s23, 16
+; VI-NEXT: s_lshr_b32 s62, s22, 16
+; VI-NEXT: s_lshr_b32 s86, s22, 8
; VI-NEXT: s_lshr_b32 s70, s21, 24
-; VI-NEXT: s_lshr_b32 s60, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s62, s19, 24
-; VI-NEXT: s_lshr_b32 s63, s19, 16
-; VI-NEXT: s_lshr_b32 s86, s19, 8
-; VI-NEXT: s_lshr_b32 s80, s18, 16
-; VI-NEXT: s_lshr_b32 s72, s18, 8
-; VI-NEXT: s_lshr_b32 s83, s17, 24
-; VI-NEXT: s_lshr_b32 s82, s17, 16
-; VI-NEXT: s_lshr_b32 s73, s17, 8
-; VI-NEXT: s_lshr_b32 s87, s16, 8
-; VI-NEXT: s_lshr_b32 s38, s41, 8
-; VI-NEXT: s_lshr_b64 s[48:49], s[18:19], 24
-; VI-NEXT: s_mov_b32 s89, s58
-; VI-NEXT: s_mov_b32 s58, s61
-; VI-NEXT: s_mov_b32 vcc_hi, s51
-; VI-NEXT: s_mov_b32 s61, s50
-; VI-NEXT: s_lshr_b64 s[50:51], s[14:15], 24
-; VI-NEXT: s_mov_b32 s77, s36
-; VI-NEXT: v_readlane_b32 s36, v33, 44
-; VI-NEXT: v_readlane_b32 s79, v33, 34
+; VI-NEXT: s_lshr_b32 s63, s21, 16
+; VI-NEXT: s_lshr_b32 s71, s20, 16
+; VI-NEXT: s_lshr_b32 s87, s20, 8
+; VI-NEXT: s_lshr_b32 s82, s19, 24
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s83, s18, 16
+; VI-NEXT: s_lshr_b32 s85, s17, 24
+; VI-NEXT: s_lshr_b32 s84, s17, 16
+; VI-NEXT: s_lshr_b32 s4, s17, 8
+; VI-NEXT: s_lshr_b32 s49, s51, 24
+; VI-NEXT: s_lshr_b32 s31, s43, 16
+; VI-NEXT: s_lshr_b32 s37, s43, 8
+; VI-NEXT: s_lshr_b32 s58, s42, 8
+; VI-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[90:91], s[6:7], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; VI-NEXT: s_mov_b32 s79, s80
+; VI-NEXT: v_readlane_b32 s80, v33, 50
; VI-NEXT: .LBB99_5: ; %end
-; VI-NEXT: s_mov_b32 s76, s50
-; VI-NEXT: v_readlane_b32 s50, v33, 0
-; VI-NEXT: v_mov_b32_e32 v6, s50
+; VI-NEXT: v_mov_b32_e32 v6, s88
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v2, s87
-; VI-NEXT: v_perm_b32 v6, s35, v6, v1
+; VI-NEXT: v_mov_b32_e32 v2, s5
+; VI-NEXT: v_perm_b32 v6, s73, v6, v1
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
-; VI-NEXT: v_mov_b32_e32 v24, s83
+; VI-NEXT: v_mov_b32_e32 v24, s85
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_mov_b32_e32 v4, s73
-; VI-NEXT: v_perm_b32 v24, s82, v24, v1
+; VI-NEXT: v_mov_b32_e32 v4, s4
+; VI-NEXT: v_perm_b32 v24, s84, v24, v1
; VI-NEXT: v_or_b32_e32 v3, v3, v6
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
-; VI-NEXT: v_mov_b32_e32 v9, s48
+; VI-NEXT: v_mov_b32_e32 v10, s38
+; VI-NEXT: v_readlane_b32 s16, v34, 1
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_mov_b32_e32 v4, s72
-; VI-NEXT: v_perm_b32 v9, s80, v9, v1
+; VI-NEXT: v_mov_b32_e32 v4, s16
+; VI-NEXT: v_perm_b32 v10, s83, v10, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
-; VI-NEXT: v_mov_b32_e32 v25, s62
+; VI-NEXT: v_mov_b32_e32 v25, s82
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
-; VI-NEXT: v_mov_b32_e32 v7, s86
-; VI-NEXT: v_readlane_b32 s16, v33, 4
-; VI-NEXT: v_perm_b32 v25, s63, v25, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: v_mov_b32_e32 v7, s48
+; VI-NEXT: v_perm_b32 v25, s81, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
; VI-NEXT: v_perm_b32 v4, s19, v7, v1
-; VI-NEXT: v_mov_b32_e32 v14, s16
+; VI-NEXT: v_mov_b32_e32 v14, s54
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; VI-NEXT: v_mov_b32_e32 v7, s39
-; VI-NEXT: v_perm_b32 v14, s59, v14, v1
+; VI-NEXT: v_mov_b32_e32 v7, s87
+; VI-NEXT: v_perm_b32 v14, s71, v14, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
; VI-NEXT: v_perm_b32 v8, s20, v7, v1
; VI-NEXT: v_mov_b32_e32 v26, s70
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
-; VI-NEXT: v_mov_b32_e32 v10, s37
-; VI-NEXT: v_perm_b32 v26, s60, v26, v1
+; VI-NEXT: v_mov_b32_e32 v9, s80
+; VI-NEXT: v_perm_b32 v26, s63, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_perm_b32 v7, s21, v10, v1
-; VI-NEXT: v_mov_b32_e32 v17, s30
+; VI-NEXT: v_perm_b32 v7, s21, v9, v1
+; VI-NEXT: v_mov_b32_e32 v17, s34
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_mov_b32_e32 v10, s81
-; VI-NEXT: v_perm_b32 v17, s69, v17, v1
+; VI-NEXT: v_mov_b32_e32 v9, s86
+; VI-NEXT: v_perm_b32 v17, s62, v17, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_perm_b32 v11, s22, v10, v1
-; VI-NEXT: v_mov_b32_e32 v27, s68
+; VI-NEXT: v_perm_b32 v11, s22, v9, v1
+; VI-NEXT: v_mov_b32_e32 v27, s74
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; VI-NEXT: v_mov_b32_e32 v12, s47
-; VI-NEXT: v_perm_b32 v27, s67, v27, v1
+; VI-NEXT: v_mov_b32_e32 v12, s55
+; VI-NEXT: v_perm_b32 v27, s69, v27, v1
; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_perm_b32 v10, s23, v12, v1
-; VI-NEXT: v_mov_b32_e32 v20, s88
-; VI-NEXT: v_readlane_b32 s16, v34, 5
+; VI-NEXT: v_perm_b32 v9, s23, v12, v1
+; VI-NEXT: v_mov_b32_e32 v20, s52
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; VI-NEXT: v_mov_b32_e32 v12, s16
-; VI-NEXT: v_perm_b32 v20, s65, v20, v1
-; VI-NEXT: v_or_b32_e32 v2, v10, v2
-; VI-NEXT: v_readlane_b32 s16, v34, 4
+; VI-NEXT: v_mov_b32_e32 v12, s53
+; VI-NEXT: v_perm_b32 v20, s68, v20, v1
+; VI-NEXT: v_or_b32_e32 v2, v9, v2
; VI-NEXT: v_perm_b32 v13, s24, v12, v1
-; VI-NEXT: v_mov_b32_e32 v28, s58
+; VI-NEXT: v_mov_b32_e32 v28, s67
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_mov_b32_e32 v15, s16
-; VI-NEXT: v_perm_b32 v28, s64, v28, v1
+; VI-NEXT: v_mov_b32_e32 v15, s30
+; VI-NEXT: v_readlane_b32 s16, v33, 14
+; VI-NEXT: v_perm_b32 v28, s66, v28, v1
; VI-NEXT: v_or_b32_e32 v2, v13, v2
; VI-NEXT: v_perm_b32 v12, s25, v15, v1
-; VI-NEXT: v_mov_b32_e32 v21, vcc_lo
-; VI-NEXT: v_readlane_b32 s16, v34, 3
+; VI-NEXT: v_mov_b32_e32 v21, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
-; VI-NEXT: v_mov_b32_e32 v15, s16
-; VI-NEXT: v_perm_b32 v21, s54, v21, v1
+; VI-NEXT: v_mov_b32_e32 v15, s36
+; VI-NEXT: v_perm_b32 v21, s65, v21, v1
; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_readlane_b32 s16, v34, 2
; VI-NEXT: v_perm_b32 v16, s26, v15, v1
-; VI-NEXT: v_mov_b32_e32 v29, s56
+; VI-NEXT: v_mov_b32_e32 v29, s64
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_mov_b32_e32 v18, s16
-; VI-NEXT: v_perm_b32 v29, s57, v29, v1
+; VI-NEXT: v_mov_b32_e32 v18, s59
+; VI-NEXT: v_perm_b32 v29, s75, v29, v1
; VI-NEXT: v_or_b32_e32 v2, v16, v2
; VI-NEXT: v_perm_b32 v15, s27, v18, v1
-; VI-NEXT: v_mov_b32_e32 v22, s90
+; VI-NEXT: v_mov_b32_e32 v22, s76
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_mov_b32_e32 v18, s55
-; VI-NEXT: v_perm_b32 v22, s53, v22, v1
+; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
+; VI-NEXT: v_perm_b32 v22, s39, v22, v1
; VI-NEXT: v_or_b32_e32 v2, v15, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 15
; VI-NEXT: v_perm_b32 v19, s28, v18, v1
-; VI-NEXT: v_mov_b32_e32 v30, s52
+; VI-NEXT: v_mov_b32_e32 v30, s72
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_mov_b32_e32 v23, s36
-; VI-NEXT: v_perm_b32 v30, s46, v30, v1
+; VI-NEXT: v_mov_b32_e32 v23, s60
+; VI-NEXT: v_readlane_b32 s16, v33, 16
+; VI-NEXT: v_perm_b32 v30, s56, v30, v1
; VI-NEXT: v_or_b32_e32 v2, v19, v2
; VI-NEXT: v_perm_b32 v18, s29, v23, v1
-; VI-NEXT: v_mov_b32_e32 v23, s74
+; VI-NEXT: v_mov_b32_e32 v23, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; VI-NEXT: v_mov_b32_e32 v31, s89
-; VI-NEXT: v_perm_b32 v23, s31, v23, v1
+; VI-NEXT: v_mov_b32_e32 v31, s57
+; VI-NEXT: v_perm_b32 v23, s89, v23, v1
; VI-NEXT: v_or_b32_e32 v2, v18, v2
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 1
+; VI-NEXT: v_readlane_b32 s16, v34, 0
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 63
+; VI-NEXT: v_readlane_b32 s16, v33, 62
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v34, 0
+; VI-NEXT: v_readlane_b32 s16, v33, 63
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s78
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_mov_b32_e32 v2, s85
-; VI-NEXT: v_perm_b32 v3, s66, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s58
+; VI-NEXT: v_perm_b32 v3, s79, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s91
-; VI-NEXT: v_readlane_b32 s17, v33, 5
+; VI-NEXT: v_mov_b32_e32 v3, s35
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_mov_b32_e32 v2, vcc_hi
-; VI-NEXT: v_perm_b32 v3, s61, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s37
+; VI-NEXT: v_perm_b32 v3, s31, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 18
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_mov_b32_e32 v3, s46
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_mov_b32_e32 v2, s75
-; VI-NEXT: v_perm_b32 v3, s71, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, vcc_hi
+; VI-NEXT: v_perm_b32 v3, s61, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 34
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_readlane_b32 s16, v34, 33
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 31
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 32
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_readlane_b32 s17, v33, 17
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v34, 33
+; VI-NEXT: v_readlane_b32 s16, v34, 30
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 2
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s76
-; VI-NEXT: v_readlane_b32 s14, v34, 32
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s14, v34, 29
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v34, 31
+; VI-NEXT: v_readlane_b32 s14, v34, 28
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v34, 29
+; VI-NEXT: v_readlane_b32 s14, v34, 26
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v34, 30
+; VI-NEXT: v_readlane_b32 s14, v34, 27
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v34, 28
+; VI-NEXT: v_readlane_b32 s14, v34, 25
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 8
+; VI-NEXT: v_readlane_b32 s14, v33, 4
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s12, v34, 27
+; VI-NEXT: v_readlane_b32 s12, v34, 24
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v34, 26
+; VI-NEXT: v_readlane_b32 s12, v34, 23
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v34, 24
+; VI-NEXT: v_readlane_b32 s12, v34, 21
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v34, 25
+; VI-NEXT: v_readlane_b32 s12, v34, 22
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v34, 23
+; VI-NEXT: v_readlane_b32 s12, v34, 20
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 10
+; VI-NEXT: v_readlane_b32 s12, v33, 6
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s10, v34, 22
+; VI-NEXT: v_readlane_b32 s10, v34, 19
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s10, v34, 21
+; VI-NEXT: v_readlane_b32 s10, v34, 18
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; VI-NEXT: v_mov_b32_e32 v2, s10
-; VI-NEXT: v_readlane_b32 s10, v34, 19
+; VI-NEXT: v_readlane_b32 s10, v34, 16
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s10, v34, 20
+; VI-NEXT: v_readlane_b32 s10, v34, 17
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s10, v34, 18
+; VI-NEXT: v_readlane_b32 s10, v34, 15
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 8
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s84
-; VI-NEXT: v_readlane_b32 s8, v34, 17
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s8, v34, 14
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s8, v34, 16
+; VI-NEXT: v_readlane_b32 s8, v34, 13
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v34, 14
+; VI-NEXT: v_readlane_b32 s8, v34, 11
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s8, v34, 15
+; VI-NEXT: v_readlane_b32 s8, v34, 12
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s8, v34, 13
+; VI-NEXT: v_readlane_b32 s8, v34, 10
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 14
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s6, v34, 12
+; VI-NEXT: v_mov_b32_e32 v3, s90
+; VI-NEXT: v_readlane_b32 s6, v34, 9
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s6, v34, 11
+; VI-NEXT: v_readlane_b32 s6, v34, 8
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v34, 9
+; VI-NEXT: v_readlane_b32 s6, v34, 6
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s6, v34, 10
+; VI-NEXT: v_readlane_b32 s6, v34, 7
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s6, v34, 8
+; VI-NEXT: v_readlane_b32 s6, v34, 5
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_perm_b32 v2, s4, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s34
-; VI-NEXT: v_readlane_b32 s4, v34, 7
+; VI-NEXT: v_readlane_b32 s6, v33, 12
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s4, v34, 4
; VI-NEXT: v_perm_b32 v3, s4, v3, v1
+; VI-NEXT: v_perm_b32 v2, s50, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s4, v34, 6
+; VI-NEXT: v_readlane_b32 s4, v34, 3
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; VI-NEXT: v_mov_b32_e32 v2, s4
-; VI-NEXT: v_mov_b32_e32 v3, s77
-; VI-NEXT: v_perm_b32 v2, s5, v2, v1
-; VI-NEXT: v_perm_b32 v1, s79, v3, v1
+; VI-NEXT: v_mov_b32_e32 v3, s49
+; VI-NEXT: v_readlane_b32 s4, v34, 2
+; VI-NEXT: v_perm_b32 v2, s51, v2, v1
+; VI-NEXT: v_perm_b32 v1, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_readlane_b32 s51, v33, 1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s17, v33, 19
-; VI-NEXT: v_readlane_b32 s15, v33, 9
-; VI-NEXT: v_readlane_b32 s13, v33, 11
-; VI-NEXT: v_readlane_b32 s9, v33, 15
+; VI-NEXT: v_readlane_b32 s17, v33, 3
+; VI-NEXT: v_readlane_b32 s15, v33, 5
+; VI-NEXT: v_readlane_b32 s13, v33, 7
+; VI-NEXT: v_readlane_b32 s11, v33, 9
+; VI-NEXT: v_readlane_b32 s7, v33, 13
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
@@ -208177,12 +208384,8 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v26
-; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v23
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v23
-; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v22
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v8
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v8
+; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v8
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v7
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -208191,204 +208394,202 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v8
-; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v20
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v10
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v9
+; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v25
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v25
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v24
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v9
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v7
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v10
-; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v18
-; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v24
+; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v23
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v23
+; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v22
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v12
+; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v11
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v9
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v12
-; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v14
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v14
+; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v20
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v14
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v14
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v13
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v11
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v14
-; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v16
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v16
+; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v16
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v16
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v13
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v16
-; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v18
+; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v17
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v15
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v45
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v18
; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v17
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v35
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v36
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v42
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v34
; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v19
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v61
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v55
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v36
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v52
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v53
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v49
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v50
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v38
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v39
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v35
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v34
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v10
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37
; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v57
-; SI-NEXT: ; kill: killed $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v38
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v36
-; SI-NEXT: v_mul_f32_e32 v45, 1.0, v0
-; SI-NEXT: v_mul_f32_e32 v7, 1.0, v2
-; SI-NEXT: v_mul_f32_e32 v43, 1.0, v4
-; SI-NEXT: v_mul_f32_e32 v9, 1.0, v23
-; SI-NEXT: v_mul_f32_e32 v17, 1.0, v25
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v27
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v29
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v31
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr21
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v63
+; SI-NEXT: v_mul_f32_e32 v28, 1.0, v62
+; SI-NEXT: v_mul_f32_e32 v24, 1.0, v59
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v54
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v39
+; SI-NEXT: v_mul_f32_e32 v63, 1.0, v0
+; SI-NEXT: v_mul_f32_e32 v62, 1.0, v2
+; SI-NEXT: v_mul_f32_e32 v61, 1.0, v4
+; SI-NEXT: v_mul_f32_e32 v54, 1.0, v6
+; SI-NEXT: v_mul_f32_e32 v59, 1.0, v60
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41
+; SI-NEXT: v_mul_f32_e32 v41, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v2, 1.0, v25
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v27
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v60, 1.0, v31
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v62
-; SI-NEXT: v_mul_f32_e32 v28, 1.0, v59
; SI-NEXT: v_mul_f32_e32 v26, 1.0, v37
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v10
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v57
; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20
-; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v56
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v46
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v40
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v54
-; SI-NEXT: v_mul_f32_e32 v13, 1.0, v51
-; SI-NEXT: v_mul_f32_e32 v62, 1.0, v48
-; SI-NEXT: v_mul_f32_e32 v59, 1.0, v33
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e32 v57, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v45
+; SI-NEXT: v_mul_f32_e32 v18, 1.0, v43
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v40
+; SI-NEXT: v_mul_f32_e32 v14, 1.0, v51
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v6
-; SI-NEXT: v_mul_f32_e32 v40, 1.0, v63
-; SI-NEXT: v_mul_f32_e32 v54, 1.0, v61
-; SI-NEXT: v_mul_f32_e32 v11, 1.0, v60
-; SI-NEXT: v_mul_f32_e32 v50, 1.0, v58
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v47
-; SI-NEXT: v_mul_f32_e32 v48, 1.0, v44
-; SI-NEXT: v_mul_f32_e32 v19, 1.0, v41
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v48
+; SI-NEXT: v_mul_f32_e32 v12, 1.0, v33
+; SI-NEXT: v_mul_f32_e32 v43, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v58, 1.0, v58
+; SI-NEXT: v_mul_f32_e32 v57, 1.0, v56
+; SI-NEXT: v_mul_f32_e32 v56, 1.0, v47
+; SI-NEXT: v_mul_f32_e32 v47, 1.0, v46
+; SI-NEXT: v_mul_f32_e32 v46, 1.0, v44
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; kill: killed $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; kill: killed $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; kill: killed $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; kill: killed $vgpr21
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; kill: killed $vgpr23
@@ -208401,28 +208602,33 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; kill: killed $vgpr9
; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; kill: killed $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; kill: killed $vgpr13
; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; kill: killed $vgpr19
; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; kill: killed $vgpr21
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr21
@@ -208445,259 +208651,259 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB100_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v30
-; SI-NEXT: v_alignbit_b32 v2, v2, v45, 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v30
+; SI-NEXT: v_alignbit_b32 v7, v7, v63, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
-; SI-NEXT: v_alignbit_b32 v2, v2, v7, 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v28
+; SI-NEXT: v_alignbit_b32 v7, v7, v62, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
-; SI-NEXT: v_alignbit_b32 v2, v2, v43, 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v26
+; SI-NEXT: v_alignbit_b32 v7, v7, v61, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24
-; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
+; SI-NEXT: v_alignbit_b32 v7, v7, v54, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; SI-NEXT: v_alignbit_b32 v1, v1, v40, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v24
+; SI-NEXT: v_alignbit_b32 v7, v7, v59, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
-; SI-NEXT: v_alignbit_b32 v1, v1, v54, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v8
+; SI-NEXT: v_alignbit_b32 v7, v7, v58, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v18
-; SI-NEXT: v_alignbit_b32 v1, v1, v11, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v22
+; SI-NEXT: v_alignbit_b32 v7, v7, v57, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16
-; SI-NEXT: v_alignbit_b32 v1, v1, v50, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
+; SI-NEXT: v_alignbit_b32 v7, v7, v56, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v14
-; SI-NEXT: v_alignbit_b32 v1, v1, v3, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; SI-NEXT: v_alignbit_b32 v7, v7, v47, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12
-; SI-NEXT: v_alignbit_b32 v1, v1, v48, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v18
+; SI-NEXT: v_alignbit_b32 v7, v7, v46, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v10
-; SI-NEXT: v_alignbit_b32 v1, v1, v19, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v5
+; SI-NEXT: v_alignbit_b32 v0, v7, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
-; SI-NEXT: v_alignbit_b32 v1, v1, v9, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v16
+; SI-NEXT: v_alignbit_b32 v0, v0, v41, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13
-; SI-NEXT: v_alignbit_b32 v1, v1, v17, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v14
+; SI-NEXT: v_alignbit_b32 v0, v0, v2, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v62
-; SI-NEXT: v_alignbit_b32 v1, v1, v5, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v1
+; SI-NEXT: v_alignbit_b32 v0, v0, v4, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v59
-; SI-NEXT: v_alignbit_b32 v1, v1, v15, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v12
+; SI-NEXT: v_alignbit_b32 v0, v0, v6, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57
-; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; SI-NEXT: v_alignbit_b32 v0, v0, v60, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v2, v0, 16
+; SI-NEXT: v_alignbit_b32 v45, v44, v0, 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
-; SI-NEXT: v_alignbit_b32 v0, v6, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v45, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v4, v63, v0, 16
+; SI-NEXT: v_alignbit_b32 v42, v40, v0, 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v28
-; SI-NEXT: v_alignbit_b32 v0, v4, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v42, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v61, v60, v0, 16
+; SI-NEXT: v_alignbit_b32 v55, v53, v0, 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v26
-; SI-NEXT: v_alignbit_b32 v0, v61, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v55, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v58, v56, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24
-; SI-NEXT: v_alignbit_b32 v0, v58, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v52, v7, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; SI-NEXT: v_alignbit_b32 v0, v52, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v47, v46, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v22
-; SI-NEXT: v_alignbit_b32 v0, v47, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v51, v9, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24
+; SI-NEXT: v_alignbit_b32 v0, v51, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v44, v42, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v20
-; SI-NEXT: v_alignbit_b32 v0, v44, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v50, v11, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8
+; SI-NEXT: v_alignbit_b32 v0, v50, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v41, v55, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v18
-; SI-NEXT: v_alignbit_b32 v0, v41, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v49, v13, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v22
+; SI-NEXT: v_alignbit_b32 v0, v49, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v53, v52, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
-; SI-NEXT: v_alignbit_b32 v0, v53, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v48, v15, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v20
+; SI-NEXT: v_alignbit_b32 v0, v48, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v51, v49, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
-; SI-NEXT: v_alignbit_b32 v0, v51, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v39, v17, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v3
+; SI-NEXT: v_alignbit_b32 v0, v39, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v39, v38, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
-; SI-NEXT: v_alignbit_b32 v0, v39, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v38, v19, v0, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v18
+; SI-NEXT: v_alignbit_b32 v0, v38, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v37, v21, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5
; SI-NEXT: v_alignbit_b32 v0, v37, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v36, v23, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
; SI-NEXT: v_alignbit_b32 v0, v36, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v35, v25, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
; SI-NEXT: v_alignbit_b32 v0, v35, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v34, v27, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v62
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1
; SI-NEXT: v_alignbit_b32 v0, v34, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v29, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v59
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
; SI-NEXT: v_alignbit_b32 v0, v33, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v32, v31, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
; SI-NEXT: v_alignbit_b32 v0, v32, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -208762,369 +208968,369 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: .LBB100_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB100_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v45
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v4
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v30
-; SI-NEXT: v_alignbit_b32 v2, v4, v2, 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v28
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; SI-NEXT: v_alignbit_b32 v4, v6, v4, 16
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v43
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v26
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v4
-; SI-NEXT: v_alignbit_b32 v6, v7, v6, 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v30
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v63
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v30
+; SI-NEXT: v_alignbit_b32 v7, v9, v7, 16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v28
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v1
-; SI-NEXT: v_alignbit_b32 v6, v7, v6, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v62
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v28
+; SI-NEXT: v_alignbit_b32 v7, v9, v7, 16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v26
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v22
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v6
-; SI-NEXT: v_alignbit_b32 v7, v21, v7, 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v61
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v26
+; SI-NEXT: v_alignbit_b32 v7, v9, v7, 16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v10
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v54
-; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v7
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
-; SI-NEXT: v_alignbit_b32 v20, v20, v21, 16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v10
+; SI-NEXT: v_alignbit_b32 v7, v9, v7, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v18
-; SI-NEXT: v_alignbit_b32 v11, v20, v11, 16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v59
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v7
+; SI-NEXT: v_alignbit_b32 v9, v11, v9, 16
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v50
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v58
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v8
+; SI-NEXT: v_alignbit_b32 v9, v11, v9, 16
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v22
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v16
-; SI-NEXT: v_alignbit_b32 v11, v20, v11, 16
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v11
+; SI-NEXT: v_alignbit_b32 v9, v13, v9, 16
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v20
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v56
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
+; SI-NEXT: v_alignbit_b32 v9, v15, v9, 16
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v11
-; SI-NEXT: v_alignbit_b32 v3, v14, v3, 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v48
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v47
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v12
-; SI-NEXT: v_alignbit_b32 v3, v14, v3, 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v3
+; SI-NEXT: v_alignbit_b32 v9, v15, v9, 16
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v18
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v19
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10
-; SI-NEXT: v_alignbit_b32 v3, v14, v3, 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_alignbit_b32 v9, v17, v9, 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_alignbit_b32 v3, v9, v3, 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v13
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v5
+; SI-NEXT: v_alignbit_b32 v0, v9, v0, 16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v17
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v41
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v9
-; SI-NEXT: v_alignbit_b32 v3, v13, v3, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v9
+; SI-NEXT: v_alignbit_b32 v0, v16, v0, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; SI-NEXT: v_alignbit_b32 v3, v13, v3, 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v59
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; SI-NEXT: v_alignbit_b32 v0, v14, v0, 16
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_alignbit_b32 v3, v14, v3, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; SI-NEXT: v_alignbit_b32 v0, v4, v0, 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v57
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; SI-NEXT: v_alignbit_b32 v0, v14, v0, 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; SI-NEXT: v_alignbit_b32 v0, v6, v0, 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v60
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v6
+; SI-NEXT: v_alignbit_b32 v0, v12, v0, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v12
; SI-NEXT: v_alignbit_b32 v32, v31, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v0, v32, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_alignbit_b32 v33, v29, v3, 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v22
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v24
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v12
+; SI-NEXT: v_alignbit_b32 v33, v29, v6, 16
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v34, v27, v13, 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
+; SI-NEXT: v_alignbit_b32 v42, v40, v22, 16
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v28
+; SI-NEXT: v_alignbit_b32 v22, v42, v22, 16
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v12
+; SI-NEXT: v_alignbit_b32 v34, v27, v6, 16
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v34, v1, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v33, v4, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v12
+; SI-NEXT: v_alignbit_b32 v35, v25, v6, 16
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v2, v35, v2, 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v35, v25, v13, 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v12
+; SI-NEXT: v_alignbit_b32 v36, v23, v6, 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v12
+; SI-NEXT: v_alignbit_b32 v37, v21, v9, 16
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v36, v23, v13, 16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v12
+; SI-NEXT: v_alignbit_b32 v38, v19, v9, 16
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v13
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v37, v21, v13, 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v39, v38, v13, 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v51, v49, v13, 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_alignbit_b32 v39, v17, v9, 16
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v53, v52, v13, 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_alignbit_b32 v44, v42, v15, 16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_alignbit_b32 v47, v46, v15, 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_alignbit_b32 v58, v56, v6, 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v58, v1, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v47, v15, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v7, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_alignbit_b32 v61, v60, v6, 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_alignbit_b32 v41, v55, v14, 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v18
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v14, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v53, v13, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v11, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_alignbit_b32 v3, v39, v3, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v12, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v38, v12, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v37, v10, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v5, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v8, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v36, v6, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_alignbit_b32 v48, v15, v9, 16
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_alignbit_b32 v49, v13, v9, 16
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_alignbit_b32 v50, v11, v9, 16
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v8, v50, v8, 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v9, 16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v30
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v8, v49, v16, 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v34, v5, 16
-; SI-NEXT: v_alignbit_b32 v16, v61, v16, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v8, v48, v14, 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_alignbit_b32 v51, v9, v18, 16
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_alignbit_b32 v52, v7, v20, 16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v10, v52, v10, 16
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v3, 16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_alignbit_b32 v4, v63, v4, 16
-; SI-NEXT: v_alignbit_b32 v17, v4, v17, 16
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v10, v51, v18, 16
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_alignbit_b32 v55, v53, v20, 16
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v26
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_alignbit_b32 v20, v55, v20, 16
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_alignbit_b32 v6, v2, v6, 16
-; SI-NEXT: v_alignbit_b32 v18, v6, v18, 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v26
+; SI-NEXT: v_alignbit_b32 v45, v44, v24, 16
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v30
+; SI-NEXT: v_alignbit_b32 v24, v45, v24, 16
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: .LBB100_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v46
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v55
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v52
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v49
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v38
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
@@ -209133,46 +209339,45 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v32, 0xffff, v32
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_or_b32_e32 v31, v32, v31
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v45
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v60
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(4)
@@ -209186,40 +209391,9 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v61
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v6, v6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v58
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v47
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v10, v10, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v44
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v12, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -209237,22 +209411,52 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v4, v4, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_or_b32_e32 v6, v6, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v52
+; SI-NEXT: v_or_b32_e32 v7, v8, v7
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_or_b32_e32 v8, v8, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v10, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v50
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v49
+; SI-NEXT: v_or_b32_e32 v13, v14, v13
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v53
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: v_or_b32_e32 v14, v14, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v48
+; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v51
-; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: v_or_b32_e32 v16, v16, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v39
+; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v39
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: v_or_b32_e32 v18, v18, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v38
+; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
@@ -209284,7 +209488,7 @@ define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v33
; SI-NEXT: v_or_b32_e32 v29, v30, v29
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -211608,7 +211812,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -211630,81 +211834,79 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI-NEXT: v_writelane_b32 v63, s36, 2
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
-; SI-NEXT: s_and_b32 s40, s17, 0xffff0000
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
; SI-NEXT: s_and_b32 s29, s18, 0xffff0000
+; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s40
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s7, s28, 16
-; SI-NEXT: s_and_b32 s28, s19, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s29
-; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s28
; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s10
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s8
+; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31
; SI-NEXT: v_readfirstlane_b32 s88, v6
; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi
-; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95
+; SI-NEXT: v_readfirstlane_b32 s62, v11
; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s93
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s58, v13
+; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89
-; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63
+; SI-NEXT: s_and_b32 s40, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; SI-NEXT: v_readfirstlane_b32 s30, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_lshl_b32 s7, s28, 16
+; SI-NEXT: s_and_b32 s28, s19, 0xffff0000
; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s19
+; SI-NEXT: s_lshl_b32 s11, s26, 16
+; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s21, s21, 16
; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
; SI-NEXT: s_lshl_b32 s15, s24, 16
; SI-NEXT: s_and_b32 s24, s23, 0xffff0000
; SI-NEXT: s_lshl_b32 s23, s23, 16
; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_lshl_b32 s9, s27, 16
-; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
; SI-NEXT: s_lshl_b32 s30, s30, 16
-; SI-NEXT: v_readfirstlane_b32 s94, v3
-; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
; SI-NEXT: s_lshl_b32 s94, s94, 16
; SI-NEXT: v_readfirstlane_b32 s90, v5
; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
@@ -211715,34 +211917,32 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI-NEXT: v_readfirstlane_b32 s74, v9
; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: v_readfirstlane_b32 s62, v11
-; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
; SI-NEXT: s_lshl_b32 s62, s62, 16
-; SI-NEXT: v_readfirstlane_b32 s58, v13
-; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
; SI-NEXT: s_lshl_b32 s58, s58, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_and_b32 s27, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_lshl_b32 s11, s26, 16
; SI-NEXT: v_readfirstlane_b32 s42, v17
+; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: v_readfirstlane_b32 s56, v14
; SI-NEXT: v_readfirstlane_b32 s60, v12
; SI-NEXT: v_readfirstlane_b32 s72, v10
; SI-NEXT: v_readfirstlane_b32 s76, v8
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: s_and_b32 s25, s22, 0xffff0000
; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_and_b32 s27, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s20, s20, 16
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s41, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s21
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
; SI-NEXT: s_lshl_b32 s56, s56, 16
@@ -211754,1439 +211954,1392 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI-NEXT: s_lshl_b32 s76, s76, 16
; SI-NEXT: s_lshl_b32 s88, s88, 16
; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s27
; SI-NEXT: v_mul_f32_e64 v5, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s31
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s91
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v62, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s79
; SI-NEXT: v_mul_f32_e64 v27, 1.0, s77
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s75
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s61
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s59
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s57
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s43
; SI-NEXT: v_mul_f32_e64 v33, 1.0, s42
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s11
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s60
; SI-NEXT: v_mul_f32_e64 v19, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s44
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s30
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s94
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s90
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s58
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44
; SI-NEXT: s_cbranch_scc0 .LBB101_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v3, v22
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v5
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v48, v25
-; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v11
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v58, v20
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v15
-; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v38
-; SI-NEXT: v_mov_b32_e32 v14, v40
-; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v23
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v29
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v46
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v1, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[44:45], v[6:7], 16
-; SI-NEXT: v_mov_b32_e32 v45, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v26
-; SI-NEXT: v_mov_b32_e32 v6, v56
-; SI-NEXT: v_mov_b32_e32 v5, v51
-; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v34
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
-; SI-NEXT: v_lshr_b64 v[41:42], v[21:22], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_mov_b32_e32 v22, v28
+; SI-NEXT: v_lshr_b64 v[1:2], v[6:7], 16
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v48
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v3, v2
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v28
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v59
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[1:2], v[3:4], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v36
+; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 16
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v15
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v27
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v46
+; SI-NEXT: v_mov_b32_e32 v8, v20
+; SI-NEXT: v_mov_b32_e32 v20, v49
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v10
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v17
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 16
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v10
+; SI-NEXT: v_mov_b32_e32 v11, v25
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v42
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v27
+; SI-NEXT: s_waitcnt vmcnt(7) expcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v37
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v13
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v57
-; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[12:13], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
-; SI-NEXT: v_mov_b32_e32 v13, v30
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v58
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v56
-; SI-NEXT: v_lshr_b64 v[55:56], v[24:25], 16
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v31
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v62
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v4, v27
+; SI-NEXT: v_mov_b32_e32 v3, v48
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v35
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[6:7], v[0:1], 16
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v6, v37
+; SI-NEXT: v_mov_b32_e32 v37, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v5, v15
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[18:19], v[25:26], 16
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v35
-; SI-NEXT: v_mov_b32_e32 v35, v7
-; SI-NEXT: v_mov_b32_e32 v7, v34
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v50
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v0
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[52:53], v[21:22], 16
+; SI-NEXT: v_mov_b32_e32 v53, v16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v37
+; SI-NEXT: v_lshr_b64 v[58:59], v[24:25], 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v0, v32
-; SI-NEXT: v_mov_b32_e32 v2, v23
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v2
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v13
-; SI-NEXT: v_lshr_b64 v[20:21], v[25:26], 16
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v36
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
-; SI-NEXT: v_mov_b32_e32 v47, v15
-; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16
-; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v27, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v53
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v59, v45
+; SI-NEXT: v_lshr_b64 v[15:16], v[25:26], 16
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_mov_b32_e32 v29, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_mov_b32_e32 v31, v25
-; SI-NEXT: v_lshr_b64 v[24:25], v[27:28], 16
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v32
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(5) expcnt(5)
-; SI-NEXT: v_lshr_b64 v[26:27], v[29:30], 16
-; SI-NEXT: v_mov_b32_e32 v36, v24
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v4
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[52:53], v[31:32], 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v3
-; SI-NEXT: v_mov_b32_e32 v53, v11
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v39
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshr_b64 v[29:30], v[33:34], 16
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v50
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v28
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v41
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v16
+; SI-NEXT: v_lshr_b64 v[23:24], v[25:26], 16
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v22
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v4
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v30
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[55:56], v[25:26], 16
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[48:49], v[59:60], 16
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v38
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; SI-NEXT: v_mov_b32_e32 v7, v47
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mov_b32_e32 v27, v25
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[39:40], v[44:45], 16
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v45, v43
+; SI-NEXT: v_mov_b32_e32 v43, v19
+; SI-NEXT: v_lshr_b64 v[1:2], v[27:28], 16
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_mov_b32_e32 v30, v25
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v35
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v47
+; SI-NEXT: v_mov_b32_e32 v47, v39
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v29
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[49:50], v[30:31], 16
+; SI-NEXT: v_mov_b32_e32 v50, v52
+; SI-NEXT: v_mov_b32_e32 v61, v49
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v35
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshr_b64 v[26:27], v[33:34], 16
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v16
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v46, v14
-; SI-NEXT: v_lshr_b64 v[14:15], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v49, v26
-; SI-NEXT: v_lshr_b64 v[42:43], v[17:18], 16
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v41
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v13
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v17
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v4
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; SI-NEXT: v_mov_b32_e32 v7, v44
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v7, v55
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v4, v11
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v42
+; SI-NEXT: v_lshr_b64 v[41:42], v[27:28], 16
+; SI-NEXT: v_mov_b32_e32 v42, v15
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v59, v3
-; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mov_b32_e32 v3, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 16
-; SI-NEXT: v_mov_b32_e32 v3, v41
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v7
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[2:3], v[31:32], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v3, v20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[37:38], v[10:11], 16
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[38:39], v[40:41], 16
-; SI-NEXT: v_mov_b32_e32 v39, v9
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v45, v11
-; SI-NEXT: v_mov_b32_e32 v44, v10
-; SI-NEXT: v_lshr_b64 v[10:11], v[44:45], 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_mov_b32_e32 v16, v12
-; SI-NEXT: v_lshr_b64 v[30:31], v[11:12], 16
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshr_b64 v[12:13], v[54:55], 16
-; SI-NEXT: v_mov_b32_e32 v13, v4
+; SI-NEXT: v_mov_b32_e32 v17, v3
+; SI-NEXT: v_mov_b32_e32 v16, v2
+; SI-NEXT: v_lshr_b64 v[2:3], v[16:17], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3) expcnt(0)
+; SI-NEXT: v_lshr_b64 v[2:3], v[29:30], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v29, v26
+; SI-NEXT: v_mov_b32_e32 v16, v53
+; SI-NEXT: v_mov_b32_e32 v56, v30
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_mov_b32_e32 v37, v3
+; SI-NEXT: v_mov_b32_e32 v36, v2
+; SI-NEXT: v_lshr_b64 v[2:3], v[36:37], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[35:36], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v36, v29
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v4, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, v33
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v3, v34
+; SI-NEXT: v_mov_b32_e32 v7, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[8:9], 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v3, v29
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[7:8], v[25:26], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[28:29], 16
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[2:3], v[51:52], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v31, v18
-; SI-NEXT: v_lshr_b64 v[18:19], v[23:24], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[51:52], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v7, v6
-; SI-NEXT: v_mov_b32_e32 v6, v5
-; SI-NEXT: v_mov_b32_e32 v20, v58
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[2:3], v[57:58], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v8, v46
-; SI-NEXT: v_mov_b32_e32 v9, v47
-; SI-NEXT: v_mov_b32_e32 v11, v53
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshr_b64 v[46:47], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v19, v40
-; SI-NEXT: v_mov_b32_e32 v53, v48
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[2:3], v[14:15], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[3:4], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[22:23], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[54:55], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[54:55], 16
+; SI-NEXT: v_lshr_b64 v[33:34], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v3, v28
+; SI-NEXT: v_mov_b32_e32 v28, v25
+; SI-NEXT: v_mov_b32_e32 v57, v37
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[51:52], v[48:49], 16
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v14, v1
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[21:22], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[52:53], v[28:29], 16
+; SI-NEXT: v_mov_b32_e32 v22, v55
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshr_b64 v[28:29], v[26:27], 16
+; SI-NEXT: v_lshr_b64 v[26:27], v[45:46], 16
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[5:6], 16
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[20:21], 16
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[48:49], 16
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[25:26], 16
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v22, v0
-; SI-NEXT: v_lshr_b64 v[4:5], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[0:1], v[6:7], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[26:27], v[37:38], 16
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[14:15], 16
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v15, v5
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshr_b64 v[5:6], v[54:55], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[32:33], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[24:25], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[56:57], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[39:40], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[34:35], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[3:4], v[40:41], 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[11:12], 16
+; SI-NEXT: v_lshr_b64 v[29:30], v[59:60], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v5, v60
-; SI-NEXT: v_mov_b32_e32 v60, v61
-; SI-NEXT: v_mov_b32_e32 v40, v8
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_mov_b32_e32 v1, v34
-; SI-NEXT: v_mov_b32_e32 v34, v18
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v4, v56
-; SI-NEXT: v_mov_b32_e32 v56, v15
-; SI-NEXT: v_mov_b32_e32 v55, v14
-; SI-NEXT: v_mov_b32_e32 v41, v2
-; SI-NEXT: v_lshr_b64 v[23:24], v[26:27], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[8:9], 16
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[23:24], v[50:51], 16
-; SI-NEXT: v_mov_b32_e32 v51, v6
-; SI-NEXT: v_lshr_b64 v[6:7], v[61:62], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[43:44], 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[6:7], v[28:29], 16
+; SI-NEXT: v_lshr_b64 v[29:30], v[18:19], 16
+; SI-NEXT: v_lshr_b64 v[30:31], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v19, v43
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v17, v0
-; SI-NEXT: v_mov_b32_e32 v29, v12
-; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_mov_b32_e32 v43, v45
+; SI-NEXT: v_lshr_b64 v[44:45], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v49, v20
+; SI-NEXT: v_mov_b32_e32 v25, v11
+; SI-NEXT: v_mov_b32_e32 v20, v8
+; SI-NEXT: v_mov_b32_e32 v38, v23
+; SI-NEXT: v_mov_b32_e32 v21, v58
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v6, v32
-; SI-NEXT: v_mov_b32_e32 v32, v37
-; SI-NEXT: v_mov_b32_e32 v37, v30
+; SI-NEXT: v_mov_b32_e32 v31, v33
+; SI-NEXT: v_mov_b32_e32 v33, v2
+; SI-NEXT: v_mov_b32_e32 v45, v59
; SI-NEXT: s_branch .LBB101_3
; SI-NEXT: .LBB101_2:
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: v_mov_b32_e32 v26, v24
-; SI-NEXT: s_waitcnt vmcnt(14) expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v4, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v21, v7
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: .LBB101_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB101_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v25
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v28
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v4
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v19
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v58
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v48
+; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v25
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v26
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v19
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v20
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v54
+; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v54
-; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v50
-; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v51
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v21
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v40
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v43
-; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v60
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v45
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v46, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v25
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v26
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v50, 0x40c00000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v6
-; SI-NEXT: v_lshr_b64 v[61:62], v[50:51], 16
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v28
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v19
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v21
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v28
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v27
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v28
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v11
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v28
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[38:39], v[38:39], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v25
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v16
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v4
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v26
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v26
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v19
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v2
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v62
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v44, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v13
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v19
+; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v59, 0x40c00000, v13
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v27
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v8
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v61, 0x40c00000, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v6
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v5
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v13
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v39
+; SI-NEXT: v_lshr_b64 v[5:6], v[25:26], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v47, 0x40c00000, v13
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v47
-; SI-NEXT: v_lshr_b64 v[7:8], v[27:28], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[27:28], v[48:49], 16
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v46
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v55
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v58
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v46, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v10
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v46
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v25
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v10
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v8
+; SI-NEXT: v_lshr_b64 v[31:32], v[6:7], 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v9
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v12
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v11
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v55
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v12
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v11
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v13
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v14
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v18
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v15
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v44
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v53
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v16
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v18
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v13
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v21
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v17
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v14
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v54
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v18
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v51
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v23
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v17
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v16
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v22
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v20
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v54
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v17
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[54:55], v[49:50], 16
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v52
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v21
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v48
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v18
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[52:53], v[0:1], 16
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v8
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v26
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v22
-; SI-NEXT: v_lshr_b64 v[7:8], v[8:9], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v8, v51
-; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v21
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v16
-; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v46
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v8, v1
-; SI-NEXT: v_mov_b32_e32 v1, v35
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v53
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v19
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v37
-; SI-NEXT: v_lshr_b64 v[36:37], v[36:37], 16
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v13
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v18
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v52
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
+; SI-NEXT: v_lshr_b64 v[44:45], v[6:7], 16
+; SI-NEXT: v_mov_b32_e32 v6, v28
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v33
+; SI-NEXT: v_mov_b32_e32 v6, v1
+; SI-NEXT: v_lshr_b64 v[52:53], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v1, v47
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[32:33], 16
-; SI-NEXT: v_mov_b32_e32 v2, v49
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[8:9], v[34:35], 16
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v19
-; SI-NEXT: v_lshr_b64 v[18:19], v[29:30], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v20
-; SI-NEXT: v_lshr_b64 v[20:21], v[40:41], 16
-; SI-NEXT: v_lshr_b64 v[40:41], v[44:45], 16
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v15
-; SI-NEXT: v_lshr_b64 v[15:16], v[58:59], 16
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v12
+; SI-NEXT: v_mov_b32_e32 v1, v34
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v20
+; SI-NEXT: v_lshr_b64 v[19:20], v[46:47], 16
+; SI-NEXT: v_lshr_b64 v[47:48], v[33:34], 16
+; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v15
+; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v17
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v12
; SI-NEXT: v_lshr_b64 v[12:13], v[42:43], 16
-; SI-NEXT: v_mov_b32_e32 v45, v20
-; SI-NEXT: v_mov_b32_e32 v44, v19
-; SI-NEXT: v_mov_b32_e32 v16, v38
-; SI-NEXT: v_lshr_b64 v[37:38], v[37:38], 16
-; SI-NEXT: v_lshr_b64 v[32:33], v[11:12], 16
-; SI-NEXT: v_lshr_b64 v[10:11], v[44:45], 16
-; SI-NEXT: v_lshr_b64 v[34:35], v[35:36], 16
-; SI-NEXT: v_mov_b32_e32 v13, v40
-; SI-NEXT: v_mov_b32_e32 v49, v1
-; SI-NEXT: v_mov_b32_e32 v48, v0
+; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v10
+; SI-NEXT: v_mov_b32_e32 v8, v26
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v30
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v25
-; SI-NEXT: v_lshr_b64 v[30:31], v[24:25], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[3:4], 16
-; SI-NEXT: v_mov_b32_e32 v3, v57
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v31, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v59
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[29:30], 16
+; SI-NEXT: v_mov_b32_e32 v2, v50
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[29:30], v[21:22], 16
+; SI-NEXT: v_lshr_b64 v[15:16], v[40:41], 16
+; SI-NEXT: v_lshr_b64 v[6:7], v[59:60], 16
+; SI-NEXT: v_lshr_b64 v[49:50], v[56:57], 16
+; SI-NEXT: v_mov_b32_e32 v7, v23
+; SI-NEXT: v_mov_b32_e32 v50, v49
+; SI-NEXT: v_mov_b32_e32 v34, v1
+; SI-NEXT: v_mov_b32_e32 v33, v0
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v1, v22
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v47
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[21:22], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[4:5], v[35:36], 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v25
+; SI-NEXT: v_mov_b32_e32 v17, v4
+; SI-NEXT: v_mov_b32_e32 v16, v3
+; SI-NEXT: v_mov_b32_e32 v3, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v9
+; SI-NEXT: v_mov_b32_e32 v9, v27
+; SI-NEXT: v_lshr_b64 v[35:36], v[18:19], 16
+; SI-NEXT: v_mov_b32_e32 v4, v15
+; SI-NEXT: v_mov_b32_e32 v36, v9
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v6
-; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v57
+; SI-NEXT: v_lshr_b64 v[56:57], v[37:38], 16
+; SI-NEXT: v_mov_b32_e32 v37, v53
+; SI-NEXT: v_mov_b32_e32 v57, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, v38
+; SI-NEXT: v_mov_b32_e32 v38, v54
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[56:57], 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v55
-; SI-NEXT: v_mov_b32_e32 v59, v1
-; SI-NEXT: v_lshr_b64 v[41:42], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v1, v23
+; SI-NEXT: v_lshr_b64 v[1:2], v[61:62], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v61, v52
+; SI-NEXT: v_lshr_b64 v[51:52], v[51:52], 16
+; SI-NEXT: v_lshr_b64 v[52:53], v[8:9], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v3, v1
+; SI-NEXT: v_mov_b32_e32 v2, v0
+; SI-NEXT: v_lshr_b64 v[0:1], v[5:6], 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v12
-; SI-NEXT: v_lshr_b64 v[55:56], v[22:23], 16
-; SI-NEXT: v_lshr_b64 v[53:54], v[4:5], 16
-; SI-NEXT: v_lshr_b64 v[56:57], v[39:40], 16
-; SI-NEXT: v_lshr_b64 v[38:39], v[14:15], 16
-; SI-NEXT: v_lshr_b64 v[42:43], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v39, v49
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v30
-; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v27
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[16:17], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[55:56], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[11:12], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[14:15], 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[0:1], v[26:27], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[48:49], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[22:23], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[7:8], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[48:49], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[51:52], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[20:21], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v61
-; SI-NEXT: v_mov_b32_e32 v49, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[28:29], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[0:1], v[60:61], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[41:42], v[2:3], 16
+; SI-NEXT: v_mov_b32_e32 v42, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v30, v31
+; SI-NEXT: v_mov_b32_e32 v22, v34
+; SI-NEXT: v_lshr_b64 v[33:34], v[33:34], 16
+; SI-NEXT: v_lshr_b64 v[31:32], v[46:47], 16
+; SI-NEXT: v_mov_b32_e32 v28, v0
+; SI-NEXT: v_lshr_b64 v[0:1], v[37:38], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, v19
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: .LBB101_5: ; %end
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v7
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v13
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v55
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v32
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v45
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v42
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v31
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v39
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v32, 0xffff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v41
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v17
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v4
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v22
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v56
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v57
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v50
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v21
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v38
+; SI-NEXT: v_and_b32_e32 v32, 0xffff, v61
; SI-NEXT: v_readlane_b32 s30, v63, 3
; SI-NEXT: v_readlane_b32 s31, v63, 4
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v24
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v37
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v41
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v2, v2, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v24
; SI-NEXT: v_or_b32_e32 v3, v3, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v24
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v56
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v23
; SI-NEXT: v_or_b32_e32 v7, v8, v7
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v29
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v35
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v8, v8, v12
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v9, v9, v12
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v10, v12, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v12, v12, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v13, v14
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v36
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v18, v18, v20
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v24
; SI-NEXT: v_or_b32_e32 v19, v19, v20
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v22
; SI-NEXT: v_or_b32_e32 v20, v20, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
; SI-NEXT: v_or_b32_e32 v21, v21, v23
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v33
; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v49
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
; SI-NEXT: v_or_b32_e32 v23, v25, v23
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v52
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v47
+; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v26, v26, v29
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v35
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v27, v27, v29
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v51
+; SI-NEXT: v_or_b32_e32 v28, v29, v28
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v44
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -213202,52 +213355,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26
-; SI-NEXT: v_or_b32_e32 v25, v29, v25
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v28
-; SI-NEXT: v_or_b32_e32 v26, v26, v29
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v35
-; SI-NEXT: v_or_b32_e32 v27, v27, v29
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v30
-; SI-NEXT: v_or_b32_e32 v28, v29, v28
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v29, v32, v29
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v36
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -216132,7 +216249,132 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(3)
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v4
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v0
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v30
; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v29
; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v28
@@ -216159,357 +216401,223 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v4
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v60
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr62
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB102_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v58
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v59
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v60
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v61
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v63
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v33
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v34
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v35
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v37
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v38
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v39
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v48
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v49
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v51
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v52
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v54
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v55
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v40
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v21
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v42
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v43
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v25
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v47
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v57
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v30
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v59
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v61
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr7
@@ -216536,7 +216644,11 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; kill: killed $vgpr34
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr36
@@ -216561,125 +216673,129 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: .LBB102_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB102_4
; SI-NEXT: ; %bb.3: ; %cmp.true
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v61
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v61
-; SI-NEXT: v_cvt_f32_f16_e32 v33, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v59
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v58
-; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
-; SI-NEXT: v_add_f32_e32 v59, 0x38000000, v33
-; SI-NEXT: v_cvt_f16_f32_e32 v33, v31
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v30
-; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v29
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v57
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v59
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v57, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v28
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v56
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v56, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v27
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v47
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v47, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v26
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v46
+; SI-NEXT: v_add_f32_e32 v59, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v30
+; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
+; SI-NEXT: v_add_f32_e32 v58, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v29
+; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v57
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_add_f32_e32 v46, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v25
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v45
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v45, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v24
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v44
+; SI-NEXT: v_add_f32_e32 v57, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v28
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v56
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v44, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v43
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_add_f32_e32 v43, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v42
-; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
-; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v21
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v41
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v40
+; SI-NEXT: v_add_f32_e32 v56, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v47
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v47, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v26
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v46
+; SI-NEXT: v_cvt_f32_f16_e32 v33, v33
+; SI-NEXT: v_add_f32_e32 v46, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v25
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v45
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
-; SI-NEXT: v_add_f32_e32 v40, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v19
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v55
+; SI-NEXT: v_add_f32_e32 v45, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v44
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v18
-; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v54
+; SI-NEXT: v_add_f32_e32 v44, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v23
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v43
+; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
+; SI-NEXT: v_add_f32_e32 v43, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v22
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v42
+; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
+; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v21
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v41
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v53
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_add_f32_e32 v53, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v52
+; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v20
+; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v40
; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
-; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v51
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v51, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v50
+; SI-NEXT: v_add_f32_e32 v40, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v19
+; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v55
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v50, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v49
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v48
+; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v18
+; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v54
+; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
+; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v53
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_add_f32_e32 v53, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v52
; SI-NEXT: v_cvt_f32_f16_e32 v34, v34
-; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v60
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v11
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v58
-; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
+; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v51
+; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33
+; SI-NEXT: v_add_f32_e32 v51, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v50
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v58, 0x38000000, v60
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v50, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v49
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v48
; SI-NEXT: v_cvt_f32_f16_e32 v6, v6
+; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v61, v11
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v62, v63
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
+; SI-NEXT: v_cvt_f16_f32_e32 v33, v33
+; SI-NEXT: v_add_f32_e32 v62, 0x38000000, v62
+; SI-NEXT: v_cvt_f16_f32_e32 v62, v62
; SI-NEXT: v_cvt_f32_f16_e32 v35, v35
+; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_cvt_f32_f16_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
; SI-NEXT: v_cvt_f32_f16_e32 v36, v36
; SI-NEXT: v_add_f32_e32 v34, 0x38000000, v34
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
@@ -216709,8 +216825,9 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v38, v38
; SI-NEXT: v_add_f32_e32 v39, 0x38000000, v39
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: v_add_f32_e32 v61, 0x38000000, v61
; SI-NEXT: v_cvt_f16_f32_e32 v39, v39
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v58
+; SI-NEXT: v_cvt_f16_f32_e32 v61, v61
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v48, v48
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
@@ -216728,409 +216845,429 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f16_f32_e32 v55, v55
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v61, v61
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v62, v62
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v63, v63
; SI-NEXT: v_cvt_f16_f32_e32 v40, v40
-; SI-NEXT: v_add_f32_e32 v61, 0x38000000, v61
-; SI-NEXT: v_add_f32_e32 v62, 0x38000000, v62
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v46
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: v_cvt_f16_f32_e32 v56, v56
+; SI-NEXT: v_cvt_f32_f16_e32 v60, v60
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v57, v57
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v63, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v58, v58
; SI-NEXT: v_add_f32_e32 v63, 0x38000000, v63
; SI-NEXT: v_cvt_f16_f32_e32 v63, v63
-; SI-NEXT: v_cvt_f16_f32_e32 v62, v62
-; SI-NEXT: v_cvt_f16_f32_e32 v61, v61
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v60, 0x38000000, v60
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
+; SI-NEXT: v_cvt_f16_f32_e32 v60, v60
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v63
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v61
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v60, v60
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v33
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v60, 0x38000000, v60
-; SI-NEXT: v_cvt_f16_f32_e32 v60, v60
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v60
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v34
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v35
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v37
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v38
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v39
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v61
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v48
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v49
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v51
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v52
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v54
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v55
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v40
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v20
-; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v41
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v42
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v43
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v46, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v44
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v45
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v46
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v26
-; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v57
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v47
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v59
-; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
-; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v57
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v59, v59
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v30
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v59
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v59
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: .LBB102_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e32 v32, 1.0, v62
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v6
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v8
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v6
; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v10
+; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12
; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9
+; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16
; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v8
+; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18
+; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23
+; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v10
-; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17
-; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12
+; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20
+; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14
+; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16
-; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26
+; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17
+; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18
+; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19
+; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
+; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27
; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28
+; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
+; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v32, 1.0, v32
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_alignbit_b32 v1, v1, v2, 16
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; SI-NEXT: v_alignbit_b32 v2, v2, v3, 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_alignbit_b32 v3, v3, v4, 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_alignbit_b32 v4, v4, v5, 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_alignbit_b32 v5, v5, v6, 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v6, 1.0, v6
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_alignbit_b32 v6, v6, v7, 16
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_alignbit_b32 v7, v7, v8, 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v8, 1.0, v8
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_alignbit_b32 v8, v8, v9, 16
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_alignbit_b32 v9, v9, v10, 16
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v10, 1.0, v10
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_alignbit_b32 v10, v10, v11, 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_alignbit_b32 v11, v11, v12, 16
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_alignbit_b32 v12, v12, v13, 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_alignbit_b32 v13, v13, v14, 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_alignbit_b32 v14, v14, v15, 16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: v_alignbit_b32 v15, v15, v16, 16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_alignbit_b32 v16, v16, v17, 16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: v_alignbit_b32 v17, v17, v18, 16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_alignbit_b32 v18, v18, v19, 16
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
; SI-NEXT: v_alignbit_b32 v19, v19, v20, 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
; SI-NEXT: v_alignbit_b32 v20, v20, v21, 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
@@ -217140,62 +217277,49 @@ define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: v_alignbit_b32 v22, v22, v23, 16
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
; SI-NEXT: v_alignbit_b32 v23, v23, v24, 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
; SI-NEXT: v_alignbit_b32 v24, v24, v25, 16
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
; SI-NEXT: v_alignbit_b32 v25, v25, v26, 16
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
; SI-NEXT: v_alignbit_b32 v26, v26, v27, 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
; SI-NEXT: v_alignbit_b32 v27, v27, v28, 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_alignbit_b32 v28, v28, v29, 16
-; SI-NEXT: v_mul_f32_e32 v29, 1.0, v63
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
; SI-NEXT: v_alignbit_b32 v29, v29, v30, 16
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v31
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_alignbit_b32 v30, v30, v31, 16
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31
-; SI-NEXT: v_alignbit_b32 v30, v30, v31, 16
-; SI-NEXT: v_mul_f32_e32 v31, 1.0, v33
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
; SI-NEXT: v_alignbit_b32 v31, v31, v32, 16
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -217439,8 +217563,8 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -217497,14 +217621,6 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_lshr_b32 s7, s17, 16
; SI-NEXT: v_writelane_b32 v62, s6, 0
; SI-NEXT: s_lshr_b32 s8, s18, 16
-; SI-NEXT: v_writelane_b32 v62, s7, 1
-; SI-NEXT: s_lshr_b32 s9, s19, 16
-; SI-NEXT: v_writelane_b32 v62, s8, 2
-; SI-NEXT: s_lshr_b32 s10, s20, 16
-; SI-NEXT: v_writelane_b32 v62, s9, 3
-; SI-NEXT: s_lshr_b32 s11, s21, 16
-; SI-NEXT: v_writelane_b32 v62, s10, 4
-; SI-NEXT: s_lshr_b32 s12, s22, 16
; SI-NEXT: v_readfirstlane_b32 s49, v17
; SI-NEXT: v_readfirstlane_b32 s37, v16
; SI-NEXT: v_readfirstlane_b32 s4, v15
@@ -217523,7 +217639,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readfirstlane_b32 s56, v2
; SI-NEXT: v_readfirstlane_b32 s46, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
-; SI-NEXT: v_writelane_b32 v62, s11, 5
+; SI-NEXT: v_writelane_b32 v62, s7, 1
; SI-NEXT: s_lshr_b32 s43, s29, 16
; SI-NEXT: s_lshr_b32 s42, s28, 16
; SI-NEXT: s_lshr_b32 s41, s27, 16
@@ -217531,6 +217647,10 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_lshr_b32 s15, s25, 16
; SI-NEXT: s_lshr_b32 s14, s24, 16
; SI-NEXT: s_lshr_b32 s13, s23, 16
+; SI-NEXT: s_lshr_b32 s12, s22, 16
+; SI-NEXT: s_lshr_b32 s11, s21, 16
+; SI-NEXT: s_lshr_b32 s10, s20, 16
+; SI-NEXT: s_lshr_b32 s9, s19, 16
; SI-NEXT: s_lshr_b32 s52, s49, 16
; SI-NEXT: s_lshr_b32 s48, s37, 16
; SI-NEXT: s_lshr_b32 s35, s4, 16
@@ -217550,9 +217670,9 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_lshr_b32 s47, s46, 16
; SI-NEXT: s_lshr_b32 s45, s44, 16
; SI-NEXT: v_readfirstlane_b32 s5, v18
-; SI-NEXT: v_writelane_b32 v62, s12, 6
+; SI-NEXT: v_writelane_b32 v62, s8, 2
; SI-NEXT: s_cmp_lg_u32 s5, 0
-; SI-NEXT: v_writelane_b32 v62, s13, 7
+; SI-NEXT: v_writelane_b32 v62, s9, 3
; SI-NEXT: s_cbranch_scc0 .LBB103_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshl_b32 s5, s16, 16
@@ -217607,10 +217727,14 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_writelane_b32 v62, s5, 9
; SI-NEXT: s_lshl_b32 s5, s42, 16
; SI-NEXT: v_writelane_b32 v62, s5, 8
-; SI-NEXT: s_lshl_b32 s87, s29, 16
-; SI-NEXT: s_lshl_b32 s96, s43, 16
-; SI-NEXT: s_lshl_b32 s97, s44, 16
-; SI-NEXT: s_lshl_b32 s98, s45, 16
+; SI-NEXT: s_lshl_b32 s5, s29, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 7
+; SI-NEXT: s_lshl_b32 s5, s43, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 6
+; SI-NEXT: s_lshl_b32 s5, s44, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 5
+; SI-NEXT: s_lshl_b32 s5, s45, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 4
; SI-NEXT: s_lshl_b32 s99, s46, 16
; SI-NEXT: s_lshl_b32 s30, s47, 16
; SI-NEXT: s_lshl_b32 s31, s56, 16
@@ -217623,29 +217747,29 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_lshl_b32 s54, s63, 16
; SI-NEXT: s_lshl_b32 s55, s72, 16
; SI-NEXT: s_lshl_b32 s64, s73, 16
-; SI-NEXT: s_lshl_b32 s6, s74, 16
-; SI-NEXT: s_lshl_b32 s65, s75, 16
-; SI-NEXT: s_lshl_b32 s7, s76, 16
-; SI-NEXT: s_lshl_b32 s66, s77, 16
-; SI-NEXT: s_lshl_b32 s67, s78, 16
-; SI-NEXT: s_lshl_b32 s68, s79, 16
-; SI-NEXT: s_lshl_b32 s8, s88, 16
-; SI-NEXT: s_lshl_b32 s69, s89, 16
-; SI-NEXT: s_lshl_b32 s70, s90, 16
-; SI-NEXT: s_lshl_b32 s9, s91, 16
-; SI-NEXT: s_lshl_b32 s71, s92, 16
-; SI-NEXT: s_lshl_b32 s80, s93, 16
-; SI-NEXT: s_lshl_b32 s10, s94, 16
-; SI-NEXT: s_lshl_b32 s81, s95, 16
-; SI-NEXT: s_lshl_b32 s82, vcc_lo, 16
-; SI-NEXT: s_lshl_b32 s11, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s65, s74, 16
+; SI-NEXT: s_lshl_b32 s66, s75, 16
+; SI-NEXT: s_lshl_b32 s67, s76, 16
+; SI-NEXT: s_lshl_b32 s68, s77, 16
+; SI-NEXT: s_lshl_b32 s69, s78, 16
+; SI-NEXT: s_lshl_b32 s70, s79, 16
+; SI-NEXT: s_lshl_b32 s71, s88, 16
+; SI-NEXT: s_lshl_b32 s80, s89, 16
+; SI-NEXT: s_lshl_b32 s81, s90, 16
+; SI-NEXT: s_lshl_b32 s82, s91, 16
+; SI-NEXT: s_lshl_b32 s6, s92, 16
+; SI-NEXT: s_lshl_b32 s83, s93, 16
+; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_lshl_b32 s84, s95, 16
+; SI-NEXT: s_lshl_b32 s85, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s86, vcc_hi, 16
; SI-NEXT: s_mov_b32 s34, s4
-; SI-NEXT: s_lshl_b32 s83, s4, 16
-; SI-NEXT: s_lshl_b32 s84, s35, 16
-; SI-NEXT: s_lshl_b32 s12, s37, 16
-; SI-NEXT: s_lshl_b32 s85, s48, 16
-; SI-NEXT: s_lshl_b32 s13, s49, 16
-; SI-NEXT: s_lshl_b32 s86, s52, 16
+; SI-NEXT: s_lshl_b32 s8, s4, 16
+; SI-NEXT: s_lshl_b32 s87, s35, 16
+; SI-NEXT: s_lshl_b32 s96, s37, 16
+; SI-NEXT: s_lshl_b32 s9, s48, 16
+; SI-NEXT: s_lshl_b32 s97, s49, 16
+; SI-NEXT: s_lshl_b32 s98, s52, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB103_3
; SI-NEXT: .LBB103_2:
@@ -217657,10 +217781,6 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr97
-; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr99
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr31
@@ -217674,26 +217794,34 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: ; implicit-def: $sgpr83
+; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr13
; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr87
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr97
+; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr6
@@ -217750,7 +217878,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_cvt_f32_f16_e32 v0, s52
; SI-NEXT: v_cvt_f32_f16_e32 v1, s49
; SI-NEXT: v_cvt_f32_f16_e32 v2, s48
-; SI-NEXT: v_readlane_b32 s4, v62, 7
+; SI-NEXT: v_readlane_b32 s4, v62, 3
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -217771,65 +217899,56 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v8, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, vcc_hi
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v0, s34
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v1, vcc_hi
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, vcc_lo
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, s95
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v43, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v42, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s93
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v0, s94
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s92
; SI-NEXT: v_cvt_f32_f16_e32 v1, s91
-; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v8, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s90
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v16, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s89
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s88
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v56, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s79
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v45, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v57, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s78
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v46, v1
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v45
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v0
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v43
+; SI-NEXT: v_cvt_f16_f32_e32 v58, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s77
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v59, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s76
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v47
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v53, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s75
@@ -217909,11 +218028,6 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_cvt_f16_f32_e32 v20, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s25
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f16_f32_e32 v19, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s14
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -217921,41 +218035,37 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_cvt_f32_f16_e32 v0, s24
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v17, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s4
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s13
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v54, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s23
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_readlane_b32 s4, v62, 6
; SI-NEXT: v_cvt_f16_f32_e32 v15, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s4
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s12
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v14, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s22
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_readlane_b32 s4, v62, 5
; SI-NEXT: v_cvt_f16_f32_e32 v13, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s4
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s11
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v12, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s21
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_readlane_b32 s4, v62, 4
; SI-NEXT: v_cvt_f16_f32_e32 v11, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s4
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s10
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v10, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s20
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_readlane_b32 s4, v62, 3
; SI-NEXT: v_cvt_f16_f32_e32 v9, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s4
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v55, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s19
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_readlane_b32 s4, v62, 2
-; SI-NEXT: v_cvt_f16_f32_e32 v40, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v55, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s4
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v6, v0
@@ -217968,21 +218078,29 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readlane_b32 s4, v62, 0
; SI-NEXT: v_cvt_f32_f16_e32 v1, s17
; SI-NEXT: v_cvt_f32_f16_e32 v2, s4
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v0
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v57
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v1
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v42
+; SI-NEXT: v_cvt_f16_f32_e32 v40, v1
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v45
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v54
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v34
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v42
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v41
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v40
; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
@@ -217990,12 +218108,8 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v54
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
@@ -218011,7 +218125,6 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v34
; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
@@ -218023,21 +218136,22 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52
; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v46
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v57
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v8
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v43
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v34
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v34
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
@@ -218058,6 +218172,14 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_branch .LBB103_6
; SI-NEXT: .LBB103_5:
+; SI-NEXT: v_readlane_b32 s4, v62, 4
+; SI-NEXT: v_mov_b32_e32 v29, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 5
+; SI-NEXT: v_mov_b32_e32 v28, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 6
+; SI-NEXT: v_mov_b32_e32 v27, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 7
+; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_readlane_b32 s4, v62, 8
; SI-NEXT: v_mov_b32_e32 v25, s4
; SI-NEXT: v_readlane_b32 s4, v62, 9
@@ -218093,57 +218215,55 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readlane_b32 s4, v62, 24
; SI-NEXT: v_mov_b32_e32 v9, s4
; SI-NEXT: v_readlane_b32 s4, v62, 25
-; SI-NEXT: v_mov_b32_e32 v41, s4
+; SI-NEXT: v_mov_b32_e32 v16, s4
; SI-NEXT: v_readlane_b32 s4, v62, 26
-; SI-NEXT: v_mov_b32_e32 v0, s86
-; SI-NEXT: v_mov_b32_e32 v42, s4
+; SI-NEXT: v_mov_b32_e32 v41, s4
; SI-NEXT: v_readlane_b32 s4, v62, 27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s13
+; SI-NEXT: v_mov_b32_e32 v0, s98
; SI-NEXT: v_mov_b32_e32 v6, s4
; SI-NEXT: v_readlane_b32 s4, v62, 28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s85
+; SI-NEXT: v_mov_b32_e32 v0, s97
; SI-NEXT: v_mov_b32_e32 v5, s4
; SI-NEXT: v_readlane_b32 s4, v62, 29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s12
+; SI-NEXT: v_mov_b32_e32 v0, s9
; SI-NEXT: v_mov_b32_e32 v4, s4
; SI-NEXT: v_readlane_b32 s4, v62, 30
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s84
+; SI-NEXT: v_mov_b32_e32 v0, s96
; SI-NEXT: v_mov_b32_e32 v3, s4
; SI-NEXT: v_readlane_b32 s4, v62, 31
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s83
+; SI-NEXT: v_mov_b32_e32 v0, s87
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_readlane_b32 s4, v62, 32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s82
+; SI-NEXT: v_mov_b32_e32 v0, s8
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s4, v62, 33
-; SI-NEXT: v_mov_b32_e32 v43, s11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v45, s81
-; SI-NEXT: v_mov_b32_e32 v44, s10
-; SI-NEXT: v_mov_b32_e32 v47, s80
-; SI-NEXT: v_mov_b32_e32 v46, s71
-; SI-NEXT: v_mov_b32_e32 v57, s9
-; SI-NEXT: v_mov_b32_e32 v56, s70
-; SI-NEXT: v_mov_b32_e32 v59, s69
-; SI-NEXT: v_mov_b32_e32 v58, s8
-; SI-NEXT: v_mov_b32_e32 v61, s68
-; SI-NEXT: v_mov_b32_e32 v60, s67
-; SI-NEXT: v_mov_b32_e32 v53, s66
-; SI-NEXT: v_mov_b32_e32 v52, s7
-; SI-NEXT: v_mov_b32_e32 v51, s65
-; SI-NEXT: v_mov_b32_e32 v50, s6
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v43, s86
+; SI-NEXT: v_mov_b32_e32 v42, s85
+; SI-NEXT: v_mov_b32_e32 v45, s84
+; SI-NEXT: v_mov_b32_e32 v44, s7
+; SI-NEXT: v_mov_b32_e32 v47, s83
+; SI-NEXT: v_mov_b32_e32 v46, s6
+; SI-NEXT: v_mov_b32_e32 v57, s82
+; SI-NEXT: v_mov_b32_e32 v56, s81
+; SI-NEXT: v_mov_b32_e32 v59, s80
+; SI-NEXT: v_mov_b32_e32 v58, s71
+; SI-NEXT: v_mov_b32_e32 v61, s70
+; SI-NEXT: v_mov_b32_e32 v60, s69
+; SI-NEXT: v_mov_b32_e32 v53, s68
+; SI-NEXT: v_mov_b32_e32 v52, s67
+; SI-NEXT: v_mov_b32_e32 v51, s66
+; SI-NEXT: v_mov_b32_e32 v50, s65
; SI-NEXT: v_mov_b32_e32 v49, s64
; SI-NEXT: v_mov_b32_e32 v48, s55
; SI-NEXT: v_mov_b32_e32 v39, s54
@@ -218156,10 +218276,6 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_mov_b32_e32 v32, s31
; SI-NEXT: v_mov_b32_e32 v31, s30
; SI-NEXT: v_mov_b32_e32 v30, s99
-; SI-NEXT: v_mov_b32_e32 v29, s98
-; SI-NEXT: v_mov_b32_e32 v28, s97
-; SI-NEXT: v_mov_b32_e32 v27, s96
-; SI-NEXT: v_mov_b32_e32 v26, s87
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: .LBB103_6: ; %end
@@ -218169,12 +218285,12 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v42
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v9
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0
@@ -218182,17 +218298,18 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v13
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v15
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v16
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v0
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v17
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v0
@@ -218239,15 +218356,14 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v0
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v43
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v41
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_mul_f32_e32 v7, 1.0, v4
; SI-NEXT: v_lshr_b64 v[33:34], v[34:35], 16
; SI-NEXT: v_lshr_b64 v[34:35], v[2:3], 16
; SI-NEXT: v_lshr_b64 v[2:3], v[7:8], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_mul_f32_e32 v9, 1.0, v40
; SI-NEXT: v_mul_f32_e32 v19, 1.0, v54
; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
@@ -218266,6 +218382,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_mul_f32_e32 v56, 1.0, v56
; SI-NEXT: v_mul_f32_e32 v46, 1.0, v46
; SI-NEXT: v_mul_f32_e32 v44, 1.0, v44
+; SI-NEXT: v_mul_f32_e32 v42, 1.0, v42
; SI-NEXT: v_readlane_b32 s30, v63, 34
; SI-NEXT: v_readlane_b32 s31, v63, 35
; SI-NEXT: v_readlane_b32 s99, v63, 33
@@ -218303,25 +218420,26 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_mul_f32_e32 v42, 1.0, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_lshr_b64 v[4:5], v[5:6], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[4:5], v[5:6], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_mul_f32_e32 v40, 1.0, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16
; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16
@@ -218361,10 +218479,6 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v54, 1.0, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16
@@ -218379,8 +218493,8 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_mov_b32_e32 v0, v33
; SI-NEXT: v_mov_b32_e32 v1, v34
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -218933,306 +219047,304 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
-; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v19
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v1
+; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v30
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v20
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v20
+; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v15
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v21
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v3
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v17
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v11
+; SI-NEXT: ; kill: killed $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v29
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v29
+; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v25
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v25
+; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v23
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v23
+; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v19
+; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v19
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v18
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v11
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v8
+; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v21
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v18
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v29
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v25
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v25
-; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v17
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v30
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v30
-; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v28
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v28
-; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v27
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v27
-; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v23
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v23
-; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v20
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v20
-; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v32
-; SI-NEXT: v_mul_f32_e32 v32, 1.0, v6
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v8
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v11
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v34
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v13
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v18
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v15
-; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v17
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v5
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v26
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: v_mul_f32_e32 v21, 1.0, v4
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v5
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v41
+; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v21
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v7
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v28
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v28
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v27
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v27
+; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v24
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v24
+; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v22
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v22
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v36
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v32, 1.0, v6
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v8
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v11
+; SI-NEXT: v_mul_f32_e32 v11, 1.0, v25
+; SI-NEXT: v_mul_f32_e32 v25, 1.0, v33
+; SI-NEXT: v_mul_f32_e32 v33, 1.0, v18
+; SI-NEXT: v_mul_f32_e32 v18, 1.0, v40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_mul_f32_e32 v17, 1.0, v4
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v23
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v38
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v13
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v7
; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v29
-; SI-NEXT: ; kill: killed $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v35
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v9
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v26
; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v17
-; SI-NEXT: ; kill: killed $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v10
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v20
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v9
+; SI-NEXT: ; kill: killed $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v12
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v31
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v31
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v25
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v21
; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v62
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v34
+; SI-NEXT: ; kill: killed $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; SI-NEXT: v_mul_f32_e32 v38, 1.0, v38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v48, 1.0, v48
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v37
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v40
-; SI-NEXT: v_mul_f32_e32 v7, 1.0, v35
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v39
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v19
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v37
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v4, 1.0, v10
-; SI-NEXT: v_mul_f32_e32 v9, 1.0, v20
-; SI-NEXT: v_mul_f32_e32 v37, 1.0, v12
-; SI-NEXT: v_mul_f32_e32 v41, 1.0, v27
-; SI-NEXT: v_mul_f32_e32 v11, 1.0, v14
-; SI-NEXT: v_mul_f32_e32 v13, 1.0, v33
-; SI-NEXT: v_mul_f32_e32 v36, 1.0, v16
-; SI-NEXT: v_mul_f32_e32 v29, 1.0, v63
+; SI-NEXT: v_mul_f32_e32 v9, 1.0, v36
+; SI-NEXT: v_mul_f32_e32 v39, 1.0, v12
+; SI-NEXT: v_mul_f32_e32 v38, 1.0, v22
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v14
; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v61
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v60
+; SI-NEXT: v_mul_f32_e32 v34, 1.0, v16
+; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27
+; SI-NEXT: v_mul_f32_e32 v41, 1.0, v41
+; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29
; SI-NEXT: v_mul_f32_e32 v43, 1.0, v43
; SI-NEXT: v_mul_f32_e32 v42, 1.0, v42
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v59
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v58
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v30
; SI-NEXT: v_mul_f32_e32 v45, 1.0, v45
; SI-NEXT: v_mul_f32_e32 v44, 1.0, v44
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v22
-; SI-NEXT: v_mul_f32_e32 v35, 1.0, v47
-; SI-NEXT: v_mul_f32_e32 v47, 1.0, v46
-; SI-NEXT: v_mul_f32_e32 v46, 1.0, v30
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v24
-; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28
+; SI-NEXT: v_mul_f32_e32 v26, 1.0, v28
+; SI-NEXT: v_mul_f32_e32 v37, 1.0, v63
+; SI-NEXT: v_mul_f32_e32 v47, 1.0, v47
+; SI-NEXT: v_mul_f32_e32 v46, 1.0, v46
+; SI-NEXT: v_mul_f32_e32 v14, 1.0, v62
+; SI-NEXT: v_mul_f32_e32 v12, 1.0, v61
; SI-NEXT: v_mul_f32_e32 v57, 1.0, v57
; SI-NEXT: v_mul_f32_e32 v56, 1.0, v56
-; SI-NEXT: v_mul_f32_e32 v20, 1.0, v26
-; SI-NEXT: v_mul_f32_e32 v27, 1.0, v55
-; SI-NEXT: v_mul_f32_e32 v59, 1.0, v54
-; SI-NEXT: v_mul_f32_e32 v58, 1.0, v53
-; SI-NEXT: v_mul_f32_e32 v26, 1.0, v52
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v51
-; SI-NEXT: v_mul_f32_e32 v61, 1.0, v50
-; SI-NEXT: v_mul_f32_e32 v60, 1.0, v49
-; SI-NEXT: v_mul_f32_e32 v22, 1.0, v48
-; SI-NEXT: v_mul_f32_e32 v18, 1.0, v39
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v60
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v59
+; SI-NEXT: v_mul_f32_e32 v59, 1.0, v58
+; SI-NEXT: v_mul_f32_e32 v58, 1.0, v55
+; SI-NEXT: v_mul_f32_e32 v36, 1.0, v54
+; SI-NEXT: v_mul_f32_e32 v35, 1.0, v53
+; SI-NEXT: v_mul_f32_e32 v61, 1.0, v52
+; SI-NEXT: v_mul_f32_e32 v60, 1.0, v51
+; SI-NEXT: v_mul_f32_e32 v22, 1.0, v50
+; SI-NEXT: v_mul_f32_e32 v30, 1.0, v49
; SI-NEXT: v_mul_f32_e32 v63, 1.0, v31
-; SI-NEXT: v_mul_f32_e32 v62, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v62, 1.0, v24
+; SI-NEXT: ; kill: killed $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; kill: killed $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; kill: killed $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; kill: killed $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; kill: killed $vgpr15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; kill: killed $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB104_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v63
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
@@ -219240,63 +219352,63 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v0
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; kill: killed $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v5
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v7
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v9
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; kill: killed $vgpr4
; SI-NEXT: ; implicit-def: $vgpr4
@@ -219312,193 +219424,191 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v0
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v0
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v11
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v18
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v35
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v47
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v14
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v57
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v10
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v8
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v58
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: ; kill: killed $vgpr8
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v61
; SI-NEXT: ; kill: killed $vgpr8
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v60
; SI-NEXT: ; kill: killed $vgpr8
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
; SI-NEXT: ; kill: killed $vgpr8
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v18
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
; SI-NEXT: ; kill: killed $vgpr8
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
; SI-NEXT: ; kill: killed $vgpr8
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: .LBB104_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB104_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v38
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v19
-; SI-NEXT: v_alignbit_b32 v0, v15, v0, 16
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v15
+; SI-NEXT: v_alignbit_b32 v0, v19, v0, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
@@ -219506,15 +219616,15 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; SI-NEXT: v_alignbit_b32 v0, v2, v0, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v21
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v3
; SI-NEXT: v_alignbit_b32 v0, v2, v0, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2
@@ -219522,7 +219632,7 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5
; SI-NEXT: v_alignbit_b32 v0, v2, v0, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v6
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v2
@@ -219530,154 +219640,163 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7
; SI-NEXT: v_alignbit_b32 v0, v2, v0, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v4
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9
; SI-NEXT: v_alignbit_b32 v0, v2, v0, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2
; SI-NEXT: v_alignbit_b32 v0, v4, v0, 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v11
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4
; SI-NEXT: v_alignbit_b32 v0, v6, v0, 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v6
; SI-NEXT: v_alignbit_b32 v0, v11, v0, 16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v33
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v11
; SI-NEXT: v_alignbit_b32 v0, v13, v0, 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v10
-; SI-NEXT: v_alignbit_b32 v0, v12, v0, 16
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v35
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v8
-; SI-NEXT: v_alignbit_b32 v0, v12, v0, 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v13
+; SI-NEXT: v_alignbit_b32 v0, v16, v0, 16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v37
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_alignbit_b32 v0, v13, v0, 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
+; SI-NEXT: v_alignbit_b32 v0, v17, v0, 16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v12
; SI-NEXT: v_alignbit_b32 v0, v14, v0, 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v26
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_alignbit_b32 v0, v15, v0, 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v8
+; SI-NEXT: v_alignbit_b32 v0, v10, v0, 16
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v35
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10
+; SI-NEXT: v_alignbit_b32 v0, v14, v0, 16
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v22
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_alignbit_b32 v0, v16, v0, 16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; SI-NEXT: v_alignbit_b32 v0, v17, v0, 16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v18, v16, v0, 16
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v18, v17, v0, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v60
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v61
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v20, v16, v15, 16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v61
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v17, v14, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v58
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v59
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v21, v16, v15, 16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v59
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v26, v17, v14, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v56
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v57
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v22, v16, v15, 16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v57
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v27, v17, v14, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v46
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v46
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v29, v17, v14, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v45
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v24, v16, v15, 16
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v30, v17, v16, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v44
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v43
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v26, v16, v15, 16
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v32, v17, v16, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v42
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v25
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v41
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v27, v16, v15, 16
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v25, v17, v16, 16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
@@ -219687,215 +219806,199 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_mov_b32_e32 v40, v18
; SI-NEXT: v_alignbit_b32 v0, v18, v0, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v33, v17, v16, 16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v17
+; SI-NEXT: v_alignbit_b32 v28, v49, v16, 16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v17
+; SI-NEXT: v_alignbit_b32 v20, v50, v16, 16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_alignbit_b32 v33, v50, v16, 16
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v17
+; SI-NEXT: v_alignbit_b32 v23, v51, v16, 16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_alignbit_b32 v34, v51, v16, 16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v17
+; SI-NEXT: v_alignbit_b32 v21, v52, v16, 16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_alignbit_b32 v25, v52, v16, 16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_alignbit_b32 v28, v39, v15, 16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v17
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_alignbit_b32 v23, v53, v16, 16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_alignbit_b32 v31, v48, v15, 16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; SI-NEXT: v_alignbit_b32 v24, v53, v16, 16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_alignbit_b32 v40, v54, v16, 16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v40, v1, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v17
+; SI-NEXT: v_alignbit_b32 v19, v54, v16, 16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v19, v1, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v23, v3, 16
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v24, v3, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v5, 16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_alignbit_b32 v1, v21, v5, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v34, v7, 16
-; SI-NEXT: v_alignbit_b32 v15, v49, v15, 16
+; SI-NEXT: v_alignbit_b32 v1, v23, v7, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v9, 16
+; SI-NEXT: v_alignbit_b32 v1, v20, v9, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v15, v2, 16
+; SI-NEXT: v_alignbit_b32 v1, v28, v2, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v4, 16
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v33, v4, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v25, v6, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v32, v11, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_alignbit_b32 v17, v55, v16, 16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v19
-; SI-NEXT: v_mov_b32_e32 v19, v28
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v19, v6, 16
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v30, v13, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v27, v11, 16
+; SI-NEXT: v_alignbit_b32 v1, v29, v14, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v26, v10, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v24, v8, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v22, v12, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v27, v12, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v21, v13, 16
-; SI-NEXT: v_alignbit_b32 v16, v17, v16, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v8, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v20, v14, 16
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v22, v10, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v17
+; SI-NEXT: v_alignbit_b32 v31, v55, v16, 16
+; SI-NEXT: v_alignbit_b32 v15, v31, v15, 16
; SI-NEXT: .LBB104_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v55
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v53
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v52
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v51
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v50
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v49
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v39
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT: s_waitcnt vmcnt(2)
@@ -219903,139 +220006,148 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v40
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v19
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v23
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v25
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v34
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v33
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v31
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v19
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v40
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v31, v31, v32
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v64bf16_to_v64i16:
@@ -222251,7 +222363,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -222273,10 +222385,14 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v63, s36, 2
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
-; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s11, s26, 16
-; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s28, 16
+; SI-NEXT: s_and_b32 s28, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s15, s24, 16
+; SI-NEXT: s_and_b32 s24, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s23, s23, 16
; SI-NEXT: v_readfirstlane_b32 s42, v17
; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: v_readfirstlane_b32 s46, v15
@@ -222295,24 +222411,21 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: v_readfirstlane_b32 s30, v1
; SI-NEXT: v_readfirstlane_b32 s34, v0
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s19
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s7, s28, 16
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s27, 16
+; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s26, 16
; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s25, 16
-; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s15, s24, 16
-; SI-NEXT: s_and_b32 s24, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s23, s23, 16
; SI-NEXT: s_and_b32 s25, s22, 0xffff0000
; SI-NEXT: s_lshl_b32 s22, s22, 16
+; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s21, s21, 16
; SI-NEXT: s_and_b32 s27, s20, 0xffff0000
; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_and_b32 s28, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s29, s18, 0xffff0000
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff0000
@@ -222356,963 +222469,976 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s21
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23
; SI-NEXT: s_cmp_lg_u32 s36, 0
; SI-NEXT: v_mul_f32_e64 v21, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s41
-; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s41
; SI-NEXT: v_mul_f32_e64 v56, 1.0, s17
; SI-NEXT: v_mul_f32_e64 v41, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s29
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s21
; SI-NEXT: v_mul_f32_e64 v44, 1.0, s26
; SI-NEXT: v_mul_f32_e64 v28, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s23
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v52, 1.0, s25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s12
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s30
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v62, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s63
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, vcc_hi
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s93
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s91
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s89
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s79
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s77
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s75
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s61
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s59
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s57
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s47
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v30, 1.0, s42
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s43
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s43
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB105_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v44
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v52
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v51
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v51
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v40
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v35
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v34
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v43
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v10
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v60
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v42
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v56
+; SI-NEXT: v_mov_b32_e32 v51, v48
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v53
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v16
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v45
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v41
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v61
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v36
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v33
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v61
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v44
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v55
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v28
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v49
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v46
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v50
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v6
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v32
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v39
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v30
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v36
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v47
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v37
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v38
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v32
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v50
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v37
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v32, v9
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v57
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v31, v12
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v57
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v52
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v48
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v35
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v43
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v39
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v58
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v42
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v34
+; SI-NEXT: v_mov_b32_e32 v34, v20
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v47
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v30
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v26
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v33
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v19
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v60
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v54
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
+; SI-NEXT: v_mov_b32_e32 v60, v55
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v48
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v45
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v7
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v18
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v38
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v37
; SI-NEXT: s_branch .LBB105_3
; SI-NEXT: .LBB105_2:
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v31, v12
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_mov_b32_e32 v32, v9
+; SI-NEXT: v_mov_b32_e32 v51, v48
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v60, v55
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v34, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: .LBB105_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v11, v54
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v3, v59
+; SI-NEXT: v_mov_b32_e32 v13, v60
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v5, v61
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
-; SI-NEXT: v_mov_b32_e32 v15, v10
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v10, v8
+; SI-NEXT: v_mov_b32_e32 v0, v30
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v23, v53
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v61, v21
; SI-NEXT: s_cbranch_scc1 .LBB105_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v18
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
+; SI-NEXT: v_mov_b32_e32 v30, v32
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v0
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
+; SI-NEXT: v_mov_b32_e32 v12, v31
+; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v51, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v4
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v11
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v18
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v47, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v53
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v5
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v44
-; SI-NEXT: v_add_f32_e32 v47, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v2
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50
-; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v25
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[13:14], v[21:22], 16
-; SI-NEXT: v_lshr_b64 v[15:16], v[33:34], 16
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[51:52], v[51:52], 16
-; SI-NEXT: v_lshr_b64 v[33:34], v[35:36], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v7
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v57
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v41, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v62
+; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v43, 0x40c00000, v2
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v22, v46
-; SI-NEXT: v_mov_b32_e32 v21, v45
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_mov_b32_e32 v25, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v38
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v30
+; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v45
+; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v51
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v6
+; SI-NEXT: v_lshr_b64 v[36:37], v[39:40], 16
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v39, v45
+; SI-NEXT: v_mov_b32_e32 v40, v46
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v55
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v61, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v61
+; SI-NEXT: v_lshr_b64 v[4:5], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v38
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v55
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v30
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v29
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v30
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v26
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v25
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v42
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v54
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v54
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v53, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v53
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v3
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v1, v22
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; SI-NEXT: v_lshr_b64 v[3:4], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[4:5], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v24
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v39
-; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v42
-; SI-NEXT: v_lshr_b64 v[42:43], v[56:57], 16
+; SI-NEXT: v_lshr_b64 v[3:4], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v44, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v44
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v30
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v44
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0
-; SI-NEXT: v_lshr_b64 v[60:61], v[6:7], 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v17
-; SI-NEXT: v_lshr_b64 v[61:62], v[6:7], 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[4:5], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
+; SI-NEXT: v_lshr_b64 v[58:59], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v59, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v59
+; SI-NEXT: v_lshr_b64 v[50:51], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v18
-; SI-NEXT: v_lshr_b64 v[31:32], v[6:7], 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v60
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v19
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v14
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; SI-NEXT: v_mov_b32_e32 v3, v9
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v19
-; SI-NEXT: v_mov_b32_e32 v19, v47
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshr_b64 v[4:5], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
+; SI-NEXT: v_mov_b32_e32 v14, v55
+; SI-NEXT: v_mov_b32_e32 v28, v57
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v20
-; SI-NEXT: v_mov_b32_e32 v20, v48
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[5:6], v[47:48], 16
+; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v29
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v23
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v15
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v23
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[45:46], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[47:48], v[40:41], 16
-; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v53
-; SI-NEXT: v_lshr_b64 v[53:54], v[4:5], 16
-; SI-NEXT: v_mov_b32_e32 v48, v31
-; SI-NEXT: v_mov_b32_e32 v49, v51
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v24
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v24
-; SI-NEXT: v_mov_b32_e32 v24, v1
-; SI-NEXT: v_mov_b32_e32 v1, v11
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v36
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v2, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v18
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v17
-; SI-NEXT: v_lshr_b64 v[17:18], v[2:3], 16
-; SI-NEXT: v_lshr_b64 v[36:37], v[19:20], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v37, v42
-; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mov_b32_e32 v19, v17
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v16
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v16
+; SI-NEXT: v_mov_b32_e32 v16, v53
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v41
-; SI-NEXT: v_lshr_b64 v[40:41], v[58:59], 16
-; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v26
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v34
+; SI-NEXT: v_lshr_b64 v[34:35], v[31:32], 16
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v13
+; SI-NEXT: v_mov_b32_e32 v13, v54
+; SI-NEXT: v_mov_b32_e32 v55, v42
+; SI-NEXT: v_mov_b32_e32 v32, v19
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v15
+; SI-NEXT: v_mov_b32_e32 v15, v52
+; SI-NEXT: v_mov_b32_e32 v53, v44
+; SI-NEXT: v_mov_b32_e32 v1, v53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v52, v43
+; SI-NEXT: v_lshr_b64 v[52:53], v[52:53], 16
+; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v2
+; SI-NEXT: v_mov_b32_e32 v2, v55
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v17
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v17
+; SI-NEXT: v_mov_b32_e32 v31, v18
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v49
+; SI-NEXT: v_lshr_b64 v[48:49], v[21:22], 16
+; SI-NEXT: v_mov_b32_e32 v54, v41
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[8:9], v[26:27], 16
+; SI-NEXT: v_mov_b32_e32 v27, v56
+; SI-NEXT: v_lshr_b64 v[22:23], v[13:14], 16
+; SI-NEXT: v_lshr_b64 v[54:55], v[54:55], 16
+; SI-NEXT: v_lshr_b64 v[56:57], v[10:11], 16
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v61
+; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v59
+; SI-NEXT: v_lshr_b64 v[59:60], v[55:56], 16
+; SI-NEXT: v_mov_b32_e32 v23, v22
+; SI-NEXT: v_mov_b32_e32 v49, v48
+; SI-NEXT: v_mov_b32_e32 v55, v5
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, v14
+; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v12
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v59
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, v16
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshr_b64 v[42:43], v[17:18], 16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
+; SI-NEXT: v_mov_b32_e32 v43, v42
+; SI-NEXT: v_lshr_b64 v[41:42], v[41:42], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v1, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v57
-; SI-NEXT: v_lshr_b64 v[56:57], v[21:22], 16
-; SI-NEXT: v_lshr_b64 v[57:58], v[44:45], 16
-; SI-NEXT: v_lshr_b64 v[58:59], v[9:10], 16
-; SI-NEXT: v_mov_b32_e32 v21, v7
-; SI-NEXT: v_mov_b32_e32 v59, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v32
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshr_b64 v[45:46], v[17:18], 16
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v25
+; SI-NEXT: v_lshr_b64 v[25:26], v[27:28], 16
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v29, v3
+; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16
+; SI-NEXT: v_mov_b32_e32 v46, v45
+; SI-NEXT: v_mov_b32_e32 v27, v31
+; SI-NEXT: v_mov_b32_e32 v26, v25
+; SI-NEXT: v_mov_b32_e32 v17, v19
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v11
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v38
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v25
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[24:25], 16
-; SI-NEXT: v_mov_b32_e32 v2, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[55:56], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[35:36], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[41:42], 16
-; SI-NEXT: v_lshr_b64 v[42:43], v[27:28], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[39:40], 16
+; SI-NEXT: v_lshr_b64 v[2:3], v[24:25], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[14:15], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[52:53], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[21:22], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[46:47], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[53:54], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[16:17], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[51:52], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[32:33], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[18:19], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[14:15], 16
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[34:35], v[6:7], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[12:13], 16
-; SI-NEXT: v_mov_b32_e32 v22, v45
-; SI-NEXT: v_mov_b32_e32 v38, v40
-; SI-NEXT: v_mov_b32_e32 v39, v53
-; SI-NEXT: v_mov_b32_e32 v40, v33
-; SI-NEXT: v_mov_b32_e32 v17, v10
-; SI-NEXT: v_mov_b32_e32 v52, v28
-; SI-NEXT: v_mov_b32_e32 v55, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[47:48], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[2:3], v[44:45], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[44:45], v[4:5], 16
+; SI-NEXT: v_mov_b32_e32 v40, v36
+; SI-NEXT: v_lshr_b64 v[38:39], v[35:36], 16
+; SI-NEXT: v_mov_b32_e32 v35, v34
+; SI-NEXT: v_lshr_b64 v[33:34], v[33:34], 16
+; SI-NEXT: v_lshr_b64 v[36:37], v[7:8], 16
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[60:61], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[61:62], v[30:31], 16
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mov_b32_e32 v25, v2
+; SI-NEXT: v_mov_b32_e32 v2, v8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: .LBB105_5: ; %end
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v1
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v17
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v23
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v56
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v36
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v37
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v38
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v39
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v47
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v19
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v21
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v22
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v40
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v48
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v27
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v26
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v23
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v52
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v41
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v46
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v43
; SI-NEXT: v_readlane_b32 s30, v63, 3
; SI-NEXT: v_readlane_b32 s31, v63, 4
; SI-NEXT: v_readlane_b32 s36, v63, 2
@@ -223320,168 +223446,158 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v21
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v11
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v61
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v9
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v8, v8, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v24
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v58
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v12, v12, v14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v13, v14
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v57
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v21
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v17, v18, v17
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v60
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v29
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v16, v16, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v21
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v34
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v58
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v24
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v21, v25, v21
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v42
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v50
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v21, v30, v21
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v23, v29, v23
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v44
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v52
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v49
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; SI-NEXT: v_or_b32_e32 v26, v26, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v29
-; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v23, v31, v23
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_or_b32_e32 v28, v28, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v59
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v40
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v36
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -223498,22 +223614,33 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v29
+; SI-NEXT: v_or_b32_e32 v27, v27, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v28, v28, v29
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v35
; SI-NEXT: v_or_b32_e32 v29, v29, v30
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v32
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v55
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v32
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -227261,68 +227388,72 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: v_readfirstlane_b32 s68, v3
; SI-NEXT: s_lshr_b32 s93, s66, 16
; SI-NEXT: v_writelane_b32 v34, s92, 15
+; SI-NEXT: v_readfirstlane_b32 s43, v17
+; SI-NEXT: v_readfirstlane_b32 s41, v16
+; SI-NEXT: v_readfirstlane_b32 s15, v15
+; SI-NEXT: v_readfirstlane_b32 s13, v14
+; SI-NEXT: v_readfirstlane_b32 s11, v13
+; SI-NEXT: v_readfirstlane_b32 s9, v12
+; SI-NEXT: v_readfirstlane_b32 s7, v11
+; SI-NEXT: v_readfirstlane_b32 s98, v10
+; SI-NEXT: v_readfirstlane_b32 s96, v9
+; SI-NEXT: v_readfirstlane_b32 s86, v8
+; SI-NEXT: v_readfirstlane_b32 s84, v7
+; SI-NEXT: v_readfirstlane_b32 s82, v6
+; SI-NEXT: v_readfirstlane_b32 s80, v5
; SI-NEXT: v_readfirstlane_b32 s70, v4
; SI-NEXT: s_lshr_b32 s94, s68, 16
; SI-NEXT: v_writelane_b32 v34, s93, 16
-; SI-NEXT: v_readfirstlane_b32 s80, v5
+; SI-NEXT: s_lshr_b32 s42, s43, 16
+; SI-NEXT: s_lshr_b32 s40, s41, 16
+; SI-NEXT: s_lshr_b32 s14, s15, 16
+; SI-NEXT: s_lshr_b32 s12, s13, 16
+; SI-NEXT: s_lshr_b32 s10, s11, 16
+; SI-NEXT: s_lshr_b32 s8, s9, 16
+; SI-NEXT: s_lshr_b32 s99, s7, 16
+; SI-NEXT: s_lshr_b32 s97, s98, 16
+; SI-NEXT: s_lshr_b32 s87, s96, 16
+; SI-NEXT: s_lshr_b32 s85, s86, 16
+; SI-NEXT: s_lshr_b32 s83, s84, 16
+; SI-NEXT: s_lshr_b32 s81, s82, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s80, 16
; SI-NEXT: s_lshr_b32 s95, s70, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: v_writelane_b32 v34, s94, 17
-; SI-NEXT: v_readfirstlane_b32 s82, v6
-; SI-NEXT: s_lshr_b32 vcc_lo, s80, 16
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: v_writelane_b32 v34, s95, 18
-; SI-NEXT: v_readfirstlane_b32 s84, v7
-; SI-NEXT: s_lshr_b32 vcc_hi, s82, 16
; SI-NEXT: v_writelane_b32 v34, vcc_lo, 19
-; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: v_readfirstlane_b32 s40, v16
-; SI-NEXT: v_readfirstlane_b32 s14, v15
-; SI-NEXT: v_readfirstlane_b32 s12, v14
-; SI-NEXT: v_readfirstlane_b32 s10, v13
-; SI-NEXT: v_readfirstlane_b32 s8, v12
-; SI-NEXT: v_readfirstlane_b32 s6, v11
-; SI-NEXT: v_readfirstlane_b32 s98, v10
-; SI-NEXT: v_readfirstlane_b32 s96, v9
-; SI-NEXT: v_readfirstlane_b32 s86, v8
-; SI-NEXT: s_lshr_b32 s30, s84, 16
-; SI-NEXT: v_writelane_b32 v34, vcc_hi, 20
-; SI-NEXT: s_lshr_b32 s41, s42, 16
-; SI-NEXT: s_lshr_b32 s15, s40, 16
-; SI-NEXT: s_lshr_b32 s13, s14, 16
-; SI-NEXT: s_lshr_b32 s11, s12, 16
-; SI-NEXT: s_lshr_b32 s9, s10, 16
-; SI-NEXT: s_lshr_b32 s7, s8, 16
-; SI-NEXT: s_lshr_b32 s99, s6, 16
-; SI-NEXT: s_lshr_b32 s97, s98, 16
-; SI-NEXT: s_lshr_b32 s34, s96, 16
-; SI-NEXT: s_lshr_b32 s31, s86, 16
-; SI-NEXT: v_readfirstlane_b32 s5, v18
-; SI-NEXT: v_writelane_b32 v34, s30, 21
-; SI-NEXT: s_cmp_lg_u32 s5, 0
-; SI-NEXT: v_writelane_b32 v34, s31, 22
-; SI-NEXT: v_writelane_b32 v34, s34, 23
; SI-NEXT: s_cbranch_scc0 .LBB107_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshl_b32 s44, s4, 16
; SI-NEXT: s_lshl_b32 s4, s26, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 26
+; SI-NEXT: v_writelane_b32 v34, s4, 23
; SI-NEXT: s_lshl_b32 s4, s79, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 25
+; SI-NEXT: v_writelane_b32 v34, s4, 22
; SI-NEXT: s_lshl_b32 s4, s27, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 28
+; SI-NEXT: v_writelane_b32 v34, s4, 25
; SI-NEXT: s_lshl_b32 s4, s88, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 27
+; SI-NEXT: v_writelane_b32 v34, s4, 24
; SI-NEXT: s_lshl_b32 s4, s28, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 30
+; SI-NEXT: v_writelane_b32 v34, s4, 27
; SI-NEXT: s_lshl_b32 s4, s89, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 29
+; SI-NEXT: v_writelane_b32 v34, s4, 26
; SI-NEXT: s_lshl_b32 s4, s29, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 32
+; SI-NEXT: v_writelane_b32 v34, s4, 29
; SI-NEXT: s_lshl_b32 s4, s90, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 31
+; SI-NEXT: v_writelane_b32 v34, s4, 28
; SI-NEXT: s_lshl_b32 s4, s54, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 24
+; SI-NEXT: v_writelane_b32 v34, s4, 31
; SI-NEXT: s_lshl_b32 s4, s91, 16
-; SI-NEXT: s_lshl_b32 s43, s16, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 30
+; SI-NEXT: s_lshl_b32 s4, s64, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 33
+; SI-NEXT: s_lshl_b32 s4, s92, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 32
+; SI-NEXT: s_lshl_b32 s4, s66, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 20
+; SI-NEXT: s_lshl_b32 s4, s93, 16
+; SI-NEXT: s_lshl_b32 s6, s16, 16
; SI-NEXT: s_lshl_b32 s45, s17, 16
; SI-NEXT: s_lshl_b32 s46, s46, 16
; SI-NEXT: s_lshl_b32 s47, s18, 16
@@ -227341,41 +227472,37 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_lshl_b32 s76, s76, 16
; SI-NEXT: s_lshl_b32 s77, s25, 16
; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 33
-; SI-NEXT: s_lshl_b32 s87, s64, 16
-; SI-NEXT: s_lshl_b32 s85, s92, 16
-; SI-NEXT: s_lshl_b32 s83, s66, 16
-; SI-NEXT: s_lshl_b32 s81, s93, 16
-; SI-NEXT: s_lshl_b32 s71, s68, 16
-; SI-NEXT: s_lshl_b32 s69, s94, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 21
+; SI-NEXT: s_lshl_b32 s69, s68, 16
+; SI-NEXT: s_lshl_b32 s71, s94, 16
; SI-NEXT: s_lshl_b32 s65, s70, 16
; SI-NEXT: s_lshl_b32 s67, s95, 16
; SI-NEXT: s_lshl_b32 s53, s80, 16
; SI-NEXT: s_lshl_b32 s55, vcc_lo, 16
; SI-NEXT: s_lshl_b32 s51, s82, 16
-; SI-NEXT: s_lshl_b32 s52, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s52, s81, 16
; SI-NEXT: s_lshl_b32 s49, s84, 16
-; SI-NEXT: s_lshl_b32 s50, s30, 16
+; SI-NEXT: s_lshl_b32 s50, s83, 16
; SI-NEXT: s_lshl_b32 s39, s86, 16
-; SI-NEXT: s_lshl_b32 s48, s31, 16
+; SI-NEXT: s_lshl_b32 s48, s85, 16
; SI-NEXT: s_lshl_b32 s37, s96, 16
-; SI-NEXT: s_lshl_b32 s38, s34, 16
+; SI-NEXT: s_lshl_b32 s38, s87, 16
; SI-NEXT: s_lshl_b32 s35, s98, 16
; SI-NEXT: s_lshl_b32 s36, s97, 16
-; SI-NEXT: s_lshl_b32 s31, s6, 16
+; SI-NEXT: s_lshl_b32 s31, s7, 16
; SI-NEXT: s_lshl_b32 s34, s99, 16
-; SI-NEXT: s_lshl_b32 vcc_hi, s8, 16
-; SI-NEXT: s_lshl_b32 s30, s7, 16
-; SI-NEXT: s_lshl_b32 s95, s10, 16
-; SI-NEXT: s_lshl_b32 vcc_lo, s9, 16
-; SI-NEXT: s_lshl_b32 s93, s12, 16
-; SI-NEXT: s_lshl_b32 s94, s11, 16
-; SI-NEXT: s_lshl_b32 s91, s14, 16
-; SI-NEXT: s_lshl_b32 s92, s13, 16
-; SI-NEXT: s_lshl_b32 s89, s40, 16
-; SI-NEXT: s_lshl_b32 s90, s15, 16
-; SI-NEXT: s_lshl_b32 s79, s42, 16
-; SI-NEXT: s_lshl_b32 s88, s41, 16
+; SI-NEXT: s_lshl_b32 vcc_hi, s9, 16
+; SI-NEXT: s_lshl_b32 s30, s8, 16
+; SI-NEXT: s_lshl_b32 s95, s11, 16
+; SI-NEXT: s_lshl_b32 vcc_lo, s10, 16
+; SI-NEXT: s_lshl_b32 s93, s13, 16
+; SI-NEXT: s_lshl_b32 s94, s12, 16
+; SI-NEXT: s_lshl_b32 s91, s15, 16
+; SI-NEXT: s_lshl_b32 s92, s14, 16
+; SI-NEXT: s_lshl_b32 s89, s41, 16
+; SI-NEXT: s_lshl_b32 s90, s40, 16
+; SI-NEXT: s_lshl_b32 s79, s43, 16
+; SI-NEXT: s_lshl_b32 s88, s42, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB107_3
; SI-NEXT: .LBB107_2:
@@ -227384,7 +227511,7 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; kill: killed $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr46
@@ -227404,12 +227531,8 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr77
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr53
@@ -227454,6 +227577,14 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; kill: killed $sgpr79
; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: .LBB107_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -227485,68 +227616,67 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_mov_b32 s51, s53
; SI-NEXT: s_mov_b32 s52, s55
; SI-NEXT: s_mov_b32 s53, s65
-; SI-NEXT: s_mov_b32 s65, s71
-; SI-NEXT: s_mov_b32 s71, s83
-; SI-NEXT: s_mov_b32 s83, s87
-; SI-NEXT: v_readlane_b32 s87, v34, 24
+; SI-NEXT: s_mov_b32 s55, s67
+; SI-NEXT: s_mov_b32 s65, s69
+; SI-NEXT: s_mov_b32 s67, s71
+; SI-NEXT: v_readlane_b32 s69, v34, 20
+; SI-NEXT: v_readlane_b32 s71, v34, 21
; SI-NEXT: s_cbranch_scc1 .LBB107_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_or_b32 s7, s7, s8
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s99, 16
-; SI-NEXT: s_add_i32 s12, s12, 3
-; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_add_i32 s43, s43, 3
+; SI-NEXT: s_and_b32 s4, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s42, 16
+; SI-NEXT: s_add_i32 s41, s41, 3
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_and_b32 s5, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s40, 16
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: s_and_b32 s6, s15, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_add_i32 s13, s13, 3
+; SI-NEXT: s_or_b32 s14, s14, s6
+; SI-NEXT: s_and_b32 s6, s13, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_or_b32 s12, s12, s6
+; SI-NEXT: s_and_b32 s6, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_or_b32 s6, s10, s6
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s10, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_add_i32 s98, s98, 3
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_or_b32 s9, s9, s10
+; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s8, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s99, 16
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: s_add_i32 s7, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s98, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s97, 16
-; SI-NEXT: s_add_i32 s14, s14, 3
-; SI-NEXT: s_or_b32 s11, s11, s12
-; SI-NEXT: s_or_b32 s6, s10, s6
+; SI-NEXT: s_lshl_b32 s9, s97, 16
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_add_i32 s96, s96, 3
-; SI-NEXT: v_readlane_b32 s12, v34, 23
-; SI-NEXT: s_add_i32 s42, s42, 3
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_add_i32 s10, s6, 0x30000
+; SI-NEXT: s_add_i32 s9, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_and_b32 s4, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s41, 16
-; SI-NEXT: s_add_i32 s40, s40, 3
-; SI-NEXT: s_or_b32 s13, s13, s14
-; SI-NEXT: s_or_b32 s6, s12, s6
+; SI-NEXT: s_lshl_b32 s11, s87, 16
+; SI-NEXT: s_or_b32 s6, s11, s6
; SI-NEXT: s_add_i32 s86, s86, 3
-; SI-NEXT: v_readlane_b32 s14, v34, 22
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_add_i32 s12, s6, 0x30000
+; SI-NEXT: s_add_i32 s11, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s86, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_or_b32 s5, s15, s5
-; SI-NEXT: s_or_b32 s6, s14, s6
+; SI-NEXT: s_lshl_b32 s13, s85, 16
+; SI-NEXT: s_or_b32 s6, s13, s6
; SI-NEXT: s_add_i32 s84, s84, 3
-; SI-NEXT: v_readlane_b32 s15, v34, 21
-; SI-NEXT: s_add_i32 s14, s6, 0x30000
+; SI-NEXT: s_add_i32 s13, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s15, s83, 16
; SI-NEXT: s_or_b32 s6, s15, s6
; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: v_readlane_b32 s40, v34, 20
; SI-NEXT: s_add_i32 s15, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_lshl_b32 s40, s81, 16
; SI-NEXT: s_or_b32 s6, s40, s6
; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: v_readlane_b32 s41, v34, 19
@@ -227567,25 +227697,25 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_lshl_b32 s43, s43, 16
; SI-NEXT: s_or_b32 s6, s43, s6
; SI-NEXT: s_add_i32 s66, s66, 3
-; SI-NEXT: v_readlane_b32 s43, v34, 16
-; SI-NEXT: s_add_i32 s67, s6, 0x30000
+; SI-NEXT: v_readlane_b32 s44, v34, 16
+; SI-NEXT: s_add_i32 s43, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s66, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s6, s44, s6
; SI-NEXT: s_add_i32 s64, s64, 3
-; SI-NEXT: v_readlane_b32 s43, v34, 15
-; SI-NEXT: s_add_i32 s65, s6, 0x30000
+; SI-NEXT: v_readlane_b32 s44, v34, 15
+; SI-NEXT: s_add_i32 s79, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s64, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s6, s44, s6
; SI-NEXT: s_add_i32 s54, s54, 3
-; SI-NEXT: v_readlane_b32 s43, v34, 14
+; SI-NEXT: v_readlane_b32 s44, v34, 14
; SI-NEXT: s_add_i32 s55, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s54, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s6, s44, s6
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_add_i32 s79, s6, 0x30000
+; SI-NEXT: s_add_i32 s88, s6, 0x30000
; SI-NEXT: s_and_b32 s6, s29, 0xffff
; SI-NEXT: v_readlane_b32 s29, v34, 13
; SI-NEXT: s_lshl_b32 s29, s29, 16
@@ -227668,30 +227798,34 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_or_b32 s6, s6, s16
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
-; SI-NEXT: s_and_b32 s44, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s43, s6, 16
-; SI-NEXT: s_and_b32 s6, s26, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s6, 25
-; SI-NEXT: s_lshl_b32 s6, s26, 16
-; SI-NEXT: v_writelane_b32 v34, s6, 26
-; SI-NEXT: s_and_b32 s6, s27, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s6, 27
-; SI-NEXT: s_lshl_b32 s6, s27, 16
-; SI-NEXT: v_writelane_b32 v34, s6, 28
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: v_writelane_b32 v34, s6, 29
-; SI-NEXT: s_lshl_b32 s6, s28, 16
-; SI-NEXT: v_writelane_b32 v34, s6, 30
-; SI-NEXT: s_and_b32 s6, s29, 0xffff0000
+; SI-NEXT: s_and_b32 s16, s26, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s16, 22
+; SI-NEXT: s_lshl_b32 s16, s26, 16
+; SI-NEXT: v_writelane_b32 v34, s16, 23
+; SI-NEXT: s_and_b32 s16, s27, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s16, 24
+; SI-NEXT: s_lshl_b32 s16, s27, 16
+; SI-NEXT: v_writelane_b32 v34, s16, 25
+; SI-NEXT: s_and_b32 s16, s28, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s16, 26
+; SI-NEXT: s_lshl_b32 s16, s28, 16
+; SI-NEXT: v_writelane_b32 v34, s16, 27
+; SI-NEXT: s_and_b32 s16, s29, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s16, 28
+; SI-NEXT: s_lshl_b32 s16, s29, 16
+; SI-NEXT: v_writelane_b32 v34, s16, 29
+; SI-NEXT: s_and_b32 s16, s88, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s16, 30
+; SI-NEXT: s_lshl_b32 s16, s88, 16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s6, 31
-; SI-NEXT: s_lshl_b32 s6, s29, 16
+; SI-NEXT: s_add_i32 s14, s14, 0x30000
+; SI-NEXT: s_add_i32 s12, s12, 0x30000
+; SI-NEXT: s_add_i32 s6, s6, 0x30000
+; SI-NEXT: v_writelane_b32 v34, s16, 31
+; SI-NEXT: s_and_b32 s16, s55, 0xffff0000
+; SI-NEXT: s_and_b32 s44, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_and_b32 s46, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s45, s17, 16
; SI-NEXT: s_and_b32 s56, s18, 0xffff0000
@@ -227710,16 +227844,13 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_lshl_b32 s75, s24, 16
; SI-NEXT: s_and_b32 s78, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s77, s25, 16
-; SI-NEXT: v_writelane_b32 v34, s6, 32
-; SI-NEXT: s_and_b32 s6, s79, 0xffff0000
-; SI-NEXT: s_lshl_b32 s87, s79, 16
-; SI-NEXT: s_and_b32 s85, s55, 0xffff0000
-; SI-NEXT: s_lshl_b32 s83, s55, 16
-; SI-NEXT: s_and_b32 s81, s65, 0xffff0000
-; SI-NEXT: s_lshl_b32 s71, s65, 16
-; SI-NEXT: s_and_b32 s69, s67, 0xffff0000
-; SI-NEXT: s_lshl_b32 s65, s67, 16
-; SI-NEXT: s_and_b32 s67, s42, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s16, 32
+; SI-NEXT: s_lshl_b32 s16, s55, 16
+; SI-NEXT: s_and_b32 s71, s79, 0xffff0000
+; SI-NEXT: s_lshl_b32 s69, s79, 16
+; SI-NEXT: s_and_b32 s67, s43, 0xffff0000
+; SI-NEXT: s_lshl_b32 s65, s43, 16
+; SI-NEXT: s_and_b32 s55, s42, 0xffff0000
; SI-NEXT: s_lshl_b32 s53, s42, 16
; SI-NEXT: s_and_b32 s52, s41, 0xffff0000
; SI-NEXT: s_lshl_b32 s51, s41, 16
@@ -227727,31 +227858,31 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_lshl_b32 s49, s40, 16
; SI-NEXT: s_and_b32 s48, s15, 0xffff0000
; SI-NEXT: s_lshl_b32 s39, s15, 16
-; SI-NEXT: s_and_b32 s38, s14, 0xffff0000
-; SI-NEXT: s_lshl_b32 s37, s14, 16
-; SI-NEXT: s_and_b32 s36, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s35, s12, 16
-; SI-NEXT: s_and_b32 s34, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s31, s10, 16
-; SI-NEXT: s_and_b32 s30, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_hi, s8, 16
-; SI-NEXT: s_and_b32 vcc_lo, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s95, s7, 16
-; SI-NEXT: s_and_b32 s94, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s93, s9, 16
-; SI-NEXT: s_and_b32 s92, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s11, 16
-; SI-NEXT: s_and_b32 s90, s13, 0xffff0000
-; SI-NEXT: s_lshl_b32 s89, s13, 16
+; SI-NEXT: s_and_b32 s38, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s37, s13, 16
+; SI-NEXT: s_and_b32 s36, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s35, s11, 16
+; SI-NEXT: s_and_b32 s34, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 s31, s9, 16
+; SI-NEXT: s_and_b32 s30, s7, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_hi, s7, 16
+; SI-NEXT: s_and_b32 vcc_lo, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s95, s8, 16
+; SI-NEXT: s_and_b32 s94, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s93, s10, 16
+; SI-NEXT: s_and_b32 s92, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s91, s12, 16
+; SI-NEXT: s_and_b32 s90, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s89, s14, 16
; SI-NEXT: s_and_b32 s88, s5, 0xffff0000
; SI-NEXT: s_lshl_b32 s79, s5, 16
; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_writelane_b32 v34, s6, 33
+; SI-NEXT: v_writelane_b32 v34, s16, 33
; SI-NEXT: .LBB107_5: ; %end
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
; SI-NEXT: v_mul_f32_e64 v1, 1.0, s46
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
@@ -227789,48 +227920,51 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
; SI-NEXT: v_mul_f32_e64 v9, 1.0, s77
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 25
+; SI-NEXT: v_readlane_b32 s6, v34, 22
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 26
+; SI-NEXT: v_readlane_b32 s6, v34, 23
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s6
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 27
+; SI-NEXT: v_readlane_b32 s6, v34, 24
; SI-NEXT: v_mul_f32_e64 v11, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 28
+; SI-NEXT: v_readlane_b32 s6, v34, 25
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
; SI-NEXT: v_mul_f32_e64 v11, 1.0, s6
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 29
+; SI-NEXT: v_readlane_b32 s6, v34, 26
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 30
+; SI-NEXT: v_readlane_b32 s6, v34, 27
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s6
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 31
+; SI-NEXT: v_readlane_b32 s6, v34, 28
; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 32
+; SI-NEXT: v_readlane_b32 s6, v34, 29
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 33
+; SI-NEXT: v_readlane_b32 s6, v34, 30
; SI-NEXT: v_mul_f32_e64 v14, 1.0, s6
+; SI-NEXT: v_readlane_b32 s6, v34, 31
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s87
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s6
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s85
+; SI-NEXT: v_readlane_b32 s6, v34, 32
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
+; SI-NEXT: v_readlane_b32 s6, v34, 33
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s83
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s81
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s71
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s69
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s69
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s67
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s65
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s55
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
; SI-NEXT: v_mul_f32_e64 v18, 1.0, s53
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
@@ -228514,26 +228648,28 @@ define <64 x i16> @bitcast_v64f16_to_v64i16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB108_2
; SI-NEXT: ; %bb.1: ; %cmp.true
+; SI-NEXT: v_cvt_f32_f16_e32 v37, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v32, v35
; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
+; SI-NEXT: v_add_f32_e32 v37, 0x38000000, v37
+; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
+; SI-NEXT: v_cvt_f16_f32_e32 v37, v37
+; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
+; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v37
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v30, v36
-; SI-NEXT: v_cvt_f32_f16_e32 v37, v37
-; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
+; SI-NEXT: v_or_b32_e32 v30, v31, v35
+; SI-NEXT: v_mov_b32_e32 v31, v36
; SI-NEXT: v_cvt_f16_f32_e32 v36, v32
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
; SI-NEXT: v_cvt_f32_f16_e32 v33, v33
; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_cvt_f32_f16_e32 v34, v34
-; SI-NEXT: v_add_f32_e32 v37, 0x38000000, v37
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
-; SI-NEXT: v_cvt_f16_f32_e32 v37, v37
-; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
@@ -228543,9 +228679,7 @@ define <64 x i16> @bitcast_v64f16_to_v64i16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: v_cvt_f16_f32_e32 v34, v34
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v37
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: v_or_b32_e32 v31, v31, v35
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v36
; SI-NEXT: v_or_b32_e32 v29, v29, v35
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v33
@@ -228603,157 +228737,158 @@ define <64 x i16> @bitcast_v64f16_to_v64i16(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v49, v49
; SI-NEXT: v_cvt_f32_f16_e32 v38, v38
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v32
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
; SI-NEXT: v_cvt_f32_f16_e32 v6, v6
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v35
; SI-NEXT: v_cvt_f32_f16_e32 v8, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, v10
; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v32
-; SI-NEXT: v_or_b32_e32 v23, v23, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v39
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v32
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v35
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v32, v35
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v32
-; SI-NEXT: v_or_b32_e32 v21, v21, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v48
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v32
+; SI-NEXT: v_or_b32_e32 v23, v23, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v39
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v39, v35
; SI-NEXT: v_add_f32_e32 v62, 0x38000000, v62
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f16_f32_e32 v32, v35
; SI-NEXT: v_add_f32_e32 v61, 0x38000000, v61
; SI-NEXT: v_add_f32_e32 v60, 0x38000000, v60
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v39
-; SI-NEXT: v_or_b32_e32 v19, v19, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v50
; SI-NEXT: v_add_f32_e32 v59, 0x38000000, v59
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v32
+; SI-NEXT: v_or_b32_e32 v21, v21, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v48
; SI-NEXT: v_add_f32_e32 v58, 0x38000000, v58
; SI-NEXT: v_add_f32_e32 v57, 0x38000000, v57
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v48, v35
; SI-NEXT: v_add_f32_e32 v56, 0x38000000, v56
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v39, v35
; SI-NEXT: v_add_f32_e32 v47, 0x38000000, v47
; SI-NEXT: v_add_f32_e32 v45, 0x38000000, v45
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v48
-; SI-NEXT: v_or_b32_e32 v17, v17, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v51
; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v39
+; SI-NEXT: v_or_b32_e32 v19, v19, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v50
; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v55
; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v52
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v50, v35
; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v49
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v35
; SI-NEXT: v_add_f32_e32 v38, 0x38000000, v38
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v50
-; SI-NEXT: v_or_b32_e32 v15, v15, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v53
; SI-NEXT: v_cvt_f16_f32_e32 v62, v62
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v48
+; SI-NEXT: v_or_b32_e32 v17, v17, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v51
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v61, v61
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v51, v35
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v50, v35
; SI-NEXT: v_cvt_f16_f32_e32 v60, v60
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v51
-; SI-NEXT: v_or_b32_e32 v13, v13, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v54
; SI-NEXT: v_cvt_f16_f32_e32 v59, v59
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v50
+; SI-NEXT: v_or_b32_e32 v15, v15, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v53
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v58, v58
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v53, v35
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v51, v35
; SI-NEXT: v_cvt_f16_f32_e32 v57, v57
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v53
-; SI-NEXT: v_or_b32_e32 v11, v11, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v40
; SI-NEXT: v_cvt_f16_f32_e32 v56, v56
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v51
+; SI-NEXT: v_or_b32_e32 v13, v13, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v54
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v54, v35
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v53, v35
; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v54
-; SI-NEXT: v_or_b32_e32 v9, v9, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v41
; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v53
+; SI-NEXT: v_or_b32_e32 v11, v11, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v40
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v55, v55
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v40, v35
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v54, v35
; SI-NEXT: v_cvt_f16_f32_e32 v52, v52
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
-; SI-NEXT: v_or_b32_e32 v7, v7, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v43
; SI-NEXT: v_cvt_f16_f32_e32 v49, v49
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v54
+; SI-NEXT: v_or_b32_e32 v9, v9, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v41
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v38, v38
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v43, v35
; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v40, v35
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_or_b32_e32 v5, v5, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v44
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
+; SI-NEXT: v_or_b32_e32 v7, v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v43
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v35
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v35
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v46
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43
+; SI-NEXT: v_or_b32_e32 v5, v5, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v44
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v46, v35
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v35
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_or_b32_e32 v3, v3, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v46
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v60
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v35
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v46
; SI-NEXT: v_or_b32_e32 v1, v1, v35
; SI-NEXT: v_cvt_f32_f16_e32 v35, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v63, v30
+; SI-NEXT: v_cvt_f32_f16_e32 v63, v31
+; SI-NEXT: v_mov_b32_e32 v31, v30
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
; SI-NEXT: v_add_f32_e32 v63, 0x38000000, v63
; SI-NEXT: v_cvt_f16_f32_e32 v35, v35
; SI-NEXT: v_cvt_f16_f32_e32 v63, v63
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v62
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v61
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v60
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v59
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v55
@@ -229260,59 +229395,53 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v18, s76
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v48
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v28, s76
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s35
+; SI-NEXT: v_or_b32_e32 v43, v1, v51
; SI-NEXT: v_cvt_f16_f32_e32 v1, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s20
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v21
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s20
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s34
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v33, v2, v12
; SI-NEXT: v_cvt_f32_f16_e32 v2, s22
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s72
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_or_b32_e32 v1, v1, v13
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v62, v1, v5
; SI-NEXT: v_cvt_f32_f16_e32 v1, s30
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s24
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v38, v2, v6
+; SI-NEXT: v_or_b32_e32 v61, v2, v10
; SI-NEXT: v_cvt_f32_f16_e32 v2, vcc_hi
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s26
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v36, v0, v8
+; SI-NEXT: v_or_b32_e32 v60, v0, v7
; SI-NEXT: v_cvt_f32_f16_e32 v0, s93
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v2
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_or_b32_e32 v27, v1, v34
+; SI-NEXT: v_or_b32_e32 v57, v1, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, s95
; SI-NEXT: v_cvt_f32_f16_e32 v2, s28
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -229320,14 +229449,14 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, vcc_lo
-; SI-NEXT: v_or_b32_e32 v57, v2, v11
+; SI-NEXT: v_or_b32_e32 v47, v2, v14
; SI-NEXT: v_cvt_f32_f16_e32 v2, s94
-; SI-NEXT: v_or_b32_e32 v47, v0, v51
+; SI-NEXT: v_or_b32_e32 v59, v0, v34
; SI-NEXT: v_cvt_f32_f16_e32 v0, s91
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s89
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -229335,33 +229464,34 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, s92
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s79
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s77
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v2
+; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, s75
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s72
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v3
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s62
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s88
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, s78
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v30, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v55, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s60
; SI-NEXT: v_cvt_f32_f16_e32 v2, s74
; SI-NEXT: v_cvt_f32_f16_e32 v3, s58
@@ -229369,124 +229499,126 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v6, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v20, v0, v1
+; SI-NEXT: v_or_b32_e32 v24, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v0, s73
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
-; SI-NEXT: v_or_b32_e32 v55, v2, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v6
+; SI-NEXT: v_or_b32_e32 v41, v2, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s56
; SI-NEXT: v_cvt_f32_f16_e32 v2, s63
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v6, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v3, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v6
; SI-NEXT: v_cvt_f32_f16_e32 v2, s47
-; SI-NEXT: v_or_b32_e32 v61, v0, v1
+; SI-NEXT: v_or_b32_e32 v17, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s61
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, s46
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v41, v2, v0
+; SI-NEXT: v_or_b32_e32 v54, v2, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s59
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; SI-NEXT: v_or_b32_e32 v24, v1, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v45
+; SI-NEXT: v_or_b32_e32 v27, v1, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, s45
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f32_f16_e32 v2, s57
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v17, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v18
; SI-NEXT: v_cvt_f32_f16_e32 v2, s44
-; SI-NEXT: v_or_b32_e32 v45, v0, v1
+; SI-NEXT: v_or_b32_e32 v22, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s43
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f16_f32_e32 v6, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v17
-; SI-NEXT: v_or_b32_e32 v52, v2, v0
+; SI-NEXT: v_or_b32_e32 v35, v2, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s42
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32
-; SI-NEXT: v_or_b32_e32 v12, v1, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
+; SI-NEXT: v_or_b32_e32 v15, v1, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, s27
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s41
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s41
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
+; SI-NEXT: v_cvt_f16_f32_e32 v32, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v2, s25
-; SI-NEXT: v_or_b32_e32 v35, v0, v1
+; SI-NEXT: v_or_b32_e32 v37, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s40
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, s23
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v16, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v9, v2, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
+; SI-NEXT: v_or_b32_e32 v8, v2, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s15
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; SI-NEXT: v_or_b32_e32 v7, v1, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44
+; SI-NEXT: v_or_b32_e32 v11, v1, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, s21
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f32_f16_e32 v2, s14
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v56
+; SI-NEXT: v_cvt_f16_f32_e32 v56, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v46
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: v_cvt_f32_f16_e32 v2, s19
-; SI-NEXT: v_or_b32_e32 v14, v0, v1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v6, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s13
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v62, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v58, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v59
-; SI-NEXT: v_or_b32_e32 v22, v2, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v56
+; SI-NEXT: v_or_b32_e32 v13, v2, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s11
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v62
-; SI-NEXT: v_or_b32_e32 v49, v1, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58
+; SI-NEXT: v_or_b32_e32 v52, v1, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, s10
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v18
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v28
; SI-NEXT: v_cvt_f16_f32_e32 v3, v2
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -229494,21 +229626,21 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v3
; SI-NEXT: v_or_b32_e32 v29, v0, v2
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v55
; SI-NEXT: v_or_b32_e32 v31, v1, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s12
; SI-NEXT: v_cvt_f32_f16_e32 v50, s90
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v5
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v49
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v20
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v50
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v53, v1, v23
+; SI-NEXT: v_or_b32_e32 v20, v1, v26
; SI-NEXT: v_cvt_f32_f16_e32 v1, s8
-; SI-NEXT: v_or_b32_e32 v26, v0, v60
+; SI-NEXT: v_or_b32_e32 v49, v0, v16
; SI-NEXT: v_cvt_f32_f16_e32 v0, s9
-; SI-NEXT: v_or_b32_e32 v50, v2, v40
+; SI-NEXT: v_or_b32_e32 v50, v2, v53
; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -229516,142 +229648,146 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v39, v0, v54
-; SI-NEXT: v_or_b32_e32 v37, v1, v19
-; SI-NEXT: v_lshr_b64 v[0:1], v[48:49], 16
-; SI-NEXT: v_or_b32_e32 v43, v2, v28
-; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 16
-; SI-NEXT: v_mov_b32_e32 v2, v52
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v48, v21
+; SI-NEXT: v_or_b32_e32 v48, v0, v40
+; SI-NEXT: v_or_b32_e32 v0, v1, v23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, v45
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v2, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_or_b32_e32 v4, v25, v44
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[51:52], 16
+; SI-NEXT: v_lshr_b64 v[1:2], v[12:13], 16
+; SI-NEXT: v_mov_b32_e32 v2, v11
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v15
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, s6
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; SI-NEXT: v_lshr_b64 v[44:45], v[44:45], 16
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v38, v13
+; SI-NEXT: v_lshr_b64 v[12:13], v[14:15], 16
+; SI-NEXT: v_mov_b32_e32 v25, v8
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_mov_b32_e32 v25, v49
-; SI-NEXT: v_mov_b32_e32 v18, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_or_b32_e32 v33, v4, v30
-; SI-NEXT: v_mov_b32_e32 v22, v14
-; SI-NEXT: v_lshr_b64 v[4:5], v[13:14], 16
-; SI-NEXT: v_mov_b32_e32 v49, v9
-; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mov_b32_e32 v14, v34
+; SI-NEXT: v_lshr_b64 v[8:9], v[7:8], 16
; SI-NEXT: v_mov_b32_e32 v15, v35
-; SI-NEXT: v_mov_b32_e32 v42, v12
-; SI-NEXT: v_lshr_b64 v[12:13], v[11:12], 16
-; SI-NEXT: v_mov_b32_e32 v11, v27
-; SI-NEXT: v_lshr_b64 v[45:46], v[23:24], 16
-; SI-NEXT: v_mov_b32_e32 v48, v41
-; SI-NEXT: v_lshr_b64 v[40:41], v[40:41], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, v61
-; SI-NEXT: v_mov_b32_e32 v23, v26
-; SI-NEXT: v_lshr_b64 v[26:27], v[54:55], 16
-; SI-NEXT: v_lshr_b64 v[9:10], v[14:15], 16
-; SI-NEXT: v_lshr_b64 v[13:14], v[51:52], 16
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v35, v38
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v41, v55
-; SI-NEXT: v_mov_b32_e32 v27, v39
-; SI-NEXT: v_mov_b32_e32 v55, v20
-; SI-NEXT: v_lshr_b64 v[38:39], v[19:20], 16
-; SI-NEXT: v_mov_b32_e32 v54, v37
-; SI-NEXT: v_lshr_b64 v[19:20], v[28:29], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v22
+; SI-NEXT: v_or_b32_e32 v42, v4, v30
+; SI-NEXT: v_lshr_b64 v[4:5], v[5:6], 16
+; SI-NEXT: v_lshr_b64 v[13:14], v[34:35], 16
+; SI-NEXT: v_mov_b32_e32 v34, v44
+; SI-NEXT: v_mov_b32_e32 v51, v43
+; SI-NEXT: v_mov_b32_e32 v35, v27
+; SI-NEXT: v_lshr_b64 v[43:44], v[26:27], 16
+; SI-NEXT: v_lshr_b64 v[26:27], v[16:17], 16
+; SI-NEXT: v_mov_b32_e32 v19, v6
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v11, v37
+; SI-NEXT: v_lshr_b64 v[9:10], v[36:37], 16
+; SI-NEXT: v_lshr_b64 v[36:37], v[21:22], 16
+; SI-NEXT: v_mov_b32_e32 v22, v59
+; SI-NEXT: v_mov_b32_e32 v59, v50
+; SI-NEXT: v_mov_b32_e32 v27, v49
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v41
+; SI-NEXT: v_lshr_b64 v[49:50], v[40:41], 16
+; SI-NEXT: v_mov_b32_e32 v40, v17
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[16:17], v[28:29], 16
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[60:61], v[60:61], 16
+; SI-NEXT: v_mov_b32_e32 v39, v52
+; SI-NEXT: v_mov_b32_e32 v52, v20
+; SI-NEXT: v_lshr_b64 v[20:21], v[53:54], 16
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v21, v45
+; SI-NEXT: v_lshr_b64 v[44:45], v[23:24], 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[19:20], v[30:31], 16
-; SI-NEXT: v_mov_b32_e32 v21, v24
+; SI-NEXT: v_lshr_b64 v[16:17], v[30:31], 16
+; SI-NEXT: v_mov_b32_e32 v37, v54
; SI-NEXT: v_mov_b32_e32 v6, v5
; SI-NEXT: v_mov_b32_e32 v10, v9
; SI-NEXT: v_mov_b32_e32 v14, v13
+; SI-NEXT: v_mov_b32_e32 v53, v24
; SI-NEXT: v_mov_b32_e32 v30, v3
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v2, v1
; SI-NEXT: s_branch .LBB109_6
; SI-NEXT: .LBB109_5:
-; SI-NEXT: v_mov_b32_e32 v0, s74
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s73
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s63
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s61
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v0, s57
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s59
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v0, s43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v0, s42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s7
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s8
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, vcc_lo
-; SI-NEXT: v_mov_b32_e32 v1, s44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, s23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s45
+; SI-NEXT: v_mov_b32_e32 v1, s29
; SI-NEXT: v_mov_b32_e32 v2, s36
-; SI-NEXT: v_mov_b32_e32 v37, s88
+; SI-NEXT: v_mov_b32_e32 v55, s88
; SI-NEXT: v_mov_b32_e32 v30, s76
; SI-NEXT: v_mov_b32_e32 v28, s78
-; SI-NEXT: v_mov_b32_e32 v17, s57
-; SI-NEXT: v_mov_b32_e32 v32, s43
-; SI-NEXT: v_mov_b32_e32 v58, s42
-; SI-NEXT: v_mov_b32_e32 v16, s40
-; SI-NEXT: v_mov_b32_e32 v56, s15
-; SI-NEXT: v_mov_b32_e32 v59, s14
-; SI-NEXT: v_mov_b32_e32 v62, s13
-; SI-NEXT: v_mov_b32_e32 v33, s6
-; SI-NEXT: v_mov_b32_e32 v43, s7
-; SI-NEXT: v_mov_b32_e32 v54, s8
-; SI-NEXT: v_mov_b32_e32 v27, s9
-; SI-NEXT: v_mov_b32_e32 v23, s12
-; SI-NEXT: v_mov_b32_e32 v50, s90
-; SI-NEXT: v_mov_b32_e32 v53, s92
-; SI-NEXT: v_mov_b32_e32 v47, s31
-; SI-NEXT: v_mov_b32_e32 v57, s28
-; SI-NEXT: v_mov_b32_e32 v11, s26
-; SI-NEXT: v_mov_b32_e32 v36, s24
-; SI-NEXT: v_mov_b32_e32 v35, s22
-; SI-NEXT: v_mov_b32_e32 v34, s20
-; SI-NEXT: v_mov_b32_e32 v52, s18
+; SI-NEXT: v_mov_b32_e32 v50, s74
+; SI-NEXT: v_mov_b32_e32 v21, s61
+; SI-NEXT: v_mov_b32_e32 v18, s59
+; SI-NEXT: v_mov_b32_e32 v32, s41
+; SI-NEXT: v_mov_b32_e32 v34, s40
+; SI-NEXT: v_mov_b32_e32 v46, s15
+; SI-NEXT: v_mov_b32_e32 v56, s14
+; SI-NEXT: v_mov_b32_e32 v58, s13
+; SI-NEXT: v_mov_b32_e32 v42, s6
+; SI-NEXT: v_mov_b32_e32 v48, s9
+; SI-NEXT: v_mov_b32_e32 v27, s12
+; SI-NEXT: v_mov_b32_e32 v59, s90
+; SI-NEXT: v_mov_b32_e32 v52, s92
+; SI-NEXT: v_mov_b32_e32 v22, s31
+; SI-NEXT: v_mov_b32_e32 v47, s28
+; SI-NEXT: v_mov_b32_e32 v57, s26
+; SI-NEXT: v_mov_b32_e32 v60, s24
+; SI-NEXT: v_mov_b32_e32 v61, s22
+; SI-NEXT: v_mov_b32_e32 v62, s20
+; SI-NEXT: v_mov_b32_e32 v33, s18
; SI-NEXT: v_mov_b32_e32 v51, s16
-; SI-NEXT: v_mov_b32_e32 v25, s17
-; SI-NEXT: v_mov_b32_e32 v18, s19
-; SI-NEXT: v_mov_b32_e32 v22, s21
-; SI-NEXT: v_mov_b32_e32 v7, s23
-; SI-NEXT: v_mov_b32_e32 v49, s25
-; SI-NEXT: v_mov_b32_e32 v15, s27
-; SI-NEXT: v_mov_b32_e32 v42, s29
-; SI-NEXT: v_mov_b32_e32 v21, s46
-; SI-NEXT: v_mov_b32_e32 v48, s47
-; SI-NEXT: v_mov_b32_e32 v41, s58
-; SI-NEXT: v_mov_b32_e32 v55, s60
+; SI-NEXT: v_mov_b32_e32 v39, s17
+; SI-NEXT: v_mov_b32_e32 v38, s19
+; SI-NEXT: v_mov_b32_e32 v19, s21
+; SI-NEXT: v_mov_b32_e32 v25, s25
+; SI-NEXT: v_mov_b32_e32 v11, s27
+; SI-NEXT: v_mov_b32_e32 v15, s44
+; SI-NEXT: v_mov_b32_e32 v35, s46
+; SI-NEXT: v_mov_b32_e32 v37, s47
+; SI-NEXT: v_mov_b32_e32 v40, s56
+; SI-NEXT: v_mov_b32_e32 v53, s60
; SI-NEXT: v_mov_b32_e32 v29, s11
; SI-NEXT: v_mov_b32_e32 v31, s10
; SI-NEXT: v_mov_b32_e32 v4, s35
@@ -229660,74 +229796,77 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v10, vcc_hi
; SI-NEXT: v_mov_b32_e32 v12, s93
; SI-NEXT: v_mov_b32_e32 v14, s95
-; SI-NEXT: v_mov_b32_e32 v44, s94
-; SI-NEXT: v_mov_b32_e32 v45, s91
-; SI-NEXT: v_mov_b32_e32 v40, s89
-; SI-NEXT: v_mov_b32_e32 v60, s79
-; SI-NEXT: v_mov_b32_e32 v26, s77
-; SI-NEXT: v_mov_b32_e32 v38, s75
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v36, s94
+; SI-NEXT: v_mov_b32_e32 v43, s91
+; SI-NEXT: v_mov_b32_e32 v20, s89
+; SI-NEXT: v_mov_b32_e32 v26, s79
+; SI-NEXT: v_mov_b32_e32 v49, s77
+; SI-NEXT: v_mov_b32_e32 v44, s75
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, s45
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s72
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mov_b32_e32 v1, s62
; SI-NEXT: v_mov_b32_e32 v0, s37
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: .LBB109_6: ; %end
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(1)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v51
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v39
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58
; SI-NEXT: v_or_b32_e32 v1, v1, v3
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v52
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v33
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v59
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v38
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v56
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v62
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v56
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v46
; SI-NEXT: v_or_b32_e32 v5, v5, v9
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v35
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v61
; SI-NEXT: v_or_b32_e32 v6, v9, v6
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v16
-; SI-NEXT: v_or_b32_e32 v7, v7, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v34
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v36
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v45
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v41
-; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v33
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v42
; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
; SI-NEXT: v_readlane_b32 s30, v63, 4
; SI-NEXT: v_readlane_b32 s31, v63, 5
@@ -229735,77 +229874,72 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v7, v7, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v60
+; SI-NEXT: v_or_b32_e32 v8, v9, v8
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v9, v9, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v57
; SI-NEXT: v_or_b32_e32 v10, v13, v10
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v58
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v11, v11, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v57
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v47
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v42
-; SI-NEXT: v_or_b32_e32 v13, v13, v32
-; SI-NEXT: v_and_b32_e32 v32, 0xffff, v47
-; SI-NEXT: v_or_b32_e32 v14, v32, v14
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v13, v13, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v14, v19, v14
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v44
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v32, 0xffff, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v16, v32, v16
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v60
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v36
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v17
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v16, v19, v16
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v53
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v43
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v20
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v35
; SI-NEXT: v_or_b32_e32 v19, v19, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v50
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v40
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v59
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v48
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v22, v22, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v37
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v27
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v22, v22, v26
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v27
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v48
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v49
; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v38
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v54
-; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v43
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v44
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -229821,13 +229955,26 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v50
+; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v53
+; SI-NEXT: v_or_b32_e32 v27, v27, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_or_b32_e32 v30, v30, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v55
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
@@ -230381,189 +230528,192 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v49
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v48
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v39
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v38
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v30
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v26
+; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v24
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v34
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v58
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v5
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v63
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v60
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v9
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v13
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v11
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v56
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v15
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v46
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v17
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v61
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v45
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v30
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v2
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v4
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v6
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v59
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v8
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v57
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v56
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v18
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v12
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v52
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v33
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v41
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v53
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v52
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v38
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v44
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v46
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v59
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v57
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v43
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v41
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v44
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v42
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v55
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v52
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr62
@@ -230576,17 +230726,16 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; kill: killed $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; kill: killed $vgpr8
+; SI-NEXT: ; kill: killed $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; kill: killed $vgpr54
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v58
-; SI-NEXT: v_or_b32_e32 v61, v1, v8
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v58
+; SI-NEXT: v_or_b32_e32 v61, v1, v54
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63
; SI-NEXT: v_or_b32_e32 v46, v1, v3
@@ -230595,501 +230744,493 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v62, v1, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v59, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v57, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_alignbit_b32 v1, v61, v7, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v61, v54, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v54
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v56, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v46, v8, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v46, v11, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v45, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v62, v9, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v62, v13, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v44, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v59, v11, 16
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v59, v15, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v43, v1, v3
-; SI-NEXT: v_alignbit_b32 v1, v57, v13, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v57, v17, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v42, v1, v48
-; SI-NEXT: v_alignbit_b32 v1, v56, v15, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v42, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v56, v19, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v41, v1, v49
-; SI-NEXT: v_alignbit_b32 v1, v45, v34, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v41, v1, v3
+; SI-NEXT: v_alignbit_b32 v1, v45, v35, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v55, v1, v50
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v44, v31, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
-; SI-NEXT: v_or_b32_e32 v53, v1, v51
-; SI-NEXT: v_alignbit_b32 v1, v43, v35, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v7, v1, v51
+; SI-NEXT: v_alignbit_b32 v1, v43, v36, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v0, v7, v39, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27
-; SI-NEXT: v_or_b32_e32 v5, v1, v39
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v5, v1, v34
+; SI-NEXT: v_or_b32_e32 v0, v0, v11
; SI-NEXT: v_alignbit_b32 v1, v42, v32, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v0, v5, v47, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29
-; SI-NEXT: v_or_b32_e32 v3, v1, v4
-; SI-NEXT: v_alignbit_b32 v1, v41, v36, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v33
-; SI-NEXT: v_or_b32_e32 v4, v1, v6
-; SI-NEXT: v_alignbit_b32 v1, v55, v37, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr23
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v7
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v53, v38, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v3, v1, v52
+; SI-NEXT: v_or_b32_e32 v0, v0, v13
+; SI-NEXT: v_alignbit_b32 v1, v41, v37, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v5, v31, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v3, v48, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v3, v0, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v38
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v11
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
+; SI-NEXT: v_or_b32_e32 v1, v1, v53
+; SI-NEXT: v_or_b32_e32 v0, v0, v15
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v4, v2, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v1, v49, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v13
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8
+; SI-NEXT: v_or_b32_e32 v0, v0, v17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v1, v1, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v0, v0, v19
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v1, v1, v34
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v0, v0, v35
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v1, v1, v47
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v0, v0, v31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v1, v1, v35
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v0, v0, v36
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v1, v1, v32
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_or_b32_e32 v0, v0, v32
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v1, v1, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_or_b32_e32 v0, v0, v37
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v1, v1, v37
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_or_b32_e32 v0, v0, v33
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v1, v1, v38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_or_b32_e32 v0, v0, v39
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v26
-; SI-NEXT: v_or_b32_e32 v1, v1, v31
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_or_b32_e32 v0, v0, v47
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v28
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_or_b32_e32 v0, v0, v48
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v30
-; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: v_alignbit_b32 v9, v55, v33, 16
+; SI-NEXT: v_or_b32_e32 v0, v0, v49
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; kill: killed $vgpr33
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: .LBB110_2: ; %Flow
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_xor_b64 exec, exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_4
; SI-NEXT: ; %bb.3: ; %cmp.true
+; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
+; SI-NEXT: v_add_i32_e32 v38, vcc, 3, v38
; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28
+; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29
+; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
+; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
+; SI-NEXT: v_and_b32_e32 v38, 0xffff, v38
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: v_or_b32_e32 v30, v49, v30
+; SI-NEXT: v_or_b32_e32 v38, v53, v38
+; SI-NEXT: v_or_b32_e32 v28, v48, v28
+; SI-NEXT: v_or_b32_e32 v29, v52, v29
+; SI-NEXT: v_or_b32_e32 v26, v47, v26
+; SI-NEXT: v_or_b32_e32 v24, v39, v24
+; SI-NEXT: v_or_b32_e32 v22, v33, v22
+; SI-NEXT: v_add_i32_e32 v48, vcc, 0x30000, v30
+; SI-NEXT: v_add_i32_e32 v30, vcc, 0x30000, v38
+; SI-NEXT: v_add_i32_e32 v38, vcc, 0x30000, v28
+; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v29
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v26
+; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27
+; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v24
+; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x30000, v22
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_or_b32_e32 v22, v50, v22
+; SI-NEXT: v_or_b32_e32 v20, v37, v20
+; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v22
+; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v20
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v18, v32, v18
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v16, v36, v16
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v14, v31, v14
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v35, v12
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v0, v28
-; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v29
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
-; SI-NEXT: v_or_b32_e32 v4, v4, v28
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v26
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v31, v0
-; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30
-; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v27
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v30
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v24
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v38, v0
-; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v25
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v51, v0
-; SI-NEXT: v_add_i32_e32 v53, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v37, v0
-; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v23
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v50, v0
-; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v36, v0
-; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_add_i32_e32 v41, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v18
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v19
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v48, v0
-; SI-NEXT: v_add_i32_e32 v42, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v33
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
-; SI-NEXT: v_or_b32_e32 v6, v6, v30
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v6
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_or_b32_e32 v24, v51, v24
+; SI-NEXT: v_or_b32_e32 v26, v34, v26
+; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v24
+; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v17, v0
-; SI-NEXT: v_add_i32_e32 v43, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v47, v0
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v41, vcc, 0x30000, v20
+; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v15, v0
-; SI-NEXT: v_add_i32_e32 v44, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v34, v0
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: v_add_i32_e32 v42, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v13, v0
-; SI-NEXT: v_add_i32_e32 v45, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: v_add_i32_e32 v43, vcc, 0x30000, v16
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v10, v0
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v14, v15, v14
+; SI-NEXT: v_add_i32_e32 v44, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v12
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v11, v0
-; SI-NEXT: v_add_i32_e32 v56, vcc, 0x30000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v12, v13, v12
+; SI-NEXT: v_add_i32_e32 v45, vcc, 0x30000, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v45
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v11, v0
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v10, v12, v10
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v10
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v9, v0
-; SI-NEXT: v_add_i32_e32 v57, vcc, 0x30000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v57
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v56, vcc, 0x30000, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v9, v0
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v8
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v7, v0
-; SI-NEXT: v_add_i32_e32 v59, vcc, 0x30000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v8, v9, v8
+; SI-NEXT: v_add_i32_e32 v57, vcc, 0x30000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v6
+; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: v_add_i32_e32 v59, vcc, 0x30000, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v59
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v7, v0
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v4
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v5, v0
-; SI-NEXT: v_add_i32_e32 v62, vcc, 0x30000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_add_i32_e32 v62, vcc, 0x30000, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v62
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v5, v0
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x30000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v2, v4, v2
+; SI-NEXT: v_add_i32_e32 v4, vcc, 0x30000, v2
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v3, v0
-; SI-NEXT: v_add_i32_e32 v46, vcc, 0x30000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_add_i32_e32 v46, vcc, 0x30000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v46
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v3, v0
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x30000, v0
+; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v61, vcc, 0x30000, v0
-; SI-NEXT: v_alignbit_b32 v0, v61, v3, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v61, v2, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v46, v5, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v46, v4, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v62, v7, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v62, v6, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v59, v9, 16
+; SI-NEXT: v_alignbit_b32 v0, v59, v8, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v0, v57, v10, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v57, v11, 16
+; SI-NEXT: v_alignbit_b32 v0, v56, v12, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v56, v10, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v45, v14, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v45, v12, 16
+; SI-NEXT: v_alignbit_b32 v0, v44, v16, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v44, v14, 16
+; SI-NEXT: v_alignbit_b32 v0, v43, v18, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v43, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v42, v20, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v42, v18, 16
+; SI-NEXT: v_alignbit_b32 v0, v41, v22, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v41, v20, 16
+; SI-NEXT: v_alignbit_b32 v0, v55, v25, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v55, v22, 16
+; SI-NEXT: v_alignbit_b32 v0, v24, v27, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v53, v24, 16
+; SI-NEXT: v_alignbit_b32 v0, v26, v29, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v4, v26, 16
+; SI-NEXT: v_alignbit_b32 v0, v28, v38, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v2, v28, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v6, v8, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v30, v48, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v57
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v56
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44
@@ -231106,36 +231247,43 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v61
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: .LBB110_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v60
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v40
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v54
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v54
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
@@ -231144,45 +231292,44 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -231206,37 +231353,37 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v46
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v62
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v59
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v57
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v56
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v45
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
@@ -231248,19 +231395,19 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v16, v16, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v43
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v18, v18, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -231282,33 +231429,35 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v22, v22, v23
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v53
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
; SI-NEXT: v_or_b32_e32 v31, v31, v32
@@ -231592,53 +231741,52 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v32, s99, 33
; SI-NEXT: v_writelane_b32 v32, s30, 34
; SI-NEXT: v_writelane_b32 v32, s31, 35
+; SI-NEXT: s_lshr_b32 s4, s28, 16
; SI-NEXT: v_readfirstlane_b32 s68, v0
+; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s70, v2
; SI-NEXT: s_lshr_b32 s14, s68, 16
-; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v33, s4, 0
; SI-NEXT: v_readfirstlane_b32 s80, v4
; SI-NEXT: s_lshr_b32 s12, s70, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v33, s14, 0
+; SI-NEXT: v_writelane_b32 v33, s14, 1
; SI-NEXT: v_readfirstlane_b32 s82, v6
; SI-NEXT: s_lshr_b32 s10, s80, 16
-; SI-NEXT: v_writelane_b32 v33, s12, 1
+; SI-NEXT: v_writelane_b32 v33, s12, 2
; SI-NEXT: v_readfirstlane_b32 s84, v8
; SI-NEXT: s_lshr_b32 s8, s82, 16
-; SI-NEXT: v_writelane_b32 v33, s10, 2
+; SI-NEXT: v_writelane_b32 v33, s10, 3
; SI-NEXT: v_readfirstlane_b32 s86, v10
; SI-NEXT: s_lshr_b32 s6, s84, 16
-; SI-NEXT: v_writelane_b32 v33, s8, 3
-; SI-NEXT: s_lshr_b32 s4, s86, 16
-; SI-NEXT: v_writelane_b32 v33, s6, 4
+; SI-NEXT: v_writelane_b32 v33, s8, 4
+; SI-NEXT: s_lshr_b32 s41, s86, 16
+; SI-NEXT: v_writelane_b32 v33, s6, 5
; SI-NEXT: v_readfirstlane_b32 s15, v1
-; SI-NEXT: v_writelane_b32 v33, s4, 5
+; SI-NEXT: v_writelane_b32 v33, s41, 6
; SI-NEXT: v_readfirstlane_b32 s13, v3
-; SI-NEXT: v_writelane_b32 v33, s15, 6
+; SI-NEXT: v_writelane_b32 v33, s15, 7
; SI-NEXT: v_readfirstlane_b32 s11, v5
-; SI-NEXT: v_writelane_b32 v33, s13, 7
+; SI-NEXT: v_writelane_b32 v33, s13, 8
; SI-NEXT: v_readfirstlane_b32 s9, v7
-; SI-NEXT: v_writelane_b32 v33, s11, 8
+; SI-NEXT: v_writelane_b32 v33, s11, 9
; SI-NEXT: v_readfirstlane_b32 s7, v9
-; SI-NEXT: v_writelane_b32 v33, s9, 9
+; SI-NEXT: v_writelane_b32 v33, s9, 10
; SI-NEXT: v_readfirstlane_b32 s5, v11
-; SI-NEXT: v_writelane_b32 v33, s7, 10
+; SI-NEXT: v_writelane_b32 v33, s7, 11
; SI-NEXT: v_readfirstlane_b32 s75, v13
; SI-NEXT: v_readfirstlane_b32 s96, v12
-; SI-NEXT: v_writelane_b32 v33, s5, 11
+; SI-NEXT: v_writelane_b32 v33, s5, 12
; SI-NEXT: s_lshr_b32 s74, s96, 16
-; SI-NEXT: v_writelane_b32 v33, s75, 12
-; SI-NEXT: v_readfirstlane_b32 s72, v15
-; SI-NEXT: v_writelane_b32 v33, s74, 13
-; SI-NEXT: v_writelane_b32 v33, s72, 14
-; SI-NEXT: s_mov_b32 s76, s16
-; SI-NEXT: v_writelane_b32 v33, s17, 15
-; SI-NEXT: v_readfirstlane_b32 s62, v17
-; SI-NEXT: v_readfirstlane_b32 s99, v16
+; SI-NEXT: v_writelane_b32 v33, s75, 13
+; SI-NEXT: v_readfirstlane_b32 s73, v15
; SI-NEXT: v_readfirstlane_b32 s97, v14
-; SI-NEXT: v_writelane_b32 v33, s76, 16
+; SI-NEXT: v_writelane_b32 v33, s74, 14
+; SI-NEXT: v_readfirstlane_b32 s63, v17
+; SI-NEXT: v_readfirstlane_b32 s98, v16
+; SI-NEXT: s_lshr_b32 s72, s97, 16
+; SI-NEXT: v_writelane_b32 v33, s73, 15
; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
-; SI-NEXT: s_lshr_b32 s98, s28, 16
; SI-NEXT: s_lshr_b32 s95, s27, 16
; SI-NEXT: s_lshr_b32 s87, s26, 16
; SI-NEXT: s_lshr_b32 s93, s25, 16
@@ -231651,10 +231799,9 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s71, s18, 16
; SI-NEXT: s_lshr_b32 s77, s17, 16
; SI-NEXT: s_lshr_b32 s69, s16, 16
-; SI-NEXT: s_lshr_b32 s65, s62, 16
-; SI-NEXT: s_lshr_b32 s63, s99, 16
-; SI-NEXT: s_lshr_b32 s55, s72, 16
-; SI-NEXT: s_lshr_b32 s73, s97, 16
+; SI-NEXT: s_lshr_b32 s65, s63, 16
+; SI-NEXT: s_lshr_b32 s62, s98, 16
+; SI-NEXT: s_lshr_b32 s55, s73, 16
; SI-NEXT: s_lshr_b32 s53, s75, 16
; SI-NEXT: s_lshr_b32 s51, s5, 16
; SI-NEXT: s_lshr_b32 s49, s7, 16
@@ -231662,97 +231809,101 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s37, s11, 16
; SI-NEXT: s_lshr_b32 s35, s13, 16
; SI-NEXT: s_lshr_b32 s31, s15, 16
-; SI-NEXT: v_readfirstlane_b32 s16, v18
-; SI-NEXT: v_writelane_b32 v33, s19, 17
-; SI-NEXT: s_cmp_lg_u32 s16, 0
-; SI-NEXT: v_writelane_b32 v33, s18, 18
-; SI-NEXT: v_writelane_b32 v33, s21, 19
+; SI-NEXT: v_readfirstlane_b32 s40, v18
+; SI-NEXT: v_writelane_b32 v33, s72, 16
+; SI-NEXT: s_mov_b32 s88, s19
+; SI-NEXT: s_mov_b32 s99, s18
+; SI-NEXT: s_cmp_lg_u32 s40, 0
+; SI-NEXT: v_writelane_b32 v33, s63, 17
+; SI-NEXT: v_writelane_b32 v33, s16, 18
; SI-NEXT: s_cbranch_scc0 .LBB111_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s77, 16
-; SI-NEXT: s_or_b32 s61, s16, s17
-; SI-NEXT: s_and_b32 s16, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s79, 16
-; SI-NEXT: s_or_b32 s59, s16, s17
-; SI-NEXT: s_and_b32 s16, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s89, 16
-; SI-NEXT: s_or_b32 s57, s16, s17
-; SI-NEXT: s_and_b32 s16, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s91, 16
-; SI-NEXT: s_or_b32 s47, s16, s17
-; SI-NEXT: s_and_b32 s16, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s93, 16
-; SI-NEXT: s_or_b32 s45, s16, s17
-; SI-NEXT: s_and_b32 s16, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s95, 16
-; SI-NEXT: s_or_b32 s43, s16, s17
-; SI-NEXT: s_and_b32 s16, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s17, vcc_hi, 16
-; SI-NEXT: s_or_b32 s41, s16, s17
+; SI-NEXT: s_lshl_b32 s40, s4, 16
+; SI-NEXT: s_lshl_b32 s4, s41, 16
+; SI-NEXT: s_and_b32 s41, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s77, 16
+; SI-NEXT: s_or_b32 s61, s41, s43
+; SI-NEXT: s_and_b32 s41, s88, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s79, 16
+; SI-NEXT: s_or_b32 s59, s41, s43
+; SI-NEXT: s_and_b32 s41, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s89, 16
+; SI-NEXT: s_or_b32 s57, s41, s43
+; SI-NEXT: s_and_b32 s41, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s91, 16
+; SI-NEXT: s_or_b32 s47, s41, s43
+; SI-NEXT: s_and_b32 s41, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s93, 16
+; SI-NEXT: s_or_b32 s45, s41, s43
+; SI-NEXT: s_and_b32 s41, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s95, 16
+; SI-NEXT: s_or_b32 s43, s41, s43
+; SI-NEXT: s_and_b32 s41, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s76, vcc_hi, 16
+; SI-NEXT: s_or_b32 s41, s41, s76
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s31, 16
-; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: s_lshl_b32 s76, s31, 16
+; SI-NEXT: s_or_b32 s15, s15, s76
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s35, 16
-; SI-NEXT: s_or_b32 s13, s13, s16
+; SI-NEXT: s_lshl_b32 s76, s35, 16
+; SI-NEXT: s_or_b32 s13, s13, s76
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s37, 16
-; SI-NEXT: s_or_b32 s11, s11, s16
+; SI-NEXT: s_lshl_b32 s76, s37, 16
+; SI-NEXT: s_or_b32 s11, s11, s76
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s39, 16
-; SI-NEXT: s_or_b32 s9, s9, s16
+; SI-NEXT: s_lshl_b32 s76, s39, 16
+; SI-NEXT: s_or_b32 s9, s9, s76
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s49, 16
-; SI-NEXT: s_or_b32 s7, s7, s16
+; SI-NEXT: s_lshl_b32 s76, s49, 16
+; SI-NEXT: s_or_b32 s7, s7, s76
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s51, 16
-; SI-NEXT: s_or_b32 s5, s5, s16
-; SI-NEXT: s_and_b32 s16, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s53, 16
-; SI-NEXT: s_mov_b32 s66, s53
-; SI-NEXT: s_or_b32 s53, s16, s17
-; SI-NEXT: s_and_b32 s16, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s55, 16
-; SI-NEXT: s_mov_b32 s67, s55
-; SI-NEXT: s_or_b32 s55, s16, s17
-; SI-NEXT: s_mov_b32 s16, s62
-; SI-NEXT: s_and_b32 s19, s62, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s65, 16
+; SI-NEXT: s_lshl_b32 s76, s51, 16
; SI-NEXT: s_lshl_b32 s60, s69, 16
-; SI-NEXT: s_mov_b32 s17, s65
-; SI-NEXT: s_or_b32 s65, s19, s62
-; SI-NEXT: s_and_b32 s62, s76, 0xffff
+; SI-NEXT: s_or_b32 s5, s5, s76
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s53, 16
+; SI-NEXT: s_lshl_b32 s54, s72, 16
+; SI-NEXT: s_and_b32 s63, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s72, s65, 16
+; SI-NEXT: s_mov_b32 s78, s62
+; SI-NEXT: s_lshl_b32 s64, s62, 16
+; SI-NEXT: s_and_b32 s62, s16, 0xffff
; SI-NEXT: s_lshl_b32 s58, s71, 16
+; SI-NEXT: s_mov_b32 s66, s53
+; SI-NEXT: s_or_b32 s53, s75, s76
+; SI-NEXT: s_lshl_b32 s52, s74, 16
+; SI-NEXT: s_and_b32 s73, s73, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s55, 16
+; SI-NEXT: s_mov_b32 s76, s65
+; SI-NEXT: s_or_b32 s65, s63, s72
; SI-NEXT: s_or_b32 s62, s62, s60
-; SI-NEXT: s_mov_b32 s72, s77
-; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 16
-; SI-NEXT: s_and_b32 s60, s18, 0xffff
+; SI-NEXT: s_mov_b32 s72, s17
+; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16
+; SI-NEXT: s_and_b32 s60, s99, 0xffff
; SI-NEXT: s_lshl_b32 s56, s81, 16
-; SI-NEXT: s_lshl_b32 s52, s74, 16
+; SI-NEXT: s_mov_b32 s67, s55
+; SI-NEXT: s_or_b32 s55, s73, s74
; SI-NEXT: s_or_b32 s74, s60, s58
-; SI-NEXT: s_mov_b32 s60, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 16
; SI-NEXT: s_and_b32 s58, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s83, 16
-; SI-NEXT: s_mov_b32 s77, s72
+; SI-NEXT: s_mov_b32 s17, s72
; SI-NEXT: s_or_b32 s72, s58, s56
-; SI-NEXT: s_mov_b32 s58, s89
-; SI-NEXT: s_lshr_b64 s[88:89], s[56:57], 16
+; SI-NEXT: s_mov_b32 s73, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16
+; SI-NEXT: v_writelane_b32 v33, s56, 19
+; SI-NEXT: s_lshl_b32 s46, s83, 16
+; SI-NEXT: v_writelane_b32 v33, s57, 20
; SI-NEXT: s_and_b32 s56, s22, 0xffff
; SI-NEXT: s_lshl_b32 s44, s85, 16
-; SI-NEXT: s_mov_b32 s79, s60
; SI-NEXT: s_or_b32 s60, s56, s46
; SI-NEXT: s_mov_b32 s56, s91
; SI-NEXT: s_lshr_b64 s[90:91], s[46:47], 16
; SI-NEXT: s_and_b32 s46, s24, 0xffff
; SI-NEXT: s_lshl_b32 s42, s87, 16
-; SI-NEXT: s_mov_b32 s89, s58
; SI-NEXT: s_or_b32 s58, s46, s44
; SI-NEXT: s_mov_b32 s46, s93
; SI-NEXT: s_lshr_b64 s[92:93], s[44:45], 16
; SI-NEXT: s_and_b32 s44, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s98, 16
; SI-NEXT: s_mov_b32 s91, s56
; SI-NEXT: s_or_b32 s56, s44, s42
; SI-NEXT: s_mov_b32 s44, s95
@@ -231788,7 +231939,6 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s10, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[8:9], 16
; SI-NEXT: s_and_b32 s8, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_mov_b32 s37, s12
; SI-NEXT: s_or_b32 s12, s8, s6
; SI-NEXT: s_mov_b32 s8, s49
@@ -231799,19 +231949,14 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s6, s51
; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
; SI-NEXT: s_and_b32 s4, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s54, s73, 16
; SI-NEXT: s_mov_b32 s49, s8
; SI-NEXT: s_or_b32 s8, s4, s52
; SI-NEXT: s_and_b32 s4, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s64, s63, 16
; SI-NEXT: s_mov_b32 s51, s6
; SI-NEXT: s_or_b32 s6, s4, s54
-; SI-NEXT: s_and_b32 s4, s99, 0xffff
-; SI-NEXT: s_mov_b32 s21, s73
-; SI-NEXT: s_mov_b32 s19, s63
+; SI-NEXT: s_and_b32 s4, s98, 0xffff
; SI-NEXT: s_mov_b32 s63, s61
; SI-NEXT: s_mov_b32 s75, s59
-; SI-NEXT: s_mov_b32 s73, s57
; SI-NEXT: s_mov_b32 s61, s47
; SI-NEXT: s_mov_b32 s59, s45
; SI-NEXT: s_mov_b32 s57, s43
@@ -231831,20 +231976,20 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16
; SI-NEXT: s_mov_b32 s53, s66
; SI-NEXT: s_mov_b32 s55, s67
-; SI-NEXT: s_mov_b32 s65, s17
+; SI-NEXT: s_mov_b32 s65, s76
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB111_3
; SI-NEXT: .LBB111_2:
-; SI-NEXT: s_mov_b32 s19, s63
-; SI-NEXT: s_mov_b32 s16, s62
-; SI-NEXT: s_mov_b32 s21, s73
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b32 s78, s62
; SI-NEXT: s_mov_b64 s[66:67], -1
+; SI-NEXT: v_writelane_b32 v33, s4, 19
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr16
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr18
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: v_writelane_b32 v33, s5, 20
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr58
@@ -231873,175 +232018,170 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: .LBB111_3: ; %Flow
; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 s17, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s17, 1
+; SI-NEXT: s_cselect_b32 s76, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s76, 1
+; SI-NEXT: s_mov_b32 s76, s16
+; SI-NEXT: s_mov_b32 s66, s18
; SI-NEXT: s_cbranch_scc1 .LBB111_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s99, s99, 3
-; SI-NEXT: s_and_b32 s4, s99, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s19, 16
+; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: s_and_b32 s4, s98, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s5, s16, 3
+; SI-NEXT: v_readlane_b32 s5, v33, 17
+; SI-NEXT: s_add_i32 s5, s5, 3
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s6, s65, 16
-; SI-NEXT: s_add_i32 s97, s97, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s21, 16
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v33, 14
+; SI-NEXT: s_add_i32 s97, s97, 3
+; SI-NEXT: v_readlane_b32 s6, v33, 16
+; SI-NEXT: s_and_b32 s7, s97, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: v_readlane_b32 s7, v33, 15
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s8, s55, 16
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_add_i32 s96, s96, 3
-; SI-NEXT: v_readlane_b32 s8, v33, 13
+; SI-NEXT: v_readlane_b32 s8, v33, 14
; SI-NEXT: s_and_b32 s9, s96, 0xffff
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: v_readlane_b32 s9, v33, 12
+; SI-NEXT: v_readlane_b32 s9, v33, 13
; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s10, s53, 16
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_add_i32 s86, s86, 3
-; SI-NEXT: v_readlane_b32 s10, v33, 5
+; SI-NEXT: v_readlane_b32 s10, v33, 6
; SI-NEXT: s_and_b32 s11, s86, 0xffff
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: v_readlane_b32 s11, v33, 11
+; SI-NEXT: v_readlane_b32 s11, v33, 12
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s12, s51, 16
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_add_i32 s84, s84, 3
-; SI-NEXT: v_readlane_b32 s12, v33, 4
+; SI-NEXT: v_readlane_b32 s12, v33, 5
; SI-NEXT: s_and_b32 s13, s84, 0xffff
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: v_readlane_b32 s13, v33, 10
+; SI-NEXT: v_readlane_b32 s13, v33, 11
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s14, s49, 16
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: v_readlane_b32 s14, v33, 3
+; SI-NEXT: v_readlane_b32 s14, v33, 4
; SI-NEXT: s_and_b32 s15, s82, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: v_readlane_b32 s15, v33, 9
+; SI-NEXT: v_readlane_b32 s15, v33, 10
; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s39, 16
-; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_lshl_b32 s40, s39, 16
+; SI-NEXT: s_or_b32 s15, s40, s15
; SI-NEXT: s_add_i32 s80, s80, 3
-; SI-NEXT: v_readlane_b32 s16, v33, 2
-; SI-NEXT: s_and_b32 s17, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_add_i32 s40, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 8
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s37, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s41, s16, 0x30000
+; SI-NEXT: v_readlane_b32 s40, v33, 3
+; SI-NEXT: s_and_b32 s41, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_or_b32 s40, s40, s41
+; SI-NEXT: v_readlane_b32 s41, v33, 9
+; SI-NEXT: s_add_i32 s41, s41, 3
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s37, 16
+; SI-NEXT: s_or_b32 s41, s42, s41
; SI-NEXT: s_add_i32 s70, s70, 3
-; SI-NEXT: v_readlane_b32 s16, v33, 1
-; SI-NEXT: s_and_b32 s17, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_add_i32 s42, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 7
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s35, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s43, s16, 0x30000
+; SI-NEXT: v_readlane_b32 s42, v33, 2
+; SI-NEXT: s_and_b32 s43, s70, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_or_b32 s42, s42, s43
+; SI-NEXT: v_readlane_b32 s43, v33, 8
+; SI-NEXT: s_add_i32 s43, s43, 3
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s35, 16
+; SI-NEXT: s_or_b32 s43, s44, s43
; SI-NEXT: s_add_i32 s68, s68, 3
-; SI-NEXT: v_readlane_b32 s16, v33, 0
-; SI-NEXT: s_and_b32 s17, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_add_i32 s44, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 6
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s31, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: v_readlane_b32 s44, v33, 1
+; SI-NEXT: s_and_b32 s45, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s44, s44, s45
+; SI-NEXT: v_readlane_b32 s45, v33, 7
+; SI-NEXT: s_add_i32 s45, s45, 3
+; SI-NEXT: s_and_b32 s45, s45, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s31, 16
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_add_i32 s45, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s98, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s45, s46, s45
+; SI-NEXT: s_and_b32 s46, s28, 0xffff
+; SI-NEXT: v_readlane_b32 s28, v33, 0
+; SI-NEXT: s_lshl_b32 s28, s28, 16
+; SI-NEXT: s_or_b32 s28, s28, s46
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_add_i32 s46, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s17, vcc_hi, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s46, s28, 0x30000
+; SI-NEXT: s_and_b32 s28, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s29, vcc_hi, 16
+; SI-NEXT: s_or_b32 s28, s29, s28
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_add_i32 s47, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s87, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s47, s28, 0x30000
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s28, s87, 16
+; SI-NEXT: s_or_b32 s26, s28, s26
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_add_i32 s56, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s95, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s56, s26, 0x30000
+; SI-NEXT: s_and_b32 s26, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s27, s95, 16
+; SI-NEXT: s_or_b32 s26, s27, s26
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_add_i32 s57, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s85, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s57, s26, 0x30000
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s26, s85, 16
+; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_add_i32 s58, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s93, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s58, s24, 0x30000
+; SI-NEXT: s_and_b32 s24, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s25, s93, 16
+; SI-NEXT: s_or_b32 s24, s25, s24
; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_add_i32 s59, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s83, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s59, s24, 0x30000
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s24, s83, 16
+; SI-NEXT: s_or_b32 s22, s24, s22
; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: s_add_i32 s60, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s91, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s60, s22, 0x30000
+; SI-NEXT: s_and_b32 s22, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s23, s91, 16
+; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_add_i32 s61, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s81, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s72, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 19
-; SI-NEXT: s_add_i32 s21, s16, 3
-; SI-NEXT: s_and_b32 s16, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s89, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s73, s16, 0x30000
+; SI-NEXT: s_add_i32 s61, s22, 0x30000
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s22, s81, 16
+; SI-NEXT: s_or_b32 s20, s22, s20
+; SI-NEXT: s_add_i32 s21, s21, 3
+; SI-NEXT: s_add_i32 s72, s20, 0x30000
+; SI-NEXT: s_and_b32 s20, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s21, s89, 16
+; SI-NEXT: s_or_b32 s20, s21, s20
+; SI-NEXT: s_add_i32 s18, s99, 3
+; SI-NEXT: s_add_i32 s73, s20, 0x30000
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s20, s71, 16
+; SI-NEXT: s_or_b32 s18, s20, s18
+; SI-NEXT: s_add_i32 s19, s88, 3
+; SI-NEXT: s_add_i32 s74, s18, 0x30000
+; SI-NEXT: s_and_b32 s18, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s79, 16
; SI-NEXT: v_readlane_b32 s16, v33, 18
+; SI-NEXT: s_or_b32 s18, s19, s18
; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_add_i32 s75, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s71, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s74, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 17
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s79, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s75, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 16
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s69, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_lshl_b32 s18, s69, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s62, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 15
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_and_b32 s16, s17, 0xffff
; SI-NEXT: s_lshl_b32 s17, s77, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
@@ -232056,10 +232196,15 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s13, s13, 0x30000
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
+; SI-NEXT: s_add_i32 s40, s40, 0x30000
+; SI-NEXT: s_add_i32 s41, s41, 0x30000
+; SI-NEXT: s_add_i32 s42, s42, 0x30000
+; SI-NEXT: s_add_i32 s43, s43, 0x30000
+; SI-NEXT: s_add_i32 s44, s44, 0x30000
+; SI-NEXT: s_add_i32 s45, s45, 0x30000
; SI-NEXT: s_add_i32 s63, s16, 0x30000
; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16
@@ -232073,6 +232218,8 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[74:75], 16
+; SI-NEXT: v_writelane_b32 v33, s16, 19
; SI-NEXT: s_lshr_b32 s77, s63, 16
; SI-NEXT: s_lshr_b32 s79, s75, 16
; SI-NEXT: s_lshr_b32 s89, s73, 16
@@ -232089,6 +232236,7 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s53, s9, 16
; SI-NEXT: s_lshr_b32 s55, s7, 16
; SI-NEXT: s_lshr_b32 s65, s5, 16
+; SI-NEXT: v_writelane_b32 v33, s17, 20
; SI-NEXT: .LBB111_5: ; %end
; SI-NEXT: s_and_b32 s16, s62, 0xffff
; SI-NEXT: s_lshl_b32 s17, s76, 16
@@ -232097,13 +232245,15 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s18, s77, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s74, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s78, 16
+; SI-NEXT: s_lshl_b32 s19, s66, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s75, 0xffff
; SI-NEXT: s_lshl_b32 s20, s79, 16
+; SI-NEXT: v_readlane_b32 s22, v33, 19
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s88, 16
+; SI-NEXT: s_lshl_b32 s21, s22, 16
+; SI-NEXT: v_readlane_b32 s23, v33, 20
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s73, 0xffff
; SI-NEXT: s_lshl_b32 s22, s89, 16
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
index f7ffdbe80172b..7150af23c05e0 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
@@ -20250,15 +20250,17 @@ define <16 x i8> @bitcast_v8i16_to_v16i8(<8 x i16> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v8i16_to_v16i8:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v19, v3
+; VI-NEXT: v_mov_b32_e32 v18, v2
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
-; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v18
; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v0
-; VI-NEXT: ; implicit-def: $vgpr20
-; VI-NEXT: ; implicit-def: $vgpr19
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: ; implicit-def: $vgpr16
-; VI-NEXT: ; implicit-def: $vgpr4
+; VI-NEXT: ; implicit-def: $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr17
; VI-NEXT: ; implicit-def: $vgpr5
; VI-NEXT: ; implicit-def: $vgpr7
; VI-NEXT: ; implicit-def: $vgpr8
@@ -20271,55 +20273,54 @@ define <16 x i8> @bitcast_v8i16_to_v16i8(<8 x i16> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v19
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v18
; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v0
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3]
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[0:1]
-; VI-NEXT: v_mov_b32_e32 v20, v0
-; VI-NEXT: v_mov_b32_e32 v4, v1
-; VI-NEXT: v_mov_b32_e32 v8, v2
-; VI-NEXT: v_mov_b32_e32 v21, v3
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v0
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[18:19]
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
+; VI-NEXT: v_mov_b32_e32 v16, v0
+; VI-NEXT: v_mov_b32_e32 v17, v1
+; VI-NEXT: v_mov_b32_e32 v8, v18
+; VI-NEXT: v_mov_b32_e32 v21, v19
; VI-NEXT: ; implicit-def: $vgpr1
-; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: .LBB96_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v5, 3
-; VI-NEXT: v_add_u16_sdwa v6, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v18, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v14, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v10, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v4, 3, v1
+; VI-NEXT: v_mov_b32_e32 v3, 3
+; VI-NEXT: v_add_u16_sdwa v6, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v2, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v14, v19, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v10, v18, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v17, 3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v6
-; VI-NEXT: v_add_u16_e32 v20, 3, v0
-; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v18
-; VI-NEXT: v_add_u16_e32 v21, 3, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
-; VI-NEXT: v_add_u16_e32 v8, 3, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
-; VI-NEXT: v_or_b32_e32 v1, v4, v1
-; VI-NEXT: v_or_b32_e32 v0, v20, v0
-; VI-NEXT: v_or_b32_e32 v3, v21, v3
-; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3]
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[0:1]
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; VI-NEXT: v_add_u16_e32 v16, 3, v0
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; VI-NEXT: v_add_u16_e32 v21, 3, v19
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v14
+; VI-NEXT: v_add_u16_e32 v8, 3, v18
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: v_or_b32_e32 v0, v16, v0
+; VI-NEXT: v_or_b32_e32 v19, v21, v4
+; VI-NEXT: v_or_b32_e32 v18, v8, v3
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[18:19]
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v18
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v0
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v0
; VI-NEXT: v_bfe_u32 v15, v14, 8, 8
; VI-NEXT: v_bfe_u32 v7, v6, 8, 8
; VI-NEXT: .LBB96_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: v_mov_b32_e32 v0, v20
-; VI-NEXT: v_mov_b32_e32 v1, v19
-; VI-NEXT: v_mov_b32_e32 v2, v18
-; VI-NEXT: v_mov_b32_e32 v3, v16
+; VI-NEXT: v_mov_b32_e32 v0, v16
+; VI-NEXT: v_mov_b32_e32 v1, v20
+; VI-NEXT: v_mov_b32_e32 v4, v17
; VI-NEXT: v_mov_b32_e32 v12, v21
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -20907,16 +20908,16 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v1
; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v9
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_2
@@ -20927,7 +20928,7 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v5, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v13
+; SI-NEXT: v_or_b32_e32 v0, v0, v19
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_or_b32_e32 v4, v16, v3
; SI-NEXT: v_or_b32_e32 v2, v18, v2
@@ -20951,8 +20952,8 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v7, v1, v2, 16
; SI-NEXT: v_alignbit_b32 v11, v3, v5, 16
; SI-NEXT: v_or_b32_e32 v5, v0, v5
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -20967,7 +20968,7 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: .LBB98_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -20999,7 +21000,7 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v0, v13, v0
+; SI-NEXT: v_or_b32_e32 v0, v19, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -21020,21 +21021,21 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
; SI-NEXT: v_alignbit_b32 v7, v1, v9, 16
; SI-NEXT: v_alignbit_b32 v11, v3, v5, 16
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v3
; SI-NEXT: .LBB98_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v11
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v15
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -22687,37 +22688,37 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i
; SI-NEXT: s_and_b32 s10, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s16, 16
; SI-NEXT: s_cmp_lg_u32 s20, 0
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s8
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s4
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s11
; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7
; SI-NEXT: s_cbranch_scc0 .LBB103_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v19
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
; SI-NEXT: v_lshr_b64 v[5:6], v[0:1], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v22
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v20
-; SI-NEXT: v_lshr_b64 v[16:17], v[4:5], 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v23
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v21
+; SI-NEXT: v_lshr_b64 v[14:15], v[4:5], 16
; SI-NEXT: v_lshr_b64 v[3:4], v[7:8], 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v21
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v22
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: v_lshr_b64 v[17:18], v[2:3], 16
-; SI-NEXT: v_lshr_b64 v[9:10], v[14:15], 16
+; SI-NEXT: v_lshr_b64 v[18:19], v[2:3], 16
+; SI-NEXT: v_lshr_b64 v[9:10], v[16:17], 16
; SI-NEXT: v_lshr_b64 v[12:13], v[11:12], 16
; SI-NEXT: s_branch .LBB103_3
; SI-NEXT: .LBB103_2:
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: .LBB103_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
@@ -22725,13 +22726,13 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB103_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v23
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v14
; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v11
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
@@ -22739,10 +22740,10 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i
; SI-NEXT: v_lshr_b64 v[12:13], v[1:2], 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v7
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v20
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v19
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v20
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
@@ -22751,17 +22752,17 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v5
; SI-NEXT: v_lshr_b64 v[5:6], v[0:1], 16
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
-; SI-NEXT: v_lshr_b64 v[16:17], v[4:5], 16
-; SI-NEXT: v_lshr_b64 v[17:18], v[2:3], 16
+; SI-NEXT: v_lshr_b64 v[14:15], v[4:5], 16
+; SI-NEXT: v_lshr_b64 v[18:19], v[2:3], 16
; SI-NEXT: .LBB103_5: ; %end
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v18
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v8
@@ -23978,16 +23979,16 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v1
; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v9
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB106_2
@@ -23998,7 +23999,7 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v5, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v13
+; SI-NEXT: v_or_b32_e32 v0, v0, v19
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_or_b32_e32 v4, v16, v3
; SI-NEXT: v_or_b32_e32 v2, v18, v2
@@ -24022,8 +24023,8 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v7, v1, v2, 16
; SI-NEXT: v_alignbit_b32 v11, v3, v5, 16
; SI-NEXT: v_or_b32_e32 v5, v0, v5
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -24038,7 +24039,7 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: .LBB106_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -24070,7 +24071,7 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v0, v13, v0
+; SI-NEXT: v_or_b32_e32 v0, v19, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -24091,21 +24092,21 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
; SI-NEXT: v_alignbit_b32 v7, v1, v9, 16
; SI-NEXT: v_alignbit_b32 v11, v3, v5, 16
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v3
; SI-NEXT: .LBB106_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v11
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v15
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -26304,9 +26305,9 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v15
@@ -26316,8 +26317,8 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_2
@@ -26328,13 +26329,13 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v3, v1, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v5, v16, v0
+; SI-NEXT: v_or_b32_e32 v5, v17, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v21
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v11, v18, v0
+; SI-NEXT: v_or_b32_e32 v11, v19, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v9
@@ -26344,10 +26345,10 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v15, v20, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v12
; SI-NEXT: v_or_b32_e32 v0, v0, v23
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v14
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v19, v22, v0
+; SI-NEXT: v_or_b32_e32 v18, v22, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
@@ -26358,9 +26359,9 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr22
@@ -26408,9 +26409,9 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v18, v4
+; SI-NEXT: v_or_b32_e32 v4, v19, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v16, v1
+; SI-NEXT: v_or_b32_e32 v1, v17, v1
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v3
@@ -26421,8 +26422,8 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v8
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v8
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v12
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v12
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v12
; SI-NEXT: .LBB110_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
@@ -26437,9 +26438,9 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v13
; SI-NEXT: v_alignbit_b32 v2, v2, v3, 16
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v19
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v18
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v17
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v16
; SI-NEXT: v_alignbit_b32 v3, v3, v4, 16
; SI-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
index 91e0d813bf830..e06373201de30 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
@@ -30431,8 +30431,8 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8
; SI-NEXT: v_mul_f32_e32 v31, 1.0, v0
; SI-NEXT: v_mul_f32_e32 v30, 1.0, v16
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v1
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15
+; SI-NEXT: v_mul_f32_e32 v17, 1.0, v1
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v15
; SI-NEXT: v_mul_f32_e32 v29, 1.0, v2
; SI-NEXT: v_mul_f32_e32 v28, 1.0, v14
; SI-NEXT: v_mul_f32_e32 v19, 1.0, v3
@@ -30458,7 +30458,7 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -30467,8 +30467,8 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v31
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v30
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v16
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v29
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v28
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v19
@@ -30478,13 +30478,13 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v21
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v20
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v24
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v22
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr19
@@ -30530,7 +30530,7 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v5
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v20
; SI-NEXT: v_alignbit_b32 v7, v8, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21
@@ -30545,9 +30545,9 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v3
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v15
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v16
; SI-NEXT: v_alignbit_b32 v3, v10, v1, 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
@@ -30556,7 +30556,7 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v12, v1, v12, 16
; SI-NEXT: v_alignbit_b32 v13, v3, v13, 16
; SI-NEXT: v_alignbit_b32 v14, v5, v14, 16
-; SI-NEXT: v_alignbit_b32 v17, v7, v17, 16
+; SI-NEXT: v_alignbit_b32 v15, v7, v15, 16
; SI-NEXT: .LBB94_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -30575,7 +30575,7 @@ define <16 x i16> @bitcast_v16bf16_to_v16i16(<16 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v14
; SI-NEXT: v_or_b32_e32 v5, v5, v9
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v15
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v0, v0, v12
@@ -32231,19 +32231,23 @@ define <32 x i8> @bitcast_v16i16_to_v32i8(<16 x i16> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v16i16_to_v32i8:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v34, v5
+; VI-NEXT: v_mov_b32_e32 v33, v4
+; VI-NEXT: v_mov_b32_e32 v37, v3
+; VI-NEXT: v_mov_b32_e32 v36, v2
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v0
+; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v34
+; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v33
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37
+; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr5
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr8
; VI-NEXT: ; implicit-def: $vgpr9
@@ -32260,7 +32264,7 @@ define <32 x i8> @bitcast_v16i16_to_v32i8(<16 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: ; implicit-def: $vgpr11
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr27
@@ -32271,93 +32275,90 @@ define <32 x i8> @bitcast_v16i16_to_v32i8(<16 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7
; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v5
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v34
+; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v34
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v33
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36
; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v1
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0
; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7]
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[4:5]
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3]
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[0:1]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[33:34]
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
; VI-NEXT: v_mov_b32_e32 v50, v0
; VI-NEXT: v_mov_b32_e32 v48, v1
-; VI-NEXT: v_mov_b32_e32 v8, v2
-; VI-NEXT: v_mov_b32_e32 v35, v3
-; VI-NEXT: v_mov_b32_e32 v16, v4
-; VI-NEXT: v_mov_b32_e32 v49, v5
+; VI-NEXT: v_mov_b32_e32 v8, v36
+; VI-NEXT: v_mov_b32_e32 v35, v37
+; VI-NEXT: v_mov_b32_e32 v16, v33
+; VI-NEXT: v_mov_b32_e32 v49, v34
; VI-NEXT: v_mov_b32_e32 v24, v6
; VI-NEXT: v_mov_b32_e32 v51, v7
; VI-NEXT: ; implicit-def: $vgpr1
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr5
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr7
; VI-NEXT: .LBB96_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v9, 3
-; VI-NEXT: v_add_u16_sdwa v36, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v32, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v14, v3, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v10, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v22, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v18, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v30, v7, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v26, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_mov_b32_e32 v3, 3
+; VI-NEXT: v_add_u16_sdwa v14, v37, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v35, 3, v37
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v14
+; VI-NEXT: v_add_u16_sdwa v10, v36, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v37, v35, v4
+; VI-NEXT: v_add_u16_e32 v8, 3, v36
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v10
+; VI-NEXT: v_add_u16_sdwa v22, v34, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v36, v8, v4
+; VI-NEXT: v_add_u16_e32 v49, 3, v34
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v22
+; VI-NEXT: v_add_u16_sdwa v18, v33, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v32, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v2, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v34, v49, v4
+; VI-NEXT: v_add_u16_e32 v16, 3, v33
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v18
+; VI-NEXT: v_add_u16_sdwa v30, v7, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v26, v6, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v48, 3, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
; VI-NEXT: v_add_u16_e32 v50, 3, v0
-; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v32
-; VI-NEXT: v_add_u16_e32 v35, 3, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
-; VI-NEXT: v_add_u16_e32 v8, 3, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
-; VI-NEXT: v_add_u16_e32 v49, 3, v5
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v22
-; VI-NEXT: v_add_u16_e32 v16, 3, v4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v18
+; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; VI-NEXT: v_or_b32_e32 v33, v16, v4
; VI-NEXT: v_add_u16_e32 v51, 3, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v30
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v30
; VI-NEXT: v_add_u16_e32 v24, 3, v6
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v26
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v26
; VI-NEXT: v_or_b32_e32 v1, v48, v1
; VI-NEXT: v_or_b32_e32 v0, v50, v0
-; VI-NEXT: v_or_b32_e32 v3, v35, v3
-; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_or_b32_e32 v5, v49, v5
-; VI-NEXT: v_or_b32_e32 v4, v16, v4
-; VI-NEXT: v_or_b32_e32 v7, v51, v7
-; VI-NEXT: v_or_b32_e32 v6, v24, v6
+; VI-NEXT: v_or_b32_e32 v7, v51, v4
+; VI-NEXT: v_or_b32_e32 v6, v24, v3
; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7]
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[4:5]
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3]
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[0:1]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[33:34]
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7
; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v34
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v33
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0
; VI-NEXT: v_bfe_u32 v31, v30, 8, 8
; VI-NEXT: v_bfe_u32 v23, v22, 8, 8
; VI-NEXT: v_bfe_u32 v15, v14, 8, 8
-; VI-NEXT: v_bfe_u32 v39, v36, 8, 8
+; VI-NEXT: v_bfe_u32 v39, v32, 8, 8
; VI-NEXT: .LBB96_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: v_mov_b32_e32 v0, v50
; VI-NEXT: v_mov_b32_e32 v1, v38
-; VI-NEXT: v_mov_b32_e32 v2, v32
-; VI-NEXT: v_mov_b32_e32 v3, v33
; VI-NEXT: v_mov_b32_e32 v4, v48
-; VI-NEXT: v_mov_b32_e32 v5, v37
-; VI-NEXT: v_mov_b32_e32 v6, v36
+; VI-NEXT: v_mov_b32_e32 v6, v32
; VI-NEXT: v_mov_b32_e32 v7, v39
; VI-NEXT: v_mov_b32_e32 v12, v35
; VI-NEXT: v_mov_b32_e32 v20, v49
@@ -32699,7 +32700,7 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s75, s23, 16
-; SI-NEXT: s_lshr_b32 s79, s22, 16
+; SI-NEXT: s_lshr_b32 s89, s22, 16
; SI-NEXT: s_lshr_b32 s74, s21, 16
; SI-NEXT: s_lshr_b32 s78, s20, 16
; SI-NEXT: s_lshr_b32 s73, s19, 16
@@ -32729,7 +32730,7 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[12:13], s[4:5], 24
; SI-NEXT: s_or_b32 s9, s9, s10
; SI-NEXT: s_and_b32 s10, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s79, 16
+; SI-NEXT: s_lshl_b32 s11, s89, 16
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s23, 0xffff
; SI-NEXT: s_lshl_b32 s13, s75, 16
@@ -32742,11 +32743,11 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b32 s13, s5, 8
; SI-NEXT: s_lshr_b32 s25, s7, 8
; SI-NEXT: s_lshr_b32 s29, s9, 8
-; SI-NEXT: s_lshr_b32 s88, s11, 8
+; SI-NEXT: s_lshr_b32 s79, s11, 8
; SI-NEXT: s_bfe_u32 s15, s72, 0x80008
; SI-NEXT: s_bfe_u32 s27, s73, 0x80008
; SI-NEXT: s_bfe_u32 s41, s74, 0x80008
-; SI-NEXT: s_bfe_u32 s89, s75, 0x80008
+; SI-NEXT: s_bfe_u32 s88, s75, 0x80008
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
@@ -32779,8 +32780,8 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: .LBB97_3: ; %Flow
; SI-NEXT: s_and_b64 s[62:63], s[62:63], exec
; SI-NEXT: s_cselect_b32 s43, 1, 0
@@ -32789,7 +32790,7 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s79, 16
+; SI-NEXT: s_lshl_b32 s5, s89, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s10, s4, 0x30000
@@ -32848,9 +32849,9 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b32 s41, s9, 24
; SI-NEXT: s_lshr_b32 s74, s9, 16
; SI-NEXT: s_lshr_b32 s29, s9, 8
-; SI-NEXT: s_lshr_b32 s89, s11, 24
+; SI-NEXT: s_lshr_b32 s88, s11, 24
; SI-NEXT: s_lshr_b32 s75, s11, 16
-; SI-NEXT: s_lshr_b32 s88, s11, 8
+; SI-NEXT: s_lshr_b32 s79, s11, 8
; SI-NEXT: .LBB97_5: ; %end
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s24
@@ -32881,9 +32882,9 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v26, s58
; SI-NEXT: v_mov_b32_e32 v27, s56
; SI-NEXT: v_mov_b32_e32 v28, s11
-; SI-NEXT: v_mov_b32_e32 v29, s88
+; SI-NEXT: v_mov_b32_e32 v29, s79
; SI-NEXT: v_mov_b32_e32 v30, s75
-; SI-NEXT: v_mov_b32_e32 v31, s89
+; SI-NEXT: v_mov_b32_e32 v31, s88
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v16i16_to_v32i8_scalar:
@@ -33340,43 +33341,43 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i8_to_v16i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32
; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v5
; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v13
-; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v15
-; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13
+; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v15
+; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v21
; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v19
; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v29
; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v9
; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v25
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v34
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v52, 24, v38
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: v_lshlrev_b32_e32 v52, 24, v35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_2
@@ -33385,19 +33386,19 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v5, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v19
+; SI-NEXT: v_or_b32_e32 v0, v0, v27
; SI-NEXT: v_or_b32_e32 v2, v33, v2
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v3, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v6, v34, v5
+; SI-NEXT: v_or_b32_e32 v6, v36, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v23, v0, v2
+; SI-NEXT: v_or_b32_e32 v21, v0, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v7, 0xff, v22
-; SI-NEXT: v_or_b32_e32 v0, v0, v27
-; SI-NEXT: v_or_b32_e32 v9, v36, v5
+; SI-NEXT: v_or_b32_e32 v0, v0, v37
+; SI-NEXT: v_or_b32_e32 v9, v39, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v20
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
@@ -33419,8 +33420,8 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v12, 0xff, v30
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v1, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_alignbit_b32 v21, v5, v11, 16
+; SI-NEXT: v_or_b32_e32 v3, v3, v38
+; SI-NEXT: v_alignbit_b32 v19, v5, v11, 16
; SI-NEXT: v_or_b32_e32 v7, v7, v53
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_and_b32_e32 v14, 0xff, v26
@@ -33439,12 +33440,12 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v13, v1, v2, 16
; SI-NEXT: v_alignbit_b32 v17, v3, v9, 16
-; SI-NEXT: v_alignbit_b32 v25, v7, v14, 16
+; SI-NEXT: v_alignbit_b32 v23, v7, v14, 16
; SI-NEXT: v_or_b32_e32 v9, v0, v14
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v12
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -33464,17 +33465,17 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: .LBB98_2: ; %Flow
@@ -33529,36 +33530,36 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v1, v27, v1
+; SI-NEXT: v_or_b32_e32 v1, v37, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v36, v3
+; SI-NEXT: v_or_b32_e32 v3, v39, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v14
-; SI-NEXT: v_or_b32_e32 v1, v35, v1
+; SI-NEXT: v_or_b32_e32 v1, v38, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v34, v3
+; SI-NEXT: v_or_b32_e32 v3, v36, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v0, v19, v0
+; SI-NEXT: v_or_b32_e32 v0, v27, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v33, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v6
@@ -33570,39 +33571,39 @@ define <16 x i16> @bitcast_v32i8_to_v16i16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v31, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v13, v1, v23, 16
+; SI-NEXT: v_alignbit_b32 v13, v1, v21, 16
; SI-NEXT: v_alignbit_b32 v17, v3, v15, 16
-; SI-NEXT: v_alignbit_b32 v21, v5, v11, 16
-; SI-NEXT: v_alignbit_b32 v25, v7, v9, 16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
+; SI-NEXT: v_alignbit_b32 v19, v5, v11, 16
+; SI-NEXT: v_alignbit_b32 v23, v7, v9, 16
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7
; SI-NEXT: .LBB98_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v23
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v17
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v29
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v19
; SI-NEXT: v_or_b32_e32 v4, v4, v6
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v23
; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -36626,9 +36627,9 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg %
; SI-NEXT: v_mul_f32_e64 v39, 1.0, s4
; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5
; SI-NEXT: v_mul_f32_e64 v31, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s7
; SI-NEXT: s_cbranch_scc0 .LBB103_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v37
@@ -36640,34 +36641,34 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg %
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50
; SI-NEXT: v_lshr_b64 v[10:11], v[17:18], 16
; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v50
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v51
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v49
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v48
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v51
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v50
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v49
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v48
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v49
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v48
; SI-NEXT: v_lshr_b64 v[33:34], v[2:3], 16
+; SI-NEXT: v_lshr_b64 v[21:22], v[29:30], 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: v_lshr_b64 v[11:12], v[12:13], 16
; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16
; SI-NEXT: v_lshr_b64 v[34:35], v[6:7], 16
; SI-NEXT: v_lshr_b64 v[5:6], v[31:32], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[26:27], v[25:26], 16
-; SI-NEXT: v_lshr_b64 v[29:30], v[21:22], 16
+; SI-NEXT: v_lshr_b64 v[22:23], v[27:28], 16
+; SI-NEXT: v_lshr_b64 v[25:26], v[24:25], 16
; SI-NEXT: s_branch .LBB103_3
; SI-NEXT: .LBB103_2:
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr7
@@ -36684,23 +36685,23 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg %
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v3
; SI-NEXT: v_lshr_b64 v[5:6], v[1:2], 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; SI-NEXT: v_lshr_b64 v[23:24], v[1:2], 16
+; SI-NEXT: v_lshr_b64 v[21:22], v[1:2], 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v49
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v25
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9
-; SI-NEXT: v_lshr_b64 v[26:27], v[1:2], 16
+; SI-NEXT: v_lshr_b64 v[22:23], v[1:2], 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; SI-NEXT: v_lshr_b64 v[29:30], v[1:2], 16
+; SI-NEXT: v_lshr_b64 v[25:26], v[1:2], 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v15
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v39
@@ -36740,19 +36741,19 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg %
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v4
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v23
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v20
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v26
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v22
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v8
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v18
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v29
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v25
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
@@ -38838,43 +38839,43 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i8_to_v16f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32
; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v5
; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v13
-; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v15
-; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13
+; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v15
+; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v21
; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v19
; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v29
; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v9
; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v25
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v34
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v52, 24, v38
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: v_lshlrev_b32_e32 v52, 24, v35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB106_2
@@ -38883,19 +38884,19 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v5, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v19
+; SI-NEXT: v_or_b32_e32 v0, v0, v27
; SI-NEXT: v_or_b32_e32 v2, v33, v2
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v3, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v6, v34, v5
+; SI-NEXT: v_or_b32_e32 v6, v36, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v23, v0, v2
+; SI-NEXT: v_or_b32_e32 v21, v0, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v7, 0xff, v22
-; SI-NEXT: v_or_b32_e32 v0, v0, v27
-; SI-NEXT: v_or_b32_e32 v9, v36, v5
+; SI-NEXT: v_or_b32_e32 v0, v0, v37
+; SI-NEXT: v_or_b32_e32 v9, v39, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v20
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
@@ -38917,8 +38918,8 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v12, 0xff, v30
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v1, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_alignbit_b32 v21, v5, v11, 16
+; SI-NEXT: v_or_b32_e32 v3, v3, v38
+; SI-NEXT: v_alignbit_b32 v19, v5, v11, 16
; SI-NEXT: v_or_b32_e32 v7, v7, v53
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_and_b32_e32 v14, 0xff, v26
@@ -38937,12 +38938,12 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v13, v1, v2, 16
; SI-NEXT: v_alignbit_b32 v17, v3, v9, 16
-; SI-NEXT: v_alignbit_b32 v25, v7, v14, 16
+; SI-NEXT: v_alignbit_b32 v23, v7, v14, 16
; SI-NEXT: v_or_b32_e32 v9, v0, v14
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v12
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -38962,17 +38963,17 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: .LBB106_2: ; %Flow
@@ -39027,36 +39028,36 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v1, v27, v1
+; SI-NEXT: v_or_b32_e32 v1, v37, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v36, v3
+; SI-NEXT: v_or_b32_e32 v3, v39, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v14
-; SI-NEXT: v_or_b32_e32 v1, v35, v1
+; SI-NEXT: v_or_b32_e32 v1, v38, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v34, v3
+; SI-NEXT: v_or_b32_e32 v3, v36, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v0, v19, v0
+; SI-NEXT: v_or_b32_e32 v0, v27, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v33, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v6
@@ -39068,39 +39069,39 @@ define <16 x half> @bitcast_v32i8_to_v16f16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v31, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v13, v1, v23, 16
+; SI-NEXT: v_alignbit_b32 v13, v1, v21, 16
; SI-NEXT: v_alignbit_b32 v17, v3, v15, 16
-; SI-NEXT: v_alignbit_b32 v21, v5, v11, 16
-; SI-NEXT: v_alignbit_b32 v25, v7, v9, 16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
+; SI-NEXT: v_alignbit_b32 v19, v5, v11, 16
+; SI-NEXT: v_alignbit_b32 v23, v7, v9, 16
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7
; SI-NEXT: .LBB106_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v23
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v17
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v29
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v19
; SI-NEXT: v_or_b32_e32 v4, v4, v6
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v23
; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -43231,12 +43232,12 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i8_to_v16bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32
-; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v11
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32
+; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v39, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v11
; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v15
; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v19
@@ -43255,15 +43256,15 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v34
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v32
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_2
@@ -43274,20 +43275,20 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v3, v1, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v5, v31, v0
+; SI-NEXT: v_or_b32_e32 v5, v33, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
-; SI-NEXT: v_or_b32_e32 v0, v0, v36
+; SI-NEXT: v_or_b32_e32 v0, v0, v39
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v11, v32, v0
+; SI-NEXT: v_or_b32_e32 v11, v37, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v9
; SI-NEXT: v_or_b32_e32 v13, v1, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v15, v35, v0
+; SI-NEXT: v_or_b32_e32 v15, v38, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v12
; SI-NEXT: v_or_b32_e32 v0, v0, v50
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v0
@@ -43306,20 +43307,20 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v22
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v33, v51, v0
+; SI-NEXT: v_or_b32_e32 v31, v51, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25
-; SI-NEXT: v_or_b32_e32 v34, v1, v0
+; SI-NEXT: v_or_b32_e32 v32, v1, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v26
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v37, v52, v0
+; SI-NEXT: v_or_b32_e32 v34, v52, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v28
; SI-NEXT: v_or_b32_e32 v0, v0, v55
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v39, v54, v0
+; SI-NEXT: v_or_b32_e32 v36, v54, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
@@ -43340,10 +43341,10 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr49
@@ -43423,7 +43424,7 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v5, v35, v5
+; SI-NEXT: v_or_b32_e32 v5, v38, v5
; SI-NEXT: v_or_b32_e32 v3, v5, v3
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v3
@@ -43434,7 +43435,7 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v6
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v3, v36, v3
+; SI-NEXT: v_or_b32_e32 v3, v39, v3
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
@@ -43442,9 +43443,9 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v32, v4
+; SI-NEXT: v_or_b32_e32 v4, v37, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v31, v1
+; SI-NEXT: v_or_b32_e32 v1, v33, v1
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v3
@@ -43459,12 +43460,12 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v12
; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v16
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v16
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v20
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v20
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v24
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v24
-; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v28
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v28
+; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v24
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v24
+; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v28
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v28
; SI-NEXT: .LBB110_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
@@ -43487,17 +43488,17 @@ define <16 x bfloat> @bitcast_v32i8_to_v16bf16(<32 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v23
; SI-NEXT: v_alignbit_b32 v4, v4, v5, 16
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v33
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v31
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_mul_f32_e32 v6, 1.0, v29
; SI-NEXT: v_alignbit_b32 v5, v5, v6, 16
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v37
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v34
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_mul_f32_e32 v7, 1.0, v34
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v32
; SI-NEXT: v_alignbit_b32 v6, v6, v7, 16
-; SI-NEXT: v_mul_f32_e32 v7, 1.0, v39
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v36
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v38
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v35
; SI-NEXT: v_alignbit_b32 v7, v7, v8, 16
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -44228,103 +44229,103 @@ define inreg <16 x bfloat> @bitcast_v32i8_to_v16bf16_scalar(<32 x i8> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s72, v12
; SI-NEXT: v_readfirstlane_b32 s74, v11
; SI-NEXT: v_readfirstlane_b32 s77, v10
-; SI-NEXT: v_readfirstlane_b32 s46, v9
-; SI-NEXT: v_readfirstlane_b32 s47, v8
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s59, v9
+; SI-NEXT: v_readfirstlane_b32 s60, v8
+; SI-NEXT: v_readfirstlane_b32 s62, v7
; SI-NEXT: v_readfirstlane_b32 s73, v6
-; SI-NEXT: v_readfirstlane_b32 s10, v5
-; SI-NEXT: v_readfirstlane_b32 s11, v4
-; SI-NEXT: v_readfirstlane_b32 s41, v3
-; SI-NEXT: v_readfirstlane_b32 s56, v2
-; SI-NEXT: v_readfirstlane_b32 s6, v1
+; SI-NEXT: v_readfirstlane_b32 s56, v5
+; SI-NEXT: v_readfirstlane_b32 s57, v4
+; SI-NEXT: v_readfirstlane_b32 s58, v3
+; SI-NEXT: v_readfirstlane_b32 s61, v2
+; SI-NEXT: v_readfirstlane_b32 s15, v1
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s7, v0
+; SI-NEXT: v_readfirstlane_b32 s43, v0
; SI-NEXT: s_cbranch_scc0 .LBB111_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s17, 24
-; SI-NEXT: s_or_b32 s8, s5, s4
+; SI-NEXT: s_or_b32 s6, s5, s4
; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s19, 24
-; SI-NEXT: s_or_b32 s13, s5, s4
+; SI-NEXT: s_or_b32 s9, s5, s4
; SI-NEXT: s_and_b32 s4, s20, 0xff
; SI-NEXT: s_lshl_b32 s5, s21, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_lshl_b32 s9, s4, 16
+; SI-NEXT: s_lshl_b32 s7, s4, 16
; SI-NEXT: s_and_b32 s4, s22, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s23, 24
-; SI-NEXT: s_or_b32 s15, s5, s4
+; SI-NEXT: s_or_b32 s11, s5, s4
; SI-NEXT: s_and_b32 s4, s24, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s25, 24
-; SI-NEXT: s_or_b32 s12, s5, s4
+; SI-NEXT: s_or_b32 s8, s5, s4
; SI-NEXT: s_and_b32 s4, s26, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s27, 24
-; SI-NEXT: s_or_b32 s42, s5, s4
+; SI-NEXT: s_or_b32 s13, s5, s4
; SI-NEXT: s_and_b32 s4, s28, 0xff
; SI-NEXT: s_lshl_b32 s5, s29, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_lshl_b32 s14, s4, 16
-; SI-NEXT: s_and_b32 s4, s7, 0xff
+; SI-NEXT: s_lshl_b32 s10, s4, 16
+; SI-NEXT: s_and_b32 s4, s43, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s6, 24
-; SI-NEXT: s_or_b32 s44, s5, s4
-; SI-NEXT: s_and_b32 s4, s56, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s41, 24
+; SI-NEXT: s_lshl_b32 s5, s15, 24
; SI-NEXT: s_or_b32 s40, s5, s4
-; SI-NEXT: s_and_b32 s4, s11, 0xff
+; SI-NEXT: s_and_b32 s4, s61, 0xff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_lshl_b32 s5, s58, 24
+; SI-NEXT: s_or_b32 s12, s5, s4
+; SI-NEXT: s_and_b32 s4, s57, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s10, 24
-; SI-NEXT: s_or_b32 s58, s5, s4
+; SI-NEXT: s_lshl_b32 s5, s56, 24
+; SI-NEXT: s_or_b32 s44, s5, s4
; SI-NEXT: s_and_b32 s4, s73, 0xff
-; SI-NEXT: s_lshl_b32 s5, s61, 8
+; SI-NEXT: s_lshl_b32 s5, s62, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_lshl_b32 s43, s4, 16
-; SI-NEXT: s_and_b32 s4, s47, 0xff
+; SI-NEXT: s_lshl_b32 s14, s4, 16
+; SI-NEXT: s_and_b32 s4, s60, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s46, 24
-; SI-NEXT: s_or_b32 s59, s5, s4
+; SI-NEXT: s_lshl_b32 s5, s59, 24
+; SI-NEXT: s_or_b32 s45, s5, s4
; SI-NEXT: s_and_b32 s4, s77, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s74, 24
-; SI-NEXT: s_or_b32 s45, s5, s4
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s72, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s63, 24
-; SI-NEXT: s_or_b32 s60, s5, s4
+; SI-NEXT: s_or_b32 s46, s5, s4
; SI-NEXT: s_and_b32 s4, s79, 0xff
; SI-NEXT: s_lshl_b32 s5, s78, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_lshl_b32 s57, s4, 16
+; SI-NEXT: s_lshl_b32 s42, s4, 16
; SI-NEXT: s_and_b32 s4, s76, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s75, 24
-; SI-NEXT: s_or_b32 s62, s5, s4
+; SI-NEXT: s_or_b32 s47, s5, s4
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB111_3
; SI-NEXT: .LBB111_2:
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr13
-; SI-NEXT: ; implicit-def: $sgpr9
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr43
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr45
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr57
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: .LBB111_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -44336,153 +44337,153 @@ define inreg <16 x bfloat> @bitcast_v32i8_to_v16bf16_scalar(<32 x i8> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s78, 8
; SI-NEXT: s_add_i32 s76, s76, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s8, s76, 0xff
+; SI-NEXT: s_and_b32 s6, s76, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
; SI-NEXT: s_lshl_b32 s5, s75, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s5, s5, s8
+; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_add_i32 s77, s77, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s77, 0xff
-; SI-NEXT: s_lshl_b32 s8, s74, 8
+; SI-NEXT: s_lshl_b32 s6, s74, 8
; SI-NEXT: s_add_i32 s72, s72, 3
-; SI-NEXT: s_or_b32 s5, s8, s5
-; SI-NEXT: s_and_b32 s9, s72, 0xff
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: s_and_b32 s7, s72, 0xff
; SI-NEXT: s_addk_i32 s5, 0x300
-; SI-NEXT: s_lshl_b32 s8, s63, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s6, s63, 24
+; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_add_i32 s73, s73, 3
-; SI-NEXT: s_or_b32 s5, s8, s5
-; SI-NEXT: s_and_b32 s8, s73, 0xff
-; SI-NEXT: s_lshl_b32 s9, s61, 8
-; SI-NEXT: s_add_i32 s47, s47, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s12, s47, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s9, s46, 24
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s9, s9, s12
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_add_i32 s56, s56, 3
-; SI-NEXT: s_add_i32 s43, s8, 0x3000000
-; SI-NEXT: s_and_b32 s8, s56, 0xff
-; SI-NEXT: s_lshl_b32 s9, s41, 8
-; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_lshl_b32 s9, s10, 24
-; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s9, s9, s10
-; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: s_and_b32 s6, s73, 0xff
+; SI-NEXT: s_lshl_b32 s7, s62, 8
+; SI-NEXT: s_add_i32 s60, s60, 3
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s8, s60, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s59, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s61, s61, 3
+; SI-NEXT: s_add_i32 s14, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s61, 0xff
+; SI-NEXT: s_lshl_b32 s7, s58, 8
+; SI-NEXT: s_add_i32 s57, s57, 3
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s8, s57, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s56, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_add_i32 s10, s8, 0x3000000
-; SI-NEXT: s_and_b32 s8, s28, 0xff
-; SI-NEXT: s_lshl_b32 s9, s29, 8
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s6, s6, 24
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: s_add_i32 s12, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s28, 0xff
+; SI-NEXT: s_lshl_b32 s7, s29, 8
+; SI-NEXT: s_add_i32 s43, s43, 3
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s8, s43, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s15, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s7, s24, 0xff
-; SI-NEXT: s_lshl_b32 s8, s25, 8
+; SI-NEXT: s_add_i32 s10, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s24, 0xff
+; SI-NEXT: s_lshl_b32 s7, s25, 8
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s9, s26, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s8, s27, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s8, s26, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s27, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s20, 0xff
-; SI-NEXT: s_lshl_b32 s9, s21, 8
+; SI-NEXT: s_add_i32 s8, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s20, 0xff
+; SI-NEXT: s_lshl_b32 s7, s21, 8
; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s11, s22, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s9, s23, 24
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s9, s9, s11
-; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s9, s22, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s23, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_add_i32 s9, s8, 0x3000000
-; SI-NEXT: s_and_b32 s8, s16, 0xff
-; SI-NEXT: s_lshl_b32 s11, s17, 8
+; SI-NEXT: s_add_i32 s7, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s16, 0xff
+; SI-NEXT: s_lshl_b32 s9, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s8, s11, s8
-; SI-NEXT: s_and_b32 s12, s18, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s11, s19, 24
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s11, s11, s12
-; SI-NEXT: s_or_b32 s8, s11, s8
+; SI-NEXT: s_or_b32 s6, s9, s6
+; SI-NEXT: s_and_b32 s11, s18, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s9, s19, 24
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
-; SI-NEXT: s_add_i32 s7, s7, 0x3000000
-; SI-NEXT: s_add_i32 s8, s8, 0x3000000
+; SI-NEXT: s_and_b32 s9, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_and_b32 s11, s7, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_and_b32 s13, s8, 0xffff0000
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s15, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_and_b32 s42, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s12, s7, 16
-; SI-NEXT: s_and_b32 s44, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s14, s6, 16
-; SI-NEXT: s_and_b32 s58, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s40, s10, 16
-; SI-NEXT: s_and_b32 s59, s43, 0xffff0000
-; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: s_and_b32 s60, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s45, s5, 16
-; SI-NEXT: s_and_b32 s62, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s57, s4, 16
+; SI-NEXT: s_and_b32 s40, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_and_b32 s44, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_and_b32 s45, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_and_b32 s46, s5, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s5, 16
+; SI-NEXT: s_and_b32 s47, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s42, s4, 16
; SI-NEXT: .LBB111_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s11
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s7
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s13
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s8
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s40
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s10
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s44
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s12
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s45
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s14
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s46
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s41
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s47
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s42
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
; SI-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
index 4b338c50e4338..809e020cb7142 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
@@ -16508,16 +16508,10 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-LABEL: bitcast_v20i16_to_v40i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v2, s30, 0
-; SI-NEXT: v_writelane_b32 v2, s31, 1
; SI-NEXT: s_lshr_b32 s90, s25, 16
-; SI-NEXT: s_lshr_b32 s30, s24, 16
+; SI-NEXT: s_lshr_b32 s73, s24, 16
; SI-NEXT: s_lshr_b32 s91, s23, 16
-; SI-NEXT: s_lshr_b32 s47, s22, 16
+; SI-NEXT: s_lshr_b32 s63, s22, 16
; SI-NEXT: s_lshr_b32 s92, s21, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s20, 16
; SI-NEXT: s_lshr_b32 s93, s19, 16
@@ -16539,9 +16533,6 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s11, s4, s5
-; SI-NEXT: s_mov_b32 s4, s47
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
-; SI-NEXT: s_mov_b32 s47, s4
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s8, s4, s5
@@ -16549,38 +16540,42 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s47, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
; SI-NEXT: s_or_b32 s7, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s25, 0xffff
; SI-NEXT: s_lshl_b32 s15, s90, 16
; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: s_mov_b32 s62, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
-; SI-NEXT: s_bfe_u32 s74, s94, 0x80008
+; SI-NEXT: s_mov_b32 s73, s62
+; SI-NEXT: s_mov_b32 s74, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
-; SI-NEXT: s_lshr_b32 s61, s13, 8
-; SI-NEXT: s_lshr_b32 s57, s11, 8
+; SI-NEXT: s_lshr_b32 s59, s13, 8
+; SI-NEXT: s_lshr_b32 s47, s11, 8
; SI-NEXT: s_lshr_b32 s43, s9, 8
; SI-NEXT: s_lshr_b32 s29, s7, 8
; SI-NEXT: s_lshr_b32 s27, s5, 8
-; SI-NEXT: s_bfe_u32 s59, s93, 0x80008
+; SI-NEXT: s_bfe_u32 s61, s94, 0x80008
+; SI-NEXT: s_bfe_u32 s57, s93, 0x80008
; SI-NEXT: s_bfe_u32 s45, s92, 0x80008
; SI-NEXT: s_bfe_u32 s41, s91, 0x80008
; SI-NEXT: s_bfe_u32 s15, s90, 0x80008
-; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
; SI-NEXT: s_mov_b32 s63, s74
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
@@ -16593,14 +16588,14 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr26
; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr63
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr28
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr57
-; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
@@ -16621,13 +16616,13 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[88:89], s[88:89], exec
-; SI-NEXT: s_cselect_b32 s73, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s73, 1
+; SI-NEXT: s_cselect_b32 s75, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s75, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s25, 0xffff
@@ -16635,7 +16630,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s47, 16
+; SI-NEXT: s_lshl_b32 s7, s63, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s23, 0xffff
@@ -16665,8 +16660,6 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_and_b32 s13, s17, 0xffff
; SI-NEXT: s_lshl_b32 s14, s94, 16
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_add_i32 s4, s4, 0x30000
-; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
@@ -16675,27 +16668,29 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s11, s11, 0x30000
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
+; SI-NEXT: s_add_i32 s4, s4, 0x30000
+; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8
-; SI-NEXT: s_lshr_b32 s63, s13, 24
+; SI-NEXT: s_lshr_b32 s61, s13, 24
; SI-NEXT: s_lshr_b32 s94, s13, 16
-; SI-NEXT: s_lshr_b32 s61, s13, 8
-; SI-NEXT: s_lshr_b32 s59, s11, 24
+; SI-NEXT: s_lshr_b32 s59, s13, 8
+; SI-NEXT: s_lshr_b32 s57, s11, 24
; SI-NEXT: s_lshr_b32 s93, s11, 16
-; SI-NEXT: s_lshr_b32 s57, s11, 8
+; SI-NEXT: s_lshr_b32 s47, s11, 8
; SI-NEXT: s_lshr_b32 s45, s9, 24
; SI-NEXT: s_lshr_b32 s92, s9, 16
; SI-NEXT: s_lshr_b32 s43, s9, 8
@@ -16717,11 +16712,11 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s61, 8
+; SI-NEXT: s_lshl_b32 s13, s59, 8
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s13, s94, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s14, s63, 24
+; SI-NEXT: s_lshl_b32 s14, s61, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_or_b32 s12, s12, s13
@@ -16741,11 +16736,11 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s57, 8
+; SI-NEXT: s_lshl_b32 s11, s47, 8
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s93, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_lshl_b32 s12, s59, 24
+; SI-NEXT: s_lshl_b32 s12, s57, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_or_b32 s10, s10, s11
@@ -16824,12 +16819,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v2, 0
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; SI-NEXT: v_readlane_b32 s31, v2, 1
-; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -17496,65 +17486,65 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:24
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:16
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:4
-; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v13
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4
+; SI-NEXT: v_lshlrev_b32_e32 v33, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v15
-; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v21
-; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v23
-; SI-NEXT: v_lshlrev_b32_e32 v52, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v23
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v19
; SI-NEXT: s_waitcnt expcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v29
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v17
+; SI-NEXT: v_lshlrev_b32_e32 v29, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v25
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: s_waitcnt vmcnt(9) expcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v31
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v53
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37
; SI-NEXT: s_waitcnt vmcnt(7) expcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v38
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: s_waitcnt vmcnt(5) expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v55
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(3) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v40
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v48
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v41
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v49
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
@@ -17563,27 +17553,27 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v5, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v23
-; SI-NEXT: v_or_b32_e32 v2, v33, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v29
+; SI-NEXT: v_or_b32_e32 v2, v34, v2
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v3, 0xff, v6
; SI-NEXT: v_or_b32_e32 v6, v36, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v29, v0, v2
+; SI-NEXT: v_or_b32_e32 v27, v0, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v7, 0xff, v22
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_or_b32_e32 v0, v0, v35
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v10, v38, v5
+; SI-NEXT: v_or_b32_e32 v10, v51, v5
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v50
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v55
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
-; SI-NEXT: v_or_b32_e32 v4, v31, v3
+; SI-NEXT: v_or_b32_e32 v4, v32, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_or_b32_e32 v12, v48, v7
+; SI-NEXT: v_or_b32_e32 v12, v53, v7
; SI-NEXT: v_and_b32_e32 v7, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v21, v0, v10
@@ -17592,8 +17582,8 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v9, 0xff, v30
; SI-NEXT: v_or_b32_e32 v18, v56, v15
; SI-NEXT: v_and_b32_e32 v15, 0xff, v42
-; SI-NEXT: v_or_b32_e32 v0, v0, v49
-; SI-NEXT: v_or_b32_e32 v11, v52, v7
+; SI-NEXT: v_or_b32_e32 v0, v0, v54
+; SI-NEXT: v_or_b32_e32 v11, v41, v7
; SI-NEXT: v_and_b32_e32 v7, 0xff, v28
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
@@ -17612,14 +17602,14 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v13, v46, v9
; SI-NEXT: v_and_b32_e32 v9, 0xff, v43
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v1, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v51
-; SI-NEXT: v_alignbit_b32 v27, v7, v13, 16
+; SI-NEXT: v_or_b32_e32 v1, v1, v33
+; SI-NEXT: v_or_b32_e32 v3, v3, v50
+; SI-NEXT: v_or_b32_e32 v5, v5, v40
+; SI-NEXT: v_alignbit_b32 v25, v7, v13, 16
; SI-NEXT: v_or_b32_e32 v9, v9, v58
; SI-NEXT: v_or_b32_e32 v13, v0, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v39
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v52
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
@@ -17632,14 +17622,14 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v17, v1, v2, 16
; SI-NEXT: v_alignbit_b32 v19, v3, v10, 16
-; SI-NEXT: v_alignbit_b32 v25, v5, v11, 16
-; SI-NEXT: v_alignbit_b32 v35, v9, v20, 16
+; SI-NEXT: v_alignbit_b32 v23, v5, v11, 16
+; SI-NEXT: v_alignbit_b32 v31, v9, v20, 16
; SI-NEXT: v_or_b32_e32 v11, v0, v20
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v18
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v18
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -17656,28 +17646,28 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr23
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: .LBB50_2: ; %Flow
@@ -17685,7 +17675,7 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v39
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v42
; SI-NEXT: v_or_b32_e32 v1, v57, v1
@@ -17698,7 +17688,7 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v50
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v55
; SI-NEXT: s_movk_i32 s6, 0x300
; SI-NEXT: v_or_b32_e32 v1, v58, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
@@ -17733,40 +17723,40 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v18
-; SI-NEXT: v_or_b32_e32 v1, v49, v1
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v52, v3
+; SI-NEXT: v_or_b32_e32 v3, v41, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v22
-; SI-NEXT: v_or_b32_e32 v1, v51, v1
+; SI-NEXT: v_or_b32_e32 v1, v40, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v48, v3
+; SI-NEXT: v_or_b32_e32 v3, v53, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v1, v34, v1
+; SI-NEXT: v_or_b32_e32 v1, v35, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v38, v3
+; SI-NEXT: v_or_b32_e32 v3, v51, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v14
-; SI-NEXT: v_or_b32_e32 v1, v37, v1
+; SI-NEXT: v_or_b32_e32 v1, v50, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -17777,78 +17767,78 @@ define <20 x i16> @bitcast_v40i8_to_v20i16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v0, v23, v0
+; SI-NEXT: v_or_b32_e32 v0, v29, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
+; SI-NEXT: v_or_b32_e32 v1, v34, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v6
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
+; SI-NEXT: v_or_b32_e32 v0, v33, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v31, v1
+; SI-NEXT: v_or_b32_e32 v1, v32, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v17, v1, v29, 16
+; SI-NEXT: v_alignbit_b32 v17, v1, v27, 16
; SI-NEXT: v_alignbit_b32 v19, v3, v21, 16
-; SI-NEXT: v_alignbit_b32 v25, v5, v15, 16
-; SI-NEXT: v_alignbit_b32 v27, v7, v13, 16
-; SI-NEXT: v_alignbit_b32 v35, v9, v11, 16
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v9
+; SI-NEXT: v_alignbit_b32 v23, v5, v15, 16
+; SI-NEXT: v_alignbit_b32 v25, v7, v13, 16
+; SI-NEXT: v_alignbit_b32 v31, v9, v11, 16
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; SI-NEXT: .LBB50_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v29
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v19
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v23
; SI-NEXT: v_or_b32_e32 v4, v4, v6
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v25
; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v31
; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v41
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v49
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -23895,65 +23885,65 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:24
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:16
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:4
-; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v13
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4
+; SI-NEXT: v_lshlrev_b32_e32 v33, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v15
-; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v21
-; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v23
-; SI-NEXT: v_lshlrev_b32_e32 v52, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v23
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v19
; SI-NEXT: s_waitcnt expcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v29
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v17
+; SI-NEXT: v_lshlrev_b32_e32 v29, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v17
; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v25
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: s_waitcnt vmcnt(9) expcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v31
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v53
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v37
; SI-NEXT: s_waitcnt vmcnt(7) expcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v38
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: s_waitcnt vmcnt(5) expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v55
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(3) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v40
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v48
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v41
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v49
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB62_2
@@ -23962,27 +23952,27 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v5, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v23
-; SI-NEXT: v_or_b32_e32 v2, v33, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v29
+; SI-NEXT: v_or_b32_e32 v2, v34, v2
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v3, 0xff, v6
; SI-NEXT: v_or_b32_e32 v6, v36, v5
; SI-NEXT: v_and_b32_e32 v5, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v29, v0, v2
+; SI-NEXT: v_or_b32_e32 v27, v0, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v7, 0xff, v22
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_or_b32_e32 v0, v0, v35
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v10, v38, v5
+; SI-NEXT: v_or_b32_e32 v10, v51, v5
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v50
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v55
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
-; SI-NEXT: v_or_b32_e32 v4, v31, v3
+; SI-NEXT: v_or_b32_e32 v4, v32, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_or_b32_e32 v12, v48, v7
+; SI-NEXT: v_or_b32_e32 v12, v53, v7
; SI-NEXT: v_and_b32_e32 v7, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v21, v0, v10
@@ -23991,8 +23981,8 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v9, 0xff, v30
; SI-NEXT: v_or_b32_e32 v18, v56, v15
; SI-NEXT: v_and_b32_e32 v15, 0xff, v42
-; SI-NEXT: v_or_b32_e32 v0, v0, v49
-; SI-NEXT: v_or_b32_e32 v11, v52, v7
+; SI-NEXT: v_or_b32_e32 v0, v0, v54
+; SI-NEXT: v_or_b32_e32 v11, v41, v7
; SI-NEXT: v_and_b32_e32 v7, 0xff, v28
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
@@ -24011,14 +24001,14 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v13, v46, v9
; SI-NEXT: v_and_b32_e32 v9, 0xff, v43
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v1, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v51
-; SI-NEXT: v_alignbit_b32 v27, v7, v13, 16
+; SI-NEXT: v_or_b32_e32 v1, v1, v33
+; SI-NEXT: v_or_b32_e32 v3, v3, v50
+; SI-NEXT: v_or_b32_e32 v5, v5, v40
+; SI-NEXT: v_alignbit_b32 v25, v7, v13, 16
; SI-NEXT: v_or_b32_e32 v9, v9, v58
; SI-NEXT: v_or_b32_e32 v13, v0, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v39
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v52
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
@@ -24031,14 +24021,14 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v17, v1, v2, 16
; SI-NEXT: v_alignbit_b32 v19, v3, v10, 16
-; SI-NEXT: v_alignbit_b32 v25, v5, v11, 16
-; SI-NEXT: v_alignbit_b32 v35, v9, v20, 16
+; SI-NEXT: v_alignbit_b32 v23, v5, v11, 16
+; SI-NEXT: v_alignbit_b32 v31, v9, v20, 16
; SI-NEXT: v_or_b32_e32 v11, v0, v20
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v18
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v18
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -24055,28 +24045,28 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr23
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: .LBB62_2: ; %Flow
@@ -24084,7 +24074,7 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB62_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v39
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v42
; SI-NEXT: v_or_b32_e32 v1, v57, v1
@@ -24097,7 +24087,7 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v50
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v55
; SI-NEXT: s_movk_i32 s6, 0x300
; SI-NEXT: v_or_b32_e32 v1, v58, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
@@ -24132,40 +24122,40 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v18
-; SI-NEXT: v_or_b32_e32 v1, v49, v1
+; SI-NEXT: v_or_b32_e32 v1, v54, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v52, v3
+; SI-NEXT: v_or_b32_e32 v3, v41, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v22
-; SI-NEXT: v_or_b32_e32 v1, v51, v1
+; SI-NEXT: v_or_b32_e32 v1, v40, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v48, v3
+; SI-NEXT: v_or_b32_e32 v3, v53, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v1, v34, v1
+; SI-NEXT: v_or_b32_e32 v1, v35, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v3, v38, v3
+; SI-NEXT: v_or_b32_e32 v3, v51, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v14
-; SI-NEXT: v_or_b32_e32 v1, v37, v1
+; SI-NEXT: v_or_b32_e32 v1, v50, v1
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -24176,78 +24166,78 @@ define <20 x half> @bitcast_v40i8_to_v20f16(<40 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_or_b32_e32 v0, v23, v0
+; SI-NEXT: v_or_b32_e32 v0, v29, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
+; SI-NEXT: v_or_b32_e32 v1, v34, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v6
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
+; SI-NEXT: v_or_b32_e32 v0, v33, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v31, v1
+; SI-NEXT: v_or_b32_e32 v1, v32, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v17, v1, v29, 16
+; SI-NEXT: v_alignbit_b32 v17, v1, v27, 16
; SI-NEXT: v_alignbit_b32 v19, v3, v21, 16
-; SI-NEXT: v_alignbit_b32 v25, v5, v15, 16
-; SI-NEXT: v_alignbit_b32 v27, v7, v13, 16
-; SI-NEXT: v_alignbit_b32 v35, v9, v11, 16
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v9
+; SI-NEXT: v_alignbit_b32 v23, v5, v15, 16
+; SI-NEXT: v_alignbit_b32 v25, v7, v13, 16
+; SI-NEXT: v_alignbit_b32 v31, v9, v11, 16
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
; SI-NEXT: .LBB62_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v29
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v19
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v23
; SI-NEXT: v_or_b32_e32 v4, v4, v6
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v25
; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v31
; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v41
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v49
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
index 68e8ffece35ca..43ef92aec94db 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
@@ -932,32 +932,37 @@ define i32 @bitcast_v2f16_to_i32(<2 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v2f16_to_i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; SI-NEXT: v_mov_b32_e32 v2, v0
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: s_cbranch_execnz .LBB10_3
+; SI-NEXT: ; %bb.1: ; %Flow
+; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_cbranch_execnz .LBB10_4
+; SI-NEXT: .LBB10_2: ; %end
+; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: s_setpc_b64 s[30:31]
+; SI-NEXT: .LBB10_3: ; %cmp.false
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; %bb.2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; SI-NEXT: s_cbranch_execz .LBB10_4
-; SI-NEXT: ; %bb.3: ; %cmp.true
+; SI-NEXT: s_cbranch_execz .LBB10_2
+; SI-NEXT: .LBB10_4: ; %cmp.true
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: .LBB10_4: ; %end
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_mov_b32_e32 v0, v1
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v2f16_to_i32:
@@ -3398,32 +3403,37 @@ define float @bitcast_v2f16_to_f32(<2 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v2f16_to_f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; SI-NEXT: v_mov_b32_e32 v2, v0
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: s_cbranch_execnz .LBB30_3
+; SI-NEXT: ; %bb.1: ; %Flow
+; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_cbranch_execnz .LBB30_4
+; SI-NEXT: .LBB30_2: ; %end
+; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: s_setpc_b64 s[30:31]
+; SI-NEXT: .LBB30_3: ; %cmp.false
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; %bb.2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; SI-NEXT: s_cbranch_execz .LBB30_4
-; SI-NEXT: ; %bb.3: ; %cmp.true
+; SI-NEXT: s_cbranch_execz .LBB30_2
+; SI-NEXT: .LBB30_4: ; %cmp.true
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: .LBB30_4: ; %end
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_mov_b32_e32 v0, v1
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v2f16_to_f32:
@@ -5787,30 +5797,30 @@ define inreg <2 x bfloat> @bitcast_v2i16_to_v2bf16_scalar(<2 x i16> inreg %a, i3
; SI-LABEL: bitcast_v2i16_to_v2bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: s_lshr_b32 s7, s16, 16
+; SI-NEXT: s_lshr_b32 s8, s16, 16
; SI-NEXT: s_cmp_lg_u32 s17, 0
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshl_b32 s6, s16, 16
-; SI-NEXT: s_lshl_b32 s8, s7, 16
+; SI-NEXT: s_lshl_b32 s7, s8, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB49_3
; SI-NEXT: .LBB49_2:
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_lshl_b32 s4, s7, 16
+; SI-NEXT: s_lshl_b32 s4, s8, 16
; SI-NEXT: s_lshl_b32 s5, s16, 16
; SI-NEXT: s_add_i32 s6, s5, 0x30000
-; SI-NEXT: s_add_i32 s8, s4, 0x30000
+; SI-NEXT: s_add_i32 s7, s4, 0x30000
; SI-NEXT: .LBB49_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s7
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
@@ -7034,24 +7044,24 @@ define <2 x i16> @bitcast_v4i8_to_v2i16(<4 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_or_b32_e32 v2, v1, v3
+; SI-NEXT: v_or_b32_e32 v2, v1, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v2
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; %bb.2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB58_4
@@ -7061,17 +7071,17 @@ define <2 x i16> @bitcast_v4i8_to_v2i16(<4 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_or_b32_e32 v0, v5, v0
-; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_or_b32_e32 v1, v4, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v2
; SI-NEXT: .LBB58_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -8076,32 +8086,37 @@ define <1 x i32> @bitcast_v2f16_to_v1i32(<2 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v2f16_to_v1i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; SI-NEXT: v_mov_b32_e32 v2, v0
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: s_cbranch_execnz .LBB64_3
+; SI-NEXT: ; %bb.1: ; %Flow
+; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_cbranch_execnz .LBB64_4
+; SI-NEXT: .LBB64_2: ; %end
+; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: s_setpc_b64 s[30:31]
+; SI-NEXT: .LBB64_3: ; %cmp.false
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; %bb.2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; SI-NEXT: s_cbranch_execz .LBB64_4
-; SI-NEXT: ; %bb.3: ; %cmp.true
+; SI-NEXT: s_cbranch_execz .LBB64_2
+; SI-NEXT: .LBB64_4: ; %cmp.true
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: .LBB64_4: ; %end
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_mov_b32_e32 v0, v1
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v2f16_to_v1i32:
@@ -8824,24 +8839,24 @@ define <2 x half> @bitcast_v4i8_to_v2f16(<4 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_or_b32_e32 v2, v1, v3
+; SI-NEXT: v_or_b32_e32 v2, v1, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v2
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; %bb.2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB70_4
@@ -8851,17 +8866,17 @@ define <2 x half> @bitcast_v4i8_to_v2f16(<4 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_or_b32_e32 v0, v5, v0
-; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_or_b32_e32 v1, v4, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v2
; SI-NEXT: .LBB70_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -10361,23 +10376,23 @@ define <2 x bfloat> @bitcast_v4i8_to_v2bf16(<4 x i8> %a, i32 %b) #0 {
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v1
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v3
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v1, v4, v0
+; SI-NEXT: v_or_b32_e32 v1, v5, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v5, v3, v0
+; SI-NEXT: v_or_b32_e32 v3, v4, v0
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; %bb.2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB78_4
@@ -10388,13 +10403,13 @@ define <2 x bfloat> @bitcast_v4i8_to_v2bf16(<4 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v2, v3, v1
-; SI-NEXT: v_or_b32_e32 v0, v4, v0
+; SI-NEXT: v_or_b32_e32 v2, v4, v1
+; SI-NEXT: v_or_b32_e32 v0, v5, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v2
+; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v2
; SI-NEXT: .LBB78_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v3
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
index 345fb34750bf5..31400ccf4c903 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
@@ -248,22 +248,22 @@ define inreg <3 x half> @bitcast_v3bf16_to_v3f16_scalar(<3 x bfloat> inreg %a, i
; SI-NEXT: s_and_b32 s5, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s6, s16, 16
; SI-NEXT: s_cmp_lg_u32 s18, 0
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s6
; SI-NEXT: s_cbranch_scc0 .LBB1_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v8
-; SI-NEXT: v_lshr_b64 v[5:6], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[3:4], v[2:3], 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v9
+; SI-NEXT: v_lshr_b64 v[6:7], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[2:3], v[4:5], 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB1_3
; SI-NEXT: .LBB1_2:
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: .LBB1_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
@@ -271,20 +271,20 @@ define inreg <3 x half> @bitcast_v3bf16_to_v3f16_scalar(<3 x bfloat> inreg %a, i
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB1_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4
+; SI-NEXT: v_lshr_b64 v[2:3], v[0:1], 16
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v4
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_lshr_b64 v[5:6], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[6:7], v[0:1], 16
; SI-NEXT: .LBB1_5: ; %end
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v5
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index cd262717b336c..7a5b92456cf38 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -9226,9 +9226,9 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -9239,7 +9239,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB24_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -9247,10 +9247,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -9286,8 +9286,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB24_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB24_4
@@ -9316,10 +9318,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -9435,11 +9437,11 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v16, v29, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -9521,9 +9523,9 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr30
+; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -9534,7 +9536,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB24_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -9542,10 +9544,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -9581,8 +9583,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; GFX9-NEXT: v_mov_b32_e32 v26, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; GFX9-NEXT: .LBB24_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB24_4
@@ -9611,10 +9615,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u32_e32 v5, 3, v5
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -9715,10 +9719,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v30, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v29, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v29, v28, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v28, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -24175,9 +24179,9 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -24188,7 +24192,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB48_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -24196,10 +24200,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -24235,8 +24239,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB48_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB48_4
@@ -24265,10 +24271,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_add_f32_e32 v5, 1.0, v5
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -24384,11 +24390,11 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v16, v29, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -24470,9 +24476,9 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr30
+; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -24483,7 +24489,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB48_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -24491,10 +24497,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -24530,8 +24536,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; GFX9-NEXT: v_mov_b32_e32 v26, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; GFX9-NEXT: .LBB48_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB48_4
@@ -24560,10 +24568,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -24664,10 +24672,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v30, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v29, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v29, v28, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v28, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -25165,8 +25173,8 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v41, s4, 2
; SI-NEXT: v_writelane_b32 v41, s5, 3
-; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v41, s12, 0
+; SI-NEXT: s_lshr_b64 s[10:11], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v41, s10, 0
; SI-NEXT: s_lshr_b32 s34, s9, 24
; SI-NEXT: s_lshr_b32 s35, s9, 16
; SI-NEXT: s_lshr_b32 s36, s9, 8
@@ -25194,9 +25202,9 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
; SI-NEXT: s_mov_b64 s[4:5], s[8:9]
; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[10:11], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v41, s13, 1
-; SI-NEXT: s_lshr_b64 s[14:15], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v41, s11, 1
+; SI-NEXT: s_lshr_b64 s[10:11], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 8
; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 8
@@ -25214,7 +25222,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 24
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 8
; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_branch .LBB49_3
; SI-NEXT: .LBB49_2:
@@ -25226,7 +25234,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_writelane_b32 v41, s7, 1
; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: v_writelane_b32 v41, s34, 2
-; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr92
@@ -25244,7 +25252,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
@@ -25307,16 +25315,16 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s25, v6
; SI-NEXT: v_readfirstlane_b32 s26, v7
; SI-NEXT: v_readfirstlane_b32 s27, v4
-; SI-NEXT: v_readfirstlane_b32 s14, v5
-; SI-NEXT: v_readfirstlane_b32 s15, v2
+; SI-NEXT: v_readfirstlane_b32 s12, v5
+; SI-NEXT: v_readfirstlane_b32 s13, v2
; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: v_readfirstlane_b32 s9, v1
; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[10:11], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[12:13], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[10:11], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 8
@@ -25364,9 +25372,9 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v16, s16
; SI-NEXT: v_mov_b32_e32 v3, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
-; SI-NEXT: s_mov_b32 s16, s12
+; SI-NEXT: s_mov_b32 s16, s14
; SI-NEXT: v_readlane_b32 s4, v41, 2
-; SI-NEXT: v_readlane_b32 s12, v41, 0
+; SI-NEXT: v_readlane_b32 s14, v41, 0
; SI-NEXT: v_mov_b32_e32 v14, s17
; SI-NEXT: v_mov_b32_e32 v15, s18
; SI-NEXT: v_mov_b32_e32 v12, s19
@@ -25405,7 +25413,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v18, s35
; SI-NEXT: v_mov_b32_e32 v17, s34
; SI-NEXT: v_readlane_b32 s5, v41, 3
-; SI-NEXT: v_readlane_b32 s13, v41, 1
+; SI-NEXT: v_readlane_b32 s15, v41, 1
; SI-NEXT: .LBB49_6: ; %end
; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
; SI-NEXT: s_lshl_b32 s5, s16, 8
@@ -25540,11 +25548,11 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v5
-; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: s_lshl_b32 s5, s12, 8
; SI-NEXT: v_or_b32_e32 v4, s5, v4
-; SI-NEXT: s_and_b32 s5, s12, 0xff
+; SI-NEXT: s_and_b32 s5, s10, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s10, 24
+; SI-NEXT: s_lshl_b32 s7, s14, 24
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v4, s5, v4
@@ -38480,9 +38488,9 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -38493,7 +38501,7 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB68_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -38501,10 +38509,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -38540,8 +38548,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB68_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB68_4
@@ -38570,10 +38580,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -38689,11 +38699,11 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v16, v29, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -38775,9 +38785,9 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr30
+; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -38788,7 +38798,7 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB68_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -38796,10 +38806,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -38835,8 +38845,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; GFX9-NEXT: v_mov_b32_e32 v26, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; GFX9-NEXT: .LBB68_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB68_4
@@ -38865,10 +38877,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -38969,10 +38981,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v30, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v29, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v29, v28, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v28, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -39486,54 +39498,53 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: ; implicit-def: $vgpr5 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB69_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s6, s5, 16
+; SI-NEXT: s_lshr_b32 s6, s5, 8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v5, s6, 0
-; SI-NEXT: s_lshr_b32 s6, s5, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 1
; SI-NEXT: s_lshr_b32 s6, s29, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 2
+; SI-NEXT: v_writelane_b32 v5, s6, 1
; SI-NEXT: s_lshr_b32 s6, s29, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 3
+; SI-NEXT: v_writelane_b32 v5, s6, 2
; SI-NEXT: s_lshr_b32 s6, s29, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 4
+; SI-NEXT: v_writelane_b32 v5, s6, 3
; SI-NEXT: s_lshr_b32 s6, s27, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 5
+; SI-NEXT: v_writelane_b32 v5, s6, 4
; SI-NEXT: s_lshr_b32 s6, s27, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 6
+; SI-NEXT: v_writelane_b32 v5, s6, 5
; SI-NEXT: s_lshr_b32 s6, s27, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 7
+; SI-NEXT: v_writelane_b32 v5, s6, 6
; SI-NEXT: s_lshr_b32 s6, s25, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 8
+; SI-NEXT: v_writelane_b32 v5, s6, 7
; SI-NEXT: s_lshr_b32 s6, s25, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 9
+; SI-NEXT: v_writelane_b32 v5, s6, 8
; SI-NEXT: s_lshr_b32 s6, s25, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 10
+; SI-NEXT: v_writelane_b32 v5, s6, 9
; SI-NEXT: s_lshr_b32 s6, s23, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 11
+; SI-NEXT: v_writelane_b32 v5, s6, 10
; SI-NEXT: s_lshr_b32 s6, s23, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 12
+; SI-NEXT: v_writelane_b32 v5, s6, 11
; SI-NEXT: s_lshr_b32 s6, s23, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 13
+; SI-NEXT: v_writelane_b32 v5, s6, 12
; SI-NEXT: s_lshr_b32 s6, s21, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 14
+; SI-NEXT: v_writelane_b32 v5, s6, 13
; SI-NEXT: s_lshr_b32 s6, s21, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 15
+; SI-NEXT: v_writelane_b32 v5, s6, 14
; SI-NEXT: s_lshr_b32 s6, s21, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 16
+; SI-NEXT: v_writelane_b32 v5, s6, 15
; SI-NEXT: s_lshr_b32 s6, s19, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 17
+; SI-NEXT: v_writelane_b32 v5, s6, 16
; SI-NEXT: s_lshr_b32 s6, s19, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 18
+; SI-NEXT: v_writelane_b32 v5, s6, 17
; SI-NEXT: s_lshr_b32 s6, s19, 8
-; SI-NEXT: v_writelane_b32 v5, s6, 19
+; SI-NEXT: v_writelane_b32 v5, s6, 18
; SI-NEXT: s_lshr_b32 s6, s17, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 20
+; SI-NEXT: v_writelane_b32 v5, s6, 19
; SI-NEXT: s_lshr_b32 s6, s17, 16
-; SI-NEXT: v_writelane_b32 v5, s6, 21
+; SI-NEXT: v_writelane_b32 v5, s6, 20
; SI-NEXT: s_lshr_b32 s6, s17, 8
; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: v_writelane_b32 v5, s6, 22
+; SI-NEXT: s_lshr_b32 s39, s5, 16
+; SI-NEXT: v_writelane_b32 v5, s6, 21
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 8
@@ -39542,21 +39553,21 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 8
; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 24
; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
+; SI-NEXT: s_lshr_b64 s[56:57], s[26:27], 8
; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24
; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[56:57], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8
-; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 24
+; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB69_3
@@ -39567,22 +39578,23 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
@@ -39631,36 +39643,34 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: .LBB69_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s7, 1, 0
; SI-NEXT: s_cmp_lg_u32 s7, 1
; SI-NEXT: s_mov_b32 s36, s38
-; SI-NEXT: v_readlane_b32 s37, v5, 0
-; SI-NEXT: v_readlane_b32 s7, v5, 1
-; SI-NEXT: v_readlane_b32 s9, v5, 2
-; SI-NEXT: v_readlane_b32 s38, v5, 3
-; SI-NEXT: v_readlane_b32 s39, v5, 4
-; SI-NEXT: v_readlane_b32 s11, v5, 5
-; SI-NEXT: v_readlane_b32 s48, v5, 6
-; SI-NEXT: v_readlane_b32 s49, v5, 7
-; SI-NEXT: v_readlane_b32 s13, v5, 8
-; SI-NEXT: v_readlane_b32 s50, v5, 9
-; SI-NEXT: v_readlane_b32 s51, v5, 10
-; SI-NEXT: v_readlane_b32 s15, v5, 11
-; SI-NEXT: v_readlane_b32 s52, v5, 12
-; SI-NEXT: v_readlane_b32 s53, v5, 13
-; SI-NEXT: v_readlane_b32 s41, v5, 14
-; SI-NEXT: v_readlane_b32 s54, v5, 15
-; SI-NEXT: v_readlane_b32 s55, v5, 16
-; SI-NEXT: v_readlane_b32 s43, v5, 17
-; SI-NEXT: v_readlane_b32 s64, v5, 18
-; SI-NEXT: v_readlane_b32 s65, v5, 19
-; SI-NEXT: v_readlane_b32 s45, v5, 20
-; SI-NEXT: v_readlane_b32 s66, v5, 21
-; SI-NEXT: v_readlane_b32 s67, v5, 22
+; SI-NEXT: s_mov_b32 s37, s39
+; SI-NEXT: v_readlane_b32 s7, v5, 0
+; SI-NEXT: v_readlane_b32 s9, v5, 1
+; SI-NEXT: v_readlane_b32 s38, v5, 2
+; SI-NEXT: v_readlane_b32 s39, v5, 3
+; SI-NEXT: v_readlane_b32 s11, v5, 4
+; SI-NEXT: v_readlane_b32 s48, v5, 5
+; SI-NEXT: v_readlane_b32 s49, v5, 6
+; SI-NEXT: v_readlane_b32 s13, v5, 7
+; SI-NEXT: v_readlane_b32 s50, v5, 8
+; SI-NEXT: v_readlane_b32 s51, v5, 9
+; SI-NEXT: v_readlane_b32 s15, v5, 10
+; SI-NEXT: v_readlane_b32 s52, v5, 11
+; SI-NEXT: v_readlane_b32 s53, v5, 12
+; SI-NEXT: v_readlane_b32 s41, v5, 13
+; SI-NEXT: v_readlane_b32 s54, v5, 14
+; SI-NEXT: v_readlane_b32 s55, v5, 15
+; SI-NEXT: v_readlane_b32 s43, v5, 16
+; SI-NEXT: v_readlane_b32 s64, v5, 17
+; SI-NEXT: v_readlane_b32 s65, v5, 18
+; SI-NEXT: v_readlane_b32 s45, v5, 19
+; SI-NEXT: v_readlane_b32 s66, v5, 20
+; SI-NEXT: v_readlane_b32 s67, v5, 21
; SI-NEXT: s_cbranch_scc1 .LBB69_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -39719,28 +39729,28 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshr_b32 s66, s17, 16
; SI-NEXT: s_lshr_b32 s67, s17, 8
; SI-NEXT: s_mov_b32 s45, s46
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
+; SI-NEXT: s_lshr_b64 s[56:57], s[26:27], 8
; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24
; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[56:57], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8
-; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 24
+; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
; SI-NEXT: .LBB69_5: ; %end
; SI-NEXT: s_lshl_b32 s47, s34, 8
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_or_b32 s16, s16, s47
-; SI-NEXT: s_and_b32 s47, s30, 0xff
-; SI-NEXT: s_lshl_b32 s57, vcc_lo, 24
+; SI-NEXT: s_and_b32 s47, vcc_lo, 0xff
+; SI-NEXT: s_lshl_b32 s57, s30, 24
; SI-NEXT: s_lshl_b32 s47, s47, 16
; SI-NEXT: s_or_b32 s47, s57, s47
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -39759,8 +39769,8 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s16, s94, 8
; SI-NEXT: s_and_b32 s17, s18, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s92, 0xff
-; SI-NEXT: s_lshl_b32 s18, s90, 24
+; SI-NEXT: s_and_b32 s17, s46, 0xff
+; SI-NEXT: s_lshl_b32 s18, s92, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -39785,7 +39795,7 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s74, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s56, 24
+; SI-NEXT: s_lshl_b32 s18, s72, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -39805,11 +39815,11 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s22, 0xff
-; SI-NEXT: s_lshl_b32 s17, s88, 8
+; SI-NEXT: s_lshl_b32 s17, s90, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s76, 0xff
+; SI-NEXT: s_and_b32 s17, s88, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s72, 24
+; SI-NEXT: s_lshl_b32 s18, s76, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -39853,7 +39863,7 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s13
; SI-NEXT: s_and_b32 s13, s26, 0xff
-; SI-NEXT: s_lshl_b32 s15, s46, 8
+; SI-NEXT: s_lshl_b32 s15, s56, 8
; SI-NEXT: s_or_b32 s13, s13, s15
; SI-NEXT: s_and_b32 s15, s44, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 16
@@ -51842,9 +51852,9 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -51855,7 +51865,7 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB84_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -51863,10 +51873,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -51902,8 +51912,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB84_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB84_4
@@ -51924,10 +51936,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -52043,11 +52055,11 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v16, v29, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -52129,9 +52141,9 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr30
+; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -52142,7 +52154,7 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB84_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -52150,10 +52162,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -52189,8 +52201,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; GFX9-NEXT: v_mov_b32_e32 v26, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; GFX9-NEXT: .LBB84_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB84_4
@@ -52211,10 +52225,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -52315,10 +52329,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v30, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v29, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v29, v28, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v28, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -60599,14 +60613,14 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v17, s34, 0
; SI-NEXT: v_writelane_b32 v17, s35, 1
; SI-NEXT: v_writelane_b32 v17, s36, 2
-; SI-NEXT: v_writelane_b32 v17, s37, 3
-; SI-NEXT: v_writelane_b32 v17, s30, 4
-; SI-NEXT: v_writelane_b32 v17, s31, 5
+; SI-NEXT: v_writelane_b32 v17, s30, 3
+; SI-NEXT: v_writelane_b32 v17, s31, 4
; SI-NEXT: v_readfirstlane_b32 s36, v1
; SI-NEXT: v_readfirstlane_b32 s34, v0
; SI-NEXT: s_lshr_b32 s30, s29, 16
@@ -60622,15 +60636,18 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_lshr_b32 s89, s19, 16
; SI-NEXT: s_lshr_b32 s88, s18, 16
; SI-NEXT: s_lshr_b32 s79, s17, 16
-; SI-NEXT: s_lshr_b32 s37, s16, 16
+; SI-NEXT: s_lshr_b32 s78, s16, 16
; SI-NEXT: s_lshr_b32 s35, s36, 16
; SI-NEXT: s_lshr_b32 s31, s34, 16
; SI-NEXT: v_readfirstlane_b32 s5, v2
; SI-NEXT: s_cmp_lg_u32 s5, 0
+; SI-NEXT: ; implicit-def: $vgpr18 : SGPR spill to VGPR lane
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v18, s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB93_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshl_b32 s77, s16, 16
-; SI-NEXT: s_lshl_b32 s78, s37, 16
+; SI-NEXT: s_lshl_b32 s6, s78, 16
; SI-NEXT: s_lshl_b32 s75, s17, 16
; SI-NEXT: s_lshl_b32 s76, s79, 16
; SI-NEXT: s_lshl_b32 s73, s18, 16
@@ -60654,7 +60671,6 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_lshl_b32 s15, s27, 16
; SI-NEXT: s_lshl_b32 s40, vcc_hi, 16
; SI-NEXT: s_lshl_b32 s13, s28, 16
-; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_lshl_b32 s14, s4, 16
; SI-NEXT: s_lshl_b32 s11, s29, 16
; SI-NEXT: s_lshl_b32 s12, s30, 16
@@ -60665,10 +60681,9 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB93_3
; SI-NEXT: .LBB93_2:
-; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr73
@@ -60719,89 +60734,91 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_mov_b32 s42, s44
; SI-NEXT: s_mov_b32 s43, s45
; SI-NEXT: s_mov_b32 s44, s46
+; SI-NEXT: s_mov_b32 s45, s47
; SI-NEXT: s_cbranch_scc1 .LBB93_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s36, s36, 3
; SI-NEXT: s_and_b32 s4, s36, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s47, s4, 0x30000
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s31, 16
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: s_and_b32 s7, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s30, 16
+; SI-NEXT: s_add_i32 s5, s4, 0x30000
+; SI-NEXT: s_and_b32 s4, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s30, 16
+; SI-NEXT: s_or_b32 s4, s6, s4
+; SI-NEXT: s_add_i32 s7, s4, 0x30000
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: v_readlane_b32 s4, v18, 0
+; SI-NEXT: s_and_b32 s6, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s9, vcc_hi, 16
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_and_b32 s6, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s8, vcc_hi, 16
+; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s10, vcc_lo, 16
+; SI-NEXT: s_add_i32 s8, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s9, vcc_lo, 16
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s95, 16
+; SI-NEXT: s_add_i32 s9, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s95, 16
+; SI-NEXT: s_or_b32 s6, s10, s6
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s11, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s94, 16
+; SI-NEXT: s_add_i32 s10, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s11, s94, 16
+; SI-NEXT: s_or_b32 s6, s11, s6
; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s93, 16
+; SI-NEXT: s_add_i32 s11, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s93, 16
+; SI-NEXT: s_or_b32 s6, s12, s6
; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: s_and_b32 s13, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s92, 16
+; SI-NEXT: s_add_i32 s12, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s92, 16
+; SI-NEXT: s_or_b32 s6, s13, s6
; SI-NEXT: s_add_i32 s21, s21, 3
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s91, 16
+; SI-NEXT: s_add_i32 s13, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s91, 16
+; SI-NEXT: s_or_b32 s6, s14, s6
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: s_and_b32 s15, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s90, 16
+; SI-NEXT: s_add_i32 s14, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s90, 16
+; SI-NEXT: s_or_b32 s6, s15, s6
; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: s_or_b32 s15, s20, s15
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s89, 16
+; SI-NEXT: s_add_i32 s15, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s89, 16
+; SI-NEXT: s_or_b32 s6, s19, s6
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s19, s20, s19
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s88, 16
+; SI-NEXT: s_add_i32 s19, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s18, s88, 16
+; SI-NEXT: s_or_b32 s6, s18, s6
; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: s_or_b32 s18, s20, s18
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s79, 16
+; SI-NEXT: s_add_i32 s18, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s79, 16
+; SI-NEXT: s_or_b32 s6, s17, s6
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s17, s20, s17
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s37, 16
-; SI-NEXT: s_or_b32 s16, s20, s16
+; SI-NEXT: s_add_i32 s17, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s78, 16
+; SI-NEXT: s_or_b32 s6, s16, s6
; SI-NEXT: s_add_i32 s4, s4, 0x30000
-; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
-; SI-NEXT: s_add_i32 s8, s8, 0x30000
-; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: s_add_i32 s10, s10, 0x30000
-; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: s_add_i32 s12, s12, 0x30000
-; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: s_add_i32 s14, s14, 0x30000
-; SI-NEXT: s_add_i32 s15, s15, 0x30000
-; SI-NEXT: s_add_i32 s19, s19, 0x30000
-; SI-NEXT: s_add_i32 s18, s18, 0x30000
-; SI-NEXT: s_add_i32 s17, s17, 0x30000
-; SI-NEXT: s_add_i32 s16, s16, 0x30000
-; SI-NEXT: s_and_b32 s78, s16, 0xffff0000
+; SI-NEXT: s_add_i32 s16, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s77, s16, 16
; SI-NEXT: s_and_b32 s76, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s75, s17, 16
@@ -60816,7 +60833,7 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_and_b32 s58, s13, 0xffff0000
; SI-NEXT: s_lshl_b32 s57, s13, 16
; SI-NEXT: s_and_b32 s56, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s47, s12, 16
+; SI-NEXT: s_lshl_b32 s45, s12, 16
; SI-NEXT: s_and_b32 s44, s11, 0xffff0000
; SI-NEXT: s_lshl_b32 s43, s11, 16
; SI-NEXT: s_and_b32 s42, s10, 0xffff0000
@@ -60825,16 +60842,16 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_lshl_b32 s15, s9, 16
; SI-NEXT: s_and_b32 s14, s8, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s8, 16
-; SI-NEXT: s_and_b32 s12, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s11, s6, 16
+; SI-NEXT: s_and_b32 s12, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s4, 16
; SI-NEXT: s_and_b32 s10, s7, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s7, 16
; SI-NEXT: s_and_b32 s8, s5, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s5, 16
-; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_and_b32 s5, s47, 0xffff0000
+; SI-NEXT: s_lshl_b32 s4, s47, 16
; SI-NEXT: .LBB93_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
@@ -60864,7 +60881,7 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s56
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s45
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s44
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
@@ -60897,15 +60914,15 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
; SI-NEXT: v_mul_f32_e64 v15, 1.0, s4
-; SI-NEXT: v_readlane_b32 s30, v17, 4
+; SI-NEXT: v_readlane_b32 s30, v17, 3
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_readlane_b32 s31, v17, 5
-; SI-NEXT: v_readlane_b32 s37, v17, 3
+; SI-NEXT: v_readlane_b32 s31, v17, 4
; SI-NEXT: v_readlane_b32 s36, v17, 2
; SI-NEXT: v_readlane_b32 s35, v17, 1
; SI-NEXT: v_readlane_b32 s34, v17, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -61198,32 +61215,32 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v5
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v5
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v4
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v3
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v1
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v63, 1.0, v0
-; SI-NEXT: v_mul_f32_e32 v62, 1.0, v28
-; SI-NEXT: v_mul_f32_e32 v28, 1.0, v1
-; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27
+; SI-NEXT: v_mul_f32_e32 v62, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v33, 1.0, v1
+; SI-NEXT: v_mul_f32_e32 v32, 1.0, v31
; SI-NEXT: v_mul_f32_e32 v61, 1.0, v2
-; SI-NEXT: v_mul_f32_e32 v60, 1.0, v32
-; SI-NEXT: v_mul_f32_e32 v34, 1.0, v3
-; SI-NEXT: v_mul_f32_e32 v33, 1.0, v31
+; SI-NEXT: v_mul_f32_e32 v60, 1.0, v30
+; SI-NEXT: v_mul_f32_e32 v35, 1.0, v3
+; SI-NEXT: v_mul_f32_e32 v34, 1.0, v29
; SI-NEXT: v_mul_f32_e32 v59, 1.0, v4
-; SI-NEXT: v_mul_f32_e32 v58, 1.0, v30
+; SI-NEXT: v_mul_f32_e32 v58, 1.0, v28
; SI-NEXT: v_mul_f32_e32 v37, 1.0, v5
-; SI-NEXT: v_mul_f32_e32 v36, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v36, 1.0, v27
; SI-NEXT: v_mul_f32_e32 v57, 1.0, v6
; SI-NEXT: v_mul_f32_e32 v56, 1.0, v26
; SI-NEXT: v_mul_f32_e32 v39, 1.0, v7
@@ -61257,23 +61274,23 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -61282,44 +61299,44 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v32
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v61
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v34
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v59
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v38
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v46
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v53
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v52
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v40
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v55
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v54
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr37
@@ -61401,35 +61418,35 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v52
; SI-NEXT: v_alignbit_b32 v15, v16, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v53
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v13
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v50
; SI-NEXT: v_alignbit_b32 v13, v17, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v51
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v11
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v9
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v48
; SI-NEXT: v_alignbit_b32 v11, v18, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v7
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v38
; SI-NEXT: v_alignbit_b32 v9, v19, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v7
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v5
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v36
; SI-NEXT: v_alignbit_b32 v7, v20, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37
@@ -61437,16 +61454,16 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34
; SI-NEXT: v_alignbit_b32 v5, v21, v1, 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v34
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3
; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v23
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v27
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v32
; SI-NEXT: v_alignbit_b32 v3, v22, v1, 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v33
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
@@ -61455,11 +61472,11 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v24, v1, v24, 16
; SI-NEXT: v_alignbit_b32 v25, v3, v25, 16
; SI-NEXT: v_alignbit_b32 v26, v5, v26, 16
-; SI-NEXT: v_alignbit_b32 v29, v7, v29, 16
-; SI-NEXT: v_alignbit_b32 v30, v9, v30, 16
-; SI-NEXT: v_alignbit_b32 v31, v11, v31, 16
-; SI-NEXT: v_alignbit_b32 v32, v13, v32, 16
-; SI-NEXT: v_alignbit_b32 v35, v15, v35, 16
+; SI-NEXT: v_alignbit_b32 v27, v7, v27, 16
+; SI-NEXT: v_alignbit_b32 v28, v9, v28, 16
+; SI-NEXT: v_alignbit_b32 v29, v11, v29, 16
+; SI-NEXT: v_alignbit_b32 v30, v13, v30, 16
+; SI-NEXT: v_alignbit_b32 v31, v15, v31, 16
; SI-NEXT: .LBB94_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -61502,19 +61519,19 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v26
; SI-NEXT: v_or_b32_e32 v5, v5, v21
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v27
; SI-NEXT: v_or_b32_e32 v7, v7, v20
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v30
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28
; SI-NEXT: v_or_b32_e32 v9, v9, v19
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v29
; SI-NEXT: v_or_b32_e32 v11, v11, v18
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v30
; SI-NEXT: v_or_b32_e32 v13, v13, v17
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v31
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v0, v0, v24
@@ -62830,8 +62847,8 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v52
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
; SI-NEXT: v_lshr_b64 v[6:7], v[23:24], 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
@@ -62854,51 +62871,58 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v1
; SI-NEXT: v_lshr_b64 v[13:14], v[6:7], 16
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v60
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshr_b64 v[23:24], v[9:10], 16
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; SI-NEXT: v_lshr_b64 v[23:24], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v59
-; SI-NEXT: v_lshr_b64 v[24:25], v[9:10], 16
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v7
+; SI-NEXT: v_lshr_b64 v[24:25], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; SI-NEXT: v_lshr_b64 v[25:26], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v45
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v46
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v11
-; SI-NEXT: v_lshr_b64 v[26:27], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v28
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v55
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v14
-; SI-NEXT: v_lshr_b64 v[27:28], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v48
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v7
+; SI-NEXT: v_lshr_b64 v[25:26], v[10:11], 16
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v11
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v19
+; SI-NEXT: v_lshr_b64 v[26:27], v[10:11], 16
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v55
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v11
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v14
+; SI-NEXT: v_lshr_b64 v[27:28], v[10:11], 16
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v48
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v30
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v34
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v30
; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 16
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v19
; SI-NEXT: v_lshr_b64 v[19:20], v[34:35], 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_lshr_b64 v[17:18], v[30:31], 16
@@ -62912,32 +62936,25 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v8
; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v12
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5
; SI-NEXT: v_add_f32_e32 v50, 0x40c00000, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshr_b64 v[7:8], v[36:37], 16
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 16
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v22
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v11
; SI-NEXT: v_lshr_b64 v[11:12], v[32:33], 16
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v3
; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16
; SI-NEXT: v_lshr_b64 v[40:41], v[6:7], 16
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v9
; SI-NEXT: v_lshr_b64 v[41:42], v[18:19], 16
; SI-NEXT: v_lshr_b64 v[21:22], v[38:39], 16
; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
@@ -65133,10 +65150,6 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; kill: killed $vgpr21
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; VI-NEXT: ; implicit-def: $vgpr21
-; VI-NEXT: ; kill: killed $vgpr21
-; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; kill: killed $vgpr21
@@ -65160,8 +65173,15 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v10
; VI-NEXT: ; implicit-def: $vgpr21
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v9
+; VI-NEXT: ; kill: killed $vgpr21
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v7
+; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v5
; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v4
@@ -65169,20 +65189,21 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v1
; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; implicit-def: $vgpr20
-; VI-NEXT: ; kill: killed $vgpr21
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr21
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr17
@@ -65190,15 +65211,15 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: ; implicit-def: $vgpr43
; VI-NEXT: ; implicit-def: $vgpr51
-; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; kill: killed $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr40
@@ -65211,42 +65232,37 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr21
-; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v14
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v10
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v2
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
@@ -65256,20 +65272,23 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v12
; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v7
; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v4
; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v2
@@ -65277,8 +65296,8 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_mov_b32_e32 v53, v1
; VI-NEXT: v_mov_b32_e32 v17, v2
; VI-NEXT: v_mov_b32_e32 v43, v3
-; VI-NEXT: v_mov_b32_e32 v45, v4
-; VI-NEXT: v_mov_b32_e32 v46, v5
+; VI-NEXT: v_mov_b32_e32 v59, v4
+; VI-NEXT: v_mov_b32_e32 v45, v5
; VI-NEXT: v_mov_b32_e32 v18, v6
; VI-NEXT: v_mov_b32_e32 v19, v7
; VI-NEXT: v_mov_b32_e32 v20, v8
@@ -65305,7 +65324,7 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_mov_b32_e32 v21, 3
; VI-NEXT: v_add_u16_sdwa v37, v5, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v31, v16, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v46, 3, v5
+; VI-NEXT: v_add_u16_e32 v45, 3, v5
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
; VI-NEXT: v_add_u16_sdwa v27, v8, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v47, 3, v13
@@ -65313,32 +65332,32 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v62, 3, v16
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v31
; VI-NEXT: v_add_u16_sdwa v36, v15, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v19, v46, v5
-; VI-NEXT: v_add_u16_e32 v56, 3, v8
+; VI-NEXT: v_or_b32_e32 v19, v45, v5
+; VI-NEXT: v_add_u16_e32 v46, 3, v8
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v27
-; VI-NEXT: v_add_u16_sdwa v33, v7, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v32, v7, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v44, 3, v14
; VI-NEXT: v_add_u16_sdwa v30, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v14, v62, v13
; VI-NEXT: v_add_u16_e32 v63, 3, v15
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v36
-; VI-NEXT: v_or_b32_e32 v8, v56, v5
-; VI-NEXT: v_add_u16_e32 v57, 3, v7
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
+; VI-NEXT: v_or_b32_e32 v8, v46, v5
+; VI-NEXT: v_add_u16_e32 v56, 3, v7
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
; VI-NEXT: v_add_u16_sdwa v28, v10, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v13, v63, v13
-; VI-NEXT: v_or_b32_e32 v7, v57, v5
-; VI-NEXT: v_add_u16_e32 v58, 3, v10
+; VI-NEXT: v_or_b32_e32 v7, v56, v5
+; VI-NEXT: v_add_u16_e32 v57, 3, v10
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v28
-; VI-NEXT: v_add_u16_sdwa v59, v9, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v33, v9, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v41, 3, v11
; VI-NEXT: v_add_u16_sdwa v34, v11, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v30
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
; VI-NEXT: v_add_u16_sdwa v26, v6, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v10, v58, v5
+; VI-NEXT: v_or_b32_e32 v10, v57, v5
; VI-NEXT: v_add_u16_e32 v40, 3, v9
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v59
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
; VI-NEXT: v_add_u16_e32 v42, 3, v12
; VI-NEXT: v_add_u16_sdwa v29, v12, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v12, v44, v11
@@ -65356,48 +65375,47 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v11
; VI-NEXT: v_or_b32_e32 v5, v41, v5
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v6
; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v6
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v5
; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v10
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v9
; VI-NEXT: v_add_u16_sdwa v39, v4, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v49, v3, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v9
; VI-NEXT: v_add_u16_sdwa v38, v2, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v48, v1, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v45, 3, v4
+; VI-NEXT: v_add_u16_e32 v59, 3, v4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v39
; VI-NEXT: v_add_u16_e32 v43, 3, v3
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[9:10]
; VI-NEXT: v_add_u16_e32 v17, 3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v38
; VI-NEXT: v_add_u16_e32 v53, 3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
-; VI-NEXT: v_or_b32_e32 v4, v45, v4
+; VI-NEXT: v_or_b32_e32 v4, v59, v4
; VI-NEXT: v_or_b32_e32 v3, v43, v3
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
; VI-NEXT: v_or_b32_e32 v2, v17, v2
; VI-NEXT: v_or_b32_e32 v1, v53, v1
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v8
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v1
; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
; VI-NEXT: v_bfe_u32 v1, v31, 8, 8
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v20
+; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v1, v30, 8, 8
; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v14
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13
@@ -65406,24 +65424,27 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v2
-; VI-NEXT: v_mov_b32_e32 v25, v58
-; VI-NEXT: v_mov_b32_e32 v19, v57
-; VI-NEXT: v_mov_b32_e32 v20, v56
-; VI-NEXT: v_mov_b32_e32 v57, v5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v25, v57
+; VI-NEXT: v_mov_b32_e32 v19, v56
+; VI-NEXT: v_mov_b32_e32 v20, v46
+; VI-NEXT: v_mov_b32_e32 v57, v6
+; VI-NEXT: v_mov_b32_e32 v46, v5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v56, v29, 8, 8
; VI-NEXT: v_bfe_u32 v58, v28, 8, 8
; VI-NEXT: v_bfe_u32 v60, v27, 8, 8
; VI-NEXT: v_bfe_u32 v61, v26, 8, 8
-; VI-NEXT: v_bfe_u32 v32, v39, 8, 8
+; VI-NEXT: v_bfe_u32 v21, v39, 8, 8
; VI-NEXT: v_bfe_u32 v1, v38, 8, 8
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: .LBB96_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
@@ -65432,7 +65453,7 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v1, v17, v55, s4
; VI-NEXT: v_perm_b32 v2, v49, v23, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -65443,14 +65464,17 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v1, v43, v51, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v39, v32, s4
+; VI-NEXT: v_perm_b32 v2, v39, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v45, v52, s4
+; VI-NEXT: v_perm_b32 v1, v59, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v37, v22, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v46, v50, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v45, v50, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v37, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v26, v61, s4
@@ -65458,38 +65482,36 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v18, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v32, v22, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v33, v21, s4
+; VI-NEXT: v_perm_b32 v1, v19, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v27, v60, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v59, v2, s4
+; VI-NEXT: v_perm_b32 v2, v33, v2, s4
; VI-NEXT: v_perm_b32 v1, v40, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v28, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -65498,14 +65520,14 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v29, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v42, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -65514,16 +65536,16 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v44, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v30, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -65532,10 +65554,10 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v62, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v31, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -65620,9 +65642,9 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr30
+; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -65633,7 +65655,7 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB96_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -65641,10 +65663,10 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -65680,8 +65702,10 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; GFX9-NEXT: v_mov_b32_e32 v26, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; GFX9-NEXT: .LBB96_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB96_4
@@ -65710,10 +65734,10 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -65814,10 +65838,10 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v30, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v29, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v29, v28, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v28, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -66326,31 +66350,31 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: v_writelane_b32 v4, s87, 29
; SI-NEXT: v_writelane_b32 v4, s30, 30
; SI-NEXT: v_writelane_b32 v4, s31, 31
-; SI-NEXT: v_readfirstlane_b32 s55, v2
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
+; SI-NEXT: v_readfirstlane_b32 s30, v1
; SI-NEXT: s_lshr_b32 s45, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s28, 16
+; SI-NEXT: s_lshr_b32 s6, s28, 16
; SI-NEXT: s_lshr_b32 s68, s27, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
+; SI-NEXT: s_lshr_b32 s7, s26, 16
; SI-NEXT: s_lshr_b32 s69, s25, 16
-; SI-NEXT: s_lshr_b32 s95, s24, 16
+; SI-NEXT: s_lshr_b32 s65, s24, 16
; SI-NEXT: s_lshr_b32 s57, s23, 16
-; SI-NEXT: s_lshr_b32 s80, s22, 16
+; SI-NEXT: s_lshr_b32 s37, s22, 16
; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s20, 16
; SI-NEXT: s_lshr_b32 s59, s19, 16
-; SI-NEXT: s_lshr_b32 s73, s18, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
; SI-NEXT: s_lshr_b32 s61, s17, 16
-; SI-NEXT: s_lshr_b32 s63, s16, 16
-; SI-NEXT: s_lshr_b32 s47, s55, 16
-; SI-NEXT: s_lshr_b32 s81, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s95, s16, 16
+; SI-NEXT: s_lshr_b32 s47, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s34, s30, 16
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: ; implicit-def: $vgpr5 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB97_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s63, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
; SI-NEXT: s_lshl_b32 s5, s61, 16
@@ -66359,14 +66383,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v5, s4, 0
; SI-NEXT: v_writelane_b32 v5, s5, 1
-; SI-NEXT: s_mov_b32 s4, s47
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
-; SI-NEXT: s_mov_b32 s47, s4
; SI-NEXT: s_mov_b32 s4, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8
; SI-NEXT: s_mov_b32 s59, s4
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, s59, 16
@@ -66377,20 +66398,14 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_mov_b32 s4, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
; SI-NEXT: s_mov_b32 s61, s4
-; SI-NEXT: s_mov_b32 s4, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
-; SI-NEXT: s_mov_b32 s73, s4
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s13, s4, s5
-; SI-NEXT: s_mov_b32 s4, s63
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
-; SI-NEXT: s_mov_b32 s63, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s8, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
; SI-NEXT: s_lshl_b32 s5, s57, 16
@@ -66399,104 +66414,114 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
; SI-NEXT: s_mov_b32 s95, s4
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s14, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s15, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s10, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s11, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_mov_b32 s46, s6
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s45, 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 8
+; SI-NEXT: s_mov_b32 s44, s7
; SI-NEXT: s_or_b32 s7, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_and_b32 s4, s30, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s55, 0xffff
-; SI-NEXT: s_lshl_b32 s75, s47, 16
-; SI-NEXT: s_mov_b32 s44, vcc_lo
-; SI-NEXT: s_or_b32 s5, s5, s75
-; SI-NEXT: s_mov_b32 vcc_lo, s55
-; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
-; SI-NEXT: s_lshr_b32 s36, s15, 8
-; SI-NEXT: s_mov_b32 s55, vcc_lo
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
+; SI-NEXT: s_and_b32 s5, vcc_lo, 0xffff
+; SI-NEXT: s_lshl_b32 s63, s47, 16
+; SI-NEXT: s_mov_b32 s82, vcc_lo
+; SI-NEXT: s_or_b32 s5, s5, s63
+; SI-NEXT: s_mov_b32 vcc_lo, s65
+; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
+; SI-NEXT: s_mov_b32 s83, s30
+; SI-NEXT: s_lshr_b32 s36, s13, 8
+; SI-NEXT: s_mov_b32 s65, vcc_lo
+; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
; SI-NEXT: s_mov_b32 s30, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
-; SI-NEXT: s_lshr_b32 s37, s13, 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
+; SI-NEXT: s_lshr_b32 s66, s41, 8
+; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
+; SI-NEXT: s_mov_b32 s51, s36
; SI-NEXT: s_mov_b32 vcc_hi, s30
-; SI-NEXT: s_mov_b32 s39, s36
; SI-NEXT: s_mov_b32 s36, s31
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[88:89], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[14:15], 24
; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s66, s9, 8
-; SI-NEXT: s_bfe_u32 s67, s59, 0x80008
-; SI-NEXT: s_bfe_u32 s85, s70, 0x80008
-; SI-NEXT: s_bfe_u32 s86, s57, 0x80008
-; SI-NEXT: s_bfe_u32 s87, s69, 0x80008
-; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
+; SI-NEXT: s_mov_b32 s85, s34
+; SI-NEXT: s_lshr_b32 s67, s9, 8
+; SI-NEXT: s_bfe_u32 s81, s59, 0x80008
+; SI-NEXT: s_bfe_u32 s86, s70, 0x80008
+; SI-NEXT: s_bfe_u32 s87, s57, 0x80008
; SI-NEXT: s_lshr_b64 s[48:49], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
; SI-NEXT: s_mov_b32 s31, s36
-; SI-NEXT: s_mov_b32 s53, s37
+; SI-NEXT: s_mov_b32 s55, s66
+; SI-NEXT: s_mov_b32 s66, s37
; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
-; SI-NEXT: s_lshr_b32 s84, s43, 8
-; SI-NEXT: s_lshr_b32 s83, s41, 8
-; SI-NEXT: s_lshr_b32 s91, s11, 8
-; SI-NEXT: s_lshr_b32 s79, s7, 8
-; SI-NEXT: s_lshr_b32 s75, s5, 8
-; SI-NEXT: s_bfe_u32 s82, s61, 0x80008
-; SI-NEXT: s_bfe_u32 s93, s68, 0x80008
-; SI-NEXT: s_bfe_u32 s89, s45, 0x80008
-; SI-NEXT: s_bfe_u32 s77, s47, 0x80008
+; SI-NEXT: s_lshr_b32 s80, s43, 8
+; SI-NEXT: s_lshr_b32 s91, s15, 8
+; SI-NEXT: s_lshr_b32 s79, s11, 8
+; SI-NEXT: s_lshr_b32 s75, s7, 8
+; SI-NEXT: s_lshr_b32 s63, s5, 8
+; SI-NEXT: s_bfe_u32 s71, s61, 0x80008
+; SI-NEXT: s_bfe_u32 s93, s69, 0x80008
+; SI-NEXT: s_bfe_u32 s89, s68, 0x80008
+; SI-NEXT: s_bfe_u32 s77, s45, 0x80008
+; SI-NEXT: s_bfe_u32 s73, s47, 0x80008
; SI-NEXT: s_mov_b32 s35, s87
+; SI-NEXT: s_mov_b32 s39, s67
+; SI-NEXT: s_mov_b32 s53, s81
; SI-NEXT: s_mov_b32 s49, s86
-; SI-NEXT: s_mov_b32 s51, s66
-; SI-NEXT: s_mov_b32 s65, s67
-; SI-NEXT: s_mov_b32 s37, s85
+; SI-NEXT: s_mov_b32 s37, s66
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB97_3
; SI-NEXT: .LBB97_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b32 s44, vcc_lo
+; SI-NEXT: s_mov_b32 s83, s30
+; SI-NEXT: s_mov_b32 s85, s34
+; SI-NEXT: s_mov_b32 s82, vcc_lo
+; SI-NEXT: s_mov_b32 s46, s6
+; SI-NEXT: s_mov_b32 s44, s7
; SI-NEXT: s_mov_b64 s[66:67], -1
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v5, s4, 0
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v5, s5, 1
; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: v_writelane_b32 v5, s5, 1
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr91
@@ -66505,6 +66530,8 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr78
@@ -66532,17 +66559,17 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: v_readlane_b32 s67, v5, 1
; SI-NEXT: s_cbranch_scc1 .LBB97_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s4, s44, 3
+; SI-NEXT: s_add_i32 s4, s83, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s5, s55, 3
+; SI-NEXT: s_add_i32 s5, s82, 3
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s6, s47, 16
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_lshl_b32 s7, s46, 16
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s29, 0xffff
@@ -66550,7 +66577,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s9, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s9, s44, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s10, s8, 0x30000
@@ -66560,7 +66587,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s11, s8, 0x30000
; SI-NEXT: s_and_b32 s8, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s95, 16
+; SI-NEXT: s_lshl_b32 s9, s65, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s14, s8, 0x30000
@@ -66570,7 +66597,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s15, s8, 0x30000
; SI-NEXT: s_and_b32 s8, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s80, 16
+; SI-NEXT: s_lshl_b32 s9, s37, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s23, 0xffff
@@ -66578,7 +66605,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s9, s12, s9
; SI-NEXT: s_and_b32 s12, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s71, 16
+; SI-NEXT: s_lshl_b32 s13, s31, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s21, 0xffff
@@ -66586,7 +66613,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s13, s20, s13
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s73, 16
+; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s40, s18, 0x30000
@@ -66596,15 +66623,13 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s41, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s63, 16
+; SI-NEXT: s_lshl_b32 s18, s95, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s42, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
; SI-NEXT: s_lshl_b32 s17, s61, 16
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s4, s4, 0x30000
-; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
@@ -66612,59 +66637,61 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
; SI-NEXT: s_add_i32 s43, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
+; SI-NEXT: s_add_i32 s4, s4, 0x30000
+; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8
; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[88:89], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[14:15], 24
; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
; SI-NEXT: s_lshr_b64 s[48:49], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s82, s43, 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
+; SI-NEXT: s_lshr_b32 s71, s43, 24
; SI-NEXT: s_lshr_b32 s61, s43, 16
-; SI-NEXT: s_lshr_b32 s84, s43, 8
-; SI-NEXT: s_lshr_b32 s65, s41, 24
+; SI-NEXT: s_lshr_b32 s80, s43, 8
+; SI-NEXT: s_lshr_b32 s53, s41, 24
; SI-NEXT: s_lshr_b32 s59, s41, 16
-; SI-NEXT: s_lshr_b32 s83, s41, 8
-; SI-NEXT: s_lshr_b32 s37, s13, 24
+; SI-NEXT: s_lshr_b32 s55, s41, 8
+; SI-NEXT: s_lshr_b32 s49, s13, 24
; SI-NEXT: s_lshr_b32 s70, s13, 16
-; SI-NEXT: s_lshr_b32 s53, s13, 8
-; SI-NEXT: s_lshr_b32 s49, s9, 24
+; SI-NEXT: s_lshr_b32 s51, s13, 8
+; SI-NEXT: s_lshr_b32 s35, s9, 24
; SI-NEXT: s_lshr_b32 s57, s9, 16
-; SI-NEXT: s_lshr_b32 s51, s9, 8
-; SI-NEXT: s_lshr_b32 s35, s15, 24
+; SI-NEXT: s_lshr_b32 s39, s9, 8
+; SI-NEXT: s_lshr_b32 s93, s15, 24
; SI-NEXT: s_lshr_b32 s69, s15, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 8
-; SI-NEXT: s_lshr_b32 s93, s11, 24
+; SI-NEXT: s_lshr_b32 s91, s15, 8
+; SI-NEXT: s_lshr_b32 s89, s11, 24
; SI-NEXT: s_lshr_b32 s68, s11, 16
-; SI-NEXT: s_lshr_b32 s91, s11, 8
-; SI-NEXT: s_lshr_b32 s89, s7, 24
+; SI-NEXT: s_lshr_b32 s79, s11, 8
+; SI-NEXT: s_lshr_b32 s77, s7, 24
; SI-NEXT: s_lshr_b32 s45, s7, 16
-; SI-NEXT: s_lshr_b32 s79, s7, 8
-; SI-NEXT: s_lshr_b32 s77, s5, 24
+; SI-NEXT: s_lshr_b32 s75, s7, 8
+; SI-NEXT: s_lshr_b32 s73, s5, 24
; SI-NEXT: s_lshr_b32 s47, s5, 16
-; SI-NEXT: s_lshr_b32 s75, s5, 8
+; SI-NEXT: s_lshr_b32 s63, s5, 8
; SI-NEXT: .LBB97_5: ; %end
; SI-NEXT: s_and_b32 s16, s42, 0xff
; SI-NEXT: s_lshl_b32 s17, s58, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s46, 0xff
+; SI-NEXT: s_and_b32 s17, s84, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s66, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -66672,11 +66699,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s84, 8
+; SI-NEXT: s_lshl_b32 s17, s80, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s61, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s82, 24
+; SI-NEXT: s_lshl_b32 s18, s71, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -66684,7 +66711,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: s_lshl_b32 s17, s72, 8
+; SI-NEXT: s_lshl_b32 s17, s74, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s60, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
@@ -66696,11 +66723,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s83, 8
+; SI-NEXT: s_lshl_b32 s17, s55, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s59, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s65, 24
+; SI-NEXT: s_lshl_b32 s18, s53, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -66708,11 +66735,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: s_lshl_b32 s16, s76, 8
+; SI-NEXT: s_lshl_b32 s16, s62, 8
; SI-NEXT: s_or_b32 s12, s12, s16
-; SI-NEXT: s_and_b32 s16, s74, 0xff
+; SI-NEXT: s_and_b32 s16, s76, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s62, 24
+; SI-NEXT: s_lshl_b32 s17, s72, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_or_b32 s12, s12, s16
@@ -66720,11 +66747,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s53, 8
+; SI-NEXT: s_lshl_b32 s13, s51, 8
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s13, s70, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s16, s37, 24
+; SI-NEXT: s_lshl_b32 s16, s49, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s16, s13
; SI-NEXT: s_or_b32 s12, s12, s13
@@ -66744,11 +66771,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s51, 8
+; SI-NEXT: s_lshl_b32 s9, s39, 8
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s57, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s12, s49, 24
+; SI-NEXT: s_lshl_b32 s12, s35, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -66768,11 +66795,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s15, 0xff
-; SI-NEXT: s_lshl_b32 s9, s39, 8
+; SI-NEXT: s_lshl_b32 s9, s91, 8
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s69, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s12, s35, 24
+; SI-NEXT: s_lshl_b32 s12, s93, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -66792,11 +66819,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s11, 0xff
-; SI-NEXT: s_lshl_b32 s9, s91, 8
+; SI-NEXT: s_lshl_b32 s9, s79, 8
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s68, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s93, 24
+; SI-NEXT: s_lshl_b32 s10, s89, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -66816,11 +66843,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s79, 8
+; SI-NEXT: s_lshl_b32 s7, s75, 8
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s7, s45, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s89, 24
+; SI-NEXT: s_lshl_b32 s8, s77, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -66840,11 +66867,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s75, 8
+; SI-NEXT: s_lshl_b32 s5, s63, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s47, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s77, 24
+; SI-NEXT: s_lshl_b32 s6, s73, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -68081,369 +68108,354 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:32
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:16
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:56
; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:88
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:112
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:36
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v15
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v23
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v27
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v7
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v13
-; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v21
-; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v29
-; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v17
-; SI-NEXT: v_lshlrev_b32_e32 v47, 8, v25
-; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v13
+; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v21
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v29
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v17
+; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v25
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; kill: killed $vgpr5
; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:124
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v2
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v4
-; SI-NEXT: v_lshlrev_b32_e32 v63, 24, v18
-; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v20
-; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v10
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v12
-; SI-NEXT: v_lshlrev_b32_e32 v33, 8, v28
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:12
-; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v14
-; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v22
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v4
+; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v8
+; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v10
+; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v12
+; SI-NEXT: v_lshlrev_b32_e32 v63, 24, v14
+; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
+; SI-NEXT: v_lshlrev_b32_e32 v26, 8, v18
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v22
+; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v24
+; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v31
+; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v32
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:12
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v33
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v31
-; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v32
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v35
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v36
-; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v37
-; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v35
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:100
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v54
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_or_b32_e32 v6, v6, v49
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v44
+; SI-NEXT: v_or_b32_e32 v13, v13, v26
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v40
-; SI-NEXT: v_or_b32_e32 v13, v13, v18
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v33
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v62
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v18, v24, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v4, v4, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v21, v21, v15
-; SI-NEXT: v_or_b32_e32 v15, v8, v21
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v8, v27, v8
-; SI-NEXT: v_or_b32_e32 v13, v13, v18
-; SI-NEXT: v_alignbit_b32 v26, v13, v4, 16
-; SI-NEXT: v_alignbit_b32 v32, v15, v8, 16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v18
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v21
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v48, v46, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v20
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v20, v58, v11
-; SI-NEXT: v_or_b32_e32 v11, v1, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v63, v1
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: v_alignbit_b32 v22, v11, v1, 16
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_or_b32_e32 v29, v7, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v23, v3, v29
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v29
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_or_b32_e32 v16, v16, v24
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_or_b32_e32 v12, v7, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v25, v5, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v17, v5, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v52
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v36, v7, v3
-; SI-NEXT: v_alignbit_b32 v3, v23, v12, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_or_b32_e32 v33, v7, v5
+; SI-NEXT: v_alignbit_b32 v5, v1, v17, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v12, v16, v12
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v3, v3, v36
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v36
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v3, v3, v55
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v14, v7, v5
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v5, v3, v14, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v19, v7, v5
+; SI-NEXT: v_alignbit_b32 v5, v3, v19, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v24
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v37, v9, v7
+; SI-NEXT: v_or_b32_e32 v34, v9, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v37
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v53
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v5, v5, v43
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v34
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v21, v42, v7
+; SI-NEXT: v_alignbit_b32 v7, v5, v21, 16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_or_b32_e32 v17, v54, v7
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v38, v43, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: v_or_b32_e32 v60, v16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v37
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v38
-; SI-NEXT: v_alignbit_b32 v7, v5, v17, 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v19, v45, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v47
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v41, v16, v19
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v35, v46, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v7, v7, v57
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: v_or_b32_e32 v7, v7, v61
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v7, v7, v38
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v48
-; SI-NEXT: v_alignbit_b32 v44, v7, v19, 16
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_or_b32_e32 v9, v9, v61
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v9, v9, v48
-; SI-NEXT: v_alignbit_b32 v31, v9, v20, 16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v2
-; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_or_b32_e32 v7, v7, v35
+; SI-NEXT: v_or_b32_e32 v29, v47, v9
+; SI-NEXT: v_alignbit_b32 v9, v7, v29, 16
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v35
; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v0, v16, v0
-; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v0, v9, v0
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v39, v0, v20
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_or_b32_e32 v37, v58, v9
+; SI-NEXT: v_or_b32_e32 v9, v0, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v32
+; SI-NEXT: v_or_b32_e32 v4, v4, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v8, v63, v8
+; SI-NEXT: v_or_b32_e32 v11, v4, v8
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v16, v4
+; SI-NEXT: v_or_b32_e32 v16, v18, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_alignbit_b32 v41, v9, v0, 16
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v18, v27, v14
+; SI-NEXT: v_or_b32_e32 v15, v6, v18
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v6, v51, v6
+; SI-NEXT: v_or_b32_e32 v13, v13, v16
+; SI-NEXT: v_alignbit_b32 v57, v11, v4, 16
+; SI-NEXT: v_alignbit_b32 v31, v13, v12, 16
+; SI-NEXT: v_alignbit_b32 v14, v15, v6, 16
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v20, v20, v23
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_or_b32_e32 v24, v20, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v17, v17, v20
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v56, v17, v19
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v40
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v52, v17, v21
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v59
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v36, v17, v29
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v22
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v29, v17, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v10
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v25, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: v_or_b32_e32 v21, v0, v4
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_or_b32_e32 v0, v0, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v19, v0, v4
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v56
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: v_or_b32_e32 v0, v0, v51
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_or_b32_e32 v19, v0, v12
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v60
+; SI-NEXT: v_or_b32_e32 v0, v0, v53
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v17, v0, v8
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_or_b32_e32 v17, v0, v6
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -68493,115 +68505,148 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: .LBB98_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v60
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v30
+; SI-NEXT: v_or_b32_e32 v1, v53, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_or_b32_e32 v3, v51, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v6
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v3, v49, v3
; SI-NEXT: s_movk_i32 s6, 0x300
-; SI-NEXT: v_or_b32_e32 v1, v62, v1
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v3
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v3, v27, v3
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v45
+; SI-NEXT: v_or_b32_e32 v1, v50, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v3, v12, v3
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v54
+; SI-NEXT: v_or_b32_e32 v1, v26, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v3, v18, v3
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v31, v13, v19, 16
+; SI-NEXT: v_alignbit_b32 v14, v15, v17, 16
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v15
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v23
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v2, v16, v2
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v28
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v62, v2
+; SI-NEXT: v_alignbit_b32 v57, v11, v21, 16
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v1, v22, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v56
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v16
-; SI-NEXT: v_or_b32_e32 v3, v51, v3
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x300, v3
-; SI-NEXT: v_or_b32_e32 v5, v27, v5
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v3, v5, v3
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v33, v5
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v5
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v30
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v5, v21, v5
-; SI-NEXT: v_or_b32_e32 v3, v5, v3
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v6
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v42
-; SI-NEXT: v_or_b32_e32 v3, v34, v3
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v40
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v3, v18, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_alignbit_b32 v32, v15, v17, 16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v15
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v58, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v39, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v61, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v46, v1
+; SI-NEXT: v_or_b32_e32 v1, v58, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v31, v9, v39, 16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; SI-NEXT: v_alignbit_b32 v41, v9, v29, 16
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v9
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v47, v0
+; SI-NEXT: v_or_b32_e32 v0, v59, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v45, v1
+; SI-NEXT: v_or_b32_e32 v1, v47, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v41, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v36, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -68609,52 +68654,38 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v57, v0
+; SI-NEXT: v_or_b32_e32 v0, v61, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v43, v1
+; SI-NEXT: v_or_b32_e32 v1, v46, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v44, v7, v41, 16
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v53, v0
+; SI-NEXT: v_or_b32_e32 v0, v40, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v1, v42, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v60, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v52, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v24, v4
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v28
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v63, v4
-; SI-NEXT: v_alignbit_b32 v26, v13, v19, 16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v55, v0
+; SI-NEXT: v_or_b32_e32 v0, v43, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -68662,22 +68693,14 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v3, v10, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v3
-; SI-NEXT: v_alignbit_b32 v22, v11, v25, 16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
@@ -68688,16 +68711,16 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v56, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v52, v0
+; SI-NEXT: v_or_b32_e32 v0, v55, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -68706,9 +68729,9 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -68723,10 +68746,10 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -68741,55 +68764,45 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v0, v23, v12, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
+; SI-NEXT: v_alignbit_b32 v0, v1, v24, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v3, v14, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v3, v56, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v5, v52, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v5, v60, 16
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v7, v36, 16
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: .LBB98_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v35
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v57
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v44
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v31
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v22
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v31
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v60
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v4, v4, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v29
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
@@ -68806,25 +68819,36 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v4, v4, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v36
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v39
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v25
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v10, v10, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v38
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v26
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v49
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v50
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v39
+; SI-NEXT: v_or_b32_e32 v13, v13, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v14, v16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
; SI-NEXT: v_or_b32_e32 v15, v15, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -70553,9 +70577,8 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_writelane_b32 v43, s87, 29
; SI-NEXT: v_writelane_b32 v43, s96, 30
; SI-NEXT: v_writelane_b32 v43, s97, 31
-; SI-NEXT: v_writelane_b32 v43, s98, 32
-; SI-NEXT: v_writelane_b32 v43, s30, 33
-; SI-NEXT: v_writelane_b32 v43, s31, 34
+; SI-NEXT: v_writelane_b32 v43, s30, 32
+; SI-NEXT: v_writelane_b32 v43, s31, 33
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:72
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:68
@@ -70581,10 +70604,10 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32
; SI-NEXT: v_readfirstlane_b32 s7, v1
; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane
-; SI-NEXT: v_readfirstlane_b32 s88, v0
+; SI-NEXT: v_readfirstlane_b32 s78, v0
; SI-NEXT: v_writelane_b32 v44, s7, 0
; SI-NEXT: v_readfirstlane_b32 s9, v9
-; SI-NEXT: v_writelane_b32 v44, s88, 1
+; SI-NEXT: v_writelane_b32 v44, s78, 1
; SI-NEXT: v_readfirstlane_b32 s72, v8
; SI-NEXT: v_writelane_b32 v44, s9, 2
; SI-NEXT: v_readfirstlane_b32 s74, v7
@@ -70601,6 +70624,7 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_writelane_b32 v44, s11, 8
; SI-NEXT: v_readfirstlane_b32 s60, v2
; SI-NEXT: v_writelane_b32 v44, s58, 9
+; SI-NEXT: v_writelane_b32 v44, s60, 10
; SI-NEXT: v_readfirstlane_b32 s63, v30
; SI-NEXT: v_readfirstlane_b32 s52, v29
; SI-NEXT: v_readfirstlane_b32 s51, v28
@@ -70621,7 +70645,6 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s61, v11
; SI-NEXT: v_readfirstlane_b32 s36, v10
; SI-NEXT: v_readfirstlane_b32 s45, v3
-; SI-NEXT: v_writelane_b32 v44, s60, 10
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
@@ -70632,10 +70655,9 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s13, v36
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_readfirstlane_b32 s15, v37
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s5, v38
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_readfirstlane_b32 s76, v39
+; SI-NEXT: v_readfirstlane_b32 s5, v38
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_readfirstlane_b32 s31, v48
; SI-NEXT: s_waitcnt vmcnt(9)
@@ -70655,10 +70677,11 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_readfirstlane_b32 s55, v40
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s81, v41
+; SI-NEXT: v_readfirstlane_b32 s80, v41
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_readfirstlane_b32 s64, v42
; SI-NEXT: v_writelane_b32 v44, s76, 11
+; SI-NEXT: v_writelane_b32 v44, s5, 12
; SI-NEXT: s_cbranch_scc0 .LBB99_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xff
@@ -70675,99 +70698,94 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s62, s27, 24
; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_and_b32 s77, s77, 0xff
+; SI-NEXT: s_lshl_b32 s74, s74, 8
+; SI-NEXT: s_and_b32 s72, s72, 0xff
; SI-NEXT: s_or_b32 s6, s62, s6
; SI-NEXT: s_and_b32 s60, s60, 0xff
; SI-NEXT: s_lshl_b32 s62, s45, 8
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
-; SI-NEXT: s_or_b32 s78, s60, s62
+; SI-NEXT: s_or_b32 s74, s77, s74
+; SI-NEXT: s_lshl_b32 s72, s72, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 24
+; SI-NEXT: s_or_b32 vcc_hi, s60, s62
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: s_and_b32 s10, s36, 0xff
; SI-NEXT: s_lshl_b32 s60, s61, 8
-; SI-NEXT: s_or_b32 vcc_hi, s10, s60
+; SI-NEXT: s_and_b32 s74, s74, 0xffff
+; SI-NEXT: s_or_b32 s84, s9, s72
+; SI-NEXT: s_or_b32 s67, s10, s60
; SI-NEXT: s_and_b32 s10, s59, 0xff
+; SI-NEXT: s_or_b32 s9, s74, s84
+; SI-NEXT: s_and_b32 s72, s57, 0xff
+; SI-NEXT: s_lshl_b32 s74, s47, 8
+; SI-NEXT: s_and_b32 s58, s58, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s60, s30, 24
-; SI-NEXT: s_and_b32 s77, s77, 0xff
-; SI-NEXT: s_lshl_b32 s74, s74, 8
-; SI-NEXT: s_and_b32 s72, s72, 0xff
+; SI-NEXT: s_or_b32 s72, s72, s74
+; SI-NEXT: s_lshl_b32 s58, s58, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: s_or_b32 s10, s60, s10
; SI-NEXT: s_and_b32 s60, s50, 0xff
; SI-NEXT: s_lshl_b32 s62, s49, 8
-; SI-NEXT: s_or_b32 s74, s77, s74
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s67, s60, s62
+; SI-NEXT: s_and_b32 s72, s72, 0xffff
+; SI-NEXT: s_or_b32 s85, s11, s58
+; SI-NEXT: s_or_b32 s70, s60, s62
; SI-NEXT: s_and_b32 s60, s39, 0xff
-; SI-NEXT: s_and_b32 s74, s74, 0xffff
-; SI-NEXT: s_or_b32 s85, s9, s72
+; SI-NEXT: s_or_b32 s11, s72, s85
+; SI-NEXT: s_and_b32 s58, s38, 0xff
+; SI-NEXT: s_lshl_b32 s72, s37, 8
; SI-NEXT: s_lshl_b32 s60, s60, 16
; SI-NEXT: s_lshl_b32 s62, s48, 24
-; SI-NEXT: s_or_b32 s9, s74, s85
-; SI-NEXT: s_and_b32 s72, s57, 0xff
-; SI-NEXT: s_lshl_b32 s74, s47, 8
-; SI-NEXT: s_and_b32 s58, s58, 0xff
+; SI-NEXT: s_or_b32 s58, s58, s72
+; SI-NEXT: s_and_b32 s72, s34, 0xff
; SI-NEXT: s_or_b32 s60, s62, s60
; SI-NEXT: s_and_b32 s62, s54, 0xff
; SI-NEXT: s_lshl_b32 s79, s53, 8
-; SI-NEXT: s_or_b32 s72, s72, s74
-; SI-NEXT: s_lshl_b32 s58, s58, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s80, s62, s79
+; SI-NEXT: s_lshl_b32 s72, s72, 16
+; SI-NEXT: s_lshl_b32 s74, s35, 24
+; SI-NEXT: s_or_b32 s71, s62, s79
; SI-NEXT: s_and_b32 s62, s51, 0xff
-; SI-NEXT: s_and_b32 s72, s72, 0xffff
-; SI-NEXT: s_or_b32 s86, s11, s58
-; SI-NEXT: s_lshl_b32 s62, s62, 16
-; SI-NEXT: s_lshl_b32 s79, s52, 24
-; SI-NEXT: s_or_b32 s11, s72, s86
-; SI-NEXT: s_and_b32 s58, s38, 0xff
-; SI-NEXT: s_lshl_b32 s72, s37, 8
-; SI-NEXT: s_or_b32 s62, s79, s62
-; SI-NEXT: s_and_b32 s79, s66, 0xff
-; SI-NEXT: s_lshl_b32 s89, s65, 8
-; SI-NEXT: s_or_b32 s58, s58, s72
-; SI-NEXT: s_and_b32 s72, s34, 0xff
-; SI-NEXT: s_or_b32 s82, s79, s89
; SI-NEXT: s_and_b32 s76, s76, 0xff
-; SI-NEXT: s_mov_b32 s79, s5
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: s_lshl_b32 s74, s35, 24
-; SI-NEXT: s_or_b32 s83, s76, s5
+; SI-NEXT: s_and_b32 s58, s58, 0xffff
+; SI-NEXT: s_or_b32 s86, s74, s72
+; SI-NEXT: s_lshl_b32 s62, s62, 16
+; SI-NEXT: s_lshl_b32 s79, s52, 24
+; SI-NEXT: s_or_b32 s82, s76, s5
; SI-NEXT: s_and_b32 s5, s20, 0xff
; SI-NEXT: s_lshl_b32 s76, s21, 8
-; SI-NEXT: s_and_b32 s58, s58, 0xffff
-; SI-NEXT: s_or_b32 s87, s74, s72
-; SI-NEXT: s_or_b32 s5, s5, s76
-; SI-NEXT: s_and_b32 s76, s22, 0xff
; SI-NEXT: s_mov_b32 s72, s61
-; SI-NEXT: s_or_b32 s61, s58, s87
+; SI-NEXT: s_or_b32 s61, s58, s86
; SI-NEXT: s_and_b32 s58, s63, 0xff
; SI-NEXT: s_lshl_b32 s74, s64, 8
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s89, s23, 24
+; SI-NEXT: s_or_b32 s62, s79, s62
+; SI-NEXT: s_and_b32 s79, s66, 0xff
+; SI-NEXT: s_lshl_b32 s88, s65, 8
+; SI-NEXT: s_or_b32 s5, s5, s76
+; SI-NEXT: s_and_b32 s76, s22, 0xff
; SI-NEXT: s_or_b32 s58, s58, s74
-; SI-NEXT: s_and_b32 s74, s81, 0xff
-; SI-NEXT: s_or_b32 s76, s89, s76
-; SI-NEXT: s_and_b32 s89, s28, 0xff
-; SI-NEXT: s_lshl_b32 s90, s29, 8
-; SI-NEXT: s_and_b32 s88, s88, 0xff
+; SI-NEXT: s_and_b32 s74, s80, 0xff
+; SI-NEXT: s_or_b32 s81, s79, s88
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: s_lshl_b32 s79, s23, 24
; SI-NEXT: s_lshl_b32 s74, s74, 16
; SI-NEXT: s_lshl_b32 s77, s55, 24
; SI-NEXT: s_mov_b32 s92, s14
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_or_b32 s89, s89, s90
-; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_or_b32 s76, s79, s76
+; SI-NEXT: s_and_b32 s79, s28, 0xff
+; SI-NEXT: s_lshl_b32 s88, s29, 8
; SI-NEXT: s_and_b32 s58, s58, 0xffff
-; SI-NEXT: s_or_b32 s96, s77, s74
+; SI-NEXT: s_or_b32 s87, s77, s74
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_mov_b32 s94, s12
; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: s_and_b32 s89, s89, 0xffff
-; SI-NEXT: s_or_b32 s84, s7, s88
+; SI-NEXT: s_or_b32 s79, s79, s88
+; SI-NEXT: s_and_b32 s78, s78, 0xff
; SI-NEXT: s_mov_b32 s74, s63
-; SI-NEXT: s_or_b32 s63, s58, s96
+; SI-NEXT: s_or_b32 s63, s58, s87
; SI-NEXT: s_mov_b32 s88, s56
; SI-NEXT: s_and_b32 s56, s56, 0xff
; SI-NEXT: s_lshl_b32 s58, s75, 8
@@ -70775,9 +70793,10 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_and_b32 s41, s41, 0xff
; SI-NEXT: s_mov_b32 s93, s40
; SI-NEXT: s_lshl_b32 s40, s40, 8
-; SI-NEXT: s_or_b32 s98, s12, s14
+; SI-NEXT: s_or_b32 s97, s12, s14
; SI-NEXT: s_and_b32 s12, s15, 0xff
-; SI-NEXT: s_or_b32 s7, s89, s84
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_or_b32 s56, s56, s58
; SI-NEXT: s_and_b32 s58, s73, 0xff
; SI-NEXT: s_mov_b32 s89, s46
@@ -70787,30 +70806,33 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_mov_b32 vcc_lo, s13
; SI-NEXT: s_lshl_b32 s13, s13, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_and_b32 s79, s79, 0xffff
+; SI-NEXT: s_or_b32 s83, s7, s78
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_lshl_b32 s77, s31, 24
; SI-NEXT: s_lshl_b32 s46, s46, 16
; SI-NEXT: s_mov_b32 s90, s44
; SI-NEXT: s_lshl_b32 s44, s44, 24
-; SI-NEXT: s_or_b32 s70, s13, s12
+; SI-NEXT: s_or_b32 s68, s13, s12
; SI-NEXT: s_and_b32 s12, s40, 0xffff
; SI-NEXT: s_or_b32 s5, s5, s76
-; SI-NEXT: s_or_b32 s97, s77, s58
-; SI-NEXT: s_or_b32 s68, s44, s46
+; SI-NEXT: s_or_b32 s7, s79, s83
+; SI-NEXT: s_or_b32 s96, s77, s58
+; SI-NEXT: s_or_b32 s78, s44, s46
; SI-NEXT: s_and_b32 s44, s56, 0xffff
-; SI-NEXT: s_or_b32 s71, s12, s98
+; SI-NEXT: s_or_b32 s69, s12, s97
; SI-NEXT: s_and_b32 s12, s42, 0xffff
-; SI-NEXT: s_or_b32 s69, s44, s97
+; SI-NEXT: s_or_b32 s79, s44, s96
; SI-NEXT: s_or_b32 s42, s12, s4
; SI-NEXT: s_mov_b32 s12, s45
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_mov_b32 s4, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: s_and_b32 s13, s43, 0xffff
-; SI-NEXT: s_and_b32 s14, s78, 0xffff
-; SI-NEXT: s_and_b32 s58, vcc_hi, 0xffff
-; SI-NEXT: s_and_b32 s77, s67, 0xffff
-; SI-NEXT: s_and_b32 s78, s80, 0xffff
+; SI-NEXT: s_and_b32 s14, vcc_hi, 0xffff
+; SI-NEXT: s_and_b32 s58, s67, 0xffff
+; SI-NEXT: s_and_b32 s77, s70, 0xffff
+; SI-NEXT: s_and_b32 vcc_hi, s71, 0xffff
; SI-NEXT: s_mov_b32 s47, s4
; SI-NEXT: s_mov_b32 s4, s57
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
@@ -70827,38 +70849,37 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_or_b32 s10, s77, s60
; SI-NEXT: s_mov_b32 s11, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: s_or_b32 s8, s78, s62
+; SI-NEXT: s_or_b32 s8, vcc_hi, s62
; SI-NEXT: s_mov_b32 s9, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
-; SI-NEXT: s_and_b32 vcc_hi, s82, 0xffff
-; SI-NEXT: s_and_b32 s67, s83, 0xffff
+; SI-NEXT: s_and_b32 s67, s81, 0xffff
+; SI-NEXT: s_and_b32 s70, s82, 0xffff
; SI-NEXT: s_mov_b32 s59, s4
; SI-NEXT: s_mov_b32 s61, s72
; SI-NEXT: s_mov_b32 s63, s74
; SI-NEXT: s_mov_b32 s4, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[68:69], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[78:79], 16
; SI-NEXT: s_mov_b32 s77, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[70:71], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[68:69], 16
; SI-NEXT: s_mov_b32 s43, s5
; SI-NEXT: s_mov_b32 s41, s7
-; SI-NEXT: s_or_b32 s6, vcc_hi, s68
-; SI-NEXT: s_mov_b32 s7, s69
+; SI-NEXT: s_or_b32 s6, s67, s78
+; SI-NEXT: s_mov_b32 s7, s79
; SI-NEXT: s_mov_b32 s73, s4
-; SI-NEXT: s_or_b32 s4, s67, s70
-; SI-NEXT: s_mov_b32 s5, s71
+; SI-NEXT: s_or_b32 s4, s70, s68
+; SI-NEXT: s_mov_b32 s5, s69
; SI-NEXT: s_mov_b32 s75, s77
-; SI-NEXT: s_lshr_b32 s70, s76, 16
-; SI-NEXT: s_lshr_b32 s69, s84, 16
+; SI-NEXT: s_lshr_b32 s69, s76, 16
+; SI-NEXT: s_lshr_b32 s68, s83, 16
+; SI-NEXT: s_lshr_b32 s79, s84, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s85, 16
-; SI-NEXT: s_lshr_b32 s68, s86, 16
-; SI-NEXT: s_lshr_b32 s78, s87, 16
-; SI-NEXT: s_lshr_b32 s67, s96, 16
+; SI-NEXT: s_lshr_b32 s78, s86, 16
+; SI-NEXT: s_lshr_b32 s67, s87, 16
+; SI-NEXT: s_lshr_b32 s70, s96, 16
; SI-NEXT: s_lshr_b32 s71, s97, 16
-; SI-NEXT: s_lshr_b32 s80, s98, 16
; SI-NEXT: s_mov_b64 s[76:77], 0
; SI-NEXT: s_branch .LBB99_3
; SI-NEXT: .LBB99_2:
-; SI-NEXT: s_mov_b32 s79, s5
; SI-NEXT: s_mov_b32 vcc_lo, s13
; SI-NEXT: s_mov_b32 s95, s15
; SI-NEXT: s_mov_b32 s91, s41
@@ -70871,16 +70892,16 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_mov_b64 s[76:77], -1
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr78
@@ -70889,10 +70910,10 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: .LBB99_3: ; %Flow
; SI-NEXT: s_and_b64 s[76:77], s[76:77], exec
; SI-NEXT: s_cselect_b32 s76, 1, 0
@@ -70901,10 +70922,11 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_readlane_b32 s4, v44, 11
; SI-NEXT: s_add_i32 s4, s4, 3
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s79, 8
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v44, 12
+; SI-NEXT: s_lshl_b32 s4, s4, 8
; SI-NEXT: s_add_i32 s6, s95, 3
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 24
@@ -70963,9 +70985,9 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_add_i32 s9, s63, 3
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s10, s64, 8
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s11, s81, 0xff
+; SI-NEXT: s_and_b32 s11, s80, 0xff
; SI-NEXT: s_addk_i32 s9, 0x300
; SI-NEXT: s_lshl_b32 s10, s55, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
@@ -71127,14 +71149,14 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s70, s43, 16
-; SI-NEXT: s_lshr_b32 s69, s41, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s68, s13, 16
+; SI-NEXT: s_lshr_b32 s69, s43, 16
+; SI-NEXT: s_lshr_b32 s68, s41, 16
+; SI-NEXT: s_lshr_b32 s79, s15, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s13, 16
; SI-NEXT: s_lshr_b32 s78, s11, 16
; SI-NEXT: s_lshr_b32 s67, s9, 16
-; SI-NEXT: s_lshr_b32 s71, s7, 16
-; SI-NEXT: s_lshr_b32 s80, s5, 16
+; SI-NEXT: s_lshr_b32 s70, s7, 16
+; SI-NEXT: s_lshr_b32 s71, s5, 16
; SI-NEXT: .LBB99_5: ; %end
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
@@ -71143,25 +71165,25 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s17, s44, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s70, 16
+; SI-NEXT: s_lshl_b32 s18, s69, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s40, 0xffff
; SI-NEXT: s_lshl_b32 s19, s46, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s69, 16
+; SI-NEXT: s_lshl_b32 s20, s68, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s20, s56, 16
; SI-NEXT: s_or_b32 s14, s14, s20
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s20, s79, 16
; SI-NEXT: s_or_b32 s15, s15, s20
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s20, s58, 16
; SI-NEXT: s_or_b32 s12, s12, s20
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s68, 16
+; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
; SI-NEXT: s_or_b32 s13, s13, s20
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s20, s60, 16
@@ -71179,15 +71201,15 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s20, s72, 16
; SI-NEXT: s_or_b32 s6, s6, s20
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s71, 16
+; SI-NEXT: s_lshl_b32 s20, s70, 16
; SI-NEXT: s_or_b32 s7, s7, s20
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s20, s74, 16
; SI-NEXT: s_or_b32 s4, s4, s20
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s80, 16
+; SI-NEXT: s_lshl_b32 s20, s71, 16
; SI-NEXT: s_or_b32 s5, s5, s20
-; SI-NEXT: v_readlane_b32 s30, v43, 33
+; SI-NEXT: v_readlane_b32 s30, v43, 32
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -71204,8 +71226,7 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v13, s7
; SI-NEXT: v_mov_b32_e32 v14, s4
; SI-NEXT: v_mov_b32_e32 v15, s5
-; SI-NEXT: v_readlane_b32 s31, v43, 34
-; SI-NEXT: v_readlane_b32 s98, v43, 32
+; SI-NEXT: v_readlane_b32 s31, v43, 33
; SI-NEXT: v_readlane_b32 s97, v43, 31
; SI-NEXT: v_readlane_b32 s96, v43, 30
; SI-NEXT: v_readlane_b32 s87, v43, 29
@@ -72442,7 +72463,7 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v0
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr19
@@ -72473,15 +72494,15 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB100_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v54
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v40
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v41
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v2
@@ -72509,9 +72530,9 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v61
; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v62
; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v63
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
@@ -72528,7 +72549,7 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr43
@@ -72590,7 +72611,7 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v16, v56
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v17, v54
+; SI-NEXT: v_cvt_f32_f16_e32 v17, v40
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v32, v16
; SI-NEXT: v_cvt_f32_f16_e32 v16, v47
@@ -72673,11 +72694,27 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v15
; SI-NEXT: .LBB100_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v19
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v16
@@ -72734,27 +72771,11 @@ define <32 x bfloat> @bitcast_v32f16_to_v32bf16(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_mul_f32_e32 v14, 1.0, v48
; SI-NEXT: v_alignbit_b32 v13, v13, v14, 16
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v55
+; SI-NEXT: v_mul_f32_e32 v14, 1.0, v54
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_mul_f32_e32 v15, 1.0, v50
; SI-NEXT: v_alignbit_b32 v14, v14, v15, 16
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v40
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v15, 1.0, v55
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: v_mul_f32_e32 v16, 1.0, v52
; SI-NEXT: v_alignbit_b32 v15, v15, v16, 16
@@ -73009,132 +73030,132 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg %
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB101_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s42
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s63
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s60
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v8, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s41
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s27
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s40
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s26
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s15
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v13, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s25
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v14, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s14
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v15, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s24
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v16, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s13
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v17, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s23
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v18, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s12
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s22
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s11
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s10
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s20
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s9
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f32_f16_e32 v2, s59
; SI-NEXT: v_cvt_f32_f16_e32 v3, s56
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s43
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s29
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s19
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v27, s18
-; SI-NEXT: v_cvt_f32_f16_e32 v28, s7
-; SI-NEXT: v_cvt_f32_f16_e32 v29, s17
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s18
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s63
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v8, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s43
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v9, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v10, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s42
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s28
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v12, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s41
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s27
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v14, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s40
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v15, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s26
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s15
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v17, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s25
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s14
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s24
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s13
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s23
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s12
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s22
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s11
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s21
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s10
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s20
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s9
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s19
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s8
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s60
+; SI-NEXT: v_cvt_f16_f32_e32 v6, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v5, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_cvt_f32_f16_e32 v30, s6
; SI-NEXT: v_cvt_f32_f16_e32 v31, s16
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v30
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v10
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v9
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v34, v2
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v30
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v0
; SI-NEXT: s_branch .LBB101_6
@@ -73165,23 +73186,23 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg %
; SI-NEXT: v_mov_b32_e32 v30, s72
; SI-NEXT: v_mov_b32_e32 v7, s62
; SI-NEXT: v_mov_b32_e32 v6, s61
-; SI-NEXT: v_mov_b32_e32 v33, s58
-; SI-NEXT: v_mov_b32_e32 v32, s57
-; SI-NEXT: v_mov_b32_e32 v35, s47
-; SI-NEXT: v_mov_b32_e32 v34, s46
-; SI-NEXT: v_mov_b32_e32 v37, s45
-; SI-NEXT: v_mov_b32_e32 v36, s44
+; SI-NEXT: v_mov_b32_e32 v5, s58
+; SI-NEXT: v_mov_b32_e32 v4, s57
+; SI-NEXT: v_mov_b32_e32 v3, s47
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_mov_b32_e32 v33, s45
+; SI-NEXT: v_mov_b32_e32 v32, s44
; SI-NEXT: .LBB101_6: ; %end
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v37
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v36
-; SI-NEXT: v_mul_f32_e32 v2, 1.0, v35
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e32 v2, 1.0, v34
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v33
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v32
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
@@ -73561,12 +73582,12 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
-; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31
+; SI-NEXT: v_mul_f32_e32 v32, 1.0, v31
; SI-NEXT: v_mul_f32_e32 v33, 1.0, v1
-; SI-NEXT: v_mul_f32_e32 v47, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v47, 1.0, v34
; SI-NEXT: v_mul_f32_e32 v34, 1.0, v29
; SI-NEXT: v_mul_f32_e32 v35, 1.0, v3
; SI-NEXT: v_mul_f32_e32 v46, 1.0, v30
@@ -73626,14 +73647,14 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB102_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32
; SI-NEXT: v_alignbit_b32 v23, v1, v33, 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v47
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v34
@@ -73664,7 +73685,7 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v30, v14, v0, 16
; SI-NEXT: v_alignbit_b32 v16, v15, v45, 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v53
-; SI-NEXT: v_alignbit_b32 v32, v16, v0, 16
+; SI-NEXT: v_alignbit_b32 v31, v16, v0, 16
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v46
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v44
@@ -73681,7 +73702,7 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v10, v10, v58, 16
; SI-NEXT: v_alignbit_b32 v12, v12, v57, 16
; SI-NEXT: v_alignbit_b32 v18, v18, v56, 16
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr34
@@ -73770,7 +73791,7 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v52
; SI-NEXT: v_alignbit_b32 v16, v15, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54
@@ -73816,7 +73837,7 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v33
; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v31
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_alignbit_b32 v23, v1, v23, 16
@@ -73828,7 +73849,7 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v28, v19, v28, 16
; SI-NEXT: v_alignbit_b32 v29, v17, v29, 16
; SI-NEXT: v_alignbit_b32 v30, v14, v30, 16
-; SI-NEXT: v_alignbit_b32 v32, v16, v32, 16
+; SI-NEXT: v_alignbit_b32 v31, v16, v31, 16
; SI-NEXT: .LBB102_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -73884,7 +73905,7 @@ define <32 x half> @bitcast_v32bf16_to_v32f16(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v12, v12, v17
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v31
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v0, v0, v24
@@ -75081,190 +75102,199 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: v_readfirstlane_b32 s46, v2
; SI-NEXT: s_cmp_lg_u32 s46, 0
; SI-NEXT: v_mul_f32_e64 v40, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s14
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s28
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s14
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v63, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s45
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s23
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s42
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s44
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB103_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v59, v12
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v51
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v10
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v17
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v23
-; SI-NEXT: v_lshr_b64 v[24:25], v[36:37], 16
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v29
-; SI-NEXT: v_mov_b32_e32 v47, v23
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v50
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v44
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v52, v8
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v40
-; SI-NEXT: v_lshr_b64 v[22:23], v[23:24], 16
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v17
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v42
+; SI-NEXT: v_lshr_b64 v[1:2], v[61:62], 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v49
+; SI-NEXT: v_mov_b32_e32 v60, v23
+; SI-NEXT: v_mov_b32_e32 v2, v33
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v59
+; SI-NEXT: v_mov_b32_e32 v13, v12
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v39
+; SI-NEXT: v_lshr_b64 v[4:5], v[34:35], 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v58
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v58
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v36
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v36
+; SI-NEXT: v_mov_b32_e32 v43, v55
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v37
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v63
+; SI-NEXT: v_mov_b32_e32 v26, v62
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v63
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v40
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v55
-; SI-NEXT: v_mov_b32_e32 v25, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v21
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v31
-; SI-NEXT: v_mov_b32_e32 v23, v47
-; SI-NEXT: v_lshr_b64 v[46:47], v[45:46], 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v33
-; SI-NEXT: v_lshr_b64 v[27:28], v[48:49], 16
-; SI-NEXT: v_mov_b32_e32 v56, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v13
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v50
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
-; SI-NEXT: v_mov_b32_e32 v13, v60
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v30
-; SI-NEXT: v_mov_b32_e32 v62, v44
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v33
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v30
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v21
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_lshr_b64 v[1:2], v[6:7], 16
-; SI-NEXT: v_lshr_b64 v[7:8], v[38:39], 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v31
+; SI-NEXT: v_lshr_b64 v[21:22], v[10:11], 16
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v23
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_lshr_b64 v[2:3], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v33
+; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16
; SI-NEXT: v_mov_b32_e32 v12, v59
; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
-; SI-NEXT: v_lshr_b64 v[59:60], v[10:11], 16
-; SI-NEXT: v_mov_b32_e32 v19, v50
-; SI-NEXT: v_mov_b32_e32 v50, v29
-; SI-NEXT: v_mov_b32_e32 v29, v21
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v9
-; SI-NEXT: v_mov_b32_e32 v3, v9
+; SI-NEXT: v_lshr_b64 v[18:19], v[15:16], 16
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshr_b64 v[15:16], v[20:21], 16
+; SI-NEXT: v_lshr_b64 v[19:20], v[17:18], 16
+; SI-NEXT: v_mov_b32_e32 v17, v38
+; SI-NEXT: v_lshr_b64 v[24:25], v[9:10], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v49
+; SI-NEXT: v_lshr_b64 v[22:23], v[23:24], 16
+; SI-NEXT: v_lshr_b64 v[58:59], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v23, v60
+; SI-NEXT: v_mov_b32_e32 v25, v61
+; SI-NEXT: v_mov_b32_e32 v61, v42
+; SI-NEXT: v_mov_b32_e32 v62, v26
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[32:33], v[8:9], 16
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mov_b32_e32 v8, v52
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v9, v53
; SI-NEXT: v_lshr_b64 v[52:53], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[60:61], v[14:15], 16
-; SI-NEXT: v_lshr_b64 v[53:54], v[26:27], 16
-; SI-NEXT: v_mov_b32_e32 v10, v25
-; SI-NEXT: v_lshr_b64 v[16:17], v[17:18], 16
-; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v0, v50
+; SI-NEXT: v_lshr_b64 v[50:51], v[50:51], 16
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[50:51], v[56:57], 16
+; SI-NEXT: v_mov_b32_e32 v33, v2
+; SI-NEXT: v_lshr_b64 v[59:60], v[31:32], 16
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v33
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[50:51], v[45:46], 16
; SI-NEXT: v_mov_b32_e32 v46, v5
-; SI-NEXT: v_lshr_b64 v[5:6], v[43:44], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[41:42], 16
-; SI-NEXT: v_mov_b32_e32 v0, v43
-; SI-NEXT: v_lshr_b64 v[42:43], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v17, v56
-; SI-NEXT: v_mov_b32_e32 v56, v60
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v47, v59
-; SI-NEXT: v_mov_b32_e32 v28, v52
-; SI-NEXT: v_mov_b32_e32 v44, v62
-; SI-NEXT: v_lshr_b64 v[62:63], v[12:13], 16
+; SI-NEXT: v_lshr_b64 v[5:6], v[54:55], 16
+; SI-NEXT: v_mov_b32_e32 v16, v59
+; SI-NEXT: v_mov_b32_e32 v57, v58
+; SI-NEXT: v_mov_b32_e32 v38, v52
+; SI-NEXT: v_lshr_b64 v[52:53], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v42, v61
; SI-NEXT: v_lshr_b64 v[60:61], v[8:9], 16
-; SI-NEXT: v_mov_b32_e32 v9, v3
-; SI-NEXT: v_lshr_b64 v[58:59], v[57:58], 16
-; SI-NEXT: v_mov_b32_e32 v3, v34
-; SI-NEXT: v_lshr_b64 v[13:14], v[34:35], 16
-; SI-NEXT: v_mov_b32_e32 v26, v20
-; SI-NEXT: v_mov_b32_e32 v21, v29
-; SI-NEXT: v_mov_b32_e32 v29, v50
-; SI-NEXT: v_mov_b32_e32 v50, v19
-; SI-NEXT: v_mov_b32_e32 v43, v0
+; SI-NEXT: v_lshr_b64 v[58:59], v[47:48], 16
+; SI-NEXT: v_lshr_b64 v[2:3], v[3:4], 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v55, v43
+; SI-NEXT: v_mov_b32_e32 v61, v25
+; SI-NEXT: v_lshr_b64 v[30:31], v[29:30], 16
+; SI-NEXT: v_mov_b32_e32 v59, v12
+; SI-NEXT: v_mov_b32_e32 v12, v13
; SI-NEXT: s_branch .LBB103_3
; SI-NEXT: .LBB103_2:
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v3, v34
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v26, v20
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_mov_b32_e32 v0, v50
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: .LBB103_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB103_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v40
-; SI-NEXT: v_mov_b32_e32 v14, v3
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3
@@ -75272,219 +75302,223 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; SI-NEXT: v_lshr_b64 v[45:46], v[1:2], 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41
+; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v45
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v30
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12
-; SI-NEXT: v_lshr_b64 v[52:53], v[4:5], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v54
+; SI-NEXT: v_lshr_b64 v[50:51], v[4:5], 16
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; SI-NEXT: v_lshr_b64 v[62:63], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v50
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v8
+; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v41
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v6
-; SI-NEXT: v_lshr_b64 v[60:61], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v21
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v57
+; SI-NEXT: v_lshr_b64 v[52:53], v[4:5], 16
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v7
-; SI-NEXT: v_lshr_b64 v[58:59], v[4:5], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_mov_b32_e32 v15, v61
+; SI-NEXT: v_lshr_b64 v[60:61], v[4:5], 16
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v47
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v5
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v8
-; SI-NEXT: v_lshr_b64 v[13:14], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v9
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v26
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v5
+; SI-NEXT: v_lshr_b64 v[9:10], v[4:5], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v9
-; SI-NEXT: v_lshr_b64 v[42:43], v[4:5], 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v10
+; SI-NEXT: v_lshr_b64 v[30:31], v[4:5], 16
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v9
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v1
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v10
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v44
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v4
-; SI-NEXT: v_mov_b32_e32 v4, v12
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[15:16], v[11:12], 16
-; SI-NEXT: v_lshr_b64 v[56:57], v[14:15], 16
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v4
-; SI-NEXT: v_mov_b32_e32 v4, v12
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v4
+; SI-NEXT: v_mov_b32_e32 v4, v11
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[18:19], v[10:11], 16
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v8
-; SI-NEXT: v_lshr_b64 v[18:19], v[11:12], 16
-; SI-NEXT: v_lshr_b64 v[16:17], v[17:18], 16
+; SI-NEXT: v_lshr_b64 v[32:33], v[13:14], 16
+; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16
+; SI-NEXT: v_lshr_b64 v[57:58], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v58, v9
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; SI-NEXT: v_mov_b32_e32 v4, v9
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; SI-NEXT: v_mov_b32_e32 v4, v8
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v36
-; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v23
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
-; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v55
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v38
-; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v29
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v4
-; SI-NEXT: v_lshr_b64 v[11:12], v[8:9], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
-; SI-NEXT: v_lshr_b64 v[7:8], v[38:39], 16
-; SI-NEXT: v_lshr_b64 v[24:25], v[36:37], 16
-; SI-NEXT: v_lshr_b64 v[27:28], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[46:47], v[6:7], 16
-; SI-NEXT: v_lshr_b64 v[53:54], v[26:27], 16
-; SI-NEXT: v_lshr_b64 v[22:23], v[23:24], 16
-; SI-NEXT: v_lshr_b64 v[47:48], v[10:11], 16
-; SI-NEXT: v_mov_b32_e32 v25, v52
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; SI-NEXT: v_lshr_b64 v[24:25], v[7:8], 16
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; SI-NEXT: v_mov_b32_e32 v1, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v55
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; SI-NEXT: v_mov_b32_e32 v4, v6
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[7:8], v[5:6], 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[4:5], 16
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v2
+; SI-NEXT: v_lshr_b64 v[46:47], v[6:7], 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v4
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; SI-NEXT: v_mov_b32_e32 v2, v5
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mov_b32_e32 v5, v45
+; SI-NEXT: v_lshr_b64 v[21:22], v[4:5], 16
+; SI-NEXT: v_lshr_b64 v[22:23], v[23:24], 16
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v1
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v61, 0x40c00000, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v42
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v1
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[1:2], v[61:62], 16
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v59
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; SI-NEXT: v_lshr_b64 v[4:5], v[34:35], 16
+; SI-NEXT: v_lshr_b64 v[15:16], v[20:21], 16
; SI-NEXT: v_lshr_b64 v[2:3], v[3:4], 16
-; SI-NEXT: v_lshr_b64 v[28:29], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[19:20], v[17:18], 16
+; SI-NEXT: v_lshr_b64 v[16:17], v[31:32], 16
; SI-NEXT: .LBB103_5: ; %end
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v1
-; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v15
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v47
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v57
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; SI-NEXT: v_or_b32_e32 v1, v3, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v28
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v9
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v53
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v25
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v50
; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v27
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v62
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v46
; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v60
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v22
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v58
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v60
; SI-NEXT: v_or_b32_e32 v10, v10, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v28
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v12, v12, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v56
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v58
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -75501,6 +75535,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v12, v12, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v13, v13, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v30
; SI-NEXT: v_or_b32_e32 v14, v14, v16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
@@ -78050,9 +78088,9 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; implicit-def: $vgpr30
+; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -78063,7 +78101,7 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB104_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -78071,10 +78109,10 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -78110,8 +78148,10 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; GFX9-NEXT: v_mov_b32_e32 v26, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; GFX9-NEXT: .LBB104_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB104_4
@@ -78141,10 +78181,10 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -78245,10 +78285,10 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v30, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v29, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v29, v28, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v28, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -78740,17 +78780,16 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_writelane_b32 v18, s54, 12
; SI-NEXT: v_writelane_b32 v18, s55, 13
; SI-NEXT: v_writelane_b32 v18, s64, 14
-; SI-NEXT: v_writelane_b32 v18, s65, 15
-; SI-NEXT: v_writelane_b32 v18, s30, 16
-; SI-NEXT: v_writelane_b32 v18, s31, 17
-; SI-NEXT: v_readfirstlane_b32 s38, v2
-; SI-NEXT: v_readfirstlane_b32 s48, v1
-; SI-NEXT: s_lshr_b32 s44, s29, 16
+; SI-NEXT: v_writelane_b32 v18, s30, 15
+; SI-NEXT: v_writelane_b32 v18, s31, 16
+; SI-NEXT: v_readfirstlane_b32 s37, v2
+; SI-NEXT: v_readfirstlane_b32 s39, v1
+; SI-NEXT: s_lshr_b32 s88, s29, 16
; SI-NEXT: s_lshr_b32 s6, s28, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; SI-NEXT: s_lshr_b32 s31, s26, 16
+; SI-NEXT: s_lshr_b32 s31, s27, 16
+; SI-NEXT: s_lshr_b32 s7, s26, 16
; SI-NEXT: s_lshr_b32 s75, s25, 16
-; SI-NEXT: s_lshr_b32 s37, s24, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s24, 16
; SI-NEXT: s_lshr_b32 s63, s23, 16
; SI-NEXT: s_lshr_b32 s73, s22, 16
; SI-NEXT: s_lshr_b32 s59, s21, 16
@@ -78759,8 +78798,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshr_b32 s57, s18, 16
; SI-NEXT: s_lshr_b32 s45, s17, 16
; SI-NEXT: s_lshr_b32 s47, s16, 16
-; SI-NEXT: s_lshr_b32 s39, s38, 16
-; SI-NEXT: s_lshr_b32 s49, s48, 16
+; SI-NEXT: s_lshr_b32 s38, s37, 16
+; SI-NEXT: s_lshr_b32 s48, s39, 16
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: ; implicit-def: $vgpr19 : SGPR spill to VGPR lane
@@ -78819,40 +78858,42 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s11, s4, s5
; SI-NEXT: s_lshr_b64 s[4:5], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v19, s4, 20
+; SI-NEXT: v_writelane_b32 v19, s5, 21
+; SI-NEXT: s_lshr_b64 s[4:5], s[10:11], 16
; SI-NEXT: v_writelane_b32 v19, s4, 18
; SI-NEXT: v_writelane_b32 v19, s5, 19
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s37, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s75, 16
; SI-NEXT: s_or_b32 s13, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s8, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
-; SI-NEXT: s_mov_b32 s76, s6
+; SI-NEXT: s_mov_b32 s78, s6
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s44, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_mov_b32 s76, s7
; SI-NEXT: s_or_b32 s7, s4, s5
-; SI-NEXT: s_and_b32 s4, s48, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s49, 16
+; SI-NEXT: s_and_b32 s4, s39, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s48, 16
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s38, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s39, 16
-; SI-NEXT: s_or_b32 s5, s5, s46
-; SI-NEXT: s_lshr_b32 s46, s43, 8
-; SI-NEXT: v_writelane_b32 v19, s46, 21
-; SI-NEXT: s_lshr_b32 s46, s41, 8
-; SI-NEXT: v_writelane_b32 v19, s46, 20
-; SI-NEXT: s_bfe_u32 s50, s45, 0x80008
-; SI-NEXT: s_mov_b32 s78, s44
-; SI-NEXT: s_bfe_u32 s64, s44, 0x80008
+; SI-NEXT: s_and_b32 s5, s37, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s38, 16
+; SI-NEXT: s_or_b32 s5, s5, s44
+; SI-NEXT: s_lshr_b32 s44, s43, 8
+; SI-NEXT: v_writelane_b32 v19, s44, 23
+; SI-NEXT: s_lshr_b32 s44, s41, 8
+; SI-NEXT: v_writelane_b32 v19, s44, 22
+; SI-NEXT: s_bfe_u32 s49, s45, 0x80008
; SI-NEXT: s_mov_b32 s46, s45
; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8
; SI-NEXT: s_mov_b32 s45, s46
@@ -78861,29 +78902,28 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_mov_b32 s57, s46
; SI-NEXT: s_mov_b32 s58, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_bfe_u32 s54, s31, 0x80008
; SI-NEXT: s_mov_b32 s47, s58
; SI-NEXT: s_mov_b32 s58, s31
; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 8
-; SI-NEXT: s_bfe_u32 s53, s63, 0x80008
+; SI-NEXT: s_bfe_u32 s52, s63, 0x80008
; SI-NEXT: s_mov_b32 s31, s58
; SI-NEXT: s_mov_b32 s58, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
; SI-NEXT: s_mov_b32 s63, s58
; SI-NEXT: s_mov_b32 s58, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[6:7], 16
-; SI-NEXT: s_bfe_u32 s52, s59, 0x80008
+; SI-NEXT: s_bfe_u32 s51, s59, 0x80008
; SI-NEXT: s_mov_b32 s61, s58
; SI-NEXT: s_mov_b32 s72, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 8
-; SI-NEXT: s_bfe_u32 s55, vcc_hi, 0x80008
; SI-NEXT: s_mov_b32 s59, s72
; SI-NEXT: s_mov_b32 s72, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
-; SI-NEXT: s_bfe_u32 s54, s75, 0x80008
+; SI-NEXT: s_bfe_u32 s53, s75, 0x80008
; SI-NEXT: s_mov_b32 vcc_hi, s72
; SI-NEXT: s_mov_b32 s72, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[94:95], s[12:13], 16
@@ -78896,19 +78936,20 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshr_b32 s89, s9, 8
; SI-NEXT: s_lshr_b32 s79, s7, 8
; SI-NEXT: s_lshr_b32 s77, s5, 8
-; SI-NEXT: s_bfe_u32 s51, s36, 0x80008
-; SI-NEXT: s_bfe_u32 s65, s39, 0x80008
+; SI-NEXT: s_bfe_u32 s50, s36, 0x80008
+; SI-NEXT: s_bfe_u32 s55, s88, 0x80008
+; SI-NEXT: s_bfe_u32 s64, s38, 0x80008
; SI-NEXT: s_mov_b32 s73, s34
; SI-NEXT: s_mov_b64 s[34:35], 0
; SI-NEXT: s_branch .LBB105_3
; SI-NEXT: .LBB105_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b32 s76, s6
+; SI-NEXT: s_mov_b32 s78, s6
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v19, s4, 0
; SI-NEXT: v_writelane_b32 v19, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b32 s78, s44
+; SI-NEXT: s_mov_b32 s76, s7
; SI-NEXT: v_writelane_b32 v19, s4, 2
; SI-NEXT: v_writelane_b32 v19, s5, 3
; SI-NEXT: ; implicit-def: $sgpr4
@@ -78919,25 +78960,24 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr94
@@ -78976,15 +79016,18 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_writelane_b32 v19, s4, 18
; SI-NEXT: v_writelane_b32 v19, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v19, s4, 20
+; SI-NEXT: v_writelane_b32 v19, s5, 21
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: .LBB105_3: ; %Flow
; SI-NEXT: s_and_b64 s[34:35], s[34:35], exec
; SI-NEXT: s_cselect_b32 s34, 1, 0
; SI-NEXT: s_cmp_lg_u32 s34, 1
; SI-NEXT: s_cbranch_scc1 .LBB105_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s48
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s49
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s39
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s39
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s48
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s38
; SI-NEXT: v_cvt_f32_f16_e32 v9, s47
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -78992,8 +79035,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s38
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s76
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s37
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s78
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -79008,14 +79051,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_cvt_f32_f16_e32 v2, s28
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s78
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s88
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
; SI-NEXT: v_readfirstlane_b32 s7, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s76
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -79028,14 +79071,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, vcc_hi
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s31
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v5, v3
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
; SI-NEXT: v_cvt_f32_f16_e32 v4, s27
; SI-NEXT: v_readfirstlane_b32 s9, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s37
+; SI-NEXT: v_cvt_f32_f16_e32 v5, vcc_hi
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -79187,6 +79230,9 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v8, s36
; SI-NEXT: v_readlane_b32 s36, v19, 12
; SI-NEXT: v_readlane_b32 s37, v19, 13
+; SI-NEXT: s_mov_b32 s76, s36
+; SI-NEXT: v_readlane_b32 s36, v19, 20
+; SI-NEXT: v_readlane_b32 s37, v19, 21
; SI-NEXT: v_mov_b32_e32 v4, s75
; SI-NEXT: v_mov_b32_e32 v5, s63
; SI-NEXT: v_mov_b32_e32 v6, s59
@@ -79205,20 +79251,20 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_readlane_b32 s46, v19, 16
; SI-NEXT: v_readlane_b32 s62, v19, 6
; SI-NEXT: v_readlane_b32 s56, v19, 14
-; SI-NEXT: s_mov_b32 s76, s36
+; SI-NEXT: s_mov_b32 s78, s36
; SI-NEXT: v_readlane_b32 s36, v19, 18
-; SI-NEXT: v_mov_b32_e32 v1, s39
-; SI-NEXT: v_mov_b32_e32 v2, s78
-; SI-NEXT: v_mov_b32_e32 v3, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v1, s38
+; SI-NEXT: v_mov_b32_e32 v2, s88
+; SI-NEXT: v_mov_b32_e32 v3, s31
; SI-NEXT: v_mov_b32_e32 v12, s45
-; SI-NEXT: v_mov_b32_e32 v7, s65
-; SI-NEXT: v_mov_b32_e32 v9, s64
-; SI-NEXT: v_mov_b32_e32 v10, s55
-; SI-NEXT: v_mov_b32_e32 v11, s54
-; SI-NEXT: v_mov_b32_e32 v13, s53
-; SI-NEXT: v_mov_b32_e32 v14, s52
-; SI-NEXT: v_mov_b32_e32 v15, s51
-; SI-NEXT: v_mov_b32_e32 v16, s50
+; SI-NEXT: v_mov_b32_e32 v7, s64
+; SI-NEXT: v_mov_b32_e32 v9, s55
+; SI-NEXT: v_mov_b32_e32 v10, s54
+; SI-NEXT: v_mov_b32_e32 v11, s53
+; SI-NEXT: v_mov_b32_e32 v13, s52
+; SI-NEXT: v_mov_b32_e32 v14, s51
+; SI-NEXT: v_mov_b32_e32 v15, s50
+; SI-NEXT: v_mov_b32_e32 v16, s49
; SI-NEXT: v_readlane_b32 s73, v19, 5
; SI-NEXT: v_readlane_b32 s75, v19, 3
; SI-NEXT: v_readlane_b32 s59, v19, 11
@@ -79227,10 +79273,10 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_readlane_b32 s47, v19, 17
; SI-NEXT: v_readlane_b32 s63, v19, 7
; SI-NEXT: v_readlane_b32 s57, v19, 15
-; SI-NEXT: v_readlane_b32 s17, v19, 20
-; SI-NEXT: v_readlane_b32 s19, v19, 21
+; SI-NEXT: v_readlane_b32 s17, v19, 22
+; SI-NEXT: v_readlane_b32 s19, v19, 23
; SI-NEXT: v_readlane_b32 s37, v19, 19
-; SI-NEXT: s_mov_b32 s78, s36
+; SI-NEXT: s_mov_b32 s88, s36
; SI-NEXT: .LBB105_6: ; %end
; SI-NEXT: s_and_b32 s21, s42, 0xff
; SI-NEXT: s_lshl_b32 s23, s34, 8
@@ -79412,11 +79458,10 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_readlane_b32 s30, v18, 16
+; SI-NEXT: v_readlane_b32 s30, v18, 15
; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v18, 17
-; SI-NEXT: v_readlane_b32 s65, v18, 15
+; SI-NEXT: v_readlane_b32 s31, v18, 16
; SI-NEXT: v_readlane_b32 s64, v18, 14
; SI-NEXT: v_readlane_b32 s55, v18, 13
; SI-NEXT: v_readlane_b32 s54, v18, 12
@@ -80699,369 +80744,354 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:32
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:16
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:56
; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:88
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:112
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:36
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v15
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v23
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v27
+; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v7
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v13
-; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v21
-; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v29
-; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v17
-; SI-NEXT: v_lshlrev_b32_e32 v47, 8, v25
-; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v13
+; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v21
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v29
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v17
+; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v25
+; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; kill: killed $vgpr5
; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; kill: killed $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:124
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v2
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v4
-; SI-NEXT: v_lshlrev_b32_e32 v63, 24, v18
-; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v20
-; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v10
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v12
-; SI-NEXT: v_lshlrev_b32_e32 v33, 8, v28
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:12
-; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v14
-; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v22
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v4
+; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v8
+; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v10
+; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v12
+; SI-NEXT: v_lshlrev_b32_e32 v63, 24, v14
+; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
+; SI-NEXT: v_lshlrev_b32_e32 v26, 8, v18
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v22
+; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v24
+; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v31
+; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v32
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:12
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v33
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v31
-; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v32
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v35
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v36
-; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v37
-; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v35
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:100
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB106_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v54
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_or_b32_e32 v6, v6, v49
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v44
+; SI-NEXT: v_or_b32_e32 v13, v13, v26
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v40
-; SI-NEXT: v_or_b32_e32 v13, v13, v18
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v33
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v62
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_or_b32_e32 v3, v3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v18, v24, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v4, v4, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_or_b32_e32 v21, v21, v15
-; SI-NEXT: v_or_b32_e32 v15, v8, v21
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v8, v27, v8
-; SI-NEXT: v_or_b32_e32 v13, v13, v18
-; SI-NEXT: v_alignbit_b32 v26, v13, v4, 16
-; SI-NEXT: v_alignbit_b32 v32, v15, v8, 16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v18
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v21
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v48, v46, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v20
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v20, v58, v11
-; SI-NEXT: v_or_b32_e32 v11, v1, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v63, v1
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: v_alignbit_b32 v22, v11, v1, 16
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_or_b32_e32 v29, v7, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v23, v3, v29
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v29
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_or_b32_e32 v16, v16, v24
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_or_b32_e32 v12, v7, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v25, v5, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v1, v1, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v17, v5, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v52
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v36, v7, v3
-; SI-NEXT: v_alignbit_b32 v3, v23, v12, 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_or_b32_e32 v33, v7, v5
+; SI-NEXT: v_alignbit_b32 v5, v1, v17, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v12, v16, v12
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v3, v3, v36
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v36
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v3, v3, v55
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v14, v7, v5
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v5, v3, v14, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v19, v7, v5
+; SI-NEXT: v_alignbit_b32 v5, v3, v19, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v24
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v37, v9, v7
+; SI-NEXT: v_or_b32_e32 v34, v9, v7
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v37
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v53
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v5, v5, v43
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v34
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v21, v42, v7
+; SI-NEXT: v_alignbit_b32 v7, v5, v21, 16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_or_b32_e32 v17, v54, v7
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v38, v43, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: v_or_b32_e32 v60, v16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v55
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_or_b32_e32 v5, v5, v37
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v38
-; SI-NEXT: v_alignbit_b32 v7, v5, v17, 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v19, v45, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v47
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v41, v16, v19
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v35, v46, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v7, v7, v57
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: v_or_b32_e32 v7, v7, v61
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v7, v7, v38
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v48
-; SI-NEXT: v_alignbit_b32 v44, v7, v19, 16
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_or_b32_e32 v9, v9, v61
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v9, v9, v48
-; SI-NEXT: v_alignbit_b32 v31, v9, v20, 16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v2
-; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_or_b32_e32 v7, v7, v35
+; SI-NEXT: v_or_b32_e32 v29, v47, v9
+; SI-NEXT: v_alignbit_b32 v9, v7, v29, 16
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v35
; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v0, v16, v0
-; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v0, v9, v0
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v39, v0, v20
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_or_b32_e32 v37, v58, v9
+; SI-NEXT: v_or_b32_e32 v9, v0, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v32
+; SI-NEXT: v_or_b32_e32 v4, v4, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v8, v63, v8
+; SI-NEXT: v_or_b32_e32 v11, v4, v8
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v16, v4
+; SI-NEXT: v_or_b32_e32 v16, v18, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_alignbit_b32 v41, v9, v0, 16
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v18, v27, v14
+; SI-NEXT: v_or_b32_e32 v15, v6, v18
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v6, v51, v6
+; SI-NEXT: v_or_b32_e32 v13, v13, v16
+; SI-NEXT: v_alignbit_b32 v57, v11, v4, 16
+; SI-NEXT: v_alignbit_b32 v31, v13, v12, 16
+; SI-NEXT: v_alignbit_b32 v14, v15, v6, 16
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v20, v20, v23
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_or_b32_e32 v24, v20, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v17, v17, v20
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v56, v17, v19
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v40
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v52, v17, v21
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v59
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v36, v17, v29
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
+; SI-NEXT: v_or_b32_e32 v17, v17, v22
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v29, v17, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v10
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v25, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: v_or_b32_e32 v21, v0, v4
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_or_b32_e32 v0, v0, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v19, v0, v4
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v56
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: v_or_b32_e32 v0, v0, v51
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_or_b32_e32 v19, v0, v12
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v60
+; SI-NEXT: v_or_b32_e32 v0, v0, v53
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v17, v0, v8
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_or_b32_e32 v17, v0, v6
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -81111,115 +81141,148 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: .LBB106_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB106_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v60
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v30
+; SI-NEXT: v_or_b32_e32 v1, v53, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_or_b32_e32 v3, v51, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v6
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v3, v49, v3
; SI-NEXT: s_movk_i32 s6, 0x300
-; SI-NEXT: v_or_b32_e32 v1, v62, v1
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v3
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v20
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v3, v27, v3
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v45
+; SI-NEXT: v_or_b32_e32 v1, v50, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v3, v12, v3
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v54
+; SI-NEXT: v_or_b32_e32 v1, v26, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v3, v18, v3
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v31, v13, v19, 16
+; SI-NEXT: v_alignbit_b32 v14, v15, v17, 16
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v15
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v23
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v2, v16, v2
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v28
+; SI-NEXT: v_or_b32_e32 v1, v8, v1
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v62, v2
+; SI-NEXT: v_alignbit_b32 v57, v11, v21, 16
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v1, v22, v1
+; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v56
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v16
-; SI-NEXT: v_or_b32_e32 v3, v51, v3
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x300, v3
-; SI-NEXT: v_or_b32_e32 v5, v27, v5
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v3, v5, v3
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v5, v33, v5
-; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v5
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v30
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v5, v21, v5
-; SI-NEXT: v_or_b32_e32 v3, v5, v3
-; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v6
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v42
-; SI-NEXT: v_or_b32_e32 v3, v34, v3
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v40
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v3, v18, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_alignbit_b32 v32, v15, v17, 16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v15
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v58, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v39, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v61, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v46, v1
+; SI-NEXT: v_or_b32_e32 v1, v58, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v31, v9, v39, 16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; SI-NEXT: v_alignbit_b32 v41, v9, v29, 16
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v9
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v47, v0
+; SI-NEXT: v_or_b32_e32 v0, v59, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v45, v1
+; SI-NEXT: v_or_b32_e32 v1, v47, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v41, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v36, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -81227,52 +81290,38 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v57, v0
+; SI-NEXT: v_or_b32_e32 v0, v61, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v43, v1
+; SI-NEXT: v_or_b32_e32 v1, v46, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v44, v7, v41, 16
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v53, v0
+; SI-NEXT: v_or_b32_e32 v0, v40, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v54, v1
+; SI-NEXT: v_or_b32_e32 v1, v42, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v60, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v52, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v24, v4
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v28
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v63, v4
-; SI-NEXT: v_alignbit_b32 v26, v13, v19, 16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v55, v0
+; SI-NEXT: v_or_b32_e32 v0, v43, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -81280,22 +81329,14 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: v_or_b32_e32 v3, v10, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v3
-; SI-NEXT: v_alignbit_b32 v22, v11, v25, 16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
@@ -81306,16 +81347,16 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v56, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v52, v0
+; SI-NEXT: v_or_b32_e32 v0, v55, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -81324,9 +81365,9 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -81341,10 +81382,10 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -81359,55 +81400,45 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v0, v23, v12, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
+; SI-NEXT: v_alignbit_b32 v0, v1, v24, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v3, v14, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v3, v56, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v5, v52, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v5, v60, 16
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v7, v36, 16
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: .LBB106_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v35
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v57
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v44
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v31
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v22
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v31
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v60
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v4, v4, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v29
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
@@ -81424,25 +81455,36 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v4, v4, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v36
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v39
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v29
; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v25
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v10, v10, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v38
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v26
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v49
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v50
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v39
+; SI-NEXT: v_or_b32_e32 v13, v13, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v14, v16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
; SI-NEXT: v_or_b32_e32 v15, v15, v16
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -83171,9 +83213,8 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_writelane_b32 v43, s87, 29
; SI-NEXT: v_writelane_b32 v43, s96, 30
; SI-NEXT: v_writelane_b32 v43, s97, 31
-; SI-NEXT: v_writelane_b32 v43, s98, 32
-; SI-NEXT: v_writelane_b32 v43, s30, 33
-; SI-NEXT: v_writelane_b32 v43, s31, 34
+; SI-NEXT: v_writelane_b32 v43, s30, 32
+; SI-NEXT: v_writelane_b32 v43, s31, 33
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:72
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:68
@@ -83199,10 +83240,10 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32
; SI-NEXT: v_readfirstlane_b32 s7, v1
; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane
-; SI-NEXT: v_readfirstlane_b32 s88, v0
+; SI-NEXT: v_readfirstlane_b32 s78, v0
; SI-NEXT: v_writelane_b32 v44, s7, 0
; SI-NEXT: v_readfirstlane_b32 s9, v9
-; SI-NEXT: v_writelane_b32 v44, s88, 1
+; SI-NEXT: v_writelane_b32 v44, s78, 1
; SI-NEXT: v_readfirstlane_b32 s72, v8
; SI-NEXT: v_writelane_b32 v44, s9, 2
; SI-NEXT: v_readfirstlane_b32 s74, v7
@@ -83219,6 +83260,7 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_writelane_b32 v44, s11, 8
; SI-NEXT: v_readfirstlane_b32 s60, v2
; SI-NEXT: v_writelane_b32 v44, s58, 9
+; SI-NEXT: v_writelane_b32 v44, s60, 10
; SI-NEXT: v_readfirstlane_b32 s63, v30
; SI-NEXT: v_readfirstlane_b32 s52, v29
; SI-NEXT: v_readfirstlane_b32 s51, v28
@@ -83239,7 +83281,6 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s61, v11
; SI-NEXT: v_readfirstlane_b32 s36, v10
; SI-NEXT: v_readfirstlane_b32 s45, v3
-; SI-NEXT: v_writelane_b32 v44, s60, 10
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
@@ -83250,10 +83291,9 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s13, v36
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_readfirstlane_b32 s15, v37
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s5, v38
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_readfirstlane_b32 s76, v39
+; SI-NEXT: v_readfirstlane_b32 s5, v38
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_readfirstlane_b32 s31, v48
; SI-NEXT: s_waitcnt vmcnt(9)
@@ -83273,10 +83313,11 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_readfirstlane_b32 s55, v40
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s81, v41
+; SI-NEXT: v_readfirstlane_b32 s80, v41
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_readfirstlane_b32 s64, v42
; SI-NEXT: v_writelane_b32 v44, s76, 11
+; SI-NEXT: v_writelane_b32 v44, s5, 12
; SI-NEXT: s_cbranch_scc0 .LBB107_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xff
@@ -83293,99 +83334,94 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s62, s27, 24
; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_and_b32 s77, s77, 0xff
+; SI-NEXT: s_lshl_b32 s74, s74, 8
+; SI-NEXT: s_and_b32 s72, s72, 0xff
; SI-NEXT: s_or_b32 s6, s62, s6
; SI-NEXT: s_and_b32 s60, s60, 0xff
; SI-NEXT: s_lshl_b32 s62, s45, 8
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
-; SI-NEXT: s_or_b32 s78, s60, s62
+; SI-NEXT: s_or_b32 s74, s77, s74
+; SI-NEXT: s_lshl_b32 s72, s72, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 24
+; SI-NEXT: s_or_b32 vcc_hi, s60, s62
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: s_and_b32 s10, s36, 0xff
; SI-NEXT: s_lshl_b32 s60, s61, 8
-; SI-NEXT: s_or_b32 vcc_hi, s10, s60
+; SI-NEXT: s_and_b32 s74, s74, 0xffff
+; SI-NEXT: s_or_b32 s84, s9, s72
+; SI-NEXT: s_or_b32 s67, s10, s60
; SI-NEXT: s_and_b32 s10, s59, 0xff
+; SI-NEXT: s_or_b32 s9, s74, s84
+; SI-NEXT: s_and_b32 s72, s57, 0xff
+; SI-NEXT: s_lshl_b32 s74, s47, 8
+; SI-NEXT: s_and_b32 s58, s58, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s60, s30, 24
-; SI-NEXT: s_and_b32 s77, s77, 0xff
-; SI-NEXT: s_lshl_b32 s74, s74, 8
-; SI-NEXT: s_and_b32 s72, s72, 0xff
+; SI-NEXT: s_or_b32 s72, s72, s74
+; SI-NEXT: s_lshl_b32 s58, s58, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: s_or_b32 s10, s60, s10
; SI-NEXT: s_and_b32 s60, s50, 0xff
; SI-NEXT: s_lshl_b32 s62, s49, 8
-; SI-NEXT: s_or_b32 s74, s77, s74
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s67, s60, s62
+; SI-NEXT: s_and_b32 s72, s72, 0xffff
+; SI-NEXT: s_or_b32 s85, s11, s58
+; SI-NEXT: s_or_b32 s70, s60, s62
; SI-NEXT: s_and_b32 s60, s39, 0xff
-; SI-NEXT: s_and_b32 s74, s74, 0xffff
-; SI-NEXT: s_or_b32 s85, s9, s72
+; SI-NEXT: s_or_b32 s11, s72, s85
+; SI-NEXT: s_and_b32 s58, s38, 0xff
+; SI-NEXT: s_lshl_b32 s72, s37, 8
; SI-NEXT: s_lshl_b32 s60, s60, 16
; SI-NEXT: s_lshl_b32 s62, s48, 24
-; SI-NEXT: s_or_b32 s9, s74, s85
-; SI-NEXT: s_and_b32 s72, s57, 0xff
-; SI-NEXT: s_lshl_b32 s74, s47, 8
-; SI-NEXT: s_and_b32 s58, s58, 0xff
+; SI-NEXT: s_or_b32 s58, s58, s72
+; SI-NEXT: s_and_b32 s72, s34, 0xff
; SI-NEXT: s_or_b32 s60, s62, s60
; SI-NEXT: s_and_b32 s62, s54, 0xff
; SI-NEXT: s_lshl_b32 s79, s53, 8
-; SI-NEXT: s_or_b32 s72, s72, s74
-; SI-NEXT: s_lshl_b32 s58, s58, 16
-; SI-NEXT: s_lshl_b32 s11, s11, 24
-; SI-NEXT: s_or_b32 s80, s62, s79
+; SI-NEXT: s_lshl_b32 s72, s72, 16
+; SI-NEXT: s_lshl_b32 s74, s35, 24
+; SI-NEXT: s_or_b32 s71, s62, s79
; SI-NEXT: s_and_b32 s62, s51, 0xff
-; SI-NEXT: s_and_b32 s72, s72, 0xffff
-; SI-NEXT: s_or_b32 s86, s11, s58
-; SI-NEXT: s_lshl_b32 s62, s62, 16
-; SI-NEXT: s_lshl_b32 s79, s52, 24
-; SI-NEXT: s_or_b32 s11, s72, s86
-; SI-NEXT: s_and_b32 s58, s38, 0xff
-; SI-NEXT: s_lshl_b32 s72, s37, 8
-; SI-NEXT: s_or_b32 s62, s79, s62
-; SI-NEXT: s_and_b32 s79, s66, 0xff
-; SI-NEXT: s_lshl_b32 s89, s65, 8
-; SI-NEXT: s_or_b32 s58, s58, s72
-; SI-NEXT: s_and_b32 s72, s34, 0xff
-; SI-NEXT: s_or_b32 s82, s79, s89
; SI-NEXT: s_and_b32 s76, s76, 0xff
-; SI-NEXT: s_mov_b32 s79, s5
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: s_lshl_b32 s74, s35, 24
-; SI-NEXT: s_or_b32 s83, s76, s5
+; SI-NEXT: s_and_b32 s58, s58, 0xffff
+; SI-NEXT: s_or_b32 s86, s74, s72
+; SI-NEXT: s_lshl_b32 s62, s62, 16
+; SI-NEXT: s_lshl_b32 s79, s52, 24
+; SI-NEXT: s_or_b32 s82, s76, s5
; SI-NEXT: s_and_b32 s5, s20, 0xff
; SI-NEXT: s_lshl_b32 s76, s21, 8
-; SI-NEXT: s_and_b32 s58, s58, 0xffff
-; SI-NEXT: s_or_b32 s87, s74, s72
-; SI-NEXT: s_or_b32 s5, s5, s76
-; SI-NEXT: s_and_b32 s76, s22, 0xff
; SI-NEXT: s_mov_b32 s72, s61
-; SI-NEXT: s_or_b32 s61, s58, s87
+; SI-NEXT: s_or_b32 s61, s58, s86
; SI-NEXT: s_and_b32 s58, s63, 0xff
; SI-NEXT: s_lshl_b32 s74, s64, 8
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s89, s23, 24
+; SI-NEXT: s_or_b32 s62, s79, s62
+; SI-NEXT: s_and_b32 s79, s66, 0xff
+; SI-NEXT: s_lshl_b32 s88, s65, 8
+; SI-NEXT: s_or_b32 s5, s5, s76
+; SI-NEXT: s_and_b32 s76, s22, 0xff
; SI-NEXT: s_or_b32 s58, s58, s74
-; SI-NEXT: s_and_b32 s74, s81, 0xff
-; SI-NEXT: s_or_b32 s76, s89, s76
-; SI-NEXT: s_and_b32 s89, s28, 0xff
-; SI-NEXT: s_lshl_b32 s90, s29, 8
-; SI-NEXT: s_and_b32 s88, s88, 0xff
+; SI-NEXT: s_and_b32 s74, s80, 0xff
+; SI-NEXT: s_or_b32 s81, s79, s88
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: s_lshl_b32 s79, s23, 24
; SI-NEXT: s_lshl_b32 s74, s74, 16
; SI-NEXT: s_lshl_b32 s77, s55, 24
; SI-NEXT: s_mov_b32 s92, s14
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_or_b32 s89, s89, s90
-; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_or_b32 s76, s79, s76
+; SI-NEXT: s_and_b32 s79, s28, 0xff
+; SI-NEXT: s_lshl_b32 s88, s29, 8
; SI-NEXT: s_and_b32 s58, s58, 0xffff
-; SI-NEXT: s_or_b32 s96, s77, s74
+; SI-NEXT: s_or_b32 s87, s77, s74
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_mov_b32 s94, s12
; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: s_and_b32 s89, s89, 0xffff
-; SI-NEXT: s_or_b32 s84, s7, s88
+; SI-NEXT: s_or_b32 s79, s79, s88
+; SI-NEXT: s_and_b32 s78, s78, 0xff
; SI-NEXT: s_mov_b32 s74, s63
-; SI-NEXT: s_or_b32 s63, s58, s96
+; SI-NEXT: s_or_b32 s63, s58, s87
; SI-NEXT: s_mov_b32 s88, s56
; SI-NEXT: s_and_b32 s56, s56, 0xff
; SI-NEXT: s_lshl_b32 s58, s75, 8
@@ -83393,9 +83429,10 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_and_b32 s41, s41, 0xff
; SI-NEXT: s_mov_b32 s93, s40
; SI-NEXT: s_lshl_b32 s40, s40, 8
-; SI-NEXT: s_or_b32 s98, s12, s14
+; SI-NEXT: s_or_b32 s97, s12, s14
; SI-NEXT: s_and_b32 s12, s15, 0xff
-; SI-NEXT: s_or_b32 s7, s89, s84
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_or_b32 s56, s56, s58
; SI-NEXT: s_and_b32 s58, s73, 0xff
; SI-NEXT: s_mov_b32 s89, s46
@@ -83405,30 +83442,33 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_mov_b32 vcc_lo, s13
; SI-NEXT: s_lshl_b32 s13, s13, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_and_b32 s79, s79, 0xffff
+; SI-NEXT: s_or_b32 s83, s7, s78
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_lshl_b32 s77, s31, 24
; SI-NEXT: s_lshl_b32 s46, s46, 16
; SI-NEXT: s_mov_b32 s90, s44
; SI-NEXT: s_lshl_b32 s44, s44, 24
-; SI-NEXT: s_or_b32 s70, s13, s12
+; SI-NEXT: s_or_b32 s68, s13, s12
; SI-NEXT: s_and_b32 s12, s40, 0xffff
; SI-NEXT: s_or_b32 s5, s5, s76
-; SI-NEXT: s_or_b32 s97, s77, s58
-; SI-NEXT: s_or_b32 s68, s44, s46
+; SI-NEXT: s_or_b32 s7, s79, s83
+; SI-NEXT: s_or_b32 s96, s77, s58
+; SI-NEXT: s_or_b32 s78, s44, s46
; SI-NEXT: s_and_b32 s44, s56, 0xffff
-; SI-NEXT: s_or_b32 s71, s12, s98
+; SI-NEXT: s_or_b32 s69, s12, s97
; SI-NEXT: s_and_b32 s12, s42, 0xffff
-; SI-NEXT: s_or_b32 s69, s44, s97
+; SI-NEXT: s_or_b32 s79, s44, s96
; SI-NEXT: s_or_b32 s42, s12, s4
; SI-NEXT: s_mov_b32 s12, s45
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_mov_b32 s4, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: s_and_b32 s13, s43, 0xffff
-; SI-NEXT: s_and_b32 s14, s78, 0xffff
-; SI-NEXT: s_and_b32 s58, vcc_hi, 0xffff
-; SI-NEXT: s_and_b32 s77, s67, 0xffff
-; SI-NEXT: s_and_b32 s78, s80, 0xffff
+; SI-NEXT: s_and_b32 s14, vcc_hi, 0xffff
+; SI-NEXT: s_and_b32 s58, s67, 0xffff
+; SI-NEXT: s_and_b32 s77, s70, 0xffff
+; SI-NEXT: s_and_b32 vcc_hi, s71, 0xffff
; SI-NEXT: s_mov_b32 s47, s4
; SI-NEXT: s_mov_b32 s4, s57
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
@@ -83445,38 +83485,37 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_or_b32 s10, s77, s60
; SI-NEXT: s_mov_b32 s11, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: s_or_b32 s8, s78, s62
+; SI-NEXT: s_or_b32 s8, vcc_hi, s62
; SI-NEXT: s_mov_b32 s9, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
-; SI-NEXT: s_and_b32 vcc_hi, s82, 0xffff
-; SI-NEXT: s_and_b32 s67, s83, 0xffff
+; SI-NEXT: s_and_b32 s67, s81, 0xffff
+; SI-NEXT: s_and_b32 s70, s82, 0xffff
; SI-NEXT: s_mov_b32 s59, s4
; SI-NEXT: s_mov_b32 s61, s72
; SI-NEXT: s_mov_b32 s63, s74
; SI-NEXT: s_mov_b32 s4, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[68:69], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[78:79], 16
; SI-NEXT: s_mov_b32 s77, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[70:71], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[68:69], 16
; SI-NEXT: s_mov_b32 s43, s5
; SI-NEXT: s_mov_b32 s41, s7
-; SI-NEXT: s_or_b32 s6, vcc_hi, s68
-; SI-NEXT: s_mov_b32 s7, s69
+; SI-NEXT: s_or_b32 s6, s67, s78
+; SI-NEXT: s_mov_b32 s7, s79
; SI-NEXT: s_mov_b32 s73, s4
-; SI-NEXT: s_or_b32 s4, s67, s70
-; SI-NEXT: s_mov_b32 s5, s71
+; SI-NEXT: s_or_b32 s4, s70, s68
+; SI-NEXT: s_mov_b32 s5, s69
; SI-NEXT: s_mov_b32 s75, s77
-; SI-NEXT: s_lshr_b32 s70, s76, 16
-; SI-NEXT: s_lshr_b32 s69, s84, 16
+; SI-NEXT: s_lshr_b32 s69, s76, 16
+; SI-NEXT: s_lshr_b32 s68, s83, 16
+; SI-NEXT: s_lshr_b32 s79, s84, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s85, 16
-; SI-NEXT: s_lshr_b32 s68, s86, 16
-; SI-NEXT: s_lshr_b32 s78, s87, 16
-; SI-NEXT: s_lshr_b32 s67, s96, 16
+; SI-NEXT: s_lshr_b32 s78, s86, 16
+; SI-NEXT: s_lshr_b32 s67, s87, 16
+; SI-NEXT: s_lshr_b32 s70, s96, 16
; SI-NEXT: s_lshr_b32 s71, s97, 16
-; SI-NEXT: s_lshr_b32 s80, s98, 16
; SI-NEXT: s_mov_b64 s[76:77], 0
; SI-NEXT: s_branch .LBB107_3
; SI-NEXT: .LBB107_2:
-; SI-NEXT: s_mov_b32 s79, s5
; SI-NEXT: s_mov_b32 vcc_lo, s13
; SI-NEXT: s_mov_b32 s95, s15
; SI-NEXT: s_mov_b32 s91, s41
@@ -83489,16 +83528,16 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_mov_b64 s[76:77], -1
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr78
@@ -83507,10 +83546,10 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: .LBB107_3: ; %Flow
; SI-NEXT: s_and_b64 s[76:77], s[76:77], exec
; SI-NEXT: s_cselect_b32 s76, 1, 0
@@ -83519,10 +83558,11 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_readlane_b32 s4, v44, 11
; SI-NEXT: s_add_i32 s4, s4, 3
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s79, 8
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v44, 12
+; SI-NEXT: s_lshl_b32 s4, s4, 8
; SI-NEXT: s_add_i32 s6, s95, 3
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 24
@@ -83581,9 +83621,9 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_add_i32 s9, s63, 3
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s10, s64, 8
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s11, s81, 0xff
+; SI-NEXT: s_and_b32 s11, s80, 0xff
; SI-NEXT: s_addk_i32 s9, 0x300
; SI-NEXT: s_lshl_b32 s10, s55, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
@@ -83745,14 +83785,14 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s70, s43, 16
-; SI-NEXT: s_lshr_b32 s69, s41, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s68, s13, 16
+; SI-NEXT: s_lshr_b32 s69, s43, 16
+; SI-NEXT: s_lshr_b32 s68, s41, 16
+; SI-NEXT: s_lshr_b32 s79, s15, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s13, 16
; SI-NEXT: s_lshr_b32 s78, s11, 16
; SI-NEXT: s_lshr_b32 s67, s9, 16
-; SI-NEXT: s_lshr_b32 s71, s7, 16
-; SI-NEXT: s_lshr_b32 s80, s5, 16
+; SI-NEXT: s_lshr_b32 s70, s7, 16
+; SI-NEXT: s_lshr_b32 s71, s5, 16
; SI-NEXT: .LBB107_5: ; %end
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
@@ -83761,25 +83801,25 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s17, s44, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s70, 16
+; SI-NEXT: s_lshl_b32 s18, s69, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s40, 0xffff
; SI-NEXT: s_lshl_b32 s19, s46, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s69, 16
+; SI-NEXT: s_lshl_b32 s20, s68, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s20, s56, 16
; SI-NEXT: s_or_b32 s14, s14, s20
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s20, s79, 16
; SI-NEXT: s_or_b32 s15, s15, s20
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s20, s58, 16
; SI-NEXT: s_or_b32 s12, s12, s20
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s68, 16
+; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
; SI-NEXT: s_or_b32 s13, s13, s20
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s20, s60, 16
@@ -83797,15 +83837,15 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s20, s72, 16
; SI-NEXT: s_or_b32 s6, s6, s20
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s71, 16
+; SI-NEXT: s_lshl_b32 s20, s70, 16
; SI-NEXT: s_or_b32 s7, s7, s20
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s20, s74, 16
; SI-NEXT: s_or_b32 s4, s4, s20
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s80, 16
+; SI-NEXT: s_lshl_b32 s20, s71, 16
; SI-NEXT: s_or_b32 s5, s5, s20
-; SI-NEXT: v_readlane_b32 s30, v43, 33
+; SI-NEXT: v_readlane_b32 s30, v43, 32
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -83822,8 +83862,7 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v13, s7
; SI-NEXT: v_mov_b32_e32 v14, s4
; SI-NEXT: v_mov_b32_e32 v15, s5
-; SI-NEXT: v_readlane_b32 s31, v43, 34
-; SI-NEXT: v_readlane_b32 s98, v43, 32
+; SI-NEXT: v_readlane_b32 s31, v43, 33
; SI-NEXT: v_readlane_b32 s97, v43, 31
; SI-NEXT: v_readlane_b32 s96, v43, 30
; SI-NEXT: v_readlane_b32 s87, v43, 29
@@ -85909,9 +85948,9 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -85922,7 +85961,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB108_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
@@ -85930,10 +85969,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -85969,8 +86008,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB108_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB108_4
@@ -86271,10 +86312,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -86390,11 +86431,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v16, v29, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -88055,10 +88096,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_mul_f32_e64 v28, 1.0, s7
; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4
; SI-NEXT: v_mul_f32_e64 v26, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s45
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s42
; SI-NEXT: s_cbranch_scc0 .LBB109_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_readfirstlane_b32 s4, v3
@@ -88103,11 +88144,11 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshr_b64 s[12:13], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v25
; SI-NEXT: s_lshr_b32 s11, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v31
+; SI-NEXT: v_readfirstlane_b32 s4, v35
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v32
+; SI-NEXT: v_readfirstlane_b32 s4, v36
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: v_readfirstlane_b32 s4, v32
; SI-NEXT: v_readfirstlane_b32 s72, v2
; SI-NEXT: v_readfirstlane_b32 s58, v6
; SI-NEXT: v_readfirstlane_b32 s44, v10
@@ -88116,7 +88157,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s18, v22
; SI-NEXT: v_readfirstlane_b32 s10, v26
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v30
+; SI-NEXT: v_readfirstlane_b32 s4, v33
; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[58:59], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[44:45], 16
@@ -88158,13 +88199,13 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshr_b32 s21, s62, 8
; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v13
; SI-NEXT: s_lshr_b32 s18, s60, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v17
+; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v17
; SI-NEXT: s_lshr_b32 s17, s46, 8
-; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v21
+; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v21
; SI-NEXT: s_lshr_b32 s15, s26, 8
-; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v25
; SI-NEXT: s_lshr_b32 s10, s28, 8
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v29
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v32
; SI-NEXT: s_lshr_b32 s27, s16, 8
; SI-NEXT: s_mov_b32 s40, s8
; SI-NEXT: s_lshr_b32 s4, s8, 8
@@ -88216,13 +88257,13 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr26
; SI-NEXT: ; implicit-def: $sgpr15
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr80
@@ -88253,18 +88294,18 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_mov_b32 s96, s98
; SI-NEXT: s_cbranch_scc1 .LBB109_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; SI-NEXT: v_readfirstlane_b32 s4, v31
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v35
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v36
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
+; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v32
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
+; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v29
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
; SI-NEXT: v_readfirstlane_b32 s4, v29
; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; SI-NEXT: s_lshr_b32 s5, s4, 16
@@ -88420,10 +88461,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v5
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v9
; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v17
-; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v21
-; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v25
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v29
+; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v17
+; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v21
+; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v29
; SI-NEXT: s_lshr_b64 s[86:87], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[96:97], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[8:9], s[12:13], 8
@@ -88540,7 +88581,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v36
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v34
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s13, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
@@ -88563,7 +88604,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v31
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s10, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
@@ -88586,7 +88627,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v30
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s9, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
@@ -88609,7 +88650,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_or_b32 s4, s6, s4
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v33
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v29
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
@@ -89504,392 +89545,390 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: s_cbranch_scc1 .LBB109_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000
-; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v1, s6, v3
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
-; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc
+; GFX9-NEXT: v_mov_b32_e32 v1, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s17, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s6, v3
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
-; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v1, s6, v3
-; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v1
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
+; GFX9-NEXT: v_or_b32_sdwa v8, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s16, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s6, v3
-; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v1
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v7, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v7
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v8, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v12, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s18, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v34
; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_or_b32_sdwa v7, v4, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v11, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s21, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v31
; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v14, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v17, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s20, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v36
; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v13, v4, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v16, v2, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s23, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v32
; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v19, v4, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v19, v2, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s22, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v37
; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v18, v4, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v18, v2, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s25, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v38
; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v21, v4, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v21, v2, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s24, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v50
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v50
; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v20, v4, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v20, v2, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s27, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v51
; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v23, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v23, v2, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s26, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v54
; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v22, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v22, v2, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s29, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v55
; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v25, v4, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v25, v2, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s6, s28, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v42
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v44
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v24, v4, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s6, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
+; GFX9-NEXT: v_or_b32_sdwa v24, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s5, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v9
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v45, v4, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v4, s5, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_or_b32_sdwa v57, v2, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: s_lshl_b32 s4, s4, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s4, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v3
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v29
-; GFX9-NEXT: v_or_b32_sdwa v44, v3, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[44:45]
-; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[20:21]
-; GFX9-NEXT: v_lshrrev_b64 v[4:5], 24, v[24:25]
-; GFX9-NEXT: v_lshrrev_b64 v[10:11], 24, v[18:19]
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[22:23]
-; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[13:14]
-; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v13
-; GFX9-NEXT: v_mov_b32_e32 v13, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v7, v30
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v2
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v42
+; GFX9-NEXT: v_or_b32_sdwa v56, v1, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[56:57]
+; GFX9-NEXT: v_lshrrev_b64 v[2:3], 24, v[24:25]
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[22:23]
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[4:5], 24, v[20:21]
+; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[18:19]
+; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[11:12]
+; GFX9-NEXT: v_mov_b32_e32 v6, v9
+; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[16:17]
+; GFX9-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 24, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 24, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v7
+; GFX9-NEXT: v_mov_b32_e32 v16, v30
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v8, v29
-; GFX9-NEXT: v_mov_b32_e32 v2, v28
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v1, v27
+; GFX9-NEXT: v_mov_b32_e32 v12, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v11, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v8, v27
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v23
+; GFX9-NEXT: v_mov_b32_e32 v7, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v21
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v14
-; GFX9-NEXT: v_mov_b32_e32 v14, v26
-; GFX9-NEXT: v_mov_b32_e32 v26, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v17
; GFX9-NEXT: s_branch .LBB109_6
; GFX9-NEXT: .LBB109_5:
-; GFX9-NEXT: v_mov_b32_e32 v3, s21
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v3, vcc_hi
-; GFX9-NEXT: v_mov_b32_e32 v7, s4
-; GFX9-NEXT: v_mov_b32_e32 v8, s36
-; GFX9-NEXT: v_mov_b32_e32 v2, s5
-; GFX9-NEXT: v_mov_b32_e32 v1, s37
-; GFX9-NEXT: v_mov_b32_e32 v40, s28
-; GFX9-NEXT: v_mov_b32_e32 v42, s34
-; GFX9-NEXT: v_mov_b32_e32 v14, s29
+; GFX9-NEXT: v_mov_b32_e32 v1, s21
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s19
+; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v42, s36
+; GFX9-NEXT: v_mov_b32_e32 v40, s5
+; GFX9-NEXT: v_mov_b32_e32 v6, s37
+; GFX9-NEXT: v_mov_b32_e32 v45, s28
+; GFX9-NEXT: v_mov_b32_e32 v44, s34
+; GFX9-NEXT: v_mov_b32_e32 v43, s29
; GFX9-NEXT: v_mov_b32_e32 v55, s35
-; GFX9-NEXT: v_mov_b32_e32 v43, s26
+; GFX9-NEXT: v_mov_b32_e32 v46, s26
; GFX9-NEXT: v_mov_b32_e32 v54, s30
; GFX9-NEXT: v_mov_b32_e32 v53, s27
; GFX9-NEXT: v_mov_b32_e32 v51, s31
@@ -89903,71 +89942,82 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v32, s41
; GFX9-NEXT: v_mov_b32_e32 v48, s20
; GFX9-NEXT: v_mov_b32_e32 v36, s11
-; GFX9-NEXT: v_mov_b32_e32 v28, s13
+; GFX9-NEXT: v_mov_b32_e32 v31, s13
; GFX9-NEXT: v_mov_b32_e32 v33, s18
; GFX9-NEXT: v_mov_b32_e32 v34, s7
-; GFX9-NEXT: v_mov_b32_e32 v30, s9
-; GFX9-NEXT: v_mov_b32_e32 v29, s16
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v29, s9
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v30, vcc_hi
; GFX9-NEXT: v_mov_b32_e32 v27, s17
; GFX9-NEXT: v_mov_b32_e32 v26, vcc_lo
-; GFX9-NEXT: v_mov_b32_e32 v17, s95
-; GFX9-NEXT: v_mov_b32_e32 v6, s91
-; GFX9-NEXT: v_mov_b32_e32 v12, s93
-; GFX9-NEXT: v_mov_b32_e32 v46, s94
-; GFX9-NEXT: v_mov_b32_e32 v44, s88
-; GFX9-NEXT: v_mov_b32_e32 v45, s90
+; GFX9-NEXT: v_mov_b32_e32 v7, s95
+; GFX9-NEXT: v_mov_b32_e32 v10, s91
+; GFX9-NEXT: v_mov_b32_e32 v15, s93
+; GFX9-NEXT: v_mov_b32_e32 v12, s94
+; GFX9-NEXT: v_mov_b32_e32 v8, s88
+; GFX9-NEXT: v_mov_b32_e32 v11, s90
; GFX9-NEXT: v_mov_b32_e32 v22, s92
-; GFX9-NEXT: v_mov_b32_e32 v47, s77
+; GFX9-NEXT: v_mov_b32_e32 v16, s77
; GFX9-NEXT: v_mov_b32_e32 v23, s79
; GFX9-NEXT: v_mov_b32_e32 v20, s89
-; GFX9-NEXT: v_mov_b32_e32 v57, s74
+; GFX9-NEXT: v_mov_b32_e32 v56, s74
; GFX9-NEXT: v_mov_b32_e32 v21, s76
; GFX9-NEXT: v_mov_b32_e32 v18, s78
; GFX9-NEXT: v_mov_b32_e32 v60, s63
; GFX9-NEXT: v_mov_b32_e32 v19, s73
-; GFX9-NEXT: v_mov_b32_e32 v56, s75
-; GFX9-NEXT: v_mov_b32_e32 v13, s60
-; GFX9-NEXT: v_mov_b32_e32 v41, s62
-; GFX9-NEXT: v_mov_b32_e32 v61, s72
-; GFX9-NEXT: v_mov_b32_e32 v58, s58
-; GFX9-NEXT: v_mov_b32_e32 v59, s59
+; GFX9-NEXT: v_mov_b32_e32 v47, s75
+; GFX9-NEXT: v_mov_b32_e32 v24, s60
+; GFX9-NEXT: v_mov_b32_e32 v17, s62
+; GFX9-NEXT: v_mov_b32_e32 v59, s72
+; GFX9-NEXT: v_mov_b32_e32 v57, s58
+; GFX9-NEXT: v_mov_b32_e32 v58, s59
; GFX9-NEXT: v_mov_b32_e32 v25, s61
-; GFX9-NEXT: v_mov_b32_e32 v62, s56
-; GFX9-NEXT: v_mov_b32_e32 v24, s57
-; GFX9-NEXT: v_mov_b32_e32 v3, s44
-; GFX9-NEXT: v_mov_b32_e32 v4, s42
-; GFX9-NEXT: v_mov_b32_e32 v5, s40
-; GFX9-NEXT: v_mov_b32_e32 v9, s14
-; GFX9-NEXT: v_mov_b32_e32 v10, s12
-; GFX9-NEXT: v_mov_b32_e32 v11, s10
-; GFX9-NEXT: v_mov_b32_e32 v15, s8
-; GFX9-NEXT: v_mov_b32_e32 v16, s6
+; GFX9-NEXT: v_mov_b32_e32 v61, s56
+; GFX9-NEXT: v_mov_b32_e32 v62, s57
+; GFX9-NEXT: v_mov_b32_e32 v1, s44
+; GFX9-NEXT: v_mov_b32_e32 v2, s42
+; GFX9-NEXT: v_mov_b32_e32 v3, s40
+; GFX9-NEXT: v_mov_b32_e32 v4, s14
+; GFX9-NEXT: v_mov_b32_e32 v5, s12
+; GFX9-NEXT: v_mov_b32_e32 v9, s10
+; GFX9-NEXT: v_mov_b32_e32 v13, s8
+; GFX9-NEXT: v_mov_b32_e32 v14, s6
; GFX9-NEXT: .LBB109_6: ; %end
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v14, v30, v14, s4
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v25, v29, v25, s4
-; GFX9-NEXT: v_perm_b32 v15, v34, v15, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v11, v36, v11, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX9-NEXT: v_perm_b32 v13, v28, v13, s4
+; GFX9-NEXT: v_perm_b32 v25, v28, v25, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX9-NEXT: v_or_b32_e32 v14, v25, v14
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v26, v61, s4
+; GFX9-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen
+; GFX9-NEXT: v_perm_b32 v14, v27, v62, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_perm_b32 v13, v34, v13, s4
+; GFX9-NEXT: v_or_b32_e32 v14, v14, v25
+; GFX9-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_perm_b32 v14, v33, v59, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v10, v37, v10, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_perm_b32 v9, v50, v9, s4
+; GFX9-NEXT: v_or_b32_e32 v13, v14, v13
+; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v29, v57, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX9-NEXT: v_perm_b32 v9, v36, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_perm_b32 v5, v54, v5, s4
+; GFX9-NEXT: v_perm_b32 v5, v37, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: v_perm_b32 v4, v42, v4, s4
+; GFX9-NEXT: v_perm_b32 v4, v50, v4, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_perm_b32 v3, v8, v3, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v6, s4
+; GFX9-NEXT: v_perm_b32 v3, v54, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_perm_b32 v2, v2, v12, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_perm_b32 v1, v42, v1, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: v_readlane_b32 s30, v63, 10
; GFX9-NEXT: v_readlane_b32 s31, v63, 11
; GFX9-NEXT: v_readlane_b32 s51, v63, 9
@@ -89981,68 +90031,58 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v31, v16, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v25, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v16, v27, v24, s4
-; GFX9-NEXT: v_perm_b32 v24, v26, v62, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX9-NEXT: v_or_b32_e32 v16, v16, v24
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v16, v33, v61, s4
-; GFX9-NEXT: v_or_b32_e32 v15, v16, v15
-; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v16, v30, v58, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v59, s4
-; GFX9-NEXT: v_or_b32_e32 v15, v15, v16
-; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v15, v48, v56, s4
-; GFX9-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v58, s4
+; GFX9-NEXT: v_or_b32_e32 v13, v13, v14
+; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_perm_b32 v13, v48, v47, s4
+; GFX9-NEXT: v_or_b32_e32 v9, v13, v9
+; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v31, v24, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v11, v11, v41, s4
-; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
-; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v11, v39, v18, s4
-; GFX9-NEXT: v_or_b32_e32 v10, v11, v10
-; GFX9-NEXT: v_perm_b32 v11, v32, v60, s4
-; GFX9-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v10, v35, v19, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX9-NEXT: v_or_b32_e32 v10, v10, v11
-; GFX9-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_perm_b32 v10, v52, v20, s4
-; GFX9-NEXT: v_or_b32_e32 v9, v10, v9
-; GFX9-NEXT: v_perm_b32 v10, v38, v57, s4
-; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: v_perm_b32 v9, v49, v21, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
-; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_perm_b32 v9, v43, v22, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v17, s4
+; GFX9-NEXT: v_or_b32_e32 v9, v9, v13
+; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_perm_b32 v9, v39, v18, s4
; GFX9-NEXT: v_or_b32_e32 v5, v9, v5
-; GFX9-NEXT: v_perm_b32 v9, v51, v47, s4
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: v_perm_b32 v5, v53, v23, s4
+; GFX9-NEXT: v_perm_b32 v9, v32, v60, s4
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: v_perm_b32 v5, v35, v19, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_or_b32_e32 v5, v5, v9
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_perm_b32 v5, v40, v46, s4
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_perm_b32 v5, v52, v20, s4
; GFX9-NEXT: v_or_b32_e32 v4, v5, v4
-; GFX9-NEXT: v_perm_b32 v5, v55, v44, s4
-; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v4, v14, v45, s4
+; GFX9-NEXT: v_perm_b32 v5, v38, v56, s4
+; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:32
+; GFX9-NEXT: v_perm_b32 v4, v49, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v4, v7, v17, s4
+; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:36
+; GFX9-NEXT: v_perm_b32 v4, v46, v22, s4
; GFX9-NEXT: v_or_b32_e32 v3, v4, v3
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:56
+; GFX9-NEXT: v_perm_b32 v4, v51, v16, s4
+; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
+; GFX9-NEXT: v_perm_b32 v3, v53, v23, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: v_perm_b32 v3, v45, v12, s4
+; GFX9-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX9-NEXT: v_perm_b32 v3, v55, v8, s4
+; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
+; GFX9-NEXT: v_perm_b32 v2, v43, v11, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_perm_b32 v2, v41, v7, s4
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX9-NEXT: v_perm_b32 v2, v6, v10, s4
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; GFX9-NEXT: v_perm_b32 v1, v40, v15, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
@@ -91331,316 +91371,292 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:56
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:104
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:92
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:112
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v5
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v7
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v11
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v15
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13
-; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v19
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v21
-; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v23
-; SI-NEXT: v_lshlrev_b32_e32 v50, 24, v27
-; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v29
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; kill: killed $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v5
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v15
+; SI-NEXT: v_lshlrev_b32_e32 v50, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v21
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v23
+; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v27
+; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v29
+; SI-NEXT: ; kill: killed $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; kill: killed $vgpr13
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v1
-; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v2
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v4
-; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v6
-; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v8
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v12
-; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v17
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:40
-; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v20
-; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v24
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v26
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:8
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v14, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v22
+; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v2
+; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v9
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v10
+; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v12
+; SI-NEXT: v_lshlrev_b32_e32 v30, 24, v16
+; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v31
+; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v32
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:84
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:40
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v32, v59, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v4, v4, v14
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v26, v6, v4
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
+; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_or_b32_e32 v13, v13, v35
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v11, v11, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v15, v19, v15
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: v_or_b32_e32 v23, v13, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v27, v13, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_or_b32_e32 v11, v11, v38
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_or_b32_e32 v13, v13, v54
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v49, v13, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v13, v38, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: v_or_b32_e32 v51, v13, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v53, v36, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v27, v50, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_or_b32_e32 v11, v11, v52
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v40, v48, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_or_b32_e32 v13, v13, v46
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v41, v13, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v45, v50, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
-; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v39, v41, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_or_b32_e32 v11, v11, v44
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v48, v15, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v36
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v47, v55, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v35
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v58, v13, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v17
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v51, v43, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v60, v42, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v37
-; SI-NEXT: v_or_b32_e32 v11, v11, v62
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_or_b32_e32 v13, v13, v62
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v63, v56, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v39
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: v_or_b32_e32 v13, v1, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v30, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v0, v0, v3
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v55, v57, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v42, v15, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v34
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v44, v60, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v52
+; SI-NEXT: v_or_b32_e32 v0, v13, v0
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v47, v6, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v40
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v20
+; SI-NEXT: v_or_b32_e32 v56, v6, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v58, v14, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v11
+; SI-NEXT: v_or_b32_e32 v0, v0, v17
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v63, v30, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v9
+; SI-NEXT: v_or_b32_e32 v13, v4, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v31, v12, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v43
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v24, v28, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_or_b32_e32 v22, v7, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v31
-; SI-NEXT: v_or_b32_e32 v16, v1, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v57
+; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v18
+; SI-NEXT: v_or_b32_e32 v26, v2, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v20, v9, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v25
-; SI-NEXT: v_or_b32_e32 v0, v0, v19
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v18
+; SI-NEXT: v_or_b32_e32 v19, v10, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v28
+; SI-NEXT: v_or_b32_e32 v0, v0, v23
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v34, v21, v0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_or_b32_e32 v25, v33, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -91686,212 +91702,223 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; kill: killed $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: .LBB110_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v7
-; SI-NEXT: s_movk_i32 s6, 0x300
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v5
+; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v12
-; SI-NEXT: v_or_b32_e32 v1, v14, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v6, v2
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v39
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v17
-; SI-NEXT: v_or_b32_e32 v2, v5, v2
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_or_b32_e32 v1, v10, v1
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_or_b32_e32 v2, v2, v10
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v61
+; SI-NEXT: s_movk_i32 s6, 0x300
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v59, v4
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v37
+; SI-NEXT: v_or_b32_e32 v7, v7, v10
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
+; SI-NEXT: v_or_b32_e32 v2, v7, v2
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: v_or_b32_e32 v4, v62, v4
+; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v9
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_or_b32_e32 v4, v7, v4
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v3, v3, v8
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v43
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v8, v28, v8
-; SI-NEXT: v_or_b32_e32 v3, v8, v3
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v25
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v18
-; SI-NEXT: v_or_b32_e32 v11, v19, v11
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x300, v11
-; SI-NEXT: v_or_b32_e32 v13, v21, v13
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v31
-; SI-NEXT: v_or_b32_e32 v13, v13, v10
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x3000000, v11
-; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v57
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v9, v9, v13
-; SI-NEXT: v_or_b32_e32 v9, v9, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v9
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v3
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v1
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x3000000, v2
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v2
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v1
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v0
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v3
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v3, v12, v3
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v11
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
+; SI-NEXT: v_or_b32_e32 v4, v17, v4
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_or_b32_e32 v5, v56, v5
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v5, v30, v5
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v35
+; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
-; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v20
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v16
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v14, v7
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v52
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_or_b32_e32 v0, v0, v7
+; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v37
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v6, v6, v7
+; SI-NEXT: v_or_b32_e32 v0, v6, v0
+; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v49
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v36
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v34
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_or_b32_e32 v7, v60, v7
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v28
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
+; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v24
+; SI-NEXT: v_or_b32_e32 v13, v23, v13
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_add_i32_e32 v13, vcc, 0x300, v13
+; SI-NEXT: v_or_b32_e32 v15, v33, v15
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
+; SI-NEXT: v_or_b32_e32 v13, v15, v13
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v18
+; SI-NEXT: v_or_b32_e32 v15, v15, v8
+; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v13
+; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v15
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v1, v1, v13
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v1
+; SI-NEXT: v_add_i32_e32 v2, vcc, 0x3000000, v2
+; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v3
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v4
+; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v5
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x3000000, v0
+; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v6
+; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v6
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v6
+; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v0
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v0
+; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v5
+; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v5
; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v4
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v4
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v3
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v1
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v1
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v8
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v8
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: v_or_b32_e32 v7, v55, v7
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v4
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v9
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v10
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v10
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
+; SI-NEXT: v_or_b32_e32 v7, v62, v7
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v9, v57, v9
+; SI-NEXT: v_or_b32_e32 v7, v9, v7
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v7
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v7
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v7
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v8
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v48, v11
+; SI-NEXT: v_or_b32_e32 v11, v41, v11
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v12
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v6, v42, v6
-; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x3000000, v5
-; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v5
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v6, v44, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x3000000, v6
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v13, v38, v13
; SI-NEXT: v_lshlrev_b32_e32 v14, 8, v14
-; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v6
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v6
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v8, v50, v8
-; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x3000000, v7
-; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v7
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v7
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v43, v10
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v9
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v9
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v9
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v8, v52, v8
-; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v11, v8
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_or_b32_e32 v10, v46, v10
+; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x3000000, v8
-; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v8
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v8
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x3000000, v10
+; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v10
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
@@ -91903,24 +91930,22 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_or_b32_e32 v12, v36, v12
+; SI-NEXT: v_or_b32_e32 v12, v50, v12
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v11
-; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v11
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v11
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
-; SI-NEXT: v_or_b32_e32 v12, v38, v12
+; SI-NEXT: v_or_b32_e32 v12, v54, v12
; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v12
-; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v12
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v12
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
@@ -91935,23 +91960,18 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v13
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v13
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
+; SI-NEXT: v_or_b32_e32 v14, v35, v14
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
+; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
@@ -91975,70 +91995,100 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v15
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v14
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v13
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v12
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v9
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v2
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: .LBB110_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v23
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v29
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v51
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v54
-; SI-NEXT: v_mul_f32_e32 v7, 1.0, v41
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v46
-; SI-NEXT: v_mul_f32_e32 v9, 1.0, v58
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v61
-; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v22
-; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v48
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v53
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_mul_f32_e32 v9, 1.0, v42
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v45
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_mul_f32_e32 v11, 1.0, v56
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e32 v12, 1.0, v59
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13
; SI-NEXT: v_mul_f32_e32 v14, 1.0, v15
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v16
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v33
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_mul_f32_e32 v15, 1.0, v26
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v21
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_alignbit_b32 v1, v1, v2, 16
-; SI-NEXT: v_mul_f32_e32 v2, 1.0, v27
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; SI-NEXT: v_alignbit_b32 v2, v2, v3, 16
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v49
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_alignbit_b32 v3, v3, v4, 16
-; SI-NEXT: v_mul_f32_e32 v4, 1.0, v53
+; SI-NEXT: v_mul_f32_e32 v4, 1.0, v27
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_alignbit_b32 v4, v4, v5, 16
-; SI-NEXT: v_mul_f32_e32 v5, 1.0, v40
+; SI-NEXT: v_mul_f32_e32 v5, 1.0, v39
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_alignbit_b32 v5, v5, v6, 16
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v45
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v51
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_alignbit_b32 v6, v6, v7, 16
-; SI-NEXT: v_mul_f32_e32 v7, 1.0, v47
+; SI-NEXT: v_mul_f32_e32 v7, 1.0, v55
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_alignbit_b32 v7, v7, v8, 16
-; SI-NEXT: v_mul_f32_e32 v8, 1.0, v60
+; SI-NEXT: v_mul_f32_e32 v8, 1.0, v44
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_alignbit_b32 v8, v8, v9, 16
-; SI-NEXT: v_mul_f32_e32 v9, 1.0, v63
+; SI-NEXT: v_mul_f32_e32 v9, 1.0, v47
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_alignbit_b32 v9, v9, v10, 16
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v58
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_alignbit_b32 v10, v10, v11, 16
+; SI-NEXT: v_mul_f32_e32 v11, 1.0, v63
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
@@ -92055,24 +92105,18 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_alignbit_b32 v9, v9, v10, 16
-; SI-NEXT: v_mul_f32_e32 v10, 1.0, v32
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_alignbit_b32 v10, v10, v11, 16
-; SI-NEXT: v_mul_f32_e32 v11, 1.0, v26
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_alignbit_b32 v11, v11, v12, 16
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v30
+; SI-NEXT: v_mul_f32_e32 v12, 1.0, v31
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_alignbit_b32 v12, v12, v13, 16
-; SI-NEXT: v_mul_f32_e32 v13, 1.0, v24
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v22
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_alignbit_b32 v13, v13, v14, 16
-; SI-NEXT: v_mul_f32_e32 v14, 1.0, v20
+; SI-NEXT: v_mul_f32_e32 v14, 1.0, v19
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_alignbit_b32 v14, v14, v15, 16
-; SI-NEXT: v_mul_f32_e32 v15, 1.0, v34
+; SI-NEXT: v_mul_f32_e32 v15, 1.0, v25
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: v_alignbit_b32 v15, v15, v16, 16
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -93830,380 +93874,378 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32
; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane
-; SI-NEXT: v_readfirstlane_b32 s7, v1
-; SI-NEXT: v_readfirstlane_b32 s5, v5
-; SI-NEXT: v_readfirstlane_b32 s95, v30
-; SI-NEXT: v_readfirstlane_b32 s63, v29
-; SI-NEXT: v_readfirstlane_b32 s72, v28
-; SI-NEXT: v_readfirstlane_b32 s76, v27
-; SI-NEXT: v_readfirstlane_b32 s88, v26
-; SI-NEXT: v_readfirstlane_b32 s59, v25
-; SI-NEXT: v_readfirstlane_b32 s60, v24
-; SI-NEXT: v_readfirstlane_b32 s62, v23
-; SI-NEXT: v_readfirstlane_b32 s73, v22
-; SI-NEXT: v_readfirstlane_b32 s47, v21
-; SI-NEXT: v_readfirstlane_b32 s56, v20
-; SI-NEXT: v_readfirstlane_b32 s58, v19
-; SI-NEXT: v_readfirstlane_b32 s61, v18
-; SI-NEXT: v_readfirstlane_b32 s43, v17
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: v_readfirstlane_b32 s46, v15
-; SI-NEXT: v_readfirstlane_b32 s57, v14
+; SI-NEXT: v_readfirstlane_b32 s37, v30
+; SI-NEXT: v_readfirstlane_b32 s30, v29
+; SI-NEXT: v_readfirstlane_b32 s31, v28
+; SI-NEXT: v_readfirstlane_b32 s35, v27
+; SI-NEXT: v_readfirstlane_b32 s36, v26
+; SI-NEXT: v_readfirstlane_b32 s90, v25
+; SI-NEXT: v_readfirstlane_b32 s91, v24
+; SI-NEXT: v_readfirstlane_b32 s4, v23
+; SI-NEXT: v_readfirstlane_b32 s34, v22
+; SI-NEXT: v_readfirstlane_b32 s63, v21
+; SI-NEXT: v_readfirstlane_b32 s72, v20
+; SI-NEXT: v_readfirstlane_b32 s78, v19
+; SI-NEXT: v_readfirstlane_b32 s92, v18
+; SI-NEXT: v_readfirstlane_b32 s45, v17
+; SI-NEXT: v_readfirstlane_b32 s46, v16
+; SI-NEXT: v_readfirstlane_b32 s60, v15
+; SI-NEXT: v_readfirstlane_b32 s73, v14
; SI-NEXT: v_readfirstlane_b32 s15, v13
; SI-NEXT: v_readfirstlane_b32 s40, v12
-; SI-NEXT: v_readfirstlane_b32 s42, v11
-; SI-NEXT: v_readfirstlane_b32 s45, v10
+; SI-NEXT: v_readfirstlane_b32 s43, v11
+; SI-NEXT: v_readfirstlane_b32 s47, v10
; SI-NEXT: v_readfirstlane_b32 s11, v9
; SI-NEXT: v_readfirstlane_b32 s12, v8
; SI-NEXT: v_readfirstlane_b32 s14, v7
; SI-NEXT: v_readfirstlane_b32 s41, v6
-; SI-NEXT: v_readfirstlane_b32 s6, v4
-; SI-NEXT: v_readfirstlane_b32 s97, v3
+; SI-NEXT: v_readfirstlane_b32 s5, v5
+; SI-NEXT: v_readfirstlane_b32 s98, v4
+; SI-NEXT: v_readfirstlane_b32 s10, v3
; SI-NEXT: v_readfirstlane_b32 s13, v2
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; SI-NEXT: s_and_b64 s[8:9], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 s8, v0
-; SI-NEXT: v_writelane_b32 v44, s8, 0
-; SI-NEXT: v_writelane_b32 v44, s7, 1
-; SI-NEXT: v_readfirstlane_b32 s55, v32
-; SI-NEXT: v_readfirstlane_b32 s54, v33
-; SI-NEXT: v_readfirstlane_b32 s64, v34
-; SI-NEXT: v_readfirstlane_b32 s65, v35
-; SI-NEXT: v_readfirstlane_b32 s51, v36
+; SI-NEXT: s_and_b64 s[6:7], vcc, exec
+; SI-NEXT: v_readfirstlane_b32 s7, v0
+; SI-NEXT: v_readfirstlane_b32 s6, v1
+; SI-NEXT: v_writelane_b32 v44, s7, 0
+; SI-NEXT: v_readfirstlane_b32 s70, v32
+; SI-NEXT: v_readfirstlane_b32 s69, v33
+; SI-NEXT: v_readfirstlane_b32 s71, v34
+; SI-NEXT: v_readfirstlane_b32 s80, v35
+; SI-NEXT: v_readfirstlane_b32 s66, v36
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s50, v37
+; SI-NEXT: v_readfirstlane_b32 s65, v37
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s52, v38
+; SI-NEXT: v_readfirstlane_b32 s67, v38
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s53, v39
+; SI-NEXT: v_readfirstlane_b32 s68, v39
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_readfirstlane_b32 s39, v48
+; SI-NEXT: v_readfirstlane_b32 s54, v48
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s38, v49
+; SI-NEXT: v_readfirstlane_b32 s53, v49
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_readfirstlane_b32 s48, v50
+; SI-NEXT: v_readfirstlane_b32 s55, v50
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s49, v51
+; SI-NEXT: v_readfirstlane_b32 s64, v51
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_readfirstlane_b32 s35, v52
+; SI-NEXT: v_readfirstlane_b32 s50, v52
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s34, v53
+; SI-NEXT: v_readfirstlane_b32 s49, v53
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s36, v54
+; SI-NEXT: v_readfirstlane_b32 s51, v54
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s37, v55
+; SI-NEXT: v_readfirstlane_b32 s52, v55
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 s30, v40
+; SI-NEXT: v_readfirstlane_b32 s39, v40
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s4, v41
+; SI-NEXT: v_readfirstlane_b32 s38, v41
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s31, v42
+; SI-NEXT: v_readfirstlane_b32 s48, v42
+; SI-NEXT: v_writelane_b32 v44, s6, 1
; SI-NEXT: v_writelane_b32 v44, s5, 2
-; SI-NEXT: v_writelane_b32 v44, s6, 3
; SI-NEXT: s_cbranch_scc0 .LBB111_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s9, s16, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s17, 24
-; SI-NEXT: s_or_b32 s74, s10, s9
-; SI-NEXT: s_and_b32 s9, s18, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s19, 24
-; SI-NEXT: s_or_b32 s77, s10, s9
-; SI-NEXT: s_and_b32 s9, s20, 0xff
-; SI-NEXT: s_lshl_b32 s10, s21, 8
-; SI-NEXT: s_or_b32 s10, s9, s10
+; SI-NEXT: s_and_b32 s8, s16, 0xff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s9, s17, 24
+; SI-NEXT: s_or_b32 s42, s9, s8
+; SI-NEXT: s_and_b32 s8, s18, 0xff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s9, s19, 24
+; SI-NEXT: s_or_b32 s56, s9, s8
+; SI-NEXT: s_and_b32 s8, s20, 0xff
+; SI-NEXT: s_lshl_b32 s9, s21, 8
+; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s22, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s75, s23, 24
-; SI-NEXT: s_or_b32 s78, s75, s9
+; SI-NEXT: s_lshl_b32 s44, s23, 24
+; SI-NEXT: s_or_b32 s57, s44, s9
; SI-NEXT: s_and_b32 s9, s24, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s75, s25, 24
-; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_or_b32 s75, s75, s9
+; SI-NEXT: s_lshl_b32 s44, s25, 24
+; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: s_or_b32 s44, s44, s9
; SI-NEXT: s_and_b32 s9, s26, 0xff
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s58, s27, 24
+; SI-NEXT: s_or_b32 s61, s6, s7
+; SI-NEXT: s_and_b32 s6, s13, 0xff
+; SI-NEXT: s_or_b32 s59, s58, s9
+; SI-NEXT: s_and_b32 s9, s28, 0xff
+; SI-NEXT: s_lshl_b32 s58, s29, 8
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s7, s10, 24
+; SI-NEXT: s_or_b32 s81, s9, s58
+; SI-NEXT: s_or_b32 s58, s7, s6
+; SI-NEXT: s_and_b32 s6, s98, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s5, s5, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s79, s27, 24
-; SI-NEXT: s_or_b32 s90, s7, s8
-; SI-NEXT: s_and_b32 s7, s13, 0xff
-; SI-NEXT: s_or_b32 s92, s5, s6
+; SI-NEXT: s_or_b32 s74, s5, s6
; SI-NEXT: s_and_b32 s5, s41, 0xff
; SI-NEXT: s_lshl_b32 s6, s14, 8
-; SI-NEXT: s_or_b32 s89, s79, s9
-; SI-NEXT: s_and_b32 s9, s28, 0xff
-; SI-NEXT: s_lshl_b32 s79, s29, 8
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s97, 24
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s6, s12, 0xff
-; SI-NEXT: s_or_b32 s66, s9, s79
-; SI-NEXT: s_or_b32 s79, s8, s7
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s11, 24
-; SI-NEXT: s_or_b32 s93, s7, s6
-; SI-NEXT: s_and_b32 s6, s45, 0xff
+; SI-NEXT: s_or_b32 s75, s7, s6
+; SI-NEXT: s_and_b32 s6, s47, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s42, 24
-; SI-NEXT: s_or_b32 s91, s7, s6
+; SI-NEXT: s_lshl_b32 s7, s43, 24
+; SI-NEXT: s_or_b32 s62, s7, s6
; SI-NEXT: s_and_b32 s6, s40, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s15, 24
-; SI-NEXT: s_or_b32 vcc_lo, s7, s6
-; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: s_lshl_b32 s7, s46, 8
-; SI-NEXT: s_or_b32 s69, s6, s7
-; SI-NEXT: s_and_b32 s6, s44, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s43, 24
-; SI-NEXT: s_or_b32 vcc_hi, s7, s6
-; SI-NEXT: s_and_b32 s6, s61, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s58, 24
-; SI-NEXT: s_or_b32 s94, s7, s6
-; SI-NEXT: s_and_b32 s6, s56, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s47, 24
-; SI-NEXT: s_or_b32 s87, s7, s6
+; SI-NEXT: s_or_b32 s77, s7, s6
; SI-NEXT: s_and_b32 s6, s73, 0xff
-; SI-NEXT: s_lshl_b32 s7, s62, 8
-; SI-NEXT: s_or_b32 s81, s6, s7
-; SI-NEXT: s_and_b32 s6, s60, 0xff
+; SI-NEXT: s_lshl_b32 s7, s60, 8
+; SI-NEXT: s_or_b32 s84, s6, s7
+; SI-NEXT: s_and_b32 s6, s46, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s59, 24
-; SI-NEXT: s_or_b32 s86, s7, s6
-; SI-NEXT: s_and_b32 s6, s88, 0xff
+; SI-NEXT: s_lshl_b32 s7, s45, 24
+; SI-NEXT: s_or_b32 s79, s7, s6
+; SI-NEXT: s_and_b32 s6, s92, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s76, 24
-; SI-NEXT: s_or_b32 s83, s7, s6
+; SI-NEXT: s_lshl_b32 s7, s78, 24
+; SI-NEXT: s_or_b32 s76, s7, s6
; SI-NEXT: s_and_b32 s6, s72, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s63, 24
-; SI-NEXT: s_or_b32 s84, s7, s6
-; SI-NEXT: s_and_b32 s6, s95, 0xff
-; SI-NEXT: s_lshl_b32 s7, s31, 8
-; SI-NEXT: s_or_b32 s98, s6, s7
+; SI-NEXT: s_or_b32 s89, s7, s6
+; SI-NEXT: s_and_b32 s7, s34, 0xff
; SI-NEXT: s_mov_b32 s6, s4
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s7, s30, 24
-; SI-NEXT: s_or_b32 s82, s7, s4
-; SI-NEXT: s_and_b32 s4, s37, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s7, s36, 24
-; SI-NEXT: s_or_b32 s71, s7, s4
-; SI-NEXT: s_and_b32 s4, s34, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s7, s35, 24
-; SI-NEXT: s_or_b32 s80, s7, s4
-; SI-NEXT: s_and_b32 s4, s49, 0xff
-; SI-NEXT: s_lshl_b32 s7, s48, 8
-; SI-NEXT: s_or_b32 s4, s4, s7
+; SI-NEXT: s_lshl_b32 s4, s4, 8
+; SI-NEXT: s_or_b32 s4, s7, s4
+; SI-NEXT: s_and_b32 s7, s91, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s90, 24
+; SI-NEXT: s_or_b32 s93, s9, s7
+; SI-NEXT: s_and_b32 s7, s36, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s35, 24
+; SI-NEXT: s_or_b32 s88, s9, s7
+; SI-NEXT: s_and_b32 s7, s31, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s30, 24
+; SI-NEXT: s_or_b32 s95, s9, s7
+; SI-NEXT: s_and_b32 s7, s37, 0xff
+; SI-NEXT: s_lshl_b32 s9, s48, 8
+; SI-NEXT: s_or_b32 s86, s7, s9
; SI-NEXT: s_and_b32 s7, s38, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s39, 24
-; SI-NEXT: s_or_b32 s70, s8, s7
+; SI-NEXT: s_lshl_b32 s9, s39, 24
+; SI-NEXT: s_or_b32 vcc_lo, s9, s7
+; SI-NEXT: s_and_b32 s7, s52, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s51, 24
+; SI-NEXT: s_or_b32 s94, s9, s7
+; SI-NEXT: s_and_b32 s7, s49, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s50, 24
+; SI-NEXT: s_or_b32 s85, s9, s7
+; SI-NEXT: s_and_b32 s7, s64, 0xff
+; SI-NEXT: s_lshl_b32 s9, s55, 8
+; SI-NEXT: s_or_b32 s97, s7, s9
; SI-NEXT: s_and_b32 s7, s53, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s52, 24
-; SI-NEXT: s_or_b32 s67, s8, s7
-; SI-NEXT: s_and_b32 s7, s50, 0xff
+; SI-NEXT: s_lshl_b32 s9, s54, 24
+; SI-NEXT: s_or_b32 s83, s9, s7
+; SI-NEXT: s_and_b32 s7, s68, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s51, 24
-; SI-NEXT: s_or_b32 s68, s8, s7
+; SI-NEXT: s_lshl_b32 s9, s67, 24
+; SI-NEXT: s_or_b32 vcc_hi, s9, s7
; SI-NEXT: s_and_b32 s7, s65, 0xff
-; SI-NEXT: s_lshl_b32 s8, s64, 8
-; SI-NEXT: s_or_b32 s99, s7, s8
-; SI-NEXT: s_and_b32 s7, s54, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s55, 24
-; SI-NEXT: s_or_b32 s9, s8, s7
-; SI-NEXT: s_lshl_b32 s7, s10, 16
-; SI-NEXT: s_lshl_b32 s66, s66, 16
+; SI-NEXT: s_lshl_b32 s9, s66, 24
+; SI-NEXT: s_or_b32 s82, s9, s7
+; SI-NEXT: s_and_b32 s7, s80, 0xff
+; SI-NEXT: s_lshl_b32 s9, s71, 8
+; SI-NEXT: s_or_b32 s99, s7, s9
+; SI-NEXT: s_and_b32 s7, s69, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s70, 24
+; SI-NEXT: s_or_b32 s9, s9, s7
+; SI-NEXT: s_lshl_b32 s7, s8, 16
+; SI-NEXT: s_lshl_b32 s81, s81, 16
; SI-NEXT: s_lshl_b32 s8, s5, 16
-; SI-NEXT: s_lshl_b32 s96, s69, 16
-; SI-NEXT: s_lshl_b32 s85, s81, 16
-; SI-NEXT: s_lshl_b32 s81, s98, 16
-; SI-NEXT: s_lshl_b32 s69, s4, 16
-; SI-NEXT: s_lshl_b32 s10, s99, 16
+; SI-NEXT: s_lshl_b32 s96, s84, 16
+; SI-NEXT: s_lshl_b32 s87, s4, 16
+; SI-NEXT: s_lshl_b32 s86, s86, 16
+; SI-NEXT: s_lshl_b32 s84, s97, 16
+; SI-NEXT: s_lshl_b32 s97, s99, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB111_3
; SI-NEXT: .LBB111_2:
; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr7
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $sgpr87
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr87
; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr83
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr97
; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: .LBB111_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
-; SI-NEXT: s_mov_b32 s5, s9
-; SI-NEXT: s_mov_b32 s9, s8
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_mov_b32 s8, s7
-; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s5, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, s8
; SI-NEXT: s_cbranch_scc1 .LBB111_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s65, s65, 3
-; SI-NEXT: s_and_b32 s4, s65, 0xff
-; SI-NEXT: s_lshl_b32 s5, s64, 8
-; SI-NEXT: s_add_i32 s54, s54, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
+; SI-NEXT: s_and_b32 s4, s80, 0xff
+; SI-NEXT: s_lshl_b32 s5, s71, 8
+; SI-NEXT: s_add_i32 s69, s69, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s7, s54, 0xff
+; SI-NEXT: s_and_b32 s7, s69, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
-; SI-NEXT: s_lshl_b32 s5, s55, 24
+; SI-NEXT: s_lshl_b32 s5, s70, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: s_add_i32 s53, s53, 3
+; SI-NEXT: s_add_i32 s68, s68, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s53, 0xff
-; SI-NEXT: s_lshl_b32 s7, s52, 8
-; SI-NEXT: s_add_i32 s50, s50, 3
+; SI-NEXT: s_and_b32 s5, s68, 0xff
+; SI-NEXT: s_lshl_b32 s7, s67, 8
+; SI-NEXT: s_add_i32 s65, s65, 3
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: s_and_b32 s8, s50, 0xff
+; SI-NEXT: s_and_b32 s8, s65, 0xff
; SI-NEXT: s_addk_i32 s5, 0x300
-; SI-NEXT: s_lshl_b32 s7, s51, 24
+; SI-NEXT: s_lshl_b32 s7, s66, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s7, s8
-; SI-NEXT: s_add_i32 s49, s49, 3
+; SI-NEXT: s_add_i32 s64, s64, 3
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: s_and_b32 s7, s49, 0xff
-; SI-NEXT: s_lshl_b32 s8, s48, 8
-; SI-NEXT: s_add_i32 s38, s38, 3
+; SI-NEXT: s_and_b32 s7, s64, 0xff
+; SI-NEXT: s_lshl_b32 s8, s55, 8
+; SI-NEXT: s_add_i32 s53, s53, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s9, s38, 0xff
+; SI-NEXT: s_and_b32 s9, s53, 0xff
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s8, s39, 24
+; SI-NEXT: s_lshl_b32 s8, s54, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_add_i32 s52, s52, 3
+; SI-NEXT: s_or_b32 s8, s8, s7
+; SI-NEXT: s_and_b32 s7, s52, 0xff
+; SI-NEXT: s_lshl_b32 s9, s51, 8
+; SI-NEXT: s_add_i32 s49, s49, 3
+; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_and_b32 s42, s49, 0xff
+; SI-NEXT: s_addk_i32 s7, 0x300
+; SI-NEXT: s_lshl_b32 s9, s50, 24
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_or_b32 s9, s9, s42
+; SI-NEXT: s_or_b32 s7, s9, s7
; SI-NEXT: s_add_i32 s37, s37, 3
-; SI-NEXT: s_or_b32 s38, s8, s7
+; SI-NEXT: s_add_i32 s94, s7, 0x3000000
; SI-NEXT: s_and_b32 s7, s37, 0xff
-; SI-NEXT: s_lshl_b32 s8, s36, 8
-; SI-NEXT: s_add_i32 s34, s34, 3
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s9, s34, 0xff
+; SI-NEXT: s_lshl_b32 s9, s48, 8
+; SI-NEXT: s_add_i32 s38, s38, 3
+; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_and_b32 s42, s38, 0xff
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s8, s35, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s9, s39, 24
+; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_add_i32 s95, s95, 3
-; SI-NEXT: s_add_i32 s9, s7, 0x3000000
-; SI-NEXT: s_and_b32 s7, s95, 0xff
-; SI-NEXT: s_lshl_b32 s8, s31, 8
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_or_b32 s9, s9, s42
+; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_add_i32 s36, s36, 3
+; SI-NEXT: s_add_i32 vcc_hi, s7, 0x3000000
+; SI-NEXT: s_and_b32 s7, s36, 0xff
+; SI-NEXT: s_lshl_b32 s9, s35, 8
+; SI-NEXT: s_add_i32 s31, s31, 3
+; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_and_b32 s42, s31, 0xff
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s8, s30, 24
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s9, s30, 24
+; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_or_b32 s9, s9, s42
+; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s88, s7, 0x3000000
+; SI-NEXT: s_and_b32 s7, s34, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_add_i32 s91, s91, 3
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_add_i32 s88, s88, 3
-; SI-NEXT: s_add_i32 s10, s6, 0x3000000
-; SI-NEXT: s_and_b32 s6, s88, 0xff
-; SI-NEXT: s_lshl_b32 s7, s76, 8
+; SI-NEXT: s_and_b32 s9, s91, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s7, s90, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s92, s92, 3
+; SI-NEXT: s_add_i32 s90, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s92, 0xff
+; SI-NEXT: s_lshl_b32 s7, s78, 8
; SI-NEXT: s_add_i32 s72, s72, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s72, 0xff
+; SI-NEXT: s_and_b32 s9, s72, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s63, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s73, s73, 3
; SI-NEXT: s_add_i32 s63, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s73, 0xff
-; SI-NEXT: s_lshl_b32 s7, s62, 8
-; SI-NEXT: s_add_i32 s60, s60, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s60, 0xff
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s59, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s61, s61, 3
-; SI-NEXT: s_add_i32 s59, s6, 0x3000000
-; SI-NEXT: s_and_b32 s6, s61, 0xff
-; SI-NEXT: s_lshl_b32 s7, s58, 8
-; SI-NEXT: s_add_i32 s56, s56, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s56, 0xff
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s47, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s57, s57, 3
-; SI-NEXT: s_add_i32 s47, s6, 0x3000000
-; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: s_lshl_b32 s7, s46, 8
-; SI-NEXT: s_add_i32 s44, s44, 3
+; SI-NEXT: s_lshl_b32 s7, s60, 8
+; SI-NEXT: s_add_i32 s46, s46, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s44, 0xff
+; SI-NEXT: s_and_b32 s9, s46, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s43, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s7, s45, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: s_add_i32 s43, s6, 0x3000000
-; SI-NEXT: s_and_b32 s6, s45, 0xff
-; SI-NEXT: s_lshl_b32 s7, s42, 8
+; SI-NEXT: s_add_i32 s47, s47, 3
+; SI-NEXT: s_add_i32 s45, s6, 0x3000000
+; SI-NEXT: s_and_b32 s6, s47, 0xff
+; SI-NEXT: s_lshl_b32 s7, s43, 8
; SI-NEXT: s_add_i32 s40, s40, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s40, 0xff
+; SI-NEXT: s_and_b32 s9, s40, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s15, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s41, s41, 3
; SI-NEXT: s_add_i32 s15, s6, 0x3000000
@@ -94211,185 +94253,184 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a,
; SI-NEXT: s_lshl_b32 s7, s14, 8
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s12, 0xff
+; SI-NEXT: s_and_b32 s9, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s11, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s7, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s13, 0xff
-; SI-NEXT: s_lshl_b32 s8, s97, 8
-; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_lshl_b32 s9, s10, 8
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_and_b32 s8, s6, 0xffff
+; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: s_and_b32 s9, s6, 0xffff
; SI-NEXT: v_readlane_b32 s6, v44, 2
-; SI-NEXT: s_lshl_b32 s11, s6, 24
-; SI-NEXT: v_readlane_b32 s6, v44, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_or_b32 s6, s11, s6
-; SI-NEXT: s_or_b32 s6, s6, s8
+; SI-NEXT: s_and_b32 s10, s98, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_or_b32 s6, s6, s10
+; SI-NEXT: s_or_b32 s6, s6, s9
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_add_i32 s11, s6, 0x3000000
+; SI-NEXT: s_add_i32 s10, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s28, 0xff
-; SI-NEXT: s_lshl_b32 s8, s29, 8
-; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_lshl_b32 s9, s29, 8
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_and_b32 s8, s6, 0xffff
+; SI-NEXT: s_and_b32 s9, s6, 0xffff
; SI-NEXT: v_readlane_b32 s6, v44, 1
-; SI-NEXT: s_lshl_b32 s12, s6, 24
+; SI-NEXT: s_lshl_b32 s11, s6, 24
; SI-NEXT: v_readlane_b32 s6, v44, 0
; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_or_b32 s6, s12, s6
+; SI-NEXT: s_or_b32 s6, s11, s6
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s24, 0xff
-; SI-NEXT: s_lshl_b32 s12, s25, 8
+; SI-NEXT: s_or_b32 s6, s6, s9
+; SI-NEXT: s_and_b32 s9, s24, 0xff
+; SI-NEXT: s_lshl_b32 s11, s25, 8
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_or_b32 s8, s12, s8
-; SI-NEXT: s_and_b32 s13, s26, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s12, s27, 24
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_or_b32 s8, s12, s8
+; SI-NEXT: s_or_b32 s9, s11, s9
+; SI-NEXT: s_and_b32 s12, s26, 0xff
+; SI-NEXT: s_addk_i32 s9, 0x300
+; SI-NEXT: s_lshl_b32 s11, s27, 24
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_or_b32 s11, s11, s12
+; SI-NEXT: s_or_b32 s9, s11, s9
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_add_i32 s12, s8, 0x3000000
-; SI-NEXT: s_and_b32 s8, s20, 0xff
-; SI-NEXT: s_lshl_b32 s13, s21, 8
+; SI-NEXT: s_add_i32 s11, s9, 0x3000000
+; SI-NEXT: s_and_b32 s9, s20, 0xff
+; SI-NEXT: s_lshl_b32 s12, s21, 8
; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_or_b32 s8, s13, s8
-; SI-NEXT: s_and_b32 s14, s22, 0xff
-; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s13, s23, 24
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s9, s12, s9
+; SI-NEXT: s_and_b32 s13, s22, 0xff
+; SI-NEXT: s_addk_i32 s9, 0x300
+; SI-NEXT: s_lshl_b32 s12, s23, 24
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s8, s13, s8
-; SI-NEXT: s_and_b32 s13, s16, 0xff
-; SI-NEXT: s_lshl_b32 s14, s17, 8
+; SI-NEXT: s_or_b32 s9, s12, s9
+; SI-NEXT: s_and_b32 s12, s16, 0xff
+; SI-NEXT: s_lshl_b32 s13, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s16, s18, 0xff
-; SI-NEXT: s_addk_i32 s13, 0x300
-; SI-NEXT: s_lshl_b32 s14, s19, 24
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: s_or_b32 s13, s14, s13
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_and_b32 s14, s18, 0xff
+; SI-NEXT: s_addk_i32 s12, 0x300
+; SI-NEXT: s_lshl_b32 s13, s19, 24
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_and_b32 s12, s12, 0xffff
+; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
-; SI-NEXT: s_add_i32 s38, s38, 0x3000000
-; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: s_add_i32 s8, s8, 0x3000000
-; SI-NEXT: s_add_i32 s13, s13, 0x3000000
-; SI-NEXT: s_and_b32 s77, s13, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s13, 16
-; SI-NEXT: s_and_b32 s78, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s89, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s75, s12, 16
-; SI-NEXT: s_and_b32 s90, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s66, s6, 16
-; SI-NEXT: s_and_b32 s92, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s79, s11, 16
-; SI-NEXT: s_and_b32 s93, s7, 0xffff0000
+; SI-NEXT: s_add_i32 s6, s6, 0x3000000
+; SI-NEXT: s_add_i32 s9, s9, 0x3000000
+; SI-NEXT: s_add_i32 s12, s12, 0x3000000
+; SI-NEXT: s_and_b32 s56, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s42, s12, 16
+; SI-NEXT: s_and_b32 s57, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_and_b32 s59, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s44, s11, 16
+; SI-NEXT: s_and_b32 s61, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s81, s6, 16
+; SI-NEXT: s_and_b32 s74, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s58, s10, 16
+; SI-NEXT: s_and_b32 s75, s7, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_and_b32 vcc_lo, s15, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s15, 16
-; SI-NEXT: s_and_b32 vcc_hi, s43, 0xffff0000
-; SI-NEXT: s_lshl_b32 s96, s43, 16
-; SI-NEXT: s_and_b32 s87, s47, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s47, 16
-; SI-NEXT: s_and_b32 s86, s59, 0xffff0000
-; SI-NEXT: s_lshl_b32 s85, s59, 16
-; SI-NEXT: s_and_b32 s84, s63, 0xffff0000
-; SI-NEXT: s_lshl_b32 s83, s63, 16
-; SI-NEXT: s_and_b32 s82, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s81, s10, 16
-; SI-NEXT: s_and_b32 s80, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s71, s9, 16
-; SI-NEXT: s_and_b32 s70, s38, 0xffff0000
-; SI-NEXT: s_lshl_b32 s69, s38, 16
-; SI-NEXT: s_and_b32 s68, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s67, s5, 16
+; SI-NEXT: s_and_b32 s77, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s15, 16
+; SI-NEXT: s_and_b32 s79, s45, 0xffff0000
+; SI-NEXT: s_lshl_b32 s96, s45, 16
+; SI-NEXT: s_and_b32 s89, s63, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s63, 16
+; SI-NEXT: s_and_b32 s93, s90, 0xffff0000
+; SI-NEXT: s_lshl_b32 s87, s90, 16
+; SI-NEXT: s_and_b32 s95, s88, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_and_b32 vcc_lo, vcc_hi, 0xffff0000
+; SI-NEXT: s_lshl_b32 s86, vcc_hi, 16
+; SI-NEXT: s_and_b32 s85, s94, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_and_b32 s83, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s84, s8, 16
+; SI-NEXT: s_and_b32 s82, s5, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_hi, s5, 16
; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s4, 16
+; SI-NEXT: s_lshl_b32 s97, s4, 16
; SI-NEXT: .LBB111_5: ; %end
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s56
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s57
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s9
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s59
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s44
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s61
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s66
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s81
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s74
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s58
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s75
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
; SI-NEXT: v_mul_f32_e64 v5, 1.0, s7
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s77
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s62
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s79
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s96
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s87
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s89
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s76
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s86
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s93
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s85
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s87
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s84
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s83
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s88
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s82
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, vcc_lo
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s81
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s86
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s80
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s85
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s71
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s94
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s70
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s83
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s69
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s84
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s68
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s82
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, vcc_hi
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s97
; SI-NEXT: v_readlane_b32 s30, v43, 34
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
; SI-NEXT: v_readlane_b32 s31, v43, 35
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
index 7c7ac3966fa5d..7d867130b115f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
@@ -31768,6 +31768,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s48, v2
; SI-NEXT: v_readfirstlane_b32 s15, v1
; SI-NEXT: v_readfirstlane_b32 s59, v0
+; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
; SI-NEXT: s_lshr_b32 s77, s29, 16
; SI-NEXT: s_lshr_b32 s37, s28, 16
; SI-NEXT: s_lshr_b32 s75, s27, 16
@@ -31778,7 +31779,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s34, s22, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s21, 16
; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s63, s19, 16
+; SI-NEXT: s_lshr_b32 s95, s19, 16
; SI-NEXT: s_lshr_b32 s30, s18, 16
; SI-NEXT: s_lshr_b32 s61, s17, 16
; SI-NEXT: s_lshr_b32 s57, s16, 16
@@ -31789,11 +31790,11 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s79, s15, 16
; SI-NEXT: s_lshr_b32 s38, s59, 16
; SI-NEXT: v_readfirstlane_b32 s4, v6
-; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v21, s15, 0
+; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: v_writelane_b32 v21, s9, 1
+; SI-NEXT: v_writelane_b32 v21, s5, 2
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
@@ -31821,7 +31822,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s11, s57
; SI-NEXT: s_or_b32 s57, s13, s41
; SI-NEXT: s_and_b32 s41, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s63, 16
+; SI-NEXT: s_lshl_b32 s43, s95, 16
; SI-NEXT: s_or_b32 s6, s4, s76
; SI-NEXT: s_and_b32 s4, s59, 0xffff
; SI-NEXT: s_mov_b32 s13, s59
@@ -31832,19 +31833,18 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s61, s41, s43
; SI-NEXT: s_and_b32 s41, s23, 0xffff
; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
-; SI-NEXT: s_mov_b32 s88, s63
; SI-NEXT: s_or_b32 s63, s41, s43
; SI-NEXT: s_and_b32 s41, s25, 0xffff
; SI-NEXT: s_lshl_b32 s43, s73, 16
-; SI-NEXT: s_mov_b32 s90, s73
+; SI-NEXT: s_mov_b32 s88, s73
; SI-NEXT: s_or_b32 s73, s41, s43
; SI-NEXT: s_and_b32 s41, s27, 0xffff
; SI-NEXT: s_lshl_b32 s43, s75, 16
-; SI-NEXT: s_mov_b32 s92, s75
+; SI-NEXT: s_mov_b32 s90, s75
; SI-NEXT: s_or_b32 s75, s41, s43
; SI-NEXT: s_and_b32 s41, s29, 0xffff
; SI-NEXT: s_lshl_b32 s43, s77, 16
-; SI-NEXT: s_mov_b32 s93, s77
+; SI-NEXT: s_mov_b32 s92, s77
; SI-NEXT: s_or_b32 s77, s41, s43
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s41, s79, 16
@@ -31863,46 +31863,43 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s13, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
; SI-NEXT: s_lshl_b32 s44, s39, 16
-; SI-NEXT: s_mov_b32 s94, s5
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s9, s91, 16
; SI-NEXT: s_mov_b32 s57, s11
; SI-NEXT: s_mov_b32 s61, s78
-; SI-NEXT: s_mov_b32 s63, s88
; SI-NEXT: s_mov_b32 s11, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
-; SI-NEXT: s_mov_b32 s88, s79
+; SI-NEXT: s_mov_b32 s63, s79
; SI-NEXT: s_lshr_b64 s[78:79], s[46:47], 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_or_b32 s51, s5, s9
; SI-NEXT: s_lshl_b32 s50, s7, 16
-; SI-NEXT: s_mov_b32 s73, s90
+; SI-NEXT: s_mov_b32 s73, s88
; SI-NEXT: s_mov_b32 s9, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
-; SI-NEXT: s_mov_b32 s79, s88
+; SI-NEXT: s_mov_b32 s79, s63
; SI-NEXT: s_and_b32 s46, s48, 0xffff
-; SI-NEXT: s_mov_b32 s90, s89
+; SI-NEXT: s_mov_b32 s63, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
-; SI-NEXT: s_mov_b32 s95, s7
-; SI-NEXT: s_mov_b32 s75, s92
+; SI-NEXT: s_mov_b32 s94, s7
+; SI-NEXT: s_mov_b32 s75, s90
; SI-NEXT: s_mov_b32 s7, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
; SI-NEXT: s_or_b32 s46, s46, s44
-; SI-NEXT: s_mov_b32 s89, s90
+; SI-NEXT: s_mov_b32 s89, s63
; SI-NEXT: s_and_b32 s44, s49, 0xffff
-; SI-NEXT: s_mov_b32 s92, s91
+; SI-NEXT: s_mov_b32 s63, s91
; SI-NEXT: s_lshr_b64 s[90:91], s[50:51], 16
-; SI-NEXT: s_mov_b32 s77, s93
+; SI-NEXT: s_mov_b32 s77, s92
; SI-NEXT: s_mov_b32 s5, s47
; SI-NEXT: s_mov_b32 s47, s45
; SI-NEXT: s_or_b32 s44, s44, s50
; SI-NEXT: s_mov_b32 s45, s51
-; SI-NEXT: s_mov_b32 s91, s92
+; SI-NEXT: s_mov_b32 s91, s63
; SI-NEXT: s_mov_b64 s[92:93], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
-; SI-NEXT: s_mov_b32 s95, s7
-; SI-NEXT: s_mov_b32 s94, s5
+; SI-NEXT: s_mov_b32 s94, s7
; SI-NEXT: s_mov_b64 s[92:93], -1
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr56
@@ -31926,16 +31923,17 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[92:93], s[92:93], exec
-; SI-NEXT: s_cselect_b32 s92, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s92, 1
+; SI-NEXT: s_cselect_b32 s63, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s63, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s4, s49, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s94, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: s_add_i32 s4, s94, 3
+; SI-NEXT: v_readlane_b32 s4, v21, 2
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
@@ -32007,7 +32005,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s40, s18, 0x30000
; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s63, 16
+; SI-NEXT: s_lshl_b32 s19, s95, 16
; SI-NEXT: s_or_b32 s18, s19, s18
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s41, s18, 0x30000
@@ -32026,14 +32024,13 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s10, s10, 0x30000
; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: s_add_i32 s12, s12, 0x30000
-; SI-NEXT: s_add_i32 s13, s13, 0x30000
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s12, s12, 0x30000
+; SI-NEXT: s_add_i32 s13, s13, 0x30000
; SI-NEXT: s_add_i32 s43, s16, 0x30000
; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
@@ -32042,8 +32039,9 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[90:91], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
; SI-NEXT: s_lshr_b32 s61, s43, 16
-; SI-NEXT: s_lshr_b32 s63, s41, 16
+; SI-NEXT: s_lshr_b32 s95, s41, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s15, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s13, 16
; SI-NEXT: s_lshr_b32 s73, s11, 16
@@ -32063,7 +32061,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s19, s58, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s63, 16
+; SI-NEXT: s_lshl_b32 s20, s95, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s20, s60, 16
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
index 05df8feb7f8e0..b4ed34dcffeb1 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
@@ -14856,13 +14856,13 @@ define <4 x i16> @bitcast_v8i8_to_v4i16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8
; SI-NEXT: v_lshlrev_b32_e32 v11, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_2
@@ -14872,25 +14872,25 @@ define <4 x i16> @bitcast_v8i8_to_v4i16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v11
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v4, v7, v3
+; SI-NEXT: v_or_b32_e32 v4, v8, v3
; SI-NEXT: v_or_b32_e32 v3, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v10
-; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: v_or_b32_e32 v1, v9, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v4
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: .LBB98_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_4
@@ -14903,7 +14903,7 @@ define <4 x i16> @bitcast_v8i8_to_v4i16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: v_or_b32_e32 v1, v9, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
@@ -14914,18 +14914,18 @@ define <4 x i16> @bitcast_v8i8_to_v4i16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v7, v2
+; SI-NEXT: v_or_b32_e32 v2, v8, v2
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3
; SI-NEXT: .LBB98_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -16811,13 +16811,13 @@ define <4 x half> @bitcast_v8i8_to_v4f16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8
; SI-NEXT: v_lshlrev_b32_e32 v11, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB106_2
@@ -16827,25 +16827,25 @@ define <4 x half> @bitcast_v8i8_to_v4f16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v11
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v4, v7, v3
+; SI-NEXT: v_or_b32_e32 v4, v8, v3
; SI-NEXT: v_or_b32_e32 v3, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v10
-; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: v_or_b32_e32 v1, v9, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
; SI-NEXT: v_or_b32_e32 v1, v0, v1
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v4
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: .LBB106_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB106_4
@@ -16858,7 +16858,7 @@ define <4 x half> @bitcast_v8i8_to_v4f16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v8, v1
+; SI-NEXT: v_or_b32_e32 v1, v9, v1
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v4
@@ -16869,18 +16869,18 @@ define <4 x half> @bitcast_v8i8_to_v4f16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v7, v2
+; SI-NEXT: v_or_b32_e32 v2, v8, v2
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3
; SI-NEXT: .LBB106_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -18217,11 +18217,11 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v11, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v7
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB110_2
@@ -18238,11 +18238,11 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v10, v9, v0
+; SI-NEXT: v_or_b32_e32 v9, v10, v0
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
@@ -18267,7 +18267,7 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v9, v4
+; SI-NEXT: v_or_b32_e32 v4, v10, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v8, v1
; SI-NEXT: v_or_b32_e32 v3, v4, v3
@@ -18276,7 +18276,7 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x3000000, v0
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v0
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v4
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v4
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
; SI-NEXT: .LBB110_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -18284,7 +18284,7 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v3
; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
-; SI-NEXT: v_mul_f32_e32 v1, 1.0, v10
+; SI-NEXT: v_mul_f32_e32 v1, 1.0, v9
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v7
; SI-NEXT: v_alignbit_b32 v1, v1, v2, 16
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
index df6e5fb57131f..72f10b31e2b8d 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
@@ -4433,6 +4433,8 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v32, v21
+; SI-NEXT: v_mov_b32_e32 v33, v20
; SI-NEXT: v_mov_b32_e32 v34, v19
; SI-NEXT: v_mov_b32_e32 v35, v18
; SI-NEXT: v_mov_b32_e32 v36, v17
@@ -4453,10 +4455,8 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v43, v2
; SI-NEXT: v_mov_b32_e32 v44, v1
; SI-NEXT: v_mov_b32_e32 v45, v0
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
@@ -4475,13 +4475,13 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v16
@@ -4489,8 +4489,8 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
@@ -4501,30 +4501,36 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44
@@ -4536,11 +4542,9 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v54
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v52
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v33
-; SI-NEXT: v_or_b32_e32 v1, v1, v63
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v2, v2, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v62
; SI-NEXT: v_or_b32_e32 v4, v4, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v60
@@ -4548,8 +4552,6 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v58
; SI-NEXT: v_or_b32_e32 v8, v8, v57
; SI-NEXT: v_or_b32_e32 v9, v9, v56
-; SI-NEXT: v_or_b32_e32 v10, v10, v47
-; SI-NEXT: v_or_b32_e32 v11, v11, v46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
@@ -4561,11 +4563,9 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -4573,10 +4573,12 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v48
@@ -4600,20 +4602,11 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v34
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v32
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -4636,6 +4629,17 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -4643,16 +4647,20 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44
@@ -4664,8 +4672,6 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v54
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v53
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v52
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -4676,11 +4682,9 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_or_b32_e32 v1, v63, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
+; SI-NEXT: v_or_b32_e32 v0, v47, v0
+; SI-NEXT: v_or_b32_e32 v1, v46, v1
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_or_b32_e32 v3, v62, v3
; SI-NEXT: v_or_b32_e32 v4, v61, v4
; SI-NEXT: v_or_b32_e32 v5, v60, v5
@@ -4688,8 +4692,6 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v58, v7
; SI-NEXT: v_or_b32_e32 v8, v57, v8
; SI-NEXT: v_or_b32_e32 v9, v56, v9
-; SI-NEXT: v_or_b32_e32 v10, v47, v10
-; SI-NEXT: v_or_b32_e32 v11, v46, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -4700,39 +4702,53 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v35
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v34
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -4742,18 +4758,7 @@ define <22 x i32> @bitcast_v44i16_to_v22i32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT: .LBB14_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -5385,7 +5390,7 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v7
+; SI-NEXT: v_readfirstlane_b32 s7, v7
; SI-NEXT: v_readfirstlane_b32 s9, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
@@ -5403,11 +5408,11 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s88, s22, 16
; SI-NEXT: s_lshr_b32 s95, s21, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s20, 16
-; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
; SI-NEXT: s_lshr_b32 s93, s18, 16
; SI-NEXT: s_lshr_b32 s58, s17, 16
; SI-NEXT: s_lshr_b32 s59, s16, 16
-; SI-NEXT: s_lshr_b32 s6, vcc_hi, 16
+; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -5426,7 +5431,7 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
@@ -5482,7 +5487,7 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
+; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
@@ -5501,7 +5506,6 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s8, s6
; SI-NEXT: s_mov_b32 s6, s58
; SI-NEXT: s_mov_b32 s74, s59
-; SI-NEXT: s_mov_b32 s7, s92
; SI-NEXT: s_mov_b32 s92, s77
; SI-NEXT: s_mov_b32 s77, s60
; SI-NEXT: s_mov_b32 s91, s76
@@ -5513,14 +5517,16 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s72, s13
; SI-NEXT: s_mov_b32 s13, s11
; SI-NEXT: s_mov_b32 s11, s9
-; SI-NEXT: s_mov_b32 s9, s93
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, s93
; SI-NEXT: s_mov_b32 s93, s78
; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: s_mov_b32 s63, s78
; SI-NEXT: s_mov_b32 s78, s93
-; SI-NEXT: s_mov_b32 s93, s9
+; SI-NEXT: s_mov_b32 s93, s7
+; SI-NEXT: s_mov_b32 s7, s9
; SI-NEXT: s_mov_b32 s9, s11
; SI-NEXT: s_mov_b32 s11, s13
; SI-NEXT: s_mov_b32 s13, s72
@@ -5532,7 +5538,6 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s76, s91
; SI-NEXT: s_mov_b32 s60, s77
; SI-NEXT: s_mov_b32 s77, s92
-; SI-NEXT: s_mov_b32 s92, s7
; SI-NEXT: s_mov_b32 s59, s74
; SI-NEXT: s_mov_b32 s74, s89
; SI-NEXT: s_mov_b32 s58, s6
@@ -5567,7 +5572,7 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
@@ -5655,7 +5660,7 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_add_i32 s4, s7, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
@@ -7775,9 +7780,9 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v40
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
@@ -7796,13 +7801,13 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
@@ -7845,9 +7850,9 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -7938,8 +7943,8 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB18_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v45
; SI-NEXT: v_cvt_f32_f16_e32 v3, v44
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -7954,7 +7959,7 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v63
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v3, v43
; SI-NEXT: v_cvt_f32_f16_e32 v4, v42
@@ -13684,6 +13689,8 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v32, v21
+; SI-NEXT: v_mov_b32_e32 v33, v20
; SI-NEXT: v_mov_b32_e32 v34, v19
; SI-NEXT: v_mov_b32_e32 v35, v18
; SI-NEXT: v_mov_b32_e32 v36, v17
@@ -13704,10 +13711,8 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v43, v2
; SI-NEXT: v_mov_b32_e32 v44, v1
; SI-NEXT: v_mov_b32_e32 v45, v0
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
@@ -13726,13 +13731,13 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v16
@@ -13740,8 +13745,8 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
@@ -13752,30 +13757,36 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44
@@ -13787,11 +13798,9 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v54
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v52
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v33
-; SI-NEXT: v_or_b32_e32 v1, v1, v63
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v2, v2, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v62
; SI-NEXT: v_or_b32_e32 v4, v4, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v60
@@ -13799,8 +13808,6 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v58
; SI-NEXT: v_or_b32_e32 v8, v8, v57
; SI-NEXT: v_or_b32_e32 v9, v9, v56
-; SI-NEXT: v_or_b32_e32 v10, v10, v47
-; SI-NEXT: v_or_b32_e32 v11, v11, v46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
@@ -13812,11 +13819,9 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -13824,10 +13829,12 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v48
@@ -13851,20 +13858,11 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v34
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v32
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -13887,6 +13885,17 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -13894,16 +13903,20 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44
@@ -13915,8 +13928,6 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v54
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v53
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v52
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -13927,11 +13938,9 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_or_b32_e32 v1, v63, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
+; SI-NEXT: v_or_b32_e32 v0, v47, v0
+; SI-NEXT: v_or_b32_e32 v1, v46, v1
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_or_b32_e32 v3, v62, v3
; SI-NEXT: v_or_b32_e32 v4, v61, v4
; SI-NEXT: v_or_b32_e32 v5, v60, v5
@@ -13939,8 +13948,6 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v58, v7
; SI-NEXT: v_or_b32_e32 v8, v57, v8
; SI-NEXT: v_or_b32_e32 v9, v56, v9
-; SI-NEXT: v_or_b32_e32 v10, v47, v10
-; SI-NEXT: v_or_b32_e32 v11, v46, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -13951,39 +13958,53 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v35
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v34
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -13993,18 +14014,7 @@ define <22 x float> @bitcast_v44i16_to_v22f32(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT: .LBB30_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -14636,7 +14646,7 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v7
+; SI-NEXT: v_readfirstlane_b32 s7, v7
; SI-NEXT: v_readfirstlane_b32 s9, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
@@ -14654,11 +14664,11 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s88, s22, 16
; SI-NEXT: s_lshr_b32 s95, s21, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s20, 16
-; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
; SI-NEXT: s_lshr_b32 s93, s18, 16
; SI-NEXT: s_lshr_b32 s58, s17, 16
; SI-NEXT: s_lshr_b32 s59, s16, 16
-; SI-NEXT: s_lshr_b32 s6, vcc_hi, 16
+; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -14677,7 +14687,7 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
@@ -14733,7 +14743,7 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
+; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
@@ -14752,7 +14762,6 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s8, s6
; SI-NEXT: s_mov_b32 s6, s58
; SI-NEXT: s_mov_b32 s74, s59
-; SI-NEXT: s_mov_b32 s7, s92
; SI-NEXT: s_mov_b32 s92, s77
; SI-NEXT: s_mov_b32 s77, s60
; SI-NEXT: s_mov_b32 s91, s76
@@ -14764,14 +14773,16 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s72, s13
; SI-NEXT: s_mov_b32 s13, s11
; SI-NEXT: s_mov_b32 s11, s9
-; SI-NEXT: s_mov_b32 s9, s93
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, s93
; SI-NEXT: s_mov_b32 s93, s78
; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: s_mov_b32 s63, s78
; SI-NEXT: s_mov_b32 s78, s93
-; SI-NEXT: s_mov_b32 s93, s9
+; SI-NEXT: s_mov_b32 s93, s7
+; SI-NEXT: s_mov_b32 s7, s9
; SI-NEXT: s_mov_b32 s9, s11
; SI-NEXT: s_mov_b32 s11, s13
; SI-NEXT: s_mov_b32 s13, s72
@@ -14783,7 +14794,6 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s76, s91
; SI-NEXT: s_mov_b32 s60, s77
; SI-NEXT: s_mov_b32 s77, s92
-; SI-NEXT: s_mov_b32 s92, s7
; SI-NEXT: s_mov_b32 s59, s74
; SI-NEXT: s_mov_b32 s74, s89
; SI-NEXT: s_mov_b32 s58, s6
@@ -14818,7 +14828,7 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
@@ -14906,7 +14916,7 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_add_i32 s4, s7, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
@@ -17270,9 +17280,9 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v40
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
@@ -17291,13 +17301,13 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
@@ -17340,9 +17350,9 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -17433,8 +17443,8 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB34_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v45
; SI-NEXT: v_cvt_f32_f16_e32 v3, v44
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -17449,7 +17459,7 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v63
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v3, v43
; SI-NEXT: v_cvt_f32_f16_e32 v4, v42
@@ -21618,6 +21628,8 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v32, v21
+; SI-NEXT: v_mov_b32_e32 v33, v20
; SI-NEXT: v_mov_b32_e32 v34, v19
; SI-NEXT: v_mov_b32_e32 v35, v18
; SI-NEXT: v_mov_b32_e32 v36, v17
@@ -21638,10 +21650,8 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v43, v2
; SI-NEXT: v_mov_b32_e32 v44, v1
; SI-NEXT: v_mov_b32_e32 v45, v0
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
@@ -21660,13 +21670,13 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v16
@@ -21674,8 +21684,8 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
@@ -21686,30 +21696,36 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44
@@ -21721,11 +21737,9 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v54
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v52
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v33
-; SI-NEXT: v_or_b32_e32 v1, v1, v63
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v2, v2, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v62
; SI-NEXT: v_or_b32_e32 v4, v4, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v60
@@ -21733,8 +21747,6 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v58
; SI-NEXT: v_or_b32_e32 v8, v8, v57
; SI-NEXT: v_or_b32_e32 v9, v9, v56
-; SI-NEXT: v_or_b32_e32 v10, v10, v47
-; SI-NEXT: v_or_b32_e32 v11, v11, v46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
@@ -21746,11 +21758,9 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -21758,10 +21768,12 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v48
@@ -21785,20 +21797,11 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v34
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v32
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -21821,6 +21824,17 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -21828,16 +21842,20 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44
@@ -21849,8 +21867,6 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v54
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v53
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v52
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -21861,11 +21877,9 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_or_b32_e32 v1, v63, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
+; SI-NEXT: v_or_b32_e32 v0, v47, v0
+; SI-NEXT: v_or_b32_e32 v1, v46, v1
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_or_b32_e32 v3, v62, v3
; SI-NEXT: v_or_b32_e32 v4, v61, v4
; SI-NEXT: v_or_b32_e32 v5, v60, v5
@@ -21873,8 +21887,6 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v58, v7
; SI-NEXT: v_or_b32_e32 v8, v57, v8
; SI-NEXT: v_or_b32_e32 v9, v56, v9
-; SI-NEXT: v_or_b32_e32 v10, v47, v10
-; SI-NEXT: v_or_b32_e32 v11, v46, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -21885,39 +21897,53 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v35
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v34
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -21927,18 +21953,7 @@ define <11 x i64> @bitcast_v44i16_to_v11i64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT: .LBB42_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -22570,7 +22585,7 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v7
+; SI-NEXT: v_readfirstlane_b32 s7, v7
; SI-NEXT: v_readfirstlane_b32 s9, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
@@ -22588,11 +22603,11 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s88, s22, 16
; SI-NEXT: s_lshr_b32 s95, s21, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s20, 16
-; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
; SI-NEXT: s_lshr_b32 s93, s18, 16
; SI-NEXT: s_lshr_b32 s58, s17, 16
; SI-NEXT: s_lshr_b32 s59, s16, 16
-; SI-NEXT: s_lshr_b32 s6, vcc_hi, 16
+; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -22611,7 +22626,7 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
@@ -22667,7 +22682,7 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
+; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
@@ -22686,7 +22701,6 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s8, s6
; SI-NEXT: s_mov_b32 s6, s58
; SI-NEXT: s_mov_b32 s74, s59
-; SI-NEXT: s_mov_b32 s7, s92
; SI-NEXT: s_mov_b32 s92, s77
; SI-NEXT: s_mov_b32 s77, s60
; SI-NEXT: s_mov_b32 s91, s76
@@ -22698,14 +22712,16 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s72, s13
; SI-NEXT: s_mov_b32 s13, s11
; SI-NEXT: s_mov_b32 s11, s9
-; SI-NEXT: s_mov_b32 s9, s93
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, s93
; SI-NEXT: s_mov_b32 s93, s78
; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: s_mov_b32 s63, s78
; SI-NEXT: s_mov_b32 s78, s93
-; SI-NEXT: s_mov_b32 s93, s9
+; SI-NEXT: s_mov_b32 s93, s7
+; SI-NEXT: s_mov_b32 s7, s9
; SI-NEXT: s_mov_b32 s9, s11
; SI-NEXT: s_mov_b32 s11, s13
; SI-NEXT: s_mov_b32 s13, s72
@@ -22717,7 +22733,6 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s76, s91
; SI-NEXT: s_mov_b32 s60, s77
; SI-NEXT: s_mov_b32 s77, s92
-; SI-NEXT: s_mov_b32 s92, s7
; SI-NEXT: s_mov_b32 s59, s74
; SI-NEXT: s_mov_b32 s74, s89
; SI-NEXT: s_mov_b32 s58, s6
@@ -22752,7 +22767,7 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
@@ -22840,7 +22855,7 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_add_i32 s4, s7, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
@@ -24972,9 +24987,9 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v40
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
@@ -24993,13 +25008,13 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
@@ -25042,9 +25057,9 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -25135,8 +25150,8 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB46_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v45
; SI-NEXT: v_cvt_f32_f16_e32 v3, v44
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -25151,7 +25166,7 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v63
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v3, v43
; SI-NEXT: v_cvt_f32_f16_e32 v4, v42
@@ -28424,6 +28439,8 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v32, v21
+; SI-NEXT: v_mov_b32_e32 v33, v20
; SI-NEXT: v_mov_b32_e32 v34, v19
; SI-NEXT: v_mov_b32_e32 v35, v18
; SI-NEXT: v_mov_b32_e32 v36, v17
@@ -28444,10 +28461,8 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v43, v2
; SI-NEXT: v_mov_b32_e32 v44, v1
; SI-NEXT: v_mov_b32_e32 v45, v0
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
@@ -28466,13 +28481,13 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v16
@@ -28480,8 +28495,8 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v12
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
@@ -28492,30 +28507,36 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44
@@ -28527,11 +28548,9 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v54
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v52
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v33
-; SI-NEXT: v_or_b32_e32 v1, v1, v63
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v2, v2, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v62
; SI-NEXT: v_or_b32_e32 v4, v4, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v60
@@ -28539,8 +28558,6 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v7, v58
; SI-NEXT: v_or_b32_e32 v8, v8, v57
; SI-NEXT: v_or_b32_e32 v9, v9, v56
-; SI-NEXT: v_or_b32_e32 v10, v10, v47
-; SI-NEXT: v_or_b32_e32 v11, v11, v46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
@@ -28552,11 +28569,9 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -28564,10 +28579,12 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v50
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v48
@@ -28591,20 +28608,11 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v34
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v32
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -28627,6 +28635,17 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; kill: killed $vgpr22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; kill: killed $vgpr22
@@ -28634,16 +28653,20 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v44
@@ -28655,8 +28678,6 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v54
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v53
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v52
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -28667,11 +28688,9 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_or_b32_e32 v1, v63, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
+; SI-NEXT: v_or_b32_e32 v0, v47, v0
+; SI-NEXT: v_or_b32_e32 v1, v46, v1
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_or_b32_e32 v3, v62, v3
; SI-NEXT: v_or_b32_e32 v4, v61, v4
; SI-NEXT: v_or_b32_e32 v5, v60, v5
@@ -28679,8 +28698,6 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v7, v58, v7
; SI-NEXT: v_or_b32_e32 v8, v57, v8
; SI-NEXT: v_or_b32_e32 v9, v56, v9
-; SI-NEXT: v_or_b32_e32 v10, v47, v10
-; SI-NEXT: v_or_b32_e32 v11, v46, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -28691,39 +28708,53 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v49
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v35
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v34
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v32
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -28733,18 +28764,7 @@ define <11 x double> @bitcast_v44i16_to_v11f64(<44 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT: .LBB50_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -29376,7 +29396,7 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v7
+; SI-NEXT: v_readfirstlane_b32 s7, v7
; SI-NEXT: v_readfirstlane_b32 s9, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
@@ -29394,11 +29414,11 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s88, s22, 16
; SI-NEXT: s_lshr_b32 s95, s21, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s20, 16
-; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
; SI-NEXT: s_lshr_b32 s93, s18, 16
; SI-NEXT: s_lshr_b32 s58, s17, 16
; SI-NEXT: s_lshr_b32 s59, s16, 16
-; SI-NEXT: s_lshr_b32 s6, vcc_hi, 16
+; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -29417,7 +29437,7 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
@@ -29473,7 +29493,7 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s9, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
+; SI-NEXT: s_and_b32 s4, s7, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
@@ -29492,7 +29512,6 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s8, s6
; SI-NEXT: s_mov_b32 s6, s58
; SI-NEXT: s_mov_b32 s74, s59
-; SI-NEXT: s_mov_b32 s7, s92
; SI-NEXT: s_mov_b32 s92, s77
; SI-NEXT: s_mov_b32 s77, s60
; SI-NEXT: s_mov_b32 s91, s76
@@ -29504,14 +29523,16 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s72, s13
; SI-NEXT: s_mov_b32 s13, s11
; SI-NEXT: s_mov_b32 s11, s9
-; SI-NEXT: s_mov_b32 s9, s93
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, s93
; SI-NEXT: s_mov_b32 s93, s78
; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: s_mov_b32 s63, s78
; SI-NEXT: s_mov_b32 s78, s93
-; SI-NEXT: s_mov_b32 s93, s9
+; SI-NEXT: s_mov_b32 s93, s7
+; SI-NEXT: s_mov_b32 s7, s9
; SI-NEXT: s_mov_b32 s9, s11
; SI-NEXT: s_mov_b32 s11, s13
; SI-NEXT: s_mov_b32 s13, s72
@@ -29523,7 +29544,6 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s76, s91
; SI-NEXT: s_mov_b32 s60, s77
; SI-NEXT: s_mov_b32 s77, s92
-; SI-NEXT: s_mov_b32 s92, s7
; SI-NEXT: s_mov_b32 s59, s74
; SI-NEXT: s_mov_b32 s74, s89
; SI-NEXT: s_mov_b32 s58, s6
@@ -29558,7 +29578,7 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
@@ -29646,7 +29666,7 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_add_i32 s4, s7, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
@@ -31922,9 +31942,9 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v40
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v45
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
@@ -31943,13 +31963,13 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v42
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
@@ -31992,9 +32012,9 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
@@ -32085,8 +32105,8 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB54_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v63
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v45
; SI-NEXT: v_cvt_f32_f16_e32 v3, v44
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -32101,7 +32121,7 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v63
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v3, v43
; SI-NEXT: v_cvt_f32_f16_e32 v4, v42
@@ -34904,34 +34924,34 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s73, s41, s43
; SI-NEXT: s_and_b32 s41, s21, 0xffff
; SI-NEXT: s_lshl_b32 s43, s34, 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[62:63], 16
; SI-NEXT: s_or_b32 s75, s41, s43
; SI-NEXT: s_and_b32 s41, s23, 0xffff
; SI-NEXT: s_lshl_b32 s43, s35, 16
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: v_writelane_b32 v23, s58, 4
; SI-NEXT: s_or_b32 s77, s41, s43
; SI-NEXT: s_and_b32 s41, s25, 0xffff
; SI-NEXT: s_lshl_b32 s43, s79, 16
; SI-NEXT: s_or_b32 s56, s4, s62
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s72, s37, 16
-; SI-NEXT: v_writelane_b32 v23, s59, 5
-; SI-NEXT: s_mov_b32 s58, s79
+; SI-NEXT: s_lshr_b64 s[58:59], s[62:63], 16
+; SI-NEXT: s_mov_b32 s60, s79
; SI-NEXT: s_or_b32 s79, s41, s43
; SI-NEXT: s_and_b32 s41, s27, 0xffff
; SI-NEXT: s_lshl_b32 s43, s89, 16
; SI-NEXT: s_or_b32 s46, s4, s72
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s74, s38, 16
-; SI-NEXT: s_mov_b32 s60, s89
+; SI-NEXT: v_writelane_b32 v23, s58, 4
+; SI-NEXT: s_mov_b32 s62, s89
; SI-NEXT: s_or_b32 s89, s41, s43
; SI-NEXT: s_and_b32 s41, s29, 0xffff
; SI-NEXT: s_lshl_b32 s43, s91, 16
; SI-NEXT: s_or_b32 s44, s4, s74
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s76, s39, 16
-; SI-NEXT: s_mov_b32 s62, s91
+; SI-NEXT: v_writelane_b32 v23, s59, 5
+; SI-NEXT: s_mov_b32 s58, s91
; SI-NEXT: s_or_b32 s91, s41, s43
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s41, s93, 16
@@ -34994,9 +35014,9 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s57, s63
; SI-NEXT: v_writelane_b32 v23, s67, 9
; SI-NEXT: s_mov_b32 s63, s9
-; SI-NEXT: s_mov_b32 s79, s58
-; SI-NEXT: s_mov_b32 s89, s60
-; SI-NEXT: s_mov_b32 s91, s62
+; SI-NEXT: s_mov_b32 s79, s60
+; SI-NEXT: s_mov_b32 s89, s62
+; SI-NEXT: s_mov_b32 s91, s58
; SI-NEXT: s_mov_b32 s93, s59
; SI-NEXT: s_mov_b32 s9, s95
; SI-NEXT: s_lshr_b64 s[94:95], vcc, 16
@@ -35040,12 +35060,12 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: v_readlane_b32 s31, v23, 5
; SI-NEXT: s_mov_b32 vcc_lo, s30
; SI-NEXT: v_readlane_b32 s30, v23, 6
-; SI-NEXT: s_cselect_b32 s58, 1, 0
; SI-NEXT: v_readlane_b32 s31, v23, 7
-; SI-NEXT: s_cmp_lg_u32 s58, 1
-; SI-NEXT: s_mov_b32 s58, s30
-; SI-NEXT: v_readlane_b32 s30, v23, 8
+; SI-NEXT: s_cselect_b32 s58, 1, 0
; SI-NEXT: s_mov_b32 s60, s30
+; SI-NEXT: v_readlane_b32 s30, v23, 8
+; SI-NEXT: s_cmp_lg_u32 s58, 1
+; SI-NEXT: s_mov_b32 s62, s30
; SI-NEXT: v_readlane_b32 s31, v23, 9
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
@@ -35163,13 +35183,13 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
; SI-NEXT: s_add_i32 s57, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[60:61], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[46:47], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[6:7], 16
; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
@@ -35193,13 +35213,13 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s18, s70, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s58, 16
+; SI-NEXT: s_lshl_b32 s19, s60, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s47, 0xffff
; SI-NEXT: s_lshl_b32 s20, s61, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s60, 16
+; SI-NEXT: s_lshl_b32 s21, s62, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s45, 0xffff
; SI-NEXT: s_lshl_b32 s22, s34, 16
@@ -37023,13 +37043,13 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v16, v43
; SI-NEXT: v_mov_b32_e32 v25, v45
; SI-NEXT: v_mov_b32_e32 v18, v42
-; SI-NEXT: v_mov_b32_e32 v20, v46
+; SI-NEXT: v_mov_b32_e32 v37, v46
+; SI-NEXT: v_mov_b32_e32 v20, v41
+; SI-NEXT: v_mov_b32_e32 v23, v40
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v40, s58
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_mov_b32_e32 v41, s47
+; SI-NEXT: v_mov_b32_e32 v23, s58
+; SI-NEXT: v_mov_b32_e32 v20, s47
; SI-NEXT: v_mov_b32_e32 v18, s45
; SI-NEXT: v_mov_b32_e32 v16, s44
; SI-NEXT: v_mov_b32_e32 v14, s15
@@ -37039,7 +37059,7 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v6, s11
; SI-NEXT: v_mov_b32_e32 v4, s10
; SI-NEXT: v_mov_b32_e32 v2, s9
-; SI-NEXT: v_mov_b32_e32 v20, s7
+; SI-NEXT: v_mov_b32_e32 v37, s7
; SI-NEXT: v_mov_b32_e32 v25, s8
; SI-NEXT: v_mov_b32_e32 v27, s59
; SI-NEXT: v_mov_b32_e32 v29, s63
@@ -37073,79 +37093,79 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v24, s46
; SI-NEXT: v_mov_b32_e32 v22, s43
; SI-NEXT: .LBB59_6: ; %end
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v52
+; SI-NEXT: v_and_b32_e32 v39, 0xffff, v52
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v0, v23, v0
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v54
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v2, v23, v2
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v4, v23, v4
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v55
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v6, v23, v6
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v35
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v8, v23, v8
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v33
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_or_b32_e32 v10, v23, v10
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v31
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v30
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_or_b32_e32 v12, v12, v23
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v29
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v28
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v14, v14, v23
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v27
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v26
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v16, v16, v23
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v0, v39, v0
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
+; SI-NEXT: v_and_b32_e32 v39, 0xffff, v54
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
+; SI-NEXT: v_and_b32_e32 v38, 0xffff, v53
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
+; SI-NEXT: v_and_b32_e32 v36, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
+; SI-NEXT: v_and_b32_e32 v34, 0xffff, v35
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_and_b32_e32 v32, 0xffff, v33
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_or_b32_e32 v13, v13, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v29
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: v_or_b32_e32 v17, v17, v18
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_or_b32_e32 v18, v18, v23
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v40
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v19, v19, v23
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; SI-NEXT: v_or_b32_e32 v2, v39, v2
+; SI-NEXT: v_or_b32_e32 v4, v38, v4
+; SI-NEXT: v_or_b32_e32 v6, v36, v6
+; SI-NEXT: v_or_b32_e32 v8, v34, v8
+; SI-NEXT: v_or_b32_e32 v10, v32, v10
+; SI-NEXT: v_or_b32_e32 v12, v12, v30
+; SI-NEXT: v_or_b32_e32 v14, v14, v28
+; SI-NEXT: v_or_b32_e32 v16, v16, v26
+; SI-NEXT: v_or_b32_e32 v18, v18, v24
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
index df3978f862453..664d6758d0b9e 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
@@ -4720,6 +4720,9 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v22
+; SI-NEXT: v_mov_b32_e32 v34, v21
+; SI-NEXT: v_mov_b32_e32 v35, v20
; SI-NEXT: v_mov_b32_e32 v36, v19
; SI-NEXT: v_mov_b32_e32 v37, v18
; SI-NEXT: v_mov_b32_e32 v38, v17
@@ -4742,12 +4745,9 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v47, v0
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
@@ -4764,24 +4764,24 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
@@ -4794,32 +4794,41 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46
@@ -4830,21 +4839,15 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v55
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v59
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v58
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v57
-; SI-NEXT: v_or_b32_e32 v6, v6, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v32
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v60
+; SI-NEXT: v_or_b32_e32 v4, v4, v59
+; SI-NEXT: v_or_b32_e32 v5, v5, v58
+; SI-NEXT: v_or_b32_e32 v6, v6, v57
; SI-NEXT: v_or_b32_e32 v7, v7, v56
; SI-NEXT: v_or_b32_e32 v8, v8, v63
-; SI-NEXT: v_or_b32_e32 v9, v9, v62
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
-; SI-NEXT: v_or_b32_e32 v11, v11, v60
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
@@ -4855,25 +4858,25 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v50
@@ -4897,7 +4900,19 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v36
; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v34
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
@@ -4905,18 +4920,9 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -4956,16 +4962,22 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v46
@@ -4976,9 +4988,6 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v41
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v55
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -4988,21 +4997,15 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v58, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v57, v5
-; SI-NEXT: v_or_b32_e32 v6, v32, v6
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v32, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v60, v3
+; SI-NEXT: v_or_b32_e32 v4, v59, v4
+; SI-NEXT: v_or_b32_e32 v5, v58, v5
+; SI-NEXT: v_or_b32_e32 v6, v57, v6
; SI-NEXT: v_or_b32_e32 v7, v56, v7
; SI-NEXT: v_or_b32_e32 v8, v63, v8
-; SI-NEXT: v_or_b32_e32 v9, v62, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
-; SI-NEXT: v_or_b32_e32 v11, v60, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -5012,40 +5015,64 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v34
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -5055,27 +5082,8 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -5326,46 +5334,49 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -5375,10 +5386,9 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -5386,33 +5396,61 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -5420,7 +5458,7 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -5435,6 +5473,7 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -5458,7 +5497,10 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -5466,63 +5508,29 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB14_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -5530,7 +5538,6 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
@@ -5539,37 +5546,39 @@ define <24 x i32> @bitcast_v48i16_to_v24i32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -6173,10 +6182,10 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s30, s24, 16
; VI-NEXT: s_lshr_b32 s62, s23, 16
; VI-NEXT: s_lshr_b32 s63, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s66, s21, 16
; VI-NEXT: s_lshr_b32 s31, s20, 16
; VI-NEXT: s_lshr_b32 s34, s19, 16
; VI-NEXT: s_lshr_b32 s35, s18, 16
@@ -6212,7 +6221,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, s63, 16
@@ -6221,7 +6230,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -6298,17 +6307,17 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_mov_b32 s10, s8
; VI-NEXT: s_mov_b32 s8, s6
; VI-NEXT: s_mov_b32 s6, s60
-; VI-NEXT: s_mov_b32 s91, s61
; VI-NEXT: s_mov_b32 s88, s62
; VI-NEXT: s_mov_b32 s15, s63
+; VI-NEXT: s_mov_b32 s91, s66
; VI-NEXT: s_mov_b32 s77, s64
; VI-NEXT: s_mov_b32 s74, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: s_mov_b32 s65, s74
; VI-NEXT: s_mov_b32 s64, s77
+; VI-NEXT: s_mov_b32 s66, s91
; VI-NEXT: s_mov_b32 s63, s15
; VI-NEXT: s_mov_b32 s62, s88
-; VI-NEXT: s_mov_b32 s61, s91
; VI-NEXT: s_mov_b32 s60, s6
; VI-NEXT: s_mov_b32 s6, s8
; VI-NEXT: s_mov_b32 s8, s10
@@ -6367,7 +6376,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -6382,7 +6391,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -8373,13 +8382,13 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
@@ -8398,25 +8407,25 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56
@@ -8447,13 +8456,13 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
@@ -8562,8 +8571,8 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB18_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v59
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
; SI-NEXT: v_cvt_f32_f16_e32 v1, v47
; SI-NEXT: v_cvt_f32_f16_e32 v3, v46
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -8578,7 +8587,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v45
; SI-NEXT: v_cvt_f32_f16_e32 v4, v44
; SI-NEXT: v_cvt_f32_f16_e32 v5, v43
@@ -8590,7 +8599,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v33
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v42
@@ -8601,7 +8610,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v32
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v40
@@ -8612,7 +8621,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v54
@@ -8623,7 +8632,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
; SI-NEXT: v_cvt_f32_f16_e32 v12, v60
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -9029,46 +9038,49 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -9078,10 +9090,9 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -9089,33 +9100,61 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -9123,7 +9162,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -9138,6 +9177,7 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -9161,7 +9201,10 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -9169,63 +9212,29 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB18_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
@@ -9234,7 +9243,6 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
@@ -9243,37 +9251,39 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -14704,6 +14714,9 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v22
+; SI-NEXT: v_mov_b32_e32 v34, v21
+; SI-NEXT: v_mov_b32_e32 v35, v20
; SI-NEXT: v_mov_b32_e32 v36, v19
; SI-NEXT: v_mov_b32_e32 v37, v18
; SI-NEXT: v_mov_b32_e32 v38, v17
@@ -14726,12 +14739,9 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v47, v0
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
@@ -14748,24 +14758,24 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
@@ -14778,32 +14788,41 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46
@@ -14814,21 +14833,15 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v55
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v59
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v58
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v57
-; SI-NEXT: v_or_b32_e32 v6, v6, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v32
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v60
+; SI-NEXT: v_or_b32_e32 v4, v4, v59
+; SI-NEXT: v_or_b32_e32 v5, v5, v58
+; SI-NEXT: v_or_b32_e32 v6, v6, v57
; SI-NEXT: v_or_b32_e32 v7, v7, v56
; SI-NEXT: v_or_b32_e32 v8, v8, v63
-; SI-NEXT: v_or_b32_e32 v9, v9, v62
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
-; SI-NEXT: v_or_b32_e32 v11, v11, v60
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
@@ -14839,25 +14852,25 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v50
@@ -14881,7 +14894,19 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v36
; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v34
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
@@ -14889,18 +14914,9 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -14940,16 +14956,22 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v46
@@ -14960,9 +14982,6 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v41
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v55
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -14972,21 +14991,15 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v58, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v57, v5
-; SI-NEXT: v_or_b32_e32 v6, v32, v6
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v32, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v60, v3
+; SI-NEXT: v_or_b32_e32 v4, v59, v4
+; SI-NEXT: v_or_b32_e32 v5, v58, v5
+; SI-NEXT: v_or_b32_e32 v6, v57, v6
; SI-NEXT: v_or_b32_e32 v7, v56, v7
; SI-NEXT: v_or_b32_e32 v8, v63, v8
-; SI-NEXT: v_or_b32_e32 v9, v62, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
-; SI-NEXT: v_or_b32_e32 v11, v60, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -14996,40 +15009,64 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v34
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -15039,27 +15076,8 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -15310,46 +15328,49 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -15359,10 +15380,9 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -15370,33 +15390,61 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -15404,7 +15452,7 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -15419,6 +15467,7 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -15442,7 +15491,10 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -15450,63 +15502,29 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB30_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -15514,7 +15532,6 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
@@ -15523,37 +15540,39 @@ define <24 x float> @bitcast_v48i16_to_v24f32(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -16157,10 +16176,10 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s30, s24, 16
; VI-NEXT: s_lshr_b32 s62, s23, 16
; VI-NEXT: s_lshr_b32 s63, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s66, s21, 16
; VI-NEXT: s_lshr_b32 s31, s20, 16
; VI-NEXT: s_lshr_b32 s34, s19, 16
; VI-NEXT: s_lshr_b32 s35, s18, 16
@@ -16196,7 +16215,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, s63, 16
@@ -16205,7 +16224,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -16282,17 +16301,17 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_mov_b32 s10, s8
; VI-NEXT: s_mov_b32 s8, s6
; VI-NEXT: s_mov_b32 s6, s60
-; VI-NEXT: s_mov_b32 s91, s61
; VI-NEXT: s_mov_b32 s88, s62
; VI-NEXT: s_mov_b32 s15, s63
+; VI-NEXT: s_mov_b32 s91, s66
; VI-NEXT: s_mov_b32 s77, s64
; VI-NEXT: s_mov_b32 s74, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: s_mov_b32 s65, s74
; VI-NEXT: s_mov_b32 s64, s77
+; VI-NEXT: s_mov_b32 s66, s91
; VI-NEXT: s_mov_b32 s63, s15
; VI-NEXT: s_mov_b32 s62, s88
-; VI-NEXT: s_mov_b32 s61, s91
; VI-NEXT: s_mov_b32 s60, s6
; VI-NEXT: s_mov_b32 s6, s8
; VI-NEXT: s_mov_b32 s8, s10
@@ -16351,7 +16370,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -16366,7 +16385,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -18622,13 +18641,13 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
@@ -18647,25 +18666,25 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56
@@ -18696,13 +18715,13 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
@@ -18811,8 +18830,8 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB34_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v59
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
; SI-NEXT: v_cvt_f32_f16_e32 v1, v47
; SI-NEXT: v_cvt_f32_f16_e32 v3, v46
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -18827,7 +18846,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v45
; SI-NEXT: v_cvt_f32_f16_e32 v4, v44
; SI-NEXT: v_cvt_f32_f16_e32 v5, v43
@@ -18839,7 +18858,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v33
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v42
@@ -18850,7 +18869,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v32
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v40
@@ -18861,7 +18880,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v54
@@ -18872,7 +18891,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
; SI-NEXT: v_cvt_f32_f16_e32 v12, v60
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -19278,46 +19297,49 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -19327,10 +19349,9 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -19338,33 +19359,61 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -19372,7 +19421,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -19387,6 +19436,7 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -19410,7 +19460,10 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -19418,63 +19471,29 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB34_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
@@ -19483,7 +19502,6 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
@@ -19492,37 +19510,39 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -22538,10 +22558,10 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
@@ -22559,13 +22579,13 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; kill: killed $sgpr14
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr92
@@ -22624,10 +22644,10 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
@@ -22637,25 +22657,25 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_or_b32 s14, s23, s14
; SI-NEXT: s_and_b32 s23, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s60, 16
+; SI-NEXT: s_lshl_b32 s24, s88, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s24, s25, 0xffff
; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s58, 16
+; SI-NEXT: s_lshl_b32 s26, s60, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s27, 0xffff
; SI-NEXT: s_lshl_b32 s27, s95, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s56, 16
+; SI-NEXT: s_lshl_b32 s28, s58, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s29, 0xffff
; SI-NEXT: s_lshl_b32 s29, s94, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s88, 16
+; SI-NEXT: s_lshl_b32 s29, s56, 16
; SI-NEXT: s_or_b32 s12, s12, s29
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s29, s93, 16
@@ -23328,6 +23348,9 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v22
+; SI-NEXT: v_mov_b32_e32 v34, v21
+; SI-NEXT: v_mov_b32_e32 v35, v20
; SI-NEXT: v_mov_b32_e32 v36, v19
; SI-NEXT: v_mov_b32_e32 v37, v18
; SI-NEXT: v_mov_b32_e32 v38, v17
@@ -23350,12 +23373,9 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v47, v0
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
@@ -23372,24 +23392,24 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
@@ -23402,32 +23422,41 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46
@@ -23438,21 +23467,15 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v55
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v59
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v58
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v57
-; SI-NEXT: v_or_b32_e32 v6, v6, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v32
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v60
+; SI-NEXT: v_or_b32_e32 v4, v4, v59
+; SI-NEXT: v_or_b32_e32 v5, v5, v58
+; SI-NEXT: v_or_b32_e32 v6, v6, v57
; SI-NEXT: v_or_b32_e32 v7, v7, v56
; SI-NEXT: v_or_b32_e32 v8, v8, v63
-; SI-NEXT: v_or_b32_e32 v9, v9, v62
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
-; SI-NEXT: v_or_b32_e32 v11, v11, v60
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
@@ -23463,25 +23486,25 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v50
@@ -23505,7 +23528,19 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v36
; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v34
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
@@ -23513,18 +23548,9 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -23564,16 +23590,22 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v46
@@ -23584,9 +23616,6 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v41
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v55
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -23596,21 +23625,15 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v58, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v57, v5
-; SI-NEXT: v_or_b32_e32 v6, v32, v6
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v32, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v60, v3
+; SI-NEXT: v_or_b32_e32 v4, v59, v4
+; SI-NEXT: v_or_b32_e32 v5, v58, v5
+; SI-NEXT: v_or_b32_e32 v6, v57, v6
; SI-NEXT: v_or_b32_e32 v7, v56, v7
; SI-NEXT: v_or_b32_e32 v8, v63, v8
-; SI-NEXT: v_or_b32_e32 v9, v62, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
-; SI-NEXT: v_or_b32_e32 v11, v60, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -23620,40 +23643,64 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v34
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -23663,27 +23710,8 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -23934,46 +23962,49 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -23983,10 +24014,9 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -23994,33 +24024,61 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -24028,7 +24086,7 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -24043,6 +24101,7 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -24066,7 +24125,10 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -24074,63 +24136,29 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB42_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -24138,7 +24166,6 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
@@ -24147,37 +24174,39 @@ define <12 x i64> @bitcast_v48i16_to_v12i64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -24781,10 +24810,10 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s30, s24, 16
; VI-NEXT: s_lshr_b32 s62, s23, 16
; VI-NEXT: s_lshr_b32 s63, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s66, s21, 16
; VI-NEXT: s_lshr_b32 s31, s20, 16
; VI-NEXT: s_lshr_b32 s34, s19, 16
; VI-NEXT: s_lshr_b32 s35, s18, 16
@@ -24820,7 +24849,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, s63, 16
@@ -24829,7 +24858,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -24906,17 +24935,17 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_mov_b32 s10, s8
; VI-NEXT: s_mov_b32 s8, s6
; VI-NEXT: s_mov_b32 s6, s60
-; VI-NEXT: s_mov_b32 s91, s61
; VI-NEXT: s_mov_b32 s88, s62
; VI-NEXT: s_mov_b32 s15, s63
+; VI-NEXT: s_mov_b32 s91, s66
; VI-NEXT: s_mov_b32 s77, s64
; VI-NEXT: s_mov_b32 s74, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: s_mov_b32 s65, s74
; VI-NEXT: s_mov_b32 s64, s77
+; VI-NEXT: s_mov_b32 s66, s91
; VI-NEXT: s_mov_b32 s63, s15
; VI-NEXT: s_mov_b32 s62, s88
-; VI-NEXT: s_mov_b32 s61, s91
; VI-NEXT: s_mov_b32 s60, s6
; VI-NEXT: s_mov_b32 s6, s8
; VI-NEXT: s_mov_b32 s8, s10
@@ -24975,7 +25004,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -24990,7 +25019,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -26144,10 +26173,10 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
@@ -26165,13 +26194,13 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; kill: killed $sgpr14
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr92
@@ -26230,10 +26259,10 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
@@ -26243,25 +26272,25 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_or_b32 s14, s23, s14
; SI-NEXT: s_and_b32 s23, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s60, 16
+; SI-NEXT: s_lshl_b32 s24, s88, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s24, s25, 0xffff
; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s58, 16
+; SI-NEXT: s_lshl_b32 s26, s60, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s27, 0xffff
; SI-NEXT: s_lshl_b32 s27, s95, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s56, 16
+; SI-NEXT: s_lshl_b32 s28, s58, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s29, 0xffff
; SI-NEXT: s_lshl_b32 s29, s94, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s88, 16
+; SI-NEXT: s_lshl_b32 s29, s56, 16
; SI-NEXT: s_or_b32 s12, s12, s29
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s29, s93, 16
@@ -26996,13 +27025,13 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
@@ -27021,25 +27050,25 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56
@@ -27070,13 +27099,13 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
@@ -27185,8 +27214,8 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB46_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v59
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
; SI-NEXT: v_cvt_f32_f16_e32 v1, v47
; SI-NEXT: v_cvt_f32_f16_e32 v3, v46
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -27201,7 +27230,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v45
; SI-NEXT: v_cvt_f32_f16_e32 v4, v44
; SI-NEXT: v_cvt_f32_f16_e32 v5, v43
@@ -27213,7 +27242,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v33
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v42
@@ -27224,7 +27253,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v32
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v40
@@ -27235,7 +27264,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v54
@@ -27246,7 +27275,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
; SI-NEXT: v_cvt_f32_f16_e32 v12, v60
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -27652,46 +27681,49 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -27701,10 +27733,9 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -27712,33 +27743,61 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -27746,7 +27805,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -27761,6 +27820,7 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -27784,7 +27844,10 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -27792,63 +27855,29 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB46_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
@@ -27857,7 +27886,6 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
@@ -27866,37 +27894,39 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -30769,6 +30799,9 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v22
+; SI-NEXT: v_mov_b32_e32 v34, v21
+; SI-NEXT: v_mov_b32_e32 v35, v20
; SI-NEXT: v_mov_b32_e32 v36, v19
; SI-NEXT: v_mov_b32_e32 v37, v18
; SI-NEXT: v_mov_b32_e32 v38, v17
@@ -30791,12 +30824,9 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v47, v0
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
@@ -30813,24 +30843,24 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
@@ -30843,32 +30873,41 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46
@@ -30879,21 +30918,15 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v55
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v54
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v59
-; SI-NEXT: v_or_b32_e32 v2, v2, v34
-; SI-NEXT: v_or_b32_e32 v3, v3, v58
-; SI-NEXT: v_or_b32_e32 v4, v4, v33
-; SI-NEXT: v_or_b32_e32 v5, v5, v57
-; SI-NEXT: v_or_b32_e32 v6, v6, v32
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v32
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v60
+; SI-NEXT: v_or_b32_e32 v4, v4, v59
+; SI-NEXT: v_or_b32_e32 v5, v5, v58
+; SI-NEXT: v_or_b32_e32 v6, v6, v57
; SI-NEXT: v_or_b32_e32 v7, v7, v56
; SI-NEXT: v_or_b32_e32 v8, v8, v63
-; SI-NEXT: v_or_b32_e32 v9, v9, v62
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
-; SI-NEXT: v_or_b32_e32 v11, v11, v60
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
@@ -30904,25 +30937,25 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v53
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v50
@@ -30946,7 +30979,19 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v36
; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v34
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v33
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
@@ -30954,18 +30999,9 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -31005,16 +31041,22 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v46
@@ -31025,9 +31067,6 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v41
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v55
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v54
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -31037,21 +31076,15 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v2, v34, v2
-; SI-NEXT: v_or_b32_e32 v3, v58, v3
-; SI-NEXT: v_or_b32_e32 v4, v33, v4
-; SI-NEXT: v_or_b32_e32 v5, v57, v5
-; SI-NEXT: v_or_b32_e32 v6, v32, v6
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v32, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v60, v3
+; SI-NEXT: v_or_b32_e32 v4, v59, v4
+; SI-NEXT: v_or_b32_e32 v5, v58, v5
+; SI-NEXT: v_or_b32_e32 v6, v57, v6
; SI-NEXT: v_or_b32_e32 v7, v56, v7
; SI-NEXT: v_or_b32_e32 v8, v63, v8
-; SI-NEXT: v_or_b32_e32 v9, v62, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
-; SI-NEXT: v_or_b32_e32 v11, v60, v11
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -31061,40 +31094,64 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v53
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v52
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v36
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v34
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v33
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -31104,27 +31161,8 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -31375,46 +31413,49 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -31424,10 +31465,9 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -31435,33 +31475,61 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -31469,7 +31537,7 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -31484,6 +31552,7 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -31507,7 +31576,10 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -31515,63 +31587,29 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB50_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -31579,7 +31617,6 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
@@ -31588,37 +31625,39 @@ define <12 x double> @bitcast_v48i16_to_v12f64(<48 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -32222,10 +32261,10 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s30, s24, 16
; VI-NEXT: s_lshr_b32 s62, s23, 16
; VI-NEXT: s_lshr_b32 s63, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s66, s21, 16
; VI-NEXT: s_lshr_b32 s31, s20, 16
; VI-NEXT: s_lshr_b32 s34, s19, 16
; VI-NEXT: s_lshr_b32 s35, s18, 16
@@ -32261,7 +32300,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, s63, 16
@@ -32270,7 +32309,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -32347,17 +32386,17 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_mov_b32 s10, s8
; VI-NEXT: s_mov_b32 s8, s6
; VI-NEXT: s_mov_b32 s6, s60
-; VI-NEXT: s_mov_b32 s91, s61
; VI-NEXT: s_mov_b32 s88, s62
; VI-NEXT: s_mov_b32 s15, s63
+; VI-NEXT: s_mov_b32 s91, s66
; VI-NEXT: s_mov_b32 s77, s64
; VI-NEXT: s_mov_b32 s74, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: s_mov_b32 s65, s74
; VI-NEXT: s_mov_b32 s64, s77
+; VI-NEXT: s_mov_b32 s66, s91
; VI-NEXT: s_mov_b32 s63, s15
; VI-NEXT: s_mov_b32 s62, s88
-; VI-NEXT: s_mov_b32 s61, s91
; VI-NEXT: s_mov_b32 s60, s6
; VI-NEXT: s_mov_b32 s6, s8
; VI-NEXT: s_mov_b32 s8, s10
@@ -32416,7 +32455,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -32431,7 +32470,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s61, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -34591,13 +34630,13 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
@@ -34616,25 +34655,25 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56
@@ -34665,13 +34704,13 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
@@ -34780,8 +34819,8 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB54_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v59
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
; SI-NEXT: v_cvt_f32_f16_e32 v1, v47
; SI-NEXT: v_cvt_f32_f16_e32 v3, v46
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -34796,7 +34835,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v45
; SI-NEXT: v_cvt_f32_f16_e32 v4, v44
; SI-NEXT: v_cvt_f32_f16_e32 v5, v43
@@ -34808,7 +34847,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v33
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v42
@@ -34819,7 +34858,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v32
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v40
@@ -34830,7 +34869,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v58
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v54
@@ -34841,7 +34880,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v57
; SI-NEXT: v_cvt_f32_f16_e32 v12, v60
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -35247,46 +35286,49 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v23
; GFX9-NEXT: v_mov_b32_e32 v33, v22
; GFX9-NEXT: v_mov_b32_e32 v47, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
; GFX9-NEXT: v_mov_b32_e32 v34, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v8
; GFX9-NEXT: v_mov_b32_e32 v40, v7
; GFX9-NEXT: v_mov_b32_e32 v41, v6
@@ -35296,10 +35338,9 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v45, v2
; GFX9-NEXT: v_mov_b32_e32 v46, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
@@ -35307,33 +35348,61 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v3, v60, v44, s6
@@ -35341,7 +35410,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
@@ -35356,6 +35425,7 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; implicit-def: $vgpr45
@@ -35379,7 +35449,10 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr24
+; GFX9-NEXT: ; kill: killed $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr58
@@ -35387,63 +35460,29 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; kill: killed $vgpr24
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: .LBB54_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v0, v32, v47, s6
+; GFX9-NEXT: v_perm_b32 v0, v63, v47, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
; GFX9-NEXT: v_perm_b32 v1, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v2, v61, v45, s6
@@ -35452,7 +35491,6 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v5, v58, v42, s6
; GFX9-NEXT: v_perm_b32 v6, v57, v41, s6
; GFX9-NEXT: v_perm_b32 v7, v56, v40, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v55, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
@@ -35461,37 +35499,39 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v55, s6
; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
+; GFX9-NEXT: v_perm_b32 v9, v9, v54, s6
; GFX9-NEXT: s_waitcnt vmcnt(13)
-; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
+; GFX9-NEXT: v_perm_b32 v10, v10, v53, s6
; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
+; GFX9-NEXT: v_perm_b32 v11, v11, v52, s6
; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s6
; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
+; GFX9-NEXT: v_perm_b32 v13, v13, v50, s6
; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
+; GFX9-NEXT: v_perm_b32 v14, v14, v49, s6
; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
+; GFX9-NEXT: v_perm_b32 v15, v15, v48, s6
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
+; GFX9-NEXT: v_perm_b32 v16, v16, v39, s6
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s6
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s6
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
+; GFX9-NEXT: v_perm_b32 v19, v19, v36, s6
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: v_perm_b32 v20, v20, v35, s6
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v21, v21, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v22, v22, v33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -36718,24 +36758,28 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v53
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v13
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v30
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; kill: killed $vgpr24
@@ -36780,48 +36824,45 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; kill: killed $vgpr24
; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v20
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v18
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0
; SI-NEXT: ; kill: killed $vgpr24
; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v54
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v52
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v54
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v52
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v49
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v30
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v38
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v38
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v25
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v41
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v55
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v31
; SI-NEXT: ; kill: killed $vgpr24
; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
@@ -36840,119 +36881,122 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB56_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v53
; SI-NEXT: v_or_b32_e32 v46, v1, v24
; SI-NEXT: v_alignbit_b32 v1, v46, v58, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
; SI-NEXT: v_or_b32_e32 v44, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v44, v60, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
; SI-NEXT: v_or_b32_e32 v43, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v43, v61, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT: v_or_b32_e32 v41, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v41, v36, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
; SI-NEXT: v_or_b32_e32 v55, v1, v3
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_alignbit_b32 v1, v55, v51, 16
-; SI-NEXT: v_or_b32_e32 v0, v0, v58
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v52, v1, v3
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
; SI-NEXT: v_alignbit_b32 v1, v52, v40, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v0, v0, v61
-; SI-NEXT: v_or_b32_e32 v49, v1, v62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v30
+; SI-NEXT: v_or_b32_e32 v0, v0, v58
+; SI-NEXT: v_or_b32_e32 v49, v1, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
; SI-NEXT: v_alignbit_b32 v1, v49, v45, 16
-; SI-NEXT: v_or_b32_e32 v0, v0, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v60
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v38, v1, v57
-; SI-NEXT: v_or_b32_e32 v0, v0, v51
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v38, v1, v63
+; SI-NEXT: v_or_b32_e32 v0, v0, v61
; SI-NEXT: v_alignbit_b32 v1, v38, v59, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v0, v0, v40
+; SI-NEXT: v_or_b32_e32 v0, v0, v36
; SI-NEXT: v_or_b32_e32 v35, v1, v54
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
-; SI-NEXT: v_alignbit_b32 v1, v35, v63, 16
-; SI-NEXT: v_or_b32_e32 v0, v0, v45
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8
+; SI-NEXT: v_alignbit_b32 v1, v35, v62, 16
+; SI-NEXT: v_or_b32_e32 v0, v0, v51
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v33, v1, v47
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
+; SI-NEXT: v_or_b32_e32 v0, v0, v40
; SI-NEXT: v_alignbit_b32 v1, v33, v48, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
+; SI-NEXT: v_or_b32_e32 v0, v0, v45
+; SI-NEXT: v_or_b32_e32 v31, v1, v57
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14
+; SI-NEXT: v_alignbit_b32 v1, v31, v42, 16
+; SI-NEXT: v_or_b32_e32 v0, v0, v59
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v0, v0, v63
-; SI-NEXT: v_or_b32_e32 v31, v1, v25
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v24, v1, v25
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
+; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: v_or_b32_e32 v0, v0, v48
; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: v_alignbit_b32 v1, v31, v42, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20
; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v0, v0, v42
; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: v_or_b32_e32 v24, v1, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22
; SI-NEXT: ; kill: killed $vgpr25
@@ -36961,8 +37005,8 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v0, v0, v56
; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
@@ -36992,19 +37036,18 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; kill: killed $vgpr25
; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: .LBB56_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -37013,21 +37056,21 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v22, v56, v22
-; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v22
+; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v22, v26, v22
+; SI-NEXT: v_or_b32_e32 v22, v25, v22
; SI-NEXT: v_or_b32_e32 v20, v42, v20
-; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v20
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v20, v25, v20
+; SI-NEXT: v_or_b32_e32 v20, v57, v20
; SI-NEXT: v_or_b32_e32 v18, v48, v18
; SI-NEXT: v_add_i32_e32 v31, vcc, 0x30000, v20
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v18
@@ -37036,7 +37079,7 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v18, v47, v18
-; SI-NEXT: v_or_b32_e32 v16, v63, v16
+; SI-NEXT: v_or_b32_e32 v16, v62, v16
; SI-NEXT: v_add_i32_e32 v33, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17
@@ -37051,22 +37094,17 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v14, v57, v14
+; SI-NEXT: v_or_b32_e32 v14, v63, v14
; SI-NEXT: v_or_b32_e32 v12, v45, v12
; SI-NEXT: v_add_i32_e32 v38, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v12, v62, v12
; SI-NEXT: v_or_b32_e32 v10, v40, v10
-; SI-NEXT: v_add_i32_e32 v49, vcc, 0x30000, v12
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v10
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v51, v8
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
@@ -37082,15 +37120,23 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v58, v0
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v38
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v33
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v12, v13, v12
+; SI-NEXT: v_add_i32_e32 v49, vcc, 0x30000, v12
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v10
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v49
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_add_i32_e32 v52, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v52
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37098,7 +37144,7 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v55
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37106,7 +37152,7 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v41, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v4
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v41
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37114,7 +37160,7 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v43, vcc, 0x30000, v4
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x30000, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v43
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37122,75 +37168,73 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v44, vcc, 0x30000, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v44
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v46, vcc, 0x30000, v0
; SI-NEXT: v_alignbit_b32 v0, v46, v2, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v44, v4, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v43, v6, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v41, v8, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v55, v10, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v52, v12, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v49, v14, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v38, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v35, v18, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v33, v20, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v31, v22, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v24, v27, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v31
+; SI-NEXT: v_alignbit_b32 v0, v24, v26, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v33
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v31
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: .LBB56_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39
@@ -37201,45 +37245,43 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v28
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v26
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37247,19 +37289,19 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v43
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -37281,43 +37323,43 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v49
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v38
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v35
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v18, v18, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v33
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v31
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v22, v22, v23
@@ -37803,74 +37845,94 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v24, s49, 7
; SI-NEXT: v_writelane_b32 v24, s50, 8
; SI-NEXT: v_writelane_b32 v24, s51, 9
-; SI-NEXT: v_writelane_b32 v24, s52, 10
-; SI-NEXT: v_writelane_b32 v24, s54, 11
-; SI-NEXT: v_writelane_b32 v24, s55, 12
-; SI-NEXT: v_writelane_b32 v24, s30, 13
-; SI-NEXT: v_writelane_b32 v24, s31, 14
-; SI-NEXT: s_lshr_b32 s4, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s56, v0
+; SI-NEXT: v_writelane_b32 v24, s30, 10
+; SI-NEXT: v_writelane_b32 v24, s31, 11
+; SI-NEXT: s_lshr_b32 s10, s22, 16
; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshr_b32 s8, s56, 16
+; SI-NEXT: s_lshr_b32 s8, s24, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v25, s4, 0
-; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: v_writelane_b32 v25, s10, 0
+; SI-NEXT: s_lshr_b32 s6, s26, 16
; SI-NEXT: v_writelane_b32 v25, s8, 1
-; SI-NEXT: s_lshr_b32 s47, s6, 16
-; SI-NEXT: v_writelane_b32 v25, s56, 2
-; SI-NEXT: v_readfirstlane_b32 s41, v4
-; SI-NEXT: v_writelane_b32 v25, s47, 3
-; SI-NEXT: s_lshr_b32 s15, s41, 16
-; SI-NEXT: v_writelane_b32 v25, s6, 4
-; SI-NEXT: v_readfirstlane_b32 s49, v6
-; SI-NEXT: v_writelane_b32 v25, s15, 5
-; SI-NEXT: s_lshr_b32 s13, s49, 16
-; SI-NEXT: v_writelane_b32 v25, s41, 6
+; SI-NEXT: s_lshr_b32 s4, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s57, v0
+; SI-NEXT: v_writelane_b32 v25, s6, 2
+; SI-NEXT: s_lshr_b32 s58, s57, 16
+; SI-NEXT: v_writelane_b32 v25, s4, 3
+; SI-NEXT: v_readfirstlane_b32 s56, v2
+; SI-NEXT: v_writelane_b32 v25, s58, 4
+; SI-NEXT: s_lshr_b32 s47, s56, 16
+; SI-NEXT: v_writelane_b32 v25, s57, 5
+; SI-NEXT: v_readfirstlane_b32 s15, v4
+; SI-NEXT: v_writelane_b32 v25, s47, 6
+; SI-NEXT: s_lshr_b32 s41, s15, 16
+; SI-NEXT: v_writelane_b32 v25, s56, 7
+; SI-NEXT: v_readfirstlane_b32 s39, v6
+; SI-NEXT: v_writelane_b32 v25, s41, 8
+; SI-NEXT: s_lshr_b32 s13, s39, 16
+; SI-NEXT: v_writelane_b32 v25, s15, 9
; SI-NEXT: v_readfirstlane_b32 s45, v1
-; SI-NEXT: v_writelane_b32 v25, s13, 7
+; SI-NEXT: v_writelane_b32 v25, s13, 10
; SI-NEXT: v_readfirstlane_b32 s43, v3
-; SI-NEXT: v_writelane_b32 v25, s45, 8
+; SI-NEXT: v_writelane_b32 v25, s45, 11
; SI-NEXT: v_readfirstlane_b32 s11, v5
-; SI-NEXT: v_writelane_b32 v25, s43, 9
-; SI-NEXT: v_readfirstlane_b32 s5, v9
-; SI-NEXT: v_readfirstlane_b32 s51, v8
+; SI-NEXT: v_writelane_b32 v25, s43, 12
+; SI-NEXT: v_readfirstlane_b32 s7, v9
+; SI-NEXT: v_readfirstlane_b32 s48, v8
; SI-NEXT: v_readfirstlane_b32 s9, v7
-; SI-NEXT: v_writelane_b32 v25, s11, 10
+; SI-NEXT: v_writelane_b32 v25, s11, 13
; SI-NEXT: s_lshr_b32 s89, s29, 16
; SI-NEXT: s_lshr_b32 s79, s27, 16
-; SI-NEXT: s_lshr_b32 s50, s26, 16
; SI-NEXT: s_lshr_b32 s77, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s24, 16
; SI-NEXT: s_lshr_b32 s75, s23, 16
-; SI-NEXT: s_lshr_b32 s37, s22, 16
; SI-NEXT: s_lshr_b32 s73, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s20, 16
+; SI-NEXT: s_lshr_b32 s38, s20, 16
; SI-NEXT: s_lshr_b32 s63, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s18, 16
+; SI-NEXT: s_lshr_b32 s37, s18, 16
; SI-NEXT: s_lshr_b32 s61, s17, 16
; SI-NEXT: s_lshr_b32 s36, s16, 16
-; SI-NEXT: s_lshr_b32 s31, s5, 16
-; SI-NEXT: s_lshr_b32 s7, s51, 16
+; SI-NEXT: s_lshr_b32 s31, s7, 16
+; SI-NEXT: s_lshr_b32 s5, s48, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s9, 16
-; SI-NEXT: s_lshr_b32 s52, s11, 16
+; SI-NEXT: s_lshr_b32 s49, s11, 16
; SI-NEXT: s_lshr_b32 s93, s43, 16
; SI-NEXT: s_lshr_b32 s91, s45, 16
-; SI-NEXT: v_readfirstlane_b32 s10, v10
-; SI-NEXT: v_writelane_b32 v25, s9, 11
-; SI-NEXT: s_cmp_lg_u32 s10, 0
-; SI-NEXT: v_writelane_b32 v25, s5, 12
-; SI-NEXT: v_writelane_b32 v25, s7, 13
+; SI-NEXT: v_readfirstlane_b32 s12, v10
+; SI-NEXT: v_writelane_b32 v25, s9, 14
+; SI-NEXT: s_cmp_lg_u32 s12, 0
+; SI-NEXT: v_writelane_b32 v25, s7, 15
+; SI-NEXT: v_writelane_b32 v25, s5, 16
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_and_b32 s12, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s60, s36, 16
+; SI-NEXT: s_or_b32 s46, s12, s60
+; SI-NEXT: s_and_b32 s12, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s62, s37, 16
+; SI-NEXT: s_or_b32 s44, s12, s62
+; SI-NEXT: s_and_b32 s12, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s72, s38, 16
+; SI-NEXT: s_or_b32 s42, s12, s72
+; SI-NEXT: s_and_b32 s12, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s10, 16
+; SI-NEXT: s_lshl_b32 s76, s8, 16
+; SI-NEXT: s_and_b32 s8, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s78, s6, 16
; SI-NEXT: s_lshl_b32 s88, s4, 16
-; SI-NEXT: s_and_b32 s4, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s90, s8, 16
+; SI-NEXT: s_and_b32 s4, s57, 0xffff
+; SI-NEXT: s_lshl_b32 s90, s58, 16
+; SI-NEXT: s_or_b32 s40, s12, s74
+; SI-NEXT: s_and_b32 s10, s24, 0xffff
+; SI-NEXT: s_or_b32 s12, s8, s78
+; SI-NEXT: s_and_b32 s6, s28, 0xffff
; SI-NEXT: s_or_b32 s8, s4, s90
-; SI-NEXT: s_and_b32 s4, s6, 0xffff
+; SI-NEXT: s_and_b32 s4, s56, 0xffff
; SI-NEXT: s_lshl_b32 s92, s47, 16
+; SI-NEXT: s_or_b32 s14, s10, s76
+; SI-NEXT: s_or_b32 s10, s6, s88
; SI-NEXT: s_or_b32 s6, s4, s92
-; SI-NEXT: s_and_b32 s4, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s15, 16
+; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s41, 16
; SI-NEXT: s_and_b32 s15, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s61, 16
; SI-NEXT: s_lshl_b32 s56, s13, 16
@@ -37898,40 +37960,29 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s79, s47, s57
; SI-NEXT: s_and_b32 s47, s29, 0xffff
; SI-NEXT: s_lshl_b32 s57, s89, 16
-; SI-NEXT: s_and_b32 s10, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s36, 16
; SI-NEXT: s_mov_b32 s34, s89
; SI-NEXT: s_or_b32 s89, s47, s57
; SI-NEXT: s_and_b32 s45, s45, 0xffff
; SI-NEXT: s_lshl_b32 s47, s91, 16
-; SI-NEXT: s_or_b32 s46, s10, s60
-; SI-NEXT: s_and_b32 s10, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s38, 16
; SI-NEXT: s_mov_b32 s35, s91
; SI-NEXT: s_or_b32 s91, s45, s47
; SI-NEXT: s_and_b32 s43, s43, 0xffff
; SI-NEXT: s_lshl_b32 s45, s93, 16
-; SI-NEXT: s_or_b32 s44, s10, s62
-; SI-NEXT: s_and_b32 s10, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s39, 16
-; SI-NEXT: s_mov_b32 s95, s51
-; SI-NEXT: s_mov_b32 s51, s49
-; SI-NEXT: s_mov_b32 s49, s93
+; SI-NEXT: s_mov_b32 s95, s48
+; SI-NEXT: s_mov_b32 s48, s39
+; SI-NEXT: s_mov_b32 s39, s93
; SI-NEXT: s_or_b32 s93, s43, s45
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s52, 16
-; SI-NEXT: s_or_b32 s42, s10, s72
-; SI-NEXT: s_and_b32 s10, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s37, 16
+; SI-NEXT: s_lshl_b32 s43, s49, 16
; SI-NEXT: s_or_b32 s59, s11, s43
-; SI-NEXT: s_mov_b32 s43, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
-; SI-NEXT: s_or_b32 s40, s10, s74
-; SI-NEXT: s_and_b32 s10, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s48, 16
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s11, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s54, s7, 16
+; SI-NEXT: s_or_b32 s57, s9, s11
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s31, 16
+; SI-NEXT: s_mov_b32 s43, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
+; SI-NEXT: s_or_b32 s51, s7, s9
; SI-NEXT: s_mov_b32 s45, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
; SI-NEXT: s_mov_b32 s73, s41
@@ -37939,34 +37990,25 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
; SI-NEXT: s_mov_b32 s7, s93
; SI-NEXT: s_lshr_b64 s[92:93], s[92:93], 16
-; SI-NEXT: s_or_b32 s14, s10, s76
-; SI-NEXT: s_and_b32 s10, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s78, s50, 16
-; SI-NEXT: s_or_b32 s57, s9, s11
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s31, 16
; SI-NEXT: s_mov_b32 s47, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
; SI-NEXT: s_mov_b32 s63, s15
; SI-NEXT: s_mov_b32 s75, s94
; SI-NEXT: s_mov_b32 s15, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
-; SI-NEXT: s_mov_b32 s93, s49
-; SI-NEXT: s_mov_b32 s49, s51
-; SI-NEXT: s_mov_b32 s51, s95
+; SI-NEXT: s_mov_b32 s93, s39
+; SI-NEXT: s_mov_b32 s39, s48
+; SI-NEXT: s_mov_b32 s48, s95
; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16
-; SI-NEXT: s_or_b32 s12, s10, s78
-; SI-NEXT: s_and_b32 s10, s28, 0xffff
; SI-NEXT: s_or_b32 s4, s4, s58
-; SI-NEXT: s_or_b32 s55, s5, s9
+; SI-NEXT: s_lshl_b32 s50, s5, 16
; SI-NEXT: s_mov_b32 s61, s13
; SI-NEXT: s_mov_b32 s77, vcc_lo
; SI-NEXT: s_mov_b32 s13, s79
; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16
-; SI-NEXT: s_and_b32 s58, s49, 0xffff
+; SI-NEXT: s_and_b32 s58, s39, 0xffff
; SI-NEXT: s_mov_b32 s95, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
-; SI-NEXT: s_or_b32 s10, s10, s88
; SI-NEXT: s_mov_b32 s79, s30
; SI-NEXT: s_mov_b32 s11, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[88:89], 16
@@ -37974,15 +38016,15 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[90:91], s[90:91], 16
; SI-NEXT: s_or_b32 s58, s58, s56
; SI-NEXT: s_mov_b32 vcc_hi, s95
-; SI-NEXT: s_and_b32 s56, s51, 0xffff
+; SI-NEXT: s_and_b32 s56, s48, 0xffff
; SI-NEXT: s_mov_b32 s95, s31
-; SI-NEXT: s_lshr_b64 s[30:31], s[54:55], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[50:51], 16
; SI-NEXT: s_mov_b32 s89, s34
; SI-NEXT: s_mov_b32 s91, s35
; SI-NEXT: s_mov_b32 s5, s59
; SI-NEXT: s_mov_b32 s59, s57
-; SI-NEXT: s_or_b32 s56, s56, s54
-; SI-NEXT: s_mov_b32 s57, s55
+; SI-NEXT: s_or_b32 s56, s56, s50
+; SI-NEXT: s_mov_b32 s57, s51
; SI-NEXT: s_mov_b32 s31, s95
; SI-NEXT: s_mov_b64 s[34:35], 0
; SI-NEXT: s_branch .LBB57_3
@@ -38018,92 +38060,95 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_cmp_lg_u32 s95, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s4, s51, 3
+; SI-NEXT: s_add_i32 s4, s48, 3
; SI-NEXT: s_and_b32 s5, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v25, 13
+; SI-NEXT: v_readlane_b32 s4, v25, 16
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v25, 12
+; SI-NEXT: v_readlane_b32 s4, v25, 15
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_add_i32 s4, s49, 3
+; SI-NEXT: s_add_i32 s4, s39, 3
; SI-NEXT: s_and_b32 s5, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v25, 7
+; SI-NEXT: v_readlane_b32 s4, v25, 10
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v25, 11
+; SI-NEXT: v_readlane_b32 s4, v25, 14
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v25, 6
+; SI-NEXT: v_readlane_b32 s4, v25, 9
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s5, s4, 0xffff
-; SI-NEXT: v_readlane_b32 s4, v25, 5
+; SI-NEXT: v_readlane_b32 s4, v25, 8
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_readlane_b32 s5, v25, 10
+; SI-NEXT: v_readlane_b32 s5, v25, 13
; SI-NEXT: s_add_i32 s5, s5, 3
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s52, 16
+; SI-NEXT: s_lshl_b32 s6, s49, 16
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v25, 4
+; SI-NEXT: v_readlane_b32 s6, v25, 7
; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: s_and_b32 s7, s6, 0xffff
-; SI-NEXT: v_readlane_b32 s6, v25, 3
+; SI-NEXT: v_readlane_b32 s6, v25, 6
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: v_readlane_b32 s7, v25, 9
+; SI-NEXT: v_readlane_b32 s7, v25, 12
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s8, s93, 16
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v25, 2
+; SI-NEXT: v_readlane_b32 s8, v25, 5
; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_and_b32 s9, s8, 0xffff
-; SI-NEXT: v_readlane_b32 s8, v25, 1
+; SI-NEXT: v_readlane_b32 s8, v25, 4
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: v_readlane_b32 s9, v25, 8
+; SI-NEXT: v_readlane_b32 s9, v25, 11
; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s10, s91, 16
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: v_readlane_b32 s10, v25, 0
+; SI-NEXT: v_readlane_b32 s10, v25, 3
; SI-NEXT: s_and_b32 s11, s28, 0xffff
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s29, 0xffff
; SI-NEXT: s_lshl_b32 s12, s89, 16
-; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s50, 16
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: v_readlane_b32 s12, v25, 2
+; SI-NEXT: s_and_b32 s13, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s13, s27, 0xffff
; SI-NEXT: s_lshl_b32 s14, s79, 16
-; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s48, 16
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: v_readlane_b32 s14, v25, 1
+; SI-NEXT: s_and_b32 s15, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s15, s25, 0xffff
; SI-NEXT: s_lshl_b32 s24, s77, 16
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s15, s24, s15
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s37, 16
-; SI-NEXT: s_or_b32 s22, s24, s22
+; SI-NEXT: s_and_b32 s24, s22, 0xffff
+; SI-NEXT: v_readlane_b32 s22, v25, 0
+; SI-NEXT: s_lshl_b32 s22, s22, 16
+; SI-NEXT: s_or_b32 s22, s22, s24
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s40, s22, 0x30000
; SI-NEXT: s_and_b32 s22, s23, 0xffff
@@ -38112,7 +38157,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s41, s22, 0x30000
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s39, 16
+; SI-NEXT: s_lshl_b32 s22, s38, 16
; SI-NEXT: s_or_b32 s20, s22, s20
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s42, s20, 0x30000
@@ -38122,7 +38167,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s43, s20, 0x30000
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s38, 16
+; SI-NEXT: s_lshl_b32 s20, s37, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s44, s18, 0x30000
@@ -38173,7 +38218,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s89, s11, 16
; SI-NEXT: s_lshr_b32 s91, s9, 16
; SI-NEXT: s_lshr_b32 s93, s7, 16
-; SI-NEXT: s_lshr_b32 s52, s5, 16
+; SI-NEXT: s_lshr_b32 s49, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s59, 16
; SI-NEXT: s_lshr_b32 s31, s57, 16
; SI-NEXT: .LBB57_5: ; %end
@@ -38235,7 +38280,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s24, s94, 16
; SI-NEXT: s_or_b32 s4, s4, s24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s52, 16
+; SI-NEXT: s_lshl_b32 s24, s49, 16
; SI-NEXT: s_or_b32 s5, s5, s24
; SI-NEXT: s_and_b32 s24, s58, 0xffff
; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
@@ -38249,7 +38294,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_and_b32 s27, s57, 0xffff
; SI-NEXT: s_lshl_b32 s28, s31, 16
; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: v_readlane_b32 s30, v24, 13
+; SI-NEXT: v_readlane_b32 s30, v24, 10
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -38274,10 +38319,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v21, s25
; SI-NEXT: v_mov_b32_e32 v22, s26
; SI-NEXT: v_mov_b32_e32 v23, s27
-; SI-NEXT: v_readlane_b32 s31, v24, 14
-; SI-NEXT: v_readlane_b32 s55, v24, 12
-; SI-NEXT: v_readlane_b32 s54, v24, 11
-; SI-NEXT: v_readlane_b32 s52, v24, 10
+; SI-NEXT: v_readlane_b32 s31, v24, 11
; SI-NEXT: v_readlane_b32 s51, v24, 9
; SI-NEXT: v_readlane_b32 s50, v24, 8
; SI-NEXT: v_readlane_b32 s49, v24, 7
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
index 37e99caf3b38d..867dff88e984a 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
@@ -5038,6 +5038,8 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v35, v22
+; SI-NEXT: v_mov_b32_e32 v36, v21
; SI-NEXT: v_mov_b32_e32 v37, v20
; SI-NEXT: v_mov_b32_e32 v38, v19
; SI-NEXT: v_mov_b32_e32 v39, v18
@@ -5066,10 +5068,8 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
@@ -5086,24 +5086,24 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
@@ -5119,37 +5119,43 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56
@@ -5160,19 +5166,15 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_or_b32_e32 v1, v1, v36
-; SI-NEXT: v_or_b32_e32 v2, v2, v59
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_or_b32_e32 v4, v4, v58
-; SI-NEXT: v_or_b32_e32 v5, v5, v34
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v33
-; SI-NEXT: v_or_b32_e32 v8, v8, v62
-; SI-NEXT: v_or_b32_e32 v9, v9, v32
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v32
+; SI-NEXT: v_or_b32_e32 v6, v6, v59
+; SI-NEXT: v_or_b32_e32 v7, v7, v58
+; SI-NEXT: v_or_b32_e32 v8, v8, v63
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -5183,25 +5185,23 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
@@ -5230,7 +5230,15 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
@@ -5240,14 +5248,8 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -5303,18 +5305,22 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v56
@@ -5325,8 +5331,6 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v43
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v42
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -5336,19 +5340,15 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v60, v0
-; SI-NEXT: v_or_b32_e32 v1, v36, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
-; SI-NEXT: v_or_b32_e32 v3, v35, v3
-; SI-NEXT: v_or_b32_e32 v4, v58, v4
-; SI-NEXT: v_or_b32_e32 v5, v34, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v33, v7
-; SI-NEXT: v_or_b32_e32 v8, v62, v8
-; SI-NEXT: v_or_b32_e32 v9, v32, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v34, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v32, v5
+; SI-NEXT: v_or_b32_e32 v6, v59, v6
+; SI-NEXT: v_or_b32_e32 v7, v58, v7
+; SI-NEXT: v_or_b32_e32 v8, v63, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -5358,48 +5358,64 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v36
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -5410,21 +5426,7 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -5705,54 +5707,61 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -5760,52 +5769,89 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -5820,6 +5866,9 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -5843,136 +5892,98 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB14_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -5988,13 +5999,7 @@ define <26 x i32> @bitcast_v52i16_to_v26i32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB14_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -8922,44 +8927,47 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v38, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; SI-NEXT: v_mov_b32_e32 v39, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; SI-NEXT: v_mov_b32_e32 v48, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v11
; SI-NEXT: v_mov_b32_e32 v55, v10
; SI-NEXT: v_mov_b32_e32 v40, v9
@@ -8973,22 +8981,21 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v56, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
@@ -8997,52 +9004,51 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB18_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v35
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v62
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v61
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v60
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -9055,25 +9061,26 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -9105,7 +9112,12 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
@@ -9113,8 +9125,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(4)
@@ -9126,10 +9137,6 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
@@ -9193,8 +9200,8 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB18_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v37
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v57
; SI-NEXT: v_cvt_f32_f16_e32 v3, v56
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -9209,7 +9216,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v47
; SI-NEXT: v_cvt_f32_f16_e32 v4, v46
; SI-NEXT: v_cvt_f32_f16_e32 v5, v45
@@ -9221,7 +9228,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v35
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v44
@@ -9232,7 +9239,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v42
@@ -9243,7 +9250,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v34
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v40
@@ -9254,7 +9261,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v54
@@ -9265,7 +9272,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v63
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v15, v52
@@ -9276,7 +9283,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f32_f16_e32 v18, v49
@@ -9287,51 +9294,64 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v62
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v37
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v61
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v60
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
@@ -9343,9 +9363,9 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -9362,9 +9382,9 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v16, v18, v16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -9381,39 +9401,28 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v20, v22, v20
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -9700,54 +9709,61 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -9755,52 +9771,89 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -9815,6 +9868,9 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -9838,137 +9894,99 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB18_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -9984,13 +10002,7 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB18_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -15793,6 +15805,8 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v35, v22
+; SI-NEXT: v_mov_b32_e32 v36, v21
; SI-NEXT: v_mov_b32_e32 v37, v20
; SI-NEXT: v_mov_b32_e32 v38, v19
; SI-NEXT: v_mov_b32_e32 v39, v18
@@ -15821,10 +15835,8 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
@@ -15841,24 +15853,24 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
@@ -15874,37 +15886,43 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56
@@ -15915,19 +15933,15 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_or_b32_e32 v1, v1, v36
-; SI-NEXT: v_or_b32_e32 v2, v2, v59
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_or_b32_e32 v4, v4, v58
-; SI-NEXT: v_or_b32_e32 v5, v5, v34
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v33
-; SI-NEXT: v_or_b32_e32 v8, v8, v62
-; SI-NEXT: v_or_b32_e32 v9, v9, v32
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v32
+; SI-NEXT: v_or_b32_e32 v6, v6, v59
+; SI-NEXT: v_or_b32_e32 v7, v7, v58
+; SI-NEXT: v_or_b32_e32 v8, v8, v63
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -15938,25 +15952,23 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
@@ -15985,7 +15997,15 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
@@ -15995,14 +16015,8 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -16058,18 +16072,22 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v56
@@ -16080,8 +16098,6 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v43
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v42
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -16091,19 +16107,15 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v60, v0
-; SI-NEXT: v_or_b32_e32 v1, v36, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
-; SI-NEXT: v_or_b32_e32 v3, v35, v3
-; SI-NEXT: v_or_b32_e32 v4, v58, v4
-; SI-NEXT: v_or_b32_e32 v5, v34, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v33, v7
-; SI-NEXT: v_or_b32_e32 v8, v62, v8
-; SI-NEXT: v_or_b32_e32 v9, v32, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v34, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v32, v5
+; SI-NEXT: v_or_b32_e32 v6, v59, v6
+; SI-NEXT: v_or_b32_e32 v7, v58, v7
+; SI-NEXT: v_or_b32_e32 v8, v63, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -16113,48 +16125,64 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v36
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -16165,21 +16193,7 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -16460,54 +16474,61 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -16515,52 +16536,89 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -16575,6 +16633,9 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -16598,136 +16659,98 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB30_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -16743,13 +16766,7 @@ define <26 x float> @bitcast_v52i16_to_v26f32(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB30_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -19996,44 +20013,47 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v38, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; SI-NEXT: v_mov_b32_e32 v39, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; SI-NEXT: v_mov_b32_e32 v48, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v11
; SI-NEXT: v_mov_b32_e32 v55, v10
; SI-NEXT: v_mov_b32_e32 v40, v9
@@ -20047,22 +20067,21 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v56, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
@@ -20071,52 +20090,51 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB34_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v35
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v62
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v61
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v60
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -20129,25 +20147,26 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -20179,7 +20198,12 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
@@ -20187,8 +20211,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(4)
@@ -20200,10 +20223,6 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
@@ -20267,8 +20286,8 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB34_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v37
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v57
; SI-NEXT: v_cvt_f32_f16_e32 v3, v56
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -20283,7 +20302,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v47
; SI-NEXT: v_cvt_f32_f16_e32 v4, v46
; SI-NEXT: v_cvt_f32_f16_e32 v5, v45
@@ -20295,7 +20314,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v35
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v44
@@ -20306,7 +20325,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v42
@@ -20317,7 +20336,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v34
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v40
@@ -20328,7 +20347,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v54
@@ -20339,7 +20358,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v63
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v15, v52
@@ -20350,7 +20369,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f32_f16_e32 v18, v49
@@ -20361,51 +20380,64 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v62
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v37
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v61
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v60
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
@@ -20417,9 +20449,9 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -20436,9 +20468,9 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v16, v18, v16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -20455,39 +20487,28 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v20, v22, v20
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -20774,54 +20795,61 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -20829,52 +20857,89 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -20889,6 +20954,9 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -20912,137 +20980,99 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB34_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -21058,13 +21088,7 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB34_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -24283,8 +24307,8 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b32 s42, s17, 16
; SI-NEXT: s_lshr_b32 s95, s5, 16
; SI-NEXT: s_lshr_b32 s40, s7, 16
-; SI-NEXT: s_lshr_b32 s59, s9, 16
-; SI-NEXT: s_lshr_b32 s58, s11, 16
+; SI-NEXT: s_lshr_b32 s73, s9, 16
+; SI-NEXT: s_lshr_b32 s72, s11, 16
; SI-NEXT: s_lshr_b32 s94, s13, 16
; SI-NEXT: s_lshr_b32 s41, s29, 16
; SI-NEXT: v_writelane_b32 v26, s42, 5
@@ -24292,11 +24316,11 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
-; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 vcc, s[24:25], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
@@ -24313,17 +24337,17 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
@@ -24348,7 +24372,7 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: v_readlane_b32 s45, v26, 2
; SI-NEXT: v_readlane_b32 s47, v26, 3
; SI-NEXT: v_readlane_b32 s57, v26, 4
-; SI-NEXT: v_readlane_b32 s61, v26, 5
+; SI-NEXT: v_readlane_b32 s59, v26, 5
; SI-NEXT: v_readlane_b32 s41, v26, 6
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
@@ -24386,25 +24410,25 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b32 s56, s21, 16
; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b32 s60, s19, 16
+; SI-NEXT: s_lshr_b32 s58, s19, 16
; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s62, s17, 16
-; SI-NEXT: s_mov_b32 s57, s60
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s60, s17, 16
+; SI-NEXT: s_mov_b32 s57, s58
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b32 s95, s5, 16
; SI-NEXT: s_lshr_b32 s40, s7, 16
-; SI-NEXT: s_lshr_b32 s59, s9, 16
-; SI-NEXT: s_lshr_b32 s58, s11, 16
+; SI-NEXT: s_lshr_b32 s73, s9, 16
+; SI-NEXT: s_lshr_b32 s72, s11, 16
; SI-NEXT: s_lshr_b32 s94, s13, 16
; SI-NEXT: s_lshr_b32 s41, s15, 16
; SI-NEXT: s_lshr_b32 s90, s29, 16
; SI-NEXT: s_lshr_b32 s91, s27, 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
-; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16
-; SI-NEXT: s_mov_b32 s61, s62
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
+; SI-NEXT: s_mov_b32 s59, s60
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 vcc, s[24:25], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
@@ -24414,7 +24438,7 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s41, s41, 16
; SI-NEXT: s_or_b32 s15, s15, s41
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s92, 16
+; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_and_b32 s25, s25, 0xffff
; SI-NEXT: s_lshl_b32 s43, s43, 16
; SI-NEXT: s_or_b32 s12, s12, s41
@@ -24422,7 +24446,7 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s41, s94, 16
; SI-NEXT: s_or_b32 s25, s25, s43
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s62, 16
+; SI-NEXT: s_lshl_b32 s43, s92, 16
; SI-NEXT: s_or_b32 s13, s13, s41
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s41, s56, 16
@@ -24431,17 +24455,17 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s43, s91, 16
; SI-NEXT: s_or_b32 s10, s10, s41
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s58, 16
+; SI-NEXT: s_lshl_b32 s41, s72, 16
; SI-NEXT: s_or_b32 s27, s27, s43
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s60, 16
+; SI-NEXT: s_lshl_b32 s43, s62, 16
; SI-NEXT: s_or_b32 s11, s11, s41
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s41, s46, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_lshl_b32 s59, s59, 16
; SI-NEXT: s_and_b32 s19, s19, 0xffff
; SI-NEXT: s_lshl_b32 s57, s57, 16
; SI-NEXT: s_and_b32 s21, s21, 0xffff
@@ -24453,14 +24477,14 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s43, s90, 16
; SI-NEXT: s_or_b32 s8, s8, s41
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s59, 16
+; SI-NEXT: s_lshl_b32 s41, s73, 16
; SI-NEXT: s_or_b32 s7, s7, s40
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s40, s42, 16
-; SI-NEXT: s_lshl_b32 s63, s88, 16
+; SI-NEXT: s_lshl_b32 s61, s88, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s61
-; SI-NEXT: s_lshl_b32 s61, s78, 16
+; SI-NEXT: s_or_b32 s17, s17, s59
+; SI-NEXT: s_lshl_b32 s59, s78, 16
; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s19, s19, s57
; SI-NEXT: s_lshl_b32 s57, s76, 16
@@ -24469,19 +24493,19 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_lshl_b32 s47, s74, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
; SI-NEXT: s_or_b32 s23, s23, s45
-; SI-NEXT: s_lshl_b32 s45, s72, 16
+; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
; SI-NEXT: s_and_b32 s24, s24, 0xffff
; SI-NEXT: s_or_b32 s29, s29, s43
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s43, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s43, s60, 16
; SI-NEXT: s_or_b32 s9, s9, s41
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s41, s44, 16
; SI-NEXT: s_or_b32 s4, s4, s40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s40, s95, 16
-; SI-NEXT: s_or_b32 s16, s16, s63
-; SI-NEXT: s_or_b32 s18, s18, s61
+; SI-NEXT: s_or_b32 s16, s16, s61
+; SI-NEXT: s_or_b32 s18, s18, s59
; SI-NEXT: s_or_b32 s20, s20, s57
; SI-NEXT: s_or_b32 s22, s22, s47
; SI-NEXT: s_or_b32 s24, s24, s45
@@ -25158,6 +25182,8 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v35, v22
+; SI-NEXT: v_mov_b32_e32 v36, v21
; SI-NEXT: v_mov_b32_e32 v37, v20
; SI-NEXT: v_mov_b32_e32 v38, v19
; SI-NEXT: v_mov_b32_e32 v39, v18
@@ -25186,10 +25212,8 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
@@ -25206,24 +25230,24 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
@@ -25239,37 +25263,43 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56
@@ -25280,19 +25310,15 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_or_b32_e32 v1, v1, v36
-; SI-NEXT: v_or_b32_e32 v2, v2, v59
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_or_b32_e32 v4, v4, v58
-; SI-NEXT: v_or_b32_e32 v5, v5, v34
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v33
-; SI-NEXT: v_or_b32_e32 v8, v8, v62
-; SI-NEXT: v_or_b32_e32 v9, v9, v32
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v32
+; SI-NEXT: v_or_b32_e32 v6, v6, v59
+; SI-NEXT: v_or_b32_e32 v7, v7, v58
+; SI-NEXT: v_or_b32_e32 v8, v8, v63
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -25303,25 +25329,23 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
@@ -25350,7 +25374,15 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
@@ -25360,14 +25392,8 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -25423,18 +25449,22 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v56
@@ -25445,8 +25475,6 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v43
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v42
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -25456,19 +25484,15 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v60, v0
-; SI-NEXT: v_or_b32_e32 v1, v36, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
-; SI-NEXT: v_or_b32_e32 v3, v35, v3
-; SI-NEXT: v_or_b32_e32 v4, v58, v4
-; SI-NEXT: v_or_b32_e32 v5, v34, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v33, v7
-; SI-NEXT: v_or_b32_e32 v8, v62, v8
-; SI-NEXT: v_or_b32_e32 v9, v32, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v34, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v32, v5
+; SI-NEXT: v_or_b32_e32 v6, v59, v6
+; SI-NEXT: v_or_b32_e32 v7, v58, v7
+; SI-NEXT: v_or_b32_e32 v8, v63, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -25478,48 +25502,64 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v36
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -25530,21 +25570,7 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -25825,54 +25851,61 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -25880,52 +25913,89 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -25940,6 +26010,9 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -25963,136 +26036,98 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB42_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -26108,13 +26143,7 @@ define <13 x i64> @bitcast_v52i16_to_v13i64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB42_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -28187,8 +28216,8 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshr_b32 s42, s17, 16
; SI-NEXT: s_lshr_b32 s95, s5, 16
; SI-NEXT: s_lshr_b32 s40, s7, 16
-; SI-NEXT: s_lshr_b32 s59, s9, 16
-; SI-NEXT: s_lshr_b32 s58, s11, 16
+; SI-NEXT: s_lshr_b32 s73, s9, 16
+; SI-NEXT: s_lshr_b32 s72, s11, 16
; SI-NEXT: s_lshr_b32 s94, s13, 16
; SI-NEXT: s_lshr_b32 s41, s29, 16
; SI-NEXT: v_writelane_b32 v26, s42, 5
@@ -28196,11 +28225,11 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
-; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 vcc, s[24:25], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
@@ -28217,17 +28246,17 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
@@ -28252,7 +28281,7 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: v_readlane_b32 s45, v26, 2
; SI-NEXT: v_readlane_b32 s47, v26, 3
; SI-NEXT: v_readlane_b32 s57, v26, 4
-; SI-NEXT: v_readlane_b32 s61, v26, 5
+; SI-NEXT: v_readlane_b32 s59, v26, 5
; SI-NEXT: v_readlane_b32 s41, v26, 6
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
@@ -28290,25 +28319,25 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshr_b32 s56, s21, 16
; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b32 s60, s19, 16
+; SI-NEXT: s_lshr_b32 s58, s19, 16
; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s62, s17, 16
-; SI-NEXT: s_mov_b32 s57, s60
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s60, s17, 16
+; SI-NEXT: s_mov_b32 s57, s58
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b32 s95, s5, 16
; SI-NEXT: s_lshr_b32 s40, s7, 16
-; SI-NEXT: s_lshr_b32 s59, s9, 16
-; SI-NEXT: s_lshr_b32 s58, s11, 16
+; SI-NEXT: s_lshr_b32 s73, s9, 16
+; SI-NEXT: s_lshr_b32 s72, s11, 16
; SI-NEXT: s_lshr_b32 s94, s13, 16
; SI-NEXT: s_lshr_b32 s41, s15, 16
; SI-NEXT: s_lshr_b32 s90, s29, 16
; SI-NEXT: s_lshr_b32 s91, s27, 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
-; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16
-; SI-NEXT: s_mov_b32 s61, s62
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
+; SI-NEXT: s_mov_b32 s59, s60
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 vcc, s[24:25], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
@@ -28318,7 +28347,7 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s41, s41, 16
; SI-NEXT: s_or_b32 s15, s15, s41
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s92, 16
+; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_and_b32 s25, s25, 0xffff
; SI-NEXT: s_lshl_b32 s43, s43, 16
; SI-NEXT: s_or_b32 s12, s12, s41
@@ -28326,7 +28355,7 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s41, s94, 16
; SI-NEXT: s_or_b32 s25, s25, s43
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s62, 16
+; SI-NEXT: s_lshl_b32 s43, s92, 16
; SI-NEXT: s_or_b32 s13, s13, s41
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s41, s56, 16
@@ -28335,17 +28364,17 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s43, s91, 16
; SI-NEXT: s_or_b32 s10, s10, s41
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s58, 16
+; SI-NEXT: s_lshl_b32 s41, s72, 16
; SI-NEXT: s_or_b32 s27, s27, s43
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s60, 16
+; SI-NEXT: s_lshl_b32 s43, s62, 16
; SI-NEXT: s_or_b32 s11, s11, s41
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s41, s46, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_lshl_b32 s59, s59, 16
; SI-NEXT: s_and_b32 s19, s19, 0xffff
; SI-NEXT: s_lshl_b32 s57, s57, 16
; SI-NEXT: s_and_b32 s21, s21, 0xffff
@@ -28357,14 +28386,14 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s43, s90, 16
; SI-NEXT: s_or_b32 s8, s8, s41
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s59, 16
+; SI-NEXT: s_lshl_b32 s41, s73, 16
; SI-NEXT: s_or_b32 s7, s7, s40
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s40, s42, 16
-; SI-NEXT: s_lshl_b32 s63, s88, 16
+; SI-NEXT: s_lshl_b32 s61, s88, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s61
-; SI-NEXT: s_lshl_b32 s61, s78, 16
+; SI-NEXT: s_or_b32 s17, s17, s59
+; SI-NEXT: s_lshl_b32 s59, s78, 16
; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s19, s19, s57
; SI-NEXT: s_lshl_b32 s57, s76, 16
@@ -28373,19 +28402,19 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_lshl_b32 s47, s74, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
; SI-NEXT: s_or_b32 s23, s23, s45
-; SI-NEXT: s_lshl_b32 s45, s72, 16
+; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
; SI-NEXT: s_and_b32 s24, s24, 0xffff
; SI-NEXT: s_or_b32 s29, s29, s43
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s43, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s43, s60, 16
; SI-NEXT: s_or_b32 s9, s9, s41
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s41, s44, 16
; SI-NEXT: s_or_b32 s4, s4, s40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s40, s95, 16
-; SI-NEXT: s_or_b32 s16, s16, s63
-; SI-NEXT: s_or_b32 s18, s18, s61
+; SI-NEXT: s_or_b32 s16, s16, s61
+; SI-NEXT: s_or_b32 s18, s18, s59
; SI-NEXT: s_or_b32 s20, s20, s57
; SI-NEXT: s_or_b32 s22, s22, s47
; SI-NEXT: s_or_b32 s24, s24, s45
@@ -29073,44 +29102,47 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v38, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; SI-NEXT: v_mov_b32_e32 v39, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; SI-NEXT: v_mov_b32_e32 v48, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v11
; SI-NEXT: v_mov_b32_e32 v55, v10
; SI-NEXT: v_mov_b32_e32 v40, v9
@@ -29124,22 +29156,21 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v56, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
@@ -29148,52 +29179,51 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB46_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v35
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v62
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v61
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v60
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -29206,25 +29236,26 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -29256,7 +29287,12 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
@@ -29264,8 +29300,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(4)
@@ -29277,10 +29312,6 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
@@ -29344,8 +29375,8 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB46_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v37
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v57
; SI-NEXT: v_cvt_f32_f16_e32 v3, v56
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -29360,7 +29391,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v47
; SI-NEXT: v_cvt_f32_f16_e32 v4, v46
; SI-NEXT: v_cvt_f32_f16_e32 v5, v45
@@ -29372,7 +29403,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v35
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v44
@@ -29383,7 +29414,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v42
@@ -29394,7 +29425,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v34
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v40
@@ -29405,7 +29436,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v54
@@ -29416,7 +29447,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v63
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v15, v52
@@ -29427,7 +29458,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f32_f16_e32 v18, v49
@@ -29438,51 +29469,64 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v62
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v37
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v61
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v60
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
@@ -29494,9 +29538,9 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -29513,9 +29557,9 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v16, v18, v16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -29532,39 +29576,28 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v20, v22, v20
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -29851,54 +29884,61 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -29906,52 +29946,89 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -29966,6 +30043,9 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -29989,137 +30069,99 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB46_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -30135,13 +30177,7 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB46_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -33287,6 +33323,8 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v35, v22
+; SI-NEXT: v_mov_b32_e32 v36, v21
; SI-NEXT: v_mov_b32_e32 v37, v20
; SI-NEXT: v_mov_b32_e32 v38, v19
; SI-NEXT: v_mov_b32_e32 v39, v18
@@ -33315,10 +33353,8 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v36
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
@@ -33335,24 +33371,24 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v16
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
@@ -33368,37 +33404,43 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56
@@ -33409,19 +33451,15 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_or_b32_e32 v1, v1, v36
-; SI-NEXT: v_or_b32_e32 v2, v2, v59
-; SI-NEXT: v_or_b32_e32 v3, v3, v35
-; SI-NEXT: v_or_b32_e32 v4, v4, v58
-; SI-NEXT: v_or_b32_e32 v5, v5, v34
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v33
-; SI-NEXT: v_or_b32_e32 v8, v8, v62
-; SI-NEXT: v_or_b32_e32 v9, v9, v32
-; SI-NEXT: v_or_b32_e32 v10, v10, v61
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_or_b32_e32 v1, v1, v34
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v32
+; SI-NEXT: v_or_b32_e32 v6, v6, v59
+; SI-NEXT: v_or_b32_e32 v7, v7, v58
+; SI-NEXT: v_or_b32_e32 v8, v8, v63
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -33432,25 +33470,23 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
@@ -33479,7 +33515,15 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
@@ -33489,14 +33533,8 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -33552,18 +33590,22 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v57
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v56
@@ -33574,8 +33616,6 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v43
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v42
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v40
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -33585,19 +33625,15 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v60, v0
-; SI-NEXT: v_or_b32_e32 v1, v36, v1
-; SI-NEXT: v_or_b32_e32 v2, v59, v2
-; SI-NEXT: v_or_b32_e32 v3, v35, v3
-; SI-NEXT: v_or_b32_e32 v4, v58, v4
-; SI-NEXT: v_or_b32_e32 v5, v34, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v33, v7
-; SI-NEXT: v_or_b32_e32 v8, v62, v8
-; SI-NEXT: v_or_b32_e32 v9, v32, v9
-; SI-NEXT: v_or_b32_e32 v10, v61, v10
+; SI-NEXT: v_or_b32_e32 v0, v62, v0
+; SI-NEXT: v_or_b32_e32 v1, v34, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v32, v5
+; SI-NEXT: v_or_b32_e32 v6, v59, v6
+; SI-NEXT: v_or_b32_e32 v7, v58, v7
+; SI-NEXT: v_or_b32_e32 v8, v63, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -33607,48 +33643,64 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v54
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v39
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v37
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v36
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v35
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -33659,21 +33711,7 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -33954,54 +33992,61 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -34009,52 +34054,89 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -34069,6 +34151,9 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -34092,136 +34177,98 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB50_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -34237,13 +34284,7 @@ define <13 x double> @bitcast_v52i16_to_v13f64(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB50_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -37389,44 +37430,47 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v38, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; SI-NEXT: v_mov_b32_e32 v39, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; SI-NEXT: v_mov_b32_e32 v48, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v11
; SI-NEXT: v_mov_b32_e32 v55, v10
; SI-NEXT: v_mov_b32_e32 v40, v9
@@ -37440,22 +37484,21 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v56, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v57
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
@@ -37464,52 +37507,51 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB54_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v35
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v62
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v61
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v60
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
@@ -37522,25 +37564,26 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v53
; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -37572,7 +37615,12 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
@@ -37580,8 +37628,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(4)
@@ -37593,10 +37640,6 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
@@ -37660,8 +37703,8 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB54_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v37
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
; SI-NEXT: v_cvt_f32_f16_e32 v1, v57
; SI-NEXT: v_cvt_f32_f16_e32 v3, v56
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -37676,7 +37719,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v47
; SI-NEXT: v_cvt_f32_f16_e32 v4, v46
; SI-NEXT: v_cvt_f32_f16_e32 v5, v45
@@ -37688,7 +37731,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v35
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v44
@@ -37699,7 +37742,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v42
@@ -37710,7 +37753,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v34
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v40
@@ -37721,7 +37764,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v54
@@ -37732,7 +37775,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v63
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v15, v52
@@ -37743,7 +37786,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f32_f16_e32 v18, v49
@@ -37754,51 +37797,64 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v62
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v38
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v37
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v61
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v60
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
@@ -37810,9 +37866,9 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37829,9 +37885,9 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v16, v18, v16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -37848,39 +37904,28 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v20, v22, v20
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_or_b32_e32 v21, v22, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
@@ -38167,54 +38212,61 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, v25
+; GFX9-NEXT: v_mov_b32_e32 v33, v24
; GFX9-NEXT: v_mov_b32_e32 v57, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32
+; GFX9-NEXT: v_mov_b32_e32 v34, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; GFX9-NEXT: v_mov_b32_e32 v35, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT: v_mov_b32_e32 v36, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v6
; GFX9-NEXT: v_mov_b32_e32 v44, v5
; GFX9-NEXT: v_mov_b32_e32 v45, v4
@@ -38222,52 +38274,89 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v47, v2
; GFX9-NEXT: v_mov_b32_e32 v56, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v57
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v43
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v42
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v41
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v40
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v55
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v54
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v53
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v52
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v51
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v50
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v39
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
@@ -38282,6 +38371,9 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr47
@@ -38305,137 +38397,99 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
-; GFX9-NEXT: ; kill: killed $vgpr26
-; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; kill: killed $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: .LBB54_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v34, v57, s6
+; GFX9-NEXT: v_perm_b32 v0, v59, v57, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v62, v56, s6
-; GFX9-NEXT: v_perm_b32 v2, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v3, v32, v46, s6
+; GFX9-NEXT: v_perm_b32 v1, v58, v56, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v3, v62, v46, s6
; GFX9-NEXT: v_perm_b32 v4, v61, v45, s6
; GFX9-NEXT: v_perm_b32 v5, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v6, v59, v43, s6
-; GFX9-NEXT: v_perm_b32 v7, v58, v42, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v41, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v6, v6, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s6
+; GFX9-NEXT: s_waitcnt vmcnt(17)
+; GFX9-NEXT: v_perm_b32 v8, v8, v41, s6
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v9, v9, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v10, v10, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v11, v11, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v12, v12, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v13, v13, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v14, v14, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v15, v15, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v16, v16, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v17, v17, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v18, v18, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v19, v19, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v20, v20, v37, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v21, v21, v36, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(3)
; GFX9-NEXT: v_perm_b32 v22, v22, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v23, v34, s6
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v24, v33, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v32, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -38451,13 +38505,7 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT: .LBB54_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -39750,15 +39798,11 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v3
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v53
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
@@ -39777,13 +39821,13 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v15
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v33
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v44
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; kill: killed $vgpr26
@@ -39833,41 +39877,45 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr26
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v24
; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v22
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v22
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v20
; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v18
; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v4
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v0
; SI-NEXT: ; kill: killed $vgpr26
; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v52
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v51
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v49
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v38
-; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v34
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v32
; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v30
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v30
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v47
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v55
; SI-NEXT: ; kill: killed $vgpr26
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -39894,105 +39942,100 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB56_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
; SI-NEXT: v_or_b32_e32 v59, v1, v26
-; SI-NEXT: v_mov_b32_e32 v26, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v59, v32, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v59, v51, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53
; SI-NEXT: v_or_b32_e32 v57, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v57, v54, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
; SI-NEXT: v_or_b32_e32 v47, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v47, v41, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
; SI-NEXT: v_or_b32_e32 v45, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT: v_or_b32_e32 v43, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v43, v58, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
; SI-NEXT: v_or_b32_e32 v42, v1, v3
; SI-NEXT: v_alignbit_b32 v1, v42, v63, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
; SI-NEXT: v_or_b32_e32 v55, v1, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v0, v0, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v51
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v54
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v55, v62, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8
-; SI-NEXT: v_alignbit_b32 v1, v55, v44, 16
-; SI-NEXT: v_or_b32_e32 v0, v0, v58
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v0, v0, v63
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v0, v0, v44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v0, v0, v61
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v48
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v0, v0, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v0, v0, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_mov_b32_e32 v32, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v56
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -40012,59 +40055,57 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_or_b32_e32 v52, v1, v3
-; SI-NEXT: v_alignbit_b32 v1, v52, v56, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v52, v44, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v49, v1, v29
+; SI-NEXT: v_or_b32_e32 v49, v1, v28
; SI-NEXT: v_alignbit_b32 v1, v49, v61, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v38, v1, v30
-; SI-NEXT: v_alignbit_b32 v1, v38, v62, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v38, v1, v29
+; SI-NEXT: v_alignbit_b32 v1, v38, v48, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v36, v1, v51
-; SI-NEXT: v_alignbit_b32 v1, v36, v27, 16
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; kill: killed $vgpr27
+; SI-NEXT: v_or_b32_e32 v36, v1, v30
+; SI-NEXT: v_alignbit_b32 v1, v36, v60, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v34, v1, v31
+; SI-NEXT: v_alignbit_b32 v1, v34, v27, 16
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: v_or_b32_e32 v34, v1, v31
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: v_alignbit_b32 v1, v34, v28, 16
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: v_or_b32_e32 v3, v1, v48
+; SI-NEXT: v_or_b32_e32 v26, v1, v32
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: v_alignbit_b32 v1, v3, v60, 16
+; SI-NEXT: v_alignbit_b32 v1, v26, v56, 16
; SI-NEXT: ; kill: killed $vgpr27
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v26, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr17
@@ -40073,32 +40114,31 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; kill: killed $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: .LBB56_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB56_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v24, v60, v24
-; SI-NEXT: v_add_i32_e32 v32, vcc, 0x30000, v24
+; SI-NEXT: v_or_b32_e32 v24, v56, v24
+; SI-NEXT: v_add_i32_e32 v33, vcc, 0x30000, v24
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25
; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v24, v48, v24
-; SI-NEXT: v_or_b32_e32 v22, v28, v22
-; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_or_b32_e32 v24, v32, v24
+; SI-NEXT: v_or_b32_e32 v22, v27, v22
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v24
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23
@@ -40106,22 +40146,22 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v22, v31, v22
-; SI-NEXT: v_or_b32_e32 v20, v27, v20
+; SI-NEXT: v_or_b32_e32 v20, v60, v20
; SI-NEXT: v_add_i32_e32 v34, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v20
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v20, v51, v20
-; SI-NEXT: v_or_b32_e32 v18, v62, v18
+; SI-NEXT: v_or_b32_e32 v20, v30, v20
+; SI-NEXT: v_or_b32_e32 v18, v48, v18
; SI-NEXT: v_add_i32_e32 v36, vcc, 0x30000, v20
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v18, v30, v18
+; SI-NEXT: v_or_b32_e32 v18, v29, v18
; SI-NEXT: v_or_b32_e32 v16, v61, v16
; SI-NEXT: v_add_i32_e32 v38, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
@@ -40129,8 +40169,8 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v16, v29, v16
-; SI-NEXT: v_or_b32_e32 v14, v56, v14
+; SI-NEXT: v_or_b32_e32 v16, v28, v16
+; SI-NEXT: v_or_b32_e32 v14, v44, v14
; SI-NEXT: v_add_i32_e32 v49, vcc, 0x30000, v16
; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15
@@ -40138,7 +40178,7 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v44, v12
+; SI-NEXT: v_or_b32_e32 v12, v62, v12
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v63, v10
@@ -40156,6 +40196,7 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v54, v2
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v0, v51, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v52, vcc, 0x30000, v14
@@ -40171,7 +40212,6 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v55
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_add_i32_e32 v42, vcc, 0x30000, v10
@@ -40207,68 +40247,68 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_add_i32_e32 v57, vcc, 0x30000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v57
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v57
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v59, vcc, 0x30000, v0
; SI-NEXT: v_alignbit_b32 v0, v59, v2, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v57, v4, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v47, v6, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v45, v8, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v43, v10, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v42, v12, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v55, v14, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v52, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v49, v18, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v38, v20, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v36, v22, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v34, v24, 16
+; SI-NEXT: v_alignbit_b32 v0, v36, v22, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v26, v32, 16
+; SI-NEXT: v_alignbit_b32 v0, v34, v24, 16
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v0, v26, v33, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -40281,7 +40321,7 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v52
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v55
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26
@@ -40289,11 +40329,11 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: .LBB56_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v50
@@ -40301,49 +40341,50 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v59
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: s_waitcnt vmcnt(3)
@@ -40357,31 +40398,31 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v57
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v47
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v45
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v43
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -40403,37 +40444,37 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v49
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v18, v18, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v38
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v22, v22, v23
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v34
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
@@ -41009,67 +41050,76 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v26, s55, 13
; SI-NEXT: v_writelane_b32 v26, s64, 14
; SI-NEXT: v_writelane_b32 v26, s65, 15
-; SI-NEXT: v_writelane_b32 v26, s66, 16
-; SI-NEXT: v_writelane_b32 v26, s67, 17
-; SI-NEXT: v_writelane_b32 v26, s68, 18
-; SI-NEXT: v_writelane_b32 v26, s30, 19
-; SI-NEXT: v_writelane_b32 v26, s31, 20
-; SI-NEXT: v_readfirstlane_b32 s48, v0
-; SI-NEXT: v_readfirstlane_b32 s50, v2
-; SI-NEXT: s_lshr_b32 s46, s48, 16
+; SI-NEXT: v_writelane_b32 v26, s30, 16
+; SI-NEXT: v_writelane_b32 v26, s31, 17
+; SI-NEXT: s_lshr_b32 s8, s24, 16
; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane
-; SI-NEXT: v_readfirstlane_b32 s53, v4
-; SI-NEXT: s_lshr_b32 s45, s50, 16
+; SI-NEXT: s_lshr_b32 s6, s26, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v27, s46, 0
-; SI-NEXT: v_readfirstlane_b32 s64, v6
-; SI-NEXT: s_lshr_b32 s44, s53, 16
-; SI-NEXT: v_writelane_b32 v27, s45, 1
-; SI-NEXT: v_readfirstlane_b32 s66, v8
-; SI-NEXT: s_lshr_b32 s42, s64, 16
-; SI-NEXT: v_writelane_b32 v27, s44, 2
-; SI-NEXT: s_lshr_b32 s13, s66, 16
-; SI-NEXT: v_writelane_b32 v27, s42, 3
+; SI-NEXT: v_writelane_b32 v27, s8, 0
+; SI-NEXT: s_lshr_b32 s4, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s51, v0
+; SI-NEXT: v_writelane_b32 v27, s6, 1
+; SI-NEXT: v_readfirstlane_b32 s53, v2
+; SI-NEXT: s_lshr_b32 s46, s51, 16
+; SI-NEXT: v_writelane_b32 v27, s4, 2
+; SI-NEXT: v_readfirstlane_b32 s54, v4
+; SI-NEXT: s_lshr_b32 s45, s53, 16
+; SI-NEXT: v_writelane_b32 v27, s46, 3
+; SI-NEXT: v_readfirstlane_b32 s55, v6
+; SI-NEXT: s_lshr_b32 s44, s54, 16
+; SI-NEXT: v_writelane_b32 v27, s45, 4
+; SI-NEXT: v_readfirstlane_b32 s64, v8
+; SI-NEXT: s_lshr_b32 s42, s55, 16
+; SI-NEXT: v_writelane_b32 v27, s44, 5
+; SI-NEXT: s_lshr_b32 s13, s64, 16
+; SI-NEXT: v_writelane_b32 v27, s42, 6
; SI-NEXT: v_readfirstlane_b32 s43, v1
-; SI-NEXT: v_writelane_b32 v27, s13, 4
+; SI-NEXT: v_writelane_b32 v27, s13, 7
; SI-NEXT: v_readfirstlane_b32 s41, v3
-; SI-NEXT: v_writelane_b32 v27, s43, 5
+; SI-NEXT: v_writelane_b32 v27, s43, 8
; SI-NEXT: v_readfirstlane_b32 s15, v5
-; SI-NEXT: v_writelane_b32 v27, s41, 6
+; SI-NEXT: v_writelane_b32 v27, s41, 9
; SI-NEXT: v_readfirstlane_b32 s11, v7
-; SI-NEXT: v_writelane_b32 v27, s15, 7
+; SI-NEXT: v_writelane_b32 v27, s15, 10
; SI-NEXT: v_readfirstlane_b32 s7, v11
-; SI-NEXT: v_readfirstlane_b32 s68, v10
+; SI-NEXT: v_readfirstlane_b32 s65, v10
; SI-NEXT: v_readfirstlane_b32 s9, v9
-; SI-NEXT: v_writelane_b32 v27, s11, 8
+; SI-NEXT: v_writelane_b32 v27, s11, 11
; SI-NEXT: s_lshr_b32 s91, s29, 16
-; SI-NEXT: s_lshr_b32 s67, s28, 16
; SI-NEXT: s_lshr_b32 s89, s27, 16
-; SI-NEXT: s_lshr_b32 s55, s26, 16
; SI-NEXT: s_lshr_b32 s79, s25, 16
-; SI-NEXT: s_lshr_b32 s52, s24, 16
; SI-NEXT: s_lshr_b32 s77, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s22, 16
+; SI-NEXT: s_lshr_b32 s52, s22, 16
; SI-NEXT: s_lshr_b32 s75, s21, 16
-; SI-NEXT: s_lshr_b32 s65, s20, 16
+; SI-NEXT: s_lshr_b32 s50, s20, 16
; SI-NEXT: s_lshr_b32 s73, s19, 16
-; SI-NEXT: s_lshr_b32 s54, s18, 16
+; SI-NEXT: s_lshr_b32 s49, s18, 16
; SI-NEXT: s_lshr_b32 s63, s17, 16
-; SI-NEXT: s_lshr_b32 s51, s16, 16
+; SI-NEXT: s_lshr_b32 s48, s16, 16
; SI-NEXT: s_lshr_b32 s37, s7, 16
-; SI-NEXT: s_lshr_b32 s5, s68, 16
+; SI-NEXT: s_lshr_b32 s5, s65, 16
; SI-NEXT: s_lshr_b32 s35, s9, 16
; SI-NEXT: s_lshr_b32 s31, s11, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
; SI-NEXT: s_lshr_b32 s95, s41, 16
; SI-NEXT: s_lshr_b32 s93, s43, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: v_writelane_b32 v27, s9, 9
-; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v27, s7, 10
-; SI-NEXT: v_writelane_b32 v27, s5, 11
+; SI-NEXT: v_readfirstlane_b32 s10, v12
+; SI-NEXT: v_writelane_b32 v27, s9, 12
+; SI-NEXT: s_cmp_lg_u32 s10, 0
+; SI-NEXT: v_writelane_b32 v27, s7, 13
+; SI-NEXT: v_writelane_b32 v27, s5, 14
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_and_b32 s47, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s78, s8, 16
+; SI-NEXT: s_or_b32 s8, s47, s78
+; SI-NEXT: s_and_b32 s47, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s88, s6, 16
+; SI-NEXT: s_or_b32 s6, s47, s88
+; SI-NEXT: s_and_b32 s47, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s60, s4, 16
+; SI-NEXT: s_or_b32 s4, s47, s60
; SI-NEXT: s_lshl_b32 s56, s45, 16
; SI-NEXT: s_and_b32 s45, s17, 0xffff
; SI-NEXT: s_lshl_b32 s47, s63, 16
@@ -41093,48 +41143,39 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s77, s45, s47
; SI-NEXT: s_and_b32 s45, s25, 0xffff
; SI-NEXT: s_lshl_b32 s47, s79, 16
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s51, 16
; SI-NEXT: s_mov_b32 vcc_lo, s79
; SI-NEXT: s_or_b32 s79, s45, s47
; SI-NEXT: s_and_b32 s45, s27, 0xffff
; SI-NEXT: s_lshl_b32 s47, s89, 16
-; SI-NEXT: s_or_b32 s40, s4, s62
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s54, 16
; SI-NEXT: s_mov_b32 s30, s89
; SI-NEXT: s_or_b32 s89, s45, s47
; SI-NEXT: s_and_b32 s45, s29, 0xffff
; SI-NEXT: s_lshl_b32 s47, s91, 16
-; SI-NEXT: s_or_b32 s14, s4, s72
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s65, 16
; SI-NEXT: s_or_b32 s61, s45, s47
; SI-NEXT: s_and_b32 s43, s43, 0xffff
; SI-NEXT: s_lshl_b32 s45, s93, 16
-; SI-NEXT: s_or_b32 s12, s4, s74
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s49, 16
+; SI-NEXT: s_and_b32 s10, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s62, s48, 16
; SI-NEXT: s_or_b32 s59, s43, s45
; SI-NEXT: s_and_b32 s41, s41, 0xffff
; SI-NEXT: s_lshl_b32 s43, s95, 16
-; SI-NEXT: s_or_b32 s10, s4, s76
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s78, s52, 16
+; SI-NEXT: s_or_b32 s40, s10, s62
+; SI-NEXT: s_and_b32 s10, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s72, s49, 16
; SI-NEXT: s_or_b32 s57, s41, s43
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s41, vcc_hi, 16
-; SI-NEXT: s_or_b32 s8, s4, s78
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s88, s55, 16
+; SI-NEXT: s_or_b32 s14, s10, s72
+; SI-NEXT: s_and_b32 s10, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s50, 16
; SI-NEXT: s_or_b32 s47, s15, s41
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s15, s31, 16
; SI-NEXT: s_mov_b32 s41, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
-; SI-NEXT: s_or_b32 s6, s4, s88
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s67, 16
+; SI-NEXT: s_or_b32 s12, s10, s74
+; SI-NEXT: s_and_b32 s10, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s52, 16
; SI-NEXT: s_or_b32 s45, s11, s15
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s11, s35, 16
@@ -41143,7 +41184,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
; SI-NEXT: s_mov_b32 s13, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
-; SI-NEXT: s_or_b32 s4, s4, s60
+; SI-NEXT: s_or_b32 s10, s10, s76
; SI-NEXT: s_or_b32 s43, s9, s11
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s9, s37, 16
@@ -41153,7 +41194,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
; SI-NEXT: s_mov_b32 s92, s91
; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
-; SI-NEXT: s_and_b32 s60, s48, 0xffff
+; SI-NEXT: s_and_b32 s60, s51, 0xffff
; SI-NEXT: s_mov_b32 s38, s37
; SI-NEXT: s_or_b32 s37, s7, s9
; SI-NEXT: s_mov_b32 s77, s94
@@ -41163,7 +41204,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s60, s60, s58
; SI-NEXT: s_mov_b32 s94, s93
; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
-; SI-NEXT: s_and_b32 s58, s50, 0xffff
+; SI-NEXT: s_and_b32 s58, s53, 0xffff
; SI-NEXT: s_mov_b32 s79, vcc_lo
; SI-NEXT: s_mov_b32 s7, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[88:89], 16
@@ -41171,24 +41212,24 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s58, s58, s56
; SI-NEXT: s_mov_b32 vcc_lo, s95
; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16
-; SI-NEXT: s_and_b32 s56, s53, 0xffff
+; SI-NEXT: s_and_b32 s56, s54, 0xffff
; SI-NEXT: s_mov_b32 s89, s30
; SI-NEXT: s_mov_b32 s95, vcc_lo
; SI-NEXT: s_or_b32 s56, s56, s46
; SI-NEXT: s_mov_b32 s30, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16
-; SI-NEXT: s_and_b32 s46, s64, 0xffff
+; SI-NEXT: s_and_b32 s46, s55, 0xffff
; SI-NEXT: s_mov_b32 vcc_hi, s30
; SI-NEXT: s_or_b32 s46, s46, s44
; SI-NEXT: s_mov_b32 s34, s31
; SI-NEXT: s_lshr_b64 s[30:31], s[44:45], 16
-; SI-NEXT: s_and_b32 s44, s66, 0xffff
+; SI-NEXT: s_and_b32 s44, s64, 0xffff
; SI-NEXT: s_lshl_b32 s36, s5, 16
; SI-NEXT: s_mov_b32 s31, s34
; SI-NEXT: s_or_b32 s44, s44, s42
; SI-NEXT: s_mov_b32 s39, s35
; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
-; SI-NEXT: s_and_b32 s42, s68, 0xffff
+; SI-NEXT: s_and_b32 s42, s65, 0xffff
; SI-NEXT: s_mov_b32 s5, s61
; SI-NEXT: s_mov_b32 s61, s59
; SI-NEXT: s_mov_b32 s59, s57
@@ -41236,105 +41277,108 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_cmp_lg_u32 s38, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s68, s68, 3
-; SI-NEXT: v_readlane_b32 s4, v27, 11
-; SI-NEXT: s_and_b32 s5, s68, 0xffff
+; SI-NEXT: s_add_i32 s65, s65, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 14
+; SI-NEXT: s_and_b32 s5, s65, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s42, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v27, 10
+; SI-NEXT: v_readlane_b32 s4, v27, 13
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s43, s4, 0x30000
-; SI-NEXT: s_add_i32 s66, s66, 3
-; SI-NEXT: v_readlane_b32 s4, v27, 4
-; SI-NEXT: s_and_b32 s5, s66, 0xffff
+; SI-NEXT: s_add_i32 s64, s64, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 7
+; SI-NEXT: s_and_b32 s5, s64, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v27, 9
+; SI-NEXT: v_readlane_b32 s4, v27, 12
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s45, s4, 0x30000
-; SI-NEXT: s_add_i32 s64, s64, 3
-; SI-NEXT: v_readlane_b32 s4, v27, 3
-; SI-NEXT: s_and_b32 s5, s64, 0xffff
+; SI-NEXT: s_add_i32 s55, s55, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 6
+; SI-NEXT: s_and_b32 s5, s55, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s46, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v27, 8
+; SI-NEXT: v_readlane_b32 s4, v27, 11
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s47, s4, 0x30000
-; SI-NEXT: s_add_i32 s53, s53, 3
-; SI-NEXT: v_readlane_b32 s4, v27, 2
-; SI-NEXT: s_and_b32 s5, s53, 0xffff
+; SI-NEXT: s_add_i32 s54, s54, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 5
+; SI-NEXT: s_and_b32 s5, s54, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v27, 7
+; SI-NEXT: v_readlane_b32 s4, v27, 10
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_add_i32 s50, s50, 3
-; SI-NEXT: v_readlane_b32 s4, v27, 1
-; SI-NEXT: s_and_b32 s5, s50, 0xffff
+; SI-NEXT: s_add_i32 s53, s53, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 4
+; SI-NEXT: s_and_b32 s5, s53, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v27, 6
+; SI-NEXT: v_readlane_b32 s4, v27, 9
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_add_i32 s48, s48, 3
-; SI-NEXT: v_readlane_b32 s4, v27, 0
-; SI-NEXT: s_and_b32 s5, s48, 0xffff
+; SI-NEXT: s_add_i32 s51, s51, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 3
+; SI-NEXT: s_and_b32 s5, s51, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s60, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v27, 5
+; SI-NEXT: v_readlane_b32 s4, v27, 8
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s61, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s67, 16
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 2
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s29, 0xffff
; SI-NEXT: s_lshl_b32 s6, s91, 16
-; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s55, 16
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: v_readlane_b32 s6, v27, 1
+; SI-NEXT: s_and_b32 s7, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s7, s27, 0xffff
; SI-NEXT: s_lshl_b32 s8, s89, 16
-; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s52, 16
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: v_readlane_b32 s8, v27, 0
+; SI-NEXT: s_and_b32 s9, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s25, 0xffff
; SI-NEXT: s_lshl_b32 s10, s79, 16
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_and_b32 s10, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s49, 16
+; SI-NEXT: s_lshl_b32 s11, s52, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s23, 0xffff
@@ -41342,7 +41386,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_and_b32 s12, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s65, 16
+; SI-NEXT: s_lshl_b32 s13, s50, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s21, 0xffff
@@ -41350,7 +41394,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_and_b32 s14, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s54, 16
+; SI-NEXT: s_lshl_b32 s15, s49, 16
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: s_and_b32 s15, s19, 0xffff
@@ -41358,7 +41402,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s15, s18, s15
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s51, 16
+; SI-NEXT: s_lshl_b32 s18, s48, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s40, s16, 0x30000
@@ -41483,7 +41527,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_and_b32 s29, s43, 0xffff
; SI-NEXT: s_lshl_b32 s40, s37, 16
; SI-NEXT: s_or_b32 s29, s29, s40
-; SI-NEXT: v_readlane_b32 s30, v26, 19
+; SI-NEXT: v_readlane_b32 s30, v26, 16
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s14
@@ -41510,10 +41554,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v23, s27
; SI-NEXT: v_mov_b32_e32 v24, s28
; SI-NEXT: v_mov_b32_e32 v25, s29
-; SI-NEXT: v_readlane_b32 s31, v26, 20
-; SI-NEXT: v_readlane_b32 s68, v26, 18
-; SI-NEXT: v_readlane_b32 s67, v26, 17
-; SI-NEXT: v_readlane_b32 s66, v26, 16
+; SI-NEXT: v_readlane_b32 s31, v26, 17
; SI-NEXT: v_readlane_b32 s65, v26, 15
; SI-NEXT: v_readlane_b32 s64, v26, 14
; SI-NEXT: v_readlane_b32 s55, v26, 13
@@ -43413,11 +43454,11 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v5, v4
-; SI-NEXT: v_or_b32_e32 v56, v3, v2
+; SI-NEXT: v_or_b32_e32 v47, v3, v2
; SI-NEXT: v_cvt_f32_f16_e32 v3, s88
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s22
-; SI-NEXT: v_or_b32_e32 v47, v5, v4
+; SI-NEXT: v_or_b32_e32 v45, v5, v4
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s78
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -43485,10 +43526,10 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v45, v3, v20
+; SI-NEXT: v_or_b32_e32 v46, v3, v20
; SI-NEXT: v_cvt_f32_f16_e32 v3, s45
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1
-; SI-NEXT: v_or_b32_e32 v46, v5, v22
+; SI-NEXT: v_or_b32_e32 v56, v5, v22
; SI-NEXT: v_cvt_f32_f16_e32 v5, s61
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -43633,14 +43674,18 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_lshr_b64 v[26:27], v[24:25], 16
; SI-NEXT: v_mov_b32_e32 v12, v62
; SI-NEXT: v_mov_b32_e32 v16, v61
+; SI-NEXT: v_mov_b32_e32 v35, v42
; SI-NEXT: v_mov_b32_e32 v18, v60
+; SI-NEXT: v_mov_b32_e32 v33, v44
; SI-NEXT: v_mov_b32_e32 v20, v59
+; SI-NEXT: v_mov_b32_e32 v31, v46
; SI-NEXT: v_mov_b32_e32 v22, v58
-; SI-NEXT: v_mov_b32_e32 v29, v46
+; SI-NEXT: v_mov_b32_e32 v29, v56
+; SI-NEXT: v_mov_b32_e32 v24, v43
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
; SI-NEXT: v_mov_b32_e32 v40, s61
-; SI-NEXT: v_mov_b32_e32 v43, s58
+; SI-NEXT: v_mov_b32_e32 v24, s58
; SI-NEXT: v_mov_b32_e32 v22, s56
; SI-NEXT: v_mov_b32_e32 v20, s46
; SI-NEXT: v_mov_b32_e32 v18, s43
@@ -43654,17 +43699,16 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v55, s6
; SI-NEXT: v_mov_b32_e32 v41, s57
; SI-NEXT: v_mov_b32_e32 v29, s60
-; SI-NEXT: v_mov_b32_e32 v45, s63
-; SI-NEXT: v_mov_b32_e32 v44, s74
-; SI-NEXT: v_mov_b32_e32 v42, s77
+; SI-NEXT: v_mov_b32_e32 v31, s63
+; SI-NEXT: v_mov_b32_e32 v33, s74
+; SI-NEXT: v_mov_b32_e32 v35, s77
; SI-NEXT: v_mov_b32_e32 v37, s79
; SI-NEXT: v_mov_b32_e32 v39, s28
; SI-NEXT: v_mov_b32_e32 v49, s26
; SI-NEXT: v_mov_b32_e32 v51, s24
; SI-NEXT: v_mov_b32_e32 v53, s22
-; SI-NEXT: v_mov_b32_e32 v47, s20
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v56, s18
+; SI-NEXT: v_mov_b32_e32 v45, s20
+; SI-NEXT: v_mov_b32_e32 v47, s18
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_mov_b32_e32 v57, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
@@ -43695,98 +43739,98 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v26, s45
; SI-NEXT: .LBB59_6: ; %end
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v57
-; SI-NEXT: v_or_b32_e32 v0, v24, v0
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v57
+; SI-NEXT: v_or_b32_e32 v0, v27, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v55
-; SI-NEXT: v_or_b32_e32 v1, v1, v24
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v55
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: v_or_b32_e32 v1, v1, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v56
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v47
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v41
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_or_b32_e32 v2, v27, v2
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v45
+; SI-NEXT: v_or_b32_e32 v24, v24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v2, v24, v2
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v4, v24, v4
+; SI-NEXT: v_or_b32_e32 v4, v27, v4
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v52
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v53
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_or_b32_e32 v6, v24, v6
+; SI-NEXT: v_or_b32_e32 v6, v27, v6
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v50
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v51
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v51
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v8, v24, v8
+; SI-NEXT: v_or_b32_e32 v8, v27, v8
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v49
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v48
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_or_b32_e32 v10, v10, v24
+; SI-NEXT: v_or_b32_e32 v10, v10, v27
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v39
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v38
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_or_b32_e32 v12, v12, v24
+; SI-NEXT: v_or_b32_e32 v12, v12, v27
; SI-NEXT: v_or_b32_e32 v13, v13, v14
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v37
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v36
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v14, v14, v24
+; SI-NEXT: v_or_b32_e32 v14, v14, v27
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v35
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v34
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v16, v16, v24
+; SI-NEXT: v_or_b32_e32 v16, v16, v27
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v32
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v18, v18, v24
+; SI-NEXT: v_or_b32_e32 v18, v18, v27
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v30
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v30
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_or_b32_e32 v20, v20, v24
+; SI-NEXT: v_or_b32_e32 v20, v20, v27
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v29
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v28
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v43
-; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
+; SI-NEXT: v_or_b32_e32 v22, v22, v27
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
index a7dc4be23589b..a7df8b68f293a 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
@@ -5366,6 +5366,9 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v22
+; SI-NEXT: v_mov_b32_e32 v38, v21
+; SI-NEXT: v_mov_b32_e32 v39, v20
; SI-NEXT: v_mov_b32_e32 v48, v19
; SI-NEXT: v_mov_b32_e32 v49, v18
; SI-NEXT: v_mov_b32_e32 v50, v17
@@ -5399,12 +5402,9 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
@@ -5417,28 +5417,28 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -5455,36 +5455,45 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58
@@ -5495,21 +5504,15 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_or_b32_e32 v1, v1, v33
-; SI-NEXT: v_or_b32_e32 v2, v2, v38
-; SI-NEXT: v_or_b32_e32 v3, v3, v61
-; SI-NEXT: v_or_b32_e32 v4, v4, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v32
-; SI-NEXT: v_or_b32_e32 v6, v6, v36
-; SI-NEXT: v_or_b32_e32 v7, v7, v60
-; SI-NEXT: v_or_b32_e32 v8, v8, v35
-; SI-NEXT: v_or_b32_e32 v9, v9, v63
-; SI-NEXT: v_or_b32_e32 v10, v10, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v32
+; SI-NEXT: v_or_b32_e32 v1, v1, v36
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v35
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v34
+; SI-NEXT: v_or_b32_e32 v6, v6, v63
+; SI-NEXT: v_or_b32_e32 v7, v7, v33
+; SI-NEXT: v_or_b32_e32 v8, v8, v62
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -5520,30 +5523,27 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v13, v13, v14
@@ -5565,7 +5565,19 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v38
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -5573,18 +5585,9 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -5656,16 +5659,22 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v58
@@ -5676,9 +5685,6 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v43
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -5688,21 +5694,15 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_or_b32_e32 v2, v38, v2
-; SI-NEXT: v_or_b32_e32 v3, v61, v3
-; SI-NEXT: v_or_b32_e32 v4, v37, v4
-; SI-NEXT: v_or_b32_e32 v5, v32, v5
-; SI-NEXT: v_or_b32_e32 v6, v36, v6
-; SI-NEXT: v_or_b32_e32 v7, v60, v7
-; SI-NEXT: v_or_b32_e32 v8, v35, v8
-; SI-NEXT: v_or_b32_e32 v9, v63, v9
-; SI-NEXT: v_or_b32_e32 v10, v34, v10
-; SI-NEXT: v_or_b32_e32 v11, v62, v11
+; SI-NEXT: v_or_b32_e32 v0, v32, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v35, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v34, v5
+; SI-NEXT: v_or_b32_e32 v6, v63, v6
+; SI-NEXT: v_or_b32_e32 v7, v33, v7
+; SI-NEXT: v_or_b32_e32 v8, v62, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -5712,40 +5712,64 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v38
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v37
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -5755,31 +5779,8 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -6092,58 +6093,64 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -6151,18 +6158,15 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -6171,9 +6175,12 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -6188,15 +6195,18 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -6211,6 +6221,9 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -6234,31 +6247,19 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -6313,73 +6314,88 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -6395,20 +6411,8 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -9540,48 +9544,51 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v48, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v11
; SI-NEXT: v_mov_b32_e32 v41, v10
; SI-NEXT: v_mov_b32_e32 v42, v9
@@ -9595,22 +9602,21 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v58, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -9619,52 +9625,51 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB18_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -9677,28 +9682,28 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
@@ -9728,7 +9733,12 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -9736,8 +9746,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(6)
@@ -9753,10 +9762,6 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
@@ -9836,7 +9841,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB18_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v38
; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
@@ -9852,7 +9857,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v37
; SI-NEXT: v_cvt_f32_f16_e32 v3, v57
; SI-NEXT: v_cvt_f32_f16_e32 v4, v56
; SI-NEXT: v_cvt_f32_f16_e32 v5, v47
@@ -9864,7 +9869,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v63
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v46
@@ -9875,7 +9880,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v36
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v44
@@ -9886,7 +9891,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v62
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v42
@@ -9897,7 +9902,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v35
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v40
@@ -9908,7 +9913,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v34
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v54
@@ -9919,7 +9924,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v61
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v17, v52
@@ -9930,7 +9935,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v33
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f32_f16_e32 v20, v49
@@ -9941,75 +9946,75 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v60
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
+; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v33
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -10017,9 +10022,9 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v15, v17, v15
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -10036,9 +10041,9 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v18, v20, v18
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -10049,15 +10054,13 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v39
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_or_b32_e32 v20, v21, v20
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
@@ -10069,7 +10072,7 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_or_b32_e32 v21, v23, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -10388,58 +10391,64 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -10447,18 +10456,15 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -10467,9 +10473,12 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -10484,15 +10493,18 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -10507,6 +10519,9 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -10530,31 +10545,19 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -10609,74 +10612,89 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -10692,20 +10710,8 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -16905,6 +16911,9 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v22
+; SI-NEXT: v_mov_b32_e32 v38, v21
+; SI-NEXT: v_mov_b32_e32 v39, v20
; SI-NEXT: v_mov_b32_e32 v48, v19
; SI-NEXT: v_mov_b32_e32 v49, v18
; SI-NEXT: v_mov_b32_e32 v50, v17
@@ -16938,12 +16947,9 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
@@ -16956,28 +16962,28 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -16994,36 +17000,45 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58
@@ -17034,21 +17049,15 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_or_b32_e32 v1, v1, v33
-; SI-NEXT: v_or_b32_e32 v2, v2, v38
-; SI-NEXT: v_or_b32_e32 v3, v3, v61
-; SI-NEXT: v_or_b32_e32 v4, v4, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v32
-; SI-NEXT: v_or_b32_e32 v6, v6, v36
-; SI-NEXT: v_or_b32_e32 v7, v7, v60
-; SI-NEXT: v_or_b32_e32 v8, v8, v35
-; SI-NEXT: v_or_b32_e32 v9, v9, v63
-; SI-NEXT: v_or_b32_e32 v10, v10, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v32
+; SI-NEXT: v_or_b32_e32 v1, v1, v36
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v35
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v34
+; SI-NEXT: v_or_b32_e32 v6, v6, v63
+; SI-NEXT: v_or_b32_e32 v7, v7, v33
+; SI-NEXT: v_or_b32_e32 v8, v8, v62
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -17059,30 +17068,27 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v13, v13, v14
@@ -17104,7 +17110,19 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v38
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -17112,18 +17130,9 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -17195,16 +17204,22 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v58
@@ -17215,9 +17230,6 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v43
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -17227,21 +17239,15 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_or_b32_e32 v2, v38, v2
-; SI-NEXT: v_or_b32_e32 v3, v61, v3
-; SI-NEXT: v_or_b32_e32 v4, v37, v4
-; SI-NEXT: v_or_b32_e32 v5, v32, v5
-; SI-NEXT: v_or_b32_e32 v6, v36, v6
-; SI-NEXT: v_or_b32_e32 v7, v60, v7
-; SI-NEXT: v_or_b32_e32 v8, v35, v8
-; SI-NEXT: v_or_b32_e32 v9, v63, v9
-; SI-NEXT: v_or_b32_e32 v10, v34, v10
-; SI-NEXT: v_or_b32_e32 v11, v62, v11
+; SI-NEXT: v_or_b32_e32 v0, v32, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v35, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v34, v5
+; SI-NEXT: v_or_b32_e32 v6, v63, v6
+; SI-NEXT: v_or_b32_e32 v7, v33, v7
+; SI-NEXT: v_or_b32_e32 v8, v62, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -17251,40 +17257,64 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v38
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v37
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -17294,31 +17324,8 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -17631,58 +17638,64 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -17690,18 +17703,15 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -17710,9 +17720,12 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -17727,15 +17740,18 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -17750,6 +17766,9 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -17773,31 +17792,19 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -17852,73 +17859,88 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -17934,20 +17956,8 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -21439,48 +21449,51 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v48, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v11
; SI-NEXT: v_mov_b32_e32 v41, v10
; SI-NEXT: v_mov_b32_e32 v42, v9
@@ -21494,22 +21507,21 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v58, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -21518,52 +21530,51 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB34_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -21576,28 +21587,28 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
@@ -21627,7 +21638,12 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -21635,8 +21651,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(6)
@@ -21652,10 +21667,6 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
@@ -21735,7 +21746,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB34_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v38
; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
@@ -21751,7 +21762,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v37
; SI-NEXT: v_cvt_f32_f16_e32 v3, v57
; SI-NEXT: v_cvt_f32_f16_e32 v4, v56
; SI-NEXT: v_cvt_f32_f16_e32 v5, v47
@@ -21763,7 +21774,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v63
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v46
@@ -21774,7 +21785,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v36
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v44
@@ -21785,7 +21796,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v62
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v42
@@ -21796,7 +21807,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v35
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v40
@@ -21807,7 +21818,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v34
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v54
@@ -21818,7 +21829,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v61
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v17, v52
@@ -21829,7 +21840,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v33
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f32_f16_e32 v20, v49
@@ -21840,75 +21851,75 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v60
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
+; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v33
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -21916,9 +21927,9 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v15, v17, v15
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -21935,9 +21946,9 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v18, v20, v18
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -21948,15 +21959,13 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v39
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_or_b32_e32 v20, v21, v20
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
@@ -21968,7 +21977,7 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_or_b32_e32 v21, v23, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -22287,58 +22296,64 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -22346,18 +22361,15 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -22366,9 +22378,12 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -22383,15 +22398,18 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -22406,6 +22424,9 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -22429,31 +22450,19 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -22508,74 +22517,89 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -22591,20 +22615,8 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -26060,52 +26072,50 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b32 s42, s19, 16
; SI-NEXT: v_writelane_b32 v29, s42, 9
; SI-NEXT: s_lshr_b32 s42, s17, 16
-; SI-NEXT: s_lshr_b32 s72, s5, 16
-; SI-NEXT: s_lshr_b32 s73, s9, 16
+; SI-NEXT: s_lshr_b32 s79, s5, 16
+; SI-NEXT: s_lshr_b32 s78, s9, 16
; SI-NEXT: v_writelane_b32 v29, s42, 10
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: s_mov_b64 s[94:95], 0
; SI-NEXT: s_branch .LBB41_3
; SI-NEXT: .LBB41_2:
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; kill: killed $sgpr43
-; SI-NEXT: s_mov_b64 s[94:95], -1
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: s_mov_b64 s[94:95], -1
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
@@ -26114,30 +26124,32 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: .LBB41_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
; SI-NEXT: s_cselect_b32 s43, 1, 0
; SI-NEXT: s_cmp_lg_u32 s43, 1
-; SI-NEXT: s_mov_b32 s94, s73
+; SI-NEXT: s_mov_b32 s94, s78
; SI-NEXT: v_readlane_b32 s95, v29, 0
; SI-NEXT: v_readlane_b32 s43, v29, 1
; SI-NEXT: v_readlane_b32 s45, v29, 2
; SI-NEXT: v_readlane_b32 s57, v29, 3
-; SI-NEXT: v_readlane_b32 s47, v29, 4
-; SI-NEXT: v_readlane_b32 s59, v29, 5
+; SI-NEXT: v_readlane_b32 s59, v29, 4
+; SI-NEXT: v_readlane_b32 s47, v29, 5
; SI-NEXT: v_readlane_b32 s30, v29, 6
; SI-NEXT: v_readlane_b32 s61, v29, 7
-; SI-NEXT: v_readlane_b32 vcc_hi, v29, 8
-; SI-NEXT: v_readlane_b32 s63, v29, 9
-; SI-NEXT: v_readlane_b32 s31, v29, 10
-; SI-NEXT: v_readlane_b32 s73, v29, 11
+; SI-NEXT: v_readlane_b32 s63, v29, 8
+; SI-NEXT: v_readlane_b32 s31, v29, 9
+; SI-NEXT: v_readlane_b32 s73, v29, 10
+; SI-NEXT: v_readlane_b32 s78, v29, 11
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -26168,51 +26180,75 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s42, s29, 16
-; SI-NEXT: s_lshr_b32 s43, s27, 16
+; SI-NEXT: s_lshr_b32 s42, s27, 16
+; SI-NEXT: s_lshr_b32 s43, s23, 16
+; SI-NEXT: s_lshr_b32 s72, s21, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s60, s13, 16
-; SI-NEXT: s_lshr_b32 s61, s15, 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s76, s13, 16
+; SI-NEXT: s_lshr_b32 s77, s15, 16
+; SI-NEXT: s_lshr_b32 s88, s41, 16
+; SI-NEXT: s_lshr_b32 s89, s29, 16
+; SI-NEXT: s_lshr_b32 s74, s17, 16
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_mov_b32 s47, s42
-; SI-NEXT: s_mov_b32 s59, s43
-; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s62, s41, 16
-; SI-NEXT: s_lshr_b32 s63, s23, 16
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
-; SI-NEXT: s_mov_b32 s45, s61
-; SI-NEXT: s_mov_b32 s43, s60
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b32 s74, s21, 16
-; SI-NEXT: s_lshr_b32 s75, s19, 16
-; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
-; SI-NEXT: s_mov_b32 s57, s62
-; SI-NEXT: s_mov_b32 s61, s63
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
-; SI-NEXT: s_lshr_b32 s72, s5, 16
-; SI-NEXT: s_lshr_b32 s73, s7, 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_mov_b32 s61, s43
+; SI-NEXT: s_mov_b32 s63, s72
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s79, s5, 16
+; SI-NEXT: s_lshr_b32 s78, s7, 16
; SI-NEXT: s_lshr_b32 s94, s9, 16
; SI-NEXT: s_lshr_b32 s95, s11, 16
; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_mov_b32 vcc_hi, s74
-; SI-NEXT: s_mov_b32 s63, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_mov_b32 s59, s89
+; SI-NEXT: s_mov_b32 s57, s88
+; SI-NEXT: s_mov_b32 s45, s77
+; SI-NEXT: s_mov_b32 s43, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: .LBB41_5: ; %end
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_or_b32 s24, s24, s42
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s30, 16
+; SI-NEXT: s_or_b32 s25, s25, s42
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_or_b32 s26, s26, s42
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s47, 16
+; SI-NEXT: s_or_b32 s27, s27, s42
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s74, 16
+; SI-NEXT: s_or_b32 s28, s28, s42
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s59, 16
+; SI-NEXT: s_or_b32 s29, s29, s42
+; SI-NEXT: s_and_b32 s40, s40, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s72, 16
+; SI-NEXT: s_or_b32 s40, s40, s42
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s42
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s62, 16
; SI-NEXT: s_or_b32 s14, s14, s42
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s42, s45, 16
; SI-NEXT: s_or_b32 s15, s15, s42
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s42, s60, 16
; SI-NEXT: s_or_b32 s12, s12, s42
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s42, s43, 16
@@ -26228,66 +26264,42 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s8, s8, s42
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s42, s94, 16
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s63, 16
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s9, s9, s42
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s42, s46, 16
-; SI-NEXT: s_lshl_b32 s75, s92, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s19, s19, s63
-; SI-NEXT: s_lshl_b32 s63, s88, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s61
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s76, 16
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s17, s17, s73
+; SI-NEXT: s_lshl_b32 s73, s90, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s42
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s73, 16
-; SI-NEXT: s_or_b32 s16, s16, s75
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s75, s31, 16
-; SI-NEXT: s_or_b32 s20, s20, s63
+; SI-NEXT: s_lshl_b32 s42, s78, 16
+; SI-NEXT: s_or_b32 s18, s18, s73
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s31, 16
; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s63, vcc_hi, 16
-; SI-NEXT: s_or_b32 s24, s24, s61
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s30, 16
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s59, 16
-; SI-NEXT: s_or_b32 s29, s29, s47
-; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s60, 16
+; SI-NEXT: s_lshl_b32 s63, s63, 16
; SI-NEXT: s_or_b32 s7, s7, s42
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s42, s44, 16
-; SI-NEXT: s_or_b32 s17, s17, s75
-; SI-NEXT: s_lshl_b32 s75, s90, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s92, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s73
+; SI-NEXT: s_lshl_b32 s73, s88, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
; SI-NEXT: s_or_b32 s21, s21, s63
-; SI-NEXT: s_lshl_b32 s63, s78, 16
+; SI-NEXT: s_lshl_b32 s63, s76, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s61
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s74, 16
-; SI-NEXT: s_or_b32 s27, s27, s59
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s62, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s57, 16
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s61, s61, 16
; SI-NEXT: s_or_b32 s4, s4, s42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s72, 16
-; SI-NEXT: s_or_b32 s18, s18, s75
+; SI-NEXT: s_lshl_b32 s42, s79, 16
+; SI-NEXT: s_or_b32 s16, s16, s75
+; SI-NEXT: s_or_b32 s20, s20, s73
; SI-NEXT: s_or_b32 s22, s22, s63
-; SI-NEXT: s_or_b32 s26, s26, s61
-; SI-NEXT: s_or_b32 s28, s28, s59
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_or_b32 s23, s23, s61
; SI-NEXT: s_or_b32 s5, s5, s42
; SI-NEXT: v_readlane_b32 s30, v28, 0
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -27023,6 +27035,9 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v22
+; SI-NEXT: v_mov_b32_e32 v38, v21
+; SI-NEXT: v_mov_b32_e32 v39, v20
; SI-NEXT: v_mov_b32_e32 v48, v19
; SI-NEXT: v_mov_b32_e32 v49, v18
; SI-NEXT: v_mov_b32_e32 v50, v17
@@ -27056,12 +27071,9 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
@@ -27074,28 +27086,28 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -27112,36 +27124,45 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58
@@ -27152,21 +27173,15 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_or_b32_e32 v1, v1, v33
-; SI-NEXT: v_or_b32_e32 v2, v2, v38
-; SI-NEXT: v_or_b32_e32 v3, v3, v61
-; SI-NEXT: v_or_b32_e32 v4, v4, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v32
-; SI-NEXT: v_or_b32_e32 v6, v6, v36
-; SI-NEXT: v_or_b32_e32 v7, v7, v60
-; SI-NEXT: v_or_b32_e32 v8, v8, v35
-; SI-NEXT: v_or_b32_e32 v9, v9, v63
-; SI-NEXT: v_or_b32_e32 v10, v10, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v32
+; SI-NEXT: v_or_b32_e32 v1, v1, v36
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v35
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v34
+; SI-NEXT: v_or_b32_e32 v6, v6, v63
+; SI-NEXT: v_or_b32_e32 v7, v7, v33
+; SI-NEXT: v_or_b32_e32 v8, v8, v62
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -27177,30 +27192,27 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v13, v13, v14
@@ -27222,7 +27234,19 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v38
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -27230,18 +27254,9 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -27313,16 +27328,22 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v58
@@ -27333,9 +27354,6 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v43
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -27345,21 +27363,15 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_or_b32_e32 v2, v38, v2
-; SI-NEXT: v_or_b32_e32 v3, v61, v3
-; SI-NEXT: v_or_b32_e32 v4, v37, v4
-; SI-NEXT: v_or_b32_e32 v5, v32, v5
-; SI-NEXT: v_or_b32_e32 v6, v36, v6
-; SI-NEXT: v_or_b32_e32 v7, v60, v7
-; SI-NEXT: v_or_b32_e32 v8, v35, v8
-; SI-NEXT: v_or_b32_e32 v9, v63, v9
-; SI-NEXT: v_or_b32_e32 v10, v34, v10
-; SI-NEXT: v_or_b32_e32 v11, v62, v11
+; SI-NEXT: v_or_b32_e32 v0, v32, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v35, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v34, v5
+; SI-NEXT: v_or_b32_e32 v6, v63, v6
+; SI-NEXT: v_or_b32_e32 v7, v33, v7
+; SI-NEXT: v_or_b32_e32 v8, v62, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -27369,40 +27381,64 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v38
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v37
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -27412,31 +27448,8 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -27749,58 +27762,64 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -27808,18 +27827,15 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -27828,9 +27844,12 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -27845,15 +27864,18 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -27868,6 +27890,9 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -27891,31 +27916,19 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -27970,73 +27983,88 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -28052,20 +28080,8 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -30265,52 +30281,50 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: s_lshr_b32 s42, s19, 16
; SI-NEXT: v_writelane_b32 v29, s42, 9
; SI-NEXT: s_lshr_b32 s42, s17, 16
-; SI-NEXT: s_lshr_b32 s72, s5, 16
-; SI-NEXT: s_lshr_b32 s73, s9, 16
+; SI-NEXT: s_lshr_b32 s79, s5, 16
+; SI-NEXT: s_lshr_b32 s78, s9, 16
; SI-NEXT: v_writelane_b32 v29, s42, 10
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: s_mov_b64 s[94:95], 0
; SI-NEXT: s_branch .LBB45_3
; SI-NEXT: .LBB45_2:
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; kill: killed $sgpr43
-; SI-NEXT: s_mov_b64 s[94:95], -1
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: s_mov_b64 s[94:95], -1
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
@@ -30319,30 +30333,32 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; kill: killed $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
; SI-NEXT: s_cselect_b32 s43, 1, 0
; SI-NEXT: s_cmp_lg_u32 s43, 1
-; SI-NEXT: s_mov_b32 s94, s73
+; SI-NEXT: s_mov_b32 s94, s78
; SI-NEXT: v_readlane_b32 s95, v29, 0
; SI-NEXT: v_readlane_b32 s43, v29, 1
; SI-NEXT: v_readlane_b32 s45, v29, 2
; SI-NEXT: v_readlane_b32 s57, v29, 3
-; SI-NEXT: v_readlane_b32 s47, v29, 4
-; SI-NEXT: v_readlane_b32 s59, v29, 5
+; SI-NEXT: v_readlane_b32 s59, v29, 4
+; SI-NEXT: v_readlane_b32 s47, v29, 5
; SI-NEXT: v_readlane_b32 s30, v29, 6
; SI-NEXT: v_readlane_b32 s61, v29, 7
-; SI-NEXT: v_readlane_b32 vcc_hi, v29, 8
-; SI-NEXT: v_readlane_b32 s63, v29, 9
-; SI-NEXT: v_readlane_b32 s31, v29, 10
-; SI-NEXT: v_readlane_b32 s73, v29, 11
+; SI-NEXT: v_readlane_b32 s63, v29, 8
+; SI-NEXT: v_readlane_b32 s31, v29, 9
+; SI-NEXT: v_readlane_b32 s73, v29, 10
+; SI-NEXT: v_readlane_b32 s78, v29, 11
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -30373,51 +30389,75 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s42, s29, 16
-; SI-NEXT: s_lshr_b32 s43, s27, 16
+; SI-NEXT: s_lshr_b32 s42, s27, 16
+; SI-NEXT: s_lshr_b32 s43, s23, 16
+; SI-NEXT: s_lshr_b32 s72, s21, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s60, s13, 16
-; SI-NEXT: s_lshr_b32 s61, s15, 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s76, s13, 16
+; SI-NEXT: s_lshr_b32 s77, s15, 16
+; SI-NEXT: s_lshr_b32 s88, s41, 16
+; SI-NEXT: s_lshr_b32 s89, s29, 16
+; SI-NEXT: s_lshr_b32 s74, s17, 16
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_mov_b32 s47, s42
-; SI-NEXT: s_mov_b32 s59, s43
-; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s62, s41, 16
-; SI-NEXT: s_lshr_b32 s63, s23, 16
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
-; SI-NEXT: s_mov_b32 s45, s61
-; SI-NEXT: s_mov_b32 s43, s60
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b32 s74, s21, 16
-; SI-NEXT: s_lshr_b32 s75, s19, 16
-; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
-; SI-NEXT: s_mov_b32 s57, s62
-; SI-NEXT: s_mov_b32 s61, s63
-; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
-; SI-NEXT: s_lshr_b32 s72, s5, 16
-; SI-NEXT: s_lshr_b32 s73, s7, 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_mov_b32 s61, s43
+; SI-NEXT: s_mov_b32 s63, s72
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s79, s5, 16
+; SI-NEXT: s_lshr_b32 s78, s7, 16
; SI-NEXT: s_lshr_b32 s94, s9, 16
; SI-NEXT: s_lshr_b32 s95, s11, 16
; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_mov_b32 vcc_hi, s74
-; SI-NEXT: s_mov_b32 s63, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_mov_b32 s59, s89
+; SI-NEXT: s_mov_b32 s57, s88
+; SI-NEXT: s_mov_b32 s45, s77
+; SI-NEXT: s_mov_b32 s43, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: .LBB45_5: ; %end
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_or_b32 s24, s24, s42
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s30, 16
+; SI-NEXT: s_or_b32 s25, s25, s42
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_or_b32 s26, s26, s42
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s47, 16
+; SI-NEXT: s_or_b32 s27, s27, s42
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s74, 16
+; SI-NEXT: s_or_b32 s28, s28, s42
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s59, 16
+; SI-NEXT: s_or_b32 s29, s29, s42
+; SI-NEXT: s_and_b32 s40, s40, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s72, 16
+; SI-NEXT: s_or_b32 s40, s40, s42
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s42
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s62, 16
; SI-NEXT: s_or_b32 s14, s14, s42
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s42, s45, 16
; SI-NEXT: s_or_b32 s15, s15, s42
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s42, s60, 16
; SI-NEXT: s_or_b32 s12, s12, s42
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s42, s43, 16
@@ -30433,66 +30473,42 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: s_or_b32 s8, s8, s42
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s42, s94, 16
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s63, 16
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s9, s9, s42
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s42, s46, 16
-; SI-NEXT: s_lshl_b32 s75, s92, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s19, s19, s63
-; SI-NEXT: s_lshl_b32 s63, s88, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s61
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s76, 16
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s17, s17, s73
+; SI-NEXT: s_lshl_b32 s73, s90, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s42
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s73, 16
-; SI-NEXT: s_or_b32 s16, s16, s75
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s75, s31, 16
-; SI-NEXT: s_or_b32 s20, s20, s63
+; SI-NEXT: s_lshl_b32 s42, s78, 16
+; SI-NEXT: s_or_b32 s18, s18, s73
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s31, 16
; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s63, vcc_hi, 16
-; SI-NEXT: s_or_b32 s24, s24, s61
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s30, 16
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s59, 16
-; SI-NEXT: s_or_b32 s29, s29, s47
-; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s60, 16
+; SI-NEXT: s_lshl_b32 s63, s63, 16
; SI-NEXT: s_or_b32 s7, s7, s42
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s42, s44, 16
-; SI-NEXT: s_or_b32 s17, s17, s75
-; SI-NEXT: s_lshl_b32 s75, s90, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s92, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s73
+; SI-NEXT: s_lshl_b32 s73, s88, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
; SI-NEXT: s_or_b32 s21, s21, s63
-; SI-NEXT: s_lshl_b32 s63, s78, 16
+; SI-NEXT: s_lshl_b32 s63, s76, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s61
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s74, 16
-; SI-NEXT: s_or_b32 s27, s27, s59
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s62, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s57, 16
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s61, s61, 16
; SI-NEXT: s_or_b32 s4, s4, s42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s72, 16
-; SI-NEXT: s_or_b32 s18, s18, s75
+; SI-NEXT: s_lshl_b32 s42, s79, 16
+; SI-NEXT: s_or_b32 s16, s16, s75
+; SI-NEXT: s_or_b32 s20, s20, s73
; SI-NEXT: s_or_b32 s22, s22, s63
-; SI-NEXT: s_or_b32 s26, s26, s61
-; SI-NEXT: s_or_b32 s28, s28, s59
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_or_b32 s23, s23, s61
; SI-NEXT: s_or_b32 s5, s5, s42
; SI-NEXT: v_readlane_b32 s30, v28, 0
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -31243,48 +31259,51 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v48, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v11
; SI-NEXT: v_mov_b32_e32 v41, v10
; SI-NEXT: v_mov_b32_e32 v42, v9
@@ -31298,22 +31317,21 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v58, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -31322,52 +31340,51 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB46_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -31380,28 +31397,28 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
@@ -31431,7 +31448,12 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -31439,8 +31461,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(6)
@@ -31456,10 +31477,6 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
@@ -31539,7 +31556,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB46_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v38
; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
@@ -31555,7 +31572,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v37
; SI-NEXT: v_cvt_f32_f16_e32 v3, v57
; SI-NEXT: v_cvt_f32_f16_e32 v4, v56
; SI-NEXT: v_cvt_f32_f16_e32 v5, v47
@@ -31567,7 +31584,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v63
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v46
@@ -31578,7 +31595,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v36
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v44
@@ -31589,7 +31606,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v62
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v42
@@ -31600,7 +31617,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v35
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v40
@@ -31611,7 +31628,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v34
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v54
@@ -31622,7 +31639,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v61
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v17, v52
@@ -31633,7 +31650,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v33
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f32_f16_e32 v20, v49
@@ -31644,75 +31661,75 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v60
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
+; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v33
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -31720,9 +31737,9 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v15, v17, v15
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -31739,9 +31756,9 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v18, v20, v18
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -31752,15 +31769,13 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v39
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_or_b32_e32 v20, v21, v20
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
@@ -31772,7 +31787,7 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_or_b32_e32 v21, v23, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -32091,58 +32106,64 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -32150,18 +32171,15 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -32170,9 +32188,12 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -32187,15 +32208,18 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -32210,6 +32234,9 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -32233,31 +32260,19 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -32312,74 +32327,89 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -32395,20 +32425,8 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -35851,6 +35869,9 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v37, v22
+; SI-NEXT: v_mov_b32_e32 v38, v21
+; SI-NEXT: v_mov_b32_e32 v39, v20
; SI-NEXT: v_mov_b32_e32 v48, v19
; SI-NEXT: v_mov_b32_e32 v49, v18
; SI-NEXT: v_mov_b32_e32 v50, v17
@@ -35884,12 +35905,9 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
@@ -35902,28 +35920,28 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
@@ -35940,36 +35958,45 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58
@@ -35980,21 +36007,15 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_or_b32_e32 v1, v1, v33
-; SI-NEXT: v_or_b32_e32 v2, v2, v38
-; SI-NEXT: v_or_b32_e32 v3, v3, v61
-; SI-NEXT: v_or_b32_e32 v4, v4, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v32
-; SI-NEXT: v_or_b32_e32 v6, v6, v36
-; SI-NEXT: v_or_b32_e32 v7, v7, v60
-; SI-NEXT: v_or_b32_e32 v8, v8, v35
-; SI-NEXT: v_or_b32_e32 v9, v9, v63
-; SI-NEXT: v_or_b32_e32 v10, v10, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v32
+; SI-NEXT: v_or_b32_e32 v1, v1, v36
+; SI-NEXT: v_or_b32_e32 v2, v2, v61
+; SI-NEXT: v_or_b32_e32 v3, v3, v35
+; SI-NEXT: v_or_b32_e32 v4, v4, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v34
+; SI-NEXT: v_or_b32_e32 v6, v6, v63
+; SI-NEXT: v_or_b32_e32 v7, v7, v33
+; SI-NEXT: v_or_b32_e32 v8, v8, v62
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -36005,30 +36026,27 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v13, v13, v14
@@ -36050,7 +36068,19 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v38
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v37
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -36058,18 +36088,9 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -36141,16 +36162,22 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v58
@@ -36161,9 +36188,6 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v43
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v42
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -36173,21 +36197,15 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_or_b32_e32 v2, v38, v2
-; SI-NEXT: v_or_b32_e32 v3, v61, v3
-; SI-NEXT: v_or_b32_e32 v4, v37, v4
-; SI-NEXT: v_or_b32_e32 v5, v32, v5
-; SI-NEXT: v_or_b32_e32 v6, v36, v6
-; SI-NEXT: v_or_b32_e32 v7, v60, v7
-; SI-NEXT: v_or_b32_e32 v8, v35, v8
-; SI-NEXT: v_or_b32_e32 v9, v63, v9
-; SI-NEXT: v_or_b32_e32 v10, v34, v10
-; SI-NEXT: v_or_b32_e32 v11, v62, v11
+; SI-NEXT: v_or_b32_e32 v0, v32, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v2, v61, v2
+; SI-NEXT: v_or_b32_e32 v3, v35, v3
+; SI-NEXT: v_or_b32_e32 v4, v60, v4
+; SI-NEXT: v_or_b32_e32 v5, v34, v5
+; SI-NEXT: v_or_b32_e32 v6, v63, v6
+; SI-NEXT: v_or_b32_e32 v7, v33, v7
+; SI-NEXT: v_or_b32_e32 v8, v62, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -36197,40 +36215,64 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v41
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v40
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v55
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v38
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v37
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -36240,31 +36282,8 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -36577,58 +36596,64 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -36636,18 +36661,15 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -36656,9 +36678,12 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -36673,15 +36698,18 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -36696,6 +36724,9 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -36719,31 +36750,19 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -36798,73 +36817,88 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -36880,20 +36914,8 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -40277,48 +40299,51 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v48, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT: v_mov_b32_e32 v49, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT: v_mov_b32_e32 v50, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v11
; SI-NEXT: v_mov_b32_e32 v41, v10
; SI-NEXT: v_mov_b32_e32 v42, v9
@@ -40332,22 +40357,21 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v58, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -40356,52 +40380,51 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB54_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -40414,28 +40437,28 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v54
@@ -40465,7 +40488,12 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
@@ -40473,8 +40501,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(6)
@@ -40490,10 +40517,6 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
@@ -40573,7 +40596,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB54_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v38
; SI-NEXT: v_cvt_f32_f16_e32 v2, v32
; SI-NEXT: v_cvt_f32_f16_e32 v1, v59
; SI-NEXT: v_cvt_f32_f16_e32 v3, v58
@@ -40589,7 +40612,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v37
; SI-NEXT: v_cvt_f32_f16_e32 v3, v57
; SI-NEXT: v_cvt_f32_f16_e32 v4, v56
; SI-NEXT: v_cvt_f32_f16_e32 v5, v47
@@ -40601,7 +40624,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v63
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v46
@@ -40612,7 +40635,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v36
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v44
@@ -40623,7 +40646,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v62
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v42
@@ -40634,7 +40657,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v61
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v35
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v40
@@ -40645,7 +40668,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v34
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v54
@@ -40656,7 +40679,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v60
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v61
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v17, v52
@@ -40667,7 +40690,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v33
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f32_f16_e32 v20, v49
@@ -40678,75 +40701,75 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v60
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
+; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v33
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
+; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -40754,9 +40777,9 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v15, v17, v15
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -40773,9 +40796,9 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v18, v20, v18
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -40786,15 +40809,13 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v39
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_or_b32_e32 v20, v21, v20
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
@@ -40806,7 +40827,7 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_or_b32_e32 v21, v23, v21
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -41125,58 +41146,64 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v59, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v34, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v35, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; GFX9-NEXT: v_mov_b32_e32 v36, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT: v_mov_b32_e32 v37, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_mov_b32_e32 v38, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v6
; GFX9-NEXT: v_mov_b32_e32 v46, v5
; GFX9-NEXT: v_mov_b32_e32 v47, v4
@@ -41184,18 +41211,15 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v57, v2
; GFX9-NEXT: v_mov_b32_e32 v58, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
@@ -41204,9 +41228,12 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
@@ -41221,15 +41248,18 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v34
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
@@ -41244,6 +41274,9 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
@@ -41267,31 +41300,19 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: ; implicit-def: $vgpr28
@@ -41346,74 +41367,89 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6
-; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6
-; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6
-; GFX9-NEXT: v_perm_b32 v6, v32, v45, s6
-; GFX9-NEXT: v_perm_b32 v7, v60, v44, s6
-; GFX9-NEXT: v_perm_b32 v8, v63, v43, s6
+; GFX9-NEXT: v_perm_b32 v1, v61, v58, s6
+; GFX9-NEXT: v_perm_b32 v2, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v3, v60, v56, s6
+; GFX9-NEXT: v_perm_b32 v4, v63, v47, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v39, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v38, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v35, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v34, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -41429,20 +41465,8 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
@@ -42833,50 +42857,56 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v55
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v5
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v51
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v49
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v9
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v11
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v15
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v19
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v57
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v21
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; kill: killed $vgpr28
; SI-NEXT: ; implicit-def: $vgpr28
@@ -42928,52 +42958,46 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; kill: killed $vgpr28
; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v27
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v18
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v2
; SI-NEXT: ; kill: killed $vgpr28
; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v52
; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v50
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v48
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v48
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v37
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v44
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v41
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v40
-; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
; SI-NEXT: ; kill: killed $vgpr28
; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
@@ -42994,92 +43018,89 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB56_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54
; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54
; SI-NEXT: v_or_b32_e32 v60, v1, v28
-; SI-NEXT: v_mov_b32_e32 v28, v39
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v48, v63
-; SI-NEXT: v_mov_b32_e32 v63, v43
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v28, v38
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v60, v39, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v60, v38, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v51
; SI-NEXT: v_or_b32_e32 v58, v1, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v58, v43, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v58, v63, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
; SI-NEXT: v_or_b32_e32 v57, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v57, v63, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v57, v41, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v38
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v0, v0, v43
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v63
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v0, v0, v63
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v41
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v0, v0, v48
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v0, v0, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v0, v0, v56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v59
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v0, v0, v29
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v0, v0, v30
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v0, v0, v31
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v0, v0, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v0, v0, v33
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_mov_b32_e32 v39, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_mov_b32_e32 v38, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr8
@@ -43092,142 +43113,146 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_or_b32_e32 v47, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v47, v48, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v47, v43, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v45, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v44, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v44, v56, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v42, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v42, v59, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v42, v62, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v40, v1, v3
-; SI-NEXT: v_alignbit_b32 v1, v40, v62, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v40, v59, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v55, v1, v36
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v55, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v55, v29, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v53, v1, v34
-; SI-NEXT: v_alignbit_b32 v1, v53, v30, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v52, v1, v37
-; SI-NEXT: v_alignbit_b32 v1, v52, v31, 16
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: v_or_b32_e32 v50, v1, v41
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: v_alignbit_b32 v1, v50, v32, 16
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: v_or_b32_e32 v5, v1, v38
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: v_alignbit_b32 v1, v5, v33, 16
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: v_or_b32_e32 v3, v1, v61
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: v_alignbit_b32 v1, v3, v35, 16
; SI-NEXT: ; kill: killed $vgpr29
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; kill: killed $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v53, v1, v3
+; SI-NEXT: v_alignbit_b32 v1, v53, v30, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
+; SI-NEXT: v_or_b32_e32 v52, v1, v36
+; SI-NEXT: v_alignbit_b32 v1, v52, v31, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v50, v1, v61
+; SI-NEXT: v_alignbit_b32 v1, v50, v32, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
+; SI-NEXT: v_or_b32_e32 v48, v1, v37
+; SI-NEXT: v_alignbit_b32 v1, v48, v33, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27
+; SI-NEXT: v_or_b32_e32 v3, v1, v35
+; SI-NEXT: v_alignbit_b32 v1, v3, v34, 16
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v28, v3
-; SI-NEXT: v_mov_b32_e32 v48, v5
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; kill: killed $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: .LBB56_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB56_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_or_b32_e32 v26, v35, v26
-; SI-NEXT: v_add_i32_e32 v35, vcc, 0x30000, v26
+; SI-NEXT: v_or_b32_e32 v26, v34, v26
+; SI-NEXT: v_add_i32_e32 v34, vcc, 0x30000, v26
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v26, v61, v26
+; SI-NEXT: v_or_b32_e32 v26, v35, v26
; SI-NEXT: v_or_b32_e32 v24, v33, v24
+; SI-NEXT: s_waitcnt expcnt(4)
; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v26
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v24
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25
; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v24, v38, v24
+; SI-NEXT: v_or_b32_e32 v24, v37, v24
; SI-NEXT: v_or_b32_e32 v22, v32, v22
; SI-NEXT: v_add_i32_e32 v48, vcc, 0x30000, v24
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v22
@@ -43235,7 +43260,7 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v22, v41, v22
+; SI-NEXT: v_or_b32_e32 v22, v61, v22
; SI-NEXT: v_or_b32_e32 v20, v31, v20
; SI-NEXT: v_add_i32_e32 v50, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v20
@@ -43243,33 +43268,22 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v20, v37, v20
+; SI-NEXT: v_or_b32_e32 v20, v36, v20
; SI-NEXT: v_or_b32_e32 v18, v30, v18
; SI-NEXT: v_add_i32_e32 v52, vcc, 0x30000, v20
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v18, v34, v18
; SI-NEXT: v_or_b32_e32 v16, v29, v16
-; SI-NEXT: v_add_i32_e32 v53, vcc, 0x30000, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v16, v36, v16
-; SI-NEXT: v_or_b32_e32 v14, v62, v14
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v14
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v14, v59, v14
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v59, v12
+; SI-NEXT: v_or_b32_e32 v12, v62, v12
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v56, v10
@@ -43278,42 +43292,59 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v8, v46, v8
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
+; SI-NEXT: v_or_b32_e32 v6, v43, v6
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v43, v4
+; SI-NEXT: v_or_b32_e32 v4, v41, v4
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v2, v63, v2
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: v_add_i32_e32 v53, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v16
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v40, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v42, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_add_i32_e32 v44, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_add_i32_e32 v45, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v45
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_add_i32_e32 v47, vcc, 0x30000, v6
@@ -43325,18 +43356,15 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_add_i32_e32 v57, vcc, 0x30000, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v57
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x30000, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v57
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_add_i32_e32 v58, vcc, 0x30000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v58
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v0, v2, v0
@@ -43344,67 +43372,64 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v60, vcc, 0x30000, v0
; SI-NEXT: v_alignbit_b32 v0, v60, v2, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v58, v4, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v57, v6, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v47, v8, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v45, v10, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v44, v12, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v42, v14, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v40, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v55, v18, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v53, v20, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v52, v22, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v50, v24, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v48, v26, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v28, v35, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v28, v34, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
@@ -43436,18 +43461,18 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: .LBB56_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v54
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v51
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v38
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
@@ -43456,26 +43481,25 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
@@ -43512,43 +43536,43 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v44
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v40
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -43570,31 +43594,31 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v16, v16, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v18, v18, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v53
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v52
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v22, v22, v23
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v50
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v48
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
@@ -43625,15 +43649,14 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v8
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v22
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v8
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v19
@@ -43647,32 +43670,34 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v9
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v0
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v0
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v43, v29
-; VI-NEXT: v_mov_b32_e32 v44, v30
-; VI-NEXT: v_mov_b32_e32 v45, v31
-; VI-NEXT: v_mov_b32_e32 v46, v33
-; VI-NEXT: v_mov_b32_e32 v47, v32
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_mov_b32_e32 v33, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v42, v32
+; VI-NEXT: v_mov_b32_e32 v43, v33
+; VI-NEXT: v_mov_b32_e32 v44, v29
+; VI-NEXT: v_mov_b32_e32 v45, v30
+; VI-NEXT: v_mov_b32_e32 v46, v31
+; VI-NEXT: v_mov_b32_e32 v47, v34
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_mov_b32_e32 v34, v28
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB56_2
; VI-NEXT: ; %bb.1: ; %cmp.true
@@ -43687,14 +43712,14 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v4, 3, v4
; VI-NEXT: v_add_u16_e32 v43, 3, v43
; VI-NEXT: v_add_u16_e32 v5, 3, v5
-; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_add_u16_e32 v42, 3, v42
; VI-NEXT: v_add_u16_e32 v6, 3, v6
+; VI-NEXT: s_waitcnt vmcnt(6)
; VI-NEXT: v_add_u16_e32 v40, 3, v40
; VI-NEXT: v_add_u16_e32 v7, 3, v7
; VI-NEXT: v_add_u16_e32 v41, 3, v41
; VI-NEXT: v_add_u16_e32 v8, 3, v8
-; VI-NEXT: v_add_u16_e32 v33, 3, v33
+; VI-NEXT: v_add_u16_e32 v34, 3, v34
; VI-NEXT: v_add_u16_e32 v9, 3, v9
; VI-NEXT: v_add_u16_e32 v55, 3, v55
; VI-NEXT: v_add_u16_e32 v10, 3, v10
@@ -43722,9 +43747,9 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v21, 3, v21
; VI-NEXT: v_add_u16_e32 v35, 3, v35
; VI-NEXT: v_add_u16_e32 v22, 3, v22
-; VI-NEXT: v_add_u16_e32 v34, 3, v34
-; VI-NEXT: v_add_u16_e32 v23, 3, v23
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u16_e32 v33, 3, v33
+; VI-NEXT: v_add_u16_e32 v23, 3, v23
; VI-NEXT: v_add_u16_e32 v32, 3, v32
; VI-NEXT: v_add_u16_e32 v24, 3, v24
; VI-NEXT: v_add_u16_e32 v31, 3, v31
@@ -43743,7 +43768,6 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
-; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT: v_or_b32_sdwa v6, v6, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v41
@@ -43762,41 +43786,41 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; VI-NEXT: v_or_b32_sdwa v8, v8, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
-; VI-NEXT: v_or_b32_sdwa v9, v9, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v54
-; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v53
-; VI-NEXT: v_or_b32_sdwa v11, v11, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v52
-; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v51
-; VI-NEXT: v_or_b32_sdwa v13, v13, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v50
-; VI-NEXT: v_or_b32_sdwa v14, v14, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v49
-; VI-NEXT: v_or_b32_sdwa v15, v15, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v48
-; VI-NEXT: v_or_b32_sdwa v16, v16, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v39
-; VI-NEXT: v_or_b32_sdwa v17, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v37
-; VI-NEXT: v_or_b32_sdwa v19, v19, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v36
-; VI-NEXT: v_or_b32_sdwa v20, v20, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v35
-; VI-NEXT: v_or_b32_sdwa v21, v21, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; VI-NEXT: v_or_b32_sdwa v8, v8, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v55
+; VI-NEXT: v_or_b32_sdwa v9, v9, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v54
+; VI-NEXT: v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v53
+; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v52
+; VI-NEXT: v_or_b32_sdwa v12, v12, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v51
+; VI-NEXT: v_or_b32_sdwa v13, v13, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v50
+; VI-NEXT: v_or_b32_sdwa v14, v14, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v49
+; VI-NEXT: v_or_b32_sdwa v15, v15, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v48
+; VI-NEXT: v_or_b32_sdwa v16, v16, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v39
+; VI-NEXT: v_or_b32_sdwa v17, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v38
+; VI-NEXT: v_or_b32_sdwa v18, v18, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v37
+; VI-NEXT: v_or_b32_sdwa v19, v19, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v36
+; VI-NEXT: v_or_b32_sdwa v20, v20, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v35
; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -44249,59 +44273,58 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v28, s69, 19
; SI-NEXT: v_writelane_b32 v28, s70, 20
; SI-NEXT: v_writelane_b32 v28, s71, 21
-; SI-NEXT: v_writelane_b32 v28, s80, 22
-; SI-NEXT: v_writelane_b32 v28, s81, 23
-; SI-NEXT: v_writelane_b32 v28, s30, 24
-; SI-NEXT: v_writelane_b32 v28, s31, 25
-; SI-NEXT: v_readfirstlane_b32 s52, v0
-; SI-NEXT: v_readfirstlane_b32 s53, v2
-; SI-NEXT: s_lshr_b32 s45, s52, 16
+; SI-NEXT: v_writelane_b32 v28, s30, 22
+; SI-NEXT: v_writelane_b32 v28, s31, 23
+; SI-NEXT: s_lshr_b32 s14, s26, 16
; SI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
-; SI-NEXT: v_readfirstlane_b32 s55, v4
-; SI-NEXT: s_lshr_b32 s44, s53, 16
+; SI-NEXT: s_lshr_b32 s12, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s54, v0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v29, s45, 0
-; SI-NEXT: v_readfirstlane_b32 s66, v6
-; SI-NEXT: s_lshr_b32 s42, s55, 16
-; SI-NEXT: v_writelane_b32 v29, s44, 1
+; SI-NEXT: v_writelane_b32 v29, s14, 0
+; SI-NEXT: v_readfirstlane_b32 s64, v2
+; SI-NEXT: s_lshr_b32 s46, s54, 16
+; SI-NEXT: v_writelane_b32 v29, s12, 1
+; SI-NEXT: v_readfirstlane_b32 s66, v4
+; SI-NEXT: s_lshr_b32 s44, s64, 16
+; SI-NEXT: v_writelane_b32 v29, s46, 2
+; SI-NEXT: v_readfirstlane_b32 s68, v6
+; SI-NEXT: s_lshr_b32 s42, s66, 16
+; SI-NEXT: v_writelane_b32 v29, s44, 3
; SI-NEXT: v_readfirstlane_b32 s69, v8
-; SI-NEXT: s_lshr_b32 s40, s66, 16
-; SI-NEXT: v_writelane_b32 v29, s42, 2
-; SI-NEXT: s_lshr_b32 s14, s69, 16
-; SI-NEXT: v_writelane_b32 v29, s40, 3
-; SI-NEXT: v_readfirstlane_b32 s71, v10
+; SI-NEXT: s_lshr_b32 s40, s68, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 4
+; SI-NEXT: s_lshr_b32 s47, s69, 16
+; SI-NEXT: v_writelane_b32 v29, s40, 5
+; SI-NEXT: v_readfirstlane_b32 s70, v10
; SI-NEXT: v_readfirstlane_b32 s43, v1
-; SI-NEXT: v_writelane_b32 v29, s14, 4
-; SI-NEXT: s_lshr_b32 s12, s71, 16
-; SI-NEXT: v_writelane_b32 v29, s43, 5
+; SI-NEXT: v_writelane_b32 v29, s47, 6
+; SI-NEXT: s_lshr_b32 s45, s70, 16
+; SI-NEXT: v_writelane_b32 v29, s43, 7
; SI-NEXT: v_readfirstlane_b32 s41, v3
-; SI-NEXT: v_writelane_b32 v29, s12, 6
+; SI-NEXT: v_writelane_b32 v29, s45, 8
; SI-NEXT: v_readfirstlane_b32 s15, v5
-; SI-NEXT: v_writelane_b32 v29, s41, 7
+; SI-NEXT: v_writelane_b32 v29, s41, 9
; SI-NEXT: v_readfirstlane_b32 s13, v7
-; SI-NEXT: v_writelane_b32 v29, s15, 8
-; SI-NEXT: v_readfirstlane_b32 s11, v9
-; SI-NEXT: v_writelane_b32 v29, s13, 9
+; SI-NEXT: v_writelane_b32 v29, s15, 10
; SI-NEXT: v_readfirstlane_b32 s7, v13
-; SI-NEXT: v_readfirstlane_b32 s81, v12
+; SI-NEXT: v_readfirstlane_b32 s71, v12
; SI-NEXT: v_readfirstlane_b32 s9, v11
-; SI-NEXT: v_writelane_b32 v29, s11, 10
+; SI-NEXT: v_readfirstlane_b32 s11, v9
+; SI-NEXT: v_writelane_b32 v29, s13, 11
; SI-NEXT: s_lshr_b32 s93, s29, 16
-; SI-NEXT: s_lshr_b32 s80, s28, 16
; SI-NEXT: s_lshr_b32 s91, s27, 16
-; SI-NEXT: s_lshr_b32 s68, s26, 16
; SI-NEXT: s_lshr_b32 s89, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s24, 16
+; SI-NEXT: s_lshr_b32 s67, s24, 16
; SI-NEXT: s_lshr_b32 s79, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s22, 16
+; SI-NEXT: s_lshr_b32 s65, s22, 16
; SI-NEXT: s_lshr_b32 s77, s21, 16
-; SI-NEXT: s_lshr_b32 s70, s20, 16
+; SI-NEXT: s_lshr_b32 s55, s20, 16
; SI-NEXT: s_lshr_b32 s75, s19, 16
-; SI-NEXT: s_lshr_b32 s67, s18, 16
+; SI-NEXT: s_lshr_b32 s53, s18, 16
; SI-NEXT: s_lshr_b32 s73, s17, 16
-; SI-NEXT: s_lshr_b32 s64, s16, 16
+; SI-NEXT: s_lshr_b32 s52, s16, 16
; SI-NEXT: s_lshr_b32 s49, s7, 16
-; SI-NEXT: s_lshr_b32 s5, s81, 16
+; SI-NEXT: s_lshr_b32 s5, s71, 16
; SI-NEXT: s_lshr_b32 s39, s9, 16
; SI-NEXT: s_lshr_b32 s37, s11, 16
; SI-NEXT: s_lshr_b32 s35, s13, 16
@@ -44309,24 +44332,27 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 vcc_hi, s41, 16
; SI-NEXT: s_lshr_b32 s95, s43, 16
; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: v_writelane_b32 v29, s9, 11
+; SI-NEXT: v_writelane_b32 v29, s11, 12
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v29, s7, 12
-; SI-NEXT: v_writelane_b32 v29, s5, 13
+; SI-NEXT: v_writelane_b32 v29, s9, 13
+; SI-NEXT: v_writelane_b32 v29, s7, 14
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshl_b32 s46, s45, 16
+; SI-NEXT: s_lshl_b32 s58, s14, 16
+; SI-NEXT: s_lshl_b32 s56, s12, 16
+; SI-NEXT: s_lshl_b32 s14, s47, 16
+; SI-NEXT: s_lshl_b32 s12, s45, 16
; SI-NEXT: s_and_b32 s45, s17, 0xffff
; SI-NEXT: s_lshl_b32 s47, s73, 16
-; SI-NEXT: s_mov_b32 s78, s73
+; SI-NEXT: s_mov_b32 s88, s73
; SI-NEXT: s_or_b32 s73, s45, s47
; SI-NEXT: s_and_b32 s45, s19, 0xffff
; SI-NEXT: s_lshl_b32 s47, s75, 16
-; SI-NEXT: s_mov_b32 s88, s75
+; SI-NEXT: s_mov_b32 s90, s75
; SI-NEXT: s_or_b32 s75, s45, s47
; SI-NEXT: s_and_b32 s45, s21, 0xffff
; SI-NEXT: s_lshl_b32 s47, s77, 16
-; SI-NEXT: s_mov_b32 s90, s77
+; SI-NEXT: s_mov_b32 s92, s77
; SI-NEXT: s_or_b32 s77, s45, s47
; SI-NEXT: s_and_b32 s45, s23, 0xffff
; SI-NEXT: s_lshl_b32 s47, s79, 16
@@ -44342,105 +44368,103 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s57, s45, s47
; SI-NEXT: s_and_b32 s43, s43, 0xffff
; SI-NEXT: s_lshl_b32 s45, s95, 16
+; SI-NEXT: s_and_b32 s4, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s72, s52, 16
; SI-NEXT: s_or_b32 s47, s43, s45
; SI-NEXT: s_and_b32 s41, s41, 0xffff
; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
+; SI-NEXT: s_or_b32 s10, s4, s72
+; SI-NEXT: s_and_b32 s4, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s53, 16
; SI-NEXT: s_or_b32 s45, s41, s43
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s41, s31, 16
+; SI-NEXT: s_or_b32 s8, s4, s74
+; SI-NEXT: s_and_b32 s4, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s55, 16
; SI-NEXT: s_or_b32 s43, s15, s41
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s15, s35, 16
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s64, 16
+; SI-NEXT: s_or_b32 s6, s4, s76
+; SI-NEXT: s_and_b32 s4, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s62, s65, 16
; SI-NEXT: s_or_b32 s41, s13, s15
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s13, s37, 16
-; SI-NEXT: s_or_b32 s10, s4, s72
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s67, 16
+; SI-NEXT: s_or_b32 s4, s4, s62
; SI-NEXT: s_or_b32 s15, s11, s13
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s11, s39, 16
-; SI-NEXT: s_or_b32 s8, s4, s74
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s70, 16
+; SI-NEXT: s_mov_b32 s78, s5
+; SI-NEXT: s_lshl_b32 s48, s5, 16
+; SI-NEXT: s_mov_b32 s5, s63
+; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
; SI-NEXT: s_or_b32 s13, s9, s11
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s9, s49, 16
-; SI-NEXT: s_or_b32 s6, s4, s76
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s54, 16
+; SI-NEXT: v_writelane_b32 v29, s62, 15
+; SI-NEXT: s_lshl_b32 s60, s67, 16
; SI-NEXT: s_mov_b32 s50, s49
; SI-NEXT: s_or_b32 s49, s7, s9
; SI-NEXT: s_mov_b32 s11, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
; SI-NEXT: s_mov_b32 s9, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
-; SI-NEXT: s_or_b32 s4, s4, s62
-; SI-NEXT: s_lshl_b32 s60, s65, 16
-; SI-NEXT: s_mov_b32 s73, s78
-; SI-NEXT: s_mov_b32 s75, s88
+; SI-NEXT: v_writelane_b32 v29, s63, 16
+; SI-NEXT: s_and_b32 s62, s24, 0xffff
+; SI-NEXT: s_mov_b32 s73, s88
+; SI-NEXT: s_mov_b32 s75, s90
; SI-NEXT: s_mov_b32 s7, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
-; SI-NEXT: s_mov_b32 s88, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16
-; SI-NEXT: s_and_b32 s62, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s68, 16
-; SI-NEXT: s_mov_b32 s77, s90
-; SI-NEXT: s_mov_b32 s79, s88
; SI-NEXT: s_or_b32 s62, s62, s60
; SI-NEXT: s_mov_b32 s90, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[60:61], 16
; SI-NEXT: s_and_b32 s60, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s56, s80, 16
+; SI-NEXT: s_mov_b32 s77, s92
; SI-NEXT: s_mov_b32 s89, s90
; SI-NEXT: s_or_b32 s60, s60, s58
; SI-NEXT: s_mov_b32 s92, s91
; SI-NEXT: s_lshr_b64 s[90:91], s[58:59], 16
; SI-NEXT: s_and_b32 s58, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
; SI-NEXT: s_mov_b32 s91, s92
; SI-NEXT: s_or_b32 s58, s58, s56
; SI-NEXT: s_mov_b32 s94, s93
; SI-NEXT: s_lshr_b64 s[92:93], s[56:57], 16
-; SI-NEXT: s_and_b32 s56, s52, 0xffff
+; SI-NEXT: s_and_b32 s56, s54, 0xffff
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: s_mov_b32 s93, s94
; SI-NEXT: s_or_b32 s56, s56, s46
; SI-NEXT: s_mov_b32 vcc_lo, s95
; SI-NEXT: s_lshr_b64 s[94:95], s[46:47], 16
-; SI-NEXT: s_and_b32 s46, s53, 0xffff
+; SI-NEXT: s_and_b32 s46, s64, 0xffff
; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_mov_b32 s95, vcc_lo
; SI-NEXT: s_or_b32 s46, s46, s44
; SI-NEXT: s_mov_b32 s30, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[44:45], 16
-; SI-NEXT: s_and_b32 s44, s55, 0xffff
+; SI-NEXT: s_and_b32 s44, s66, 0xffff
; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_mov_b32 vcc_hi, s30
; SI-NEXT: s_or_b32 s44, s44, s42
; SI-NEXT: s_mov_b32 s34, s31
; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 16
-; SI-NEXT: s_and_b32 s42, s66, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_and_b32 s42, s68, 0xffff
; SI-NEXT: s_mov_b32 s31, s34
; SI-NEXT: s_or_b32 s42, s42, s40
; SI-NEXT: s_mov_b32 s36, s35
; SI-NEXT: s_lshr_b64 s[34:35], s[40:41], 16
; SI-NEXT: s_and_b32 s40, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_mov_b32 s35, s36
; SI-NEXT: s_or_b32 s40, s40, s14
; SI-NEXT: s_mov_b32 s38, s37
; SI-NEXT: s_lshr_b64 s[36:37], s[14:15], 16
-; SI-NEXT: s_and_b32 s14, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s48, s5, 16
+; SI-NEXT: s_and_b32 s14, s70, 0xffff
; SI-NEXT: s_mov_b32 s37, s38
; SI-NEXT: s_or_b32 s14, s14, s12
; SI-NEXT: s_mov_b32 s51, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[12:13], 16
-; SI-NEXT: s_and_b32 s12, s81, 0xffff
-; SI-NEXT: s_mov_b32 s5, s63
+; SI-NEXT: s_and_b32 s12, s71, 0xffff
; SI-NEXT: s_mov_b32 s63, s61
; SI-NEXT: s_mov_b32 s61, s59
; SI-NEXT: s_mov_b32 s59, s57
@@ -44458,7 +44482,10 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_mov_b64 s[50:51], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
+; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: s_mov_b32 s78, s5
; SI-NEXT: s_mov_b64 s[50:51], -1
+; SI-NEXT: v_writelane_b32 v29, s12, 15
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr8
@@ -44466,7 +44493,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: v_writelane_b32 v29, s13, 16
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr60
@@ -44491,106 +44518,109 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_and_b64 s[50:51], s[50:51], exec
; SI-NEXT: s_cselect_b32 s50, 1, 0
; SI-NEXT: s_cmp_lg_u32 s50, 1
+; SI-NEXT: v_readlane_b32 s50, v29, 15
+; SI-NEXT: v_readlane_b32 s51, v29, 16
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s81, s81, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 13
-; SI-NEXT: s_and_b32 s5, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: s_add_i32 s71, s71, 3
+; SI-NEXT: s_and_b32 s4, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s12, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 12
+; SI-NEXT: v_readlane_b32 s4, v29, 14
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s49, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s13, s4, 0x30000
-; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 6
-; SI-NEXT: s_and_b32 s5, s71, 0xffff
+; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 8
+; SI-NEXT: s_and_b32 s5, s70, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s14, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 11
+; SI-NEXT: v_readlane_b32 s4, v29, 13
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s15, s4, 0x30000
; SI-NEXT: s_add_i32 s69, s69, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 4
+; SI-NEXT: v_readlane_b32 s4, v29, 6
; SI-NEXT: s_and_b32 s5, s69, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s40, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 10
+; SI-NEXT: v_readlane_b32 s4, v29, 12
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s41, s4, 0x30000
-; SI-NEXT: s_add_i32 s66, s66, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 3
-; SI-NEXT: s_and_b32 s5, s66, 0xffff
+; SI-NEXT: s_add_i32 s68, s68, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 5
+; SI-NEXT: s_and_b32 s5, s68, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s42, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 9
+; SI-NEXT: v_readlane_b32 s4, v29, 11
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s43, s4, 0x30000
-; SI-NEXT: s_add_i32 s55, s55, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 2
-; SI-NEXT: s_and_b32 s5, s55, 0xffff
+; SI-NEXT: s_add_i32 s66, s66, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 4
+; SI-NEXT: s_and_b32 s5, s66, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 8
+; SI-NEXT: v_readlane_b32 s4, v29, 10
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s45, s4, 0x30000
-; SI-NEXT: s_add_i32 s53, s53, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 1
-; SI-NEXT: s_and_b32 s5, s53, 0xffff
+; SI-NEXT: s_add_i32 s64, s64, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 3
+; SI-NEXT: s_and_b32 s5, s64, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s46, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 7
+; SI-NEXT: v_readlane_b32 s4, v29, 9
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s47, s4, 0x30000
-; SI-NEXT: s_add_i32 s52, s52, 3
-; SI-NEXT: v_readlane_b32 s4, v29, 0
-; SI-NEXT: s_and_b32 s5, s52, 0xffff
+; SI-NEXT: s_add_i32 s54, s54, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 2
+; SI-NEXT: s_and_b32 s5, s54, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v29, 5
+; SI-NEXT: v_readlane_b32 s4, v29, 7
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 1
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 0
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s60, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
@@ -44599,7 +44629,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s61, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s62, s4, 0x30000
@@ -44609,7 +44639,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s63, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s54, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s23, 0xffff
@@ -44617,7 +44647,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_lshl_b32 s7, s55, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s21, 0xffff
@@ -44625,7 +44655,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s67, 16
+; SI-NEXT: s_lshl_b32 s9, s53, 16
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s19, 0xffff
@@ -44633,24 +44663,23 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_and_b32 s10, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s64, 16
+; SI-NEXT: s_lshl_b32 s11, s52, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s17, 0xffff
; SI-NEXT: s_lshl_b32 s16, s73, 16
; SI-NEXT: s_or_b32 s11, s16, s11
-; SI-NEXT: s_add_i32 s4, s4, 0x30000
-; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s10, s10, 0x30000
; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: s_add_i32 s4, s4, 0x30000
+; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[62:63], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
@@ -44661,6 +44690,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
; SI-NEXT: s_lshr_b32 s73, s11, 16
; SI-NEXT: s_lshr_b32 s75, s9, 16
; SI-NEXT: s_lshr_b32 s77, s7, 16
@@ -44695,7 +44725,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s16, s77, 16
; SI-NEXT: s_or_b32 s7, s7, s16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s78, 16
+; SI-NEXT: s_lshl_b32 s16, s50, 16
; SI-NEXT: s_or_b32 s4, s4, s16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s16, s79, 16
@@ -44760,7 +44790,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s42, s49, 16
; SI-NEXT: s_or_b32 s13, s13, s42
-; SI-NEXT: v_readlane_b32 s30, v28, 24
+; SI-NEXT: v_readlane_b32 s30, v28, 22
; SI-NEXT: v_mov_b32_e32 v0, s10
; SI-NEXT: v_mov_b32_e32 v1, s11
; SI-NEXT: v_mov_b32_e32 v2, s8
@@ -44789,9 +44819,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v25, s15
; SI-NEXT: v_mov_b32_e32 v26, s12
; SI-NEXT: v_mov_b32_e32 v27, s13
-; SI-NEXT: v_readlane_b32 s31, v28, 25
-; SI-NEXT: v_readlane_b32 s81, v28, 23
-; SI-NEXT: v_readlane_b32 s80, v28, 22
+; SI-NEXT: v_readlane_b32 s31, v28, 23
; SI-NEXT: v_readlane_b32 s71, v28, 21
; SI-NEXT: v_readlane_b32 s70, v28, 20
; SI-NEXT: v_readlane_b32 s69, v28, 19
@@ -46202,15 +46230,14 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v8
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v22
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v8
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v19
@@ -46224,32 +46251,34 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v9
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v0
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v0
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v43, v29
-; VI-NEXT: v_mov_b32_e32 v44, v30
-; VI-NEXT: v_mov_b32_e32 v45, v31
-; VI-NEXT: v_mov_b32_e32 v46, v33
-; VI-NEXT: v_mov_b32_e32 v47, v32
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_mov_b32_e32 v33, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v42, v32
+; VI-NEXT: v_mov_b32_e32 v43, v33
+; VI-NEXT: v_mov_b32_e32 v44, v29
+; VI-NEXT: v_mov_b32_e32 v45, v30
+; VI-NEXT: v_mov_b32_e32 v46, v31
+; VI-NEXT: v_mov_b32_e32 v47, v34
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_mov_b32_e32 v34, v28
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB58_2
; VI-NEXT: ; %bb.1: ; %cmp.true
@@ -46264,14 +46293,14 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
; VI-NEXT: v_add_f16_e32 v43, 0x200, v43
; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
-; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_add_f16_e32 v42, 0x200, v42
; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
+; VI-NEXT: s_waitcnt vmcnt(6)
; VI-NEXT: v_add_f16_e32 v40, 0x200, v40
; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
; VI-NEXT: v_add_f16_e32 v41, 0x200, v41
; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_add_f16_e32 v33, 0x200, v33
+; VI-NEXT: v_add_f16_e32 v34, 0x200, v34
; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
; VI-NEXT: v_add_f16_e32 v55, 0x200, v55
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
@@ -46299,9 +46328,9 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_add_f16_e32 v21, 0x200, v21
; VI-NEXT: v_add_f16_e32 v35, 0x200, v35
; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
-; VI-NEXT: v_add_f16_e32 v34, 0x200, v34
-; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_f16_e32 v33, 0x200, v33
+; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
; VI-NEXT: v_add_f16_e32 v32, 0x200, v32
; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
; VI-NEXT: v_add_f16_e32 v31, 0x200, v31
@@ -46320,7 +46349,6 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
-; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT: v_or_b32_sdwa v6, v6, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v41
@@ -46339,41 +46367,41 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; VI-NEXT: v_or_b32_sdwa v8, v8, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
-; VI-NEXT: v_or_b32_sdwa v9, v9, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v54
-; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v53
-; VI-NEXT: v_or_b32_sdwa v11, v11, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v52
-; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v51
-; VI-NEXT: v_or_b32_sdwa v13, v13, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v50
-; VI-NEXT: v_or_b32_sdwa v14, v14, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v49
-; VI-NEXT: v_or_b32_sdwa v15, v15, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v48
-; VI-NEXT: v_or_b32_sdwa v16, v16, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v39
-; VI-NEXT: v_or_b32_sdwa v17, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v37
-; VI-NEXT: v_or_b32_sdwa v19, v19, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v36
-; VI-NEXT: v_or_b32_sdwa v20, v20, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v35
-; VI-NEXT: v_or_b32_sdwa v21, v21, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; VI-NEXT: v_or_b32_sdwa v8, v8, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v55
+; VI-NEXT: v_or_b32_sdwa v9, v9, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v54
+; VI-NEXT: v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v53
+; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v52
+; VI-NEXT: v_or_b32_sdwa v12, v12, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v51
+; VI-NEXT: v_or_b32_sdwa v13, v13, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v50
+; VI-NEXT: v_or_b32_sdwa v14, v14, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v49
+; VI-NEXT: v_or_b32_sdwa v15, v15, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v48
+; VI-NEXT: v_or_b32_sdwa v16, v16, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v39
+; VI-NEXT: v_or_b32_sdwa v17, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v38
+; VI-NEXT: v_or_b32_sdwa v18, v18, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v37
+; VI-NEXT: v_or_b32_sdwa v19, v19, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v36
+; VI-NEXT: v_or_b32_sdwa v20, v20, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v35
; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -46879,18 +46907,18 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v0
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v2
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_or_b32_e32 v61, v1, v29
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_or_b32_e32 v60, v1, v7
; SI-NEXT: v_cvt_f32_f16_e32 v1, s93
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s20
-; SI-NEXT: v_or_b32_e32 v60, v3, v2
+; SI-NEXT: v_or_b32_e32 v58, v3, v2
; SI-NEXT: v_cvt_f32_f16_e32 v3, s91
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -46898,12 +46926,11 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s22
-; SI-NEXT: v_or_b32_e32 v58, v0, v27
+; SI-NEXT: v_or_b32_e32 v56, v0, v9
; SI-NEXT: v_cvt_f32_f16_e32 v0, s89
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s24
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -46911,11 +46938,11 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v57, v1, v62
+; SI-NEXT: v_or_b32_e32 v47, v1, v12
; SI-NEXT: v_cvt_f32_f16_e32 v1, s78
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s26
-; SI-NEXT: v_or_b32_e32 v56, v3, v20
+; SI-NEXT: v_or_b32_e32 v45, v3, v14
; SI-NEXT: v_cvt_f32_f16_e32 v3, s75
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -46923,11 +46950,11 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s28
-; SI-NEXT: v_or_b32_e32 v37, v0, v15
+; SI-NEXT: v_or_b32_e32 v50, v0, v31
; SI-NEXT: v_cvt_f32_f16_e32 v0, s88
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s92
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -46935,11 +46962,13 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v34, v1, v11
+; SI-NEXT: v_or_b32_e32 v1, v1, v28
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, s77
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s90
-; SI-NEXT: v_or_b32_e32 v35, v3, v9
+; SI-NEXT: v_or_b32_e32 v61, v3, v16
; SI-NEXT: v_cvt_f32_f16_e32 v3, s74
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -46947,26 +46976,23 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v1
-; SI-NEXT: v_or_b32_e32 v36, v0, v32
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s63
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s79
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v3
+; SI-NEXT: v_or_b32_e32 v40, v0, v20
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s63
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s76
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s42
-; SI-NEXT: v_or_b32_e32 v24, v1, v13
+; SI-NEXT: v_or_b32_e32 v30, v1, v33
; SI-NEXT: v_cvt_f32_f16_e32 v1, s59
-; SI-NEXT: v_or_b32_e32 v0, v3, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s73
+; SI-NEXT: v_or_b32_e32 v43, v3, v35
; SI-NEXT: v_cvt_f32_f16_e32 v3, s57
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -46975,10 +47001,10 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1
-; SI-NEXT: v_or_b32_e32 v31, v0, v22
+; SI-NEXT: v_or_b32_e32 v57, v0, v22
; SI-NEXT: v_cvt_f32_f16_e32 v0, s47
; SI-NEXT: v_cvt_f32_f16_e32 v1, s62
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s60
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -46986,217 +47012,204 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v0
-; SI-NEXT: v_or_b32_e32 v40, v1, v43
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v0
+; SI-NEXT: v_or_b32_e32 v59, v1, v24
; SI-NEXT: v_cvt_f32_f16_e32 v1, s72
-; SI-NEXT: v_or_b32_e32 v0, v3, v45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v3, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v0, s45
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v3, s61
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v41
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; SI-NEXT: v_cvt_f32_f16_e32 v3, s43
-; SI-NEXT: v_or_b32_e32 v46, v0, v1
+; SI-NEXT: v_or_b32_e32 v27, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s58
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v42
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s42
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v44, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v41
+; SI-NEXT: v_or_b32_e32 v25, v3, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s56
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v11
; SI-NEXT: v_or_b32_e32 v23, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s40
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s46
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v17, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s46
+; SI-NEXT: v_cvt_f16_f32_e32 v62, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v17
+; SI-NEXT: v_cvt_f16_f32_e32 v63, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v62
; SI-NEXT: v_cvt_f32_f16_e32 v3, s15
-; SI-NEXT: v_or_b32_e32 v8, v0, v1
+; SI-NEXT: v_or_b32_e32 v36, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s44
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, s14
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v18, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v14, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v63
+; SI-NEXT: v_or_b32_e32 v34, v3, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s41
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v18
-; SI-NEXT: v_or_b32_e32 v33, v1, v3
+; SI-NEXT: v_or_b32_e32 v21, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s13
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f32_f16_e32 v3, s12
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v37, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v19
; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
-; SI-NEXT: v_or_b32_e32 v10, v0, v1
+; SI-NEXT: v_or_b32_e32 v17, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s11
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, s27
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v38, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v12, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v37
+; SI-NEXT: v_or_b32_e32 v29, v3, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s10
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; SI-NEXT: v_or_b32_e32 v16, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; SI-NEXT: v_or_b32_e32 v32, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s25
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s9
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v48, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s9
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v46
; SI-NEXT: v_cvt_f32_f16_e32 v3, s23
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
-; SI-NEXT: v_or_b32_e32 v21, v0, v1
+; SI-NEXT: v_or_b32_e32 v15, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s8
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s21
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v59
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v50, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v49, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
-; SI-NEXT: v_or_b32_e32 v63, v3, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s7
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_or_b32_e32 v28, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v48
+; SI-NEXT: v_or_b32_e32 v13, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49
+; SI-NEXT: v_or_b32_e32 v10, v1, v3
+; SI-NEXT: v_lshr_b64 v[4:5], v[9:10], 16
+; SI-NEXT: v_lshr_b64 v[52:53], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[5:6], v[12:13], 16
+; SI-NEXT: v_mov_b32_e32 v53, v50
+; SI-NEXT: v_lshr_b64 v[50:51], v[28:29], 16
+; SI-NEXT: v_mov_b32_e32 v12, v38
+; SI-NEXT: v_lshr_b64 v[38:39], v[20:21], 16
+; SI-NEXT: v_mov_b32_e32 v20, v34
+; SI-NEXT: v_lshr_b64 v[33:34], v[33:34], 16
+; SI-NEXT: v_lshr_b64 v[54:55], v[14:15], 16
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v14, v37
+; SI-NEXT: v_mov_b32_e32 v39, v40
+; SI-NEXT: v_mov_b32_e32 v37, v30
+; SI-NEXT: v_lshr_b64 v[30:31], v[35:36], 16
+; SI-NEXT: v_lshr_b64 v[34:35], v[26:27], 16
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v26, v41
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s7
; SI-NEXT: v_cvt_f32_f16_e32 v1, s19
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s6
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
+; SI-NEXT: v_mov_b32_e32 v55, v49
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v42, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s6
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_mov_b32_e32 v9, v48
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v47
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[27:28], 16
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v42
; SI-NEXT: v_or_b32_e32 v3, v1, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
-; SI-NEXT: v_lshr_b64 v[5:6], v[62:63], 16
-; SI-NEXT: v_or_b32_e32 v30, v0, v1
-; SI-NEXT: v_lshr_b64 v[54:55], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v20, v33
-; SI-NEXT: v_lshr_b64 v[38:39], v[32:33], 16
-; SI-NEXT: v_lshr_b64 v[32:33], v[22:23], 16
-; SI-NEXT: v_lshr_b64 v[0:1], v[29:30], 16
-; SI-NEXT: v_mov_b32_e32 v6, v5
-; SI-NEXT: v_mov_b32_e32 v5, v30
-; SI-NEXT: v_mov_b32_e32 v33, v31
-; SI-NEXT: v_lshr_b64 v[30:31], v[43:44], 16
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v31, v40
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v44
+; SI-NEXT: v_or_b32_e32 v8, v0, v1
+; SI-NEXT: v_lshr_b64 v[0:1], v[7:8], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: v_mov_b32_e32 v55, v50
-; SI-NEXT: v_lshr_b64 v[52:53], v[15:16], 16
-; SI-NEXT: v_mov_b32_e32 v15, v48
-; SI-NEXT: v_lshr_b64 v[50:51], v[11:12], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[9:10], 16
-; SI-NEXT: v_mov_b32_e32 v53, v37
-; SI-NEXT: v_mov_b32_e32 v51, v34
-; SI-NEXT: v_mov_b32_e32 v49, v35
-; SI-NEXT: v_mov_b32_e32 v39, v36
-; SI-NEXT: v_lshr_b64 v[36:37], v[13:14], 16
-; SI-NEXT: v_lshr_b64 v[34:35], v[7:8], 16
-; SI-NEXT: v_mov_b32_e32 v27, v28
-; SI-NEXT: v_lshr_b64 v[28:29], v[45:46], 16
+; SI-NEXT: v_lshr_b64 v[48:49], v[16:17], 16
+; SI-NEXT: v_mov_b32_e32 v7, v42
+; SI-NEXT: v_mov_b32_e32 v49, v61
+; SI-NEXT: v_mov_b32_e32 v28, v43
+; SI-NEXT: v_lshr_b64 v[42:43], v[22:23], 16
+; SI-NEXT: v_mov_b32_e32 v22, v62
+; SI-NEXT: v_lshr_b64 v[61:62], v[24:25], 16
+; SI-NEXT: v_mov_b32_e32 v16, v19
; SI-NEXT: v_mov_b32_e32 v2, v1
-; SI-NEXT: v_mov_b32_e32 v25, v8
-; SI-NEXT: v_mov_b32_e32 v22, v17
-; SI-NEXT: v_mov_b32_e32 v37, v10
-; SI-NEXT: v_mov_b32_e32 v35, v14
-; SI-NEXT: v_mov_b32_e32 v13, v12
-; SI-NEXT: v_mov_b32_e32 v43, v19
+; SI-NEXT: v_mov_b32_e32 v6, v5
+; SI-NEXT: v_mov_b32_e32 v24, v11
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: v_mov_b32_e32 v0, s46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s11
; SI-NEXT: v_mov_b32_e32 v41, s72
-; SI-NEXT: v_mov_b32_e32 v42, s61
-; SI-NEXT: v_mov_b32_e32 v43, s58
+; SI-NEXT: v_mov_b32_e32 v26, s61
+; SI-NEXT: v_mov_b32_e32 v24, s58
; SI-NEXT: v_mov_b32_e32 v22, s56
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v63, s46
; SI-NEXT: v_mov_b32_e32 v18, s44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v15, s10
-; SI-NEXT: v_mov_b32_e32 v59, s9
+; SI-NEXT: v_mov_b32_e32 v16, s41
+; SI-NEXT: v_mov_b32_e32 v14, s12
+; SI-NEXT: v_mov_b32_e32 v12, s11
+; SI-NEXT: v_mov_b32_e32 v46, s10
+; SI-NEXT: v_mov_b32_e32 v9, s9
; SI-NEXT: v_mov_b32_e32 v55, s8
-; SI-NEXT: v_mov_b32_e32 v47, s7
-; SI-NEXT: v_mov_b32_e32 v26, s6
+; SI-NEXT: v_mov_b32_e32 v7, s7
+; SI-NEXT: v_mov_b32_e32 v44, s6
; SI-NEXT: v_mov_b32_e32 v40, s60
-; SI-NEXT: v_mov_b32_e32 v31, s62
-; SI-NEXT: v_mov_b32_e32 v33, s73
-; SI-NEXT: v_mov_b32_e32 v62, s76
-; SI-NEXT: v_mov_b32_e32 v24, s79
+; SI-NEXT: v_mov_b32_e32 v59, s62
+; SI-NEXT: v_mov_b32_e32 v57, s73
+; SI-NEXT: v_mov_b32_e32 v28, s76
+; SI-NEXT: v_mov_b32_e32 v37, s79
; SI-NEXT: v_mov_b32_e32 v39, s90
; SI-NEXT: v_mov_b32_e32 v49, s92
; SI-NEXT: v_mov_b32_e32 v51, s28
; SI-NEXT: v_mov_b32_e32 v53, s26
-; SI-NEXT: v_mov_b32_e32 v56, s24
-; SI-NEXT: v_mov_b32_e32 v57, s22
-; SI-NEXT: v_mov_b32_e32 v58, s20
-; SI-NEXT: v_mov_b32_e32 v60, s18
-; SI-NEXT: v_mov_b32_e32 v61, s16
-; SI-NEXT: v_mov_b32_e32 v5, s17
+; SI-NEXT: v_mov_b32_e32 v45, s24
+; SI-NEXT: v_mov_b32_e32 v47, s22
+; SI-NEXT: v_mov_b32_e32 v56, s20
+; SI-NEXT: v_mov_b32_e32 v58, s18
+; SI-NEXT: v_mov_b32_e32 v60, s16
+; SI-NEXT: v_mov_b32_e32 v8, s17
; SI-NEXT: v_mov_b32_e32 v3, s19
-; SI-NEXT: v_mov_b32_e32 v27, s21
-; SI-NEXT: v_mov_b32_e32 v63, s23
-; SI-NEXT: v_mov_b32_e32 v21, s25
-; SI-NEXT: v_mov_b32_e32 v16, s27
-; SI-NEXT: v_mov_b32_e32 v13, s29
-; SI-NEXT: v_mov_b32_e32 v37, s13
-; SI-NEXT: v_mov_b32_e32 v20, s14
-; SI-NEXT: v_mov_b32_e32 v35, s15
-; SI-NEXT: v_mov_b32_e32 v25, s40
+; SI-NEXT: v_mov_b32_e32 v10, s21
+; SI-NEXT: v_mov_b32_e32 v13, s23
+; SI-NEXT: v_mov_b32_e32 v15, s25
+; SI-NEXT: v_mov_b32_e32 v32, s27
+; SI-NEXT: v_mov_b32_e32 v29, s29
+; SI-NEXT: v_mov_b32_e32 v17, s13
+; SI-NEXT: v_mov_b32_e32 v21, s14
+; SI-NEXT: v_mov_b32_e32 v20, s15
+; SI-NEXT: v_mov_b32_e32 v36, s40
; SI-NEXT: v_mov_b32_e32 v23, s42
-; SI-NEXT: v_mov_b32_e32 v44, s43
-; SI-NEXT: v_mov_b32_e32 v46, s45
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v25, s43
+; SI-NEXT: v_mov_b32_e32 v27, s45
; SI-NEXT: v_mov_b32_e32 v0, s95
; SI-NEXT: v_mov_b32_e32 v2, s94
; SI-NEXT: v_mov_b32_e32 v4, s93
@@ -47206,102 +47219,97 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v50, s75
; SI-NEXT: v_mov_b32_e32 v48, s88
; SI-NEXT: v_mov_b32_e32 v38, s77
-; SI-NEXT: v_mov_b32_e32 v36, s74
-; SI-NEXT: v_mov_b32_e32 v34, s63
-; SI-NEXT: v_mov_b32_e32 v32, s59
-; SI-NEXT: v_mov_b32_e32 v30, s57
-; SI-NEXT: v_mov_b32_e32 v28, s47
+; SI-NEXT: v_mov_b32_e32 v33, s74
+; SI-NEXT: v_mov_b32_e32 v30, s63
+; SI-NEXT: v_mov_b32_e32 v42, s59
+; SI-NEXT: v_mov_b32_e32 v61, s57
+; SI-NEXT: v_mov_b32_e32 v34, s47
; SI-NEXT: .LBB59_6: ; %end
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v16
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v26
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v44
; SI-NEXT: v_or_b32_e32 v1, v1, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v58
; SI-NEXT: v_or_b32_e32 v2, v5, v2
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v7
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v58
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v27
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v55
; SI-NEXT: v_or_b32_e32 v5, v5, v19
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v57
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v63
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v59
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v47
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9
; SI-NEXT: v_or_b32_e32 v6, v19, v6
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v54
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v56
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v15
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v45
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v46
; SI-NEXT: v_or_b32_e32 v8, v19, v8
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v52
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v53
-; SI-NEXT: v_or_b32_e32 v10, v19, v10
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v50
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v37
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v34
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v33
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v43
-; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v31
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v41
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v32
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v10, v19, v10
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v50
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v29
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v12, v12, v19
; SI-NEXT: v_or_b32_e32 v13, v13, v14
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v49
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v48
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v17
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v14, v14, v19
; SI-NEXT: v_or_b32_e32 v15, v15, v16
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v39
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v38
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v16, v16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v36
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v33
; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v35
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v63
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v62
-; SI-NEXT: v_or_b32_e32 v20, v20, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v32
-; SI-NEXT: v_or_b32_e32 v22, v22, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v30
-; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v42
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v30
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v20, v20, v28
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v57
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: v_or_b32_e32 v22, v22, v28
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v59
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v61
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_or_b32_e32 v24, v24, v28
; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v40
-; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v46
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v34
+; SI-NEXT: v_or_b32_e32 v26, v26, v28
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v41
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -47318,6 +47326,7 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
index f1599aa141e9e..65144edbcf5dc 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
@@ -5749,6 +5749,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v22
+; SI-NEXT: v_mov_b32_e32 v48, v21
; SI-NEXT: v_mov_b32_e32 v49, v20
; SI-NEXT: v_mov_b32_e32 v50, v19
; SI-NEXT: v_mov_b32_e32 v51, v18
@@ -5789,10 +5791,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
@@ -5805,9 +5805,9 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
@@ -5816,17 +5816,17 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v61
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
@@ -5846,41 +5846,47 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
@@ -5891,19 +5897,15 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v48
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_or_b32_e32 v4, v4, v34
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v37
-; SI-NEXT: v_or_b32_e32 v8, v8, v33
-; SI-NEXT: v_or_b32_e32 v9, v9, v36
-; SI-NEXT: v_or_b32_e32 v10, v10, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v38
+; SI-NEXT: v_or_b32_e32 v1, v1, v62
+; SI-NEXT: v_or_b32_e32 v2, v2, v37
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v36
+; SI-NEXT: v_or_b32_e32 v5, v5, v63
+; SI-NEXT: v_or_b32_e32 v6, v6, v35
+; SI-NEXT: v_or_b32_e32 v7, v7, v32
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -5914,29 +5916,27 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -5961,7 +5961,15 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v48
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
@@ -5971,14 +5979,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -6066,18 +6068,22 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB14_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v60
@@ -6088,8 +6094,6 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v45
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -6099,19 +6103,15 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v48, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
-; SI-NEXT: v_or_b32_e32 v3, v39, v3
-; SI-NEXT: v_or_b32_e32 v4, v34, v4
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v37, v7
-; SI-NEXT: v_or_b32_e32 v8, v33, v8
-; SI-NEXT: v_or_b32_e32 v9, v36, v9
-; SI-NEXT: v_or_b32_e32 v10, v62, v10
+; SI-NEXT: v_or_b32_e32 v0, v38, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v1
+; SI-NEXT: v_or_b32_e32 v2, v37, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v36, v4
+; SI-NEXT: v_or_b32_e32 v5, v63, v5
+; SI-NEXT: v_or_b32_e32 v6, v35, v6
+; SI-NEXT: v_or_b32_e32 v7, v32, v7
+; SI-NEXT: v_or_b32_e32 v8, v34, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -6121,48 +6121,64 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v41
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v48
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -6173,25 +6189,7 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -6534,64 +6532,70 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -6599,19 +6603,16 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -6619,9 +6620,12 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -6636,15 +6640,18 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -6659,6 +6666,9 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -6682,39 +6692,27 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -6777,73 +6775,88 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB14_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -6859,30 +6872,18 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -10297,48 +10298,51 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v49, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v50, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v11
; SI-NEXT: v_mov_b32_e32 v43, v10
; SI-NEXT: v_mov_b32_e32 v44, v9
@@ -10352,23 +10356,22 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v60, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v60
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v61
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -10376,52 +10379,51 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB18_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v34
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -10434,30 +10436,30 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v40
@@ -10485,7 +10487,12 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
@@ -10493,8 +10500,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -10514,10 +10520,6 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
@@ -10613,8 +10615,8 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB18_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v49
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v62
; SI-NEXT: v_cvt_f32_f16_e32 v1, v61
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -10629,7 +10631,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v39
; SI-NEXT: v_cvt_f32_f16_e32 v3, v59
; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
@@ -10641,7 +10643,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v38
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v56
@@ -10652,7 +10654,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v46
@@ -10663,7 +10665,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v37
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v44
@@ -10674,7 +10676,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v63
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v42
@@ -10685,7 +10687,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v36
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v40
@@ -10696,7 +10698,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v54
@@ -10707,7 +10709,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v35
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_cvt_f32_f16_e32 v19, v52
@@ -10718,93 +10720,90 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v34
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v49
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v63
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
-; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
-; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -10812,9 +10811,9 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v19, v17
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -10831,31 +10830,36 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v22, v23, v22
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -11204,64 +11208,70 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -11269,19 +11279,16 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -11289,9 +11296,12 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -11306,15 +11316,18 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -11329,6 +11342,9 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -11352,39 +11368,27 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -11447,74 +11451,89 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB18_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -11530,30 +11549,18 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v28, v28, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -18185,6 +18192,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v22
+; SI-NEXT: v_mov_b32_e32 v48, v21
; SI-NEXT: v_mov_b32_e32 v49, v20
; SI-NEXT: v_mov_b32_e32 v50, v19
; SI-NEXT: v_mov_b32_e32 v51, v18
@@ -18225,10 +18234,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
@@ -18241,9 +18248,9 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
@@ -18252,17 +18259,17 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v61
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
@@ -18282,41 +18289,47 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
@@ -18327,19 +18340,15 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v48
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_or_b32_e32 v4, v4, v34
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v37
-; SI-NEXT: v_or_b32_e32 v8, v8, v33
-; SI-NEXT: v_or_b32_e32 v9, v9, v36
-; SI-NEXT: v_or_b32_e32 v10, v10, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v38
+; SI-NEXT: v_or_b32_e32 v1, v1, v62
+; SI-NEXT: v_or_b32_e32 v2, v2, v37
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v36
+; SI-NEXT: v_or_b32_e32 v5, v5, v63
+; SI-NEXT: v_or_b32_e32 v6, v6, v35
+; SI-NEXT: v_or_b32_e32 v7, v7, v32
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -18350,29 +18359,27 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -18397,7 +18404,15 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v48
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
@@ -18407,14 +18422,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -18502,18 +18511,22 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB30_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v60
@@ -18524,8 +18537,6 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v45
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -18535,19 +18546,15 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v48, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
-; SI-NEXT: v_or_b32_e32 v3, v39, v3
-; SI-NEXT: v_or_b32_e32 v4, v34, v4
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v37, v7
-; SI-NEXT: v_or_b32_e32 v8, v33, v8
-; SI-NEXT: v_or_b32_e32 v9, v36, v9
-; SI-NEXT: v_or_b32_e32 v10, v62, v10
+; SI-NEXT: v_or_b32_e32 v0, v38, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v1
+; SI-NEXT: v_or_b32_e32 v2, v37, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v36, v4
+; SI-NEXT: v_or_b32_e32 v5, v63, v5
+; SI-NEXT: v_or_b32_e32 v6, v35, v6
+; SI-NEXT: v_or_b32_e32 v7, v32, v7
+; SI-NEXT: v_or_b32_e32 v8, v34, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -18557,48 +18564,64 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v41
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v48
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -18609,25 +18632,7 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -18970,64 +18975,70 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -19035,19 +19046,16 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -19055,9 +19063,12 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -19072,15 +19083,18 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -19095,6 +19109,9 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -19118,39 +19135,27 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -19213,73 +19218,88 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB30_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -19295,30 +19315,18 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -23114,48 +23122,51 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v49, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v50, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v11
; SI-NEXT: v_mov_b32_e32 v43, v10
; SI-NEXT: v_mov_b32_e32 v44, v9
@@ -23169,23 +23180,22 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v60, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v60
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v61
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -23193,52 +23203,51 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB34_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v34
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -23251,30 +23260,30 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v40
@@ -23302,7 +23311,12 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
@@ -23310,8 +23324,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -23331,10 +23344,6 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
@@ -23430,8 +23439,8 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB34_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v49
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v62
; SI-NEXT: v_cvt_f32_f16_e32 v1, v61
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -23446,7 +23455,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v39
; SI-NEXT: v_cvt_f32_f16_e32 v3, v59
; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
@@ -23458,7 +23467,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v38
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v56
@@ -23469,7 +23478,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v46
@@ -23480,7 +23489,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v37
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v44
@@ -23491,7 +23500,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v63
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v42
@@ -23502,7 +23511,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v36
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v40
@@ -23513,7 +23522,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v54
@@ -23524,7 +23533,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v35
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_cvt_f32_f16_e32 v19, v52
@@ -23535,93 +23544,90 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v34
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v49
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v63
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
-; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
-; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -23629,9 +23635,9 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v19, v17
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -23648,31 +23654,36 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v22, v23, v22
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -24021,64 +24032,70 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -24086,19 +24103,16 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -24106,9 +24120,12 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -24123,15 +24140,18 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -24146,6 +24166,9 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -24169,39 +24192,27 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -24264,74 +24275,89 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB34_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -24347,30 +24373,18 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v28, v28, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -28005,10 +28019,8 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: v_writelane_b32 v30, s35, 1
; SI-NEXT: v_writelane_b32 v30, s36, 2
; SI-NEXT: v_writelane_b32 v30, s37, 3
-; SI-NEXT: v_writelane_b32 v30, s38, 4
-; SI-NEXT: v_writelane_b32 v30, s39, 5
-; SI-NEXT: v_writelane_b32 v30, s30, 6
-; SI-NEXT: v_writelane_b32 v30, s31, 7
+; SI-NEXT: v_writelane_b32 v30, s30, 4
+; SI-NEXT: v_writelane_b32 v30, s31, 5
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -28066,10 +28078,10 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -28079,15 +28091,15 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_branch .LBB41_3
; SI-NEXT: .LBB41_2:
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; kill: killed $sgpr45
-; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr92
@@ -28102,8 +28114,6 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
@@ -28120,11 +28130,13 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: .LBB41_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
; SI-NEXT: s_cselect_b32 s45, 1, 0
@@ -28133,17 +28145,17 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: v_readlane_b32 s31, v31, 1
; SI-NEXT: v_readlane_b32 s45, v31, 2
; SI-NEXT: v_readlane_b32 s47, v31, 3
-; SI-NEXT: v_readlane_b32 s57, v31, 4
-; SI-NEXT: v_readlane_b32 s34, v31, 5
-; SI-NEXT: v_readlane_b32 s35, v31, 6
-; SI-NEXT: v_readlane_b32 s59, v31, 7
-; SI-NEXT: v_readlane_b32 s36, v31, 8
-; SI-NEXT: v_readlane_b32 s61, v31, 9
-; SI-NEXT: v_readlane_b32 s37, v31, 10
-; SI-NEXT: v_readlane_b32 s63, v31, 11
-; SI-NEXT: v_readlane_b32 s38, v31, 12
-; SI-NEXT: v_readlane_b32 s73, v31, 13
-; SI-NEXT: v_readlane_b32 s39, v31, 14
+; SI-NEXT: v_readlane_b32 s59, v31, 4
+; SI-NEXT: v_readlane_b32 s61, v31, 5
+; SI-NEXT: v_readlane_b32 s57, v31, 6
+; SI-NEXT: v_readlane_b32 s34, v31, 7
+; SI-NEXT: v_readlane_b32 s63, v31, 8
+; SI-NEXT: v_readlane_b32 s35, v31, 9
+; SI-NEXT: v_readlane_b32 s73, v31, 10
+; SI-NEXT: v_readlane_b32 s36, v31, 11
+; SI-NEXT: v_readlane_b32 s75, v31, 12
+; SI-NEXT: v_readlane_b32 s37, v31, 13
+; SI-NEXT: v_readlane_b32 s77, v31, 14
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -28176,37 +28188,39 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s44, s43, 16
-; SI-NEXT: s_lshr_b32 s45, s27, 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s72, s9, 16
-; SI-NEXT: s_lshr_b32 s73, s11, 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_mov_b32 s59, s44
-; SI-NEXT: s_mov_b32 s61, s45
-; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s74, s13, 16
-; SI-NEXT: s_lshr_b32 s75, s23, 16
-; SI-NEXT: s_lshr_b32 s76, s19, 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s44, s41, 16
+; SI-NEXT: s_lshr_b32 s45, s29, 16
+; SI-NEXT: s_lshr_b32 s76, s21, 16
; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_mov_b32 s47, s73
-; SI-NEXT: s_mov_b32 s45, s72
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s78, s9, 16
+; SI-NEXT: s_lshr_b32 s79, s11, 16
+; SI-NEXT: s_lshr_b32 s88, s13, 16
+; SI-NEXT: s_lshr_b32 s89, s15, 16
+; SI-NEXT: s_lshr_b32 s90, s17, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_mov_b32 s57, s44
+; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_mov_b32 s63, s45
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
; SI-NEXT: s_lshr_b32 s30, s5, 16
; SI-NEXT: s_lshr_b32 s31, s7, 16
-; SI-NEXT: s_lshr_b32 s34, s15, 16
-; SI-NEXT: s_lshr_b32 s35, s41, 16
-; SI-NEXT: s_lshr_b32 s36, s29, 16
-; SI-NEXT: s_lshr_b32 s37, s25, 16
-; SI-NEXT: s_lshr_b32 s38, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s17, 16
-; SI-NEXT: s_mov_b32 s63, s75
-; SI-NEXT: s_mov_b32 s57, s74
-; SI-NEXT: s_mov_b32 s73, s76
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s34, s43, 16
+; SI-NEXT: s_lshr_b32 s35, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s23, 16
+; SI-NEXT: s_lshr_b32 s37, s19, 16
+; SI-NEXT: s_mov_b32 s77, s90
+; SI-NEXT: s_mov_b32 s61, s89
+; SI-NEXT: s_mov_b32 s59, s88
+; SI-NEXT: s_mov_b32 s47, s79
+; SI-NEXT: s_mov_b32 s45, s78
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -28214,17 +28228,35 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: .LBB41_5: ; %end
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s28, s28, s44
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s63, 16
+; SI-NEXT: s_or_b32 s29, s29, s44
+; SI-NEXT: s_and_b32 s42, s42, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s76, 16
+; SI-NEXT: s_or_b32 s42, s42, s44
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s34, 16
+; SI-NEXT: s_or_b32 s43, s43, s44
+; SI-NEXT: s_and_b32 s40, s40, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s74, 16
+; SI-NEXT: s_or_b32 s40, s40, s44
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s44
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s72, 16
; SI-NEXT: s_or_b32 s14, s14, s44
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s34, 16
+; SI-NEXT: s_lshl_b32 s44, s61, 16
; SI-NEXT: s_or_b32 s15, s15, s44
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s44, s62, 16
; SI-NEXT: s_or_b32 s12, s12, s44
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s57, 16
+; SI-NEXT: s_lshl_b32 s44, s59, 16
; SI-NEXT: s_or_b32 s13, s13, s44
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s44, s60, 16
@@ -28237,74 +28269,56 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s8, s8, s44
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s44, s45, 16
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s73, 16
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s63, 16
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
; SI-NEXT: s_or_b32 s9, s9, s44
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s44, s56, 16
-; SI-NEXT: s_lshl_b32 s75, vcc_lo, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s19, s19, s73
-; SI-NEXT: s_lshl_b32 s73, s92, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s63
-; SI-NEXT: s_lshl_b32 s63, s88, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s27, s27, s61
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s76, 16
-; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_or_b32 s17, s17, s77
+; SI-NEXT: s_lshl_b32 s77, s94, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_lshl_b32 s75, s90, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s6, s6, s44
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s44, s31, 16
-; SI-NEXT: s_or_b32 s16, s16, s75
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s75, s39, 16
-; SI-NEXT: s_or_b32 s20, s20, s73
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s38, 16
-; SI-NEXT: s_or_b32 s24, s24, s63
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s37, 16
-; SI-NEXT: s_or_b32 s28, s28, s61
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s36, 16
-; SI-NEXT: s_or_b32 s43, s43, s59
-; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s72, 16
+; SI-NEXT: s_or_b32 s18, s18, s77
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s37, 16
+; SI-NEXT: s_or_b32 s22, s22, s75
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s36, 16
+; SI-NEXT: s_or_b32 s25, s25, s73
+; SI-NEXT: s_lshl_b32 s73, s78, 16
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
; SI-NEXT: s_or_b32 s7, s7, s44
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s44, s46, 16
-; SI-NEXT: s_or_b32 s17, s17, s75
-; SI-NEXT: s_lshl_b32 s75, s94, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s21, s21, s73
-; SI-NEXT: s_lshl_b32 s73, s90, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s63
-; SI-NEXT: s_lshl_b32 s63, s78, 16
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_or_b32 s29, s29, s61
-; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s74, 16
-; SI-NEXT: s_or_b32 s40, s40, s59
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s35, 16
+; SI-NEXT: s_lshl_b32 s79, vcc_lo, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s77
+; SI-NEXT: s_lshl_b32 s77, s92, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s75
+; SI-NEXT: s_lshl_b32 s75, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s26, s26, s73
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s35, 16
; SI-NEXT: s_or_b32 s4, s4, s44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s44, s30, 16
-; SI-NEXT: s_or_b32 s18, s18, s75
-; SI-NEXT: s_or_b32 s22, s22, s73
-; SI-NEXT: s_or_b32 s26, s26, s63
-; SI-NEXT: s_or_b32 s42, s42, s61
-; SI-NEXT: s_or_b32 s41, s41, s59
+; SI-NEXT: s_or_b32 s16, s16, s79
+; SI-NEXT: s_or_b32 s20, s20, s77
+; SI-NEXT: s_or_b32 s24, s24, s75
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 6
+; SI-NEXT: v_readlane_b32 s30, v30, 4
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -28335,9 +28349,7 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: v_readlane_b32 s31, v30, 7
-; SI-NEXT: v_readlane_b32 s39, v30, 5
-; SI-NEXT: v_readlane_b32 s38, v30, 4
+; SI-NEXT: v_readlane_b32 s31, v30, 5
; SI-NEXT: v_readlane_b32 s37, v30, 3
; SI-NEXT: v_readlane_b32 s36, v30, 2
; SI-NEXT: v_readlane_b32 s35, v30, 1
@@ -29133,6 +29145,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v22
+; SI-NEXT: v_mov_b32_e32 v48, v21
; SI-NEXT: v_mov_b32_e32 v49, v20
; SI-NEXT: v_mov_b32_e32 v50, v19
; SI-NEXT: v_mov_b32_e32 v51, v18
@@ -29173,10 +29187,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
@@ -29189,9 +29201,9 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
@@ -29200,17 +29212,17 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v61
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
@@ -29230,41 +29242,47 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
@@ -29275,19 +29293,15 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v48
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_or_b32_e32 v4, v4, v34
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v37
-; SI-NEXT: v_or_b32_e32 v8, v8, v33
-; SI-NEXT: v_or_b32_e32 v9, v9, v36
-; SI-NEXT: v_or_b32_e32 v10, v10, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v38
+; SI-NEXT: v_or_b32_e32 v1, v1, v62
+; SI-NEXT: v_or_b32_e32 v2, v2, v37
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v36
+; SI-NEXT: v_or_b32_e32 v5, v5, v63
+; SI-NEXT: v_or_b32_e32 v6, v6, v35
+; SI-NEXT: v_or_b32_e32 v7, v7, v32
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -29298,29 +29312,27 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -29345,7 +29357,15 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v48
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
@@ -29355,14 +29375,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -29450,18 +29464,22 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB42_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v60
@@ -29472,8 +29490,6 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v45
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -29483,19 +29499,15 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v48, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
-; SI-NEXT: v_or_b32_e32 v3, v39, v3
-; SI-NEXT: v_or_b32_e32 v4, v34, v4
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v37, v7
-; SI-NEXT: v_or_b32_e32 v8, v33, v8
-; SI-NEXT: v_or_b32_e32 v9, v36, v9
-; SI-NEXT: v_or_b32_e32 v10, v62, v10
+; SI-NEXT: v_or_b32_e32 v0, v38, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v1
+; SI-NEXT: v_or_b32_e32 v2, v37, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v36, v4
+; SI-NEXT: v_or_b32_e32 v5, v63, v5
+; SI-NEXT: v_or_b32_e32 v6, v35, v6
+; SI-NEXT: v_or_b32_e32 v7, v32, v7
+; SI-NEXT: v_or_b32_e32 v8, v34, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -29505,48 +29517,64 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v41
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v48
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -29557,25 +29585,7 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -29918,64 +29928,70 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -29983,19 +29999,16 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -30003,9 +30016,12 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -30020,15 +30036,18 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -30043,6 +30062,9 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -30066,39 +30088,27 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -30161,73 +30171,88 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB42_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -30243,30 +30268,18 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -32587,10 +32600,8 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: v_writelane_b32 v30, s35, 1
; SI-NEXT: v_writelane_b32 v30, s36, 2
; SI-NEXT: v_writelane_b32 v30, s37, 3
-; SI-NEXT: v_writelane_b32 v30, s38, 4
-; SI-NEXT: v_writelane_b32 v30, s39, 5
-; SI-NEXT: v_writelane_b32 v30, s30, 6
-; SI-NEXT: v_writelane_b32 v30, s31, 7
+; SI-NEXT: v_writelane_b32 v30, s30, 4
+; SI-NEXT: v_writelane_b32 v30, s31, 5
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -32648,10 +32659,10 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -32661,15 +32672,15 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_branch .LBB45_3
; SI-NEXT: .LBB45_2:
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; kill: killed $sgpr45
-; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr92
@@ -32684,8 +32695,6 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
@@ -32702,11 +32711,13 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; kill: killed $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
; SI-NEXT: s_cselect_b32 s45, 1, 0
@@ -32715,17 +32726,17 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: v_readlane_b32 s31, v31, 1
; SI-NEXT: v_readlane_b32 s45, v31, 2
; SI-NEXT: v_readlane_b32 s47, v31, 3
-; SI-NEXT: v_readlane_b32 s57, v31, 4
-; SI-NEXT: v_readlane_b32 s34, v31, 5
-; SI-NEXT: v_readlane_b32 s35, v31, 6
-; SI-NEXT: v_readlane_b32 s59, v31, 7
-; SI-NEXT: v_readlane_b32 s36, v31, 8
-; SI-NEXT: v_readlane_b32 s61, v31, 9
-; SI-NEXT: v_readlane_b32 s37, v31, 10
-; SI-NEXT: v_readlane_b32 s63, v31, 11
-; SI-NEXT: v_readlane_b32 s38, v31, 12
-; SI-NEXT: v_readlane_b32 s73, v31, 13
-; SI-NEXT: v_readlane_b32 s39, v31, 14
+; SI-NEXT: v_readlane_b32 s59, v31, 4
+; SI-NEXT: v_readlane_b32 s61, v31, 5
+; SI-NEXT: v_readlane_b32 s57, v31, 6
+; SI-NEXT: v_readlane_b32 s34, v31, 7
+; SI-NEXT: v_readlane_b32 s63, v31, 8
+; SI-NEXT: v_readlane_b32 s35, v31, 9
+; SI-NEXT: v_readlane_b32 s73, v31, 10
+; SI-NEXT: v_readlane_b32 s36, v31, 11
+; SI-NEXT: v_readlane_b32 s75, v31, 12
+; SI-NEXT: v_readlane_b32 s37, v31, 13
+; SI-NEXT: v_readlane_b32 s77, v31, 14
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -32758,37 +32769,39 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s44, s43, 16
-; SI-NEXT: s_lshr_b32 s45, s27, 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
-; SI-NEXT: s_lshr_b32 s72, s9, 16
-; SI-NEXT: s_lshr_b32 s73, s11, 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_mov_b32 s59, s44
-; SI-NEXT: s_mov_b32 s61, s45
-; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s74, s13, 16
-; SI-NEXT: s_lshr_b32 s75, s23, 16
-; SI-NEXT: s_lshr_b32 s76, s19, 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s44, s41, 16
+; SI-NEXT: s_lshr_b32 s45, s29, 16
+; SI-NEXT: s_lshr_b32 s76, s21, 16
; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_mov_b32 s47, s73
-; SI-NEXT: s_mov_b32 s45, s72
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s78, s9, 16
+; SI-NEXT: s_lshr_b32 s79, s11, 16
+; SI-NEXT: s_lshr_b32 s88, s13, 16
+; SI-NEXT: s_lshr_b32 s89, s15, 16
+; SI-NEXT: s_lshr_b32 s90, s17, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_mov_b32 s57, s44
+; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_mov_b32 s63, s45
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
; SI-NEXT: s_lshr_b32 s30, s5, 16
; SI-NEXT: s_lshr_b32 s31, s7, 16
-; SI-NEXT: s_lshr_b32 s34, s15, 16
-; SI-NEXT: s_lshr_b32 s35, s41, 16
-; SI-NEXT: s_lshr_b32 s36, s29, 16
-; SI-NEXT: s_lshr_b32 s37, s25, 16
-; SI-NEXT: s_lshr_b32 s38, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s17, 16
-; SI-NEXT: s_mov_b32 s63, s75
-; SI-NEXT: s_mov_b32 s57, s74
-; SI-NEXT: s_mov_b32 s73, s76
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s34, s43, 16
+; SI-NEXT: s_lshr_b32 s35, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s23, 16
+; SI-NEXT: s_lshr_b32 s37, s19, 16
+; SI-NEXT: s_mov_b32 s77, s90
+; SI-NEXT: s_mov_b32 s61, s89
+; SI-NEXT: s_mov_b32 s59, s88
+; SI-NEXT: s_mov_b32 s47, s79
+; SI-NEXT: s_mov_b32 s45, s78
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -32796,17 +32809,35 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: .LBB45_5: ; %end
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s28, s28, s44
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s63, 16
+; SI-NEXT: s_or_b32 s29, s29, s44
+; SI-NEXT: s_and_b32 s42, s42, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s76, 16
+; SI-NEXT: s_or_b32 s42, s42, s44
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s34, 16
+; SI-NEXT: s_or_b32 s43, s43, s44
+; SI-NEXT: s_and_b32 s40, s40, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s74, 16
+; SI-NEXT: s_or_b32 s40, s40, s44
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s44
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s72, 16
; SI-NEXT: s_or_b32 s14, s14, s44
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s34, 16
+; SI-NEXT: s_lshl_b32 s44, s61, 16
; SI-NEXT: s_or_b32 s15, s15, s44
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s44, s62, 16
; SI-NEXT: s_or_b32 s12, s12, s44
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s57, 16
+; SI-NEXT: s_lshl_b32 s44, s59, 16
; SI-NEXT: s_or_b32 s13, s13, s44
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s44, s60, 16
@@ -32819,74 +32850,56 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_or_b32 s8, s8, s44
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s44, s45, 16
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s73, 16
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s63, 16
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
; SI-NEXT: s_or_b32 s9, s9, s44
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s44, s56, 16
-; SI-NEXT: s_lshl_b32 s75, vcc_lo, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s19, s19, s73
-; SI-NEXT: s_lshl_b32 s73, s92, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s63
-; SI-NEXT: s_lshl_b32 s63, s88, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s27, s27, s61
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s76, 16
-; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_or_b32 s17, s17, s77
+; SI-NEXT: s_lshl_b32 s77, s94, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_lshl_b32 s75, s90, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s6, s6, s44
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s44, s31, 16
-; SI-NEXT: s_or_b32 s16, s16, s75
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s75, s39, 16
-; SI-NEXT: s_or_b32 s20, s20, s73
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s73, s38, 16
-; SI-NEXT: s_or_b32 s24, s24, s63
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s63, s37, 16
-; SI-NEXT: s_or_b32 s28, s28, s61
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s36, 16
-; SI-NEXT: s_or_b32 s43, s43, s59
-; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s72, 16
+; SI-NEXT: s_or_b32 s18, s18, s77
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s37, 16
+; SI-NEXT: s_or_b32 s22, s22, s75
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s36, 16
+; SI-NEXT: s_or_b32 s25, s25, s73
+; SI-NEXT: s_lshl_b32 s73, s78, 16
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
; SI-NEXT: s_or_b32 s7, s7, s44
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s44, s46, 16
-; SI-NEXT: s_or_b32 s17, s17, s75
-; SI-NEXT: s_lshl_b32 s75, s94, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s21, s21, s73
-; SI-NEXT: s_lshl_b32 s73, s90, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s25, s25, s63
-; SI-NEXT: s_lshl_b32 s63, s78, 16
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_or_b32 s29, s29, s61
-; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s61, s74, 16
-; SI-NEXT: s_or_b32 s40, s40, s59
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s59, s35, 16
+; SI-NEXT: s_lshl_b32 s79, vcc_lo, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s77
+; SI-NEXT: s_lshl_b32 s77, s92, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s75
+; SI-NEXT: s_lshl_b32 s75, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s26, s26, s73
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s35, 16
; SI-NEXT: s_or_b32 s4, s4, s44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s44, s30, 16
-; SI-NEXT: s_or_b32 s18, s18, s75
-; SI-NEXT: s_or_b32 s22, s22, s73
-; SI-NEXT: s_or_b32 s26, s26, s63
-; SI-NEXT: s_or_b32 s42, s42, s61
-; SI-NEXT: s_or_b32 s41, s41, s59
+; SI-NEXT: s_or_b32 s16, s16, s79
+; SI-NEXT: s_or_b32 s20, s20, s77
+; SI-NEXT: s_or_b32 s24, s24, s75
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 6
+; SI-NEXT: v_readlane_b32 s30, v30, 4
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -32917,9 +32930,7 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: v_readlane_b32 s31, v30, 7
-; SI-NEXT: v_readlane_b32 s39, v30, 5
-; SI-NEXT: v_readlane_b32 s38, v30, 4
+; SI-NEXT: v_readlane_b32 s31, v30, 5
; SI-NEXT: v_readlane_b32 s37, v30, 3
; SI-NEXT: v_readlane_b32 s36, v30, 2
; SI-NEXT: v_readlane_b32 s35, v30, 1
@@ -33738,48 +33749,51 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v49, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v50, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v11
; SI-NEXT: v_mov_b32_e32 v43, v10
; SI-NEXT: v_mov_b32_e32 v44, v9
@@ -33793,23 +33807,22 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v60, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v60
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v61
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -33817,52 +33830,51 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB46_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v34
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -33875,30 +33887,30 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v40
@@ -33926,7 +33938,12 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
@@ -33934,8 +33951,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -33955,10 +33971,6 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
@@ -34054,8 +34066,8 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB46_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v49
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v62
; SI-NEXT: v_cvt_f32_f16_e32 v1, v61
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -34070,7 +34082,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v39
; SI-NEXT: v_cvt_f32_f16_e32 v3, v59
; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
@@ -34082,7 +34094,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v38
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v56
@@ -34093,7 +34105,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v46
@@ -34104,7 +34116,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v37
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v44
@@ -34115,7 +34127,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v63
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v42
@@ -34126,7 +34138,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v36
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v40
@@ -34137,7 +34149,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v54
@@ -34148,7 +34160,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v35
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_cvt_f32_f16_e32 v19, v52
@@ -34159,93 +34171,90 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v34
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v49
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v63
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
-; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
-; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -34253,9 +34262,9 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v19, v17
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -34272,31 +34281,36 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v22, v23, v22
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -34645,64 +34659,70 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -34710,19 +34730,16 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -34730,9 +34747,12 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -34747,15 +34767,18 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -34770,6 +34793,9 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -34793,39 +34819,27 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -34888,74 +34902,89 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB46_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -34971,30 +35000,18 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v28, v28, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -38719,6 +38736,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v39, v22
+; SI-NEXT: v_mov_b32_e32 v48, v21
; SI-NEXT: v_mov_b32_e32 v49, v20
; SI-NEXT: v_mov_b32_e32 v50, v19
; SI-NEXT: v_mov_b32_e32 v51, v18
@@ -38759,10 +38778,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v24
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v23
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v51
@@ -38775,9 +38792,9 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v46
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v57
@@ -38786,17 +38803,17 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v60
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v61
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v21
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
@@ -38816,41 +38833,47 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
@@ -38861,19 +38884,15 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: v_or_b32_e32 v1, v1, v48
-; SI-NEXT: v_or_b32_e32 v2, v2, v32
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_or_b32_e32 v4, v4, v34
-; SI-NEXT: v_or_b32_e32 v5, v5, v38
-; SI-NEXT: v_or_b32_e32 v6, v6, v63
-; SI-NEXT: v_or_b32_e32 v7, v7, v37
-; SI-NEXT: v_or_b32_e32 v8, v8, v33
-; SI-NEXT: v_or_b32_e32 v9, v9, v36
-; SI-NEXT: v_or_b32_e32 v10, v10, v62
+; SI-NEXT: v_or_b32_e32 v0, v0, v38
+; SI-NEXT: v_or_b32_e32 v1, v1, v62
+; SI-NEXT: v_or_b32_e32 v2, v2, v37
+; SI-NEXT: v_or_b32_e32 v3, v3, v33
+; SI-NEXT: v_or_b32_e32 v4, v4, v36
+; SI-NEXT: v_or_b32_e32 v5, v5, v63
+; SI-NEXT: v_or_b32_e32 v6, v6, v35
+; SI-NEXT: v_or_b32_e32 v7, v7, v32
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -38884,29 +38903,27 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
+; SI-NEXT: v_or_b32_e32 v10, v10, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v12, v12, v13
@@ -38931,7 +38948,15 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v48
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
@@ -38941,14 +38966,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -39036,18 +39055,22 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB50_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v60
@@ -39058,8 +39081,6 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v47
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v46
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v45
-; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v44
-; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -39069,19 +39090,15 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v0, v35, v0
-; SI-NEXT: v_or_b32_e32 v1, v48, v1
-; SI-NEXT: v_or_b32_e32 v2, v32, v2
-; SI-NEXT: v_or_b32_e32 v3, v39, v3
-; SI-NEXT: v_or_b32_e32 v4, v34, v4
-; SI-NEXT: v_or_b32_e32 v5, v38, v5
-; SI-NEXT: v_or_b32_e32 v6, v63, v6
-; SI-NEXT: v_or_b32_e32 v7, v37, v7
-; SI-NEXT: v_or_b32_e32 v8, v33, v8
-; SI-NEXT: v_or_b32_e32 v9, v36, v9
-; SI-NEXT: v_or_b32_e32 v10, v62, v10
+; SI-NEXT: v_or_b32_e32 v0, v38, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v1
+; SI-NEXT: v_or_b32_e32 v2, v37, v2
+; SI-NEXT: v_or_b32_e32 v3, v33, v3
+; SI-NEXT: v_or_b32_e32 v4, v36, v4
+; SI-NEXT: v_or_b32_e32 v5, v63, v5
+; SI-NEXT: v_or_b32_e32 v6, v35, v6
+; SI-NEXT: v_or_b32_e32 v7, v32, v7
+; SI-NEXT: v_or_b32_e32 v8, v34, v8
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v2
@@ -39091,48 +39108,64 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v8
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
-; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v43
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v41
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: s_waitcnt vmcnt(8)
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v55
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v54
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v53
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(13)
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v52
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(12)
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v51
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_or_b32_e32 v18, v19, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v50
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v49
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_or_b32_e32 v20, v21, v20
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v48
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_or_b32_e32 v21, v22, v21
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v39
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x30000, v13
@@ -39143,25 +39176,7 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v21
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v22, v23, v22
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23
@@ -39504,64 +39519,70 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -39569,19 +39590,16 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -39589,9 +39607,12 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -39606,15 +39627,18 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -39629,6 +39653,9 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -39652,39 +39679,27 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -39747,73 +39762,88 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB50_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
@@ -39829,30 +39859,18 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -43532,48 +43550,51 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v49, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT: v_mov_b32_e32 v50, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: v_mov_b32_e32 v51, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT: v_mov_b32_e32 v52, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_mov_b32_e32 v53, v16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: v_mov_b32_e32 v54, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT: v_mov_b32_e32 v55, v14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: v_mov_b32_e32 v40, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT: v_mov_b32_e32 v41, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT: v_mov_b32_e32 v42, v11
; SI-NEXT: v_mov_b32_e32 v43, v10
; SI-NEXT: v_mov_b32_e32 v44, v9
@@ -43587,23 +43608,22 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_mov_b32_e32 v60, v1
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v60
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v61
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -43611,52 +43631,51 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB54_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v34
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -43669,30 +43688,30 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v40
@@ -43720,7 +43739,12 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(10)
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v49
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
@@ -43728,8 +43752,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: s_waitcnt vmcnt(8)
@@ -43749,10 +43772,6 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
@@ -43848,8 +43867,8 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB54_4
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, v49
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v0, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v62
; SI-NEXT: v_cvt_f32_f16_e32 v1, v61
; SI-NEXT: v_cvt_f32_f16_e32 v3, v60
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
@@ -43864,7 +43883,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_or_b32_e32 v1, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v34
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v39
; SI-NEXT: v_cvt_f32_f16_e32 v3, v59
; SI-NEXT: v_cvt_f32_f16_e32 v4, v58
; SI-NEXT: v_cvt_f32_f16_e32 v5, v57
@@ -43876,7 +43895,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v38
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_cvt_f32_f16_e32 v6, v56
@@ -43887,7 +43906,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v33
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v8, v46
@@ -43898,7 +43917,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v5, v38
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v37
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v10, v44
@@ -43909,7 +43928,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v6, v63
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v12, v42
@@ -43920,7 +43939,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v7, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v7, v37
+; SI-NEXT: v_cvt_f32_f16_e32 v7, v36
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v40
@@ -43931,7 +43950,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, v36
+; SI-NEXT: v_cvt_f32_f16_e32 v8, v32
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v16, v54
@@ -43942,7 +43961,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v9, v32
+; SI-NEXT: v_cvt_f32_f16_e32 v9, v35
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_cvt_f32_f16_e32 v19, v52
@@ -43953,93 +43972,90 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v10, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, v34
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v49
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v11, v63
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
-; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
-; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v13, v12
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v15, v14
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -44047,9 +44063,9 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v19, v17
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -44066,31 +44082,36 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v20, v22, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v22, v23, v22
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
@@ -44439,64 +44460,70 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v61, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v36, v25
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; GFX9-NEXT: v_mov_b32_e32 v37, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; GFX9-NEXT: v_mov_b32_e32 v38, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT: v_mov_b32_e32 v39, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT: v_mov_b32_e32 v48, v21
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT: v_mov_b32_e32 v49, v20
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT: v_mov_b32_e32 v50, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT: v_mov_b32_e32 v51, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT: v_mov_b32_e32 v52, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT: v_mov_b32_e32 v53, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT: v_mov_b32_e32 v54, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT: v_mov_b32_e32 v55, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: v_mov_b32_e32 v40, v13
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: v_mov_b32_e32 v41, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT: v_mov_b32_e32 v42, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT: v_mov_b32_e32 v43, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT: v_mov_b32_e32 v44, v9
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT: v_mov_b32_e32 v45, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT: v_mov_b32_e32 v46, v7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT: v_mov_b32_e32 v47, v6
; GFX9-NEXT: v_mov_b32_e32 v56, v5
; GFX9-NEXT: v_mov_b32_e32 v57, v4
@@ -44504,19 +44531,16 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v59, v2
; GFX9-NEXT: v_mov_b32_e32 v60, v1
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v56
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v60
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v61
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v61
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -44524,9 +44548,12 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v42
@@ -44541,15 +44568,18 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v39
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v36
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
@@ -44564,6 +44594,9 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
@@ -44587,39 +44620,27 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr49
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
; GFX9-NEXT: ; implicit-def: $vgpr30
@@ -44682,74 +44703,89 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB54_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v38, v61, s6
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v35, v61, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v1, v37, v60, s6
-; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6
-; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6
-; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6
-; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6
-; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6
-; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6
-; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6
+; GFX9-NEXT: v_perm_b32 v1, v34, v60, s6
+; GFX9-NEXT: v_perm_b32 v2, v63, v59, s6
+; GFX9-NEXT: v_perm_b32 v3, v33, v58, s6
+; GFX9-NEXT: v_perm_b32 v4, v32, v57, s6
+; GFX9-NEXT: v_perm_b32 v5, v62, v56, s6
; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(21)
+; GFX9-NEXT: v_perm_b32 v6, v6, v47, s6
+; GFX9-NEXT: s_waitcnt vmcnt(20)
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s6
+; GFX9-NEXT: s_waitcnt vmcnt(19)
+; GFX9-NEXT: v_perm_b32 v8, v8, v45, s6
+; GFX9-NEXT: s_waitcnt vmcnt(18)
; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6
-; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: s_waitcnt vmcnt(17)
; GFX9-NEXT: v_perm_b32 v10, v10, v43, s6
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: s_waitcnt vmcnt(16)
; GFX9-NEXT: v_perm_b32 v11, v11, v42, s6
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_perm_b32 v12, v12, v41, s6
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: s_waitcnt vmcnt(14)
; GFX9-NEXT: v_perm_b32 v13, v13, v40, s6
-; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: s_waitcnt vmcnt(13)
; GFX9-NEXT: v_perm_b32 v14, v14, v55, s6
-; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_perm_b32 v15, v15, v54, s6
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: s_waitcnt vmcnt(11)
; GFX9-NEXT: v_perm_b32 v16, v16, v53, s6
-; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: s_waitcnt vmcnt(10)
; GFX9-NEXT: v_perm_b32 v17, v17, v52, s6
-; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: s_waitcnt vmcnt(9)
; GFX9-NEXT: v_perm_b32 v18, v18, v51, s6
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: s_waitcnt vmcnt(8)
; GFX9-NEXT: v_perm_b32 v19, v19, v50, s6
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: s_waitcnt vmcnt(7)
; GFX9-NEXT: v_perm_b32 v20, v20, v49, s6
-; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v48, s6
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: s_waitcnt vmcnt(5)
; GFX9-NEXT: v_perm_b32 v22, v22, v39, s6
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v23, v38, s6
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v24, v37, s6
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v36, s6
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
@@ -44765,30 +44801,18 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_pk_add_f16 v28, v28, s7 op_sel_hi:[1,0]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s6
@@ -46260,167 +46284,166 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v26
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v0
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v4
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v51
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v54
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v3
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v40
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v7
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v53
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v9
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v9
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v11
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v61
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v59
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v11
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v57
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v58
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v56
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v19
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v57
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v21
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v56
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v46
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v50
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v49
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v49
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v43
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v44
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v41
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v55
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v54
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v55
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr61
@@ -46433,118 +46456,113 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; kill: killed $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB56_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v54, v53
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v43
-; SI-NEXT: v_or_b32_e32 v45, v1, v48
+; SI-NEXT: v_or_b32_e32 v45, v1, v49
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v45, v53, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v1, v45, v52, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40
; SI-NEXT: v_or_b32_e32 v63, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v0, v0, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
-; SI-NEXT: v_mov_b32_e32 v53, v54
-; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v63, v3, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v63, v49, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v0, v0, v3
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53
+; SI-NEXT: v_or_b32_e32 v61, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v52
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v49
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4
-; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v61, v1, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_alignbit_b32 v1, v61, v5, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_or_b32_e32 v59, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v1, v59, v58, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v59, v1, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v59, v7, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v0, v0, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v0, v0, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v0, v0, v31
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v0, v0, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v0, v0, v33
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v0, v0, v34
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v0, v0, v35
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v0, v0, v36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v0, v0, v37
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v0, v0, v38
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24
+; SI-NEXT: v_or_b32_e32 v0, v0, v60
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v0, v0, v39
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v0, v0, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr14
@@ -46555,125 +46573,129 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_or_b32_e32 v57, v1, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_or_b32_e32 v57, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v57, v31, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v56, v1, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v56, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v56, v32, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v46, v1, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v46, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v46, v33, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v44, v1, v9
+; SI-NEXT: v_or_b32_e32 v44, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v44, v34, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
-; SI-NEXT: v_or_b32_e32 v42, v1, v49
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v42, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v42, v35, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v41, v1, v30
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v41, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v41, v36, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
-; SI-NEXT: v_or_b32_e32 v55, v1, v47
-; SI-NEXT: v_alignbit_b32 v1, v55, v60, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v55, v1, v3
+; SI-NEXT: v_alignbit_b32 v1, v55, v37, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v54, v1, v30
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: v_or_b32_e32 v9, v1, v58
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: v_alignbit_b32 v1, v9, v37, 16
+; SI-NEXT: v_alignbit_b32 v1, v54, v38, 16
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: v_or_b32_e32 v1, v1, v50
+; SI-NEXT: v_or_b32_e32 v3, v1, v47
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v1, v38, 16
+; SI-NEXT: v_alignbit_b32 v1, v3, v60, 16
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: v_or_b32_e32 v48, v1, v51
+; SI-NEXT: v_or_b32_e32 v51, v1, v48
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: v_alignbit_b32 v1, v48, v62, 16
+; SI-NEXT: v_alignbit_b32 v1, v51, v39, 16
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: v_or_b32_e32 v1, v1, v52
+; SI-NEXT: v_or_b32_e32 v1, v1, v50
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v1, v39, 16
+; SI-NEXT: v_alignbit_b32 v1, v1, v62, 16
; SI-NEXT: ; kill: killed $vgpr30
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v54, v9
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v52, v3
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; kill: killed $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: .LBB56_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB56_4
@@ -46682,61 +46704,48 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_or_b32_e32 v28, v39, v28
-; SI-NEXT: v_or_b32_e32 v26, v62, v26
-; SI-NEXT: v_add_i32_e32 v39, vcc, 0x30000, v28
+; SI-NEXT: v_or_b32_e32 v28, v62, v28
+; SI-NEXT: v_or_b32_e32 v26, v39, v26
+; SI-NEXT: v_add_i32_e32 v53, vcc, 0x30000, v28
; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v29
; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v26
; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24
-; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v26, v51, v26
-; SI-NEXT: v_or_b32_e32 v24, v38, v24
-; SI-NEXT: v_or_b32_e32 v22, v37, v22
-; SI-NEXT: v_add_i32_e32 v48, vcc, 0x30000, v26
+; SI-NEXT: v_or_b32_e32 v26, v48, v26
+; SI-NEXT: v_or_b32_e32 v24, v60, v24
+; SI-NEXT: v_add_i32_e32 v51, vcc, 0x30000, v26
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x30000, v24
; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x30000, v22
+; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: v_or_b32_e32 v24, v47, v24
+; SI-NEXT: v_or_b32_e32 v22, v38, v22
+; SI-NEXT: v_add_i32_e32 v52, vcc, 0x30000, v24
+; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v22, v58, v22
-; SI-NEXT: v_or_b32_e32 v20, v60, v20
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v22, v30, v22
+; SI-NEXT: v_or_b32_e32 v20, v37, v20
; SI-NEXT: v_add_i32_e32 v54, vcc, 0x30000, v22
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x30000, v20
; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v20, v47, v20
; SI-NEXT: v_or_b32_e32 v18, v36, v18
-; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v20
-; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v18, v30, v18
; SI-NEXT: v_or_b32_e32 v16, v35, v16
-; SI-NEXT: v_add_i32_e32 v41, vcc, 0x30000, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v16, v49, v16
; SI-NEXT: v_or_b32_e32 v14, v34, v14
-; SI-NEXT: v_add_i32_e32 v42, vcc, 0x30000, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v14
-; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v33, v12
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
@@ -46747,143 +46756,156 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v8, v31, v8
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_or_b32_e32 v6, v58, v6
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v24, v50, v24
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
-; SI-NEXT: v_add_i32_e32 v24, vcc, 0x30000, v24
-; SI-NEXT: v_or_b32_e32 v28, v52, v28
+; SI-NEXT: v_or_b32_e32 v28, v50, v28
; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v28
; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_add_i32_e32 v55, vcc, 0x30000, v20
+; SI-NEXT: v_add_i32_e32 v20, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v18, v19, v18
+; SI-NEXT: v_add_i32_e32 v41, vcc, 0x30000, v18
+; SI-NEXT: v_add_i32_e32 v18, vcc, 0x30000, v16
+; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v17, v16
+; SI-NEXT: v_add_i32_e32 v42, vcc, 0x30000, v16
+; SI-NEXT: v_add_i32_e32 v16, vcc, 0x30000, v14
+; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v14, v15, v14
; SI-NEXT: v_add_i32_e32 v44, vcc, 0x30000, v14
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_add_i32_e32 v46, vcc, 0x30000, v12
; SI-NEXT: v_add_i32_e32 v12, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_add_i32_e32 v56, vcc, 0x30000, v10
; SI-NEXT: v_add_i32_e32 v10, vcc, 0x30000, v8
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_add_i32_e32 v57, vcc, 0x30000, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
; SI-NEXT: v_add_i32_e32 v8, vcc, 0x30000, v6
; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_add_i32_e32 v59, vcc, 0x30000, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_add_i32_e32 v6, vcc, 0x30000, v4
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_add_i32_e32 v61, vcc, 0x30000, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v61
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v2, v4, v2
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x30000, v2
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_add_i32_e32 v63, vcc, 0x30000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v63
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_add_i32_e32 v2, vcc, 0x30000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v49, v0
; SI-NEXT: v_add_i32_e32 v45, vcc, 0x30000, v0
; SI-NEXT: v_alignbit_b32 v0, v45, v2, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v63, v4, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v61, v6, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v59, v8, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v57, v10, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v56, v12, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v46, v14, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v44, v16, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v42, v18, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v41, v20, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_alignbit_b32 v0, v55, v22, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v54, v25, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v54, v24, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v24, v26, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v52, v26, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v48, v29, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v51, v29, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v0, v28, v39, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v0, v28, v53, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
@@ -46911,26 +46933,27 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v61
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: .LBB56_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
@@ -46938,9 +46961,9 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v43
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v53
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
@@ -46949,21 +46972,21 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v45
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
@@ -47008,55 +47031,55 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v63
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v59
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v57
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v56
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v46
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_or_b32_e32 v14, v14, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v44
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_or_b32_e32 v16, v16, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_or_b32_e32 v18, v18, v19
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v41
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -47078,27 +47101,25 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v20, v20, v21
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_or_b32_e32 v22, v22, v23
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v54
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v52
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v48
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v51
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_or_b32_e32 v28, v28, v29
@@ -47747,49 +47768,48 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v30, s83, 25
; SI-NEXT: v_writelane_b32 v30, s84, 26
; SI-NEXT: v_writelane_b32 v30, s85, 27
-; SI-NEXT: v_writelane_b32 v30, s86, 28
-; SI-NEXT: v_writelane_b32 v30, s30, 29
-; SI-NEXT: v_writelane_b32 v30, s31, 30
+; SI-NEXT: v_writelane_b32 v30, s30, 28
+; SI-NEXT: v_writelane_b32 v30, s31, 29
+; SI-NEXT: s_lshr_b32 s6, s28, 16
; SI-NEXT: v_readfirstlane_b32 s65, v0
+; SI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s67, v2
; SI-NEXT: s_lshr_b32 s42, s65, 16
-; SI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v31, s6, 0
; SI-NEXT: v_readfirstlane_b32 s69, v4
; SI-NEXT: s_lshr_b32 s40, s67, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v31, s42, 0
+; SI-NEXT: v_writelane_b32 v31, s42, 1
; SI-NEXT: v_readfirstlane_b32 s71, v6
; SI-NEXT: s_lshr_b32 s14, s69, 16
-; SI-NEXT: v_writelane_b32 v31, s40, 1
+; SI-NEXT: v_writelane_b32 v31, s40, 2
; SI-NEXT: v_readfirstlane_b32 s81, v8
; SI-NEXT: s_lshr_b32 s12, s71, 16
-; SI-NEXT: v_writelane_b32 v31, s14, 2
-; SI-NEXT: v_readfirstlane_b32 s83, v10
+; SI-NEXT: v_writelane_b32 v31, s14, 3
; SI-NEXT: s_lshr_b32 s10, s81, 16
-; SI-NEXT: v_writelane_b32 v31, s12, 3
-; SI-NEXT: s_lshr_b32 s8, s83, 16
-; SI-NEXT: v_writelane_b32 v31, s10, 4
-; SI-NEXT: v_readfirstlane_b32 s85, v12
+; SI-NEXT: v_writelane_b32 v31, s12, 4
+; SI-NEXT: v_readfirstlane_b32 s83, v10
; SI-NEXT: v_readfirstlane_b32 s43, v1
-; SI-NEXT: v_writelane_b32 v31, s8, 5
-; SI-NEXT: s_lshr_b32 s6, s85, 16
+; SI-NEXT: v_writelane_b32 v31, s10, 5
+; SI-NEXT: v_readfirstlane_b32 s84, v12
+; SI-NEXT: s_lshr_b32 s8, s83, 16
; SI-NEXT: v_writelane_b32 v31, s43, 6
+; SI-NEXT: s_lshr_b32 s45, s84, 16
+; SI-NEXT: v_writelane_b32 v31, s8, 7
; SI-NEXT: v_readfirstlane_b32 s41, v3
-; SI-NEXT: v_writelane_b32 v31, s6, 7
+; SI-NEXT: v_writelane_b32 v31, s45, 8
; SI-NEXT: v_readfirstlane_b32 s15, v5
-; SI-NEXT: v_writelane_b32 v31, s41, 8
+; SI-NEXT: v_writelane_b32 v31, s41, 9
; SI-NEXT: v_readfirstlane_b32 s13, v7
-; SI-NEXT: v_writelane_b32 v31, s15, 9
+; SI-NEXT: v_writelane_b32 v31, s15, 10
; SI-NEXT: v_readfirstlane_b32 s11, v9
-; SI-NEXT: v_writelane_b32 v31, s13, 10
-; SI-NEXT: v_readfirstlane_b32 s9, v11
-; SI-NEXT: v_writelane_b32 v31, s11, 11
-; SI-NEXT: v_readfirstlane_b32 s74, v15
-; SI-NEXT: v_readfirstlane_b32 s86, v14
+; SI-NEXT: v_writelane_b32 v31, s13, 11
+; SI-NEXT: v_readfirstlane_b32 s76, v15
+; SI-NEXT: v_readfirstlane_b32 s85, v14
; SI-NEXT: v_readfirstlane_b32 s7, v13
-; SI-NEXT: v_writelane_b32 v31, s9, 12
+; SI-NEXT: v_readfirstlane_b32 s9, v11
+; SI-NEXT: v_writelane_b32 v31, s11, 12
; SI-NEXT: s_lshr_b32 s95, s29, 16
-; SI-NEXT: s_lshr_b32 s84, s28, 16
; SI-NEXT: s_lshr_b32 s93, s27, 16
; SI-NEXT: s_lshr_b32 s82, s26, 16
; SI-NEXT: s_lshr_b32 s91, s25, 16
@@ -47802,8 +47822,8 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s66, s18, 16
; SI-NEXT: s_lshr_b32 s75, s17, 16
; SI-NEXT: s_lshr_b32 s64, s16, 16
-; SI-NEXT: s_lshr_b32 s53, s74, 16
-; SI-NEXT: s_lshr_b32 s5, s86, 16
+; SI-NEXT: s_lshr_b32 s53, s76, 16
+; SI-NEXT: s_lshr_b32 s5, s85, 16
; SI-NEXT: s_lshr_b32 s51, s7, 16
; SI-NEXT: s_lshr_b32 s49, s9, 16
; SI-NEXT: s_lshr_b32 s39, s11, 16
@@ -47812,12 +47832,14 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s31, s41, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s43, 16
; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: v_writelane_b32 v31, s7, 13
+; SI-NEXT: v_writelane_b32 v31, s9, 13
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v31, s74, 14
-; SI-NEXT: v_writelane_b32 v31, s5, 15
+; SI-NEXT: v_writelane_b32 v31, s7, 14
+; SI-NEXT: v_writelane_b32 v31, s76, 15
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_lshl_b32 s44, s6, 16
+; SI-NEXT: s_lshl_b32 s6, s45, 16
; SI-NEXT: s_and_b32 s45, s17, 0xffff
; SI-NEXT: s_lshl_b32 s47, s75, 16
; SI-NEXT: s_or_b32 s73, s45, s47
@@ -47837,42 +47859,45 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s47, s93, 16
; SI-NEXT: s_or_b32 s47, s45, s47
; SI-NEXT: s_and_b32 s45, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s95, 16
-; SI-NEXT: s_or_b32 s45, s45, s76
+; SI-NEXT: s_lshl_b32 s74, s95, 16
+; SI-NEXT: s_or_b32 s45, s45, s74
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s76, vcc_hi, 16
-; SI-NEXT: s_or_b32 s43, s43, s76
+; SI-NEXT: s_lshl_b32 s74, vcc_hi, 16
+; SI-NEXT: s_or_b32 s43, s43, s74
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s31, 16
-; SI-NEXT: s_or_b32 s41, s41, s76
+; SI-NEXT: s_lshl_b32 s74, s31, 16
+; SI-NEXT: s_or_b32 s41, s41, s74
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s35, 16
-; SI-NEXT: s_or_b32 s15, s15, s76
+; SI-NEXT: s_lshl_b32 s74, s35, 16
+; SI-NEXT: s_or_b32 s15, s15, s74
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s37, 16
-; SI-NEXT: s_or_b32 s13, s13, s76
+; SI-NEXT: s_lshl_b32 s74, s37, 16
+; SI-NEXT: s_or_b32 s13, s13, s74
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s39, 16
-; SI-NEXT: s_or_b32 s11, s11, s76
+; SI-NEXT: s_lshl_b32 s74, s39, 16
+; SI-NEXT: s_or_b32 s11, s11, s74
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s49, 16
-; SI-NEXT: s_or_b32 s9, s9, s76
+; SI-NEXT: s_lshl_b32 s74, s49, 16
+; SI-NEXT: s_or_b32 s9, s9, s74
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s51, 16
+; SI-NEXT: s_lshl_b32 s74, s51, 16
; SI-NEXT: s_and_b32 s4, s16, 0xffff
; SI-NEXT: s_lshl_b32 s72, s64, 16
-; SI-NEXT: s_or_b32 s7, s7, s76
-; SI-NEXT: s_and_b32 s74, s74, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s74
+; SI-NEXT: s_and_b32 s74, s76, 0xffff
; SI-NEXT: s_lshl_b32 s76, s53, 16
; SI-NEXT: s_or_b32 s4, s4, s72
-; SI-NEXT: s_lshl_b32 s62, s66, 16
; SI-NEXT: s_mov_b32 s54, s53
; SI-NEXT: s_or_b32 s53, s74, s76
-; SI-NEXT: s_mov_b32 s76, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[72:73], 16
+; SI-NEXT: s_mov_b32 s74, s5
+; SI-NEXT: s_lshl_b32 s52, s5, 16
+; SI-NEXT: s_mov_b32 s5, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
+; SI-NEXT: v_writelane_b32 v31, s72, 16
+; SI-NEXT: s_lshl_b32 s62, s66, 16
+; SI-NEXT: v_writelane_b32 v31, s73, 17
; SI-NEXT: s_and_b32 s72, s18, 0xffff
; SI-NEXT: s_lshl_b32 s60, s68, 16
-; SI-NEXT: s_mov_b32 s75, s76
; SI-NEXT: s_or_b32 s72, s72, s62
; SI-NEXT: s_mov_b32 s78, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 16
@@ -47895,7 +47920,6 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s92, s91
; SI-NEXT: s_lshr_b64 s[90:91], s[56:57], 16
; SI-NEXT: s_and_b32 s56, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s84, 16
; SI-NEXT: s_mov_b32 s91, s92
; SI-NEXT: s_or_b32 s56, s56, s46
; SI-NEXT: s_mov_b32 s94, s93
@@ -47937,19 +47961,16 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_mov_b32 s48, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[10:11], 16
; SI-NEXT: s_and_b32 s10, s83, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_mov_b32 s39, s48
; SI-NEXT: s_or_b32 s10, s10, s8
; SI-NEXT: s_mov_b32 s50, s49
; SI-NEXT: s_lshr_b64 s[48:49], s[8:9], 16
-; SI-NEXT: s_and_b32 s8, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s52, s5, 16
+; SI-NEXT: s_and_b32 s8, s84, 0xffff
; SI-NEXT: s_mov_b32 s49, s50
; SI-NEXT: s_or_b32 s8, s8, s6
; SI-NEXT: s_mov_b32 s55, s51
; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16
-; SI-NEXT: s_and_b32 s6, s86, 0xffff
-; SI-NEXT: s_mov_b32 s5, s73
+; SI-NEXT: s_and_b32 s6, s85, 0xffff
; SI-NEXT: s_mov_b32 s73, s63
; SI-NEXT: s_mov_b32 s63, s61
; SI-NEXT: s_mov_b32 s61, s59
@@ -47971,9 +47992,12 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_mov_b64 s[54:55], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: s_mov_b32 s74, s5
; SI-NEXT: s_mov_b64 s[54:55], -1
+; SI-NEXT: v_writelane_b32 v31, s6, 16
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: v_writelane_b32 v31, s7, 17
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr62
@@ -48006,94 +48030,95 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_and_b64 s[54:55], s[54:55], exec
; SI-NEXT: s_cselect_b32 s54, 1, 0
; SI-NEXT: s_cmp_lg_u32 s54, 1
+; SI-NEXT: v_readlane_b32 s54, v31, 16
+; SI-NEXT: v_readlane_b32 s55, v31, 17
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s86, s86, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 15
-; SI-NEXT: s_and_b32 s5, s86, 0xffff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: s_add_i32 s85, s85, 3
+; SI-NEXT: s_and_b32 s4, s85, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s6, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 14
+; SI-NEXT: v_readlane_b32 s4, v31, 15
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s53, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s7, s4, 0x30000
-; SI-NEXT: s_add_i32 s85, s85, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 7
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
+; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: v_readlane_b32 s4, v31, 8
+; SI-NEXT: s_and_b32 s5, s84, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s8, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 13
+; SI-NEXT: v_readlane_b32 s4, v31, 14
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s51, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s9, s4, 0x30000
; SI-NEXT: s_add_i32 s83, s83, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 5
+; SI-NEXT: v_readlane_b32 s4, v31, 7
; SI-NEXT: s_and_b32 s5, s83, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s10, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 12
+; SI-NEXT: v_readlane_b32 s4, v31, 13
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s49, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s11, s4, 0x30000
; SI-NEXT: s_add_i32 s81, s81, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 4
+; SI-NEXT: v_readlane_b32 s4, v31, 5
; SI-NEXT: s_and_b32 s5, s81, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s12, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 11
+; SI-NEXT: v_readlane_b32 s4, v31, 12
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s13, s4, 0x30000
; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 3
+; SI-NEXT: v_readlane_b32 s4, v31, 4
; SI-NEXT: s_and_b32 s5, s71, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s14, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 10
+; SI-NEXT: v_readlane_b32 s4, v31, 11
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s15, s4, 0x30000
; SI-NEXT: s_add_i32 s69, s69, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 2
+; SI-NEXT: v_readlane_b32 s4, v31, 3
; SI-NEXT: s_and_b32 s5, s69, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s40, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 9
+; SI-NEXT: v_readlane_b32 s4, v31, 10
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_add_i32 s67, s67, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 1
+; SI-NEXT: v_readlane_b32 s4, v31, 2
; SI-NEXT: s_and_b32 s5, s67, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s42, s4, 0x30000
-; SI-NEXT: v_readlane_b32 s4, v31, 8
+; SI-NEXT: v_readlane_b32 s4, v31, 9
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_add_i32 s65, s65, 3
-; SI-NEXT: v_readlane_b32 s4, v31, 0
+; SI-NEXT: v_readlane_b32 s4, v31, 1
; SI-NEXT: s_and_b32 s5, s65, 0xffff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -48103,11 +48128,12 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: v_readlane_b32 s4, v31, 0
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
@@ -48174,7 +48200,6 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s5, s16, s5
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[60:61], 16
@@ -48189,6 +48214,7 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[48:49], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[52:53], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16
; SI-NEXT: s_lshr_b32 s75, s5, 16
; SI-NEXT: s_lshr_b32 s77, s73, 16
; SI-NEXT: s_lshr_b32 s79, s63, 16
@@ -48206,7 +48232,7 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s53, s7, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s74, 16
+; SI-NEXT: s_lshl_b32 s16, s54, 16
; SI-NEXT: s_or_b32 s4, s4, s16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s16, s75, 16
@@ -48295,7 +48321,7 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s44, s53, 16
; SI-NEXT: s_or_b32 s7, s7, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 29
+; SI-NEXT: v_readlane_b32 s30, v30, 28
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s16
@@ -48326,8 +48352,7 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v27, s9
; SI-NEXT: v_mov_b32_e32 v28, s6
; SI-NEXT: v_mov_b32_e32 v29, s7
-; SI-NEXT: v_readlane_b32 s31, v30, 30
-; SI-NEXT: v_readlane_b32 s86, v30, 28
+; SI-NEXT: v_readlane_b32 s31, v30, 29
; SI-NEXT: v_readlane_b32 s85, v30, 27
; SI-NEXT: v_readlane_b32 s84, v30, 26
; SI-NEXT: v_readlane_b32 s83, v30, 25
@@ -49460,29 +49485,34 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v21
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v20
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v18
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v18
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v16
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v2
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v1
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v0
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v60, v56
+; SI-NEXT: v_mov_b32_e32 v56, v35
+; SI-NEXT: v_mov_b32_e32 v35, v60
+; SI-NEXT: s_xor_b64 exec, exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB58_2
; SI-NEXT: ; %bb.1: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
@@ -49518,7 +49548,6 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v36, 0x38000000, v36
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v50, v50
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v31
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_cvt_f16_f32_e32 v36, v36
@@ -49549,7 +49578,7 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_add_f32_e32 v50, 0x38000000, v50
; SI-NEXT: v_cvt_f32_f16_e32 v7, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v40, v40
+; SI-NEXT: v_cvt_f32_f16_e32 v35, v35
; SI-NEXT: v_or_b32_e32 v23, v23, v60
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v36
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
@@ -49557,7 +49586,7 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v41, v41
+; SI-NEXT: v_cvt_f32_f16_e32 v57, v57
; SI-NEXT: v_or_b32_e32 v21, v21, v60
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v38
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
@@ -49565,7 +49594,7 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_add_f32_e32 v53, 0x38000000, v53
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v42, v42
+; SI-NEXT: v_cvt_f32_f16_e32 v58, v58
; SI-NEXT: v_or_b32_e32 v19, v19, v60
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v39
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -49574,15 +49603,15 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v55
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
-; SI-NEXT: v_cvt_f32_f16_e32 v58, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v57, v57
-; SI-NEXT: v_cvt_f32_f16_e32 v56, v56
; SI-NEXT: v_cvt_f32_f16_e32 v47, v47
; SI-NEXT: v_cvt_f32_f16_e32 v46, v46
-; SI-NEXT: v_cvt_f32_f16_e32 v35, v35
; SI-NEXT: v_cvt_f32_f16_e32 v45, v45
; SI-NEXT: v_cvt_f32_f16_e32 v44, v44
; SI-NEXT: v_cvt_f32_f16_e32 v43, v43
+; SI-NEXT: v_cvt_f32_f16_e32 v42, v42
+; SI-NEXT: v_cvt_f32_f16_e32 v41, v41
+; SI-NEXT: v_cvt_f32_f16_e32 v40, v40
+; SI-NEXT: v_cvt_f32_f16_e32 v56, v56
; SI-NEXT: v_cvt_f32_f16_e32 v54, v54
; SI-NEXT: v_cvt_f32_f16_e32 v51, v51
; SI-NEXT: v_cvt_f32_f16_e32 v48, v48
@@ -49593,7 +49622,7 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f16_f32_e32 v55, v55
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_add_f32_e32 v40, 0x38000000, v40
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
@@ -49612,30 +49641,30 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v15, v15, v60
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v50
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v40, v40
+; SI-NEXT: v_cvt_f16_f32_e32 v35, v35
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v41
+; SI-NEXT: v_add_f32_e32 v57, 0x38000000, v57
; SI-NEXT: v_or_b32_e32 v13, v13, v60
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v52
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
+; SI-NEXT: v_cvt_f16_f32_e32 v57, v57
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
+; SI-NEXT: v_add_f32_e32 v58, 0x38000000, v58
; SI-NEXT: v_or_b32_e32 v11, v11, v60
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v53
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
+; SI-NEXT: v_cvt_f16_f32_e32 v58, v58
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
-; SI-NEXT: v_add_f32_e32 v58, 0x38000000, v58
-; SI-NEXT: v_add_f32_e32 v57, 0x38000000, v57
-; SI-NEXT: v_add_f32_e32 v56, 0x38000000, v56
; SI-NEXT: v_add_f32_e32 v47, 0x38000000, v47
; SI-NEXT: v_add_f32_e32 v46, 0x38000000, v46
-; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
; SI-NEXT: v_add_f32_e32 v45, 0x38000000, v45
; SI-NEXT: v_add_f32_e32 v44, 0x38000000, v44
; SI-NEXT: v_add_f32_e32 v43, 0x38000000, v43
+; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
+; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v41
+; SI-NEXT: v_add_f32_e32 v40, 0x38000000, v40
+; SI-NEXT: v_add_f32_e32 v56, 0x38000000, v56
; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v54
; SI-NEXT: v_add_f32_e32 v51, 0x38000000, v51
; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v48
@@ -49646,23 +49675,23 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v58
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v57
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v46
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v56
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
-; SI-NEXT: v_cvt_f16_f32_e32 v46, v46
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
-; SI-NEXT: v_cvt_f16_f32_e32 v35, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
+; SI-NEXT: v_cvt_f16_f32_e32 v40, v40
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
-; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
+; SI-NEXT: v_cvt_f16_f32_e32 v56, v56
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v54, v54
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
@@ -49675,7 +49704,7 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v59, v59
; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT: v_or_b32_e32 v7, v7, v60
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v35
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -49692,50 +49721,50 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_or_b32_e32 v5, v5, v60
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v57
; SI-NEXT: v_or_b32_e32 v3, v3, v60
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v58
; SI-NEXT: v_or_b32_e32 v1, v1, v60
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v46
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v54
; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v59
; SI-NEXT: v_or_b32_e32 v0, v0, v30
-; SI-NEXT: v_or_b32_e32 v2, v2, v58
-; SI-NEXT: v_or_b32_e32 v4, v4, v57
-; SI-NEXT: v_or_b32_e32 v6, v6, v56
-; SI-NEXT: v_or_b32_e32 v8, v8, v47
-; SI-NEXT: v_or_b32_e32 v10, v10, v46
-; SI-NEXT: v_or_b32_e32 v12, v12, v35
-; SI-NEXT: v_or_b32_e32 v14, v14, v45
-; SI-NEXT: v_or_b32_e32 v16, v16, v44
-; SI-NEXT: v_or_b32_e32 v18, v18, v43
+; SI-NEXT: v_or_b32_e32 v2, v2, v47
+; SI-NEXT: v_or_b32_e32 v4, v4, v46
+; SI-NEXT: v_or_b32_e32 v6, v6, v45
+; SI-NEXT: v_or_b32_e32 v8, v8, v44
+; SI-NEXT: v_or_b32_e32 v10, v10, v43
+; SI-NEXT: v_or_b32_e32 v12, v12, v42
+; SI-NEXT: v_or_b32_e32 v14, v14, v41
+; SI-NEXT: v_or_b32_e32 v16, v16, v40
+; SI-NEXT: v_or_b32_e32 v18, v18, v56
; SI-NEXT: v_or_b32_e32 v20, v20, v54
; SI-NEXT: v_or_b32_e32 v22, v22, v51
; SI-NEXT: v_or_b32_e32 v24, v24, v48
; SI-NEXT: v_or_b32_e32 v26, v26, v37
; SI-NEXT: v_or_b32_e32 v28, v28, v59
; SI-NEXT: v_alignbit_b32 v30, v1, v30, 16
-; SI-NEXT: v_alignbit_b32 v58, v3, v58, 16
-; SI-NEXT: v_alignbit_b32 v57, v5, v57, 16
-; SI-NEXT: v_alignbit_b32 v56, v7, v56, 16
-; SI-NEXT: v_alignbit_b32 v47, v9, v47, 16
-; SI-NEXT: v_alignbit_b32 v46, v11, v46, 16
-; SI-NEXT: v_alignbit_b32 v35, v13, v35, 16
-; SI-NEXT: v_alignbit_b32 v45, v15, v45, 16
-; SI-NEXT: v_alignbit_b32 v44, v17, v44, 16
-; SI-NEXT: v_alignbit_b32 v43, v19, v43, 16
+; SI-NEXT: v_alignbit_b32 v47, v3, v47, 16
+; SI-NEXT: v_alignbit_b32 v46, v5, v46, 16
+; SI-NEXT: v_alignbit_b32 v45, v7, v45, 16
+; SI-NEXT: v_alignbit_b32 v44, v9, v44, 16
+; SI-NEXT: v_alignbit_b32 v43, v11, v43, 16
+; SI-NEXT: v_alignbit_b32 v42, v13, v42, 16
+; SI-NEXT: v_alignbit_b32 v41, v15, v41, 16
+; SI-NEXT: v_alignbit_b32 v40, v17, v40, 16
+; SI-NEXT: v_alignbit_b32 v56, v19, v56, 16
; SI-NEXT: v_alignbit_b32 v54, v21, v54, 16
; SI-NEXT: v_alignbit_b32 v51, v23, v51, 16
; SI-NEXT: v_alignbit_b32 v48, v25, v48, 16
@@ -49747,58 +49776,58 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_or_b32_e32 v0, v0, v30
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v58
; SI-NEXT: v_or_b32_e32 v1, v1, v30
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
; SI-NEXT: v_or_b32_e32 v2, v2, v30
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v57
; SI-NEXT: v_or_b32_e32 v3, v3, v30
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v46
; SI-NEXT: v_or_b32_e32 v4, v4, v30
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35
; SI-NEXT: v_or_b32_e32 v5, v5, v30
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45
; SI-NEXT: v_or_b32_e32 v6, v6, v30
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55
; SI-NEXT: v_or_b32_e32 v7, v7, v30
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v44
; SI-NEXT: v_or_b32_e32 v8, v8, v30
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v53
; SI-NEXT: v_or_b32_e32 v9, v9, v30
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
; SI-NEXT: v_or_b32_e32 v10, v10, v30
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52
; SI-NEXT: v_or_b32_e32 v11, v11, v30
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v42
; SI-NEXT: v_or_b32_e32 v12, v12, v30
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50
; SI-NEXT: v_or_b32_e32 v13, v13, v30
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v41
; SI-NEXT: v_or_b32_e32 v14, v14, v30
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT: v_or_b32_e32 v15, v15, v30
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v40
; SI-NEXT: v_or_b32_e32 v16, v16, v30
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v39
; SI-NEXT: v_or_b32_e32 v17, v17, v30
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v56
; SI-NEXT: v_or_b32_e32 v18, v18, v30
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v38
@@ -49828,7 +49857,6 @@ define <60 x i16> @bitcast_v60f16_to_v60i16(<60 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v32
; SI-NEXT: v_or_b32_e32 v27, v27, v30
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v59
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -50458,7 +50486,7 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -50542,371 +50570,342 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v2, s30
; SI-NEXT: v_cvt_f32_f16_e32 v3, s18
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v1, v1, v0
-; SI-NEXT: v_mov_b32_e32 v5, v0
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, vcc_hi
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_or_b32_e32 v60, v1, v5
; SI-NEXT: v_cvt_f16_f32_e32 v1, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s20
; SI-NEXT: v_cvt_f16_f32_e32 v3, v2
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s20
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s95
+; SI-NEXT: v_or_b32_e32 v59, v3, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v61, v3, v29
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v3, s22
-; SI-NEXT: v_or_b32_e32 v60, v1, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_or_b32_e32 v58, v1, v8
; SI-NEXT: v_cvt_f32_f16_e32 v1, s93
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s24
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s24
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_or_b32_e32 v20, v3, v8
+; SI-NEXT: v_or_b32_e32 v57, v3, v53
; SI-NEXT: v_cvt_f32_f16_e32 v3, s90
-; SI-NEXT: v_mov_b32_e32 v6, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s26
-; SI-NEXT: v_or_b32_e32 v48, v0, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s79
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_or_b32_e32 v56, v0, v15
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s79
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_mov_b32_e32 v7, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s28
-; SI-NEXT: v_or_b32_e32 v56, v1, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_or_b32_e32 v47, v1, v10
; SI-NEXT: v_cvt_f32_f16_e32 v1, s92
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v0, vcc_lo
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, vcc_lo
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_or_b32_e32 v45, v3, v12
+; SI-NEXT: v_or_b32_e32 v13, v3, v38
; SI-NEXT: v_cvt_f32_f16_e32 v3, s89
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s94
-; SI-NEXT: v_or_b32_e32 v0, v0, v21
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v44, v0, v48
; SI-NEXT: v_cvt_f32_f16_e32 v0, s78
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s91
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_or_b32_e32 v1, v1, v18
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v1, v1, v50
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, s76
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v0
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s88
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_or_b32_e32 v47, v3, v26
+; SI-NEXT: v_or_b32_e32 v40, v3, v18
; SI-NEXT: v_cvt_f32_f16_e32 v3, s72
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s77
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_or_b32_e32 v31, v0, v24
+; SI-NEXT: v_or_b32_e32 v34, v0, v31
; SI-NEXT: v_cvt_f32_f16_e32 v0, s62
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v17, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v12, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s60
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_mov_b32_e32 v9, v4
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v3
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v3
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v3, s74
; SI-NEXT: v_cvt_f32_f16_e32 v4, s58
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v0
-; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v3
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v0
+; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v4
; SI-NEXT: v_cvt_f32_f16_e32 v3, s73
; SI-NEXT: v_cvt_f16_f32_e32 v28, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s56
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s75
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v1
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s63
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v59, v0, v3
+; SI-NEXT: v_or_b32_e32 v27, v0, v3
; SI-NEXT: v_cvt_f32_f16_e32 v0, s46
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v3, s61
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v62, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7
; SI-NEXT: v_cvt_f32_f16_e32 v3, s44
-; SI-NEXT: v_or_b32_e32 v42, v0, v1
+; SI-NEXT: v_or_b32_e32 v25, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s59
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, s43
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v34, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10
-; SI-NEXT: v_or_b32_e32 v51, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v62
+; SI-NEXT: v_or_b32_e32 v42, v3, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s57
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
-; SI-NEXT: v_or_b32_e32 v25, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22
+; SI-NEXT: v_or_b32_e32 v32, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s42
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f32_f16_e32 v3, s47
-; SI-NEXT: v_cvt_f16_f32_e32 v40, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v49, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
+; SI-NEXT: v_cvt_f16_f32_e32 v21, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v20
; SI-NEXT: v_cvt_f32_f16_e32 v3, s41
-; SI-NEXT: v_or_b32_e32 v27, v0, v1
+; SI-NEXT: v_or_b32_e32 v19, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s45
; SI-NEXT: v_cvt_f32_f16_e32 v4, s40
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v10, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v6, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v49
-; SI-NEXT: v_or_b32_e32 v19, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v21
+; SI-NEXT: v_or_b32_e32 v51, v3, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s15
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; SI-NEXT: v_or_b32_e32 v22, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; SI-NEXT: v_or_b32_e32 v49, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s29
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s14
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v16, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s14
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f16_f32_e32 v6, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; SI-NEXT: v_cvt_f32_f16_e32 v3, s27
-; SI-NEXT: v_or_b32_e32 v13, v0, v1
+; SI-NEXT: v_or_b32_e32 v39, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s13
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, s25
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v14, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v52, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6
; SI-NEXT: v_or_b32_e32 v11, v3, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s12
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
-; SI-NEXT: v_or_b32_e32 v55, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v52
+; SI-NEXT: v_or_b32_e32 v16, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s23
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f32_f16_e32 v3, s11
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v0
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_mov_b32_e32 v54, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v4
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v10, v9
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v23
; SI-NEXT: v_cvt_f32_f16_e32 v3, s21
-; SI-NEXT: v_or_b32_e32 v9, v0, v1
+; SI-NEXT: v_or_b32_e32 v54, v0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s10
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, s19
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v46, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
-; SI-NEXT: v_or_b32_e32 v53, v3, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v43
+; SI-NEXT: v_or_b32_e32 v9, v3, v0
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v46
; SI-NEXT: v_cvt_f32_f16_e32 v4, s9
-; SI-NEXT: v_or_b32_e32 v30, v1, v0
+; SI-NEXT: v_or_b32_e32 v3, v1, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s17
; SI-NEXT: v_cvt_f32_f16_e32 v1, s6
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v61, v4
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v23
-; SI-NEXT: v_mov_b32_e32 v52, v6
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v61
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_or_b32_e32 v6, v0, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v30
; SI-NEXT: v_cvt_f32_f16_e32 v0, s8
-; SI-NEXT: v_or_b32_e32 v37, v1, v4
+; SI-NEXT: v_or_b32_e32 v29, v1, v4
; SI-NEXT: v_cvt_f32_f16_e32 v1, s7
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v15
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v14
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v28
-; SI-NEXT: v_or_b32_e32 v35, v4, v41
-; SI-NEXT: v_or_b32_e32 v33, v0, v58
-; SI-NEXT: v_or_b32_e32 v28, v1, v36
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_or_b32_e32 v35, v4, v24
+; SI-NEXT: v_or_b32_e32 v36, v0, v26
+; SI-NEXT: v_or_b32_e32 v45, v1, v28
; SI-NEXT: v_lshr_b64 v[0:1], v[5:6], 16
-; SI-NEXT: v_lshr_b64 v[4:5], v[52:53], 16
-; SI-NEXT: v_or_b32_e32 v38, v17, v50
-; SI-NEXT: v_mov_b32_e32 v57, v6
-; SI-NEXT: v_mov_b32_e32 v15, v9
-; SI-NEXT: v_lshr_b64 v[5:6], v[8:9], 16
-; SI-NEXT: v_lshr_b64 v[8:9], v[54:55], 16
-; SI-NEXT: v_mov_b32_e32 v17, v55
-; SI-NEXT: v_lshr_b64 v[54:55], v[12:13], 16
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v3, v2
-; SI-NEXT: v_lshr_b64 v[1:2], v[29:30], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v14, v30
-; SI-NEXT: v_mov_b32_e32 v12, v46
-; SI-NEXT: v_mov_b32_e32 v30, v56
-; SI-NEXT: v_mov_b32_e32 v56, v45
-; SI-NEXT: v_mov_b32_e32 v55, v48
-; SI-NEXT: v_lshr_b64 v[45:46], v[18:19], 16
-; SI-NEXT: v_lshr_b64 v[43:44], v[26:27], 16
-; SI-NEXT: v_mov_b32_e32 v18, v49
-; SI-NEXT: v_lshr_b64 v[48:49], v[50:51], 16
-; SI-NEXT: v_mov_b32_e32 v50, v34
-; SI-NEXT: v_mov_b32_e32 v26, v35
-; SI-NEXT: v_lshr_b64 v[34:35], v[58:59], 16
-; SI-NEXT: v_mov_b32_e32 v39, v53
-; SI-NEXT: v_lshr_b64 v[52:53], v[21:22], 16
-; SI-NEXT: v_lshr_b64 v[35:36], v[36:37], 16
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[4:5], v[8:9], 16
+; SI-NEXT: v_or_b32_e32 v37, v12, v41
+; SI-NEXT: v_mov_b32_e32 v12, v6
+; SI-NEXT: v_mov_b32_e32 v14, v54
+; SI-NEXT: v_lshr_b64 v[5:6], v[53:54], 16
+; SI-NEXT: v_lshr_b64 v[54:55], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v17, v9
+; SI-NEXT: v_mov_b32_e32 v33, v16
+; SI-NEXT: v_lshr_b64 v[8:9], v[15:16], 16
+; SI-NEXT: v_mov_b32_e32 v16, v39
+; SI-NEXT: v_mov_b32_e32 v15, v43
+; SI-NEXT: v_mov_b32_e32 v55, v52
+; SI-NEXT: v_mov_b32_e32 v43, v49
+; SI-NEXT: v_lshr_b64 v[52:53], v[48:49], 16
+; SI-NEXT: v_lshr_b64 v[48:49], v[18:19], 16
+; SI-NEXT: v_lshr_b64 v[38:39], v[31:32], 16
+; SI-NEXT: v_mov_b32_e32 v49, v40
+; SI-NEXT: v_lshr_b64 v[39:40], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v53, v44
+; SI-NEXT: v_mov_b32_e32 v44, v51
+; SI-NEXT: v_lshr_b64 v[50:51], v[50:51], 16
+; SI-NEXT: v_mov_b32_e32 v18, v21
+; SI-NEXT: v_mov_b32_e32 v21, v34
+; SI-NEXT: v_lshr_b64 v[40:41], v[24:25], 16
+; SI-NEXT: v_mov_b32_e32 v31, v35
+; SI-NEXT: v_lshr_b64 v[34:35], v[26:27], 16
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v41, v36
+; SI-NEXT: v_lshr_b64 v[35:36], v[28:29], 16
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
; SI-NEXT: v_lshr_b64 v[9:10], v[10:11], 16
-; SI-NEXT: v_mov_b32_e32 v21, v47
-; SI-NEXT: v_lshr_b64 v[46:47], v[24:25], 16
; SI-NEXT: v_mov_b32_e32 v2, v1
-; SI-NEXT: v_mov_b32_e32 v1, v42
-; SI-NEXT: v_lshr_b64 v[41:42], v[41:42], 16
-; SI-NEXT: v_mov_b32_e32 v44, v40
; SI-NEXT: v_mov_b32_e32 v6, v5
; SI-NEXT: v_mov_b32_e32 v10, v9
-; SI-NEXT: v_mov_b32_e32 v40, v59
-; SI-NEXT: v_mov_b32_e32 v32, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v24, v62
+; SI-NEXT: v_mov_b32_e32 v26, v7
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: v_mov_b32_e32 v0, s63
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s61
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v0, s15
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s12
-; SI-NEXT: v_mov_b32_e32 v1, s46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v32, s75
-; SI-NEXT: v_mov_b32_e32 v36, s73
-; SI-NEXT: v_mov_b32_e32 v50, s59
-; SI-NEXT: v_mov_b32_e32 v44, s57
+; SI-NEXT: v_mov_b32_e32 v0, s14
+; SI-NEXT: v_mov_b32_e32 v30, s75
+; SI-NEXT: v_mov_b32_e32 v28, s73
+; SI-NEXT: v_mov_b32_e32 v26, s63
+; SI-NEXT: v_mov_b32_e32 v24, s61
+; SI-NEXT: v_mov_b32_e32 v22, s59
+; SI-NEXT: v_mov_b32_e32 v20, s57
; SI-NEXT: v_mov_b32_e32 v18, s47
-; SI-NEXT: v_mov_b32_e32 v16, s15
-; SI-NEXT: v_mov_b32_e32 v7, s11
-; SI-NEXT: v_mov_b32_e32 v12, s10
-; SI-NEXT: v_mov_b32_e32 v23, s9
-; SI-NEXT: v_mov_b32_e32 v28, s7
-; SI-NEXT: v_mov_b32_e32 v33, s8
-; SI-NEXT: v_mov_b32_e32 v26, s74
-; SI-NEXT: v_mov_b32_e32 v38, s77
-; SI-NEXT: v_mov_b32_e32 v31, s88
-; SI-NEXT: v_mov_b32_e32 v21, s91
-; SI-NEXT: v_mov_b32_e32 v29, s94
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v55, s13
+; SI-NEXT: v_mov_b32_e32 v23, s12
+; SI-NEXT: v_mov_b32_e32 v15, s11
+; SI-NEXT: v_mov_b32_e32 v46, s10
+; SI-NEXT: v_mov_b32_e32 v61, s9
+; SI-NEXT: v_mov_b32_e32 v45, s7
+; SI-NEXT: v_mov_b32_e32 v41, s8
+; SI-NEXT: v_mov_b32_e32 v31, s74
+; SI-NEXT: v_mov_b32_e32 v37, s77
+; SI-NEXT: v_mov_b32_e32 v21, s88
+; SI-NEXT: v_mov_b32_e32 v49, s91
+; SI-NEXT: v_mov_b32_e32 v51, s94
; SI-NEXT: v_mov_b32_e32 v53, vcc_lo
-; SI-NEXT: v_mov_b32_e32 v56, s28
-; SI-NEXT: v_mov_b32_e32 v30, s26
-; SI-NEXT: v_mov_b32_e32 v55, s24
-; SI-NEXT: v_mov_b32_e32 v20, s22
-; SI-NEXT: v_mov_b32_e32 v60, s20
-; SI-NEXT: v_mov_b32_e32 v61, s18
-; SI-NEXT: v_mov_b32_e32 v62, s16
-; SI-NEXT: v_mov_b32_e32 v57, s17
-; SI-NEXT: v_mov_b32_e32 v14, s19
-; SI-NEXT: v_mov_b32_e32 v39, s21
-; SI-NEXT: v_mov_b32_e32 v15, s23
-; SI-NEXT: v_mov_b32_e32 v17, s25
+; SI-NEXT: v_mov_b32_e32 v13, s28
+; SI-NEXT: v_mov_b32_e32 v47, s26
+; SI-NEXT: v_mov_b32_e32 v56, s24
+; SI-NEXT: v_mov_b32_e32 v57, s22
+; SI-NEXT: v_mov_b32_e32 v58, s20
+; SI-NEXT: v_mov_b32_e32 v59, s18
+; SI-NEXT: v_mov_b32_e32 v60, s16
+; SI-NEXT: v_mov_b32_e32 v12, s17
+; SI-NEXT: v_mov_b32_e32 v3, s19
+; SI-NEXT: v_mov_b32_e32 v17, s21
+; SI-NEXT: v_mov_b32_e32 v14, s23
+; SI-NEXT: v_mov_b32_e32 v33, s25
; SI-NEXT: v_mov_b32_e32 v11, s27
-; SI-NEXT: v_mov_b32_e32 v13, s29
-; SI-NEXT: v_mov_b32_e32 v22, s40
-; SI-NEXT: v_mov_b32_e32 v19, s41
-; SI-NEXT: v_mov_b32_e32 v27, s42
-; SI-NEXT: v_mov_b32_e32 v25, s43
-; SI-NEXT: v_mov_b32_e32 v51, s44
-; SI-NEXT: v_mov_b32_e32 v40, s56
-; SI-NEXT: v_mov_b32_e32 v37, s6
-; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v16, s29
+; SI-NEXT: v_mov_b32_e32 v43, s40
+; SI-NEXT: v_mov_b32_e32 v44, s41
+; SI-NEXT: v_mov_b32_e32 v19, s42
+; SI-NEXT: v_mov_b32_e32 v32, s43
+; SI-NEXT: v_mov_b32_e32 v42, s44
+; SI-NEXT: v_mov_b32_e32 v25, s46
+; SI-NEXT: v_mov_b32_e32 v27, s56
+; SI-NEXT: v_mov_b32_e32 v29, s6
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s31
; SI-NEXT: v_mov_b32_e32 v2, s30
; SI-NEXT: v_mov_b32_e32 v4, vcc_hi
@@ -50915,122 +50914,108 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v10, s90
; SI-NEXT: v_mov_b32_e32 v54, s79
; SI-NEXT: v_mov_b32_e32 v52, s92
-; SI-NEXT: v_mov_b32_e32 v45, s89
-; SI-NEXT: v_mov_b32_e32 v43, s78
-; SI-NEXT: v_mov_b32_e32 v46, s76
-; SI-NEXT: v_mov_b32_e32 v48, s72
-; SI-NEXT: v_mov_b32_e32 v41, s62
+; SI-NEXT: v_mov_b32_e32 v50, s89
+; SI-NEXT: v_mov_b32_e32 v48, s78
+; SI-NEXT: v_mov_b32_e32 v38, s76
+; SI-NEXT: v_mov_b32_e32 v39, s72
+; SI-NEXT: v_mov_b32_e32 v40, s62
; SI-NEXT: v_mov_b32_e32 v34, s60
; SI-NEXT: v_mov_b32_e32 v35, s58
; SI-NEXT: .LBB59_6: ; %end
-; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v62
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v23
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v61
; SI-NEXT: v_or_b32_e32 v1, v1, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v61
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v59
; SI-NEXT: v_or_b32_e32 v2, v5, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v46
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v58
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v39
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v7
-; SI-NEXT: v_or_b32_e32 v5, v5, v9
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v17
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v15
+; SI-NEXT: v_or_b32_e32 v5, v5, v7
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v6, v9, v6
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v57
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v23
+; SI-NEXT: v_or_b32_e32 v7, v7, v9
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v56
+; SI-NEXT: v_or_b32_e32 v8, v9, v8
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v55
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v9, v9, v23
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v47
+; SI-NEXT: v_or_b32_e32 v10, v23, v10
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v52
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v22
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v44
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v44
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v46
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v25
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v38
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v49
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v41
+; SI-NEXT: v_or_b32_e32 v27, v27, v28
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v45
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_readlane_b32 s30, v63, 0
+; SI-NEXT: v_or_b32_e32 v29, v29, v30
; SI-NEXT: v_readlane_b32 s31, v63, 1
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v7, v7, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v9, v9, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v30
-; SI-NEXT: v_or_b32_e32 v10, v17, v10
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35
-; SI-NEXT: v_or_b32_e32 v28, v28, v30
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v32
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v37
-; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v54
-; SI-NEXT: v_or_b32_e32 v12, v17, v12
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v53
-; SI-NEXT: v_or_b32_e32 v14, v17, v14
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v45
-; SI-NEXT: v_or_b32_e32 v16, v16, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v19
-; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v43
-; SI-NEXT: v_or_b32_e32 v18, v18, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v27
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v31
-; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v50
-; SI-NEXT: v_or_b32_e32 v20, v20, v23
-; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v38
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v12, v23, v12
+; SI-NEXT: v_or_b32_e32 v13, v13, v14
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v52
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v53
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v14, v23, v14
+; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v51
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v50
+; SI-NEXT: v_or_b32_e32 v16, v16, v23
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v48
+; SI-NEXT: v_or_b32_e32 v18, v18, v23
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v39
; SI-NEXT: v_or_b32_e32 v22, v22, v23
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v51
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v42
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v41
-; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v34
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v36
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v33
-; SI-NEXT: v_or_b32_e32 v26, v26, v27
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v40
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -51046,9 +51031,13 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v27, v27, v31
+; SI-NEXT: v_or_b32_e32 v24, v24, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v34
+; SI-NEXT: v_or_b32_e32 v26, v26, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v35
+; SI-NEXT: v_or_b32_e32 v28, v28, v31
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
index 5d3e4ebc62c21..4b6abb0dd6c94 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
@@ -7076,16 +7076,16 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) #0 {
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v11
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr13
-; SI-NEXT: ; implicit-def: $vgpr15
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB36_2
@@ -7096,20 +7096,20 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v3, v1, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v5, v12, v0
+; SI-NEXT: v_or_b32_e32 v5, v13, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v17
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v11, v14, v0
+; SI-NEXT: v_or_b32_e32 v11, v15, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v9
-; SI-NEXT: v_or_b32_e32 v13, v1, v0
+; SI-NEXT: v_or_b32_e32 v12, v1, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v15, v16, v0
+; SI-NEXT: v_or_b32_e32 v14, v16, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
@@ -7118,9 +7118,9 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: .LBB36_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -7155,9 +7155,9 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v14, v4
+; SI-NEXT: v_or_b32_e32 v4, v15, v4
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v12, v1
+; SI-NEXT: v_or_b32_e32 v1, v13, v1
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_add_i32_e32 v4, vcc, 0x3000000, v3
@@ -7166,8 +7166,8 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v4
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v8
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v8
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v8
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v8
; SI-NEXT: .LBB36_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
@@ -7178,9 +7178,9 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v7
; SI-NEXT: v_alignbit_b32 v1, v1, v2, 16
-; SI-NEXT: v_mul_f32_e32 v2, 1.0, v15
+; SI-NEXT: v_mul_f32_e32 v2, 1.0, v14
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_mul_f32_e32 v3, 1.0, v13
+; SI-NEXT: v_mul_f32_e32 v3, 1.0, v12
; SI-NEXT: v_alignbit_b32 v2, v2, v3, 16
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -8943,17 +8943,17 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12
; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v11
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB40_2
@@ -8963,7 +8963,7 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v15
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v4, v13, v3
+; SI-NEXT: v_or_b32_e32 v4, v14, v3
; SI-NEXT: v_or_b32_e32 v3, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -8971,17 +8971,17 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v0, v0, v17
; SI-NEXT: v_or_b32_e32 v1, v16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_alignbit_b32 v7, v3, v1, 16
+; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
; SI-NEXT: v_or_b32_e32 v1, v0, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v0, v0, v9
+; SI-NEXT: v_or_b32_e32 v0, v0, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v5, v2
-; SI-NEXT: v_or_b32_e32 v11, v0, v2
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v7, v2
+; SI-NEXT: v_or_b32_e32 v9, v0, v2
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v2
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -8989,11 +8989,11 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: .LBB40_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB40_4
@@ -9018,33 +9018,33 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v13, v2
+; SI-NEXT: v_or_b32_e32 v2, v14, v2
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v0, v9, v0
+; SI-NEXT: v_or_b32_e32 v0, v12, v0
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v5, v2
+; SI-NEXT: v_or_b32_e32 v2, v7, v2
; SI-NEXT: v_or_b32_e32 v0, v2, v0
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v7, v3, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v11
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v0
+; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v9
; SI-NEXT: .LBB40_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v13
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -10347,17 +10347,17 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12
; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v11
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB44_2
@@ -10367,7 +10367,7 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v15
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v4, v13, v3
+; SI-NEXT: v_or_b32_e32 v4, v14, v3
; SI-NEXT: v_or_b32_e32 v3, v1, v4
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
@@ -10375,17 +10375,17 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v0, v0, v17
; SI-NEXT: v_or_b32_e32 v1, v16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_alignbit_b32 v7, v3, v1, 16
+; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
; SI-NEXT: v_or_b32_e32 v1, v0, v1
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v0, v0, v9
+; SI-NEXT: v_or_b32_e32 v0, v0, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v5, v2
-; SI-NEXT: v_or_b32_e32 v11, v0, v2
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v7, v2
+; SI-NEXT: v_or_b32_e32 v9, v0, v2
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v2
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr4
@@ -10393,11 +10393,11 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: .LBB44_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB44_4
@@ -10422,33 +10422,33 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v13, v2
+; SI-NEXT: v_or_b32_e32 v2, v14, v2
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_add_i32_e32 v3, vcc, 0x3000000, v0
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v8
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v10
-; SI-NEXT: v_or_b32_e32 v0, v9, v0
+; SI-NEXT: v_or_b32_e32 v0, v12, v0
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v2, v5, v2
+; SI-NEXT: v_or_b32_e32 v2, v7, v2
; SI-NEXT: v_or_b32_e32 v0, v2, v0
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0
-; SI-NEXT: v_alignbit_b32 v7, v3, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v11
+; SI-NEXT: v_add_i32_e32 v9, vcc, 0x3000000, v0
+; SI-NEXT: v_alignbit_b32 v5, v3, v1, 16
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v9
; SI-NEXT: .LBB44_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v13
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -11428,12 +11428,12 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s14, s18, 16
; SI-NEXT: s_lshr_b32 s15, s17, 16
-; SI-NEXT: s_lshr_b32 s20, s16, 16
+; SI-NEXT: s_lshr_b32 s21, s16, 16
; SI-NEXT: s_cmp_lg_u32 s19, 0
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s20, 16
+; SI-NEXT: s_lshl_b32 s5, s21, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s17, 0xffff
; SI-NEXT: s_lshl_b32 s6, s15, 16
@@ -11445,7 +11445,7 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
; SI-NEXT: s_or_b32 s19, s9, s11
; SI-NEXT: s_lshr_b32 s7, s5, 8
-; SI-NEXT: s_lshr_b32 s21, s19, 8
+; SI-NEXT: s_lshr_b32 s20, s19, 8
; SI-NEXT: s_bfe_u32 s9, s15, 0x80008
; SI-NEXT: s_bfe_u32 s11, s14, 0x80008
; SI-NEXT: s_mov_b64 s[12:13], 0
@@ -11459,7 +11459,7 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: ; implicit-def: $sgpr19
-; SI-NEXT: ; implicit-def: $sgpr21
+; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: .LBB47_3: ; %Flow
; SI-NEXT: s_and_b64 s[12:13], s[12:13], exec
@@ -11469,7 +11469,7 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s20, 16
+; SI-NEXT: s_lshl_b32 s5, s21, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s17, 0xffff
@@ -11490,7 +11490,7 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; SI-NEXT: s_lshr_b32 s7, s5, 8
; SI-NEXT: s_lshr_b32 s11, s19, 24
; SI-NEXT: s_lshr_b32 s14, s19, 16
-; SI-NEXT: s_lshr_b32 s21, s19, 8
+; SI-NEXT: s_lshr_b32 s20, s19, 8
; SI-NEXT: .LBB47_5: ; %end
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s10
@@ -11501,7 +11501,7 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; SI-NEXT: v_mov_b32_e32 v6, s15
; SI-NEXT: v_mov_b32_e32 v7, s9
; SI-NEXT: v_mov_b32_e32 v8, s19
-; SI-NEXT: v_mov_b32_e32 v9, s21
+; SI-NEXT: v_mov_b32_e32 v9, s20
; SI-NEXT: v_mov_b32_e32 v10, s14
; SI-NEXT: v_mov_b32_e32 v11, s11
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -12103,19 +12103,19 @@ define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s8
; SI-NEXT: v_mul_f32_e64 v14, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v5, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s9
; SI-NEXT: v_mul_f32_e64 v15, 1.0, s4
; SI-NEXT: v_mul_f32_e64 v3, 1.0, s5
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v14
; SI-NEXT: v_lshr_b64 v[1:2], v[5:6], 16
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v16
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v15
; SI-NEXT: v_lshr_b64 v[12:13], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[7:8], v[9:10], 16
-; SI-NEXT: v_lshr_b64 v[10:11], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[8:9], v[3:4], 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB49_3
; SI-NEXT: .LBB49_2:
@@ -12123,7 +12123,7 @@ define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -12131,10 +12131,10 @@ define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v9
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v10
; SI-NEXT: v_lshr_b64 v[7:8], v[0:1], 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v3
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v0
@@ -12147,8 +12147,8 @@ define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; SI-NEXT: v_lshr_b64 v[1:2], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v9
-; SI-NEXT: v_lshr_b64 v[10:11], v[3:4], 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; SI-NEXT: v_lshr_b64 v[8:9], v[3:4], 16
; SI-NEXT: v_lshr_b64 v[12:13], v[0:1], 16
; SI-NEXT: .LBB49_5: ; %end
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v7
@@ -12157,7 +12157,7 @@ define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v10
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v8
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll b/llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
index 7f717ca8baad2..5e1e9e3f597b8 100644
--- a/llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
@@ -436,16 +436,16 @@ define amdgpu_kernel void @test_pipelined_loop_with_global(ptr addrspace(1) %foo
; GISEL-NEXT: v_readfirstlane_b32 s8, v1
; GISEL-NEXT: s_wait_loadcnt 0x0
; GISEL-NEXT: v_readfirstlane_b32 s15, v2
-; GISEL-NEXT: s_mov_b32 s18, s8
+; GISEL-NEXT: s_mov_b32 s9, s8
; GISEL-NEXT: s_mov_b32 s19, s15
; GISEL-NEXT: .LBB2_1: ; %loop_body
; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
-; GISEL-NEXT: s_add_co_u32 s9, s14, 8
+; GISEL-NEXT: s_add_co_u32 s17, s14, 8
; GISEL-NEXT: global_load_b32 v2, v0, s[6:7]
-; GISEL-NEXT: v_dual_mov_b32 v1, s9 :: v_dual_mov_b32 v3, s14
-; GISEL-NEXT: s_mov_b32 s17, s18
+; GISEL-NEXT: v_dual_mov_b32 v1, s17 :: v_dual_mov_b32 v3, s14
+; GISEL-NEXT: s_mov_b32 s18, s9
; GISEL-NEXT: s_wait_kmcnt 0x0
-; GISEL-NEXT: s_add_co_i32 s16, s13, s16
+; GISEL-NEXT: s_add_co_i32 s9, s13, s16
; GISEL-NEXT: s_add_co_i32 s12, s12, 1
; GISEL-NEXT: s_clause 0x1
; GISEL-NEXT: global_load_async_to_lds_b32 v1, v0, s[6:7] offset:4 nv
@@ -454,14 +454,14 @@ define amdgpu_kernel void @test_pipelined_loop_with_global(ptr addrspace(1) %foo
; GISEL-NEXT: ; wait_asyncmark(2)
; GISEL-NEXT: s_wait_asynccnt 0x2
; GISEL-NEXT: ds_load_b32 v3, v3
-; GISEL-NEXT: s_mov_b32 s9, s19
+; GISEL-NEXT: s_mov_b32 s17, s19
; GISEL-NEXT: s_mov_b32 s13, s8
; GISEL-NEXT: s_wait_dscnt 0x0
-; GISEL-NEXT: v_readfirstlane_b32 s18, v3
-; GISEL-NEXT: s_add_co_i32 s16, s16, s18
+; GISEL-NEXT: v_readfirstlane_b32 s16, v3
+; GISEL-NEXT: s_add_co_i32 s9, s9, s16
; GISEL-NEXT: s_wait_xcnt 0x1
; GISEL-NEXT: s_add_co_u32 s6, s6, 4
-; GISEL-NEXT: v_mov_b32_e32 v3, s16
+; GISEL-NEXT: v_mov_b32_e32 v3, s9
; GISEL-NEXT: s_add_co_ci_u32 s7, s7, 0
; GISEL-NEXT: s_wait_xcnt 0x0
; GISEL-NEXT: s_add_co_u32 s0, s0, 4
@@ -474,7 +474,7 @@ define amdgpu_kernel void @test_pipelined_loop_with_global(ptr addrspace(1) %foo
; GISEL-NEXT: s_add_co_u32 s14, s14, 4
; GISEL-NEXT: s_cmp_lt_i32 s12, s11
; GISEL-NEXT: s_wait_loadcnt 0x1
-; GISEL-NEXT: v_readfirstlane_b32 s18, v2
+; GISEL-NEXT: v_readfirstlane_b32 s9, v2
; GISEL-NEXT: s_wait_loadcnt 0x0
; GISEL-NEXT: v_readfirstlane_b32 s19, v1
; GISEL-NEXT: s_cbranch_scc1 .LBB2_1
@@ -483,7 +483,7 @@ define amdgpu_kernel void @test_pipelined_loop_with_global(ptr addrspace(1) %foo
; GISEL-NEXT: ; wait_asyncmark(1)
; GISEL-NEXT: s_wait_asynccnt 0x1
; GISEL-NEXT: s_lshl_b32 s1, s0, 2
-; GISEL-NEXT: s_add_co_i32 s4, s17, s9
+; GISEL-NEXT: s_add_co_i32 s4, s18, s17
; GISEL-NEXT: s_add_co_u32 s1, s10, s1
; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-NEXT: v_mov_b32_e32 v0, s1
@@ -494,7 +494,7 @@ define amdgpu_kernel void @test_pipelined_loop_with_global(ptr addrspace(1) %foo
; GISEL-NEXT: s_add_co_i32 s1, s4, s1
; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-NEXT: v_mov_b32_e32 v2, s1
-; GISEL-NEXT: s_add_co_i32 s1, s18, s19
+; GISEL-NEXT: s_add_co_i32 s1, s9, s19
; GISEL-NEXT: global_store_b32 v1, v2, s[2:3] scale_offset
; GISEL-NEXT: ; wait_asyncmark(0)
; GISEL-NEXT: s_wait_asynccnt 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll b/llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
index 3d8f0b94c24a7..cfc9faa7c5d18 100644
--- a/llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
+++ b/llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
@@ -496,8 +496,8 @@ define void @test_pipelined_loop_with_global(ptr addrspace(1) %foo, ptr addrspac
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_readfirstlane_b32 s4, v2
; SDAG-NEXT: s_mov_b32 m0, s4
-; SDAG-NEXT: global_load_dword v10, v[0:1], off
-; SDAG-NEXT: global_load_dword v14, v[3:4], off
+; SDAG-NEXT: global_load_dword v12, v[0:1], off
+; SDAG-NEXT: global_load_dword v13, v[3:4], off
; SDAG-NEXT: s_mov_b32 s6, 2
; SDAG-NEXT: global_load_dword v[0:1], off lds
; SDAG-NEXT: ; asyncmark
@@ -507,25 +507,25 @@ define void @test_pipelined_loop_with_global(ptr addrspace(1) %foo, ptr addrspac
; SDAG-NEXT: global_load_dword v[0:1], off lds
; SDAG-NEXT: ; asyncmark
; SDAG-NEXT: s_waitcnt vmcnt(2)
-; SDAG-NEXT: v_mov_b32_e32 v13, v8
+; SDAG-NEXT: v_mov_b32_e32 v11, v8
; SDAG-NEXT: s_waitcnt vmcnt(1)
; SDAG-NEXT: v_mov_b32_e32 v15, v9
; SDAG-NEXT: .LBB5_1: ; %loop_body
; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; SDAG-NEXT: v_readfirstlane_b32 s7, v2
; SDAG-NEXT: s_waitcnt vmcnt(1)
-; SDAG-NEXT: v_mov_b32_e32 v12, v15
-; SDAG-NEXT: v_mov_b32_e32 v11, v13
-; SDAG-NEXT: global_load_dword v13, v[0:1], off
+; SDAG-NEXT: v_mov_b32_e32 v10, v15
+; SDAG-NEXT: v_mov_b32_e32 v14, v11
+; SDAG-NEXT: global_load_dword v11, v[0:1], off
; SDAG-NEXT: global_load_dword v15, v[3:4], off
; SDAG-NEXT: s_mov_b32 m0, s7
; SDAG-NEXT: s_add_i32 s6, s6, 1
; SDAG-NEXT: global_load_dword v[0:1], off lds
; SDAG-NEXT: v_cmp_ge_i32_e32 vcc, s6, v7
-; SDAG-NEXT: v_mov_b32_e32 v16, v14
-; SDAG-NEXT: v_mov_b32_e32 v17, v10
-; SDAG-NEXT: v_mov_b32_e32 v10, v8
-; SDAG-NEXT: v_mov_b32_e32 v14, v9
+; SDAG-NEXT: v_mov_b32_e32 v16, v13
+; SDAG-NEXT: v_mov_b32_e32 v17, v12
+; SDAG-NEXT: v_mov_b32_e32 v12, v8
+; SDAG-NEXT: v_mov_b32_e32 v13, v9
; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; SDAG-NEXT: ; asyncmark
; SDAG-NEXT: ; wait_asyncmark(2)
@@ -542,10 +542,10 @@ define void @test_pipelined_loop_with_global(ptr addrspace(1) %foo, ptr addrspac
; SDAG-NEXT: ds_read_b32 v2, v2
; SDAG-NEXT: v_add_u32_e32 v3, v17, v16
; SDAG-NEXT: s_waitcnt lgkmcnt(2)
-; SDAG-NEXT: v_add3_u32 v0, v3, v0, v12
+; SDAG-NEXT: v_add3_u32 v0, v3, v0, v10
; SDAG-NEXT: s_waitcnt lgkmcnt(1)
-; SDAG-NEXT: v_add3_u32 v0, v11, v0, v1
-; SDAG-NEXT: v_add_u32_e32 v1, v13, v15
+; SDAG-NEXT: v_add3_u32 v0, v14, v0, v1
+; SDAG-NEXT: v_add_u32_e32 v1, v11, v15
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_add3_u32 v0, v1, v2, v0
; SDAG-NEXT: global_store_dword v[5:6], v0, off
@@ -557,8 +557,8 @@ define void @test_pipelined_loop_with_global(ptr addrspace(1) %foo, ptr addrspac
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-NEXT: v_readfirstlane_b32 s4, v2
; GISEL-NEXT: s_mov_b32 m0, s4
-; GISEL-NEXT: global_load_dword v10, v[0:1], off
-; GISEL-NEXT: global_load_dword v14, v[3:4], off
+; GISEL-NEXT: global_load_dword v12, v[0:1], off
+; GISEL-NEXT: global_load_dword v13, v[3:4], off
; GISEL-NEXT: s_mov_b32 s6, 2
; GISEL-NEXT: global_load_dword v[0:1], off lds
; GISEL-NEXT: ; asyncmark
@@ -568,25 +568,25 @@ define void @test_pipelined_loop_with_global(ptr addrspace(1) %foo, ptr addrspac
; GISEL-NEXT: global_load_dword v[0:1], off lds
; GISEL-NEXT: ; asyncmark
; GISEL-NEXT: s_waitcnt vmcnt(2)
-; GISEL-NEXT: v_mov_b32_e32 v13, v8
+; GISEL-NEXT: v_mov_b32_e32 v11, v8
; GISEL-NEXT: s_waitcnt vmcnt(1)
; GISEL-NEXT: v_mov_b32_e32 v15, v9
; GISEL-NEXT: .LBB5_1: ; %loop_body
; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GISEL-NEXT: v_readfirstlane_b32 s7, v2
; GISEL-NEXT: s_waitcnt vmcnt(1)
-; GISEL-NEXT: v_mov_b32_e32 v12, v15
-; GISEL-NEXT: v_mov_b32_e32 v11, v13
-; GISEL-NEXT: global_load_dword v13, v[0:1], off
+; GISEL-NEXT: v_mov_b32_e32 v10, v15
+; GISEL-NEXT: v_mov_b32_e32 v14, v11
+; GISEL-NEXT: global_load_dword v11, v[0:1], off
; GISEL-NEXT: global_load_dword v15, v[3:4], off
; GISEL-NEXT: s_mov_b32 m0, s7
; GISEL-NEXT: s_add_i32 s6, s6, 1
; GISEL-NEXT: global_load_dword v[0:1], off lds
; GISEL-NEXT: v_cmp_ge_i32_e32 vcc, s6, v7
-; GISEL-NEXT: v_mov_b32_e32 v16, v14
-; GISEL-NEXT: v_mov_b32_e32 v17, v10
-; GISEL-NEXT: v_mov_b32_e32 v10, v8
-; GISEL-NEXT: v_mov_b32_e32 v14, v9
+; GISEL-NEXT: v_mov_b32_e32 v16, v13
+; GISEL-NEXT: v_mov_b32_e32 v17, v12
+; GISEL-NEXT: v_mov_b32_e32 v12, v8
+; GISEL-NEXT: v_mov_b32_e32 v13, v9
; GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GISEL-NEXT: ; asyncmark
; GISEL-NEXT: ; wait_asyncmark(2)
@@ -603,10 +603,10 @@ define void @test_pipelined_loop_with_global(ptr addrspace(1) %foo, ptr addrspac
; GISEL-NEXT: ds_read_b32 v2, v2
; GISEL-NEXT: v_add_u32_e32 v3, v17, v16
; GISEL-NEXT: s_waitcnt lgkmcnt(2)
-; GISEL-NEXT: v_add3_u32 v0, v3, v0, v12
+; GISEL-NEXT: v_add3_u32 v0, v3, v0, v10
; GISEL-NEXT: s_waitcnt lgkmcnt(1)
-; GISEL-NEXT: v_add3_u32 v0, v11, v0, v1
-; GISEL-NEXT: v_add_u32_e32 v1, v13, v15
+; GISEL-NEXT: v_add3_u32 v0, v14, v0, v1
+; GISEL-NEXT: v_add_u32_e32 v1, v11, v15
; GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-NEXT: v_add3_u32 v0, v1, v2, v0
; GISEL-NEXT: global_store_dword v[5:6], v0, off
diff --git a/llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll b/llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
index e378a81035fd2..6a0bde0af1b58 100644
--- a/llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
@@ -5,22 +5,22 @@ define i32 @atomic_nand_i32_lds(ptr addrspace(3) %ptr) nounwind {
; GCN-LABEL: atomic_nand_i32_lds:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: ds_read_b32 v1, v0
+; GCN-NEXT: v_mov_b32_e32 v1, v0
+; GCN-NEXT: ds_read_b32 v0, v0
; GCN-NEXT: s_mov_b64 s[4:5], 0
; GCN-NEXT: .LBB0_1: ; %atomicrmw.start
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_waitcnt lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v2, v1
-; GCN-NEXT: v_bfi_b32 v1, v2, -5, -1
-; GCN-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1
+; GCN-NEXT: v_mov_b32_e32 v2, v0
+; GCN-NEXT: v_bfi_b32 v0, v2, -5, -1
+; GCN-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0
; GCN-NEXT: s_waitcnt lgkmcnt(0)
-; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
+; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v0, v2
; GCN-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GCN-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GCN-NEXT: s_cbranch_execnz .LBB0_1
; GCN-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
-; GCN-NEXT: v_mov_b32_e32 v0, v1
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = atomicrmw nand ptr addrspace(3) %ptr, i32 4 seq_cst
ret i32 %result
diff --git a/llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir b/llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
index 875e2fcc671e6..a7fced7c83f94 100644
--- a/llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
+++ b/llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
@@ -18,27 +18,27 @@ body: |
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
; CHECK-NEXT: liveins: $vgpr0, $sgpr4_sgpr5
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY killed $sgpr4_sgpr5
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[COPY1]], implicit $exec
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed [[COPY1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $exec_lo, implicit-def $exec_lo
- ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY3]], killed [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
+ ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY3]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
; CHECK-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_AND_B32_]], [[COPY3]], implicit-def dead $scc
- ; CHECK-NEXT: $exec_lo = S_MOV_B32_term killed [[S_AND_B32_]]
+ ; CHECK-NEXT: $exec_lo = S_MOV_B32_term [[S_AND_B32_]]
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.7(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM killed [[COPY]], 0, 0 :: (dereferenceable invariant load (s64), align 16, addrspace 4)
- ; CHECK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, killed %15, 0, implicit $exec
- ; CHECK-NEXT: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADDC_U32_e64 0, killed [[S_LOAD_DWORDX2_IMM]].sub1, killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[V_ADD_CO_U32_e64_]], %subreg.sub0, killed [[V_ADDC_U32_e64_]], %subreg.sub1
- ; CHECK-NEXT: [[GLOBAL_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE killed [[REG_SEQUENCE]], 0, 0, implicit $exec :: (load (s8), addrspace 1)
+ ; CHECK-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 0, 0 :: (dereferenceable invariant load (s64), align 16, addrspace 4)
+ ; CHECK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, %15, 0, implicit $exec
+ ; CHECK-NEXT: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADDC_U32_e64 0, [[S_LOAD_DWORDX2_IMM]].sub1, [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, [[V_ADDC_U32_e64_]], %subreg.sub1
+ ; CHECK-NEXT: [[GLOBAL_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE [[REG_SEQUENCE]], 0, 0, implicit $exec :: (load (s8), addrspace 1)
; CHECK-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
- ; CHECK-NEXT: GLOBAL_STORE_BYTE killed [[V_MOV_B]], killed [[GLOBAL_LOAD_UBYTE]], 0, 0, implicit $exec :: (store (s8), addrspace 1)
+ ; CHECK-NEXT: GLOBAL_STORE_BYTE [[V_MOV_B]], [[GLOBAL_LOAD_UBYTE]], 0, 0, implicit $exec :: (store (s8), addrspace 1)
; CHECK-NEXT: S_BRANCH %bb.7
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
@@ -55,14 +55,14 @@ body: |
; CHECK-NEXT: successors: %bb.6(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
- ; CHECK-NEXT: dead [[GLOBAL_LOAD_UBYTE1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE killed [[V_MOV_B1]], 0, 0, implicit $exec :: (load (s8), addrspace 1)
+ ; CHECK-NEXT: dead [[GLOBAL_LOAD_UBYTE1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE [[V_MOV_B1]], 0, 0, implicit $exec :: (load (s8), addrspace 1)
; CHECK-NEXT: S_BRANCH %bb.6
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.7(0x40000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[S_OR_SAVEEXEC_B32_:%[0-9]+]]:sreg_32 = S_OR_SAVEEXEC_B32 killed [[S_XOR_B32_]], implicit-def $exec, implicit-def dead $scc, implicit $exec
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY killed [[COPY2]]
+ ; CHECK-NEXT: [[S_OR_SAVEEXEC_B32_:%[0-9]+]]:sreg_32 = S_OR_SAVEEXEC_B32 [[S_XOR_B32_]], implicit-def $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY2]]
; CHECK-NEXT: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 $exec_lo, [[S_OR_SAVEEXEC_B32_]], implicit-def dead $scc
; CHECK-NEXT: $exec_lo = S_XOR_B32_term $exec_lo, [[S_AND_B32_1]], implicit-def dead $scc
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.7, implicit $exec
@@ -75,7 +75,7 @@ body: |
; CHECK-NEXT: S_BRANCH %bb.5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.7:
- ; CHECK-NEXT: $exec_lo = S_OR_B32 $exec_lo, killed [[S_AND_B32_1]], implicit-def dead $scc
+ ; CHECK-NEXT: $exec_lo = S_OR_B32 $exec_lo, [[S_AND_B32_1]], implicit-def dead $scc
; CHECK-NEXT: S_ENDPGM 0
bb.0:
successors: %bb.2(0x40000000), %bb.5(0x40000000)
diff --git a/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll b/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
index ba0029a4f329d..cf09e10b7fa42 100644
--- a/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
@@ -16,7 +16,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr31 = COPY $vgpr0, implicit $exec
; GFX90A-NEXT: early-clobber renamable $sgpr20_sgpr21_sgpr22_sgpr23 = S_LOAD_DWORDX4_IMM_ec renamable $sgpr8_sgpr9, 24, 0 :: (dereferenceable invariant load (s128) from %ir.arg3.kernarg.offset.align.down, align 8, addrspace 4)
; GFX90A-NEXT: renamable $sgpr24_sgpr25_sgpr26_sgpr27 = S_LOAD_DWORDX4_IMM renamable $sgpr8_sgpr9, 0, 0 :: (dereferenceable invariant load (s128) from %ir.arg.kernarg.offset1, addrspace 4)
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_LOAD_DWORDX2_IMM renamable $sgpr8_sgpr9, 16, 0 :: (dereferenceable invariant load (s64) from %ir.arg.kernarg.offset1 + 16, align 16, addrspace 4)
+ ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_LOAD_DWORDX2_IMM renamable $sgpr8_sgpr9, 16, 0 :: (dereferenceable invariant load (s64) from %ir.arg.kernarg.offset1 + 16, align 16, addrspace 4)
; GFX90A-NEXT: renamable $sgpr15 = S_LOAD_DWORD_IMM renamable $sgpr8_sgpr9, 40, 0 :: (dereferenceable invariant load (s32) from %ir.arg3.kernarg.offset.align.down + 16, align 8, addrspace 4)
; GFX90A-NEXT: S_BITCMP1_B32 renamable $sgpr20, 0, implicit-def $scc
; GFX90A-NEXT: renamable $sgpr12_sgpr13 = S_CSELECT_B64 -1, 0, implicit killed $scc
@@ -32,18 +32,18 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: S_CBRANCH_VCCZ %bb.2, implicit $vcc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.1.bb103:
- ; GFX90A-NEXT: successors: %bb.59(0x40000000), %bb.2(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x00000000000000FF, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr4_vgpr5:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: successors: %bb.58(0x40000000), %bb.2(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x00000000000000FF, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr4_vgpr5:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 0
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, renamable $sgpr30_sgpr31, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.59, implicit $vcc
+ ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.58, implicit $vcc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.2:
; GFX90A-NEXT: successors: %bb.3(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8, $sgpr9, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr44, $sgpr45, $sgpr20_sgpr21_sgpr22, $sgpr22_sgpr23, $sgpr24_sgpr25_sgpr26, $sgpr26_sgpr27, $vgpr4, $vgpr5
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8, $sgpr9, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr56, $sgpr57, $sgpr20_sgpr21_sgpr22, $sgpr22_sgpr23, $sgpr24_sgpr25_sgpr26, $sgpr26_sgpr27, $vgpr4, $vgpr5
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $vgpr13 = IMPLICIT_DEF implicit-def $vgpr12
+ ; GFX90A-NEXT: renamable $vgpr11 = IMPLICIT_DEF implicit-def $vgpr10
; GFX90A-NEXT: renamable $vgpr3 = IMPLICIT_DEF implicit-def $vgpr2
; GFX90A-NEXT: renamable $vgpr23 = IMPLICIT_DEF implicit-def $vgpr22
; GFX90A-NEXT: renamable $vgpr25 = IMPLICIT_DEF implicit-def $vgpr24
@@ -51,35 +51,35 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $sgpr36_sgpr37 = S_MOV_B64 0
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.3.Flow17:
- ; GFX90A-NEXT: successors: %bb.4(0x40000000), %bb.58(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr40_sgpr41, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr12_vgpr13:0x000000000000000F, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: successors: %bb.4(0x40000000), %bb.57(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr40_sgpr41, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000F, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr30 = V_AND_B32_e32 1023, $vgpr31, implicit $exec
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, killed renamable $sgpr18_sgpr19, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_VCCZ %bb.58, implicit $vcc
+ ; GFX90A-NEXT: S_CBRANCH_VCCZ %bb.57, implicit $vcc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.4.bb15:
; GFX90A-NEXT: successors: %bb.35(0x40000000), %bb.5(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr4_vgpr5:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr4_vgpr5:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr0_vgpr1 = nsw V_LSHLREV_B64_e64 2, $vgpr4_vgpr5, implicit $exec
; GFX90A-NEXT: renamable $vgpr2 = COPY renamable $sgpr25, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr44, renamable $vcc = V_ADD_CO_U32_e64 $sgpr24, $vgpr0, 0, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr45, dead renamable $vcc = V_ADDC_U32_e64 killed $vgpr2, killed $vgpr1, killed $vcc, 0, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr46, renamable $vcc = V_ADD_CO_U32_e64 $sgpr24, $vgpr0, 0, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr47, dead renamable $vcc = V_ADDC_U32_e64 killed $vgpr2, killed $vgpr1, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr0 = nuw nsw V_LSHLREV_B32_e32 2, $vgpr30, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr40, renamable $vcc = V_ADD_CO_U32_e64 $vgpr44, killed $vgpr0, 0, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr41, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr45, killed $vcc, 0, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr40, renamable $vcc = V_ADD_CO_U32_e64 $vgpr46, killed $vgpr0, 0, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr41, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr47, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, renamable $sgpr30_sgpr31, implicit-def dead $scc
; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.35, implicit $vcc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.5:
; GFX90A-NEXT: successors: %bb.6(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr34_sgpr35 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_MOV_B64 0
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_MOV_B64 0
@@ -96,42 +96,42 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr60_vgpr61 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr58_vgpr59 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr56_vgpr57 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr46_vgpr47 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr44_vgpr45 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr42_vgpr43 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.6.Flow20:
; GFX90A-NEXT: successors: %bb.7(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr22 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr24 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr26 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr27 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr13 = COPY killed renamable $sgpr18, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr11 = COPY killed renamable $sgpr18, implicit $exec
; GFX90A-NEXT: renamable $vgpr3 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr23 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr25 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.7.Flow19:
- ; GFX90A-NEXT: successors: %bb.63(0x40000000), %bb.8(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000F, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: successors: %bb.62(0x40000000), %bb.8(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000F, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_MOV_B64 0
; GFX90A-NEXT: $sgpr18_sgpr19 = S_AND_SAVEEXEC_B64 $sgpr36_sgpr37, implicit-def $exec, implicit-def $scc, implicit $exec
- ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.63, implicit $exec
+ ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.62, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.8.Flow32:
; GFX90A-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr18_sgpr19, implicit-def dead $scc
; GFX90A-NEXT: $sgpr12_sgpr13 = S_AND_SAVEEXEC_B64 $sgpr40_sgpr41, implicit-def $exec, implicit-def $scc, implicit $exec
@@ -140,7 +140,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.9.bb89:
; GFX90A-NEXT: successors: %bb.10(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr9, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
@@ -148,16 +148,16 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.10.Flow33:
; GFX90A-NEXT: successors: %bb.11(0x40000000), %bb.12(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr12_sgpr13, implicit-def dead $scc
- ; GFX90A-NEXT: $sgpr12_sgpr13 = S_AND_SAVEEXEC_B64 $sgpr56_sgpr57, implicit-def $exec, implicit-def $scc, implicit $exec
+ ; GFX90A-NEXT: $sgpr12_sgpr13 = S_AND_SAVEEXEC_B64 $sgpr46_sgpr47, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: renamable $sgpr12_sgpr13 = S_XOR_B64 $exec, killed renamable $sgpr12_sgpr13, implicit-def dead $scc
; GFX90A-NEXT: S_CBRANCH_EXECZ %bb.12, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.11.bb84:
; GFX90A-NEXT: successors: %bb.12(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr55, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr54, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
@@ -165,10 +165,10 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.12.Flow34:
; GFX90A-NEXT: successors: %bb.13(0x40000000), %bb.14(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr12_sgpr13, implicit-def dead $scc
- ; GFX90A-NEXT: $sgpr12_sgpr13 = S_AND_SAVEEXEC_B64 $sgpr46_sgpr47, implicit-def $exec, implicit-def $scc, implicit $exec
+ ; GFX90A-NEXT: $sgpr12_sgpr13 = S_AND_SAVEEXEC_B64 $sgpr44_sgpr45, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: renamable $sgpr12_sgpr13 = S_XOR_B64 $exec, killed renamable $sgpr12_sgpr13, implicit-def dead $scc
; GFX90A-NEXT: S_CBRANCH_EXECZ %bb.14, implicit $exec
; GFX90A-NEXT: {{ $}}
@@ -217,13 +217,13 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: successors: %bb.18(0x80000000)
; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr45, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
- ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr44, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
+ ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr47, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
+ ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr46, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_OR_B64 killed renamable $sgpr68_sgpr69, $exec, implicit-def dead $scc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.18.Flow37:
; GFX90A-NEXT: successors: %bb.19(0x40000000), %bb.20(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
; GFX90A-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr64_sgpr65, implicit-def $exec, implicit-def $scc, implicit $exec
@@ -232,7 +232,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.19.bb62:
; GFX90A-NEXT: successors: %bb.20(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr63, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr62, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
@@ -240,7 +240,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.20.Flow38:
; GFX90A-NEXT: successors: %bb.21(0x40000000), %bb.22(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
; GFX90A-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr54_sgpr55, implicit-def $exec, implicit-def $scc, implicit $exec
@@ -249,7 +249,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.21.bb54:
; GFX90A-NEXT: successors: %bb.22(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr61, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr60, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
@@ -257,7 +257,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.22.Flow39:
; GFX90A-NEXT: successors: %bb.23(0x40000000), %bb.24(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
; GFX90A-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr52_sgpr53, implicit-def $exec, implicit-def $scc, implicit $exec
@@ -266,7 +266,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.23.bb47:
; GFX90A-NEXT: successors: %bb.24(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr59, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr58, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
@@ -274,7 +274,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.24.Flow40:
; GFX90A-NEXT: successors: %bb.25(0x40000000), %bb.26(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
; GFX90A-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr50_sgpr51, implicit-def $exec, implicit-def $scc, implicit $exec
@@ -283,7 +283,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.25.bb40:
; GFX90A-NEXT: successors: %bb.26(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr57, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr56, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
@@ -291,7 +291,7 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.26.Flow41:
; GFX90A-NEXT: successors: %bb.27(0x40000000), %bb.28(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr48_sgpr49, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
; GFX90A-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr48_sgpr49, implicit-def $exec, implicit-def $scc, implicit $exec
@@ -300,10 +300,10 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.27.bb33:
; GFX90A-NEXT: successors: %bb.28(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr4_sgpr5, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr68_sgpr69, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr47, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
- ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr46, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
+ ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET renamable $vgpr45, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
+ ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr44, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_OR_B64 killed renamable $sgpr68_sgpr69, $exec, implicit-def dead $scc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.28.Flow42:
@@ -362,14 +362,14 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.35.bb20:
; GFX90A-NEXT: successors: %bb.37(0x40000000), %bb.36(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr0 = FLAT_LOAD_SBYTE renamable $vgpr40_vgpr41, 1024, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i23)
; GFX90A-NEXT: renamable $vgpr42 = V_ADD_CO_U32_e32 1024, $vgpr40, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: renamable $sgpr34_sgpr35 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr38_sgpr39 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_MOV_B64 0
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_MOV_B64 0
@@ -387,37 +387,37 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr60_vgpr61 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr58_vgpr59 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr56_vgpr57 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr46_vgpr47 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr44_vgpr45 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: $sgpr24_sgpr25 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.37, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.36.Flow21:
; GFX90A-NEXT: successors: %bb.6(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr24_sgpr25, implicit-def dead $scc
; GFX90A-NEXT: S_BRANCH %bb.6
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.37.bb27:
; GFX90A-NEXT: successors: %bb.39(0x40000000), %bb.38(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41, $sgpr56_sgpr57, $sgpr46_sgpr47, $sgpr64_sgpr65, $sgpr54_sgpr55, $sgpr52_sgpr53, $sgpr66_sgpr67, $sgpr48_sgpr49
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr40_sgpr41, $sgpr46_sgpr47, $sgpr44_sgpr45, $sgpr64_sgpr65, $sgpr54_sgpr55, $sgpr52_sgpr53, $sgpr66_sgpr67, $sgpr48_sgpr49
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr0 = FLAT_LOAD_UBYTE renamable $vgpr40_vgpr41, 2048, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i30)
- ; GFX90A-NEXT: renamable $vgpr46 = V_ADD_CO_U32_e32 2048, $vgpr40, implicit-def $vcc, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr44 = V_ADD_CO_U32_e32 2048, $vgpr40, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_MOV_B64 -1
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $sgpr60_sgpr61 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr62_sgpr63 = S_MOV_B64 0
- ; GFX90A-NEXT: renamable $vgpr47, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $vcc, 0, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr45, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = V_CMP_EQ_U16_e64 0, killed $vgpr0, implicit $exec
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr54_vgpr55 = IMPLICIT_DEF
@@ -428,20 +428,20 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr58_vgpr59 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr56_vgpr57 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: $sgpr38_sgpr39 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.39, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.38.Flow22:
; GFX90A-NEXT: successors: %bb.36(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr38_sgpr39, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr38_sgpr39 = S_XOR_B64 $exec, -1, implicit-def dead $scc
@@ -452,26 +452,25 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_AND_B64 killed renamable $sgpr64_sgpr65, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_AND_B64 killed renamable $sgpr62_sgpr63, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_AND_B64 killed renamable $sgpr60_sgpr61, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_AND_B64 killed renamable $sgpr44_sgpr45, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_AND_B64 killed renamable $sgpr46_sgpr47, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr56_sgpr57, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr40_sgpr41 = S_AND_B64 killed renamable $sgpr40_sgpr41, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr36_sgpr37 = S_ANDN2_B64 killed renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr36_sgpr37 = S_OR_B64 killed renamable $sgpr36_sgpr37, killed renamable $sgpr44_sgpr45, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr36_sgpr37 = S_OR_B64 killed renamable $sgpr36_sgpr37, killed renamable $sgpr56_sgpr57, implicit-def dead $scc
; GFX90A-NEXT: S_BRANCH %bb.36
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.39.bb34:
; GFX90A-NEXT: successors: %bb.41(0x40000000), %bb.40(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr54_sgpr55, $sgpr66_sgpr67
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr46_sgpr47, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr54_sgpr55, $sgpr52_sgpr53, $sgpr66_sgpr67
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr0 = FLAT_LOAD_UBYTE renamable $vgpr40_vgpr41, 3072, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i37)
; GFX90A-NEXT: renamable $vgpr56 = V_ADD_CO_U32_e32 3072, $vgpr40, implicit-def $vcc, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_MOV_B64 -1
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_MOV_B64 -1
; GFX90A-NEXT: renamable $sgpr50_sgpr51 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_MOV_B64 0
; GFX90A-NEXT: renamable $vgpr57, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = V_CMP_EQ_U16_e64 0, killed $vgpr0, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_MOV_B64 0
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr54_vgpr55 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr6_vgpr7 = IMPLICIT_DEF
@@ -480,47 +479,47 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr60_vgpr61 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr58_vgpr59 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: $sgpr40_sgpr41 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.41, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.40.Flow23:
; GFX90A-NEXT: successors: %bb.38(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr68_sgpr69, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr40_sgpr41, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_XOR_B64 $exec, -1, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_AND_B64 killed renamable $sgpr46_sgpr47, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_AND_B64 killed renamable $sgpr68_sgpr69, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_AND_B64 killed renamable $sgpr44_sgpr45, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_AND_B64 killed renamable $sgpr52_sgpr53, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_AND_B64 killed renamable $sgpr54_sgpr55, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_AND_B64 killed renamable $sgpr64_sgpr65, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr62_sgpr63 = S_AND_B64 killed renamable $sgpr62_sgpr63, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr60_sgpr61 = S_AND_B64 killed renamable $sgpr60_sgpr61, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr56_sgpr57, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_AND_B64 killed renamable $sgpr46_sgpr47, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr40_sgpr41 = S_AND_B64 killed renamable $sgpr48_sgpr49, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_OR_B64 killed renamable $sgpr44_sgpr45, killed renamable $sgpr48_sgpr49, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_OR_B64 killed renamable $sgpr48_sgpr49, killed renamable $sgpr50_sgpr51, implicit-def dead $scc
; GFX90A-NEXT: S_BRANCH %bb.38
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.41.bb41:
- ; GFX90A-NEXT: successors: %bb.47(0x40000000), %bb.42(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr54_sgpr55, $sgpr66_sgpr67, $sgpr68_sgpr69
+ ; GFX90A-NEXT: successors: %bb.46(0x40000000), %bb.42(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr66_sgpr67, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr54_sgpr55
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr58 = V_ADD_CO_U32_e32 4096, $vgpr40, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: renamable $vgpr1, dead renamable $sgpr18_sgpr19 = V_ADDC_U32_e64 0, $vgpr41, $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr0 = COPY renamable $vgpr58, implicit $exec
; GFX90A-NEXT: renamable $vgpr0 = FLAT_LOAD_UBYTE killed renamable $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i44)
- ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_MOV_B64 -1
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $vgpr59, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = V_CMP_EQ_U16_e64 0, killed $vgpr0, implicit $exec
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
@@ -530,94 +529,87 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr62_vgpr63 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr60_vgpr61 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: $sgpr42_sgpr43 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
- ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.47, implicit $exec
+ ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.46, implicit $exec
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.42.Flow24:
; GFX90A-NEXT: successors: %bb.40(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr54_sgpr55, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr42_sgpr43, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_XOR_B64 $exec, -1, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_XOR_B64 $exec, -1, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_AND_B64 killed renamable $sgpr46_sgpr47, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_AND_B64 killed renamable $sgpr54_sgpr55, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_AND_B64 killed renamable $sgpr64_sgpr65, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr62_sgpr63 = S_AND_B64 killed renamable $sgpr62_sgpr63, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr60_sgpr61 = S_AND_B64 killed renamable $sgpr60_sgpr61, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr56_sgpr57, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_AND_B64 killed renamable $sgpr66_sgpr67, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_AND_B64 killed renamable $sgpr48_sgpr49, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_AND_B64 killed renamable $sgpr52_sgpr53, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_OR_B64 killed renamable $sgpr42_sgpr43, killed renamable $sgpr44_sgpr45, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_OR_B64 killed renamable $sgpr42_sgpr43, killed renamable $sgpr50_sgpr51, implicit-def dead $scc
; GFX90A-NEXT: S_BRANCH %bb.40
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.43.bb55:
- ; GFX90A-NEXT: successors: %bb.49(0x40000000), %bb.44(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr58_sgpr59, $sgpr50_sgpr51
+ ; GFX90A-NEXT: successors: %bb.48(0x40000000), %bb.44(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr46_sgpr47, $sgpr54_sgpr55, $sgpr60_sgpr61, $sgpr58_sgpr59, $sgpr48_sgpr49
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: S_BITCMP1_B32 renamable $sgpr20, 16, implicit-def $scc
- ; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_CSELECT_B64 -1, 0, implicit killed $scc
- ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr18_sgpr19 = S_XOR_B64 renamable $sgpr64_sgpr65, -1, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_CSELECT_B64 -1, 0, implicit killed $scc
+ ; GFX90A-NEXT: renamable $sgpr18_sgpr19 = S_XOR_B64 renamable $sgpr66_sgpr67, -1, implicit-def dead $scc
; GFX90A-NEXT: renamable $vgpr62 = V_ADD_CO_U32_e32 6144, $vgpr40, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: renamable $vgpr63, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, renamable $sgpr18_sgpr19, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.49, implicit $vcc
+ ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.48, implicit $vcc
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.44:
; GFX90A-NEXT: successors: %bb.45(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr58_sgpr59
+ ; GFX90A-NEXT: liveins: $sgpr14, $vgpr57, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8, $sgpr9, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $vgpr42, $sgpr54_sgpr55, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr20_sgpr21_sgpr22, $vgpr62, $sgpr24_sgpr25_sgpr26, $sgpr26_sgpr27, $vgpr45, $vgpr56, $vgpr2, $vgpr4, $vgpr5, $vgpr46, $vgpr47, $vgpr44, $vgpr43, $vgpr58, $vgpr60, $vgpr63, $vgpr59, $vgpr61, $vgpr40, $vgpr41
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr54_vgpr55 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr6_vgpr7 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr0_vgpr1 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_MOV_B64 0
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: bb.45.Flow26:
- ; GFX90A-NEXT: successors: %bb.46(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8, $sgpr9, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr20_sgpr21_sgpr22, $sgpr22_sgpr23, $sgpr24_sgpr25_sgpr26, $sgpr26_sgpr27, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr12, $vgpr14, $vgpr16, $vgpr17, $vgpr18, $vgpr20, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr54, $vgpr55, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
- ; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_MOV_B64 0
- ; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.46.Flow26:
- ; GFX90A-NEXT: successors: %bb.48(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: successors: %bb.47(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr62_sgpr63 = S_XOR_B64 $exec, -1, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_AND_B64 killed renamable $sgpr48_sgpr49, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr70_sgpr71 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_AND_B64 killed renamable $sgpr52_sgpr53, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_AND_B64 killed renamable $sgpr46_sgpr47, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr70_sgpr71 = S_AND_B64 killed renamable $sgpr48_sgpr49, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_AND_B64 killed renamable $sgpr60_sgpr61, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_AND_B64 killed renamable $sgpr56_sgpr57, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_AND_B64 killed renamable $sgpr54_sgpr55, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_OR_B64 killed renamable $sgpr44_sgpr45, killed renamable $sgpr50_sgpr51, implicit-def dead $scc
- ; GFX90A-NEXT: S_BRANCH %bb.48
+ ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_AND_B64 killed renamable $sgpr54_sgpr55, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_AND_B64 killed renamable $sgpr52_sgpr53, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_OR_B64 killed renamable $sgpr46_sgpr47, killed renamable $sgpr50_sgpr51, implicit-def dead $scc
+ ; GFX90A-NEXT: S_BRANCH %bb.47
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.47.bb48:
- ; GFX90A-NEXT: successors: %bb.43(0x40000000), %bb.48(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr66_sgpr67, $sgpr58_sgpr59, $sgpr68_sgpr69, $sgpr64_sgpr65, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr50_sgpr51
+ ; GFX90A-NEXT: bb.46.bb48:
+ ; GFX90A-NEXT: successors: %bb.43(0x40000000), %bb.47(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr66_sgpr67, $sgpr58_sgpr59, $sgpr64_sgpr65, $sgpr46_sgpr47, $sgpr54_sgpr55, $sgpr60_sgpr61
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr60 = V_ADD_CO_U32_e32 5120, $vgpr40, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: renamable $sgpr18_sgpr19 = COPY $vcc
@@ -625,7 +617,8 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr1, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr0 = FLAT_LOAD_UBYTE killed renamable $vgpr0_vgpr1, 1024, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i51)
; GFX90A-NEXT: renamable $sgpr62_sgpr63 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr68_sgpr69 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr70_sgpr71 = S_MOV_B64 0
; GFX90A-NEXT: renamable $vgpr61, dead renamable $vcc = V_ADDC_U32_e64 0, $vgpr41, killed $sgpr18_sgpr19, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = V_CMP_EQ_U16_e64 0, killed $vgpr0, implicit $exec
@@ -635,158 +628,144 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr0_vgpr1 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr62_vgpr63 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
- ; GFX90A-NEXT: $sgpr46_sgpr47 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: $sgpr44_sgpr45 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.43, implicit $exec
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.48.Flow25:
+ ; GFX90A-NEXT: bb.47.Flow25:
; GFX90A-NEXT: successors: %bb.42(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr52_sgpr53, $sgpr58_sgpr59, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $sgpr70_sgpr71, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr58_sgpr59, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr68_sgpr69, $sgpr70_sgpr71, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr46_sgpr47, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_XOR_B64 $exec, -1, implicit-def dead $scc
+ ; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr44_sgpr45, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_XOR_B64 $exec, -1, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_AND_B64 killed renamable $sgpr62_sgpr63, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_AND_B64 killed renamable $sgpr64_sgpr65, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr62_sgpr63 = S_AND_B64 killed renamable $sgpr70_sgpr71, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr60_sgpr61 = S_AND_B64 killed renamable $sgpr68_sgpr69, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_AND_B64 killed renamable $sgpr58_sgpr59, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr66_sgpr67, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_AND_B64 killed renamable $sgpr66_sgpr67, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_AND_B64 killed renamable $sgpr48_sgpr49, $exec, implicit-def dead $scc
; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_AND_B64 killed renamable $sgpr52_sgpr53, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_OR_B64 killed renamable $sgpr44_sgpr45, killed renamable $sgpr46_sgpr47, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_AND_B64 killed renamable $sgpr50_sgpr51, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_OR_B64 killed renamable $sgpr44_sgpr45, killed renamable $sgpr50_sgpr51, implicit-def dead $scc
; GFX90A-NEXT: S_BRANCH %bb.42
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.49.bb63:
- ; GFX90A-NEXT: successors: %bb.51(0x40000000), %bb.50(0x40000000)
- ; GFX90A-NEXT: liveins: $vcc, $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr50_sgpr51, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr58_sgpr59
+ ; GFX90A-NEXT: bb.48.bb63:
+ ; GFX90A-NEXT: successors: %bb.50(0x40000000), %bb.49(0x40000000)
+ ; GFX90A-NEXT: liveins: $vcc, $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr56_sgpr57:0x000000000000000F, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr54_sgpr55, $sgpr60_sgpr61, $sgpr58_sgpr59, $sgpr48_sgpr49
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_MOV_B64 0
- ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.51, implicit $vcc
+ ; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_MOV_B64 0
+ ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.50, implicit $vcc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.50:
- ; GFX90A-NEXT: successors: %bb.45(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr50_sgpr51, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr58_sgpr59
+ ; GFX90A-NEXT: bb.49:
+ ; GFX90A-NEXT: successors: %bb.44(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr54_sgpr55, $sgpr60_sgpr61, $sgpr58_sgpr59
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = COPY renamable $sgpr36_sgpr37
- ; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr54_vgpr55 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr6_vgpr7 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr0_vgpr1 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
- ; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
- ; GFX90A-NEXT: S_BRANCH %bb.45
+ ; GFX90A-NEXT: renamable $sgpr48_sgpr49 = S_MOV_B64 -1
+ ; GFX90A-NEXT: S_BRANCH %bb.44
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.51.bb68:
- ; GFX90A-NEXT: successors: %bb.55(0x40000000), %bb.52(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr58_sgpr59
+ ; GFX90A-NEXT: bb.50.bb68:
+ ; GFX90A-NEXT: successors: %bb.54(0x40000000), %bb.51(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr56_sgpr57:0x000000000000000F, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr48_sgpr49, $sgpr54_sgpr55, $sgpr60_sgpr61, $sgpr58_sgpr59
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr0 = nuw nsw V_LSHLREV_B32_e32 3, $vgpr30, implicit $exec
; GFX90A-NEXT: renamable $vgpr1 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_MOV_B64 0
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, killed renamable $sgpr18_sgpr19, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.55, implicit $vcc
+ ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.54, implicit $vcc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.52:
- ; GFX90A-NEXT: successors: %bb.46(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr56_sgpr57, $sgpr60_sgpr61, $sgpr58_sgpr59
+ ; GFX90A-NEXT: bb.51:
+ ; GFX90A-NEXT: successors: %bb.45(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr54_sgpr55, $sgpr60_sgpr61, $sgpr58_sgpr59
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_MOV_B64 -1
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr54_vgpr55 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr6_vgpr7 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
- ; GFX90A-NEXT: S_BRANCH %bb.46
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: S_BRANCH %bb.45
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.53.bb80:
- ; GFX90A-NEXT: successors: %bb.60(0x40000000), %bb.54(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.52.bb80:
+ ; GFX90A-NEXT: successors: %bb.59(0x40000000), %bb.53(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr56_sgpr57:0x000000000000000F, $sgpr62_sgpr63, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: dead renamable $sgpr15 = S_BFE_U32 renamable $sgpr20, 65560, implicit-def $scc
; GFX90A-NEXT: renamable $vgpr8 = V_ADD_CO_U32_e32 4096, $vgpr0, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: renamable $vgpr9, dead renamable $sgpr18_sgpr19 = V_ADDC_U32_e64 0, 0, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr54_vgpr55 = COPY renamable $vgpr8_vgpr9, implicit $exec
- ; GFX90A-NEXT: S_CBRANCH_SCC0 %bb.60, implicit killed $scc
+ ; GFX90A-NEXT: S_CBRANCH_SCC0 %bb.59, implicit killed $scc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.54:
- ; GFX90A-NEXT: successors: %bb.62(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr62_sgpr63, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.53:
+ ; GFX90A-NEXT: successors: %bb.61(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr62_sgpr63, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_MOV_B64 0
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_MOV_B64 0
+ ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_MOV_B64 -1
+ ; GFX90A-NEXT: renamable $sgpr64_sgpr65 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
- ; GFX90A-NEXT: S_BRANCH %bb.62
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: S_BRANCH %bb.61
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.55.bb73:
- ; GFX90A-NEXT: successors: %bb.53(0x40000000), %bb.56(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr56_sgpr57, $sgpr60_sgpr61
+ ; GFX90A-NEXT: bb.54.bb73:
+ ; GFX90A-NEXT: successors: %bb.52(0x40000000), %bb.55(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr56_sgpr57:0x000000000000000F, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003F, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr54_sgpr55, $sgpr60_sgpr61
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr3 = FLAT_LOAD_UBYTE renamable $vgpr0_vgpr1, 2048, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i76)
; GFX90A-NEXT: renamable $vgpr6 = V_ADD_CO_U32_e32 2048, $vgpr0, implicit-def $vcc, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_MOV_B64 0
+ ; GFX90A-NEXT: renamable $sgpr50_sgpr51 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_MOV_B64 -1
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $vgpr7, dead renamable $sgpr18_sgpr19 = V_ADDC_U32_e64 0, 0, killed $vcc, 0, implicit $exec
; GFX90A-NEXT: renamable $vcc = V_CMP_EQ_U16_e64 0, killed $vgpr3, implicit $exec
; GFX90A-NEXT: renamable $vgpr8_vgpr9 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr54_vgpr55 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
; GFX90A-NEXT: $sgpr62_sgpr63 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
- ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.53, implicit $exec
+ ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.52, implicit $exec
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.56.Flow29:
- ; GFX90A-NEXT: successors: %bb.46(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.55.Flow29:
+ ; GFX90A-NEXT: successors: %bb.45(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr58_sgpr59, $sgpr60_sgpr61, $sgpr62_sgpr63, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr62_sgpr63, implicit-def dead $scc
- ; GFX90A-NEXT: S_BRANCH %bb.46
+ ; GFX90A-NEXT: S_BRANCH %bb.45
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.57.bb90:
- ; GFX90A-NEXT: successors: %bb.61(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr56_sgpr57, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.56.bb90:
+ ; GFX90A-NEXT: successors: %bb.60(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr54_sgpr55, $sgpr56_sgpr57:0x000000000000000F, $sgpr62_sgpr63, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: dead renamable $sgpr18_sgpr19 = S_AND_B64 killed renamable $sgpr64_sgpr65, $exec, implicit-def $scc
+ ; GFX90A-NEXT: dead renamable $sgpr18_sgpr19 = S_AND_B64 killed renamable $sgpr66_sgpr67, $exec, implicit-def $scc
; GFX90A-NEXT: renamable $sgpr23 = S_CSELECT_B32 1, 0, implicit killed $scc
; GFX90A-NEXT: renamable $vgpr3 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr10 = COPY renamable $sgpr21, implicit $exec
@@ -794,28 +773,28 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr18_vgpr19 = DS_READ_B64_gfx9 killed renamable $vgpr3, 0, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) null`, addrspace 3)
; GFX90A-NEXT: renamable $vgpr3 = COPY renamable $sgpr22, implicit $exec
; GFX90A-NEXT: renamable $vgpr16_vgpr17 = DS_READ_B64_gfx9 killed renamable $vgpr3, 0, 0, implicit $exec :: (load (s64) from %ir.5, addrspace 3)
- ; GFX90A-NEXT: renamable $sgpr18_sgpr19 = S_LSHR_B64 killed renamable $sgpr44_sgpr45, 1, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr18_sgpr19 = S_LSHR_B64 killed renamable $sgpr56_sgpr57, 1, implicit-def dead $scc
; GFX90A-NEXT: renamable $vgpr14_vgpr15 = V_LSHRREV_B64_e64 1, $vgpr20_vgpr21, implicit $exec
- ; GFX90A-NEXT: dead renamable $sgpr44_sgpr45 = S_AND_B64 renamable $sgpr12_sgpr13, $exec, implicit-def $scc
+ ; GFX90A-NEXT: dead renamable $sgpr52_sgpr53 = S_AND_B64 renamable $sgpr12_sgpr13, $exec, implicit-def $scc
; GFX90A-NEXT: renamable $sgpr15 = S_CSELECT_B32 1, 0, implicit killed $scc
- ; GFX90A-NEXT: renamable $vgpr10_vgpr11 = V_LSHRREV_B64_e64 1, $vgpr18_vgpr19, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_XOR_B64 $exec, -1, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_OR_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $vgpr12 = COPY renamable $vgpr18, implicit $exec
- ; GFX90A-NEXT: S_BRANCH %bb.61
+ ; GFX90A-NEXT: renamable $vgpr12_vgpr13 = V_LSHRREV_B64_e64 1, $vgpr18_vgpr19, implicit $exec
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_XOR_B64 $exec, -1, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_OR_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $vgpr10 = COPY renamable $vgpr18, implicit $exec
+ ; GFX90A-NEXT: S_BRANCH %bb.60
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.58:
+ ; GFX90A-NEXT: bb.57:
; GFX90A-NEXT: successors: %bb.7(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr40_sgpr41, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr12_vgpr13:0x000000000000000F, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr36_sgpr37, $sgpr40_sgpr41, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000F, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr15 = S_MOV_B32 0
; GFX90A-NEXT: renamable $vgpr16 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr17 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr18 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr10 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr12 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr14 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr46_sgpr47 = S_MOV_B64 0
+ ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr42_sgpr43 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr66_sgpr67 = S_MOV_B64 0
; GFX90A-NEXT: renamable $sgpr64_sgpr65 = S_MOV_B64 0
@@ -832,18 +811,18 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr60_vgpr61 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr58_vgpr59 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr56_vgpr57 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr46_vgpr47 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr44_vgpr45 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr42_vgpr43 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr40_vgpr41 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr44_vgpr45 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr46_vgpr47 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = COPY renamable $vgpr5, implicit $exec
; GFX90A-NEXT: renamable $sgpr23 = S_MOV_B32 0
; GFX90A-NEXT: renamable $sgpr34_sgpr35 = S_MOV_B64 0
; GFX90A-NEXT: S_BRANCH %bb.7
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.59.bb105:
+ ; GFX90A-NEXT: bb.58.bb105:
; GFX90A-NEXT: successors: %bb.3(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr44_sgpr45:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x00000000000000FF, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr4_vgpr5:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr56_sgpr57:0x000000000000000F, $sgpr20_sgpr21_sgpr22_sgpr23:0x00000000000000FF, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000FF, $vgpr4_vgpr5:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr0 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: renamable $vgpr24_vgpr25 = DS_READ_B64_gfx9 killed renamable $vgpr0, 0, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) null`, addrspace 3)
@@ -852,99 +831,99 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: renamable $vgpr0 = COPY renamable $sgpr21, implicit $exec
; GFX90A-NEXT: renamable $vgpr2_vgpr3 = DS_READ_B64_gfx9 killed renamable $vgpr0, 0, 0, implicit $exec :: (load (s64) from %ir.4, addrspace 3)
; GFX90A-NEXT: renamable $vgpr0 = COPY killed renamable $sgpr15, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr12_vgpr13 = DS_READ_B64_gfx9 killed renamable $vgpr0, 0, 0, implicit $exec :: (load (s64) from %ir.420, addrspace 3)
+ ; GFX90A-NEXT: renamable $vgpr10_vgpr11 = DS_READ_B64_gfx9 killed renamable $vgpr0, 0, 0, implicit $exec :: (load (s64) from %ir.420, addrspace 3)
; GFX90A-NEXT: renamable $vgpr0 = COPY renamable $sgpr22, implicit $exec
; GFX90A-NEXT: renamable $vgpr26_vgpr27 = DS_READ_B64_gfx9 killed renamable $vgpr0, 0, 0, implicit $exec :: (load (s64) from %ir.5, addrspace 3)
; GFX90A-NEXT: renamable $sgpr36_sgpr37 = S_MOV_B64 -1
; GFX90A-NEXT: S_BRANCH %bb.3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.60.bb85:
- ; GFX90A-NEXT: successors: %bb.57(0x40000000), %bb.61(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45:0x000000000000000F, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.59.bb85:
+ ; GFX90A-NEXT: successors: %bb.56(0x40000000), %bb.60(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr56_sgpr57:0x000000000000000F, $sgpr62_sgpr63, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr8 = V_OR_B32_e32 1, $vgpr8, implicit $exec
; GFX90A-NEXT: renamable $vgpr3 = FLAT_LOAD_UBYTE renamable $vgpr8_vgpr9, 0, 0, implicit $exec, implicit $flat_scr :: (load (s8) from %ir.i86)
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_MOV_B64 -1
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_MOV_B64 -1
; GFX90A-NEXT: renamable $vcc = V_CMP_EQ_U16_e64 0, killed $vgpr3, implicit $exec
- ; GFX90A-NEXT: renamable $sgpr66_sgpr67 = COPY renamable $sgpr36_sgpr37
+ ; GFX90A-NEXT: renamable $sgpr64_sgpr65 = COPY renamable $sgpr36_sgpr37
; GFX90A-NEXT: renamable $sgpr15 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr18 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr14 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr20 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $sgpr23 = IMPLICIT_DEF
; GFX90A-NEXT: renamable $vgpr17 = IMPLICIT_DEF implicit-def $vgpr16
; GFX90A-NEXT: renamable $sgpr18 = IMPLICIT_DEF
- ; GFX90A-NEXT: renamable $vgpr12 = IMPLICIT_DEF
- ; GFX90A-NEXT: $sgpr56_sgpr57 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
- ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.57, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr10 = IMPLICIT_DEF
+ ; GFX90A-NEXT: $sgpr54_sgpr55 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
+ ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.56, implicit $exec
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.61.Flow31:
- ; GFX90A-NEXT: successors: %bb.62(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr62_sgpr63, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.60.Flow31:
+ ; GFX90A-NEXT: successors: %bb.61(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr56_sgpr57, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_MOV_B64 0
+ ; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr54_sgpr55, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_MOV_B64 0
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.62.Flow30:
- ; GFX90A-NEXT: successors: %bb.56(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr62_sgpr63, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.61.Flow30:
+ ; GFX90A-NEXT: successors: %bb.55(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19:0x0000000000000003, $sgpr24_sgpr25, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr62_sgpr63, $sgpr64_sgpr65, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x0000000000000003, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr58_sgpr59 = S_XOR_B64 $exec, -1, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr60_sgpr61 = S_AND_B64 killed renamable $sgpr44_sgpr45, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr54_sgpr55, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr44_sgpr45 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_AND_B64 killed renamable $sgpr66_sgpr67, $exec, implicit-def dead $scc
- ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_OR_B64 killed renamable $sgpr44_sgpr45, killed renamable $sgpr54_sgpr55, implicit-def dead $scc
- ; GFX90A-NEXT: S_BRANCH %bb.56
+ ; GFX90A-NEXT: renamable $sgpr60_sgpr61 = S_AND_B64 killed renamable $sgpr54_sgpr55, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr54_sgpr55 = S_AND_B64 killed renamable $sgpr52_sgpr53, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_ANDN2_B64 renamable $sgpr36_sgpr37, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr56_sgpr57 = S_AND_B64 killed renamable $sgpr64_sgpr65, $exec, implicit-def dead $scc
+ ; GFX90A-NEXT: renamable $sgpr52_sgpr53 = S_OR_B64 killed renamable $sgpr52_sgpr53, killed renamable $sgpr56_sgpr57, implicit-def dead $scc
+ ; GFX90A-NEXT: S_BRANCH %bb.55
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.63.bb140:
- ; GFX90A-NEXT: successors: %bb.69(0x40000000), %bb.64(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000F, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.62.bb140:
+ ; GFX90A-NEXT: successors: %bb.68(0x40000000), %bb.63(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000F, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr24_sgpr25 = S_MOV_B64 -1
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, killed renamable $sgpr30_sgpr31, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.69, implicit $vcc
+ ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.68, implicit $vcc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.64.Flow13:
- ; GFX90A-NEXT: successors: %bb.65(0x40000000), %bb.67(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr24_sgpr25, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.63.Flow13:
+ ; GFX90A-NEXT: successors: %bb.64(0x40000000), %bb.66(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr24_sgpr25, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: dead renamable $sgpr12_sgpr13 = S_AND_B64 killed renamable $sgpr24_sgpr25, $exec, implicit-def $scc
; GFX90A-NEXT: renamable $sgpr12 = S_CSELECT_B32 1, 0, implicit killed $scc
; GFX90A-NEXT: S_CMP_LG_U32 killed renamable $sgpr12, 1, implicit-def $scc
- ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.67, implicit killed $scc
+ ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.66, implicit killed $scc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.65.bb159:
- ; GFX90A-NEXT: successors: %bb.68(0x40000000), %bb.66(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.64.bb159:
+ ; GFX90A-NEXT: successors: %bb.67(0x40000000), %bb.65(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vcc = V_CMP_NE_U32_e64 0, killed $vgpr30, implicit $exec
; GFX90A-NEXT: $sgpr12_sgpr13 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: renamable $sgpr12_sgpr13 = S_XOR_B64 $exec, killed renamable $sgpr12_sgpr13, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.68, implicit $exec
+ ; GFX90A-NEXT: S_CBRANCH_EXECNZ %bb.67, implicit $exec
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.66.Flow10:
- ; GFX90A-NEXT: successors: %bb.67(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.65.Flow10:
+ ; GFX90A-NEXT: successors: %bb.66(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: $sgpr12_sgpr13 = S_ANDN2_SAVEEXEC_B64 $sgpr12_sgpr13, implicit-def $exec, implicit-def $scc, implicit $exec
; GFX90A-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr12_sgpr13, implicit-def dead $scc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.67.Flow14:
+ ; GFX90A-NEXT: bb.66.Flow14:
; GFX90A-NEXT: successors: %bb.8(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr16, $sgpr17, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr68_sgpr69 = COPY $exec
; GFX90A-NEXT: S_BRANCH %bb.8
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.68.bb161:
- ; GFX90A-NEXT: successors: %bb.66(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.67.bb161:
+ ; GFX90A-NEXT: successors: %bb.65(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr2 = V_OR_B32_e32 killed $vgpr23, killed $vgpr25, implicit $exec
; GFX90A-NEXT: renamable $vgpr2 = V_OR_B32_e32 killed $vgpr2, killed $vgpr27, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr3 = V_OR_B32_e32 killed $vgpr13, killed $vgpr3, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr3 = V_OR_B32_e32 killed $vgpr11, killed $vgpr3, implicit $exec
; GFX90A-NEXT: renamable $vgpr2 = V_OR_B32_e32 killed $vgpr3, killed $vgpr2, implicit $exec
; GFX90A-NEXT: dead renamable $sgpr20 = S_AND_B32 killed renamable $sgpr23, 255, implicit-def $scc
; GFX90A-NEXT: renamable $vcc = S_CSELECT_B64 0, -1, implicit killed $scc
@@ -954,39 +933,39 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: dead renamable $sgpr15 = S_AND_B32 killed renamable $sgpr15, 255, implicit-def $scc
; GFX90A-NEXT: renamable $vcc = S_CSELECT_B64 0, -1, implicit killed $scc
; GFX90A-NEXT: renamable $vgpr2 = V_CNDMASK_B32_e64 0, 0, 0, killed $vgpr2, killed $vcc, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr2 = V_OR_B32_e32 killed $vgpr2, killed $vgpr10, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr2 = V_OR_B32_e32 killed $vgpr2, killed $vgpr12, implicit $exec
; GFX90A-NEXT: renamable $vgpr3 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: DS_WRITE2_B32_gfx9 killed renamable $vgpr3, killed renamable $vgpr2, renamable $vgpr3, 0, 1, 0, implicit $exec :: (store (s64) into `ptr addrspace(3) null`, align 4, addrspace 3)
- ; GFX90A-NEXT: S_BRANCH %bb.66
+ ; GFX90A-NEXT: S_BRANCH %bb.65
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.69.bb174:
- ; GFX90A-NEXT: successors: %bb.73(0x40000000), %bb.70(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000F, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.68.bb174:
+ ; GFX90A-NEXT: successors: %bb.72(0x40000000), %bb.69(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr28_sgpr29, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000F, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000F, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000F, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000F, $vgpr24_vgpr25:0x000000000000000F, $vgpr26_vgpr27:0x000000000000000F, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr28 = V_OR_B32_e32 1, $vgpr26, implicit $exec
; GFX90A-NEXT: renamable $vgpr50 = V_OR_B32_e32 $vgpr28, $vgpr24, implicit $exec
; GFX90A-NEXT: renamable $vgpr36 = V_OR_B32_e32 $vgpr50, $vgpr22, implicit $exec
; GFX90A-NEXT: renamable $vgpr32 = V_CNDMASK_B32_e64 0, $vgpr36, 0, 0, $sgpr12_sgpr13, implicit $exec
; GFX90A-NEXT: renamable $vgpr48 = V_OR_B32_e32 $vgpr32, $vgpr2, implicit $exec
- ; GFX90A-NEXT: renamable $vgpr38 = V_OR_B32_e32 $vgpr48, $vgpr12, implicit $exec
+ ; GFX90A-NEXT: renamable $vgpr38 = V_OR_B32_e32 $vgpr48, $vgpr10, implicit $exec
; GFX90A-NEXT: renamable $vgpr34 = V_OR_B32_e32 $vgpr38, $vgpr16, implicit $exec
; GFX90A-NEXT: renamable $vgpr52 = V_CNDMASK_B32_e64 0, 0, 0, $vgpr34, killed $sgpr12_sgpr13, implicit $exec
; GFX90A-NEXT: renamable $sgpr12_sgpr13 = S_MOV_B64 -1
; GFX90A-NEXT: renamable $vcc = S_AND_B64 $exec, killed renamable $sgpr28_sgpr29, implicit-def dead $scc
- ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.73, implicit $vcc
+ ; GFX90A-NEXT: S_CBRANCH_VCCNZ %bb.72, implicit $vcc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.70.Flow:
- ; GFX90A-NEXT: successors: %bb.71(0x40000000), %bb.72(0x40000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr28_vgpr29:0x0000000000000003, $vgpr32_vgpr33:0x0000000000000003, $vgpr34_vgpr35:0x0000000000000003, $vgpr36_vgpr37:0x0000000000000003, $vgpr38_vgpr39:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr48_vgpr49:0x0000000000000003, $vgpr50_vgpr51:0x0000000000000003, $vgpr52_vgpr53:0x0000000000000003, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.69.Flow:
+ ; GFX90A-NEXT: successors: %bb.70(0x40000000), %bb.71(0x40000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr28_vgpr29:0x0000000000000003, $vgpr32_vgpr33:0x0000000000000003, $vgpr34_vgpr35:0x0000000000000003, $vgpr36_vgpr37:0x0000000000000003, $vgpr38_vgpr39:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr48_vgpr49:0x0000000000000003, $vgpr50_vgpr51:0x0000000000000003, $vgpr52_vgpr53:0x0000000000000003, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: dead renamable $sgpr12_sgpr13 = S_AND_B64 killed renamable $sgpr12_sgpr13, $exec, implicit-def $scc
; GFX90A-NEXT: renamable $sgpr12 = S_CSELECT_B32 1, 0, implicit killed $scc
; GFX90A-NEXT: S_CMP_LG_U32 killed renamable $sgpr12, 1, implicit-def $scc
- ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.72, implicit killed $scc
+ ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.71, implicit killed $scc
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.71.bb186:
- ; GFX90A-NEXT: successors: %bb.72(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr28_vgpr29:0x0000000000000003, $vgpr32_vgpr33:0x0000000000000003, $vgpr34_vgpr35:0x0000000000000003, $vgpr36_vgpr37:0x0000000000000003, $vgpr38_vgpr39:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr48_vgpr49:0x0000000000000003, $vgpr50_vgpr51:0x0000000000000003, $vgpr52_vgpr53:0x0000000000000003, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.70.bb186:
+ ; GFX90A-NEXT: successors: %bb.71(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr28_vgpr29:0x0000000000000003, $vgpr32_vgpr33:0x0000000000000003, $vgpr34_vgpr35:0x0000000000000003, $vgpr36_vgpr37:0x0000000000000003, $vgpr38_vgpr39:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr48_vgpr49:0x0000000000000003, $vgpr50_vgpr51:0x0000000000000003, $vgpr52_vgpr53:0x0000000000000003, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr4_vgpr5 = nsw V_LSHLREV_B64_e64 3, killed $vgpr4_vgpr5, implicit $exec
; GFX90A-NEXT: renamable $vgpr2 = COPY renamable $sgpr27, implicit $exec
@@ -1003,8 +982,8 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: DS_WRITE_B64_gfx9 renamable $vgpr29, renamable $vgpr28_vgpr29, 0, 0, implicit $exec :: (store (s64) into `ptr addrspace(3) null`, addrspace 3)
; GFX90A-NEXT: renamable $vgpr5 = COPY renamable $sgpr21, implicit $exec
; GFX90A-NEXT: DS_WRITE_B64_gfx9 renamable $vgpr5, killed renamable $vgpr50_vgpr51, 0, 0, implicit $exec :: (store (s64) into %ir.4, addrspace 3)
- ; GFX90A-NEXT: renamable $vgpr11 = COPY killed renamable $sgpr22, implicit $exec
- ; GFX90A-NEXT: DS_WRITE_B64_gfx9 killed renamable $vgpr11, killed renamable $vgpr36_vgpr37, 0, 0, implicit $exec :: (store (s64) into %ir.5, addrspace 3)
+ ; GFX90A-NEXT: renamable $vgpr10 = COPY killed renamable $sgpr22, implicit $exec
+ ; GFX90A-NEXT: DS_WRITE_B64_gfx9 killed renamable $vgpr10, killed renamable $vgpr36_vgpr37, 0, 0, implicit $exec :: (store (s64) into %ir.5, addrspace 3)
; GFX90A-NEXT: DS_WRITE_B64_gfx9 renamable $vgpr29, killed renamable $vgpr48_vgpr49, 0, 0, implicit $exec :: (store (s64) into `ptr addrspace(3) null`, addrspace 3)
; GFX90A-NEXT: DS_WRITE_B64_gfx9 renamable $vgpr5, killed renamable $vgpr38_vgpr39, 0, 0, implicit $exec :: (store (s64) into %ir.4, addrspace 3)
; GFX90A-NEXT: DS_WRITE_B64_gfx9 renamable $vgpr29, killed renamable $vgpr32_vgpr33, 0, 0, implicit $exec :: (store (s64) into `ptr addrspace(3) null`, addrspace 3)
@@ -1013,23 +992,23 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null` + 4, basealign 8, addrspace 5)
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr4, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(5) null`, align 8, addrspace 5)
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.72.Flow9:
- ; GFX90A-NEXT: successors: %bb.64(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.71.Flow9:
+ ; GFX90A-NEXT: successors: %bb.63(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $sgpr24_sgpr25 = S_MOV_B64 0
- ; GFX90A-NEXT: S_BRANCH %bb.64
+ ; GFX90A-NEXT: S_BRANCH %bb.63
; GFX90A-NEXT: {{ $}}
- ; GFX90A-NEXT: bb.73.bb196:
- ; GFX90A-NEXT: successors: %bb.70(0x80000000)
- ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr56_sgpr57, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x0000000000000003, $vgpr12_vgpr13:0x000000000000000C, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr28_vgpr29:0x0000000000000003, $vgpr32_vgpr33:0x0000000000000003, $vgpr34_vgpr35:0x0000000000000003, $vgpr36_vgpr37:0x0000000000000003, $vgpr38_vgpr39:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr48_vgpr49:0x0000000000000003, $vgpr50_vgpr51:0x0000000000000003, $vgpr52_vgpr53:0x0000000000000003, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
+ ; GFX90A-NEXT: bb.72.bb196:
+ ; GFX90A-NEXT: successors: %bb.69(0x80000000)
+ ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr23, $vgpr30, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9:0x000000000000000F, $sgpr10_sgpr11, $sgpr18_sgpr19, $sgpr34_sgpr35, $sgpr38_sgpr39, $sgpr40_sgpr41, $sgpr42_sgpr43, $sgpr44_sgpr45, $sgpr46_sgpr47, $sgpr48_sgpr49, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55, $sgpr64_sgpr65, $sgpr66_sgpr67, $sgpr20_sgpr21_sgpr22_sgpr23:0x000000000000003C, $sgpr24_sgpr25_sgpr26_sgpr27:0x00000000000000F0, $vgpr0_vgpr1:0x000000000000000F, $vgpr2_vgpr3:0x000000000000000C, $vgpr4_vgpr5:0x000000000000000F, $vgpr6_vgpr7:0x000000000000000F, $vgpr8_vgpr9:0x000000000000000F, $vgpr10_vgpr11:0x000000000000000C, $vgpr12_vgpr13:0x0000000000000003, $vgpr14_vgpr15:0x0000000000000003, $vgpr16_vgpr17:0x000000000000000C, $vgpr18_vgpr19:0x0000000000000003, $vgpr20_vgpr21:0x0000000000000003, $vgpr22_vgpr23:0x000000000000000C, $vgpr24_vgpr25:0x000000000000000C, $vgpr26_vgpr27:0x000000000000000C, $vgpr28_vgpr29:0x0000000000000003, $vgpr32_vgpr33:0x0000000000000003, $vgpr34_vgpr35:0x0000000000000003, $vgpr36_vgpr37:0x0000000000000003, $vgpr38_vgpr39:0x0000000000000003, $vgpr40_vgpr41:0x000000000000000F, $vgpr42_vgpr43:0x000000000000000F, $vgpr44_vgpr45:0x000000000000000F, $vgpr46_vgpr47:0x000000000000000F, $vgpr48_vgpr49:0x0000000000000003, $vgpr50_vgpr51:0x0000000000000003, $vgpr52_vgpr53:0x0000000000000003, $vgpr54_vgpr55:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F, $vgpr62_vgpr63:0x000000000000000F, $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: renamable $vgpr2 = V_OR_B32_e32 $vgpr52, killed $vgpr20, implicit $exec
; GFX90A-NEXT: renamable $vgpr18 = V_OR_B32_e32 killed $vgpr2, killed $vgpr18, implicit $exec
; GFX90A-NEXT: renamable $vgpr19 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
; GFX90A-NEXT: DS_WRITE_B64_gfx9 killed renamable $vgpr19, renamable $vgpr18_vgpr19, 0, 0, implicit $exec :: (store (s64) into `ptr addrspace(3) null`, addrspace 3)
; GFX90A-NEXT: renamable $sgpr12_sgpr13 = S_MOV_B64 0
- ; GFX90A-NEXT: S_BRANCH %bb.70
+ ; GFX90A-NEXT: S_BRANCH %bb.69
bb:
%i = tail call i32 @llvm.amdgcn.workitem.id.x()
%i11 = icmp eq i32 %i, 0
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll b/llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
index 79e9f643074f2..92f3bfa10e8d3 100644
--- a/llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
+++ b/llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
@@ -1207,32 +1207,32 @@ define amdgpu_kernel void @long_branch_hang(ptr addrspace(1) nocapture %arg, i32
; GCN-NEXT: v_nop
; GCN-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
; GCN-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c nv
-; GCN-NEXT: s_mov_b32 s8, -1
+; GCN-NEXT: s_mov_b32 s7, -1
; GCN-NEXT: s_wait_kmcnt 0x0
; GCN-NEXT: s_cmp_eq_u32 s0, 0
; GCN-NEXT: s_cselect_b32 s6, -1, 0
; GCN-NEXT: s_cmp_lg_u32 s0, 0
; GCN-NEXT: s_mov_b32 s0, 0
-; GCN-NEXT: s_cselect_b32 s7, -1, 0
+; GCN-NEXT: s_cselect_b32 s8, -1, 0
; GCN-NEXT: s_cmp_lt_i32 s3, 6
; GCN-NEXT: s_cbranch_scc1 .LBB10_1
; GCN-NEXT: ; %bb.7: ; %bb
-; GCN-NEXT: s_get_pc_i64 s[10:11]
+; GCN-NEXT: s_get_pc_i64 s[8:9]
; GCN-NEXT: .Lpost_getpc11:
-; GCN-NEXT: s_add_co_u32 s10, s10, (.LBB10_2-.Lpost_getpc11)&4294967295
-; GCN-NEXT: s_add_co_ci_u32 s11, s11, (.LBB10_2-.Lpost_getpc11)>>32
-; GCN-NEXT: s_set_pc_i64 s[10:11]
+; GCN-NEXT: s_add_co_u32 s8, s8, (.LBB10_2-.Lpost_getpc11)&4294967295
+; GCN-NEXT: s_add_co_ci_u32 s9, s9, (.LBB10_2-.Lpost_getpc11)>>32
+; GCN-NEXT: s_set_pc_i64 s[8:9]
; GCN-NEXT: .LBB10_1: ; %bb13
; GCN-NEXT: ;;#ASMSTART
; GCN-NEXT: v_nop_e64
; GCN-NEXT: v_nop_e64
; GCN-NEXT: ;;#ASMEND
; GCN-NEXT: s_sleep 0
-; GCN-NEXT: s_mov_b32 s8, 0
-; GCN-NEXT: s_mov_b32 s0, s7
+; GCN-NEXT: s_mov_b32 s7, 0
+; GCN-NEXT: s_mov_b32 s0, s8
; GCN-NEXT: s_sleep 0
; GCN-NEXT: .LBB10_2: ; %Flow
-; GCN-NEXT: s_and_b32 s7, s8, exec_lo
+; GCN-NEXT: s_and_b32 s7, s7, exec_lo
; GCN-NEXT: s_cselect_b32 s7, 1, 0
; GCN-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GCN-NEXT: s_cmp_lg_u32 s7, 1
@@ -1287,13 +1287,13 @@ define amdgpu_kernel void @long_branch_hang(ptr addrspace(1) nocapture %arg, i32
; GCN-ADD-PC64-NEXT: v_nop
; GCN-ADD-PC64-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
; GCN-ADD-PC64-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c nv
-; GCN-ADD-PC64-NEXT: s_mov_b32 s8, -1
+; GCN-ADD-PC64-NEXT: s_mov_b32 s7, -1
; GCN-ADD-PC64-NEXT: s_wait_kmcnt 0x0
; GCN-ADD-PC64-NEXT: s_cmp_eq_u32 s0, 0
; GCN-ADD-PC64-NEXT: s_cselect_b32 s6, -1, 0
; GCN-ADD-PC64-NEXT: s_cmp_lg_u32 s0, 0
; GCN-ADD-PC64-NEXT: s_mov_b32 s0, 0
-; GCN-ADD-PC64-NEXT: s_cselect_b32 s7, -1, 0
+; GCN-ADD-PC64-NEXT: s_cselect_b32 s8, -1, 0
; GCN-ADD-PC64-NEXT: s_cmp_lt_i32 s3, 6
; GCN-ADD-PC64-NEXT: s_cbranch_scc1 .LBB10_1
; GCN-ADD-PC64-NEXT: ; %bb.7: ; %bb
@@ -1305,11 +1305,11 @@ define amdgpu_kernel void @long_branch_hang(ptr addrspace(1) nocapture %arg, i32
; GCN-ADD-PC64-NEXT: v_nop_e64
; GCN-ADD-PC64-NEXT: ;;#ASMEND
; GCN-ADD-PC64-NEXT: s_sleep 0
-; GCN-ADD-PC64-NEXT: s_mov_b32 s8, 0
-; GCN-ADD-PC64-NEXT: s_mov_b32 s0, s7
+; GCN-ADD-PC64-NEXT: s_mov_b32 s7, 0
+; GCN-ADD-PC64-NEXT: s_mov_b32 s0, s8
; GCN-ADD-PC64-NEXT: s_sleep 0
; GCN-ADD-PC64-NEXT: .LBB10_2: ; %Flow
-; GCN-ADD-PC64-NEXT: s_and_b32 s7, s8, exec_lo
+; GCN-ADD-PC64-NEXT: s_and_b32 s7, s7, exec_lo
; GCN-ADD-PC64-NEXT: s_cselect_b32 s7, 1, 0
; GCN-ADD-PC64-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GCN-ADD-PC64-NEXT: s_cmp_lg_u32 s7, 1
diff --git a/llvm/test/CodeGen/AMDGPU/bypass-div.ll b/llvm/test/CodeGen/AMDGPU/bypass-div.ll
index b5f454041dc85..c4be23eb40c95 100644
--- a/llvm/test/CodeGen/AMDGPU/bypass-div.ll
+++ b/llvm/test/CodeGen/AMDGPU/bypass-div.ll
@@ -884,10 +884,10 @@ define <2 x i64> @udivrem64(i64 %a, i64 %b) {
; GFX9-LABEL: udivrem64:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v5, v3
+; GFX9-NEXT: v_mov_b32_e32 v6, v3
; GFX9-NEXT: v_mov_b32_e32 v7, v1
-; GFX9-NEXT: v_mov_b32_e32 v6, v0
-; GFX9-NEXT: v_or_b32_e32 v0, v7, v5
+; GFX9-NEXT: v_mov_b32_e32 v5, v0
+; GFX9-NEXT: v_or_b32_e32 v0, v7, v6
; GFX9-NEXT: v_mov_b32_e32 v4, v2
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: ; implicit-def: $vgpr2_vgpr3
@@ -903,9 +903,9 @@ define <2 x i64> @udivrem64(i64 %a, i64 %b) {
; GFX9-NEXT: s_setpc_b64 s[30:31]
; GFX9-NEXT: .LBB9_3:
; GFX9-NEXT: v_cvt_f32_u32_e32 v0, v4
-; GFX9-NEXT: v_cvt_f32_u32_e32 v1, v5
+; GFX9-NEXT: v_cvt_f32_u32_e32 v1, v6
; GFX9-NEXT: v_sub_co_u32_e32 v13, vcc, 0, v4
-; GFX9-NEXT: v_subb_co_u32_e32 v14, vcc, 0, v5, vcc
+; GFX9-NEXT: v_subb_co_u32_e32 v14, vcc, 0, v6, vcc
; GFX9-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v0
; GFX9-NEXT: v_rcp_f32_e32 v0, v0
; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
@@ -948,8 +948,8 @@ define <2 x i64> @udivrem64(i64 %a, i64 %b) {
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v10, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, v3, v1, vcc
-; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v6, v8, 0
-; GFX9-NEXT: v_mul_hi_u32 v9, v6, v2
+; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, v8, 0
+; GFX9-NEXT: v_mul_hi_u32 v9, v5, v2
; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v7, v2, 0
; GFX9-NEXT: v_add_co_u32_e32 v9, vcc, v9, v0
; GFX9-NEXT: v_addc_co_u32_e32 v10, vcc, 0, v1, vcc
@@ -959,47 +959,47 @@ define <2 x i64> @udivrem64(i64 %a, i64 %b) {
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v1, vcc
-; GFX9-NEXT: v_mul_lo_u32 v8, v5, v2
+; GFX9-NEXT: v_mul_lo_u32 v8, v6, v2
; GFX9-NEXT: v_mul_lo_u32 v9, v4, v3
; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v2, 0
; GFX9-NEXT: v_add3_u32 v1, v1, v9, v8
; GFX9-NEXT: v_sub_u32_e32 v8, v7, v1
-; GFX9-NEXT: v_sub_co_u32_e32 v6, vcc, v6, v0
-; GFX9-NEXT: v_subb_co_u32_e64 v8, s[4:5], v8, v5, vcc
-; GFX9-NEXT: v_sub_co_u32_e64 v9, s[4:5], v6, v4
+; GFX9-NEXT: v_sub_co_u32_e32 v5, vcc, v5, v0
+; GFX9-NEXT: v_subb_co_u32_e64 v8, s[4:5], v8, v6, vcc
+; GFX9-NEXT: v_sub_co_u32_e64 v9, s[4:5], v5, v4
; GFX9-NEXT: v_subbrev_co_u32_e64 v10, s[6:7], 0, v8, s[4:5]
-; GFX9-NEXT: v_cmp_ge_u32_e64 s[6:7], v10, v5
+; GFX9-NEXT: v_cmp_ge_u32_e64 s[6:7], v10, v6
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1, s[6:7]
; GFX9-NEXT: v_cmp_ge_u32_e64 s[6:7], v9, v4
; GFX9-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[6:7]
-; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], v10, v5
+; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], v10, v6
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v11, s[6:7]
; GFX9-NEXT: v_add_co_u32_e64 v11, s[6:7], 2, v2
; GFX9-NEXT: v_addc_co_u32_e64 v12, s[6:7], 0, v3, s[6:7]
; GFX9-NEXT: v_add_co_u32_e64 v13, s[6:7], 1, v2
; GFX9-NEXT: v_subb_co_u32_e32 v7, vcc, v7, v1, vcc
; GFX9-NEXT: v_addc_co_u32_e64 v14, s[6:7], 0, v3, s[6:7]
-; GFX9-NEXT: v_cmp_ge_u32_e32 vcc, v7, v5
+; GFX9-NEXT: v_cmp_ge_u32_e32 vcc, v7, v6
; GFX9-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v0
; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
-; GFX9-NEXT: v_cmp_ge_u32_e32 vcc, v6, v4
+; GFX9-NEXT: v_cmp_ge_u32_e32 vcc, v5, v4
; GFX9-NEXT: v_cndmask_b32_e64 v0, v14, v12, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc
-; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v7, v5
+; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v7, v6
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v0, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v0, v13, v11, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
-; GFX9-NEXT: v_subb_co_u32_e64 v2, s[4:5], v8, v5, s[4:5]
+; GFX9-NEXT: v_subb_co_u32_e64 v2, s[4:5], v8, v6, s[4:5]
; GFX9-NEXT: v_sub_co_u32_e64 v4, s[4:5], v9, v4
; GFX9-NEXT: v_subbrev_co_u32_e64 v2, s[4:5], 0, v2, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v9, v4, s[6:7]
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc
; GFX9-NEXT: ; implicit-def: $vgpr4
-; GFX9-NEXT: ; implicit-def: $vgpr6
+; GFX9-NEXT: ; implicit-def: $vgpr5
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[8:9]
; GFX9-NEXT: s_cbranch_execz .LBB9_2
; GFX9-NEXT: .LBB9_4:
@@ -1011,11 +1011,11 @@ define <2 x i64> @udivrem64(i64 %a, i64 %b) {
; GFX9-NEXT: v_mul_lo_u32 v1, v1, v0
; GFX9-NEXT: v_mul_hi_u32 v1, v0, v1
; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
-; GFX9-NEXT: v_mul_hi_u32 v0, v6, v0
+; GFX9-NEXT: v_mul_hi_u32 v0, v5, v0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: v_mul_lo_u32 v2, v0, v4
; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
-; GFX9-NEXT: v_sub_u32_e32 v2, v6, v2
+; GFX9-NEXT: v_sub_u32_e32 v2, v5, v2
; GFX9-NEXT: v_sub_u32_e32 v5, v2, v4
; GFX9-NEXT: v_cmp_ge_u32_e32 vcc, v2, v4
; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc
diff --git a/llvm/test/CodeGen/AMDGPU/div_i128.ll b/llvm/test/CodeGen/AMDGPU/div_i128.ll
index 5ff48c8c20c3e..44db4fd1fa82f 100644
--- a/llvm/test/CodeGen/AMDGPU/div_i128.ll
+++ b/llvm/test/CodeGen/AMDGPU/div_i128.ll
@@ -1176,8 +1176,8 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: v_subb_co_u32_e32 v9, vcc, v1, v16, vcc
; GFX9-G-NEXT: v_ashrrev_i32_e32 v17, 31, v7
; GFX9-G-NEXT: v_xor_b32_e32 v3, v16, v3
-; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v2, v16, vcc
-; GFX9-G-NEXT: v_subb_co_u32_e32 v11, vcc, v3, v16, vcc
+; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v2, v16, vcc
+; GFX9-G-NEXT: v_subb_co_u32_e32 v13, vcc, v3, v16, vcc
; GFX9-G-NEXT: v_xor_b32_e32 v0, v17, v4
; GFX9-G-NEXT: v_xor_b32_e32 v1, v17, v5
; GFX9-G-NEXT: v_sub_co_u32_e32 v18, vcc, v0, v17
@@ -1189,8 +1189,8 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: v_or_b32_e32 v0, v18, v4
; GFX9-G-NEXT: v_or_b32_e32 v1, v19, v5
; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GFX9-G-NEXT: v_or_b32_e32 v0, v8, v10
-; GFX9-G-NEXT: v_or_b32_e32 v1, v9, v11
+; GFX9-G-NEXT: v_or_b32_e32 v0, v8, v12
+; GFX9-G-NEXT: v_or_b32_e32 v1, v9, v13
; GFX9-G-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1]
; GFX9-G-NEXT: v_ffbh_u32_e32 v1, v18
; GFX9-G-NEXT: v_ffbh_u32_e32 v0, v19
@@ -1207,11 +1207,11 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GFX9-G-NEXT: v_ffbh_u32_e32 v1, v9
; GFX9-G-NEXT: v_add_u32_e32 v2, 32, v2
-; GFX9-G-NEXT: v_ffbh_u32_e32 v3, v10
+; GFX9-G-NEXT: v_ffbh_u32_e32 v3, v12
; GFX9-G-NEXT: v_min_u32_e32 v1, v1, v2
-; GFX9-G-NEXT: v_ffbh_u32_e32 v2, v11
+; GFX9-G-NEXT: v_ffbh_u32_e32 v2, v13
; GFX9-G-NEXT: v_add_u32_e32 v3, 32, v3
-; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11]
+; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[12:13]
; GFX9-G-NEXT: v_add_u32_e32 v1, 64, v1
; GFX9-G-NEXT: v_min_u32_e32 v2, v2, v3
; GFX9-G-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc
@@ -1239,8 +1239,8 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: s_or_b64 s[4:5], s[10:11], s[4:5]
; GFX9-G-NEXT: v_cndmask_b32_e64 v6, v8, 0, s[10:11]
; GFX9-G-NEXT: v_cndmask_b32_e64 v7, v9, 0, s[10:11]
-; GFX9-G-NEXT: v_cndmask_b32_e64 v12, v10, 0, s[10:11]
-; GFX9-G-NEXT: v_cndmask_b32_e64 v13, v11, 0, s[10:11]
+; GFX9-G-NEXT: v_cndmask_b32_e64 v10, v12, 0, s[10:11]
+; GFX9-G-NEXT: v_cndmask_b32_e64 v11, v13, 0, s[10:11]
; GFX9-G-NEXT: s_xor_b64 s[4:5], s[4:5], s[6:7]
; GFX9-G-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; GFX9-G-NEXT: s_cbranch_execz .LBB0_6
@@ -1251,23 +1251,23 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: s_mov_b64 s[4:5], exec
; GFX9-G-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v3, vcc
; GFX9-G-NEXT: s_xor_b64 s[4:5], vcc, s[4:5]
-; GFX9-G-NEXT: v_sub_co_u32_e32 v12, vcc, 0x7f, v0
-; GFX9-G-NEXT: v_sub_u32_e32 v0, 64, v12
+; GFX9-G-NEXT: v_sub_co_u32_e32 v10, vcc, 0x7f, v0
+; GFX9-G-NEXT: v_sub_u32_e32 v0, 64, v10
; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v0, v[8:9]
-; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v12, v[10:11]
-; GFX9-G-NEXT: v_add_u32_e32 v13, 0xffffffc0, v12
-; GFX9-G-NEXT: v_lshlrev_b64 v[6:7], v12, v[8:9]
+; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v10, v[12:13]
+; GFX9-G-NEXT: v_add_u32_e32 v11, 0xffffffc0, v10
+; GFX9-G-NEXT: v_lshlrev_b64 v[6:7], v10, v[8:9]
; GFX9-G-NEXT: v_or_b32_e32 v2, v0, v2
; GFX9-G-NEXT: v_or_b32_e32 v3, v1, v3
-; GFX9-G-NEXT: v_lshlrev_b64 v[0:1], v13, v[8:9]
-; GFX9-G-NEXT: v_cmp_gt_u32_e32 vcc, 64, v12
+; GFX9-G-NEXT: v_lshlrev_b64 v[0:1], v11, v[8:9]
+; GFX9-G-NEXT: v_cmp_gt_u32_e32 vcc, 64, v10
; GFX9-G-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc
; GFX9-G-NEXT: v_cndmask_b32_e32 v7, 0, v7, vcc
; GFX9-G-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX9-G-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
-; GFX9-G-NEXT: v_cmp_eq_u32_e32 vcc, 0, v12
-; GFX9-G-NEXT: v_cndmask_b32_e32 v12, v0, v10, vcc
-; GFX9-G-NEXT: v_cndmask_b32_e32 v13, v1, v11, vcc
+; GFX9-G-NEXT: v_cmp_eq_u32_e32 vcc, 0, v10
+; GFX9-G-NEXT: v_cndmask_b32_e32 v10, v0, v12, vcc
+; GFX9-G-NEXT: v_cndmask_b32_e32 v11, v1, v13, vcc
; GFX9-G-NEXT: s_mov_b64 s[10:11], s[8:9]
; GFX9-G-NEXT: v_mov_b32_e32 v0, s8
; GFX9-G-NEXT: v_mov_b32_e32 v1, s9
@@ -1279,12 +1279,12 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: ; %bb.2: ; %udiv-preheader
; GFX9-G-NEXT: v_sub_u32_e32 v2, 64, v20
; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v20, v[8:9]
-; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v2, v[10:11]
+; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v2, v[12:13]
; GFX9-G-NEXT: v_add_u32_e32 v24, 0xffffffc0, v20
-; GFX9-G-NEXT: v_lshrrev_b64 v[14:15], v20, v[10:11]
+; GFX9-G-NEXT: v_lshrrev_b64 v[14:15], v20, v[12:13]
; GFX9-G-NEXT: v_or_b32_e32 v2, v0, v2
; GFX9-G-NEXT: v_or_b32_e32 v3, v1, v3
-; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v24, v[10:11]
+; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v24, v[12:13]
; GFX9-G-NEXT: v_cmp_gt_u32_e32 vcc, 64, v20
; GFX9-G-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX9-G-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
@@ -1295,8 +1295,8 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: s_mov_b64 s[8:9], 0
; GFX9-G-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v20
; GFX9-G-NEXT: v_addc_co_u32_e32 v26, vcc, -1, v4, vcc
-; GFX9-G-NEXT: v_cndmask_b32_e64 v10, v0, v8, s[4:5]
-; GFX9-G-NEXT: v_cndmask_b32_e64 v11, v1, v9, s[4:5]
+; GFX9-G-NEXT: v_cndmask_b32_e64 v12, v0, v8, s[4:5]
+; GFX9-G-NEXT: v_cndmask_b32_e64 v13, v1, v9, s[4:5]
; GFX9-G-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v5, vcc
; GFX9-G-NEXT: s_mov_b64 s[10:11], s[8:9]
; GFX9-G-NEXT: v_mov_b32_e32 v9, 0
@@ -1311,21 +1311,21 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: v_lshrrev_b32_e32 v8, 31, v7
; GFX9-G-NEXT: v_or_b32_e32 v6, v0, v2
; GFX9-G-NEXT: v_or_b32_e32 v7, v1, v3
-; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[10:11]
-; GFX9-G-NEXT: v_lshrrev_b32_e32 v10, 31, v13
+; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[12:13]
+; GFX9-G-NEXT: v_lshrrev_b32_e32 v12, 31, v11
; GFX9-G-NEXT: v_lshlrev_b64 v[0:1], 1, v[14:15]
-; GFX9-G-NEXT: v_or_b32_e32 v2, v2, v10
-; GFX9-G-NEXT: v_lshrrev_b32_e32 v14, 31, v11
-; GFX9-G-NEXT: v_sub_co_u32_e32 v10, vcc, v24, v2
+; GFX9-G-NEXT: v_or_b32_e32 v2, v2, v12
+; GFX9-G-NEXT: v_lshrrev_b32_e32 v14, 31, v13
+; GFX9-G-NEXT: v_sub_co_u32_e32 v12, vcc, v24, v2
; GFX9-G-NEXT: v_or_b32_e32 v0, v0, v14
-; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v25, v3, vcc
-; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v26, v0, vcc
-; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v27, v1, vcc
-; GFX9-G-NEXT: v_ashrrev_i32_e32 v28, 31, v10
-; GFX9-G-NEXT: v_and_b32_e32 v10, v28, v18
-; GFX9-G-NEXT: v_and_b32_e32 v11, v28, v19
-; GFX9-G-NEXT: v_sub_co_u32_e32 v10, vcc, v2, v10
-; GFX9-G-NEXT: v_subb_co_u32_e32 v11, vcc, v3, v11, vcc
+; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v25, v3, vcc
+; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v26, v0, vcc
+; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v27, v1, vcc
+; GFX9-G-NEXT: v_ashrrev_i32_e32 v28, 31, v12
+; GFX9-G-NEXT: v_and_b32_e32 v12, v28, v18
+; GFX9-G-NEXT: v_and_b32_e32 v13, v28, v19
+; GFX9-G-NEXT: v_sub_co_u32_e32 v12, vcc, v2, v12
+; GFX9-G-NEXT: v_subb_co_u32_e32 v13, vcc, v3, v13, vcc
; GFX9-G-NEXT: v_and_b32_e32 v2, v28, v4
; GFX9-G-NEXT: v_and_b32_e32 v3, v28, v5
; GFX9-G-NEXT: v_subb_co_u32_e32 v14, vcc, v0, v2, vcc
@@ -1336,9 +1336,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: v_addc_co_u32_e32 v23, vcc, -1, v23, vcc
; GFX9-G-NEXT: v_or_b32_e32 v0, v20, v22
; GFX9-G-NEXT: v_or_b32_e32 v1, v21, v23
-; GFX9-G-NEXT: v_lshlrev_b64 v[12:13], 1, v[12:13]
+; GFX9-G-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11]
; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GFX9-G-NEXT: v_or_b32_e32 v12, v12, v8
+; GFX9-G-NEXT: v_or_b32_e32 v10, v10, v8
; GFX9-G-NEXT: v_and_b32_e32 v8, 1, v28
; GFX9-G-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
; GFX9-G-NEXT: v_mov_b32_e32 v0, v8
@@ -1350,9 +1350,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: .LBB0_5: ; %Flow2
; GFX9-G-NEXT: s_or_b64 exec, exec, s[12:13]
; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[6:7]
-; GFX9-G-NEXT: v_lshlrev_b64 v[12:13], 1, v[12:13]
+; GFX9-G-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11]
; GFX9-G-NEXT: v_lshrrev_b32_e32 v4, 31, v7
-; GFX9-G-NEXT: v_or_b32_e32 v12, v12, v4
+; GFX9-G-NEXT: v_or_b32_e32 v10, v10, v4
; GFX9-G-NEXT: v_or_b32_e32 v6, v0, v2
; GFX9-G-NEXT: v_or_b32_e32 v7, v1, v3
; GFX9-G-NEXT: .LBB0_6: ; %Flow3
@@ -1361,9 +1361,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
; GFX9-G-NEXT: v_xor_b32_e32 v0, v6, v3
; GFX9-G-NEXT: v_xor_b32_e32 v1, v7, v3
; GFX9-G-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v3
-; GFX9-G-NEXT: v_xor_b32_e32 v2, v12, v3
+; GFX9-G-NEXT: v_xor_b32_e32 v2, v10, v3
; GFX9-G-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc
-; GFX9-G-NEXT: v_xor_b32_e32 v4, v13, v3
+; GFX9-G-NEXT: v_xor_b32_e32 v4, v11, v3
; GFX9-G-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v3, vcc
; GFX9-G-NEXT: v_subb_co_u32_e32 v3, vcc, v4, v3, vcc
; GFX9-G-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/div_v2i128.ll b/llvm/test/CodeGen/AMDGPU/div_v2i128.ll
index 408c8f9cf4fc1..19d9f94ee3d1b 100644
--- a/llvm/test/CodeGen/AMDGPU/div_v2i128.ll
+++ b/llvm/test/CodeGen/AMDGPU/div_v2i128.ll
@@ -201,8 +201,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_xor_b32_e32 v3, v6, v18
; SDAG-NEXT: v_ashrrev_i32_e32 v19, 31, v15
; SDAG-NEXT: v_xor_b32_e32 v2, v7, v18
-; SDAG-NEXT: v_subb_u32_e32 v6, vcc, v3, v18, vcc
-; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v2, v18, vcc
+; SDAG-NEXT: v_subb_u32_e32 v8, vcc, v3, v18, vcc
+; SDAG-NEXT: v_subb_u32_e32 v9, vcc, v2, v18, vcc
; SDAG-NEXT: v_xor_b32_e32 v3, v12, v19
; SDAG-NEXT: v_xor_b32_e32 v2, v13, v19
; SDAG-NEXT: v_sub_i32_e32 v22, vcc, v3, v19
@@ -211,46 +211,46 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_xor_b32_e32 v3, v15, v19
; SDAG-NEXT: v_subb_u32_e32 v2, vcc, v2, v19, vcc
; SDAG-NEXT: v_subb_u32_e32 v3, vcc, v3, v19, vcc
-; SDAG-NEXT: v_or_b32_e32 v9, v23, v3
-; SDAG-NEXT: v_or_b32_e32 v8, v22, v2
-; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9]
-; SDAG-NEXT: v_or_b32_e32 v9, v5, v7
-; SDAG-NEXT: v_or_b32_e32 v8, v4, v6
-; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[8:9]
-; SDAG-NEXT: v_ffbh_u32_e32 v8, v2
+; SDAG-NEXT: v_or_b32_e32 v7, v23, v3
+; SDAG-NEXT: v_or_b32_e32 v6, v22, v2
+; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[6:7]
+; SDAG-NEXT: v_or_b32_e32 v7, v5, v9
+; SDAG-NEXT: v_or_b32_e32 v6, v4, v8
+; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[6:7]
+; SDAG-NEXT: v_ffbh_u32_e32 v6, v2
; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
-; SDAG-NEXT: v_add_i32_e32 v8, vcc, 32, v8
-; SDAG-NEXT: v_ffbh_u32_e32 v9, v3
-; SDAG-NEXT: v_min_u32_e32 v8, v8, v9
-; SDAG-NEXT: v_ffbh_u32_e32 v9, v22
-; SDAG-NEXT: v_add_i32_e32 v9, vcc, 32, v9
+; SDAG-NEXT: v_add_i32_e32 v6, vcc, 32, v6
+; SDAG-NEXT: v_ffbh_u32_e32 v7, v3
+; SDAG-NEXT: v_min_u32_e32 v6, v6, v7
+; SDAG-NEXT: v_ffbh_u32_e32 v7, v22
+; SDAG-NEXT: v_add_i32_e32 v7, vcc, 32, v7
; SDAG-NEXT: v_ffbh_u32_e32 v10, v23
-; SDAG-NEXT: v_min_u32_e32 v9, v9, v10
-; SDAG-NEXT: v_add_i32_e32 v9, vcc, 64, v9
+; SDAG-NEXT: v_min_u32_e32 v7, v7, v10
+; SDAG-NEXT: v_add_i32_e32 v7, vcc, 64, v7
; SDAG-NEXT: v_addc_u32_e64 v10, s[6:7], 0, 0, vcc
; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3]
-; SDAG-NEXT: v_ffbh_u32_e32 v11, v7
-; SDAG-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc
-; SDAG-NEXT: v_ffbh_u32_e32 v9, v6
+; SDAG-NEXT: v_ffbh_u32_e32 v11, v9
+; SDAG-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc
+; SDAG-NEXT: v_ffbh_u32_e32 v7, v8
; SDAG-NEXT: v_cndmask_b32_e64 v10, v10, 0, vcc
-; SDAG-NEXT: v_add_i32_e32 v9, vcc, 32, v9
-; SDAG-NEXT: v_min_u32_e32 v9, v9, v11
+; SDAG-NEXT: v_add_i32_e32 v7, vcc, 32, v7
+; SDAG-NEXT: v_min_u32_e32 v7, v7, v11
; SDAG-NEXT: v_ffbh_u32_e32 v11, v4
; SDAG-NEXT: v_add_i32_e32 v11, vcc, 32, v11
; SDAG-NEXT: v_ffbh_u32_e32 v12, v5
; SDAG-NEXT: v_min_u32_e32 v11, v11, v12
; SDAG-NEXT: v_add_i32_e32 v11, vcc, 64, v11
; SDAG-NEXT: v_addc_u32_e64 v12, s[6:7], 0, 0, vcc
-; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7]
+; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[8:9]
; SDAG-NEXT: s_movk_i32 s8, 0x7f
-; SDAG-NEXT: v_cndmask_b32_e32 v9, v11, v9, vcc
+; SDAG-NEXT: v_cndmask_b32_e32 v7, v11, v7, vcc
; SDAG-NEXT: v_cndmask_b32_e64 v12, v12, 0, vcc
-; SDAG-NEXT: v_sub_i32_e32 v8, vcc, v8, v9
-; SDAG-NEXT: v_subb_u32_e32 v9, vcc, v10, v12, vcc
+; SDAG-NEXT: v_sub_i32_e32 v6, vcc, v6, v7
+; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v10, v12, vcc
; SDAG-NEXT: v_subb_u32_e64 v10, s[6:7], 0, 0, vcc
; SDAG-NEXT: v_subb_u32_e64 v11, s[6:7], 0, 0, s[6:7]
; SDAG-NEXT: s_mov_b64 s[6:7], 0x7f
-; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[8:9]
+; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[6:7]
; SDAG-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc
; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11]
; SDAG-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc
@@ -258,40 +258,40 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc
; SDAG-NEXT: v_and_b32_e32 v12, 1, v12
; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v12
-; SDAG-NEXT: v_xor_b32_e32 v12, 0x7f, v8
-; SDAG-NEXT: v_or_b32_e32 v13, v9, v11
+; SDAG-NEXT: v_xor_b32_e32 v12, 0x7f, v6
+; SDAG-NEXT: v_or_b32_e32 v13, v7, v11
; SDAG-NEXT: v_or_b32_e32 v12, v12, v10
; SDAG-NEXT: s_or_b64 s[4:5], s[4:5], vcc
; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[12:13]
; SDAG-NEXT: s_xor_b64 s[6:7], s[4:5], -1
-; SDAG-NEXT: v_cndmask_b32_e64 v15, v7, 0, s[4:5]
-; SDAG-NEXT: v_cndmask_b32_e64 v14, v6, 0, s[4:5]
+; SDAG-NEXT: v_cndmask_b32_e64 v15, v9, 0, s[4:5]
+; SDAG-NEXT: v_cndmask_b32_e64 v14, v8, 0, s[4:5]
; SDAG-NEXT: v_cndmask_b32_e64 v13, v5, 0, s[4:5]
; SDAG-NEXT: v_cndmask_b32_e64 v12, v4, 0, s[4:5]
; SDAG-NEXT: s_and_b64 s[4:5], s[6:7], vcc
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; SDAG-NEXT: s_cbranch_execz .LBB0_12
; SDAG-NEXT: ; %bb.7: ; %udiv-bb1
-; SDAG-NEXT: v_add_i32_e32 v24, vcc, 1, v8
-; SDAG-NEXT: v_addc_u32_e32 v27, vcc, 0, v9, vcc
+; SDAG-NEXT: v_add_i32_e32 v24, vcc, 1, v6
+; SDAG-NEXT: v_addc_u32_e32 v27, vcc, 0, v7, vcc
; SDAG-NEXT: v_addc_u32_e32 v28, vcc, 0, v10, vcc
; SDAG-NEXT: v_addc_u32_e64 v29, s[4:5], 0, v11, vcc
-; SDAG-NEXT: v_sub_i32_e32 v13, vcc, s8, v8
-; SDAG-NEXT: v_sub_i32_e32 v11, vcc, 64, v13
-; SDAG-NEXT: v_lshl_b64 v[9:10], v[6:7], v13
-; SDAG-NEXT: v_lshr_b64 v[11:12], v[4:5], v11
-; SDAG-NEXT: v_sub_i32_e32 v8, vcc, 63, v8
-; SDAG-NEXT: v_or_b32_e32 v11, v9, v11
-; SDAG-NEXT: v_lshl_b64 v[8:9], v[4:5], v8
+; SDAG-NEXT: v_sub_i32_e32 v14, vcc, s8, v6
+; SDAG-NEXT: v_sub_i32_e32 v7, vcc, 64, v14
+; SDAG-NEXT: v_lshl_b64 v[10:11], v[8:9], v14
+; SDAG-NEXT: v_lshr_b64 v[12:13], v[4:5], v7
+; SDAG-NEXT: v_sub_i32_e32 v6, vcc, 63, v6
+; SDAG-NEXT: v_lshl_b64 v[6:7], v[4:5], v6
+; SDAG-NEXT: v_or_b32_e32 v11, v11, v13
; SDAG-NEXT: v_or_b32_e32 v10, v10, v12
-; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v13
-; SDAG-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc
-; SDAG-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc
-; SDAG-NEXT: v_lshl_b64 v[10:11], v[4:5], v13
+; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14
+; SDAG-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc
+; SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc
+; SDAG-NEXT: v_lshl_b64 v[10:11], v[4:5], v14
; SDAG-NEXT: s_xor_b64 s[8:9], s[4:5], -1
-; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v13
-; SDAG-NEXT: v_cndmask_b32_e64 v9, v9, v7, s[4:5]
-; SDAG-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[4:5]
+; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14
+; SDAG-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[4:5]
+; SDAG-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[4:5]
; SDAG-NEXT: v_cndmask_b32_e32 v11, 0, v11, vcc
; SDAG-NEXT: v_mov_b32_e32 v12, 0
; SDAG-NEXT: v_mov_b32_e32 v13, 0
@@ -302,23 +302,23 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: ; %bb.8: ; %udiv-preheader
; SDAG-NEXT: v_sub_i32_e32 v14, vcc, 64, v24
; SDAG-NEXT: v_lshr_b64 v[12:13], v[4:5], v24
-; SDAG-NEXT: v_lshl_b64 v[14:15], v[6:7], v14
+; SDAG-NEXT: v_lshl_b64 v[14:15], v[8:9], v14
; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v24
; SDAG-NEXT: v_or_b32_e32 v14, v12, v14
; SDAG-NEXT: v_subrev_i32_e32 v12, vcc, 64, v24
; SDAG-NEXT: v_or_b32_e32 v15, v13, v15
-; SDAG-NEXT: v_lshr_b64 v[12:13], v[6:7], v12
+; SDAG-NEXT: v_lshr_b64 v[12:13], v[8:9], v12
; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v24
+; SDAG-NEXT: v_lshr_b64 v[8:9], v[8:9], v24
; SDAG-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc
; SDAG-NEXT: v_cndmask_b32_e64 v15, v13, v5, s[4:5]
-; SDAG-NEXT: v_lshr_b64 v[5:6], v[6:7], v24
-; SDAG-NEXT: v_cndmask_b32_e32 v12, v12, v14, vcc
-; SDAG-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc
-; SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc
+; SDAG-NEXT: v_cndmask_b32_e32 v5, v12, v14, vcc
+; SDAG-NEXT: v_cndmask_b32_e32 v9, 0, v9, vcc
+; SDAG-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc
; SDAG-NEXT: v_add_i32_e32 v30, vcc, -1, v22
; SDAG-NEXT: v_addc_u32_e32 v31, vcc, -1, v23, vcc
; SDAG-NEXT: v_addc_u32_e32 v32, vcc, -1, v2, vcc
-; SDAG-NEXT: v_cndmask_b32_e64 v14, v12, v4, s[4:5]
+; SDAG-NEXT: v_cndmask_b32_e64 v14, v5, v4, s[4:5]
; SDAG-NEXT: v_addc_u32_e32 v33, vcc, -1, v3, vcc
; SDAG-NEXT: v_mov_b32_e32 v4, 0
; SDAG-NEXT: v_mov_b32_e32 v5, 0
@@ -328,20 +328,20 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_mov_b32_e32 v13, 0
; SDAG-NEXT: .LBB0_9: ; %udiv-do-while
; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
-; SDAG-NEXT: v_lshl_b64 v[6:7], v[6:7], 1
+; SDAG-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
; SDAG-NEXT: v_lshrrev_b32_e32 v12, 31, v15
; SDAG-NEXT: v_lshl_b64 v[14:15], v[14:15], 1
-; SDAG-NEXT: v_or_b32_e32 v6, v6, v12
-; SDAG-NEXT: v_lshrrev_b32_e32 v12, 31, v9
-; SDAG-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
+; SDAG-NEXT: v_or_b32_e32 v8, v8, v12
+; SDAG-NEXT: v_lshrrev_b32_e32 v12, 31, v7
+; SDAG-NEXT: v_lshl_b64 v[6:7], v[6:7], 1
; SDAG-NEXT: v_or_b32_e32 v14, v14, v12
; SDAG-NEXT: v_lshrrev_b32_e32 v12, 31, v11
-; SDAG-NEXT: v_or_b32_e32 v8, v8, v12
+; SDAG-NEXT: v_or_b32_e32 v6, v6, v12
; SDAG-NEXT: v_sub_i32_e32 v12, vcc, v30, v14
; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v31, v15, vcc
; SDAG-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
-; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v32, v6, vcc
-; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v33, v7, vcc
+; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v32, v8, vcc
+; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v33, v9, vcc
; SDAG-NEXT: v_add_i32_e64 v24, s[4:5], -1, v24
; SDAG-NEXT: v_or_b32_e32 v10, v16, v10
; SDAG-NEXT: v_ashrrev_i32_e32 v16, 31, v12
@@ -359,10 +359,10 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_or_b32_e32 v17, v27, v29
; SDAG-NEXT: v_or_b32_e32 v16, v24, v28
; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[16:17]
-; SDAG-NEXT: v_subb_u32_e32 v6, vcc, v6, v35, vcc
-; SDAG-NEXT: v_or_b32_e32 v9, v5, v9
-; SDAG-NEXT: v_or_b32_e32 v8, v4, v8
-; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v7, v34, vcc
+; SDAG-NEXT: v_subb_u32_e32 v8, vcc, v8, v35, vcc
+; SDAG-NEXT: v_or_b32_e32 v7, v5, v7
+; SDAG-NEXT: v_or_b32_e32 v6, v4, v6
+; SDAG-NEXT: v_subb_u32_e32 v9, vcc, v9, v34, vcc
; SDAG-NEXT: s_or_b64 s[10:11], s[4:5], s[10:11]
; SDAG-NEXT: v_mov_b32_e32 v17, v13
; SDAG-NEXT: v_mov_b32_e32 v16, v12
@@ -372,7 +372,7 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: s_or_b64 exec, exec, s[10:11]
; SDAG-NEXT: .LBB0_11: ; %Flow11
; SDAG-NEXT: s_or_b64 exec, exec, s[8:9]
-; SDAG-NEXT: v_lshl_b64 v[14:15], v[8:9], 1
+; SDAG-NEXT: v_lshl_b64 v[14:15], v[6:7], 1
; SDAG-NEXT: v_lshl_b64 v[2:3], v[10:11], 1
; SDAG-NEXT: v_lshrrev_b32_e32 v4, 31, v11
; SDAG-NEXT: v_or_b32_e32 v14, v14, v4
@@ -600,8 +600,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: v_xor_b32_e32 v3, v18, v7
; GISEL-NEXT: v_subb_u32_e32 v7, vcc, v1, v18, vcc
; GISEL-NEXT: v_ashrrev_i32_e32 v19, 31, v15
-; GISEL-NEXT: v_subb_u32_e32 v10, vcc, v2, v18, vcc
-; GISEL-NEXT: v_subb_u32_e32 v11, vcc, v3, v18, vcc
+; GISEL-NEXT: v_subb_u32_e32 v16, vcc, v2, v18, vcc
+; GISEL-NEXT: v_subb_u32_e32 v17, vcc, v3, v18, vcc
; GISEL-NEXT: v_xor_b32_e32 v0, v19, v12
; GISEL-NEXT: v_xor_b32_e32 v1, v19, v13
; GISEL-NEXT: v_sub_i32_e32 v22, vcc, v0, v19
@@ -613,8 +613,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: v_or_b32_e32 v0, v22, v4
; GISEL-NEXT: v_or_b32_e32 v1, v23, v5
; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GISEL-NEXT: v_or_b32_e32 v0, v6, v10
-; GISEL-NEXT: v_or_b32_e32 v1, v7, v11
+; GISEL-NEXT: v_or_b32_e32 v0, v6, v16
+; GISEL-NEXT: v_or_b32_e32 v1, v7, v17
; GISEL-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1]
; GISEL-NEXT: v_ffbh_u32_e32 v1, v22
; GISEL-NEXT: s_or_b64 s[10:11], vcc, s[4:5]
@@ -632,39 +632,39 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: v_ffbh_u32_e32 v1, v7
; GISEL-NEXT: v_add_i32_e32 v2, vcc, 32, v2
; GISEL-NEXT: v_min_u32_e32 v1, v1, v2
-; GISEL-NEXT: v_ffbh_u32_e32 v3, v10
+; GISEL-NEXT: v_ffbh_u32_e32 v3, v16
; GISEL-NEXT: v_add_i32_e32 v1, vcc, 64, v1
; GISEL-NEXT: v_add_i32_e32 v3, vcc, 32, v3
-; GISEL-NEXT: v_ffbh_u32_e32 v2, v11
-; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11]
+; GISEL-NEXT: v_ffbh_u32_e32 v2, v17
+; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[16:17]
; GISEL-NEXT: v_min_u32_e32 v2, v2, v3
; GISEL-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc
; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
; GISEL-NEXT: v_subb_u32_e64 v1, s[4:5], 0, 0, vcc
-; GISEL-NEXT: v_mov_b32_e32 v12, 0x7f
-; GISEL-NEXT: v_mov_b32_e32 v13, 0
+; GISEL-NEXT: v_mov_b32_e32 v10, 0x7f
+; GISEL-NEXT: v_mov_b32_e32 v11, 0
; GISEL-NEXT: v_subb_u32_e64 v2, s[4:5], 0, 0, s[4:5]
-; GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[12:13]
+; GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[10:11]
; GISEL-NEXT: v_subb_u32_e64 v3, s[4:5], 0, 0, s[4:5]
-; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc
+; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc
; GISEL-NEXT: v_cmp_lt_u64_e32 vcc, 0, v[2:3]
; GISEL-NEXT: s_mov_b64 s[6:7], exec
-; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc
+; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc
; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3]
; GISEL-NEXT: s_mov_b64 s[8:9], 0
-; GISEL-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc
-; GISEL-NEXT: v_and_b32_e32 v12, 1, v12
-; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12
-; GISEL-NEXT: v_xor_b32_e32 v12, 0x7f, v0
-; GISEL-NEXT: v_or_b32_e32 v12, v12, v2
-; GISEL-NEXT: v_or_b32_e32 v13, v1, v3
-; GISEL-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[12:13]
+; GISEL-NEXT: v_cndmask_b32_e32 v10, v11, v10, vcc
+; GISEL-NEXT: v_and_b32_e32 v10, 1, v10
+; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10
+; GISEL-NEXT: v_xor_b32_e32 v10, 0x7f, v0
+; GISEL-NEXT: v_or_b32_e32 v10, v10, v2
+; GISEL-NEXT: v_or_b32_e32 v11, v1, v3
+; GISEL-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11]
; GISEL-NEXT: s_or_b64 s[10:11], s[10:11], vcc
; GISEL-NEXT: s_or_b64 s[4:5], s[10:11], s[4:5]
-; GISEL-NEXT: v_cndmask_b32_e64 v12, v6, 0, s[10:11]
-; GISEL-NEXT: v_cndmask_b32_e64 v13, v7, 0, s[10:11]
-; GISEL-NEXT: v_cndmask_b32_e64 v14, v10, 0, s[10:11]
-; GISEL-NEXT: v_cndmask_b32_e64 v15, v11, 0, s[10:11]
+; GISEL-NEXT: v_cndmask_b32_e64 v10, v6, 0, s[10:11]
+; GISEL-NEXT: v_cndmask_b32_e64 v11, v7, 0, s[10:11]
+; GISEL-NEXT: v_cndmask_b32_e64 v12, v16, 0, s[10:11]
+; GISEL-NEXT: v_cndmask_b32_e64 v13, v17, 0, s[10:11]
; GISEL-NEXT: s_xor_b64 s[4:5], s[4:5], s[6:7]
; GISEL-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; GISEL-NEXT: s_cbranch_execz .LBB0_12
@@ -675,23 +675,23 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: s_mov_b64 s[4:5], exec
; GISEL-NEXT: v_addc_u32_e32 v29, vcc, 0, v3, vcc
; GISEL-NEXT: s_xor_b64 s[4:5], vcc, s[4:5]
-; GISEL-NEXT: v_sub_i32_e32 v14, vcc, 0x7f, v0
-; GISEL-NEXT: v_sub_i32_e32 v0, vcc, 64, v14
+; GISEL-NEXT: v_sub_i32_e32 v12, vcc, 0x7f, v0
+; GISEL-NEXT: v_sub_i32_e32 v0, vcc, 64, v12
; GISEL-NEXT: v_lshr_b64 v[0:1], v[6:7], v0
-; GISEL-NEXT: v_lshl_b64 v[2:3], v[10:11], v14
-; GISEL-NEXT: v_add_i32_e32 v15, vcc, 0xffffffc0, v14
-; GISEL-NEXT: v_lshl_b64 v[12:13], v[6:7], v14
+; GISEL-NEXT: v_lshl_b64 v[2:3], v[16:17], v12
+; GISEL-NEXT: v_add_i32_e32 v13, vcc, 0xffffffc0, v12
+; GISEL-NEXT: v_lshl_b64 v[10:11], v[6:7], v12
; GISEL-NEXT: v_or_b32_e32 v2, v0, v2
; GISEL-NEXT: v_or_b32_e32 v3, v1, v3
-; GISEL-NEXT: v_lshl_b64 v[0:1], v[6:7], v15
-; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14
-; GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v12, vcc
-; GISEL-NEXT: v_cndmask_b32_e32 v13, 0, v13, vcc
+; GISEL-NEXT: v_lshl_b64 v[0:1], v[6:7], v13
+; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v12
+; GISEL-NEXT: v_cndmask_b32_e32 v10, 0, v10, vcc
+; GISEL-NEXT: v_cndmask_b32_e32 v11, 0, v11, vcc
; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
-; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14
-; GISEL-NEXT: v_cndmask_b32_e32 v14, v0, v10, vcc
-; GISEL-NEXT: v_cndmask_b32_e32 v15, v1, v11, vcc
+; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v12
+; GISEL-NEXT: v_cndmask_b32_e32 v12, v0, v16, vcc
+; GISEL-NEXT: v_cndmask_b32_e32 v13, v1, v17, vcc
; GISEL-NEXT: s_mov_b64 s[10:11], s[8:9]
; GISEL-NEXT: v_mov_b32_e32 v0, s8
; GISEL-NEXT: v_mov_b32_e32 v1, s9
@@ -703,24 +703,24 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: ; %bb.8: ; %udiv-preheader
; GISEL-NEXT: v_sub_i32_e32 v2, vcc, 64, v26
; GISEL-NEXT: v_lshr_b64 v[0:1], v[6:7], v26
-; GISEL-NEXT: v_lshl_b64 v[2:3], v[10:11], v2
-; GISEL-NEXT: v_add_i32_e32 v30, vcc, 0xffffffc0, v26
-; GISEL-NEXT: v_lshr_b64 v[16:17], v[10:11], v26
+; GISEL-NEXT: v_lshl_b64 v[2:3], v[16:17], v2
+; GISEL-NEXT: v_add_i32_e32 v14, vcc, 0xffffffc0, v26
+; GISEL-NEXT: v_lshr_b64 v[30:31], v[16:17], v26
; GISEL-NEXT: v_or_b32_e32 v2, v0, v2
; GISEL-NEXT: v_or_b32_e32 v3, v1, v3
-; GISEL-NEXT: v_lshr_b64 v[0:1], v[10:11], v30
+; GISEL-NEXT: v_lshr_b64 v[0:1], v[16:17], v14
; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v26
; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
-; GISEL-NEXT: v_cndmask_b32_e32 v16, 0, v16, vcc
-; GISEL-NEXT: v_cndmask_b32_e32 v17, 0, v17, vcc
+; GISEL-NEXT: v_cndmask_b32_e32 v16, 0, v30, vcc
+; GISEL-NEXT: v_cndmask_b32_e32 v17, 0, v31, vcc
; GISEL-NEXT: v_add_i32_e32 v30, vcc, -1, v22
; GISEL-NEXT: v_addc_u32_e32 v31, vcc, -1, v23, vcc
; GISEL-NEXT: s_mov_b64 s[8:9], 0
; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v26
; GISEL-NEXT: v_addc_u32_e32 v32, vcc, -1, v4, vcc
-; GISEL-NEXT: v_cndmask_b32_e64 v10, v0, v6, s[4:5]
-; GISEL-NEXT: v_cndmask_b32_e64 v11, v1, v7, s[4:5]
+; GISEL-NEXT: v_cndmask_b32_e64 v14, v0, v6, s[4:5]
+; GISEL-NEXT: v_cndmask_b32_e64 v15, v1, v7, s[4:5]
; GISEL-NEXT: v_addc_u32_e32 v33, vcc, -1, v5, vcc
; GISEL-NEXT: s_mov_b64 s[10:11], s[8:9]
; GISEL-NEXT: v_mov_b32_e32 v7, 0
@@ -732,37 +732,37 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: .LBB0_9: ; %udiv-do-while
; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GISEL-NEXT: v_lshl_b64 v[16:17], v[16:17], 1
-; GISEL-NEXT: v_lshl_b64 v[2:3], v[10:11], 1
-; GISEL-NEXT: v_lshrrev_b32_e32 v6, 31, v11
-; GISEL-NEXT: v_or_b32_e32 v16, v16, v6
+; GISEL-NEXT: v_lshl_b64 v[2:3], v[14:15], 1
; GISEL-NEXT: v_lshrrev_b32_e32 v6, 31, v15
-; GISEL-NEXT: v_lshl_b64 v[10:11], v[12:13], 1
+; GISEL-NEXT: v_or_b32_e32 v16, v16, v6
+; GISEL-NEXT: v_lshrrev_b32_e32 v6, 31, v13
+; GISEL-NEXT: v_lshl_b64 v[14:15], v[10:11], 1
; GISEL-NEXT: v_or_b32_e32 v2, v2, v6
-; GISEL-NEXT: v_or_b32_e32 v12, v0, v10
+; GISEL-NEXT: v_or_b32_e32 v10, v0, v14
; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v30, v2
; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v31, v3, vcc
; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v32, v16, vcc
; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v33, v17, vcc
; GISEL-NEXT: v_add_i32_e32 v26, vcc, -1, v26
-; GISEL-NEXT: v_lshl_b64 v[14:15], v[14:15], 1
+; GISEL-NEXT: v_lshl_b64 v[12:13], v[12:13], 1
; GISEL-NEXT: v_addc_u32_e32 v27, vcc, -1, v27, vcc
-; GISEL-NEXT: v_lshrrev_b32_e32 v6, 31, v13
+; GISEL-NEXT: v_lshrrev_b32_e32 v6, 31, v11
; GISEL-NEXT: v_ashrrev_i32_e32 v34, 31, v0
; GISEL-NEXT: v_addc_u32_e32 v28, vcc, -1, v28, vcc
-; GISEL-NEXT: v_or_b32_e32 v14, v14, v6
+; GISEL-NEXT: v_or_b32_e32 v12, v12, v6
; GISEL-NEXT: v_and_b32_e32 v6, 1, v34
; GISEL-NEXT: v_addc_u32_e32 v29, vcc, -1, v29, vcc
-; GISEL-NEXT: v_or_b32_e32 v13, v1, v11
+; GISEL-NEXT: v_or_b32_e32 v11, v1, v15
; GISEL-NEXT: v_mov_b32_e32 v0, v6
; GISEL-NEXT: v_mov_b32_e32 v1, v7
; GISEL-NEXT: v_and_b32_e32 v6, v34, v22
-; GISEL-NEXT: v_or_b32_e32 v10, v26, v28
-; GISEL-NEXT: v_or_b32_e32 v11, v27, v29
-; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11]
-; GISEL-NEXT: v_and_b32_e32 v11, v34, v23
-; GISEL-NEXT: v_sub_i32_e64 v10, s[4:5], v2, v6
+; GISEL-NEXT: v_or_b32_e32 v14, v26, v28
+; GISEL-NEXT: v_or_b32_e32 v15, v27, v29
+; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[14:15]
+; GISEL-NEXT: v_and_b32_e32 v15, v34, v23
+; GISEL-NEXT: v_sub_i32_e64 v14, s[4:5], v2, v6
; GISEL-NEXT: v_and_b32_e32 v35, v34, v4
-; GISEL-NEXT: v_subb_u32_e64 v11, s[4:5], v3, v11, s[4:5]
+; GISEL-NEXT: v_subb_u32_e64 v15, s[4:5], v3, v15, s[4:5]
; GISEL-NEXT: v_and_b32_e32 v34, v34, v5
; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
; GISEL-NEXT: v_subb_u32_e64 v16, vcc, v16, v35, s[4:5]
@@ -773,12 +773,12 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: s_or_b64 exec, exec, s[8:9]
; GISEL-NEXT: .LBB0_11: ; %Flow11
; GISEL-NEXT: s_or_b64 exec, exec, s[12:13]
-; GISEL-NEXT: v_lshl_b64 v[2:3], v[12:13], 1
-; GISEL-NEXT: v_lshl_b64 v[14:15], v[14:15], 1
-; GISEL-NEXT: v_lshrrev_b32_e32 v4, 31, v13
-; GISEL-NEXT: v_or_b32_e32 v14, v14, v4
-; GISEL-NEXT: v_or_b32_e32 v12, v0, v2
-; GISEL-NEXT: v_or_b32_e32 v13, v1, v3
+; GISEL-NEXT: v_lshl_b64 v[2:3], v[10:11], 1
+; GISEL-NEXT: v_lshl_b64 v[12:13], v[12:13], 1
+; GISEL-NEXT: v_lshrrev_b32_e32 v4, 31, v11
+; GISEL-NEXT: v_or_b32_e32 v12, v12, v4
+; GISEL-NEXT: v_or_b32_e32 v10, v0, v2
+; GISEL-NEXT: v_or_b32_e32 v11, v1, v3
; GISEL-NEXT: .LBB0_12: ; %Flow12
; GISEL-NEXT: s_or_b64 exec, exec, s[6:7]
; GISEL-NEXT: v_xor_b32_e32 v3, v25, v24
@@ -791,12 +791,12 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v3, vcc
; GISEL-NEXT: v_xor_b32_e32 v7, v19, v18
; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v4, v3, vcc
-; GISEL-NEXT: v_xor_b32_e32 v4, v12, v7
-; GISEL-NEXT: v_xor_b32_e32 v5, v13, v7
+; GISEL-NEXT: v_xor_b32_e32 v4, v10, v7
+; GISEL-NEXT: v_xor_b32_e32 v5, v11, v7
; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v4, v7
-; GISEL-NEXT: v_xor_b32_e32 v6, v14, v7
+; GISEL-NEXT: v_xor_b32_e32 v6, v12, v7
; GISEL-NEXT: v_subb_u32_e32 v5, vcc, v5, v7, vcc
-; GISEL-NEXT: v_xor_b32_e32 v8, v15, v7
+; GISEL-NEXT: v_xor_b32_e32 v8, v13, v7
; GISEL-NEXT: v_subb_u32_e32 v6, vcc, v6, v7, vcc
; GISEL-NEXT: v_subb_u32_e32 v7, vcc, v8, v7, vcc
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -1688,7 +1688,7 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: s_movk_i32 s8, 0x7f
; SDAG-NEXT: v_cndmask_b32_e64 v10, v2, 0, s[4:5]
; SDAG-NEXT: s_and_b64 s[10:11], s[10:11], s[6:7]
-; SDAG-NEXT: v_cndmask_b32_e64 v34, v1, 0, s[4:5]
+; SDAG-NEXT: v_cndmask_b32_e64 v33, v1, 0, s[4:5]
; SDAG-NEXT: v_cndmask_b32_e64 v35, v0, 0, s[4:5]
; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[10:11]
; SDAG-NEXT: s_cbranch_execz .LBB4_6
@@ -1797,7 +1797,7 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v17
; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1
; SDAG-NEXT: v_or_b32_e32 v10, v10, v20
-; SDAG-NEXT: v_or_b32_e32 v34, v19, v17
+; SDAG-NEXT: v_or_b32_e32 v33, v19, v17
; SDAG-NEXT: v_or_b32_e32 v35, v18, v16
; SDAG-NEXT: .LBB4_6: ; %Flow16
; SDAG-NEXT: s_or_b64 exec, exec, s[6:7]
@@ -1813,14 +1813,14 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v7, v31, vcc
; SDAG-NEXT: v_xor_b32_e32 v12, v12, v16
; SDAG-NEXT: v_xor_b32_e32 v13, v13, v16
-; SDAG-NEXT: v_sub_i32_e32 v33, vcc, v12, v16
+; SDAG-NEXT: v_sub_i32_e32 v34, vcc, v12, v16
; SDAG-NEXT: v_subb_u32_e32 v32, vcc, v13, v16, vcc
; SDAG-NEXT: v_xor_b32_e32 v12, v14, v16
; SDAG-NEXT: v_xor_b32_e32 v13, v15, v16
; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v12, v16, vcc
; SDAG-NEXT: v_subb_u32_e32 v13, vcc, v13, v16, vcc
; SDAG-NEXT: v_or_b32_e32 v15, v32, v13
-; SDAG-NEXT: v_or_b32_e32 v14, v33, v12
+; SDAG-NEXT: v_or_b32_e32 v14, v34, v12
; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[14:15]
; SDAG-NEXT: v_or_b32_e32 v15, v5, v7
; SDAG-NEXT: v_or_b32_e32 v14, v4, v6
@@ -1830,7 +1830,7 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_add_i32_e32 v14, vcc, 32, v14
; SDAG-NEXT: v_ffbh_u32_e32 v15, v13
; SDAG-NEXT: v_min_u32_e32 v14, v14, v15
-; SDAG-NEXT: v_ffbh_u32_e32 v15, v33
+; SDAG-NEXT: v_ffbh_u32_e32 v15, v34
; SDAG-NEXT: v_add_i32_e32 v15, vcc, 32, v15
; SDAG-NEXT: v_ffbh_u32_e32 v16, v32
; SDAG-NEXT: v_min_u32_e32 v15, v15, v16
@@ -1924,7 +1924,7 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_cndmask_b32_e64 v22, v20, v4, s[4:5]
; SDAG-NEXT: v_cndmask_b32_e32 v27, 0, v19, vcc
; SDAG-NEXT: v_cndmask_b32_e32 v26, 0, v18, vcc
-; SDAG-NEXT: v_add_i32_e32 v48, vcc, -1, v33
+; SDAG-NEXT: v_add_i32_e32 v48, vcc, -1, v34
; SDAG-NEXT: v_addc_u32_e32 v49, vcc, -1, v32, vcc
; SDAG-NEXT: v_addc_u32_e32 v50, vcc, -1, v12, vcc
; SDAG-NEXT: v_addc_u32_e32 v51, vcc, -1, v13, vcc
@@ -1959,7 +1959,7 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_and_b32_e32 v52, v24, v13
; SDAG-NEXT: v_and_b32_e32 v53, v24, v12
; SDAG-NEXT: v_and_b32_e32 v25, v24, v32
-; SDAG-NEXT: v_and_b32_e32 v24, v24, v33
+; SDAG-NEXT: v_and_b32_e32 v24, v24, v34
; SDAG-NEXT: v_addc_u32_e64 v38, s[4:5], -1, v38, s[4:5]
; SDAG-NEXT: v_sub_i32_e32 v22, vcc, v22, v24
; SDAG-NEXT: v_addc_u32_e64 v39, s[4:5], -1, v39, s[4:5]
@@ -1994,18 +1994,18 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_mov_b32_e32 v18, 0
; SDAG-NEXT: v_mul_lo_u32 v11, v11, v30
; SDAG-NEXT: v_add_i32_e32 v19, vcc, v23, v9
-; SDAG-NEXT: v_mul_lo_u32 v23, v34, v8
+; SDAG-NEXT: v_mul_lo_u32 v23, v33, v8
; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v29, v35, v[17:18]
-; SDAG-NEXT: v_mul_lo_u32 v15, v15, v33
+; SDAG-NEXT: v_mul_lo_u32 v15, v15, v34
; SDAG-NEXT: v_add_i32_e32 v23, vcc, v19, v23
; SDAG-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v10, v30, v[22:23]
; SDAG-NEXT: v_mov_b32_e32 v17, v8
-; SDAG-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v30, v34, v[17:18]
+; SDAG-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v30, v33, v[17:18]
; SDAG-NEXT: v_mul_lo_u32 v10, v10, v29
; SDAG-NEXT: v_add_i32_e32 v11, vcc, v11, v23
; SDAG-NEXT: v_add_i32_e32 v8, vcc, v9, v25
; SDAG-NEXT: v_addc_u32_e64 v9, s[4:5], 0, 0, vcc
-; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v29, v34, v[8:9]
+; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v29, v33, v[8:9]
; SDAG-NEXT: v_add_i32_e32 v10, vcc, v10, v11
; SDAG-NEXT: v_add_i32_e32 v8, vcc, v8, v22
; SDAG-NEXT: v_addc_u32_e32 v9, vcc, v9, v10, vcc
@@ -2016,7 +2016,7 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_xor_b32_e32 v0, v0, v28
; SDAG-NEXT: v_mul_lo_u32 v10, v21, v13
; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v21, v12, 0
-; SDAG-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v33, v21, 0
+; SDAG-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v34, v21, 0
; SDAG-NEXT: v_xor_b32_e32 v1, v1, v28
; SDAG-NEXT: v_sub_i32_e32 v0, vcc, v0, v28
; SDAG-NEXT: v_xor_b32_e32 v2, v2, v28
@@ -2028,9 +2028,9 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) {
; SDAG-NEXT: v_add_i32_e32 v9, vcc, v9, v10
; SDAG-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v32, v21, v[17:18]
; SDAG-NEXT: v_add_i32_e32 v9, vcc, v9, v12
-; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v14, v33, v[8:9]
+; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v14, v34, v[8:9]
; SDAG-NEXT: v_mov_b32_e32 v17, v10
-; SDAG-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v33, v20, v[17:18]
+; SDAG-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v34, v20, v[17:18]
; SDAG-NEXT: v_mul_lo_u32 v14, v14, v32
; SDAG-NEXT: v_add_i32_e32 v15, vcc, v15, v9
; SDAG-NEXT: v_add_i32_e32 v9, vcc, v11, v13
diff --git a/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll b/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
index a324b44ca3fd9..3d800c1967ca9 100644
--- a/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
@@ -874,27 +874,29 @@ define amdgpu_kernel void @atomic_and_i64_ret(ptr %out, ptr %out2, i64 %in) {
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1
-; GFX7-NEXT: flat_load_dwordx2 v[2:3], v[0:1] glc
+; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1] glc
; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: v_mov_b32_e32 v3, s1
+; GFX7-NEXT: v_mov_b32_e32 v2, s0
; GFX7-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX7-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
-; GFX7-NEXT: v_mov_b32_e32 v5, v3
-; GFX7-NEXT: v_mov_b32_e32 v4, v2
-; GFX7-NEXT: v_and_b32_e32 v3, s5, v5
-; GFX7-NEXT: v_and_b32_e32 v2, s4, v4
-; GFX7-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
+; GFX7-NEXT: v_mov_b32_e32 v7, v1
+; GFX7-NEXT: v_mov_b32_e32 v6, v0
+; GFX7-NEXT: v_and_b32_e32 v5, s5, v7
+; GFX7-NEXT: v_and_b32_e32 v4, s4, v6
+; GFX7-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[2:3], v[4:7] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol
-; GFX7-NEXT: v_cmp_eq_u64_e32 vcc, v[2:3], v[4:5]
+; GFX7-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[6:7]
; GFX7-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GFX7-NEXT: s_andn2_b64 exec, exec, s[6:7]
; GFX7-NEXT: s_cbranch_execnz .LBB13_1
; GFX7-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX7-NEXT: s_or_b64 exec, exec, s[6:7]
-; GFX7-NEXT: v_mov_b32_e32 v0, s2
-; GFX7-NEXT: v_mov_b32_e32 v1, s3
-; GFX7-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; GFX7-NEXT: v_mov_b32_e32 v2, s2
+; GFX7-NEXT: v_mov_b32_e32 v3, s3
+; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm
;
; GFX8-LABEL: atomic_and_i64_ret:
@@ -905,27 +907,29 @@ define amdgpu_kernel void @atomic_and_i64_ret(ptr %out, ptr %out2, i64 %in) {
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
-; GFX8-NEXT: flat_load_dwordx2 v[2:3], v[0:1] glc
+; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] glc
; GFX8-NEXT: s_waitcnt vmcnt(0)
+; GFX8-NEXT: v_mov_b32_e32 v3, s1
+; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX8-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v5, v3
-; GFX8-NEXT: v_mov_b32_e32 v4, v2
-; GFX8-NEXT: v_and_b32_e32 v3, s5, v5
-; GFX8-NEXT: v_and_b32_e32 v2, s4, v4
-; GFX8-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
+; GFX8-NEXT: v_mov_b32_e32 v7, v1
+; GFX8-NEXT: v_mov_b32_e32 v6, v0
+; GFX8-NEXT: v_and_b32_e32 v5, s5, v7
+; GFX8-NEXT: v_and_b32_e32 v4, s4, v6
+; GFX8-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[2:3], v[4:7] glc
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: buffer_wbinvl1_vol
-; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, v[2:3], v[4:5]
+; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[6:7]
; GFX8-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GFX8-NEXT: s_andn2_b64 exec, exec, s[6:7]
; GFX8-NEXT: s_cbranch_execnz .LBB13_1
; GFX8-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX8-NEXT: s_or_b64 exec, exec, s[6:7]
-; GFX8-NEXT: v_mov_b32_e32 v0, s2
-; GFX8-NEXT: v_mov_b32_e32 v1, s3
-; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; GFX8-NEXT: v_mov_b32_e32 v2, s2
+; GFX8-NEXT: v_mov_b32_e32 v3, s3
+; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm
;
; GFX12-LABEL: atomic_and_i64_ret:
@@ -5046,27 +5050,29 @@ define amdgpu_kernel void @atomic_or_i64_ret(ptr %out, ptr %out2, i64 %in) {
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1
-; GFX7-NEXT: flat_load_dwordx2 v[2:3], v[0:1] glc
+; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1] glc
; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: v_mov_b32_e32 v3, s1
+; GFX7-NEXT: v_mov_b32_e32 v2, s0
; GFX7-NEXT: .LBB61_1: ; %atomicrmw.start
; GFX7-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
-; GFX7-NEXT: v_mov_b32_e32 v5, v3
-; GFX7-NEXT: v_mov_b32_e32 v4, v2
-; GFX7-NEXT: v_or_b32_e32 v3, s5, v5
-; GFX7-NEXT: v_or_b32_e32 v2, s4, v4
-; GFX7-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
+; GFX7-NEXT: v_mov_b32_e32 v7, v1
+; GFX7-NEXT: v_mov_b32_e32 v6, v0
+; GFX7-NEXT: v_or_b32_e32 v5, s5, v7
+; GFX7-NEXT: v_or_b32_e32 v4, s4, v6
+; GFX7-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[2:3], v[4:7] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol
-; GFX7-NEXT: v_cmp_eq_u64_e32 vcc, v[2:3], v[4:5]
+; GFX7-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[6:7]
; GFX7-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GFX7-NEXT: s_andn2_b64 exec, exec, s[6:7]
; GFX7-NEXT: s_cbranch_execnz .LBB61_1
; GFX7-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX7-NEXT: s_or_b64 exec, exec, s[6:7]
-; GFX7-NEXT: v_mov_b32_e32 v0, s2
-; GFX7-NEXT: v_mov_b32_e32 v1, s3
-; GFX7-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; GFX7-NEXT: v_mov_b32_e32 v2, s2
+; GFX7-NEXT: v_mov_b32_e32 v3, s3
+; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm
;
; GFX8-LABEL: atomic_or_i64_ret:
@@ -5077,27 +5083,29 @@ define amdgpu_kernel void @atomic_or_i64_ret(ptr %out, ptr %out2, i64 %in) {
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
-; GFX8-NEXT: flat_load_dwordx2 v[2:3], v[0:1] glc
+; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] glc
; GFX8-NEXT: s_waitcnt vmcnt(0)
+; GFX8-NEXT: v_mov_b32_e32 v3, s1
+; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: .LBB61_1: ; %atomicrmw.start
; GFX8-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v5, v3
-; GFX8-NEXT: v_mov_b32_e32 v4, v2
-; GFX8-NEXT: v_or_b32_e32 v3, s5, v5
-; GFX8-NEXT: v_or_b32_e32 v2, s4, v4
-; GFX8-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
+; GFX8-NEXT: v_mov_b32_e32 v7, v1
+; GFX8-NEXT: v_mov_b32_e32 v6, v0
+; GFX8-NEXT: v_or_b32_e32 v5, s5, v7
+; GFX8-NEXT: v_or_b32_e32 v4, s4, v6
+; GFX8-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[2:3], v[4:7] glc
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: buffer_wbinvl1_vol
-; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, v[2:3], v[4:5]
+; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[6:7]
; GFX8-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GFX8-NEXT: s_andn2_b64 exec, exec, s[6:7]
; GFX8-NEXT: s_cbranch_execnz .LBB61_1
; GFX8-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX8-NEXT: s_or_b64 exec, exec, s[6:7]
-; GFX8-NEXT: v_mov_b32_e32 v0, s2
-; GFX8-NEXT: v_mov_b32_e32 v1, s3
-; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; GFX8-NEXT: v_mov_b32_e32 v2, s2
+; GFX8-NEXT: v_mov_b32_e32 v3, s3
+; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm
;
; GFX12-LABEL: atomic_or_i64_ret:
@@ -6256,27 +6264,29 @@ define amdgpu_kernel void @atomic_xor_i64_ret(ptr %out, ptr %out2, i64 %in) {
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1
-; GFX7-NEXT: flat_load_dwordx2 v[2:3], v[0:1] glc
+; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1] glc
; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: v_mov_b32_e32 v3, s1
+; GFX7-NEXT: v_mov_b32_e32 v2, s0
; GFX7-NEXT: .LBB79_1: ; %atomicrmw.start
; GFX7-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
-; GFX7-NEXT: v_mov_b32_e32 v5, v3
-; GFX7-NEXT: v_mov_b32_e32 v4, v2
-; GFX7-NEXT: v_xor_b32_e32 v3, s5, v5
-; GFX7-NEXT: v_xor_b32_e32 v2, s4, v4
-; GFX7-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
+; GFX7-NEXT: v_mov_b32_e32 v7, v1
+; GFX7-NEXT: v_mov_b32_e32 v6, v0
+; GFX7-NEXT: v_xor_b32_e32 v5, s5, v7
+; GFX7-NEXT: v_xor_b32_e32 v4, s4, v6
+; GFX7-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[2:3], v[4:7] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol
-; GFX7-NEXT: v_cmp_eq_u64_e32 vcc, v[2:3], v[4:5]
+; GFX7-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[6:7]
; GFX7-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GFX7-NEXT: s_andn2_b64 exec, exec, s[6:7]
; GFX7-NEXT: s_cbranch_execnz .LBB79_1
; GFX7-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX7-NEXT: s_or_b64 exec, exec, s[6:7]
-; GFX7-NEXT: v_mov_b32_e32 v0, s2
-; GFX7-NEXT: v_mov_b32_e32 v1, s3
-; GFX7-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; GFX7-NEXT: v_mov_b32_e32 v2, s2
+; GFX7-NEXT: v_mov_b32_e32 v3, s3
+; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm
;
; GFX8-LABEL: atomic_xor_i64_ret:
@@ -6287,27 +6297,29 @@ define amdgpu_kernel void @atomic_xor_i64_ret(ptr %out, ptr %out2, i64 %in) {
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
-; GFX8-NEXT: flat_load_dwordx2 v[2:3], v[0:1] glc
+; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] glc
; GFX8-NEXT: s_waitcnt vmcnt(0)
+; GFX8-NEXT: v_mov_b32_e32 v3, s1
+; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: .LBB79_1: ; %atomicrmw.start
; GFX8-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v5, v3
-; GFX8-NEXT: v_mov_b32_e32 v4, v2
-; GFX8-NEXT: v_xor_b32_e32 v3, s5, v5
-; GFX8-NEXT: v_xor_b32_e32 v2, s4, v4
-; GFX8-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
+; GFX8-NEXT: v_mov_b32_e32 v7, v1
+; GFX8-NEXT: v_mov_b32_e32 v6, v0
+; GFX8-NEXT: v_xor_b32_e32 v5, s5, v7
+; GFX8-NEXT: v_xor_b32_e32 v4, s4, v6
+; GFX8-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[2:3], v[4:7] glc
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: buffer_wbinvl1_vol
-; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, v[2:3], v[4:5]
+; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[6:7]
; GFX8-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GFX8-NEXT: s_andn2_b64 exec, exec, s[6:7]
; GFX8-NEXT: s_cbranch_execnz .LBB79_1
; GFX8-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX8-NEXT: s_or_b64 exec, exec, s[6:7]
-; GFX8-NEXT: v_mov_b32_e32 v0, s2
-; GFX8-NEXT: v_mov_b32_e32 v1, s3
-; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; GFX8-NEXT: v_mov_b32_e32 v2, s2
+; GFX8-NEXT: v_mov_b32_e32 v3, s3
+; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm
;
; GFX12-LABEL: atomic_xor_i64_ret:
diff --git a/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll b/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
index bae25d75fc534..1f48ec7fab164 100644
--- a/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
@@ -4225,52 +4225,56 @@ define i64 @flat_atomic_sub_i64_ret(ptr %ptr, i64 %in) {
; GCN3-LABEL: flat_atomic_sub_i64_ret:
; GCN3: ; %bb.0:
; GCN3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN3-NEXT: v_mov_b32_e32 v5, v1
; GCN3-NEXT: s_mov_b64 s[4:5], src_private_base
-; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v1
-; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GCN3-NEXT: v_mov_b32_e32 v4, v0
+; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
; GCN3-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN3-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB32_4
-; GCN3-NEXT: ; %bb.1: ; %atomicrmw.global
-; GCN3-NEXT: flat_load_dwordx2 v[4:5], v[0:1]
+; GCN3-NEXT: s_cbranch_execnz .LBB32_3
+; GCN3-NEXT: ; %bb.1: ; %Flow3
+; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GCN3-NEXT: s_cbranch_execnz .LBB32_6
+; GCN3-NEXT: .LBB32_2: ; %atomicrmw.phi
+; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
+; GCN3-NEXT: s_setpc_b64 s[30:31]
+; GCN3-NEXT: .LBB32_3: ; %atomicrmw.global
+; GCN3-NEXT: flat_load_dwordx2 v[0:1], v[4:5]
; GCN3-NEXT: s_mov_b64 s[6:7], 0
-; GCN3-NEXT: .LBB32_2: ; %atomicrmw.start
+; GCN3-NEXT: .LBB32_4: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GCN3-NEXT: v_mov_b32_e32 v6, v4
-; GCN3-NEXT: v_mov_b32_e32 v7, v5
-; GCN3-NEXT: v_sub_co_u32_e32 v4, vcc, v6, v2
-; GCN3-NEXT: v_subb_co_u32_e32 v5, vcc, v7, v3, vcc
-; GCN3-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[0:1], v[4:7] glc
+; GCN3-NEXT: v_mov_b32_e32 v8, v0
+; GCN3-NEXT: v_mov_b32_e32 v9, v1
+; GCN3-NEXT: v_sub_co_u32_e32 v6, vcc, v8, v2
+; GCN3-NEXT: v_subb_co_u32_e32 v7, vcc, v9, v3, vcc
+; GCN3-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[6:9] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol
-; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[6:7]
+; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[8:9]
; GCN3-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GCN3-NEXT: s_andn2_b64 exec, exec, s[6:7]
-; GCN3-NEXT: s_cbranch_execnz .LBB32_2
-; GCN3-NEXT: ; %bb.3: ; %Flow
+; GCN3-NEXT: s_cbranch_execnz .LBB32_4
+; GCN3-NEXT: ; %bb.5: ; %Flow
; GCN3-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
; GCN3-NEXT: ; implicit-def: $vgpr2
; GCN3-NEXT: ; implicit-def: $vgpr3
-; GCN3-NEXT: .LBB32_4: ; %Flow3
; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB32_6
-; GCN3-NEXT: ; %bb.5: ; %atomicrmw.private
-; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
-; GCN3-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc
-; GCN3-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen
-; GCN3-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:4
+; GCN3-NEXT: s_cbranch_execz .LBB32_2
+; GCN3-NEXT: .LBB32_6: ; %atomicrmw.private
+; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
+; GCN3-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
+; GCN3-NEXT: buffer_load_dword v0, v4, s[0:3], 0 offen
+; GCN3-NEXT: buffer_load_dword v1, v4, s[0:3], 0 offen offset:4
; GCN3-NEXT: s_waitcnt vmcnt(1)
-; GCN3-NEXT: v_sub_co_u32_e32 v1, vcc, v4, v2
+; GCN3-NEXT: v_sub_co_u32_e32 v2, vcc, v0, v2
; GCN3-NEXT: s_waitcnt vmcnt(0)
-; GCN3-NEXT: v_subb_co_u32_e32 v2, vcc, v5, v3, vcc
-; GCN3-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GCN3-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: .LBB32_6: ; %atomicrmw.phi
+; GCN3-NEXT: v_subb_co_u32_e32 v3, vcc, v1, v3, vcc
+; GCN3-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; GCN3-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen offset:4
; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
-; GCN3-NEXT: v_mov_b32_e32 v0, v4
-; GCN3-NEXT: v_mov_b32_e32 v1, v5
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: s_setpc_b64 s[30:31]
%result = atomicrmw sub ptr %ptr, i64 %in seq_cst
@@ -5932,52 +5936,56 @@ define i64 @flat_atomic_and_i64_ret(ptr %ptr, i64 %in) {
; GCN3-LABEL: flat_atomic_and_i64_ret:
; GCN3: ; %bb.0:
; GCN3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN3-NEXT: v_mov_b32_e32 v5, v1
; GCN3-NEXT: s_mov_b64 s[4:5], src_private_base
-; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v1
-; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GCN3-NEXT: v_mov_b32_e32 v4, v0
+; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
; GCN3-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN3-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB42_4
-; GCN3-NEXT: ; %bb.1: ; %atomicrmw.global
-; GCN3-NEXT: flat_load_dwordx2 v[4:5], v[0:1]
+; GCN3-NEXT: s_cbranch_execnz .LBB42_3
+; GCN3-NEXT: ; %bb.1: ; %Flow3
+; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GCN3-NEXT: s_cbranch_execnz .LBB42_6
+; GCN3-NEXT: .LBB42_2: ; %atomicrmw.phi
+; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
+; GCN3-NEXT: s_setpc_b64 s[30:31]
+; GCN3-NEXT: .LBB42_3: ; %atomicrmw.global
+; GCN3-NEXT: flat_load_dwordx2 v[0:1], v[4:5]
; GCN3-NEXT: s_mov_b64 s[6:7], 0
-; GCN3-NEXT: .LBB42_2: ; %atomicrmw.start
+; GCN3-NEXT: .LBB42_4: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GCN3-NEXT: v_mov_b32_e32 v7, v5
-; GCN3-NEXT: v_mov_b32_e32 v6, v4
-; GCN3-NEXT: v_and_b32_e32 v5, v7, v3
-; GCN3-NEXT: v_and_b32_e32 v4, v6, v2
-; GCN3-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[0:1], v[4:7] glc
+; GCN3-NEXT: v_mov_b32_e32 v9, v1
+; GCN3-NEXT: v_mov_b32_e32 v8, v0
+; GCN3-NEXT: v_and_b32_e32 v7, v9, v3
+; GCN3-NEXT: v_and_b32_e32 v6, v8, v2
+; GCN3-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[6:9] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol
-; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[6:7]
+; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[8:9]
; GCN3-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GCN3-NEXT: s_andn2_b64 exec, exec, s[6:7]
-; GCN3-NEXT: s_cbranch_execnz .LBB42_2
-; GCN3-NEXT: ; %bb.3: ; %Flow
+; GCN3-NEXT: s_cbranch_execnz .LBB42_4
+; GCN3-NEXT: ; %bb.5: ; %Flow
; GCN3-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
; GCN3-NEXT: ; implicit-def: $vgpr3
; GCN3-NEXT: ; implicit-def: $vgpr2
-; GCN3-NEXT: .LBB42_4: ; %Flow3
; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB42_6
-; GCN3-NEXT: ; %bb.5: ; %atomicrmw.private
-; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
-; GCN3-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc
-; GCN3-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen
+; GCN3-NEXT: s_cbranch_execz .LBB42_2
+; GCN3-NEXT: .LBB42_6: ; %atomicrmw.private
+; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
+; GCN3-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
+; GCN3-NEXT: buffer_load_dword v1, v4, s[0:3], 0 offen offset:4
+; GCN3-NEXT: buffer_load_dword v0, v4, s[0:3], 0 offen
; GCN3-NEXT: s_waitcnt vmcnt(1)
-; GCN3-NEXT: v_and_b32_e32 v1, v5, v3
+; GCN3-NEXT: v_and_b32_e32 v3, v1, v3
; GCN3-NEXT: s_waitcnt vmcnt(0)
-; GCN3-NEXT: v_and_b32_e32 v2, v4, v2
-; GCN3-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GCN3-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: .LBB42_6: ; %atomicrmw.phi
+; GCN3-NEXT: v_and_b32_e32 v2, v0, v2
+; GCN3-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; GCN3-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen offset:4
; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
-; GCN3-NEXT: v_mov_b32_e32 v0, v4
-; GCN3-NEXT: v_mov_b32_e32 v1, v5
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: s_setpc_b64 s[30:31]
%result = atomicrmw and ptr %ptr, i64 %in seq_cst
@@ -7647,56 +7655,60 @@ define i64 @flat_atomic_nand_i64_ret(ptr %ptr, i64 %in) {
; GCN3-LABEL: flat_atomic_nand_i64_ret:
; GCN3: ; %bb.0:
; GCN3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN3-NEXT: v_mov_b32_e32 v5, v1
; GCN3-NEXT: s_mov_b64 s[4:5], src_private_base
-; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v1
-; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GCN3-NEXT: v_mov_b32_e32 v4, v0
+; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
; GCN3-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN3-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB52_4
-; GCN3-NEXT: ; %bb.1: ; %atomicrmw.global
-; GCN3-NEXT: flat_load_dwordx2 v[4:5], v[0:1]
+; GCN3-NEXT: s_cbranch_execnz .LBB52_3
+; GCN3-NEXT: ; %bb.1: ; %Flow3
+; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GCN3-NEXT: s_cbranch_execnz .LBB52_6
+; GCN3-NEXT: .LBB52_2: ; %atomicrmw.phi
+; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
+; GCN3-NEXT: s_setpc_b64 s[30:31]
+; GCN3-NEXT: .LBB52_3: ; %atomicrmw.global
+; GCN3-NEXT: flat_load_dwordx2 v[0:1], v[4:5]
; GCN3-NEXT: s_mov_b64 s[6:7], 0
-; GCN3-NEXT: .LBB52_2: ; %atomicrmw.start
+; GCN3-NEXT: .LBB52_4: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GCN3-NEXT: v_mov_b32_e32 v7, v5
-; GCN3-NEXT: v_mov_b32_e32 v6, v4
-; GCN3-NEXT: v_and_b32_e32 v4, v7, v3
-; GCN3-NEXT: v_and_b32_e32 v8, v6, v2
-; GCN3-NEXT: v_not_b32_e32 v5, v4
-; GCN3-NEXT: v_not_b32_e32 v4, v8
-; GCN3-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[0:1], v[4:7] glc
+; GCN3-NEXT: v_mov_b32_e32 v9, v1
+; GCN3-NEXT: v_mov_b32_e32 v8, v0
+; GCN3-NEXT: v_and_b32_e32 v0, v9, v3
+; GCN3-NEXT: v_and_b32_e32 v1, v8, v2
+; GCN3-NEXT: v_not_b32_e32 v7, v0
+; GCN3-NEXT: v_not_b32_e32 v6, v1
+; GCN3-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[6:9] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol
-; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[6:7]
+; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[8:9]
; GCN3-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GCN3-NEXT: s_andn2_b64 exec, exec, s[6:7]
-; GCN3-NEXT: s_cbranch_execnz .LBB52_2
-; GCN3-NEXT: ; %bb.3: ; %Flow
+; GCN3-NEXT: s_cbranch_execnz .LBB52_4
+; GCN3-NEXT: ; %bb.5: ; %Flow
; GCN3-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
; GCN3-NEXT: ; implicit-def: $vgpr3
; GCN3-NEXT: ; implicit-def: $vgpr2
-; GCN3-NEXT: .LBB52_4: ; %Flow3
; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB52_6
-; GCN3-NEXT: ; %bb.5: ; %atomicrmw.private
-; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
-; GCN3-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc
-; GCN3-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen
+; GCN3-NEXT: s_cbranch_execz .LBB52_2
+; GCN3-NEXT: .LBB52_6: ; %atomicrmw.private
+; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
+; GCN3-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
+; GCN3-NEXT: buffer_load_dword v1, v4, s[0:3], 0 offen offset:4
+; GCN3-NEXT: buffer_load_dword v0, v4, s[0:3], 0 offen
; GCN3-NEXT: s_waitcnt vmcnt(1)
-; GCN3-NEXT: v_and_b32_e32 v1, v5, v3
+; GCN3-NEXT: v_and_b32_e32 v3, v1, v3
; GCN3-NEXT: s_waitcnt vmcnt(0)
-; GCN3-NEXT: v_and_b32_e32 v2, v4, v2
+; GCN3-NEXT: v_and_b32_e32 v2, v0, v2
; GCN3-NEXT: v_not_b32_e32 v2, v2
-; GCN3-NEXT: v_not_b32_e32 v1, v1
-; GCN3-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GCN3-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: .LBB52_6: ; %atomicrmw.phi
+; GCN3-NEXT: v_not_b32_e32 v3, v3
+; GCN3-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; GCN3-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen offset:4
; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
-; GCN3-NEXT: v_mov_b32_e32 v0, v4
-; GCN3-NEXT: v_mov_b32_e32 v1, v5
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: s_setpc_b64 s[30:31]
%result = atomicrmw nand ptr %ptr, i64 %in seq_cst
@@ -9526,52 +9538,56 @@ define i64 @flat_atomic_or_i64_ret(ptr %ptr, i64 %in) {
; GCN3-LABEL: flat_atomic_or_i64_ret:
; GCN3: ; %bb.0:
; GCN3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN3-NEXT: v_mov_b32_e32 v5, v1
; GCN3-NEXT: s_mov_b64 s[4:5], src_private_base
-; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v1
-; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GCN3-NEXT: v_mov_b32_e32 v4, v0
+; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
; GCN3-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN3-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB62_4
-; GCN3-NEXT: ; %bb.1: ; %atomicrmw.global
-; GCN3-NEXT: flat_load_dwordx2 v[4:5], v[0:1]
+; GCN3-NEXT: s_cbranch_execnz .LBB62_3
+; GCN3-NEXT: ; %bb.1: ; %Flow3
+; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GCN3-NEXT: s_cbranch_execnz .LBB62_6
+; GCN3-NEXT: .LBB62_2: ; %atomicrmw.phi
+; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
+; GCN3-NEXT: s_setpc_b64 s[30:31]
+; GCN3-NEXT: .LBB62_3: ; %atomicrmw.global
+; GCN3-NEXT: flat_load_dwordx2 v[0:1], v[4:5]
; GCN3-NEXT: s_mov_b64 s[6:7], 0
-; GCN3-NEXT: .LBB62_2: ; %atomicrmw.start
+; GCN3-NEXT: .LBB62_4: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GCN3-NEXT: v_mov_b32_e32 v7, v5
-; GCN3-NEXT: v_mov_b32_e32 v6, v4
-; GCN3-NEXT: v_or_b32_e32 v5, v7, v3
-; GCN3-NEXT: v_or_b32_e32 v4, v6, v2
-; GCN3-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[0:1], v[4:7] glc
+; GCN3-NEXT: v_mov_b32_e32 v9, v1
+; GCN3-NEXT: v_mov_b32_e32 v8, v0
+; GCN3-NEXT: v_or_b32_e32 v7, v9, v3
+; GCN3-NEXT: v_or_b32_e32 v6, v8, v2
+; GCN3-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[6:9] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol
-; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[6:7]
+; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[8:9]
; GCN3-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GCN3-NEXT: s_andn2_b64 exec, exec, s[6:7]
-; GCN3-NEXT: s_cbranch_execnz .LBB62_2
-; GCN3-NEXT: ; %bb.3: ; %Flow
+; GCN3-NEXT: s_cbranch_execnz .LBB62_4
+; GCN3-NEXT: ; %bb.5: ; %Flow
; GCN3-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
; GCN3-NEXT: ; implicit-def: $vgpr3
; GCN3-NEXT: ; implicit-def: $vgpr2
-; GCN3-NEXT: .LBB62_4: ; %Flow3
; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB62_6
-; GCN3-NEXT: ; %bb.5: ; %atomicrmw.private
-; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
-; GCN3-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc
-; GCN3-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen
+; GCN3-NEXT: s_cbranch_execz .LBB62_2
+; GCN3-NEXT: .LBB62_6: ; %atomicrmw.private
+; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
+; GCN3-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
+; GCN3-NEXT: buffer_load_dword v1, v4, s[0:3], 0 offen offset:4
+; GCN3-NEXT: buffer_load_dword v0, v4, s[0:3], 0 offen
; GCN3-NEXT: s_waitcnt vmcnt(1)
-; GCN3-NEXT: v_or_b32_e32 v1, v5, v3
+; GCN3-NEXT: v_or_b32_e32 v3, v1, v3
; GCN3-NEXT: s_waitcnt vmcnt(0)
-; GCN3-NEXT: v_or_b32_e32 v2, v4, v2
-; GCN3-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GCN3-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: .LBB62_6: ; %atomicrmw.phi
+; GCN3-NEXT: v_or_b32_e32 v2, v0, v2
+; GCN3-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; GCN3-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen offset:4
; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
-; GCN3-NEXT: v_mov_b32_e32 v0, v4
-; GCN3-NEXT: v_mov_b32_e32 v1, v5
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: s_setpc_b64 s[30:31]
%result = atomicrmw or ptr %ptr, i64 %in seq_cst
@@ -11209,52 +11225,56 @@ define i64 @flat_atomic_xor_i64_ret(ptr %ptr, i64 %in) {
; GCN3-LABEL: flat_atomic_xor_i64_ret:
; GCN3: ; %bb.0:
; GCN3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN3-NEXT: v_mov_b32_e32 v5, v1
; GCN3-NEXT: s_mov_b64 s[4:5], src_private_base
-; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v1
-; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GCN3-NEXT: v_mov_b32_e32 v4, v0
+; GCN3-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
+; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
; GCN3-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN3-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB72_4
-; GCN3-NEXT: ; %bb.1: ; %atomicrmw.global
-; GCN3-NEXT: flat_load_dwordx2 v[4:5], v[0:1]
+; GCN3-NEXT: s_cbranch_execnz .LBB72_3
+; GCN3-NEXT: ; %bb.1: ; %Flow3
+; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GCN3-NEXT: s_cbranch_execnz .LBB72_6
+; GCN3-NEXT: .LBB72_2: ; %atomicrmw.phi
+; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
+; GCN3-NEXT: s_setpc_b64 s[30:31]
+; GCN3-NEXT: .LBB72_3: ; %atomicrmw.global
+; GCN3-NEXT: flat_load_dwordx2 v[0:1], v[4:5]
; GCN3-NEXT: s_mov_b64 s[6:7], 0
-; GCN3-NEXT: .LBB72_2: ; %atomicrmw.start
+; GCN3-NEXT: .LBB72_4: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GCN3-NEXT: v_mov_b32_e32 v7, v5
-; GCN3-NEXT: v_mov_b32_e32 v6, v4
-; GCN3-NEXT: v_xor_b32_e32 v5, v7, v3
-; GCN3-NEXT: v_xor_b32_e32 v4, v6, v2
-; GCN3-NEXT: flat_atomic_cmpswap_x2 v[4:5], v[0:1], v[4:7] glc
+; GCN3-NEXT: v_mov_b32_e32 v9, v1
+; GCN3-NEXT: v_mov_b32_e32 v8, v0
+; GCN3-NEXT: v_xor_b32_e32 v7, v9, v3
+; GCN3-NEXT: v_xor_b32_e32 v6, v8, v2
+; GCN3-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[6:9] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol
-; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[4:5], v[6:7]
+; GCN3-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[8:9]
; GCN3-NEXT: s_or_b64 s[6:7], vcc, s[6:7]
; GCN3-NEXT: s_andn2_b64 exec, exec, s[6:7]
-; GCN3-NEXT: s_cbranch_execnz .LBB72_2
-; GCN3-NEXT: ; %bb.3: ; %Flow
+; GCN3-NEXT: s_cbranch_execnz .LBB72_4
+; GCN3-NEXT: ; %bb.5: ; %Flow
; GCN3-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN3-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GCN3-NEXT: ; implicit-def: $vgpr4_vgpr5
; GCN3-NEXT: ; implicit-def: $vgpr3
; GCN3-NEXT: ; implicit-def: $vgpr2
-; GCN3-NEXT: .LBB72_4: ; %Flow3
; GCN3-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GCN3-NEXT: s_cbranch_execz .LBB72_6
-; GCN3-NEXT: ; %bb.5: ; %atomicrmw.private
-; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
-; GCN3-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc
-; GCN3-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen
+; GCN3-NEXT: s_cbranch_execz .LBB72_2
+; GCN3-NEXT: .LBB72_6: ; %atomicrmw.private
+; GCN3-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
+; GCN3-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
+; GCN3-NEXT: buffer_load_dword v1, v4, s[0:3], 0 offen offset:4
+; GCN3-NEXT: buffer_load_dword v0, v4, s[0:3], 0 offen
; GCN3-NEXT: s_waitcnt vmcnt(1)
-; GCN3-NEXT: v_xor_b32_e32 v1, v5, v3
+; GCN3-NEXT: v_xor_b32_e32 v3, v1, v3
; GCN3-NEXT: s_waitcnt vmcnt(0)
-; GCN3-NEXT: v_xor_b32_e32 v2, v4, v2
-; GCN3-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GCN3-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GCN3-NEXT: .LBB72_6: ; %atomicrmw.phi
+; GCN3-NEXT: v_xor_b32_e32 v2, v0, v2
+; GCN3-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; GCN3-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen offset:4
; GCN3-NEXT: s_or_b64 exec, exec, s[4:5]
-; GCN3-NEXT: v_mov_b32_e32 v0, v4
-; GCN3-NEXT: v_mov_b32_e32 v1, v5
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: s_setpc_b64 s[30:31]
%result = atomicrmw xor ptr %ptr, i64 %in seq_cst
diff --git a/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll b/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
index 514b49067db06..3e1aedb6f87b8 100644
--- a/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
@@ -731,8 +731,8 @@ define i128 @fptosi_bf16_to_i128(bfloat %x) {
; SDAG-NEXT: v_and_b32_e32 v0, 0x7f, v4
; SDAG-NEXT: s_movk_i32 s5, 0x85
; SDAG-NEXT: s_mov_b32 s4, 0
-; SDAG-NEXT: v_ashrrev_i32_e32 v5, 31, v7
-; SDAG-NEXT: v_or_b32_e32 v6, 1, v7
+; SDAG-NEXT: v_ashrrev_i32_e32 v6, 31, v7
+; SDAG-NEXT: v_or_b32_e32 v5, 1, v7
; SDAG-NEXT: v_or_b32_e32 v4, 0x80, v0
; SDAG-NEXT: v_cmp_lt_u16_e32 vcc, s5, v8
; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -756,24 +756,24 @@ define i128 @fptosi_bf16_to_i128(bfloat %x) {
; SDAG-NEXT: v_lshlrev_b64 v[3:4], v10, v[0:1]
; SDAG-NEXT: v_cndmask_b32_e64 v8, 0, v8, s[4:5]
; SDAG-NEXT: v_cndmask_b32_e32 v10, 0, v3, vcc
-; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v10, v6, 0
+; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v10, v5, 0
; SDAG-NEXT: v_mov_b32_e32 v2, 0
; SDAG-NEXT: v_cndmask_b32_e32 v13, 0, v4, vcc
-; SDAG-NEXT: v_mul_lo_u32 v11, v5, v8
-; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v13, v6, v[1:2]
-; SDAG-NEXT: v_mul_lo_u32 v12, v6, v9
-; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v6, v8, 0
-; SDAG-NEXT: v_mul_lo_u32 v6, v7, v13
+; SDAG-NEXT: v_mul_lo_u32 v11, v6, v8
+; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v13, v5, v[1:2]
+; SDAG-NEXT: v_mul_lo_u32 v12, v5, v9
+; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v5, v8, 0
+; SDAG-NEXT: v_mul_lo_u32 v5, v7, v13
; SDAG-NEXT: v_mov_b32_e32 v1, v3
-; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v10, v5, v[1:2]
+; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v10, v6, v[1:2]
; SDAG-NEXT: v_add3_u32 v9, v9, v12, v11
; SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v7, v10, v[8:9]
; SDAG-NEXT: v_mul_lo_u32 v7, v7, v10
; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], 0, 0, vcc
-; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v13, v5, v[2:3]
-; SDAG-NEXT: v_add3_u32 v4, v7, v9, v6
-; SDAG-NEXT: ; implicit-def: $vgpr6
+; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v13, v6, v[2:3]
+; SDAG-NEXT: v_add3_u32 v4, v7, v9, v5
+; SDAG-NEXT: ; implicit-def: $vgpr5
; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v2, v8
; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v4, vcc
; SDAG-NEXT: ; implicit-def: $vgpr8
@@ -783,9 +783,9 @@ define i128 @fptosi_bf16_to_i128(bfloat %x) {
; SDAG-NEXT: ; %bb.4: ; %fp-to-i-if-exp.small
; SDAG-NEXT: v_sub_u16_e32 v0, 0x86, v8
; SDAG-NEXT: v_lshrrev_b16_e32 v0, v0, v4
-; SDAG-NEXT: v_mul_hi_i32_i24_e32 v1, v0, v6
+; SDAG-NEXT: v_mul_hi_i32_i24_e32 v1, v0, v5
; SDAG-NEXT: v_ashrrev_i32_e32 v2, 31, v1
-; SDAG-NEXT: v_mul_i32_i24_e32 v0, v0, v6
+; SDAG-NEXT: v_mul_i32_i24_e32 v0, v0, v5
; SDAG-NEXT: v_mov_b32_e32 v3, v2
; SDAG-NEXT: ; %bb.5: ; %Flow1
; SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
diff --git a/llvm/test/CodeGen/AMDGPU/fract-match.ll b/llvm/test/CodeGen/AMDGPU/fract-match.ll
index 0899879cd66b8..0235cca584ae9 100644
--- a/llvm/test/CodeGen/AMDGPU/fract-match.ll
+++ b/llvm/test/CodeGen/AMDGPU/fract-match.ll
@@ -5295,51 +5295,63 @@ define float @safe_math_fract_f32_swapped_edge_case_split_block(float %x, i1 %co
; GFX7-LABEL: safe_math_fract_f32_swapped_edge_case_split_block:
; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_and_b32_e32 v1, 1, v1
-; GFX7-NEXT: v_cmp_ne_u32_e32 vcc, 1, v1
-; GFX7-NEXT: ; implicit-def: $vgpr1
+; GFX7-NEXT: v_mov_b32_e32 v2, v0
+; GFX7-NEXT: v_and_b32_e32 v0, 1, v1
+; GFX7-NEXT: v_cmp_ne_u32_e32 vcc, 1, v0
+; GFX7-NEXT: ; implicit-def: $vgpr0
; GFX7-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX7-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GFX7-NEXT: ; %bb.1: ; %ret
-; GFX7-NEXT: v_floor_f32_e32 v1, v0
-; GFX7-NEXT: v_sub_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_min_f32_e32 v1, 0x3f7fffff, v0
-; GFX7-NEXT: ; implicit-def: $vgpr0
-; GFX7-NEXT: ; %bb.2: ; %Flow
+; GFX7-NEXT: s_cbranch_execnz .LBB58_3
+; GFX7-NEXT: ; %bb.1: ; %Flow
; GFX7-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GFX7-NEXT: ; %bb.3: ; %edge_cases
+; GFX7-NEXT: s_cbranch_execnz .LBB58_4
+; GFX7-NEXT: .LBB58_2: ; %UnifiedReturnBlock
+; GFX7-NEXT: s_or_b64 exec, exec, s[4:5]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-NEXT: .LBB58_3: ; %ret
+; GFX7-NEXT: v_floor_f32_e32 v0, v2
+; GFX7-NEXT: v_sub_f32_e32 v0, v2, v0
+; GFX7-NEXT: v_min_f32_e32 v0, 0x3f7fffff, v0
+; GFX7-NEXT: ; implicit-def: $vgpr2
+; GFX7-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX7-NEXT: s_cbranch_execz .LBB58_2
+; GFX7-NEXT: .LBB58_4: ; %edge_cases
; GFX7-NEXT: s_mov_b32 s6, 0x7f800000
-; GFX7-NEXT: v_fract_f32_e32 v1, v0
-; GFX7-NEXT: v_cmp_neq_f32_e64 vcc, |v0|, s6
-; GFX7-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
-; GFX7-NEXT: ; %bb.4: ; %UnifiedReturnBlock
+; GFX7-NEXT: v_fract_f32_e32 v0, v2
+; GFX7-NEXT: v_cmp_neq_f32_e64 vcc, |v2|, s6
+; GFX7-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX7-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX7-NEXT: v_mov_b32_e32 v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: safe_math_fract_f32_swapped_edge_case_split_block:
; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_and_b32_e32 v1, 1, v1
-; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 1, v1
-; GFX8-NEXT: ; implicit-def: $vgpr1
+; GFX8-NEXT: v_mov_b32_e32 v2, v0
+; GFX8-NEXT: v_and_b32_e32 v0, 1, v1
+; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 1, v0
+; GFX8-NEXT: ; implicit-def: $vgpr0
; GFX8-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX8-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GFX8-NEXT: ; %bb.1: ; %ret
-; GFX8-NEXT: v_floor_f32_e32 v1, v0
-; GFX8-NEXT: v_sub_f32_e32 v0, v0, v1
-; GFX8-NEXT: v_min_f32_e32 v1, 0x3f7fffff, v0
-; GFX8-NEXT: ; implicit-def: $vgpr0
-; GFX8-NEXT: ; %bb.2: ; %Flow
+; GFX8-NEXT: s_cbranch_execnz .LBB58_3
+; GFX8-NEXT: ; %bb.1: ; %Flow
; GFX8-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; GFX8-NEXT: ; %bb.3: ; %edge_cases
+; GFX8-NEXT: s_cbranch_execnz .LBB58_4
+; GFX8-NEXT: .LBB58_2: ; %UnifiedReturnBlock
+; GFX8-NEXT: s_or_b64 exec, exec, s[4:5]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX8-NEXT: .LBB58_3: ; %ret
+; GFX8-NEXT: v_floor_f32_e32 v0, v2
+; GFX8-NEXT: v_sub_f32_e32 v0, v2, v0
+; GFX8-NEXT: v_min_f32_e32 v0, 0x3f7fffff, v0
+; GFX8-NEXT: ; implicit-def: $vgpr2
+; GFX8-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX8-NEXT: s_cbranch_execz .LBB58_2
+; GFX8-NEXT: .LBB58_4: ; %edge_cases
; GFX8-NEXT: s_mov_b32 s6, 0x7f800000
-; GFX8-NEXT: v_fract_f32_e32 v1, v0
-; GFX8-NEXT: v_cmp_neq_f32_e64 vcc, |v0|, s6
-; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
-; GFX8-NEXT: ; %bb.4: ; %UnifiedReturnBlock
+; GFX8-NEXT: v_fract_f32_e32 v0, v2
+; GFX8-NEXT: v_cmp_neq_f32_e64 vcc, |v2|, s6
+; GFX8-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX8-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX8-NEXT: v_mov_b32_e32 v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: safe_math_fract_f32_swapped_edge_case_split_block:
diff --git a/llvm/test/CodeGen/AMDGPU/frem.ll b/llvm/test/CodeGen/AMDGPU/frem.ll
index f202227662c40..da079280baf7e 100644
--- a/llvm/test/CodeGen/AMDGPU/frem.ll
+++ b/llvm/test/CodeGen/AMDGPU/frem.ll
@@ -440,36 +440,36 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX10-NEXT: s_waitcnt vmcnt(1)
; GFX10-NEXT: v_cvt_f32_f16_e64 v4, |v0|
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_cvt_f32_f16_e64 v2, |v1|
-; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v2
+; GFX10-NEXT: v_cvt_f32_f16_e64 v3, |v1|
+; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
; GFX10-NEXT: s_cbranch_vccz .LBB0_2
; GFX10-NEXT: ; %bb.1: ; %frem.else
-; GFX10-NEXT: v_and_b32_e32 v3, 0x8000, v0
-; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v2
+; GFX10-NEXT: v_and_b32_e32 v2, 0x8000, v0
+; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
; GFX10-NEXT: s_mov_b32 s2, 0
-; GFX10-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc_lo
+; GFX10-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc_lo
; GFX10-NEXT: s_branch .LBB0_3
; GFX10-NEXT: .LBB0_2:
; GFX10-NEXT: s_mov_b32 s2, -1
-; GFX10-NEXT: ; implicit-def: $vgpr3
+; GFX10-NEXT: ; implicit-def: $vgpr2
; GFX10-NEXT: .LBB0_3: ; %Flow18
; GFX10-NEXT: s_and_b32 s2, s2, exec_lo
; GFX10-NEXT: s_cselect_b32 s2, 1, 0
; GFX10-NEXT: s_cmp_lg_u32 s2, 1
; GFX10-NEXT: s_cbranch_scc1 .LBB0_9
; GFX10-NEXT: ; %bb.4: ; %frem.compute
-; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v4
+; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v4
+; GFX10-NEXT: v_frexp_mant_f32_e32 v6, v3
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
-; GFX10-NEXT: v_ldexp_f32 v4, v3, 11
-; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v2
-; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v2, v2
+; GFX10-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v2, v3
+; GFX10-NEXT: v_ldexp_f32 v3, v6, 1
; GFX10-NEXT: v_readfirstlane_b32 s2, v5
-; GFX10-NEXT: v_ldexp_f32 v3, v3, 1
; GFX10-NEXT: v_readfirstlane_b32 s3, v2
-; GFX10-NEXT: v_add_nc_u32_e32 v2, -1, v2
; GFX10-NEXT: v_div_scale_f32 v7, s4, v3, v3, 1.0
-; GFX10-NEXT: v_not_b32_e32 v6, v2
+; GFX10-NEXT: v_add_nc_u32_e32 v2, -1, v2
; GFX10-NEXT: v_rcp_f32_e32 v8, v7
+; GFX10-NEXT: v_not_b32_e32 v6, v2
; GFX10-NEXT: v_add_nc_u32_e32 v6, v6, v5
; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX10-NEXT: s_denorm_mode 15
@@ -514,14 +514,14 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX10-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
; GFX10-NEXT: v_ldexp_f32 v2, v3, v2
; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX10-NEXT: v_bfi_b32 v3, 0x7fff, v2, v0
+; GFX10-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
; GFX10-NEXT: .LBB0_9: ; %Flow19
; GFX10-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1
; GFX10-NEXT: v_cmp_nle_f16_e64 s2, 0x7c00, |v0|
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: s_and_b32 vcc_lo, s2, vcc_lo
-; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v3, vcc_lo
-; GFX10-NEXT: global_store_short v2, v0, s[0:1]
+; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo
+; GFX10-NEXT: global_store_short v3, v0, s[0:1]
; GFX10-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: frem_f16:
@@ -636,20 +636,20 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v4, |v0|
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v2, |v1|
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v3, |v1|
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v2
+; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB0_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %frem.else
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0x8000, v0
-; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0x8000, v0
+; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
; GFX11-FAKE16-NEXT: s_mov_b32 s2, 0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc_lo
; GFX11-FAKE16-NEXT: s_branch .LBB0_3
; GFX11-FAKE16-NEXT: .LBB0_2:
; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr2
; GFX11-FAKE16-NEXT: .LBB0_3: ; %Flow18
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, exec_lo
@@ -657,22 +657,22 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB0_9
; GFX11-FAKE16-NEXT: ; %bb.4: ; %frem.compute
-; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v3, v4
+; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, v4
+; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v6, v3
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_ldexp_f32 v4, v3, 11
-; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v3, v2
-; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v2, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v2, v3
+; GFX11-FAKE16-NEXT: v_ldexp_f32 v3, v6, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s2, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_ldexp_f32 v3, v3, 1
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s3, v2
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
-; GFX11-FAKE16-NEXT: v_not_b32_e32 v6, v2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
; GFX11-FAKE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_not_b32_e32 v6, v2
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
; GFX11-FAKE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX11-FAKE16-NEXT: s_denorm_mode 15
@@ -732,14 +732,13 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX11-FAKE16-NEXT: v_ldexp_f32 v2, v3, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX11-FAKE16-NEXT: v_bfi_b32 v3, 0x7fff, v2, v0
+; GFX11-FAKE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
; GFX11-FAKE16-NEXT: .LBB0_9: ; %Flow19
; GFX11-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1
; GFX11-FAKE16-NEXT: v_cmp_nle_f16_e64 s2, 0x7c00, |v0|
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, 0
; GFX11-FAKE16-NEXT: s_and_b32 vcc_lo, s2, vcc_lo
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v3, vcc_lo
-; GFX11-FAKE16-NEXT: global_store_b16 v2, v0, s[0:1]
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_cndmask_b32 v0, 0x7e00, v2
+; GFX11-FAKE16-NEXT: global_store_b16 v3, v0, s[0:1]
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX1150-TRUE16-LABEL: frem_f16:
@@ -18325,44 +18324,44 @@ define amdgpu_kernel void @frem_v2f64_const_one_denum(ptr addrspace(1) %out, ptr
; SI-NEXT: v_mov_b32_e32 v2, s2
; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
; SI-NEXT: v_frexp_exp_i32_f64_e32 v2, s[2:3]
-; SI-NEXT: v_ldexp_f64 v[4:5], v[0:1], 26
+; SI-NEXT: s_brev_b32 s8, -2
; SI-NEXT: v_readfirstlane_b32 s6, v2
; SI-NEXT: s_cselect_b32 s7, s6, 0
; SI-NEXT: s_add_i32 s9, s7, -1
-; SI-NEXT: s_brev_b32 s8, -2
+; SI-NEXT: v_ldexp_f64 v[1:2], v[0:1], 26
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_cmp_lt_i32 s9, 27
; SI-NEXT: s_cbranch_scc1 .LBB15_8
; SI-NEXT: ; %bb.5: ; %frem.loop_body23.preheader
; SI-NEXT: s_add_i32 s9, s7, 25
-; SI-NEXT: v_mov_b32_e32 v6, 0x43300000
+; SI-NEXT: v_mov_b32_e32 v5, 0x43300000
; SI-NEXT: v_mov_b32_e32 v0, 0
; SI-NEXT: s_mov_b32 s7, 0x432fffff
; SI-NEXT: .LBB15_6: ; %frem.loop_body23
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
-; SI-NEXT: v_mov_b32_e32 v3, v5
-; SI-NEXT: v_mov_b32_e32 v2, v4
-; SI-NEXT: v_bfi_b32 v1, s8, v6, v3
-; SI-NEXT: v_add_f64 v[4:5], v[2:3], v[0:1]
-; SI-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[6:7]
-; SI-NEXT: v_add_f64 v[4:5], v[4:5], -v[0:1]
+; SI-NEXT: v_mov_b32_e32 v4, v2
+; SI-NEXT: v_mov_b32_e32 v3, v1
+; SI-NEXT: v_bfi_b32 v1, s8, v5, v4
+; SI-NEXT: v_add_f64 v[6:7], v[3:4], v[0:1]
+; SI-NEXT: v_cmp_gt_f64_e64 vcc, |v[3:4]|, s[6:7]
+; SI-NEXT: v_add_f64 v[1:2], v[6:7], -v[0:1]
; SI-NEXT: s_sub_i32 s9, s9, 26
-; SI-NEXT: v_cndmask_b32_e32 v5, v5, v3, vcc
-; SI-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
-; SI-NEXT: v_add_f64 v[4:5], v[2:3], -v[4:5]
+; SI-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
+; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
+; SI-NEXT: v_add_f64 v[1:2], v[3:4], -v[1:2]
; SI-NEXT: s_cmp_gt_i32 s9, 26
-; SI-NEXT: v_cmp_gt_f64_e32 vcc, 0, v[4:5]
-; SI-NEXT: v_add_f64 v[7:8], v[4:5], 1.0
-; SI-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc
-; SI-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc
-; SI-NEXT: v_ldexp_f64 v[4:5], v[4:5], 26
+; SI-NEXT: v_cmp_gt_f64_e32 vcc, 0, v[1:2]
+; SI-NEXT: v_add_f64 v[6:7], v[1:2], 1.0
+; SI-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc
+; SI-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
+; SI-NEXT: v_ldexp_f64 v[1:2], v[1:2], 26
; SI-NEXT: s_cbranch_scc1 .LBB15_6
; SI-NEXT: ; %bb.7: ; %Flow50
-; SI-NEXT: v_mov_b32_e32 v5, v3
-; SI-NEXT: v_mov_b32_e32 v4, v2
+; SI-NEXT: v_mov_b32_e32 v1, v3
+; SI-NEXT: v_mov_b32_e32 v2, v4
; SI-NEXT: .LBB15_8: ; %frem.loop_exit24
; SI-NEXT: s_sub_i32 s6, s9, 25
-; SI-NEXT: v_ldexp_f64 v[0:1], v[4:5], s6
+; SI-NEXT: v_ldexp_f64 v[0:1], v[1:2], s6
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_mov_b32 s7, 0x432fffff
; SI-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[6:7]
@@ -18415,44 +18414,44 @@ define amdgpu_kernel void @frem_v2f64_const_one_denum(ptr addrspace(1) %out, ptr
; SI-NEXT: v_mov_b32_e32 v4, s4
; SI-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-NEXT: v_frexp_exp_i32_f64_e32 v4, s[4:5]
-; SI-NEXT: v_ldexp_f64 v[6:7], v[2:3], 26
+; SI-NEXT: s_brev_b32 s8, -2
; SI-NEXT: v_readfirstlane_b32 s6, v4
; SI-NEXT: s_cselect_b32 s7, s6, 0
; SI-NEXT: s_add_i32 s9, s7, -1
-; SI-NEXT: s_brev_b32 s8, -2
+; SI-NEXT: v_ldexp_f64 v[3:4], v[2:3], 26
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_cmp_lt_i32 s9, 27
; SI-NEXT: s_cbranch_scc1 .LBB15_18
; SI-NEXT: ; %bb.15: ; %frem.loop_body.preheader
; SI-NEXT: s_add_i32 s9, s7, 25
-; SI-NEXT: v_mov_b32_e32 v8, 0x43300000
+; SI-NEXT: v_mov_b32_e32 v7, 0x43300000
; SI-NEXT: v_mov_b32_e32 v2, 0
; SI-NEXT: s_mov_b32 s7, 0x432fffff
; SI-NEXT: .LBB15_16: ; %frem.loop_body
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
-; SI-NEXT: v_mov_b32_e32 v5, v7
-; SI-NEXT: v_mov_b32_e32 v4, v6
-; SI-NEXT: v_bfi_b32 v3, s8, v8, v5
-; SI-NEXT: v_add_f64 v[6:7], v[4:5], v[2:3]
-; SI-NEXT: v_cmp_gt_f64_e64 vcc, |v[4:5]|, s[6:7]
-; SI-NEXT: v_add_f64 v[6:7], v[6:7], -v[2:3]
+; SI-NEXT: v_mov_b32_e32 v6, v4
+; SI-NEXT: v_mov_b32_e32 v5, v3
+; SI-NEXT: v_bfi_b32 v3, s8, v7, v6
+; SI-NEXT: v_add_f64 v[8:9], v[5:6], v[2:3]
+; SI-NEXT: v_cmp_gt_f64_e64 vcc, |v[5:6]|, s[6:7]
+; SI-NEXT: v_add_f64 v[3:4], v[8:9], -v[2:3]
; SI-NEXT: s_sub_i32 s9, s9, 26
-; SI-NEXT: v_cndmask_b32_e32 v7, v7, v5, vcc
-; SI-NEXT: v_cndmask_b32_e32 v6, v6, v4, vcc
-; SI-NEXT: v_add_f64 v[6:7], v[4:5], -v[6:7]
+; SI-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc
+; SI-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
+; SI-NEXT: v_add_f64 v[3:4], v[5:6], -v[3:4]
; SI-NEXT: s_cmp_gt_i32 s9, 26
-; SI-NEXT: v_cmp_gt_f64_e32 vcc, 0, v[6:7]
-; SI-NEXT: v_add_f64 v[9:10], v[6:7], 1.0
-; SI-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc
-; SI-NEXT: v_cndmask_b32_e32 v6, v6, v9, vcc
-; SI-NEXT: v_ldexp_f64 v[6:7], v[6:7], 26
+; SI-NEXT: v_cmp_gt_f64_e32 vcc, 0, v[3:4]
+; SI-NEXT: v_add_f64 v[8:9], v[3:4], 1.0
+; SI-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc
+; SI-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc
+; SI-NEXT: v_ldexp_f64 v[3:4], v[3:4], 26
; SI-NEXT: s_cbranch_scc1 .LBB15_16
; SI-NEXT: ; %bb.17: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v7, v5
-; SI-NEXT: v_mov_b32_e32 v6, v4
+; SI-NEXT: v_mov_b32_e32 v3, v5
+; SI-NEXT: v_mov_b32_e32 v4, v6
; SI-NEXT: .LBB15_18: ; %frem.loop_exit
; SI-NEXT: s_sub_i32 s6, s9, 25
-; SI-NEXT: v_ldexp_f64 v[2:3], v[6:7], s6
+; SI-NEXT: v_ldexp_f64 v[2:3], v[3:4], s6
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_mov_b32 s7, 0x432fffff
; SI-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[6:7]
diff --git a/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll b/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
index 6adfd1dcc6958..5351e52d50f2c 100644
--- a/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
@@ -3120,44 +3120,44 @@ define amdgpu_kernel void @global_atomic_fmax_double_uni_address_div_value_agent
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX9-NEXT: v_mbcnt_lo_u32_b32 v2, exec_lo, 0
; GFX9-NEXT: v_mbcnt_hi_u32_b32 v2, exec_hi, v2
-; GFX9-NEXT: s_mov_b32 s0, 0
-; GFX9-NEXT: s_mov_b32 s1, 0x7ff80000
-; GFX9-NEXT: s_mov_b64 s[2:3], exec
+; GFX9-NEXT: s_mov_b32 s2, 0
+; GFX9-NEXT: s_mov_b32 s3, 0x7ff80000
+; GFX9-NEXT: s_mov_b64 s[0:1], exec
; GFX9-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT: s_ff1_i32_b64 s6, s[2:3]
+; GFX9-NEXT: s_ff1_i32_b64 s6, s[0:1]
; GFX9-NEXT: v_readlane_b32 s4, v0, s6
; GFX9-NEXT: v_readlane_b32 s5, v1, s6
-; GFX9-NEXT: v_mov_b32_e32 v4, s1
-; GFX9-NEXT: v_mov_b32_e32 v3, s0
+; GFX9-NEXT: v_mov_b32_e32 v4, s3
+; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_max_f64 v[3:4], s[4:5], v[3:4]
-; GFX9-NEXT: s_bitset0_b64 s[2:3], s6
-; GFX9-NEXT: s_cmp_lg_u64 s[2:3], 0
-; GFX9-NEXT: v_readfirstlane_b32 s0, v3
-; GFX9-NEXT: v_readfirstlane_b32 s1, v4
+; GFX9-NEXT: s_bitset0_b64 s[0:1], s6
+; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
+; GFX9-NEXT: v_readfirstlane_b32 s2, v3
+; GFX9-NEXT: v_readfirstlane_b32 s3, v4
; GFX9-NEXT: s_cbranch_scc1 .LBB7_1
; GFX9-NEXT: ; %bb.2:
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
-; GFX9-NEXT: s_and_saveexec_b64 s[2:3], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX9-NEXT: s_cbranch_execz .LBB7_5
; GFX9-NEXT: ; %bb.3:
-; GFX9-NEXT: s_load_dwordx2 s[2:3], s[34:35], 0x24
+; GFX9-NEXT: s_load_dwordx2 s[0:1], s[34:35], 0x24
; GFX9-NEXT: v_mov_b32_e32 v6, 0
-; GFX9-NEXT: v_max_f64 v[4:5], s[0:1], s[0:1]
-; GFX9-NEXT: s_mov_b64 s[0:1], 0
+; GFX9-NEXT: v_max_f64 v[4:5], s[2:3], s[2:3]
+; GFX9-NEXT: s_mov_b64 s[2:3], 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[2:3]
+; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[0:1]
; GFX9-NEXT: .LBB7_4: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_f64 v[0:1], v[2:3], v[2:3]
; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[2:3] glc
+; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[0:1] glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, v1
-; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
+; GFX9-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v2, v0
-; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-NEXT: s_cbranch_execnz .LBB7_4
; GFX9-NEXT: .LBB7_5:
; GFX9-NEXT: s_endpgm
@@ -4309,44 +4309,44 @@ define amdgpu_kernel void @global_atomic_fmax_double_uni_address_div_value_one_a
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX9-NEXT: v_mbcnt_lo_u32_b32 v2, exec_lo, 0
; GFX9-NEXT: v_mbcnt_hi_u32_b32 v2, exec_hi, v2
-; GFX9-NEXT: s_mov_b32 s0, 0
-; GFX9-NEXT: s_mov_b32 s1, 0x7ff80000
-; GFX9-NEXT: s_mov_b64 s[2:3], exec
+; GFX9-NEXT: s_mov_b32 s2, 0
+; GFX9-NEXT: s_mov_b32 s3, 0x7ff80000
+; GFX9-NEXT: s_mov_b64 s[0:1], exec
; GFX9-NEXT: .LBB9_1: ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT: s_ff1_i32_b64 s6, s[2:3]
+; GFX9-NEXT: s_ff1_i32_b64 s6, s[0:1]
; GFX9-NEXT: v_readlane_b32 s4, v0, s6
; GFX9-NEXT: v_readlane_b32 s5, v1, s6
-; GFX9-NEXT: v_mov_b32_e32 v4, s1
-; GFX9-NEXT: v_mov_b32_e32 v3, s0
+; GFX9-NEXT: v_mov_b32_e32 v4, s3
+; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_max_f64 v[3:4], s[4:5], v[3:4]
-; GFX9-NEXT: s_bitset0_b64 s[2:3], s6
-; GFX9-NEXT: s_cmp_lg_u64 s[2:3], 0
-; GFX9-NEXT: v_readfirstlane_b32 s0, v3
-; GFX9-NEXT: v_readfirstlane_b32 s1, v4
+; GFX9-NEXT: s_bitset0_b64 s[0:1], s6
+; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
+; GFX9-NEXT: v_readfirstlane_b32 s2, v3
+; GFX9-NEXT: v_readfirstlane_b32 s3, v4
; GFX9-NEXT: s_cbranch_scc1 .LBB9_1
; GFX9-NEXT: ; %bb.2:
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
-; GFX9-NEXT: s_and_saveexec_b64 s[2:3], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX9-NEXT: s_cbranch_execz .LBB9_5
; GFX9-NEXT: ; %bb.3:
-; GFX9-NEXT: s_load_dwordx2 s[2:3], s[34:35], 0x24
+; GFX9-NEXT: s_load_dwordx2 s[0:1], s[34:35], 0x24
; GFX9-NEXT: v_mov_b32_e32 v6, 0
-; GFX9-NEXT: v_max_f64 v[4:5], s[0:1], s[0:1]
-; GFX9-NEXT: s_mov_b64 s[0:1], 0
+; GFX9-NEXT: v_max_f64 v[4:5], s[2:3], s[2:3]
+; GFX9-NEXT: s_mov_b64 s[2:3], 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[2:3]
+; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[0:1]
; GFX9-NEXT: .LBB9_4: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_f64 v[0:1], v[2:3], v[2:3]
; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[2:3] glc
+; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[0:1] glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, v1
-; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
+; GFX9-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v2, v0
-; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-NEXT: s_cbranch_execnz .LBB9_4
; GFX9-NEXT: .LBB9_5:
; GFX9-NEXT: s_endpgm
@@ -5498,44 +5498,44 @@ define amdgpu_kernel void @global_atomic_fmax_double_uni_address_div_value_defau
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX9-NEXT: v_mbcnt_lo_u32_b32 v2, exec_lo, 0
; GFX9-NEXT: v_mbcnt_hi_u32_b32 v2, exec_hi, v2
-; GFX9-NEXT: s_mov_b32 s0, 0
-; GFX9-NEXT: s_mov_b32 s1, 0x7ff80000
-; GFX9-NEXT: s_mov_b64 s[2:3], exec
+; GFX9-NEXT: s_mov_b32 s2, 0
+; GFX9-NEXT: s_mov_b32 s3, 0x7ff80000
+; GFX9-NEXT: s_mov_b64 s[0:1], exec
; GFX9-NEXT: .LBB11_1: ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT: s_ff1_i32_b64 s6, s[2:3]
+; GFX9-NEXT: s_ff1_i32_b64 s6, s[0:1]
; GFX9-NEXT: v_readlane_b32 s4, v0, s6
; GFX9-NEXT: v_readlane_b32 s5, v1, s6
-; GFX9-NEXT: v_mov_b32_e32 v4, s1
-; GFX9-NEXT: v_mov_b32_e32 v3, s0
+; GFX9-NEXT: v_mov_b32_e32 v4, s3
+; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_max_f64 v[3:4], s[4:5], v[3:4]
-; GFX9-NEXT: s_bitset0_b64 s[2:3], s6
-; GFX9-NEXT: s_cmp_lg_u64 s[2:3], 0
-; GFX9-NEXT: v_readfirstlane_b32 s0, v3
-; GFX9-NEXT: v_readfirstlane_b32 s1, v4
+; GFX9-NEXT: s_bitset0_b64 s[0:1], s6
+; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
+; GFX9-NEXT: v_readfirstlane_b32 s2, v3
+; GFX9-NEXT: v_readfirstlane_b32 s3, v4
; GFX9-NEXT: s_cbranch_scc1 .LBB11_1
; GFX9-NEXT: ; %bb.2:
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
-; GFX9-NEXT: s_and_saveexec_b64 s[2:3], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX9-NEXT: s_cbranch_execz .LBB11_5
; GFX9-NEXT: ; %bb.3:
-; GFX9-NEXT: s_load_dwordx2 s[2:3], s[34:35], 0x24
+; GFX9-NEXT: s_load_dwordx2 s[0:1], s[34:35], 0x24
; GFX9-NEXT: v_mov_b32_e32 v6, 0
-; GFX9-NEXT: v_max_f64 v[4:5], s[0:1], s[0:1]
-; GFX9-NEXT: s_mov_b64 s[0:1], 0
+; GFX9-NEXT: v_max_f64 v[4:5], s[2:3], s[2:3]
+; GFX9-NEXT: s_mov_b64 s[2:3], 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[2:3]
+; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[0:1]
; GFX9-NEXT: .LBB11_4: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_f64 v[0:1], v[2:3], v[2:3]
; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[2:3] glc
+; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[0:1] glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, v1
-; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
+; GFX9-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v2, v0
-; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-NEXT: s_cbranch_execnz .LBB11_4
; GFX9-NEXT: .LBB11_5:
; GFX9-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll b/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
index e4d5ce2741ad6..16f0ed07ee8d3 100644
--- a/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
@@ -3120,44 +3120,44 @@ define amdgpu_kernel void @global_atomic_fmin_double_uni_address_div_value_agent
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX9-NEXT: v_mbcnt_lo_u32_b32 v2, exec_lo, 0
; GFX9-NEXT: v_mbcnt_hi_u32_b32 v2, exec_hi, v2
-; GFX9-NEXT: s_mov_b32 s0, 0
-; GFX9-NEXT: s_mov_b32 s1, 0x7ff80000
-; GFX9-NEXT: s_mov_b64 s[2:3], exec
+; GFX9-NEXT: s_mov_b32 s2, 0
+; GFX9-NEXT: s_mov_b32 s3, 0x7ff80000
+; GFX9-NEXT: s_mov_b64 s[0:1], exec
; GFX9-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT: s_ff1_i32_b64 s6, s[2:3]
+; GFX9-NEXT: s_ff1_i32_b64 s6, s[0:1]
; GFX9-NEXT: v_readlane_b32 s4, v0, s6
; GFX9-NEXT: v_readlane_b32 s5, v1, s6
-; GFX9-NEXT: v_mov_b32_e32 v4, s1
-; GFX9-NEXT: v_mov_b32_e32 v3, s0
+; GFX9-NEXT: v_mov_b32_e32 v4, s3
+; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_min_f64 v[3:4], s[4:5], v[3:4]
-; GFX9-NEXT: s_bitset0_b64 s[2:3], s6
-; GFX9-NEXT: s_cmp_lg_u64 s[2:3], 0
-; GFX9-NEXT: v_readfirstlane_b32 s0, v3
-; GFX9-NEXT: v_readfirstlane_b32 s1, v4
+; GFX9-NEXT: s_bitset0_b64 s[0:1], s6
+; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
+; GFX9-NEXT: v_readfirstlane_b32 s2, v3
+; GFX9-NEXT: v_readfirstlane_b32 s3, v4
; GFX9-NEXT: s_cbranch_scc1 .LBB7_1
; GFX9-NEXT: ; %bb.2:
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
-; GFX9-NEXT: s_and_saveexec_b64 s[2:3], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX9-NEXT: s_cbranch_execz .LBB7_5
; GFX9-NEXT: ; %bb.3:
-; GFX9-NEXT: s_load_dwordx2 s[2:3], s[34:35], 0x24
+; GFX9-NEXT: s_load_dwordx2 s[0:1], s[34:35], 0x24
; GFX9-NEXT: v_mov_b32_e32 v6, 0
-; GFX9-NEXT: v_max_f64 v[4:5], s[0:1], s[0:1]
-; GFX9-NEXT: s_mov_b64 s[0:1], 0
+; GFX9-NEXT: v_max_f64 v[4:5], s[2:3], s[2:3]
+; GFX9-NEXT: s_mov_b64 s[2:3], 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[2:3]
+; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[0:1]
; GFX9-NEXT: .LBB7_4: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_f64 v[0:1], v[2:3], v[2:3]
; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[2:3] glc
+; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[0:1] glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, v1
-; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
+; GFX9-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v2, v0
-; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-NEXT: s_cbranch_execnz .LBB7_4
; GFX9-NEXT: .LBB7_5:
; GFX9-NEXT: s_endpgm
@@ -4309,44 +4309,44 @@ define amdgpu_kernel void @global_atomic_fmin_double_uni_address_div_value_one_a
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX9-NEXT: v_mbcnt_lo_u32_b32 v2, exec_lo, 0
; GFX9-NEXT: v_mbcnt_hi_u32_b32 v2, exec_hi, v2
-; GFX9-NEXT: s_mov_b32 s0, 0
-; GFX9-NEXT: s_mov_b32 s1, 0x7ff80000
-; GFX9-NEXT: s_mov_b64 s[2:3], exec
+; GFX9-NEXT: s_mov_b32 s2, 0
+; GFX9-NEXT: s_mov_b32 s3, 0x7ff80000
+; GFX9-NEXT: s_mov_b64 s[0:1], exec
; GFX9-NEXT: .LBB9_1: ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT: s_ff1_i32_b64 s6, s[2:3]
+; GFX9-NEXT: s_ff1_i32_b64 s6, s[0:1]
; GFX9-NEXT: v_readlane_b32 s4, v0, s6
; GFX9-NEXT: v_readlane_b32 s5, v1, s6
-; GFX9-NEXT: v_mov_b32_e32 v4, s1
-; GFX9-NEXT: v_mov_b32_e32 v3, s0
+; GFX9-NEXT: v_mov_b32_e32 v4, s3
+; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_min_f64 v[3:4], s[4:5], v[3:4]
-; GFX9-NEXT: s_bitset0_b64 s[2:3], s6
-; GFX9-NEXT: s_cmp_lg_u64 s[2:3], 0
-; GFX9-NEXT: v_readfirstlane_b32 s0, v3
-; GFX9-NEXT: v_readfirstlane_b32 s1, v4
+; GFX9-NEXT: s_bitset0_b64 s[0:1], s6
+; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
+; GFX9-NEXT: v_readfirstlane_b32 s2, v3
+; GFX9-NEXT: v_readfirstlane_b32 s3, v4
; GFX9-NEXT: s_cbranch_scc1 .LBB9_1
; GFX9-NEXT: ; %bb.2:
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
-; GFX9-NEXT: s_and_saveexec_b64 s[2:3], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX9-NEXT: s_cbranch_execz .LBB9_5
; GFX9-NEXT: ; %bb.3:
-; GFX9-NEXT: s_load_dwordx2 s[2:3], s[34:35], 0x24
+; GFX9-NEXT: s_load_dwordx2 s[0:1], s[34:35], 0x24
; GFX9-NEXT: v_mov_b32_e32 v6, 0
-; GFX9-NEXT: v_max_f64 v[4:5], s[0:1], s[0:1]
-; GFX9-NEXT: s_mov_b64 s[0:1], 0
+; GFX9-NEXT: v_max_f64 v[4:5], s[2:3], s[2:3]
+; GFX9-NEXT: s_mov_b64 s[2:3], 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[2:3]
+; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[0:1]
; GFX9-NEXT: .LBB9_4: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_f64 v[0:1], v[2:3], v[2:3]
; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[2:3] glc
+; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[0:1] glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, v1
-; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
+; GFX9-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v2, v0
-; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-NEXT: s_cbranch_execnz .LBB9_4
; GFX9-NEXT: .LBB9_5:
; GFX9-NEXT: s_endpgm
@@ -5498,44 +5498,44 @@ define amdgpu_kernel void @global_atomic_fmin_double_uni_address_div_value_defau
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX9-NEXT: v_mbcnt_lo_u32_b32 v2, exec_lo, 0
; GFX9-NEXT: v_mbcnt_hi_u32_b32 v2, exec_hi, v2
-; GFX9-NEXT: s_mov_b32 s0, 0
-; GFX9-NEXT: s_mov_b32 s1, 0x7ff80000
-; GFX9-NEXT: s_mov_b64 s[2:3], exec
+; GFX9-NEXT: s_mov_b32 s2, 0
+; GFX9-NEXT: s_mov_b32 s3, 0x7ff80000
+; GFX9-NEXT: s_mov_b64 s[0:1], exec
; GFX9-NEXT: .LBB11_1: ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT: s_ff1_i32_b64 s6, s[2:3]
+; GFX9-NEXT: s_ff1_i32_b64 s6, s[0:1]
; GFX9-NEXT: v_readlane_b32 s4, v0, s6
; GFX9-NEXT: v_readlane_b32 s5, v1, s6
-; GFX9-NEXT: v_mov_b32_e32 v4, s1
-; GFX9-NEXT: v_mov_b32_e32 v3, s0
+; GFX9-NEXT: v_mov_b32_e32 v4, s3
+; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_min_f64 v[3:4], s[4:5], v[3:4]
-; GFX9-NEXT: s_bitset0_b64 s[2:3], s6
-; GFX9-NEXT: s_cmp_lg_u64 s[2:3], 0
-; GFX9-NEXT: v_readfirstlane_b32 s0, v3
-; GFX9-NEXT: v_readfirstlane_b32 s1, v4
+; GFX9-NEXT: s_bitset0_b64 s[0:1], s6
+; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
+; GFX9-NEXT: v_readfirstlane_b32 s2, v3
+; GFX9-NEXT: v_readfirstlane_b32 s3, v4
; GFX9-NEXT: s_cbranch_scc1 .LBB11_1
; GFX9-NEXT: ; %bb.2:
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
-; GFX9-NEXT: s_and_saveexec_b64 s[2:3], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX9-NEXT: s_cbranch_execz .LBB11_5
; GFX9-NEXT: ; %bb.3:
-; GFX9-NEXT: s_load_dwordx2 s[2:3], s[34:35], 0x24
+; GFX9-NEXT: s_load_dwordx2 s[0:1], s[34:35], 0x24
; GFX9-NEXT: v_mov_b32_e32 v6, 0
-; GFX9-NEXT: v_max_f64 v[4:5], s[0:1], s[0:1]
-; GFX9-NEXT: s_mov_b64 s[0:1], 0
+; GFX9-NEXT: v_max_f64 v[4:5], s[2:3], s[2:3]
+; GFX9-NEXT: s_mov_b64 s[2:3], 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[2:3]
+; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[0:1]
; GFX9-NEXT: .LBB11_4: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_f64 v[0:1], v[2:3], v[2:3]
; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[2:3] glc
+; GFX9-NEXT: global_atomic_cmpswap_x2 v[0:1], v6, v[0:3], s[0:1] glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, v1
-; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
+; GFX9-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v2, v0
-; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-NEXT: s_cbranch_execnz .LBB11_4
; GFX9-NEXT: .LBB11_5:
; GFX9-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
index cacab31f263c8..267efaad60c79 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
@@ -222,8 +222,8 @@
; GCN-O2-NEXT: process-imp-defs
; GCN-O2-NEXT: unreachable-mbb-elimination
; GCN-O2-NEXT: require<live-vars>
-; GCN-O2-NEXT: si-opt-vgpr-liverange
; GCN-O2-NEXT: require<machine-loops>
+; GCN-O2-NEXT: si-opt-vgpr-liverange
; GCN-O2-NEXT: phi-node-elimination
; GCN-O2-NEXT: si-lower-control-flow
; GCN-O2-NEXT: require<live-intervals>
@@ -411,8 +411,8 @@
; GCN-O3-NEXT: process-imp-defs
; GCN-O3-NEXT: unreachable-mbb-elimination
; GCN-O3-NEXT: require<live-vars>
-; GCN-O3-NEXT: si-opt-vgpr-liverange
; GCN-O3-NEXT: require<machine-loops>
+; GCN-O3-NEXT: si-opt-vgpr-liverange
; GCN-O3-NEXT: phi-node-elimination
; GCN-O3-NEXT: si-lower-control-flow
; GCN-O3-NEXT: require<live-intervals>
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 59c74e1b18c9c..d165440b38b99 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -362,11 +362,11 @@
; GCN-O1-NEXT: Remove unreachable machine basic blocks
; GCN-O1-NEXT: Live Variable Analysis
; GCN-O1-NEXT: MachineDominator Tree Construction
+; GCN-O1-NEXT: Slot index numbering
+; GCN-O1-NEXT: Live Interval Analysis
; GCN-O1-NEXT: SI Optimize VGPR LiveRange
; GCN-O1-NEXT: Eliminate PHI nodes for register allocation
; GCN-O1-NEXT: SI Lower control flow pseudo instructions
-; GCN-O1-NEXT: Slot index numbering
-; GCN-O1-NEXT: Live Interval Analysis
; GCN-O1-NEXT: Two-Address instruction pass
; GCN-O1-NEXT: Machine Natural Loop Construction
; GCN-O1-NEXT: Register Coalescer
@@ -691,11 +691,11 @@
; GCN-O1-OPTS-NEXT: Process Implicit Definitions
; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks
; GCN-O1-OPTS-NEXT: Live Variable Analysis
+; GCN-O1-OPTS-NEXT: Slot index numbering
+; GCN-O1-OPTS-NEXT: Live Interval Analysis
; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange
; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation
; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions
-; GCN-O1-OPTS-NEXT: Slot index numbering
-; GCN-O1-OPTS-NEXT: Live Interval Analysis
; GCN-O1-OPTS-NEXT: Two-Address instruction pass
; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction
; GCN-O1-OPTS-NEXT: Register Coalescer
@@ -1025,11 +1025,11 @@
; GCN-O2-NEXT: Process Implicit Definitions
; GCN-O2-NEXT: Remove unreachable machine basic blocks
; GCN-O2-NEXT: Live Variable Analysis
+; GCN-O2-NEXT: Slot index numbering
+; GCN-O2-NEXT: Live Interval Analysis
; GCN-O2-NEXT: SI Optimize VGPR LiveRange
; GCN-O2-NEXT: Eliminate PHI nodes for register allocation
; GCN-O2-NEXT: SI Lower control flow pseudo instructions
-; GCN-O2-NEXT: Slot index numbering
-; GCN-O2-NEXT: Live Interval Analysis
; GCN-O2-NEXT: Two-Address instruction pass
; GCN-O2-NEXT: Machine Natural Loop Construction
; GCN-O2-NEXT: Register Coalescer
@@ -1375,11 +1375,11 @@
; GCN-O3-NEXT: Process Implicit Definitions
; GCN-O3-NEXT: Remove unreachable machine basic blocks
; GCN-O3-NEXT: Live Variable Analysis
+; GCN-O3-NEXT: Slot index numbering
+; GCN-O3-NEXT: Live Interval Analysis
; GCN-O3-NEXT: SI Optimize VGPR LiveRange
; GCN-O3-NEXT: Eliminate PHI nodes for register allocation
; GCN-O3-NEXT: SI Lower control flow pseudo instructions
-; GCN-O3-NEXT: Slot index numbering
-; GCN-O3-NEXT: Live Interval Analysis
; GCN-O3-NEXT: Two-Address instruction pass
; GCN-O3-NEXT: Machine Natural Loop Construction
; GCN-O3-NEXT: Register Coalescer
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
index d48a2f85724ad..b5edf1eba144a 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
@@ -372,25 +372,25 @@ define amdgpu_cs_chain void @control_flow(<3 x i32> inreg %sgpr, ptr inreg %call
; GISEL12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GISEL12-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GISEL12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GISEL12-NEXT: s_mov_b32 s4, exec_lo
-; GISEL12-NEXT: ; implicit-def: $sgpr3
+; GISEL12-NEXT: s_mov_b32 s3, exec_lo
+; GISEL12-NEXT: ; implicit-def: $sgpr4
; GISEL12-NEXT: v_cmpx_lt_i32_e32 v12, v13
; GISEL12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GISEL12-NEXT: s_xor_b32 s4, exec_lo, s4
+; GISEL12-NEXT: s_xor_b32 s3, exec_lo, s3
; GISEL12-NEXT: ; %bb.5: ; %tail.else
-; GISEL12-NEXT: s_mov_b32 s3, 15
+; GISEL12-NEXT: s_mov_b32 s4, 15
; GISEL12-NEXT: ; %bb.6: ; %Flow
; GISEL12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GISEL12-NEXT: s_or_saveexec_b32 s4, s4
-; GISEL12-NEXT: v_mov_b32_e32 v8, s3
+; GISEL12-NEXT: s_or_saveexec_b32 s3, s3
+; GISEL12-NEXT: v_mov_b32_e32 v8, s4
; GISEL12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GISEL12-NEXT: s_xor_b32 exec_lo, exec_lo, s4
+; GISEL12-NEXT: s_xor_b32 exec_lo, exec_lo, s3
; GISEL12-NEXT: ; %bb.7: ; %tail.then
-; GISEL12-NEXT: s_mov_b32 s3, 44
+; GISEL12-NEXT: s_mov_b32 s4, 44
; GISEL12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GISEL12-NEXT: v_mov_b32_e32 v8, s3
+; GISEL12-NEXT: v_mov_b32_e32 v8, s4
; GISEL12-NEXT: ; %bb.8: ; %tail.end
-; GISEL12-NEXT: s_or_b32 exec_lo, exec_lo, s4
+; GISEL12-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GISEL12-NEXT: s_mov_b32 exec_lo, s5
; GISEL12-NEXT: s_setpc_b64 s[6:7]
;
@@ -481,21 +481,21 @@ define amdgpu_cs_chain void @control_flow(<3 x i32> inreg %sgpr, ptr inreg %call
; GISEL10-NEXT: v_add_nc_u32_e32 v10, 43, v2
; GISEL10-NEXT: .LBB3_4: ; %Flow1
; GISEL10-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GISEL10-NEXT: s_mov_b32 s4, exec_lo
-; GISEL10-NEXT: ; implicit-def: $sgpr3
+; GISEL10-NEXT: s_mov_b32 s3, exec_lo
+; GISEL10-NEXT: ; implicit-def: $sgpr4
; GISEL10-NEXT: v_cmpx_lt_i32_e32 v12, v13
-; GISEL10-NEXT: s_xor_b32 s4, exec_lo, s4
+; GISEL10-NEXT: s_xor_b32 s3, exec_lo, s3
; GISEL10-NEXT: ; %bb.5: ; %tail.else
-; GISEL10-NEXT: s_mov_b32 s3, 15
+; GISEL10-NEXT: s_mov_b32 s4, 15
; GISEL10-NEXT: ; %bb.6: ; %Flow
-; GISEL10-NEXT: s_or_saveexec_b32 s4, s4
-; GISEL10-NEXT: v_mov_b32_e32 v8, s3
-; GISEL10-NEXT: s_xor_b32 exec_lo, exec_lo, s4
+; GISEL10-NEXT: s_or_saveexec_b32 s3, s3
+; GISEL10-NEXT: v_mov_b32_e32 v8, s4
+; GISEL10-NEXT: s_xor_b32 exec_lo, exec_lo, s3
; GISEL10-NEXT: ; %bb.7: ; %tail.then
-; GISEL10-NEXT: s_mov_b32 s3, 44
-; GISEL10-NEXT: v_mov_b32_e32 v8, s3
+; GISEL10-NEXT: s_mov_b32 s4, 44
+; GISEL10-NEXT: v_mov_b32_e32 v8, s4
; GISEL10-NEXT: ; %bb.8: ; %tail.end
-; GISEL10-NEXT: s_or_b32 exec_lo, exec_lo, s4
+; GISEL10-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GISEL10-NEXT: s_mov_b32 exec_lo, s5
; GISEL10-NEXT: s_setpc_b64 s[6:7]
;
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
index 0debd7d9d9854..9c827b3b005dc 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
@@ -2796,21 +2796,21 @@ define amdgpu_kernel void @divergent_cfg_float(ptr addrspace(1) %out, float %in,
; GFX1032DAGISEL: ; %bb.0: ; %entry
; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c
; GFX1032DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc_lo, 15, v0
-; GFX1032DAGISEL-NEXT: ; implicit-def: $sgpr3
-; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s2, vcc_lo
-; GFX1032DAGISEL-NEXT: s_xor_b32 s2, exec_lo, s2
+; GFX1032DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s3, vcc_lo
+; GFX1032DAGISEL-NEXT: s_xor_b32 s3, exec_lo, s3
; GFX1032DAGISEL-NEXT: s_cbranch_execz .LBB6_2
; GFX1032DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX1032DAGISEL-NEXT: s_mov_b32 s3, exec_lo
-; GFX1032DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX1032DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
+; GFX1032DAGISEL-NEXT: s_mov_b32 s2, exec_lo
+; GFX1032DAGISEL-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX1032DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s2
; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1032DAGISEL-NEXT: v_mul_f32_e32 v0, s0, v0
-; GFX1032DAGISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX1032DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX1032DAGISEL-NEXT: .LBB6_2: ; %Flow
; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, s2
-; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s3
+; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, s3
+; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX1032DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX1032DAGISEL-NEXT: s_cbranch_execz .LBB6_4
; GFX1032DAGISEL-NEXT: ; %bb.3: ; %if
@@ -2956,26 +2956,26 @@ define amdgpu_kernel void @divergent_cfg_float(ptr addrspace(1) %out, float %in,
; GFX1132DAGISEL: ; %bb.0: ; %entry
; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo
-; GFX1132DAGISEL-NEXT: ; implicit-def: $sgpr3
+; GFX1132DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX1132DAGISEL-NEXT: ; implicit-def: $sgpr2
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1132DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
-; GFX1132DAGISEL-NEXT: s_xor_b32 s2, exec_lo, s2
+; GFX1132DAGISEL-NEXT: s_xor_b32 s3, exec_lo, s3
; GFX1132DAGISEL-NEXT: s_cbranch_execz .LBB6_2
; GFX1132DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX1132DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1132DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX1132DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
+; GFX1132DAGISEL-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX1132DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s2
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1132DAGISEL-NEXT: v_mul_f32_e32 v0, s0, v0
-; GFX1132DAGISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX1132DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX1132DAGISEL-NEXT: .LBB6_2: ; %Flow
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, s2
+; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, s3
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, s3
+; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX1132DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX1132DAGISEL-NEXT: s_cbranch_execz .LBB6_4
; GFX1132DAGISEL-NEXT: ; %bb.3: ; %if
@@ -3044,26 +3044,26 @@ define amdgpu_kernel void @divergent_cfg_float(ptr addrspace(1) %out, float %in,
; GFX12DAGISEL: ; %bb.0: ; %entry
; GFX12DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX12DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12DAGISEL-NEXT: s_mov_b32 s2, exec_lo
-; GFX12DAGISEL-NEXT: ; implicit-def: $sgpr3
+; GFX12DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX12DAGISEL-NEXT: ; implicit-def: $sgpr2
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
-; GFX12DAGISEL-NEXT: s_xor_b32 s2, exec_lo, s2
+; GFX12DAGISEL-NEXT: s_xor_b32 s3, exec_lo, s3
; GFX12DAGISEL-NEXT: s_cbranch_execz .LBB6_2
; GFX12DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX12DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX12DAGISEL-NEXT: s_mov_b32 s2, exec_lo
; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX12DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX12DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
+; GFX12DAGISEL-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX12DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s2
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12DAGISEL-NEXT: v_mul_f32_e32 v0, s0, v0
-; GFX12DAGISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX12DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12DAGISEL-NEXT: .LBB6_2: ; %Flow
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12DAGISEL-NEXT: s_or_saveexec_b32 s0, s2
+; GFX12DAGISEL-NEXT: s_or_saveexec_b32 s0, s3
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12DAGISEL-NEXT: v_mov_b32_e32 v0, s3
+; GFX12DAGISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX12DAGISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12DAGISEL-NEXT: s_cbranch_execz .LBB6_4
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
index 7f9be5bf504e8..2b3365dc49b94 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
@@ -2832,21 +2832,21 @@ define amdgpu_kernel void @divergent_cfg_float(ptr addrspace(1) %out, float %in,
; GFX1032DAGISEL: ; %bb.0: ; %entry
; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c
; GFX1032DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc_lo, 15, v0
-; GFX1032DAGISEL-NEXT: ; implicit-def: $sgpr3
-; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s2, vcc_lo
-; GFX1032DAGISEL-NEXT: s_xor_b32 s2, exec_lo, s2
+; GFX1032DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s3, vcc_lo
+; GFX1032DAGISEL-NEXT: s_xor_b32 s3, exec_lo, s3
; GFX1032DAGISEL-NEXT: s_cbranch_execz .LBB6_2
; GFX1032DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX1032DAGISEL-NEXT: s_mov_b32 s3, exec_lo
-; GFX1032DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX1032DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
+; GFX1032DAGISEL-NEXT: s_mov_b32 s2, exec_lo
+; GFX1032DAGISEL-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX1032DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s2
; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1032DAGISEL-NEXT: v_mul_f32_e64 v0, -s0, v0
-; GFX1032DAGISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX1032DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX1032DAGISEL-NEXT: .LBB6_2: ; %Flow
; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, s2
-; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s3
+; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, s3
+; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX1032DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX1032DAGISEL-NEXT: s_cbranch_execz .LBB6_4
; GFX1032DAGISEL-NEXT: ; %bb.3: ; %if
@@ -2992,26 +2992,26 @@ define amdgpu_kernel void @divergent_cfg_float(ptr addrspace(1) %out, float %in,
; GFX1132DAGISEL: ; %bb.0: ; %entry
; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo
-; GFX1132DAGISEL-NEXT: ; implicit-def: $sgpr3
+; GFX1132DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX1132DAGISEL-NEXT: ; implicit-def: $sgpr2
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1132DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
-; GFX1132DAGISEL-NEXT: s_xor_b32 s2, exec_lo, s2
+; GFX1132DAGISEL-NEXT: s_xor_b32 s3, exec_lo, s3
; GFX1132DAGISEL-NEXT: s_cbranch_execz .LBB6_2
; GFX1132DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX1132DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1132DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX1132DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
+; GFX1132DAGISEL-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX1132DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s2
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1132DAGISEL-NEXT: v_mul_f32_e64 v0, -s0, v0
-; GFX1132DAGISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX1132DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX1132DAGISEL-NEXT: .LBB6_2: ; %Flow
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, s2
+; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, s3
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, s3
+; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX1132DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX1132DAGISEL-NEXT: s_cbranch_execz .LBB6_4
; GFX1132DAGISEL-NEXT: ; %bb.3: ; %if
@@ -3080,26 +3080,26 @@ define amdgpu_kernel void @divergent_cfg_float(ptr addrspace(1) %out, float %in,
; GFX12DAGISEL: ; %bb.0: ; %entry
; GFX12DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX12DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12DAGISEL-NEXT: s_mov_b32 s2, exec_lo
-; GFX12DAGISEL-NEXT: ; implicit-def: $sgpr3
+; GFX12DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX12DAGISEL-NEXT: ; implicit-def: $sgpr2
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
-; GFX12DAGISEL-NEXT: s_xor_b32 s2, exec_lo, s2
+; GFX12DAGISEL-NEXT: s_xor_b32 s3, exec_lo, s3
; GFX12DAGISEL-NEXT: s_cbranch_execz .LBB6_2
; GFX12DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX12DAGISEL-NEXT: s_mov_b32 s3, exec_lo
+; GFX12DAGISEL-NEXT: s_mov_b32 s2, exec_lo
; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX12DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX12DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
+; GFX12DAGISEL-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX12DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s2
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12DAGISEL-NEXT: v_mul_f32_e64 v0, -s0, v0
-; GFX12DAGISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX12DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12DAGISEL-NEXT: .LBB6_2: ; %Flow
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12DAGISEL-NEXT: s_or_saveexec_b32 s0, s2
+; GFX12DAGISEL-NEXT: s_or_saveexec_b32 s0, s3
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12DAGISEL-NEXT: v_mov_b32_e32 v0, s3
+; GFX12DAGISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX12DAGISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12DAGISEL-NEXT: s_cbranch_execz .LBB6_4
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
index e5e07ff1a94eb..50669d1eb6cba 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
@@ -1631,29 +1631,29 @@ define half @local_atomic_fadd_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: ds_load_b32 v3, v0
+; GFX12-TRUE16-NEXT: ds_load_b32 v2, v0
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-TRUE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-TRUE16-NEXT: v_add_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-TRUE16-NEXT: v_add_f16_e32 v2.l, 4.0, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1661,7 +1661,7 @@ define half @local_atomic_fadd_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: local_atomic_fadd_ret_f16__offset:
@@ -1676,29 +1676,29 @@ define half @local_atomic_fadd_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: ds_load_b32 v3, v0
+; GFX12-FAKE16-NEXT: ds_load_b32 v2, v0
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-FAKE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-FAKE16-NEXT: v_add_f16_e32 v3, 4.0, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-FAKE16-NEXT: v_add_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1706,7 +1706,7 @@ define half @local_atomic_fadd_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fadd_ret_f16__offset:
@@ -1748,35 +1748,35 @@ define half @local_atomic_fadd_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX11-TRUE16-NEXT: ds_load_b32 v3, v0
+; GFX11-TRUE16-NEXT: ds_load_b32 v2, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-TRUE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX11-TRUE16-NEXT: v_add_f16_e32 v3.l, 4.0, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX11-TRUE16-NEXT: v_add_f16_e32 v2.l, 4.0, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: buffer_gl0_inv
-; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX11-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: local_atomic_fadd_ret_f16__offset:
@@ -1787,35 +1787,35 @@ define half @local_atomic_fadd_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX11-FAKE16-NEXT: ds_load_b32 v3, v0
+; GFX11-FAKE16-NEXT: ds_load_b32 v2, v0
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-FAKE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX11-FAKE16-NEXT: v_add_f16_e32 v3, 4.0, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX11-FAKE16-NEXT: v_add_f16_e32 v2, 4.0, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: buffer_gl0_inv
-; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX11-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fadd_ret_f16__offset:
@@ -2972,24 +2972,24 @@ define half @local_atomic_fadd_ret_f16__offset__align4(ptr addrspace(3) %ptr) no
; GFX908-LABEL: local_atomic_fadd_ret_f16__offset__align4:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v1, v0 offset:65534
+; GFX908-NEXT: v_mov_b32_e32 v1, v0
+; GFX908-NEXT: ds_read_b32 v0, v0 offset:65534
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: s_mov_b32 s6, 0xffff0000
; GFX908-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v2, v1
-; GFX908-NEXT: v_add_f16_e32 v1, 4.0, v2
-; GFX908-NEXT: v_and_or_b32 v1, v2, s6, v1
-; GFX908-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1 offset:65534
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: v_add_f16_e32 v0, 4.0, v2
+; GFX908-NEXT: v_and_or_b32 v0, v2, s6, v0
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0 offset:65534
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v2
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB12_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v1
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fadd_ret_f16__offset__align4:
@@ -5457,49 +5457,49 @@ define <2 x half> @local_atomic_fadd_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX11-LABEL: local_atomic_fadd_ret_v2f16:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v2, v0
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
+; GFX11-NEXT: ds_load_b32 v0, v0
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-NEXT: v_mov_b32_e32 v3, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_add_f16 v2, v3, v1
+; GFX11-NEXT: v_pk_add_f16 v0, v3, v1
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB20_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fadd_ret_v2f16:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v2, v0
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: ds_read_b32 v0, v0
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v3, v2
-; GFX10-NEXT: v_pk_add_f16 v2, v3, v1
+; GFX10-NEXT: v_mov_b32_e32 v3, v0
+; GFX10-NEXT: v_pk_add_f16 v0, v3, v1
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB20_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fadd_ret_v2f16:
@@ -5526,22 +5526,22 @@ define <2 x half> @local_atomic_fadd_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX908-LABEL: local_atomic_fadd_ret_v2f16:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v2, v0
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: ds_read_b32 v0, v0
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v3, v2
-; GFX908-NEXT: v_pk_add_f16 v2, v3, v1
-; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2
+; GFX908-NEXT: v_mov_b32_e32 v3, v0
+; GFX908-NEXT: v_pk_add_f16 v0, v3, v1
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB20_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fadd_ret_v2f16:
@@ -5672,49 +5672,49 @@ define <2 x half> @local_atomic_fadd_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX11-LABEL: local_atomic_fadd_ret_v2f16__offset:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v2, v0 offset:65532
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
+; GFX11-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-NEXT: v_mov_b32_e32 v3, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_add_f16 v2, v3, v1
+; GFX11-NEXT: v_pk_add_f16 v0, v3, v1
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3 offset:65532
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB21_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fadd_ret_v2f16__offset:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v2, v0 offset:65532
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: ds_read_b32 v0, v0 offset:65532
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v3, v2
-; GFX10-NEXT: v_pk_add_f16 v2, v3, v1
+; GFX10-NEXT: v_mov_b32_e32 v3, v0
+; GFX10-NEXT: v_pk_add_f16 v0, v3, v1
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2 offset:65532
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0 offset:65532
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB21_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fadd_ret_v2f16__offset:
@@ -5741,22 +5741,22 @@ define <2 x half> @local_atomic_fadd_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX908-LABEL: local_atomic_fadd_ret_v2f16__offset:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v2, v0 offset:65532
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: ds_read_b32 v0, v0 offset:65532
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v3, v2
-; GFX908-NEXT: v_pk_add_f16 v2, v3, v1
-; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2 offset:65532
+; GFX908-NEXT: v_mov_b32_e32 v3, v0
+; GFX908-NEXT: v_pk_add_f16 v0, v3, v1
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0 offset:65532
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB21_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fadd_ret_v2f16__offset:
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
index b74f6b1c34601..0f949317d77af 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
@@ -891,36 +891,36 @@ define half @local_atomic_fmax_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, -4, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX11-TRUE16-NEXT: ds_load_b32 v3, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v0, 0xffff
+; GFX11-TRUE16-NEXT: ds_load_b32 v2, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v0, 0xffff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 24, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-TRUE16-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v3.l, v3.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v2.l, v2.l, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v3.l, 4.0, v3.l
-; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v2.l, 4.0, v2.l
+; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX11-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX11-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
+; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v1, v2, v4
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: buffer_gl0_inv
-; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB8_1
; GFX11-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: local_atomic_fmax_ret_f16:
@@ -929,36 +929,36 @@ define half @local_atomic_fmax_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, -4, v0
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX11-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX11-FAKE16-NEXT: ds_load_b32 v3, v1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v0, 0xffff
+; GFX11-FAKE16-NEXT: ds_load_b32 v2, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v0, 0xffff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 24, v0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-FAKE16-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v2, v2, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v3, 4.0, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v2, 4.0, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX11-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX11-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
+; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v1, v2, v4
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: buffer_gl0_inv
-; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB8_1
; GFX11-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fmax_ret_f16:
@@ -1028,31 +1028,31 @@ define half @local_atomic_fmax_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: v_and_b32_e32 v1, -4, v0
-; GFX908-NEXT: ds_read_b32 v3, v1
-; GFX908-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX908-NEXT: ds_read_b32 v2, v1
+; GFX908-NEXT: v_lshlrev_b32_e32 v3, 3, v0
; GFX908-NEXT: s_mov_b32 s4, 0xffff
-; GFX908-NEXT: v_and_b32_e32 v0, 24, v2
-; GFX908-NEXT: v_lshlrev_b32_e64 v2, v2, s4
-; GFX908-NEXT: v_not_b32_e32 v2, v2
+; GFX908-NEXT: v_and_b32_e32 v0, 24, v3
+; GFX908-NEXT: v_lshlrev_b32_e64 v3, v3, s4
+; GFX908-NEXT: v_not_b32_e32 v3, v3
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v4, v3
-; GFX908-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX908-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX908-NEXT: v_max_f16_e32 v3, 4.0, v3
-; GFX908-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX908-NEXT: v_and_or_b32 v3, v4, v2, v3
-; GFX908-NEXT: ds_cmpst_rtn_b32 v3, v1, v4, v3
+; GFX908-NEXT: v_mov_b32_e32 v4, v2
+; GFX908-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX908-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX908-NEXT: v_max_f16_e32 v2, 4.0, v2
+; GFX908-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX908-NEXT: v_and_or_b32 v2, v4, v3, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v1, v4, v2
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB8_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fmax_ret_f16:
@@ -1170,29 +1170,29 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: ds_load_b32 v3, v0
+; GFX12-TRUE16-NEXT: ds_load_b32 v2, v0
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-TRUE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, 4.0, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1200,7 +1200,7 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: local_atomic_fmax_ret_f16__offset:
@@ -1215,29 +1215,29 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: ds_load_b32 v3, v0
+; GFX12-FAKE16-NEXT: ds_load_b32 v2, v0
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-FAKE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, 4.0, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1245,7 +1245,7 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmax_ret_f16__offset:
@@ -1367,30 +1367,30 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: v_and_b32_e32 v0, -4, v1
; GFX10-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX10-NEXT: ds_read_b32 v3, v0
+; GFX10-NEXT: ds_read_b32 v2, v0
; GFX10-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX10-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
-; GFX10-NEXT: v_not_b32_e32 v2, v2
+; GFX10-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
+; GFX10-NEXT: v_not_b32_e32 v3, v3
; GFX10-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v4, v3
-; GFX10-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX10-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX10-NEXT: v_max_f16_e32 v3, 4.0, v3
-; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX10-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX10-NEXT: v_mov_b32_e32 v4, v2
+; GFX10-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX10-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX10-NEXT: v_max_f16_e32 v2, 4.0, v2
+; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX10-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v3, v0, v4, v3
+; GFX10-NEXT: ds_cmpst_rtn_b32 v2, v0, v4, v2
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB9_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX10-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fmax_ret_f16__offset:
@@ -1430,31 +1430,31 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: v_add_u32_e32 v0, 0xfffe, v0
; GFX908-NEXT: v_and_b32_e32 v1, -4, v0
-; GFX908-NEXT: ds_read_b32 v3, v1
+; GFX908-NEXT: ds_read_b32 v2, v1
; GFX908-NEXT: v_and_b32_e32 v0, 3, v0
; GFX908-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX908-NEXT: s_mov_b32 s4, 0xffff
-; GFX908-NEXT: v_lshlrev_b32_e64 v2, v0, s4
-; GFX908-NEXT: v_not_b32_e32 v2, v2
+; GFX908-NEXT: v_lshlrev_b32_e64 v3, v0, s4
+; GFX908-NEXT: v_not_b32_e32 v3, v3
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v4, v3
-; GFX908-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX908-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX908-NEXT: v_max_f16_e32 v3, 4.0, v3
-; GFX908-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX908-NEXT: v_and_or_b32 v3, v4, v2, v3
-; GFX908-NEXT: ds_cmpst_rtn_b32 v3, v1, v4, v3
+; GFX908-NEXT: v_mov_b32_e32 v4, v2
+; GFX908-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX908-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX908-NEXT: v_max_f16_e32 v2, 4.0, v2
+; GFX908-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX908-NEXT: v_and_or_b32 v2, v4, v3, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v1, v4, v2
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB9_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fmax_ret_f16__offset:
@@ -5031,20 +5031,21 @@ define <2 x half> @local_atomic_fmax_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v2, v0
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
+; GFX12-NEXT: ds_load_b32 v0, v0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_mov_b32_e32 v3, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v1
+; GFX12-NEXT: v_pk_max_num_f16 v0, v3, v1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5052,7 +5053,6 @@ define <2 x half> @local_atomic_fmax_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_cbranch_execnz .LBB20_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmax_ret_v2f16:
@@ -5293,20 +5293,21 @@ define <2 x half> @local_atomic_fmax_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
+; GFX12-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_mov_b32_e32 v3, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v1
+; GFX12-NEXT: v_pk_max_num_f16 v0, v3, v1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5314,7 +5315,6 @@ define <2 x half> @local_atomic_fmax_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_cbranch_execnz .LBB21_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmax_ret_v2f16__offset:
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
index 7c68c45a70a03..06d5b163c5c97 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
@@ -891,36 +891,36 @@ define half @local_atomic_fmin_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, -4, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX11-TRUE16-NEXT: ds_load_b32 v3, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v0, 0xffff
+; GFX11-TRUE16-NEXT: ds_load_b32 v2, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v0, 0xffff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 24, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-TRUE16-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v3.l, v3.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v2.l, v2.l, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v3.l, 4.0, v3.l
-; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v2.l, 4.0, v2.l
+; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX11-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX11-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
+; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v1, v2, v4
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: buffer_gl0_inv
-; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB8_1
; GFX11-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: local_atomic_fmin_ret_f16:
@@ -929,36 +929,36 @@ define half @local_atomic_fmin_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, -4, v0
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX11-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX11-FAKE16-NEXT: ds_load_b32 v3, v1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v0, 0xffff
+; GFX11-FAKE16-NEXT: ds_load_b32 v2, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v0, 0xffff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 24, v0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-FAKE16-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v2, v2, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v3, 4.0, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v2, 4.0, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX11-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX11-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
+; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v1, v2, v4
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: buffer_gl0_inv
-; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB8_1
; GFX11-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fmin_ret_f16:
@@ -1028,31 +1028,31 @@ define half @local_atomic_fmin_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: v_and_b32_e32 v1, -4, v0
-; GFX908-NEXT: ds_read_b32 v3, v1
-; GFX908-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX908-NEXT: ds_read_b32 v2, v1
+; GFX908-NEXT: v_lshlrev_b32_e32 v3, 3, v0
; GFX908-NEXT: s_mov_b32 s4, 0xffff
-; GFX908-NEXT: v_and_b32_e32 v0, 24, v2
-; GFX908-NEXT: v_lshlrev_b32_e64 v2, v2, s4
-; GFX908-NEXT: v_not_b32_e32 v2, v2
+; GFX908-NEXT: v_and_b32_e32 v0, 24, v3
+; GFX908-NEXT: v_lshlrev_b32_e64 v3, v3, s4
+; GFX908-NEXT: v_not_b32_e32 v3, v3
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v4, v3
-; GFX908-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX908-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX908-NEXT: v_min_f16_e32 v3, 4.0, v3
-; GFX908-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX908-NEXT: v_and_or_b32 v3, v4, v2, v3
-; GFX908-NEXT: ds_cmpst_rtn_b32 v3, v1, v4, v3
+; GFX908-NEXT: v_mov_b32_e32 v4, v2
+; GFX908-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX908-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX908-NEXT: v_min_f16_e32 v2, 4.0, v2
+; GFX908-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX908-NEXT: v_and_or_b32 v2, v4, v3, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v1, v4, v2
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB8_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fmin_ret_f16:
@@ -1170,29 +1170,29 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: ds_load_b32 v3, v0
+; GFX12-TRUE16-NEXT: ds_load_b32 v2, v0
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-TRUE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v2.l, 4.0, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1200,7 +1200,7 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: local_atomic_fmin_ret_f16__offset:
@@ -1215,29 +1215,29 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: ds_load_b32 v3, v0
+; GFX12-FAKE16-NEXT: ds_load_b32 v2, v0
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-FAKE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, 4.0, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1245,7 +1245,7 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmin_ret_f16__offset:
@@ -1367,30 +1367,30 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: v_and_b32_e32 v0, -4, v1
; GFX10-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX10-NEXT: ds_read_b32 v3, v0
+; GFX10-NEXT: ds_read_b32 v2, v0
; GFX10-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX10-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
-; GFX10-NEXT: v_not_b32_e32 v2, v2
+; GFX10-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
+; GFX10-NEXT: v_not_b32_e32 v3, v3
; GFX10-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v4, v3
-; GFX10-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX10-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX10-NEXT: v_min_f16_e32 v3, 4.0, v3
-; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX10-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX10-NEXT: v_mov_b32_e32 v4, v2
+; GFX10-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX10-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX10-NEXT: v_min_f16_e32 v2, 4.0, v2
+; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX10-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v3, v0, v4, v3
+; GFX10-NEXT: ds_cmpst_rtn_b32 v2, v0, v4, v2
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB9_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX10-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fmin_ret_f16__offset:
@@ -1430,31 +1430,31 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: v_add_u32_e32 v0, 0xfffe, v0
; GFX908-NEXT: v_and_b32_e32 v1, -4, v0
-; GFX908-NEXT: ds_read_b32 v3, v1
+; GFX908-NEXT: ds_read_b32 v2, v1
; GFX908-NEXT: v_and_b32_e32 v0, 3, v0
; GFX908-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX908-NEXT: s_mov_b32 s4, 0xffff
-; GFX908-NEXT: v_lshlrev_b32_e64 v2, v0, s4
-; GFX908-NEXT: v_not_b32_e32 v2, v2
+; GFX908-NEXT: v_lshlrev_b32_e64 v3, v0, s4
+; GFX908-NEXT: v_not_b32_e32 v3, v3
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v4, v3
-; GFX908-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX908-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX908-NEXT: v_min_f16_e32 v3, 4.0, v3
-; GFX908-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX908-NEXT: v_and_or_b32 v3, v4, v2, v3
-; GFX908-NEXT: ds_cmpst_rtn_b32 v3, v1, v4, v3
+; GFX908-NEXT: v_mov_b32_e32 v4, v2
+; GFX908-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX908-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX908-NEXT: v_min_f16_e32 v2, 4.0, v2
+; GFX908-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX908-NEXT: v_and_or_b32 v2, v4, v3, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v1, v4, v2
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB9_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX908-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fmin_ret_f16__offset:
@@ -5031,20 +5031,21 @@ define <2 x half> @local_atomic_fmin_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v2, v0
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
+; GFX12-NEXT: ds_load_b32 v0, v0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_mov_b32_e32 v3, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v3, v1
+; GFX12-NEXT: v_pk_min_num_f16 v0, v3, v1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5052,7 +5053,6 @@ define <2 x half> @local_atomic_fmin_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_cbranch_execnz .LBB20_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmin_ret_v2f16:
@@ -5293,20 +5293,21 @@ define <2 x half> @local_atomic_fmin_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
+; GFX12-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_mov_b32_e32 v3, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v3, v1
+; GFX12-NEXT: v_pk_min_num_f16 v0, v3, v1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5314,7 +5315,6 @@ define <2 x half> @local_atomic_fmin_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_cbranch_execnz .LBB21_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmin_ret_v2f16__offset:
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
index 5c988fcda1a8e..4cd74b85f9a0b 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
@@ -23,20 +23,21 @@ define float @local_atomic_fsub_ret_f32(ptr addrspace(3) %ptr) nounwind {
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v1, v0
+; GFX12-NEXT: v_mov_b32_e32 v1, v0
+; GFX12-NEXT: ds_load_b32 v0, v0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, v1
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX12-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v1, v0, v2
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -44,7 +45,6 @@ define float @local_atomic_fsub_ret_f32(ptr addrspace(3) %ptr) nounwind {
; GFX12-NEXT: s_cbranch_execnz .LBB0_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fsub_ret_f32:
@@ -71,49 +71,49 @@ define float @local_atomic_fsub_ret_f32(ptr addrspace(3) %ptr) nounwind {
; GFX11-LABEL: local_atomic_fsub_ret_f32:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v1, v0
+; GFX11-NEXT: v_mov_b32_e32 v1, v0
+; GFX11-NEXT: ds_load_b32 v0, v0
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v2, v1
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX11-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v1, v0, v2
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB0_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fsub_ret_f32:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v1, v0
+; GFX10-NEXT: v_mov_b32_e32 v1, v0
+; GFX10-NEXT: ds_read_b32 v0, v0
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v2, v1
-; GFX10-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB0_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v1
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fsub_ret_f32:
@@ -140,22 +140,22 @@ define float @local_atomic_fsub_ret_f32(ptr addrspace(3) %ptr) nounwind {
; GFX908-LABEL: local_atomic_fsub_ret_f32:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v1, v0
+; GFX908-NEXT: v_mov_b32_e32 v1, v0
+; GFX908-NEXT: ds_read_b32 v0, v0
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v2, v1
-; GFX908-NEXT: v_add_f32_e32 v1, -4.0, v2
-; GFX908-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: v_add_f32_e32 v0, -4.0, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v2
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB0_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v1
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fsub_ret_f32:
@@ -235,20 +235,21 @@ define float @local_atomic_fsub_ret_f32__offset(ptr addrspace(3) %ptr) nounwind
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v1, v0 offset:65532
+; GFX12-NEXT: v_mov_b32_e32 v1, v0
+; GFX12-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, v1
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX12-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2 offset:65532
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v1, v0, v2 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -256,7 +257,6 @@ define float @local_atomic_fsub_ret_f32__offset(ptr addrspace(3) %ptr) nounwind
; GFX12-NEXT: s_cbranch_execnz .LBB1_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fsub_ret_f32__offset:
@@ -283,49 +283,49 @@ define float @local_atomic_fsub_ret_f32__offset(ptr addrspace(3) %ptr) nounwind
; GFX11-LABEL: local_atomic_fsub_ret_f32__offset:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v1, v0 offset:65532
+; GFX11-NEXT: v_mov_b32_e32 v1, v0
+; GFX11-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v2, v1
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX11-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2 offset:65532
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v1, v0, v2 offset:65532
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB1_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fsub_ret_f32__offset:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v1, v0 offset:65532
+; GFX10-NEXT: v_mov_b32_e32 v1, v0
+; GFX10-NEXT: ds_read_b32 v0, v0 offset:65532
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v2, v1
-; GFX10-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1 offset:65532
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0 offset:65532
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB1_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v1
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fsub_ret_f32__offset:
@@ -352,22 +352,22 @@ define float @local_atomic_fsub_ret_f32__offset(ptr addrspace(3) %ptr) nounwind
; GFX908-LABEL: local_atomic_fsub_ret_f32__offset:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v1, v0 offset:65532
+; GFX908-NEXT: v_mov_b32_e32 v1, v0
+; GFX908-NEXT: ds_read_b32 v0, v0 offset:65532
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v2, v1
-; GFX908-NEXT: v_add_f32_e32 v1, -4.0, v2
-; GFX908-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1 offset:65532
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: v_add_f32_e32 v0, -4.0, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0 offset:65532
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v2
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB1_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v1
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fsub_ret_f32__offset:
@@ -2097,29 +2097,29 @@ define half @local_atomic_fsub_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: ds_load_b32 v3, v0
+; GFX12-TRUE16-NEXT: ds_load_b32 v2, v0
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-TRUE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-TRUE16-NEXT: v_add_f16_e32 v3.l, -4.0, v3.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-TRUE16-NEXT: v_add_f16_e32 v2.l, -4.0, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2127,7 +2127,7 @@ define half @local_atomic_fsub_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: local_atomic_fsub_ret_f16__offset:
@@ -2142,29 +2142,29 @@ define half @local_atomic_fsub_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: ds_load_b32 v3, v0
+; GFX12-FAKE16-NEXT: ds_load_b32 v2, v0
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-FAKE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-FAKE16-NEXT: v_add_f16_e32 v3, -4.0, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX12-FAKE16-NEXT: v_add_f16_e32 v2, -4.0, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2172,7 +2172,7 @@ define half @local_atomic_fsub_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fsub_ret_f16__offset:
@@ -2214,35 +2214,35 @@ define half @local_atomic_fsub_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX11-TRUE16-NEXT: ds_load_b32 v3, v0
+; GFX11-TRUE16-NEXT: ds_load_b32 v2, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-TRUE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX11-TRUE16-NEXT: v_add_f16_e32 v3.l, -4.0, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX11-TRUE16-NEXT: v_add_f16_e32 v2.l, -4.0, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v3, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX11-TRUE16-NEXT: v_cvt_u32_u16_e32 v2, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-TRUE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX11-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: buffer_gl0_inv
-; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX11-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: local_atomic_fsub_ret_f16__offset:
@@ -2253,35 +2253,35 @@ define half @local_atomic_fsub_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, -4, v1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 3, v1
-; GFX11-FAKE16-NEXT: ds_load_b32 v3, v0
+; GFX11-FAKE16-NEXT: ds_load_b32 v2, v0
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v1, 0xffff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v1, 0xffff
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX11-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX11-FAKE16-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX11-FAKE16-NEXT: v_add_f16_e32 v3, -4.0, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v1, v4
+; GFX11-FAKE16-NEXT: v_add_f16_e32 v2, -4.0, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v1, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX11-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
+; GFX11-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v4
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: buffer_gl0_inv
-; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX11-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB9_1
; GFX11-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v1, v2
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fsub_ret_f16__offset:
@@ -3438,24 +3438,24 @@ define half @local_atomic_fsub_ret_f16__offset__align4(ptr addrspace(3) %ptr) no
; GFX908-LABEL: local_atomic_fsub_ret_f16__offset__align4:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v1, v0 offset:65534
+; GFX908-NEXT: v_mov_b32_e32 v1, v0
+; GFX908-NEXT: ds_read_b32 v0, v0 offset:65534
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: s_mov_b32 s6, 0xffff0000
; GFX908-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v2, v1
-; GFX908-NEXT: v_add_f16_e32 v1, -4.0, v2
-; GFX908-NEXT: v_and_or_b32 v1, v2, s6, v1
-; GFX908-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1 offset:65534
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: v_add_f16_e32 v0, -4.0, v2
+; GFX908-NEXT: v_and_or_b32 v0, v2, s6, v0
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0 offset:65534
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v2
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB12_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v1
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fsub_ret_f16__offset__align4:
@@ -5907,20 +5907,21 @@ define <2 x half> @local_atomic_fsub_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v2, v0
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
+; GFX12-NEXT: ds_load_b32 v0, v0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_mov_b32_e32 v3, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX12-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5928,7 +5929,6 @@ define <2 x half> @local_atomic_fsub_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_cbranch_execnz .LBB20_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fsub_ret_v2f16:
@@ -5955,49 +5955,49 @@ define <2 x half> @local_atomic_fsub_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX11-LABEL: local_atomic_fsub_ret_v2f16:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v2, v0
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
+; GFX11-NEXT: ds_load_b32 v0, v0
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-NEXT: v_mov_b32_e32 v3, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX11-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB20_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fsub_ret_v2f16:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v2, v0
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: ds_read_b32 v0, v0
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v3, v2
-; GFX10-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX10-NEXT: v_mov_b32_e32 v3, v0
+; GFX10-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB20_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fsub_ret_v2f16:
@@ -6024,22 +6024,22 @@ define <2 x half> @local_atomic_fsub_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX908-LABEL: local_atomic_fsub_ret_v2f16:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v2, v0
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: ds_read_b32 v0, v0
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v3, v2
-; GFX908-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
-; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2
+; GFX908-NEXT: v_mov_b32_e32 v3, v0
+; GFX908-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB20_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fsub_ret_v2f16:
@@ -6154,20 +6154,21 @@ define <2 x half> @local_atomic_fsub_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
+; GFX12-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_mov_b32_e32 v3, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX12-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6175,7 +6176,6 @@ define <2 x half> @local_atomic_fsub_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_cbranch_execnz .LBB21_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fsub_ret_v2f16__offset:
@@ -6202,49 +6202,49 @@ define <2 x half> @local_atomic_fsub_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX11-LABEL: local_atomic_fsub_ret_v2f16__offset:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v2, v0 offset:65532
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
+; GFX11-NEXT: ds_load_b32 v0, v0 offset:65532
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-NEXT: v_mov_b32_e32 v3, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX11-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v2, v0, v3 offset:65532
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB21_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fsub_ret_v2f16__offset:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v2, v0 offset:65532
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: ds_read_b32 v0, v0 offset:65532
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v3, v2
-; GFX10-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX10-NEXT: v_mov_b32_e32 v3, v0
+; GFX10-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2 offset:65532
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0 offset:65532
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v3
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB21_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fsub_ret_v2f16__offset:
@@ -6271,22 +6271,22 @@ define <2 x half> @local_atomic_fsub_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX908-LABEL: local_atomic_fsub_ret_v2f16__offset:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v2, v0 offset:65532
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: ds_read_b32 v0, v0 offset:65532
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v3, v2
-; GFX908-NEXT: v_pk_add_f16 v2, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
-; GFX908-NEXT: ds_cmpst_rtn_b32 v2, v0, v3, v2 offset:65532
+; GFX908-NEXT: v_mov_b32_e32 v3, v0
+; GFX908-NEXT: v_pk_add_f16 v0, v3, v1 neg_lo:[0,1] neg_hi:[0,1]
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v2, v3, v0 offset:65532
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB21_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v2
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fsub_ret_v2f16__offset:
@@ -8774,20 +8774,21 @@ define float @local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode(ptr addrspa
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: ds_load_b32 v1, v0
+; GFX12-NEXT: v_mov_b32_e32 v1, v0
+; GFX12-NEXT: ds_load_b32 v0, v0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, v1
+; GFX12-NEXT: v_mov_b32_e32 v2, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX12-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2
+; GFX12-NEXT: ds_cmpstore_rtn_b32 v0, v1, v0, v2
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SE
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8795,7 +8796,6 @@ define float @local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode(ptr addrspa
; GFX12-NEXT: s_cbranch_execnz .LBB28_1
; GFX12-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_mov_b32_e32 v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode:
@@ -8822,49 +8822,49 @@ define float @local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode(ptr addrspa
; GFX11-LABEL: local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: ds_load_b32 v1, v0
+; GFX11-NEXT: v_mov_b32_e32 v1, v0
+; GFX11-NEXT: ds_load_b32 v0, v0
; GFX11-NEXT: s_mov_b32 s0, 0
; GFX11-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mov_b32_e32 v2, v1
+; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX11-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2
+; GFX11-NEXT: ds_cmpstore_rtn_b32 v0, v1, v0, v2
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: buffer_gl0_inv
-; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX11-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-NEXT: s_cbranch_execnz .LBB28_1
; GFX11-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-NEXT: v_mov_b32_e32 v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: ds_read_b32 v1, v0
+; GFX10-NEXT: v_mov_b32_e32 v1, v0
+; GFX10-NEXT: ds_read_b32 v0, v0
; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v2, v1
-; GFX10-NEXT: v_add_f32_e32 v1, -4.0, v2
+; GFX10-NEXT: v_mov_b32_e32 v2, v0
+; GFX10-NEXT: v_add_f32_e32 v0, -4.0, v2
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1
+; GFX10-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_gl0_inv
-; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v2
; GFX10-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-NEXT: s_cbranch_execnz .LBB28_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX10-NEXT: v_mov_b32_e32 v0, v1
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode:
@@ -8891,22 +8891,22 @@ define float @local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode(ptr addrspa
; GFX908-LABEL: local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode:
; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX908-NEXT: ds_read_b32 v1, v0
+; GFX908-NEXT: v_mov_b32_e32 v1, v0
+; GFX908-NEXT: ds_read_b32 v0, v0
; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_mov_b32_e32 v2, v1
-; GFX908-NEXT: v_add_f32_e32 v1, -4.0, v2
-; GFX908-NEXT: ds_cmpst_rtn_b32 v1, v0, v2, v1
+; GFX908-NEXT: v_mov_b32_e32 v2, v0
+; GFX908-NEXT: v_add_f32_e32 v0, -4.0, v2
+; GFX908-NEXT: ds_cmpst_rtn_b32 v0, v1, v2, v0
; GFX908-NEXT: s_waitcnt lgkmcnt(0)
-; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
+; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v0, v2
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB28_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX908-NEXT: v_mov_b32_e32 v0, v1
; GFX908-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: local_atomic_fsub_ret_f32__amdgpu_ignore_denormal_mode:
diff --git a/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir b/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
index 02470468bdd7f..993d6bcffe095 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
+++ b/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
@@ -260,3 +260,90 @@ body: |
S_BRANCH %bb.2
...
+
+# Same as
+# live_variables_update_block_split_split_killed_def_before_si_end_cf,
+# except the def before si_end_cf is live out of the block
+---
+name: live_variables_update_block_split_split_def_before_si_end_cf_live_out
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: live_variables_update_block_split_split_def_before_si_end_cf_live_out
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+ ; CHECK-NEXT: liveins: $vgpr0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+ ; CHECK-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 0, [[COPY]], implicit $exec
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B32_e32_]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B32_e32_]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+ ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY3]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
+ ; CHECK-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY3]], implicit-def dead $scc
+ ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
+ ; CHECK-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
+ ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
+ ; CHECK-NEXT: S_BRANCH %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.4(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
+ ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 1
+ ; CHECK-NEXT: $exec = S_OR_B64_term $exec, [[COPY4]], implicit-def dead $scc
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4:
+ ; CHECK-NEXT: successors: %bb.2(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
+ ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = nsw V_ADD_U32_e32 1, [[COPY5]], implicit $exec
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: S_NOP 0, implicit [[S_MOV_B64_]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e32_]]
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY2]]
+ ; CHECK-NEXT: GLOBAL_STORE_DWORD undef %11:vreg_64, [[COPY6]], 0, 0, implicit $exec :: (volatile store (s32), addrspace 1)
+ ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[COPY6]]
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
+ ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+ ; CHECK-NEXT: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY8]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
+ ; CHECK-NEXT: [[S_XOR_B64_1:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_1]], [[COPY8]], implicit-def dead $scc
+ ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_1]]
+ ; CHECK-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_1]], implicit $exec
+ ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
+ ; CHECK-NEXT: S_BRANCH %bb.3
+ bb.0:
+ liveins: $vgpr0
+
+ %0:vgpr_32 = COPY killed $vgpr0
+ %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+ %2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, killed %0, implicit $exec
+ %3:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+ S_BRANCH %bb.3
+
+ bb.1:
+ %4:sreg_64_xexec = PHI %5, %bb.3, %3, %bb.0
+ %6:vgpr_32 = PHI %7, %bb.3, %1, %bb.0
+ %8:sreg_64 = S_MOV_B64 1
+ SI_END_CF killed %4, implicit-def $exec, implicit-def dead $scc, implicit $exec
+ %9:vgpr_32 = nsw V_ADD_U32_e32 1, killed %6, implicit $exec
+
+ bb.2:
+ S_NOP 0, implicit killed %8
+
+ bb.3:
+ %10:vgpr_32 = PHI %9, %bb.2, %7, %bb.3, %1, %bb.0
+ GLOBAL_STORE_DWORD undef %11:vreg_64, %10, 0, 0, implicit $exec :: (volatile store (s32), addrspace 1)
+ %7:vgpr_32 = COPY killed %10
+ %5:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+ S_BRANCH %bb.3
+
+...
diff --git a/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir b/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
deleted file mode 100644
index 7a6fb07b598bb..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
+++ /dev/null
@@ -1,42 +0,0 @@
-# RUN: not --crash llc -mtriple=amdgpu7.00-amd-amdhsa -start-before=livevars -stop-after=twoaddressinstruction -verify-machineinstrs -o - %s 2>&1 | FileCheck %s
-
-# CHECK: *** Bad machine code: LiveVariables: Block missing from AliveBlocks ***
-# CHECK-NEXT: function: live_variables_update_block_split_split_def_before_si_end_cf_live_out
-# CHECK-NEXT: basic block: %bb.4
-# CHECK-NEXT: Virtual register %8 must be live through the block.
-
-
-# Same as
-# live_variables_update_block_split_split_killed_def_before_si_end_cf,
-# except the def before si_end_cf is live out of the block
----
-name: live_variables_update_block_split_split_def_before_si_end_cf_live_out
-tracksRegLiveness: true
-body: |
- bb.0:
- liveins: $vgpr0
-
- %0:vgpr_32 = COPY killed $vgpr0
- %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- %2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, killed %0, implicit $exec
- %3:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
- S_BRANCH %bb.3
-
- bb.1:
- %4:sreg_64_xexec = PHI %5, %bb.3, %3, %bb.0
- %6:vgpr_32 = PHI %7, %bb.3, %1, %bb.0
- %8:sreg_64 = S_MOV_B64 1
- SI_END_CF killed %4, implicit-def $exec, implicit-def dead $scc, implicit $exec
- %9:vgpr_32 = nsw V_ADD_U32_e32 1, killed %6, implicit $exec
-
- bb.2:
- S_NOP 0, implicit killed %8
-
- bb.3:
- %10:vgpr_32 = PHI %9, %bb.2, %7, %bb.3, %1, %bb.0
- GLOBAL_STORE_DWORD undef %11:vreg_64, %10, 0, 0, implicit $exec :: (volatile store (s32), addrspace 1)
- %7:vgpr_32 = COPY killed %10
- %5:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
- S_BRANCH %bb.3
-
-...
diff --git a/llvm/test/CodeGen/AMDGPU/mad_uint24.ll b/llvm/test/CodeGen/AMDGPU/mad_uint24.ll
index a0830049c8474..2b53bb712d8f2 100644
--- a/llvm/test/CodeGen/AMDGPU/mad_uint24.ll
+++ b/llvm/test/CodeGen/AMDGPU/mad_uint24.ll
@@ -424,26 +424,26 @@ define amdgpu_kernel void @extra_and(ptr addrspace(1) %arg, i32 %arg2, i32 %arg3
; GCN-LABEL: extra_and:
; GCN: ; %bb.0: ; %bb
; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb
-; GCN-NEXT: s_mov_b32 s3, 0
+; GCN-NEXT: s_mov_b32 s2, 0
; GCN-NEXT: s_mov_b32 s6, 0
; GCN-NEXT: .LBB4_1: ; %bb4
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
-; GCN-NEXT: s_and_b32 s2, s6, 0xffffff
+; GCN-NEXT: s_and_b32 s3, s6, 0xffffff
; GCN-NEXT: s_and_b32 s6, s6, 0xffffff
-; GCN-NEXT: s_and_b32 s3, s3, 0xffffff
-; GCN-NEXT: s_mul_i32 s2, s2, s3
-; GCN-NEXT: s_mul_i32 s6, s6, s3
+; GCN-NEXT: s_and_b32 s2, s2, 0xffffff
+; GCN-NEXT: s_mul_i32 s3, s3, s2
+; GCN-NEXT: s_mul_i32 s6, s6, s2
; GCN-NEXT: s_waitcnt lgkmcnt(0)
-; GCN-NEXT: s_add_i32 s3, s0, s2
+; GCN-NEXT: s_add_i32 s2, s0, s3
; GCN-NEXT: s_add_i32 s6, s1, s6
-; GCN-NEXT: s_add_i32 s2, s3, s6
-; GCN-NEXT: s_cmp_lg_u32 s2, 8
+; GCN-NEXT: s_add_i32 s3, s2, s6
+; GCN-NEXT: s_cmp_lg_u32 s3, 8
; GCN-NEXT: s_cbranch_scc1 .LBB4_1
; GCN-NEXT: ; %bb.2: ; %bb18
; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9
; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: s_mov_b32 s6, -1
-; GCN-NEXT: v_mov_b32_e32 v0, s2
+; GCN-NEXT: v_mov_b32_e32 v0, s3
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GCN-NEXT: s_endpgm
@@ -451,26 +451,26 @@ define amdgpu_kernel void @extra_and(ptr addrspace(1) %arg, i32 %arg2, i32 %arg3
; GFX8-LABEL: extra_and:
; GFX8: ; %bb.0: ; %bb
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c
-; GFX8-NEXT: s_mov_b32 s3, 0
+; GFX8-NEXT: s_mov_b32 s2, 0
; GFX8-NEXT: s_mov_b32 s6, 0
; GFX8-NEXT: .LBB4_1: ; %bb4
; GFX8-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX8-NEXT: s_and_b32 s2, s6, 0xffffff
+; GFX8-NEXT: s_and_b32 s3, s6, 0xffffff
; GFX8-NEXT: s_and_b32 s6, s6, 0xffffff
-; GFX8-NEXT: s_and_b32 s3, s3, 0xffffff
-; GFX8-NEXT: s_mul_i32 s2, s2, s3
-; GFX8-NEXT: s_mul_i32 s6, s6, s3
+; GFX8-NEXT: s_and_b32 s2, s2, 0xffffff
+; GFX8-NEXT: s_mul_i32 s3, s3, s2
+; GFX8-NEXT: s_mul_i32 s6, s6, s2
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: s_add_i32 s3, s0, s2
+; GFX8-NEXT: s_add_i32 s2, s0, s3
; GFX8-NEXT: s_add_i32 s6, s1, s6
-; GFX8-NEXT: s_add_i32 s2, s3, s6
-; GFX8-NEXT: s_cmp_lg_u32 s2, 8
+; GFX8-NEXT: s_add_i32 s3, s2, s6
+; GFX8-NEXT: s_cmp_lg_u32 s3, 8
; GFX8-NEXT: s_cbranch_scc1 .LBB4_1
; GFX8-NEXT: ; %bb.2: ; %bb18
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; GFX8-NEXT: s_mov_b32 s7, 0xf000
; GFX8-NEXT: s_mov_b32 s6, -1
-; GFX8-NEXT: v_mov_b32_e32 v0, s2
+; GFX8-NEXT: v_mov_b32_e32 v0, s3
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX8-NEXT: s_endpgm
@@ -582,26 +582,26 @@ define amdgpu_kernel void @dont_remove_shift(ptr addrspace(1) %arg, i32 %arg2, i
; GCN-LABEL: dont_remove_shift:
; GCN: ; %bb.0: ; %bb
; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb
-; GCN-NEXT: s_mov_b32 s3, 0
+; GCN-NEXT: s_mov_b32 s2, 0
; GCN-NEXT: s_mov_b32 s6, 0
; GCN-NEXT: .LBB5_1: ; %bb4
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
-; GCN-NEXT: s_lshr_b32 s2, s6, 8
+; GCN-NEXT: s_lshr_b32 s3, s6, 8
; GCN-NEXT: s_lshr_b32 s6, s6, 8
-; GCN-NEXT: s_lshr_b32 s3, s3, 8
-; GCN-NEXT: s_mul_i32 s2, s2, s3
-; GCN-NEXT: s_mul_i32 s6, s6, s3
+; GCN-NEXT: s_lshr_b32 s2, s2, 8
+; GCN-NEXT: s_mul_i32 s3, s3, s2
+; GCN-NEXT: s_mul_i32 s6, s6, s2
; GCN-NEXT: s_waitcnt lgkmcnt(0)
-; GCN-NEXT: s_add_i32 s3, s0, s2
+; GCN-NEXT: s_add_i32 s2, s0, s3
; GCN-NEXT: s_add_i32 s6, s1, s6
-; GCN-NEXT: s_add_i32 s2, s3, s6
-; GCN-NEXT: s_cmp_lg_u32 s2, 8
+; GCN-NEXT: s_add_i32 s3, s2, s6
+; GCN-NEXT: s_cmp_lg_u32 s3, 8
; GCN-NEXT: s_cbranch_scc1 .LBB5_1
; GCN-NEXT: ; %bb.2: ; %bb18
; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9
; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: s_mov_b32 s6, -1
-; GCN-NEXT: v_mov_b32_e32 v0, s2
+; GCN-NEXT: v_mov_b32_e32 v0, s3
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GCN-NEXT: s_endpgm
@@ -609,26 +609,26 @@ define amdgpu_kernel void @dont_remove_shift(ptr addrspace(1) %arg, i32 %arg2, i
; GFX8-LABEL: dont_remove_shift:
; GFX8: ; %bb.0: ; %bb
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c
-; GFX8-NEXT: s_mov_b32 s3, 0
+; GFX8-NEXT: s_mov_b32 s2, 0
; GFX8-NEXT: s_mov_b32 s6, 0
; GFX8-NEXT: .LBB5_1: ; %bb4
; GFX8-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX8-NEXT: s_lshr_b32 s2, s6, 8
+; GFX8-NEXT: s_lshr_b32 s3, s6, 8
; GFX8-NEXT: s_lshr_b32 s6, s6, 8
-; GFX8-NEXT: s_lshr_b32 s3, s3, 8
-; GFX8-NEXT: s_mul_i32 s2, s2, s3
-; GFX8-NEXT: s_mul_i32 s6, s6, s3
+; GFX8-NEXT: s_lshr_b32 s2, s2, 8
+; GFX8-NEXT: s_mul_i32 s3, s3, s2
+; GFX8-NEXT: s_mul_i32 s6, s6, s2
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: s_add_i32 s3, s0, s2
+; GFX8-NEXT: s_add_i32 s2, s0, s3
; GFX8-NEXT: s_add_i32 s6, s1, s6
-; GFX8-NEXT: s_add_i32 s2, s3, s6
-; GFX8-NEXT: s_cmp_lg_u32 s2, 8
+; GFX8-NEXT: s_add_i32 s3, s2, s6
+; GFX8-NEXT: s_cmp_lg_u32 s3, 8
; GFX8-NEXT: s_cbranch_scc1 .LBB5_1
; GFX8-NEXT: ; %bb.2: ; %bb18
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; GFX8-NEXT: s_mov_b32 s7, 0xf000
; GFX8-NEXT: s_mov_b32 s6, -1
-; GFX8-NEXT: v_mov_b32_e32 v0, s2
+; GFX8-NEXT: v_mov_b32_e32 v0, s3
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX8-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll b/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
index 987b827a48664..2d35135b5f757 100644
--- a/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
+++ b/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
@@ -11,116 +11,209 @@ define amdgpu_kernel void @multi_store_spill_slot() #0 {
; CHECK-NEXT: s_mov_b32 s0, 0
; CHECK-NEXT: v_mov_b32_e32 v3, 0
; CHECK-NEXT: s_mov_b32 s1, s0
-; CHECK-NEXT: v_mov_b32_e32 v28, 0x3c003c00
-; CHECK-NEXT: v_pk_mov_b32 v[30:31], s[0:1], s[0:1] op_sel:[0,1]
+; CHECK-NEXT: v_mov_b32_e32 v22, 0x3c003c00
+; CHECK-NEXT: v_pk_mov_b32 v[24:25], s[0:1], s[0:1] op_sel:[0,1]
; CHECK-NEXT: v_mov_b32_e32 v0, 0x7fc00000
-; CHECK-NEXT: v_mov_b32_e32 v213, 1.0
-; CHECK-NEXT: v_mov_b32_e32 v29, v28
+; CHECK-NEXT: v_accvgpr_write_b32 a1, 1.0
+; CHECK-NEXT: v_mov_b32_e32 v23, v22
; CHECK-NEXT: s_and_b64 vcc, exec, -1
; CHECK-NEXT: v_mov_b32_e32 v2, v3
-; CHECK-NEXT: v_mov_b32_e32 v70, v3
-; CHECK-NEXT: v_mov_b32_e32 v20, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a64, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a1, v3
-; CHECK-NEXT: v_mov_b32_e32 v86, v3
-; CHECK-NEXT: v_mov_b32_e32 v162, v3
+; CHECK-NEXT: v_mov_b32_e32 v178, v3
+; CHECK-NEXT: v_mov_b32_e32 v18, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a66, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a17, v3
+; CHECK-NEXT: v_mov_b32_e32 v210, v3
+; CHECK-NEXT: v_mov_b32_e32 v34, v3
; CHECK-NEXT: v_mov_b32_e32 v50, v3
-; CHECK-NEXT: v_mov_b32_e32 v212, v3
-; CHECK-NEXT: v_mov_b32_e32 v67, v3
-; CHECK-NEXT: v_mov_b32_e32 v66, v3
-; CHECK-NEXT: v_mov_b32_e32 v196, v3
-; CHECK-NEXT: v_mov_b32_e32 v146, v3
-; CHECK-NEXT: v_mov_b32_e32 v32, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a0, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a115, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a114, v3
+; CHECK-NEXT: v_mov_b32_e32 v82, v3
+; CHECK-NEXT: v_mov_b32_e32 v98, v3
+; CHECK-NEXT: v_mov_b32_e32 v194, v3
; CHECK-NEXT: v_mov_b32_e32 v243, v3
; CHECK-NEXT: v_mov_b32_e32 v114, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a17, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a16, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a33, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a32, v3
; CHECK-NEXT: v_mov_b32_e32 v145, v3
-; CHECK-NEXT: v_mov_b32_e32 v34, v3
-; CHECK-NEXT: v_mov_b32_e32 v35, v3
+; CHECK-NEXT: v_mov_b32_e32 v146, v3
+; CHECK-NEXT: v_mov_b32_e32 v147, v3
; CHECK-NEXT: .LBB0_1: ; %do.body
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: v_accvgpr_mov_b32 a2, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a3, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a4, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a5, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a6, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a7, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a8, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a9, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a10, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a11, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a12, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a13, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a14, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a15, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a49, a15
+; CHECK-NEXT: v_accvgpr_mov_b32 a48, a14
+; CHECK-NEXT: v_accvgpr_mov_b32 a47, a13
+; CHECK-NEXT: v_accvgpr_mov_b32 a46, a12
+; CHECK-NEXT: v_accvgpr_mov_b32 a45, a11
+; CHECK-NEXT: v_accvgpr_mov_b32 a44, a10
+; CHECK-NEXT: v_accvgpr_mov_b32 a43, a9
+; CHECK-NEXT: v_accvgpr_mov_b32 a42, a8
+; CHECK-NEXT: v_accvgpr_mov_b32 a41, a7
+; CHECK-NEXT: v_accvgpr_mov_b32 a40, a6
+; CHECK-NEXT: v_accvgpr_mov_b32 a39, a5
+; CHECK-NEXT: v_accvgpr_mov_b32 a38, a4
+; CHECK-NEXT: v_accvgpr_mov_b32 a37, a3
+; CHECK-NEXT: v_accvgpr_mov_b32 a36, a2
+; CHECK-NEXT: v_accvgpr_mov_b32 a35, a1
+; CHECK-NEXT: v_accvgpr_mov_b32 a34, a0
+; CHECK-NEXT: v_accvgpr_write_b32 a116, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a117, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[34:49], v[24:25], v[24:25], a[34:49]
+; CHECK-NEXT: v_accvgpr_write_b32 a118, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a119, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a120, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a121, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a122, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a123, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a124, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a125, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a126, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a127, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a128, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a129, v3
; CHECK-NEXT: v_mov_b32_e32 v4, v3
; CHECK-NEXT: v_mov_b32_e32 v5, v3
; CHECK-NEXT: v_mov_b32_e32 v6, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[114:129], v[24:25], v[24:25], a[114:129]
; CHECK-NEXT: v_mov_b32_e32 v7, v3
; CHECK-NEXT: v_mov_b32_e32 v8, v3
; CHECK-NEXT: v_mov_b32_e32 v9, v3
+; CHECK-NEXT: v_accvgpr_mov_b32 a63, a49
+; CHECK-NEXT: v_accvgpr_mov_b32 a62, a48
+; CHECK-NEXT: v_accvgpr_mov_b32 a61, a47
+; CHECK-NEXT: v_accvgpr_mov_b32 a60, a46
+; CHECK-NEXT: v_accvgpr_mov_b32 a59, a45
+; CHECK-NEXT: v_accvgpr_mov_b32 a58, a44
+; CHECK-NEXT: v_accvgpr_mov_b32 a57, a43
+; CHECK-NEXT: v_accvgpr_mov_b32 a56, a42
+; CHECK-NEXT: v_accvgpr_mov_b32 a55, a41
+; CHECK-NEXT: v_accvgpr_mov_b32 a54, a40
+; CHECK-NEXT: v_accvgpr_mov_b32 a53, a39
+; CHECK-NEXT: v_accvgpr_mov_b32 a52, a38
+; CHECK-NEXT: v_accvgpr_mov_b32 a51, a37
+; CHECK-NEXT: v_accvgpr_mov_b32 a50, a36
+; CHECK-NEXT: v_accvgpr_mov_b32 a49, a35
+; CHECK-NEXT: v_accvgpr_mov_b32 a48, a34
+; CHECK-NEXT: v_accvgpr_write_b32 a34, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a35, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a36, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a37, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a38, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a39, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a40, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a41, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a42, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a43, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a44, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a45, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a46, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a47, v3
+; CHECK-NEXT: v_accvgpr_mov_b32 a97, a63
+; CHECK-NEXT: v_accvgpr_mov_b32 a96, a62
+; CHECK-NEXT: v_accvgpr_mov_b32 a95, a61
+; CHECK-NEXT: v_accvgpr_mov_b32 a94, a60
+; CHECK-NEXT: v_accvgpr_mov_b32 a93, a59
+; CHECK-NEXT: v_accvgpr_mov_b32 a92, a58
+; CHECK-NEXT: v_accvgpr_mov_b32 a91, a57
+; CHECK-NEXT: v_accvgpr_mov_b32 a90, a56
+; CHECK-NEXT: v_accvgpr_mov_b32 a89, a55
+; CHECK-NEXT: v_accvgpr_mov_b32 a88, a54
+; CHECK-NEXT: v_accvgpr_mov_b32 a87, a53
+; CHECK-NEXT: v_accvgpr_mov_b32 a86, a52
+; CHECK-NEXT: v_accvgpr_mov_b32 a85, a51
+; CHECK-NEXT: v_accvgpr_mov_b32 a84, a50
+; CHECK-NEXT: v_accvgpr_mov_b32 a83, a49
+; CHECK-NEXT: v_accvgpr_mov_b32 a82, a48
+; CHECK-NEXT: v_accvgpr_mov_b32 a49, a47
+; CHECK-NEXT: v_accvgpr_mov_b32 a48, a46
+; CHECK-NEXT: v_accvgpr_mov_b32 a47, a45
+; CHECK-NEXT: v_accvgpr_mov_b32 a46, a44
+; CHECK-NEXT: v_accvgpr_mov_b32 a45, a43
+; CHECK-NEXT: v_accvgpr_mov_b32 a44, a42
+; CHECK-NEXT: v_accvgpr_mov_b32 a43, a41
+; CHECK-NEXT: v_accvgpr_mov_b32 a42, a40
+; CHECK-NEXT: v_accvgpr_mov_b32 a41, a39
+; CHECK-NEXT: v_accvgpr_mov_b32 a40, a38
+; CHECK-NEXT: v_accvgpr_mov_b32 a39, a37
+; CHECK-NEXT: v_accvgpr_mov_b32 a38, a36
+; CHECK-NEXT: v_accvgpr_mov_b32 a37, a35
+; CHECK-NEXT: v_accvgpr_mov_b32 a36, a34
+; CHECK-NEXT: v_accvgpr_mov_b32 a35, a33
+; CHECK-NEXT: v_accvgpr_mov_b32 a34, a32
; CHECK-NEXT: v_mov_b32_e32 v10, v3
; CHECK-NEXT: v_mov_b32_e32 v11, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[34:49], v[24:25], v[24:25], a[34:49]
; CHECK-NEXT: v_mov_b32_e32 v12, v3
; CHECK-NEXT: v_mov_b32_e32 v13, v3
; CHECK-NEXT: v_mov_b32_e32 v14, v3
; CHECK-NEXT: v_mov_b32_e32 v15, v3
; CHECK-NEXT: v_mov_b32_e32 v16, v3
; CHECK-NEXT: v_mov_b32_e32 v17, v3
-; CHECK-NEXT: v_mov_b32_e32 v214, v213
-; CHECK-NEXT: v_mov_b32_e32 v215, v213
-; CHECK-NEXT: v_mov_b32_e32 v216, v213
-; CHECK-NEXT: v_mov_b32_e32 v217, v213
-; CHECK-NEXT: v_mov_b32_e32 v218, v213
-; CHECK-NEXT: v_mov_b32_e32 v219, v213
-; CHECK-NEXT: v_mov_b32_e32 v220, v213
-; CHECK-NEXT: v_mov_b32_e32 v221, v213
-; CHECK-NEXT: v_mov_b32_e32 v222, v213
-; CHECK-NEXT: v_mov_b32_e32 v223, v213
-; CHECK-NEXT: v_mov_b32_e32 v224, v213
-; CHECK-NEXT: v_mov_b32_e32 v225, v213
-; CHECK-NEXT: v_mov_b32_e32 v226, v213
-; CHECK-NEXT: v_mov_b32_e32 v227, v213
-; CHECK-NEXT: v_accvgpr_write_b32 a47, v17
-; CHECK-NEXT: v_accvgpr_write_b32 a46, v16
-; CHECK-NEXT: v_accvgpr_write_b32 a45, v15
-; CHECK-NEXT: v_accvgpr_write_b32 a44, v14
-; CHECK-NEXT: v_accvgpr_write_b32 a43, v13
-; CHECK-NEXT: v_accvgpr_write_b32 a42, v12
-; CHECK-NEXT: v_accvgpr_write_b32 a41, v11
-; CHECK-NEXT: v_accvgpr_write_b32 a40, v10
-; CHECK-NEXT: v_accvgpr_write_b32 a39, v9
-; CHECK-NEXT: v_accvgpr_write_b32 a38, v8
-; CHECK-NEXT: v_accvgpr_write_b32 a37, v7
-; CHECK-NEXT: v_accvgpr_write_b32 a36, v6
-; CHECK-NEXT: v_accvgpr_write_b32 a35, v5
-; CHECK-NEXT: v_accvgpr_write_b32 a34, v4
-; CHECK-NEXT: v_accvgpr_write_b32 a33, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a32, v2
-; CHECK-NEXT: v_accvgpr_write_b32 a48, v212
-; CHECK-NEXT: v_accvgpr_write_b32 a49, v213
-; CHECK-NEXT: v_accvgpr_write_b32 a50, v214
-; CHECK-NEXT: v_accvgpr_write_b32 a51, v215
-; CHECK-NEXT: v_accvgpr_write_b32 a52, v216
-; CHECK-NEXT: v_accvgpr_write_b32 a53, v217
-; CHECK-NEXT: v_accvgpr_write_b32 a54, v218
-; CHECK-NEXT: v_accvgpr_write_b32 a55, v219
-; CHECK-NEXT: v_accvgpr_write_b32 a56, v220
-; CHECK-NEXT: v_accvgpr_write_b32 a57, v221
-; CHECK-NEXT: v_accvgpr_write_b32 a58, v222
-; CHECK-NEXT: v_accvgpr_write_b32 a59, v223
-; CHECK-NEXT: v_accvgpr_write_b32 a60, v224
-; CHECK-NEXT: v_accvgpr_write_b32 a61, v225
-; CHECK-NEXT: v_accvgpr_write_b32 a62, v226
-; CHECK-NEXT: v_accvgpr_write_b32 a63, v227
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[32:47], v[30:31], v[30:31], a[32:47]
-; CHECK-NEXT: v_mov_b32_e32 v13, v70
-; CHECK-NEXT: v_mov_b32_e32 v68, v3
-; CHECK-NEXT: v_mov_b32_e32 v69, v3
-; CHECK-NEXT: v_mov_b32_e32 v70, v3
-; CHECK-NEXT: v_mov_b32_e32 v71, v3
-; CHECK-NEXT: v_mov_b32_e32 v72, v3
-; CHECK-NEXT: v_mov_b32_e32 v73, v3
-; CHECK-NEXT: v_mov_b32_e32 v74, v3
-; CHECK-NEXT: v_mov_b32_e32 v75, v3
-; CHECK-NEXT: v_mov_b32_e32 v76, v3
-; CHECK-NEXT: v_mov_b32_e32 v77, v3
-; CHECK-NEXT: v_mov_b32_e32 v78, v3
-; CHECK-NEXT: v_mov_b32_e32 v79, v3
-; CHECK-NEXT: v_mov_b32_e32 v80, v3
-; CHECK-NEXT: v_mov_b32_e32 v81, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[48:63], v[30:31], v[30:31], a[48:63]
-; CHECK-NEXT: v_mov_b32_e32 v242, v32
+; CHECK-NEXT: v_accvgpr_mov_b32 a16, a66
+; CHECK-NEXT: v_accvgpr_write_b32 a79, v17
+; CHECK-NEXT: v_accvgpr_write_b32 a78, v16
+; CHECK-NEXT: v_accvgpr_write_b32 a77, v15
+; CHECK-NEXT: v_accvgpr_write_b32 a76, v14
+; CHECK-NEXT: v_accvgpr_write_b32 a75, v13
+; CHECK-NEXT: v_accvgpr_write_b32 a74, v12
+; CHECK-NEXT: v_accvgpr_write_b32 a73, v11
+; CHECK-NEXT: v_accvgpr_write_b32 a72, v10
+; CHECK-NEXT: v_accvgpr_write_b32 a71, v9
+; CHECK-NEXT: v_accvgpr_write_b32 a70, v8
+; CHECK-NEXT: v_accvgpr_write_b32 a69, v7
+; CHECK-NEXT: v_accvgpr_write_b32 a68, v6
+; CHECK-NEXT: v_accvgpr_write_b32 a67, v5
+; CHECK-NEXT: v_accvgpr_write_b32 a66, v4
+; CHECK-NEXT: v_accvgpr_write_b32 a65, v3
+; CHECK-NEXT: v_accvgpr_write_b32 a64, v2
; CHECK-NEXT: v_mov_b32_e32 v1, v3
; CHECK-NEXT: v_mov_b32_e32 v2, v3
-; CHECK-NEXT: v_mov_b32_e32 v14, v20
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[24:25], v[24:25], a[64:79]
+; CHECK-NEXT: v_mov_b32_e32 v13, v178
+; CHECK-NEXT: v_mov_b32_e32 v14, v18
+; CHECK-NEXT: v_pk_mov_b32 v[176:177], v[14:15], v[14:15] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[174:175], v[12:13], v[12:13] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[172:173], v[10:11], v[10:11] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[170:171], v[8:9], v[8:9] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[168:169], v[6:7], v[6:7] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[166:167], v[4:5], v[4:5] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[164:165], v[2:3], v[2:3] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[162:163], v[0:1], v[0:1] op_sel:[0,1]
+; CHECK-NEXT: v_accvgpr_mov_b32 a113, a49
+; CHECK-NEXT: v_accvgpr_mov_b32 a112, a48
+; CHECK-NEXT: v_accvgpr_mov_b32 a111, a47
+; CHECK-NEXT: v_accvgpr_mov_b32 a110, a46
+; CHECK-NEXT: v_accvgpr_mov_b32 a109, a45
+; CHECK-NEXT: v_accvgpr_mov_b32 a108, a44
+; CHECK-NEXT: v_accvgpr_mov_b32 a107, a43
+; CHECK-NEXT: v_accvgpr_mov_b32 a106, a42
+; CHECK-NEXT: v_accvgpr_mov_b32 a105, a41
+; CHECK-NEXT: v_accvgpr_mov_b32 a104, a40
+; CHECK-NEXT: v_accvgpr_mov_b32 a103, a39
+; CHECK-NEXT: v_accvgpr_mov_b32 a102, a38
+; CHECK-NEXT: v_accvgpr_mov_b32 a101, a37
+; CHECK-NEXT: v_accvgpr_mov_b32 a100, a36
+; CHECK-NEXT: v_accvgpr_mov_b32 a99, a35
+; CHECK-NEXT: v_accvgpr_mov_b32 a98, a34
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[34:49], v[24:25], v[24:25], a[114:129]
+; CHECK-NEXT: v_mov_b32_e32 v242, v194
+; CHECK-NEXT: v_mov_b32_e32 v5, v210
+; CHECK-NEXT: v_mov_b32_e32 v13, v3
+; CHECK-NEXT: v_mov_b32_e32 v14, v3
; CHECK-NEXT: v_mov_b32_e32 v228, v3
; CHECK-NEXT: v_mov_b32_e32 v229, v3
; CHECK-NEXT: v_mov_b32_e32 v230, v3
@@ -132,10 +225,58 @@ define amdgpu_kernel void @multi_store_spill_slot() #0 {
; CHECK-NEXT: v_mov_b32_e32 v236, v3
; CHECK-NEXT: v_mov_b32_e32 v237, v3
; CHECK-NEXT: v_mov_b32_e32 v238, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[66:81], v[30:31], v[30:31], v[66:81]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[162:177], v[24:25], v[24:25], v[162:177]
; CHECK-NEXT: v_mov_b32_e32 v239, v3
; CHECK-NEXT: v_mov_b32_e32 v240, v3
; CHECK-NEXT: v_mov_b32_e32 v241, v3
+; CHECK-NEXT: v_pk_mov_b32 v[194:195], v[228:229], v[228:229] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[196:197], v[230:231], v[230:231] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[198:199], v[232:233], v[232:233] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[200:201], v[234:235], v[234:235] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[202:203], v[236:237], v[236:237] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[204:205], v[238:239], v[238:239] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[206:207], v[240:241], v[240:241] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[208:209], v[242:243], v[242:243] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[224:225], v[16:17], v[16:17] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[222:223], v[14:15], v[14:15] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[220:221], v[12:13], v[12:13] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[218:219], v[10:11], v[10:11] op_sel:[0,1]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[24:25], v[24:25], a[64:79]
+; CHECK-NEXT: v_pk_mov_b32 v[216:217], v[8:9], v[8:9] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[214:215], v[6:7], v[6:7] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[212:213], v[4:5], v[4:5] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[210:211], v[2:3], v[2:3] op_sel:[0,1]
+; CHECK-NEXT: v_mov_b32_e32 v148, v3
+; CHECK-NEXT: v_mov_b32_e32 v149, v3
+; CHECK-NEXT: v_mov_b32_e32 v150, v3
+; CHECK-NEXT: v_mov_b32_e32 v151, v3
+; CHECK-NEXT: v_mov_b32_e32 v152, v3
+; CHECK-NEXT: v_mov_b32_e32 v153, v3
+; CHECK-NEXT: v_mov_b32_e32 v154, v3
+; CHECK-NEXT: v_mov_b32_e32 v155, v3
+; CHECK-NEXT: v_mov_b32_e32 v156, v3
+; CHECK-NEXT: v_mov_b32_e32 v157, v3
+; CHECK-NEXT: v_mov_b32_e32 v158, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[34:49], v[24:25], v[24:25], a[34:49]
+; CHECK-NEXT: v_mov_b32_e32 v159, v3
+; CHECK-NEXT: v_mov_b32_e32 v160, v3
+; CHECK-NEXT: v_mov_b32_e32 v161, v3
+; CHECK-NEXT: v_mov_b32_e32 v130, v3
+; CHECK-NEXT: v_mov_b32_e32 v131, v3
+; CHECK-NEXT: v_mov_b32_e32 v132, v3
+; CHECK-NEXT: v_mov_b32_e32 v133, v3
+; CHECK-NEXT: v_mov_b32_e32 v134, v3
+; CHECK-NEXT: v_mov_b32_e32 v135, v3
+; CHECK-NEXT: v_mov_b32_e32 v136, v3
+; CHECK-NEXT: v_mov_b32_e32 v137, v3
+; CHECK-NEXT: v_mov_b32_e32 v138, v3
+; CHECK-NEXT: v_mov_b32_e32 v139, v3
+; CHECK-NEXT: v_mov_b32_e32 v140, v3
+; CHECK-NEXT: v_mov_b32_e32 v141, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[194:209], v[24:25], v[24:25], v[194:209]
+; CHECK-NEXT: v_mov_b32_e32 v142, v3
+; CHECK-NEXT: v_mov_b32_e32 v143, v3
+; CHECK-NEXT: v_mov_b32_e32 v144, v3
; CHECK-NEXT: v_accvgpr_write_b32 a18, v3
; CHECK-NEXT: v_accvgpr_write_b32 a19, v3
; CHECK-NEXT: v_accvgpr_write_b32 a20, v3
@@ -148,101 +289,10 @@ define amdgpu_kernel void @multi_store_spill_slot() #0 {
; CHECK-NEXT: v_accvgpr_write_b32 a27, v3
; CHECK-NEXT: v_accvgpr_write_b32 a28, v3
; CHECK-NEXT: v_accvgpr_write_b32 a29, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[210:225], v[24:25], v[24:25], v[210:225]
; CHECK-NEXT: v_accvgpr_write_b32 a30, v3
; CHECK-NEXT: v_accvgpr_write_b32 a31, v3
-; CHECK-NEXT: v_accvgpr_mov_b32 a0, a64
-; CHECK-NEXT: v_accvgpr_write_b32 a95, v15
-; CHECK-NEXT: v_accvgpr_write_b32 a94, v14
-; CHECK-NEXT: v_accvgpr_write_b32 a93, v13
-; CHECK-NEXT: v_accvgpr_write_b32 a92, v12
-; CHECK-NEXT: v_accvgpr_write_b32 a91, v11
-; CHECK-NEXT: v_accvgpr_write_b32 a90, v10
-; CHECK-NEXT: v_accvgpr_write_b32 a89, v9
-; CHECK-NEXT: v_accvgpr_write_b32 a88, v8
-; CHECK-NEXT: v_accvgpr_write_b32 a87, v7
-; CHECK-NEXT: v_accvgpr_write_b32 a86, v6
-; CHECK-NEXT: v_accvgpr_write_b32 a85, v5
-; CHECK-NEXT: v_accvgpr_write_b32 a84, v4
-; CHECK-NEXT: v_accvgpr_write_b32 a83, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a82, v2
-; CHECK-NEXT: v_accvgpr_write_b32 a81, v1
-; CHECK-NEXT: v_accvgpr_write_b32 a80, v0
-; CHECK-NEXT: v_mov_b32_e32 v5, v86
-; CHECK-NEXT: v_mov_b32_e32 v13, v3
-; CHECK-NEXT: v_mov_b32_e32 v14, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a64, v228
-; CHECK-NEXT: v_accvgpr_write_b32 a65, v229
-; CHECK-NEXT: v_accvgpr_write_b32 a66, v230
-; CHECK-NEXT: v_accvgpr_write_b32 a67, v231
-; CHECK-NEXT: v_accvgpr_write_b32 a68, v232
-; CHECK-NEXT: v_accvgpr_write_b32 a69, v233
-; CHECK-NEXT: v_accvgpr_write_b32 a70, v234
-; CHECK-NEXT: v_accvgpr_write_b32 a71, v235
-; CHECK-NEXT: v_accvgpr_write_b32 a72, v236
-; CHECK-NEXT: v_accvgpr_write_b32 a73, v237
-; CHECK-NEXT: v_accvgpr_write_b32 a74, v238
-; CHECK-NEXT: v_accvgpr_write_b32 a75, v239
-; CHECK-NEXT: v_accvgpr_write_b32 a76, v240
-; CHECK-NEXT: v_accvgpr_write_b32 a77, v241
-; CHECK-NEXT: v_accvgpr_write_b32 a78, v242
-; CHECK-NEXT: v_accvgpr_write_b32 a79, v243
-; CHECK-NEXT: v_accvgpr_mov_b32 a111, a47
-; CHECK-NEXT: v_accvgpr_mov_b32 a110, a46
-; CHECK-NEXT: v_accvgpr_mov_b32 a109, a45
-; CHECK-NEXT: v_accvgpr_mov_b32 a108, a44
-; CHECK-NEXT: v_accvgpr_mov_b32 a107, a43
-; CHECK-NEXT: v_accvgpr_mov_b32 a106, a42
-; CHECK-NEXT: v_accvgpr_mov_b32 a105, a41
-; CHECK-NEXT: v_accvgpr_mov_b32 a104, a40
-; CHECK-NEXT: v_accvgpr_mov_b32 a103, a39
-; CHECK-NEXT: v_accvgpr_mov_b32 a102, a38
-; CHECK-NEXT: v_accvgpr_mov_b32 a101, a37
-; CHECK-NEXT: v_accvgpr_mov_b32 a100, a36
-; CHECK-NEXT: v_accvgpr_mov_b32 a99, a35
-; CHECK-NEXT: v_accvgpr_mov_b32 a98, a34
-; CHECK-NEXT: v_accvgpr_mov_b32 a97, a33
-; CHECK-NEXT: v_accvgpr_mov_b32 a96, a32
-; CHECK-NEXT: v_accvgpr_mov_b32 a32, a48
-; CHECK-NEXT: v_accvgpr_mov_b32 a33, a49
-; CHECK-NEXT: v_accvgpr_mov_b32 a34, a50
-; CHECK-NEXT: v_accvgpr_mov_b32 a35, a51
-; CHECK-NEXT: v_accvgpr_mov_b32 a36, a52
-; CHECK-NEXT: v_accvgpr_mov_b32 a37, a53
-; CHECK-NEXT: v_accvgpr_mov_b32 a38, a54
-; CHECK-NEXT: v_accvgpr_mov_b32 a39, a55
-; CHECK-NEXT: v_accvgpr_mov_b32 a40, a56
-; CHECK-NEXT: v_accvgpr_mov_b32 a41, a57
-; CHECK-NEXT: v_accvgpr_mov_b32 a42, a58
-; CHECK-NEXT: v_accvgpr_mov_b32 a43, a59
-; CHECK-NEXT: v_accvgpr_mov_b32 a44, a60
-; CHECK-NEXT: v_accvgpr_mov_b32 a45, a61
-; CHECK-NEXT: v_accvgpr_mov_b32 a46, a62
-; CHECK-NEXT: v_accvgpr_mov_b32 a47, a63
-; CHECK-NEXT: v_accvgpr_mov_b32 a63, a31
-; CHECK-NEXT: v_accvgpr_mov_b32 a62, a30
-; CHECK-NEXT: v_accvgpr_mov_b32 a61, a29
-; CHECK-NEXT: v_accvgpr_mov_b32 a60, a28
-; CHECK-NEXT: v_accvgpr_mov_b32 a59, a27
-; CHECK-NEXT: v_accvgpr_mov_b32 a58, a26
-; CHECK-NEXT: v_accvgpr_mov_b32 a57, a25
-; CHECK-NEXT: v_accvgpr_mov_b32 a56, a24
-; CHECK-NEXT: v_accvgpr_mov_b32 a55, a23
-; CHECK-NEXT: v_accvgpr_mov_b32 a54, a22
-; CHECK-NEXT: v_accvgpr_mov_b32 a53, a21
-; CHECK-NEXT: v_accvgpr_mov_b32 a52, a20
-; CHECK-NEXT: v_accvgpr_mov_b32 a51, a19
-; CHECK-NEXT: v_accvgpr_mov_b32 a50, a18
-; CHECK-NEXT: v_accvgpr_mov_b32 a49, a17
-; CHECK-NEXT: v_accvgpr_mov_b32 a48, a16
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[30:31], v[30:31], a[64:79]
-; CHECK-NEXT: v_pk_mov_b32 v[100:101], v[16:17], v[16:17] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[98:99], v[14:15], v[14:15] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[96:97], v[12:13], v[12:13] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[94:95], v[10:11], v[10:11] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[92:93], v[8:9], v[8:9] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[90:91], v[6:7], v[6:7] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[88:89], v[4:5], v[4:5] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[86:87], v[2:3], v[2:3] op_sel:[0,1]
+; CHECK-NEXT: v_mov_b32_e32 v35, v3
; CHECK-NEXT: v_mov_b32_e32 v36, v3
; CHECK-NEXT: v_mov_b32_e32 v37, v3
; CHECK-NEXT: v_mov_b32_e32 v38, v3
@@ -250,146 +300,32 @@ define amdgpu_kernel void @multi_store_spill_slot() #0 {
; CHECK-NEXT: v_mov_b32_e32 v40, v3
; CHECK-NEXT: v_mov_b32_e32 v41, v3
; CHECK-NEXT: v_mov_b32_e32 v42, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[48:63], v[30:31], v[30:31], a[48:63]
; CHECK-NEXT: v_mov_b32_e32 v43, v3
; CHECK-NEXT: v_mov_b32_e32 v44, v3
; CHECK-NEXT: v_mov_b32_e32 v45, v3
; CHECK-NEXT: v_mov_b32_e32 v46, v3
; CHECK-NEXT: v_mov_b32_e32 v47, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[162:177], v[24:25], v[24:25], v[162:177]
; CHECK-NEXT: v_mov_b32_e32 v48, v3
; CHECK-NEXT: v_mov_b32_e32 v49, v3
-; CHECK-NEXT: v_pk_mov_b32 v[228:229], v[48:49], v[48:49] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[226:227], v[46:47], v[46:47] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[224:225], v[44:45], v[44:45] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[222:223], v[42:43], v[42:43] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[220:221], v[40:41], v[40:41] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[218:219], v[38:39], v[38:39] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[216:217], v[36:37], v[36:37] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[214:215], v[34:35], v[34:35] op_sel:[0,1]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[4:19], v[30:31], v[30:31], v[66:81]
-; CHECK-NEXT: v_pk_mov_b32 v[32:33], v[214:215], v[214:215] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[34:35], v[216:217], v[216:217] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[36:37], v[218:219], v[218:219] op_sel:[0,1]
-; CHECK-NEXT: v_accvgpr_mov_b32 a127, a63
-; CHECK-NEXT: v_accvgpr_mov_b32 a126, a62
-; CHECK-NEXT: v_accvgpr_mov_b32 a125, a61
-; CHECK-NEXT: v_accvgpr_mov_b32 a124, a60
-; CHECK-NEXT: v_accvgpr_mov_b32 a123, a59
-; CHECK-NEXT: v_accvgpr_mov_b32 a122, a58
-; CHECK-NEXT: v_accvgpr_mov_b32 a121, a57
-; CHECK-NEXT: v_accvgpr_mov_b32 a120, a56
-; CHECK-NEXT: v_accvgpr_mov_b32 a119, a55
-; CHECK-NEXT: v_accvgpr_mov_b32 a118, a54
-; CHECK-NEXT: v_accvgpr_mov_b32 a117, a53
-; CHECK-NEXT: v_accvgpr_mov_b32 a116, a52
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[80:95], v[30:31], v[30:31], a[80:95]
-; CHECK-NEXT: v_accvgpr_mov_b32 a115, a51
-; CHECK-NEXT: v_accvgpr_mov_b32 a114, a50
-; CHECK-NEXT: v_accvgpr_mov_b32 a113, a49
-; CHECK-NEXT: v_accvgpr_mov_b32 a112, a48
-; CHECK-NEXT: v_accvgpr_mov_b32 a48, a64
-; CHECK-NEXT: v_accvgpr_mov_b32 a49, a65
-; CHECK-NEXT: v_accvgpr_mov_b32 a50, a66
-; CHECK-NEXT: v_accvgpr_mov_b32 a51, a67
-; CHECK-NEXT: v_accvgpr_mov_b32 a52, a68
-; CHECK-NEXT: v_accvgpr_mov_b32 a53, a69
-; CHECK-NEXT: v_accvgpr_mov_b32 a54, a70
-; CHECK-NEXT: v_accvgpr_mov_b32 a55, a71
-; CHECK-NEXT: v_accvgpr_mov_b32 a56, a72
-; CHECK-NEXT: v_accvgpr_mov_b32 a57, a73
-; CHECK-NEXT: v_accvgpr_mov_b32 a58, a74
-; CHECK-NEXT: v_accvgpr_mov_b32 a59, a75
-; CHECK-NEXT: v_accvgpr_mov_b32 a60, a76
-; CHECK-NEXT: v_accvgpr_mov_b32 a61, a77
-; CHECK-NEXT: v_accvgpr_mov_b32 a62, a78
-; CHECK-NEXT: v_accvgpr_mov_b32 a63, a79
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[4:19], v[30:31], v[30:31], v[4:19]
-; CHECK-NEXT: v_accvgpr_mov_b32 a64, a80
-; CHECK-NEXT: v_accvgpr_mov_b32 a65, a81
-; CHECK-NEXT: v_accvgpr_mov_b32 a66, a82
-; CHECK-NEXT: v_accvgpr_mov_b32 a67, a83
-; CHECK-NEXT: v_accvgpr_mov_b32 a68, a84
-; CHECK-NEXT: v_accvgpr_mov_b32 a69, a85
-; CHECK-NEXT: v_accvgpr_mov_b32 a70, a86
-; CHECK-NEXT: v_accvgpr_mov_b32 a71, a87
-; CHECK-NEXT: v_accvgpr_mov_b32 a72, a88
-; CHECK-NEXT: v_accvgpr_mov_b32 a73, a89
-; CHECK-NEXT: v_accvgpr_mov_b32 a74, a90
-; CHECK-NEXT: v_accvgpr_mov_b32 a75, a91
-; CHECK-NEXT: v_accvgpr_mov_b32 a76, a92
-; CHECK-NEXT: v_accvgpr_mov_b32 a77, a93
-; CHECK-NEXT: v_accvgpr_mov_b32 a78, a94
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[48:63], v[30:31], v[30:31], a[48:63]
-; CHECK-NEXT: v_accvgpr_mov_b32 a79, a95
-; CHECK-NEXT: v_pk_mov_b32 v[38:39], v[220:221], v[220:221] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[40:41], v[222:223], v[222:223] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[42:43], v[224:225], v[224:225] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[44:45], v[226:227], v[226:227] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[46:47], v[228:229], v[228:229] op_sel:[0,1]
-; CHECK-NEXT: v_mov_b32_e32 v130, v3
-; CHECK-NEXT: v_mov_b32_e32 v131, v3
-; CHECK-NEXT: v_mov_b32_e32 v132, v3
-; CHECK-NEXT: v_mov_b32_e32 v133, v3
-; CHECK-NEXT: v_mov_b32_e32 v134, v3
-; CHECK-NEXT: v_mov_b32_e32 v135, v3
-; CHECK-NEXT: v_mov_b32_e32 v136, v3
-; CHECK-NEXT: v_mov_b32_e32 v137, v3
-; CHECK-NEXT: v_mov_b32_e32 v138, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[30:31], v[30:31], a[64:79]
-; CHECK-NEXT: v_mov_b32_e32 v139, v3
-; CHECK-NEXT: v_mov_b32_e32 v140, v3
-; CHECK-NEXT: v_mov_b32_e32 v141, v3
-; CHECK-NEXT: v_mov_b32_e32 v142, v3
-; CHECK-NEXT: v_mov_b32_e32 v143, v3
-; CHECK-NEXT: v_mov_b32_e32 v144, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a2, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a3, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a4, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a5, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a6, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a7, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a8, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a9, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a10, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[86:101], v[30:31], v[30:31], v[86:101]
-; CHECK-NEXT: v_accvgpr_write_b32 a11, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a12, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a13, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a14, v3
-; CHECK-NEXT: v_accvgpr_write_b32 a15, v3
-; CHECK-NEXT: v_mov_b32_e32 v163, v3
-; CHECK-NEXT: v_mov_b32_e32 v164, v3
-; CHECK-NEXT: v_mov_b32_e32 v165, v3
-; CHECK-NEXT: v_mov_b32_e32 v166, v3
-; CHECK-NEXT: v_mov_b32_e32 v167, v3
-; CHECK-NEXT: v_mov_b32_e32 v168, v3
-; CHECK-NEXT: v_mov_b32_e32 v169, v3
-; CHECK-NEXT: v_mov_b32_e32 v170, v3
-; CHECK-NEXT: v_mov_b32_e32 v171, v3
-; CHECK-NEXT: v_mov_b32_e32 v172, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[32:47], v[30:31], v[30:31], v[32:47]
-; CHECK-NEXT: v_mov_b32_e32 v173, v3
-; CHECK-NEXT: v_mov_b32_e32 v174, v3
-; CHECK-NEXT: v_mov_b32_e32 v175, v3
-; CHECK-NEXT: v_mov_b32_e32 v176, v3
-; CHECK-NEXT: v_mov_b32_e32 v177, v3
-; CHECK-NEXT: v_mov_b32_e32 v147, v3
-; CHECK-NEXT: v_mov_b32_e32 v148, v3
-; CHECK-NEXT: v_mov_b32_e32 v149, v3
-; CHECK-NEXT: v_mov_b32_e32 v150, v3
-; CHECK-NEXT: v_mov_b32_e32 v151, v3
-; CHECK-NEXT: v_mov_b32_e32 v152, v3
-; CHECK-NEXT: v_mov_b32_e32 v153, v3
-; CHECK-NEXT: v_mov_b32_e32 v154, v3
-; CHECK-NEXT: v_mov_b32_e32 v155, v3
-; CHECK-NEXT: v_mov_b32_e32 v156, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[4:19], v[30:31], v[30:31], v[4:19]
-; CHECK-NEXT: v_mov_b32_e32 v157, v3
-; CHECK-NEXT: v_mov_b32_e32 v158, v3
-; CHECK-NEXT: v_mov_b32_e32 v159, v3
-; CHECK-NEXT: v_mov_b32_e32 v160, v3
-; CHECK-NEXT: v_mov_b32_e32 v161, v3
-; CHECK-NEXT: v_accvgpr_read_b32 v68, a64
+; CHECK-NEXT: v_mov_b32_e32 v99, v3
+; CHECK-NEXT: v_mov_b32_e32 v100, v3
+; CHECK-NEXT: v_mov_b32_e32 v101, v3
+; CHECK-NEXT: v_mov_b32_e32 v102, v3
+; CHECK-NEXT: v_mov_b32_e32 v103, v3
+; CHECK-NEXT: v_mov_b32_e32 v104, v3
+; CHECK-NEXT: v_mov_b32_e32 v105, v3
+; CHECK-NEXT: v_mov_b32_e32 v106, v3
+; CHECK-NEXT: v_mov_b32_e32 v107, v3
+; CHECK-NEXT: v_mov_b32_e32 v108, v3
+; CHECK-NEXT: v_mov_b32_e32 v109, v3
+; CHECK-NEXT: v_mov_b32_e32 v110, v3
+; CHECK-NEXT: v_mov_b32_e32 v111, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[146:161], v[24:25], v[24:25], v[146:161]
+; CHECK-NEXT: v_mov_b32_e32 v112, v3
+; CHECK-NEXT: v_mov_b32_e32 v113, v3
+; CHECK-NEXT: v_accvgpr_mov_b32 a81, a31
+; CHECK-NEXT: v_accvgpr_mov_b32 a80, a30
; CHECK-NEXT: v_mov_b32_e32 v51, v3
; CHECK-NEXT: v_mov_b32_e32 v52, v3
; CHECK-NEXT: v_mov_b32_e32 v53, v3
@@ -399,79 +335,73 @@ define amdgpu_kernel void @multi_store_spill_slot() #0 {
; CHECK-NEXT: v_mov_b32_e32 v57, v3
; CHECK-NEXT: v_mov_b32_e32 v58, v3
; CHECK-NEXT: v_mov_b32_e32 v59, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[32:47], v[30:31], v[30:31], a[32:47]
; CHECK-NEXT: v_mov_b32_e32 v60, v3
; CHECK-NEXT: v_mov_b32_e32 v61, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[24:25], v[24:25], a[64:79]
; CHECK-NEXT: v_mov_b32_e32 v62, v3
; CHECK-NEXT: v_mov_b32_e32 v63, v3
; CHECK-NEXT: v_mov_b32_e32 v64, v3
; CHECK-NEXT: v_mov_b32_e32 v65, v3
-; CHECK-NEXT: v_mov_b32_e32 v197, v3
-; CHECK-NEXT: v_mov_b32_e32 v198, v3
-; CHECK-NEXT: v_mov_b32_e32 v199, v3
-; CHECK-NEXT: v_mov_b32_e32 v200, v3
-; CHECK-NEXT: v_mov_b32_e32 v201, v3
-; CHECK-NEXT: v_mov_b32_e32 v202, v3
-; CHECK-NEXT: v_mov_b32_e32 v203, v3
-; CHECK-NEXT: v_mov_b32_e32 v204, v3
-; CHECK-NEXT: v_mov_b32_e32 v205, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[48:63], v[30:31], v[30:31], a[48:63]
-; CHECK-NEXT: v_mov_b32_e32 v206, v3
-; CHECK-NEXT: v_mov_b32_e32 v207, v3
-; CHECK-NEXT: v_mov_b32_e32 v208, v3
-; CHECK-NEXT: v_mov_b32_e32 v209, v3
-; CHECK-NEXT: v_mov_b32_e32 v210, v3
-; CHECK-NEXT: v_mov_b32_e32 v211, v3
-; CHECK-NEXT: v_pk_mov_b32 v[228:229], v[46:47], v[46:47] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[226:227], v[44:45], v[44:45] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[224:225], v[42:43], v[42:43] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[222:223], v[40:41], v[40:41] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[220:221], v[38:39], v[38:39] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[218:219], v[36:37], v[36:37] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[216:217], v[34:35], v[34:35] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[214:215], v[32:33], v[32:33] op_sel:[0,1]
-; CHECK-NEXT: v_accvgpr_mov_b32 a18, a32
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[112:127], v[30:31], v[30:31], a[112:127]
-; CHECK-NEXT: v_accvgpr_mov_b32 a19, a33
-; CHECK-NEXT: v_accvgpr_mov_b32 a20, a34
-; CHECK-NEXT: v_accvgpr_mov_b32 a21, a35
-; CHECK-NEXT: v_accvgpr_read_b32 v32, a48
-; CHECK-NEXT: v_accvgpr_mov_b32 a22, a36
-; CHECK-NEXT: v_accvgpr_mov_b32 a23, a37
-; CHECK-NEXT: v_accvgpr_mov_b32 a24, a38
-; CHECK-NEXT: v_accvgpr_mov_b32 a25, a39
-; CHECK-NEXT: v_accvgpr_mov_b32 a26, a40
-; CHECK-NEXT: v_accvgpr_mov_b32 a27, a41
-; CHECK-NEXT: v_accvgpr_mov_b32 a28, a42
-; CHECK-NEXT: v_accvgpr_mov_b32 a29, a43
-; CHECK-NEXT: v_accvgpr_mov_b32 a30, a44
-; CHECK-NEXT: v_accvgpr_mov_b32 a31, a45
-; CHECK-NEXT: v_accvgpr_mov_b32 a32, a46
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[130:145], v[30:31], v[30:31], v[130:145]
-; CHECK-NEXT: v_accvgpr_mov_b32 a33, a47
-; CHECK-NEXT: v_pk_mov_b32 v[20:21], v[222:223], v[222:223] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[22:23], v[224:225], v[224:225] op_sel:[0,1]
-; CHECK-NEXT: v_accvgpr_mov_b32 a48, a112
-; CHECK-NEXT: v_accvgpr_mov_b32 a49, a113
-; CHECK-NEXT: v_accvgpr_mov_b32 a50, a114
-; CHECK-NEXT: v_accvgpr_mov_b32 a51, a115
-; CHECK-NEXT: v_accvgpr_mov_b32 a52, a116
-; CHECK-NEXT: v_accvgpr_mov_b32 a53, a117
-; CHECK-NEXT: v_accvgpr_mov_b32 a54, a118
-; CHECK-NEXT: v_accvgpr_mov_b32 a55, a119
-; CHECK-NEXT: v_accvgpr_mov_b32 a56, a120
-; CHECK-NEXT: v_accvgpr_mov_b32 a57, a121
-; CHECK-NEXT: v_accvgpr_mov_b32 a58, a122
-; CHECK-NEXT: v_accvgpr_mov_b32 a59, a123
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[96:111], v[30:31], v[30:31], a[96:111]
-; CHECK-NEXT: v_accvgpr_mov_b32 a60, a124
-; CHECK-NEXT: v_accvgpr_mov_b32 a61, a125
-; CHECK-NEXT: v_accvgpr_mov_b32 a62, a126
-; CHECK-NEXT: v_accvgpr_mov_b32 a63, a127
-; CHECK-NEXT: v_pk_mov_b32 v[24:25], v[226:227], v[226:227] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[26:27], v[228:229], v[228:229] op_sel:[0,1]
+; CHECK-NEXT: v_mov_b32_e32 v83, v3
+; CHECK-NEXT: v_mov_b32_e32 v84, v3
+; CHECK-NEXT: v_mov_b32_e32 v85, v3
+; CHECK-NEXT: v_mov_b32_e32 v86, v3
+; CHECK-NEXT: v_mov_b32_e32 v87, v3
+; CHECK-NEXT: v_mov_b32_e32 v88, v3
+; CHECK-NEXT: v_mov_b32_e32 v89, v3
+; CHECK-NEXT: v_mov_b32_e32 v90, v3
+; CHECK-NEXT: v_mov_b32_e32 v91, v3
+; CHECK-NEXT: v_mov_b32_e32 v92, v3
+; CHECK-NEXT: v_mov_b32_e32 v93, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[98:113], v[24:25], v[24:25], a[98:113]
+; CHECK-NEXT: v_mov_b32_e32 v94, v3
+; CHECK-NEXT: v_mov_b32_e32 v95, v3
+; CHECK-NEXT: v_mov_b32_e32 v96, v3
+; CHECK-NEXT: v_accvgpr_mov_b32 a79, a29
+; CHECK-NEXT: v_accvgpr_mov_b32 a78, a28
+; CHECK-NEXT: v_accvgpr_mov_b32 a77, a27
+; CHECK-NEXT: v_accvgpr_mov_b32 a76, a26
+; CHECK-NEXT: v_accvgpr_mov_b32 a75, a25
+; CHECK-NEXT: v_accvgpr_mov_b32 a74, a24
+; CHECK-NEXT: v_accvgpr_mov_b32 a73, a23
+; CHECK-NEXT: v_accvgpr_mov_b32 a72, a22
+; CHECK-NEXT: v_accvgpr_mov_b32 a71, a21
+; CHECK-NEXT: v_accvgpr_mov_b32 a70, a20
+; CHECK-NEXT: v_accvgpr_mov_b32 a69, a19
+; CHECK-NEXT: v_accvgpr_mov_b32 a68, a18
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[130:145], v[24:25], v[24:25], v[130:145]
+; CHECK-NEXT: v_accvgpr_mov_b32 a67, a17
+; CHECK-NEXT: v_accvgpr_mov_b32 a66, a16
+; CHECK-NEXT: v_mov_b32_e32 v97, v3
+; CHECK-NEXT: v_accvgpr_read_b32 v2, a64
+; CHECK-NEXT: v_accvgpr_mov_b32 a50, a98
+; CHECK-NEXT: v_accvgpr_mov_b32 a51, a99
+; CHECK-NEXT: v_accvgpr_mov_b32 a52, a100
+; CHECK-NEXT: v_accvgpr_mov_b32 a53, a101
+; CHECK-NEXT: v_accvgpr_mov_b32 a54, a102
+; CHECK-NEXT: v_accvgpr_mov_b32 a55, a103
+; CHECK-NEXT: v_accvgpr_mov_b32 a56, a104
+; CHECK-NEXT: v_accvgpr_mov_b32 a57, a105
+; CHECK-NEXT: v_accvgpr_mov_b32 a58, a106
+; CHECK-NEXT: v_accvgpr_mov_b32 a59, a107
+; CHECK-NEXT: v_accvgpr_mov_b32 a60, a108
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[82:97], v[24:25], v[24:25], a[82:97]
+; CHECK-NEXT: v_accvgpr_mov_b32 a61, a109
+; CHECK-NEXT: v_accvgpr_mov_b32 a62, a110
+; CHECK-NEXT: v_accvgpr_mov_b32 a63, a111
+; CHECK-NEXT: v_accvgpr_mov_b32 a64, a112
+; CHECK-NEXT: v_accvgpr_mov_b32 a65, a113
+; CHECK-NEXT: v_pk_mov_b32 v[6:7], v[146:147], v[146:147] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[8:9], v[148:149], v[148:149] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[10:11], v[150:151], v[150:151] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[12:13], v[152:153], v[152:153] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[14:15], v[154:155], v[154:155] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[16:17], v[156:157], v[156:157] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[18:19], v[158:159], v[158:159] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[20:21], v[160:161], v[160:161] op_sel:[0,1]
; CHECK-NEXT: v_mov_b32_e32 v115, v3
; CHECK-NEXT: v_mov_b32_e32 v116, v3
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[34:49], v[24:25], v[24:25], a[34:49]
; CHECK-NEXT: v_mov_b32_e32 v117, v3
; CHECK-NEXT: v_mov_b32_e32 v118, v3
; CHECK-NEXT: v_mov_b32_e32 v119, v3
@@ -479,81 +409,50 @@ define amdgpu_kernel void @multi_store_spill_slot() #0 {
; CHECK-NEXT: v_mov_b32_e32 v121, v3
; CHECK-NEXT: v_mov_b32_e32 v122, v3
; CHECK-NEXT: v_mov_b32_e32 v123, v3
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[80:95], v[30:31], v[30:31], a[64:79]
; CHECK-NEXT: v_mov_b32_e32 v124, v3
; CHECK-NEXT: v_mov_b32_e32 v125, v3
; CHECK-NEXT: v_mov_b32_e32 v126, v3
; CHECK-NEXT: v_mov_b32_e32 v127, v3
; CHECK-NEXT: v_mov_b32_e32 v128, v3
; CHECK-NEXT: v_mov_b32_e32 v129, v3
-; CHECK-NEXT: v_pk_mov_b32 v[34:35], v[214:215], v[214:215] op_sel:[0,1]
-; CHECK-NEXT: v_mov_b32_e32 v67, v66
-; CHECK-NEXT: v_mov_b32_e32 v243, v242
; CHECK-NEXT: v_accvgpr_mov_b32 a17, a16
-; CHECK-NEXT: v_pk_mov_b32 v[36:37], v[216:217], v[216:217] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[38:39], v[218:219], v[218:219] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[40:41], v[220:221], v[220:221] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[42:43], v[222:223], v[222:223] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[44:45], v[224:225], v[224:225] op_sel:[0,1]
-; CHECK-NEXT: v_accvgpr_mov_b32 a79, a15
-; CHECK-NEXT: v_accvgpr_mov_b32 a78, a14
-; CHECK-NEXT: v_accvgpr_mov_b32 a77, a13
-; CHECK-NEXT: v_accvgpr_mov_b32 a76, a12
-; CHECK-NEXT: v_accvgpr_mov_b32 a75, a11
-; CHECK-NEXT: v_accvgpr_mov_b32 a74, a10
-; CHECK-NEXT: v_accvgpr_mov_b32 a73, a9
-; CHECK-NEXT: v_accvgpr_mov_b32 a72, a8
-; CHECK-NEXT: v_accvgpr_mov_b32 a71, a7
-; CHECK-NEXT: v_accvgpr_mov_b32 a70, a6
-; CHECK-NEXT: v_accvgpr_mov_b32 a69, a5
-; CHECK-NEXT: v_accvgpr_mov_b32 a68, a4
-; CHECK-NEXT: v_accvgpr_mov_b32 a67, a3
-; CHECK-NEXT: v_accvgpr_mov_b32 a66, a2
-; CHECK-NEXT: v_accvgpr_mov_b32 a65, a1
-; CHECK-NEXT: v_accvgpr_mov_b32 a64, a0
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[146:161], v[30:31], v[30:31], v[146:161]
-; CHECK-NEXT: v_accvgpr_mov_b32 a1, a0
-; CHECK-NEXT: v_pk_mov_b32 v[46:47], v[226:227], v[226:227] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[48:49], v[228:229], v[228:229] op_sel:[0,1]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[30:31], v[30:31], a[64:79]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[86:101], v[30:31], v[30:31], v[86:101]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[162:177], v[30:31], v[30:31], v[162:177]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[50:65], v[30:31], v[30:31], v[50:65]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[196:211], v[30:31], v[30:31], v[196:211]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[4:19], v[30:31], v[28:29], v[4:19]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[130:145], v[30:31], v[30:31], v[130:145]
+; CHECK-NEXT: v_accvgpr_mov_b32 a115, a114
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[98:113], v[24:25], v[24:25], v[98:113]
+; CHECK-NEXT: v_mov_b32_e32 v243, v242
+; CHECK-NEXT: v_accvgpr_mov_b32 a33, a32
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[194:209], v[24:25], v[24:25], v[194:209]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[178:193], v[24:25], v[24:25], v[162:177]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[66:81], v[24:25], v[24:25], a[66:81]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[210:225], v[24:25], v[24:25], v[210:225]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[34:49], v[24:25], v[24:25], v[34:49]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[50:65], v[24:25], v[24:25], v[50:65]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[82:97], v[24:25], v[24:25], v[82:97]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[130:145], v[24:25], v[24:25], v[130:145]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[82:97], v[24:25], v[24:25], a[82:97]
; CHECK-NEXT: s_nop 15
; CHECK-NEXT: s_nop 1
-; CHECK-NEXT: v_pk_mov_b32 v[12:13], v[214:215], v[214:215] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[14:15], v[216:217], v[216:217] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[16:17], v[218:219], v[218:219] op_sel:[0,1]
-; CHECK-NEXT: v_pk_mov_b32 v[18:19], v[220:221], v[220:221] op_sel:[0,1]
-; CHECK-NEXT: v_mov_b32_e32 v66, v11
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[96:111], v[30:31], v[30:31], a[96:111]
; CHECK-NEXT: v_mov_b32_e32 v145, v130
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[80:95], v[30:31], v[30:31], a[80:95]
-; CHECK-NEXT: s_nop 15
-; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: v_accvgpr_read_b32 v2, a96
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[18:33], v[30:31], v[30:31], a[18:33]
-; CHECK-NEXT: v_accvgpr_read_b32 v70, a80
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[48:63], v[30:31], v[30:31], a[48:63]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[34:49], v[24:25], v[22:23], a[34:49]
+; CHECK-NEXT: v_accvgpr_mov_b32 a0, a82
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[50:65], v[24:25], v[24:25], a[50:65]
; CHECK-NEXT: s_nop 15
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: v_accvgpr_read_b32 v212, a18
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[12:27], v[30:31], v[30:31], v[12:27]
-; CHECK-NEXT: v_accvgpr_mov_b32 a16, a48
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[146:161], v[30:31], v[30:31], v[146:161]
+; CHECK-NEXT: v_accvgpr_mov_b32 a114, a41
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[6:21], v[24:25], v[24:25], v[6:21]
+; CHECK-NEXT: v_accvgpr_mov_b32 a32, a50
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[98:113], v[24:25], v[24:25], v[98:113]
; CHECK-NEXT: s_nop 15
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: v_mov_b32_e32 v35, v12
-; CHECK-NEXT: v_mov_b32_e32 v20, v68
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[86:101], v[30:31], v[30:31], v[86:101]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[64:79], v[30:31], v[30:31], a[64:79]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[162:177], v[30:31], v[30:31], v[162:177]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[50:65], v[30:31], v[30:31], v[50:65]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[196:211], v[30:31], v[30:31], v[196:211]
-; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[114:129], v[30:31], v[30:31], v[114:129]
+; CHECK-NEXT: v_mov_b32_e32 v18, v162
+; CHECK-NEXT: v_mov_b32_e32 v147, v6
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[210:225], v[24:25], v[24:25], v[210:225]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[194:209], v[24:25], v[24:25], v[194:209]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[178:193], v[24:25], v[24:25], v[178:193]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 a[66:81], v[24:25], v[24:25], a[66:81]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[34:49], v[24:25], v[24:25], v[34:49]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[50:65], v[24:25], v[24:25], v[50:65]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[82:97], v[24:25], v[24:25], v[82:97]
+; CHECK-NEXT: v_mfma_f32_32x32x8f16 v[114:129], v[24:25], v[24:25], v[114:129]
; CHECK-NEXT: s_mov_b64 vcc, vcc
; CHECK-NEXT: s_cbranch_vccnz .LBB0_1
; CHECK-NEXT: ; %bb.2: ; %DummyReturnBlock
diff --git a/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir b/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
index d000f5a30b6dd..af40fe11a7872 100644
--- a/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
@@ -1,8 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=amdgpu11.00 -verify-machineinstrs -run-pass=si-opt-vgpr-liverange -o - %s | FileCheck -check-prefixes=CHECK %s
# RUN: llc -mtriple=amdgpu11.00 -passes=si-opt-vgpr-liverange -o - %s | FileCheck -check-prefixes=CHECK %s
-# Run again using LiveIntervals instead of LiveVariables
-# RUN: llc -mtriple=amdgpu11.00 -verify-machineinstrs -run-pass=liveintervals,si-opt-vgpr-liverange -o - %s | FileCheck -check-prefixes=CHECK %s
# Tests a case that used to assert in SIOptimizeVGPRLiveRange when trying to optimize %3 which still appears
# (though in an undef operand) in the REG_SEQUENCE of the "endif block". This undef pattern was caused by
@@ -34,35 +32,35 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN killed [[COPY]], undef %5:sgpr_128, 0, 0, 0, 0, implicit $exec :: (dereferenceable invariant load (s32))
+ ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY]], undef %5:sgpr_128, 0, 0, 0, 0, implicit $exec :: (dereferenceable invariant load (s32))
; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[BUFFER_LOAD_DWORD_OFFEN]], implicit $exec
- ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF killed [[V_CMP_NE_U32_e64_]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_NE_U32_e64_]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE killed [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, undef %4.sub3, %subreg.sub3
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, undef %4.sub3, %subreg.sub3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[PHI:%[0-9]+]]:vreg_128 = PHI undef %10:vreg_128, %bb.0, [[REG_SEQUENCE]], %bb.1
; CHECK-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[BUFFER_LOAD_DWORD_OFFEN]], %bb.0, undef %15:vgpr_32, %bb.1
- ; CHECK-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_64 = SI_ELSE killed [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_64 = SI_ELSE [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_128 = REG_SEQUENCE killed [[PHI1]], %subreg.sub0, [[PHI1]], %subreg.sub1, [[PHI1]], %subreg.sub2, undef %6:vgpr_32, %subreg.sub3
+ ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[PHI1]], %subreg.sub0, [[PHI1]], %subreg.sub1, [[PHI1]], %subreg.sub2, undef %6:vgpr_32, %subreg.sub3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
; CHECK-NEXT: [[PHI2:%[0-9]+]]:vreg_128 = PHI [[PHI]], %bb.2, [[REG_SEQUENCE1]], %bb.3
- ; CHECK-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; CHECK-NEXT: dead [[REG_SEQUENCE2:%[0-9]+]]:vreg_128 = REG_SEQUENCE killed [[PHI2]].sub2, %subreg.sub0, [[PHI2]].sub2, %subreg.sub1, [[PHI2]].sub2, %subreg.sub2, undef [[BUFFER_LOAD_DWORD_OFFEN]], %subreg.sub3
+ ; CHECK-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: dead [[REG_SEQUENCE2:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[PHI2]].sub2, %subreg.sub0, [[PHI2]].sub2, %subreg.sub1, [[PHI2]].sub2, %subreg.sub2, undef [[BUFFER_LOAD_DWORD_OFFEN]], %subreg.sub3
; CHECK-NEXT: S_ENDPGM 0
bb.0:
successors: %bb.5(0x40000000), %bb.6(0x40000000)
diff --git a/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir b/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use.mir
similarity index 71%
rename from llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
rename to llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use.mir
index 23484ddef17ab..e4541ac6a20e3 100644
--- a/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-# RUN: llc -mtriple=amdgpu11.00 -mattr=+wavefrontsize64 -run-pass=livevars,si-opt-vgpr-liverange,phi-node-elimination -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgpu11.00 -mattr=+wavefrontsize64 -run-pass=si-opt-vgpr-liverange,phi-node-elimination -o - %s | FileCheck %s
---
name: phi_src_undef_use_in_then
@@ -10,7 +10,7 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY]], %subreg.sub1
; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[COPY]], implicit $exec
; CHECK-NEXT: S_BRANCH %bb.1
@@ -18,35 +18,35 @@ body: |
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY killed [[REG_SEQUENCE]]
- ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF killed [[V_CMP_NE_U32_e64_]], %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]
+ ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_NE_U32_e64_]], %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG undef [[REG_SEQUENCE]], killed [[COPY]], %subreg.sub1
+ ; CHECK-NEXT: dead [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG undef [[REG_SEQUENCE]], [[COPY]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
; CHECK-NEXT: S_BRANCH %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY killed [[COPY1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[COPY1]]
; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
- ; CHECK-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_64 = SI_ELSE killed [[SI_IF]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_64 = SI_ELSE [[SI_IF]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: S_BRANCH %bb.4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
; CHECK-NEXT: successors: %bb.5(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64 = COPY killed [[COPY2]]
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64 = COPY [[COPY2]]
; CHECK-NEXT: S_BRANCH %bb.5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
- ; CHECK-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[DEF]]
- ; CHECK-NEXT: S_ENDPGM 0, implicit killed [[COPY3]]
+ ; CHECK-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[DEF]]
+ ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY3]]
bb.0:
liveins: $vgpr0
diff --git a/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir b/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
index 9337d244c71a6..7e4caed398a91 100644
--- a/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu9.08-amd-amdhsa -run-pass=si-opt-vgpr-liverange %s -o - | FileCheck -check-prefix=GCN %s
# RUN: llc -mtriple=amdgpu9.08-amd-amdhsa -passes=si-opt-vgpr-liverange %s -o - | FileCheck -check-prefix=GCN %s
@@ -33,47 +34,47 @@ body: |
; GCN-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; GCN-NEXT: liveins: $vgpr0
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; GCN-NEXT: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, killed [[COPY]], implicit $exec
- ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 1, killed [[V_AND_B32_e32_]], implicit $exec
- ; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 killed [[V_CMP_EQ_U32_e64_]], -1, implicit-def dead $scc
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec
+ ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 1, [[V_AND_B32_e32_]], implicit $exec
+ ; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[V_CMP_EQ_U32_e64_]], -1, implicit-def dead $scc
; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
- ; GCN-NEXT: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 killed [[V_MOV_B]], 0, 0, implicit $exec
- ; GCN-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF killed [[S_XOR_B64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; GCN-NEXT: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[V_MOV_B]], 0, 0, implicit $exec
+ ; GCN-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[S_XOR_B64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: S_BRANCH %bb.3
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.1:
; GCN-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000)
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[PHI:%[0-9]+]]:vreg_64 = PHI [[GLOBAL_LOAD_DWORDX2_]], %bb.0, undef %13:vreg_64, %bb.3
- ; GCN-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_64 = SI_ELSE killed [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; GCN-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_64 = SI_ELSE [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: S_BRANCH %bb.2
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.2:
; GCN-NEXT: successors: %bb.4(0x80000000)
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1
- ; GCN-NEXT: FLAT_STORE_DWORDX2 killed [[PHI]], killed [[REG_SEQUENCE]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1
+ ; GCN-NEXT: FLAT_STORE_DWORDX2 [[PHI]], [[REG_SEQUENCE]], 0, 0, implicit $exec, implicit $flat_scr
; GCN-NEXT: S_BRANCH %bb.4
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.3:
; GCN-NEXT: successors: %bb.1(0x80000000)
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[V_MOV_B32_e32_1]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
- ; GCN-NEXT: FLAT_STORE_DWORDX2 killed [[GLOBAL_LOAD_DWORDX2_]], killed [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_1]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
+ ; GCN-NEXT: FLAT_STORE_DWORDX2 [[GLOBAL_LOAD_DWORDX2_]], [[REG_SEQUENCE1]], 0, 0, implicit $exec, implicit $flat_scr
; GCN-NEXT: S_BRANCH %bb.1
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.4:
- ; GCN-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; GCN-NEXT: DBG_VALUE_LIST
- ; GCN-NEXT-SAME: %9
+ ; GCN-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; GCN-NEXT: DBG_VALUE_LIST !4, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 2712, DW_OP_mul, DW_OP_plus, DW_OP_plus_uconst, 2680, DW_OP_stack_value), [[GLOBAL_LOAD_DWORDX2_]], 0, debug-location !DILocation(line: 0, scope: !5)
; GCN-NEXT: SI_RETURN
+ ; GCN-NEXT-SAME: %9
bb.0:
successors: %bb.3(0x40000000), %bb.1(0x40000000)
liveins: $vgpr0
-
+
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_AND_B32_e32 1, %0, implicit $exec
%2:sreg_64 = V_CMP_EQ_U32_e64 1, killed %1, implicit $exec
@@ -82,29 +83,29 @@ body: |
%5:vreg_64 = GLOBAL_LOAD_DWORDX2 killed %4, 0, 0, implicit $exec
%6:sreg_64 = SI_IF killed %3, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.3
-
+
bb.1:
successors: %bb.2(0x40000000), %bb.4(0x40000000)
-
+
%7:sreg_64 = SI_ELSE %6, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.2
-
+
bb.2:
successors: %bb.4(0x80000000)
-
+
%8:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%9:vreg_64 = REG_SEQUENCE %8, %subreg.sub0, %8, %subreg.sub1
FLAT_STORE_DWORDX2 %5, killed %9, 0, 0, implicit $exec, implicit $flat_scr
S_BRANCH %bb.4
-
+
bb.3:
successors: %bb.1(0x80000000)
-
+
%10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%11:vreg_64 = REG_SEQUENCE %10, %subreg.sub0, %10, %subreg.sub1
FLAT_STORE_DWORDX2 %5, killed %11, 0, 0, implicit $exec, implicit $flat_scr
S_BRANCH %bb.1
-
+
bb.4:
SI_END_CF %7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
DBG_VALUE_LIST !4, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 2712, DW_OP_mul, DW_OP_plus, DW_OP_plus_uconst, 2680, DW_OP_stack_value), %5, 0, debug-location !9
diff --git a/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll b/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
index 5560df96e41ea..5a904be43ddbc 100644
--- a/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
+++ b/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
@@ -10,11 +10,11 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_or_saveexec_b64 s[4:5], -1
-; CHECK-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:1108 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:1112 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:1132 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:1136 ; 4-byte Folded Spill
; CHECK-NEXT: s_mov_b64 exec, s[4:5]
-; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
+; CHECK-NEXT: v_accvgpr_write_b32 a3, v40 ; Reload Reuse
+; CHECK-NEXT: v_accvgpr_write_b32 a5, v41 ; Reload Reuse
; CHECK-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill
@@ -45,21 +45,23 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_writelane_b32 v63, s65, 15
; CHECK-NEXT: v_writelane_b32 v63, s30, 16
; CHECK-NEXT: v_writelane_b32 v63, s31, 17
-; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
; CHECK-NEXT: v_mov_b32_e32 v30, v29
; CHECK-NEXT: v_accvgpr_write_b32 a6, v23
-; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1068 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1080 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1072 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1084 ; 4-byte Folded Spill
; CHECK-NEXT: v_accvgpr_write_b32 a8, v21
-; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1084 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1108 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1088 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1112 ; 4-byte Folded Spill
; CHECK-NEXT: v_mov_b32_e32 v20, v19
; CHECK-NEXT: v_and_b32_e32 v2, 1, v2
; CHECK-NEXT: v_cmp_eq_u32_e64 s[36:37], 1, v2
+; CHECK-NEXT: v_and_b32_e32 v17, 1, v17
+; CHECK-NEXT: v_and_b32_e32 v16, 1, v16
; CHECK-NEXT: v_and_b32_e32 v15, 1, v15
; CHECK-NEXT: v_and_b32_e32 v12, 1, v12
; CHECK-NEXT: v_and_b32_e32 v11, 1, v11
@@ -71,6 +73,8 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_and_b32_e32 v5, 1, v5
; CHECK-NEXT: v_and_b32_e32 v4, 1, v4
; CHECK-NEXT: v_and_b32_e32 v3, 1, v3
+; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v17
+; CHECK-NEXT: v_cmp_eq_u32_e64 s[56:57], 1, v16
; CHECK-NEXT: v_cmp_eq_u32_e64 s[58:59], 1, v15
; CHECK-NEXT: v_cmp_eq_u32_e64 s[72:73], 1, v12
; CHECK-NEXT: v_cmp_eq_u32_e64 s[74:75], 1, v11
@@ -84,44 +88,43 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_cmp_eq_u32_e64 s[34:35], 1, v3
; CHECK-NEXT: v_and_b32_e32 v14, 1, v14
; CHECK-NEXT: v_cmp_eq_u32_e64 s[60:61], 1, v14
-; CHECK-NEXT: v_and_b32_e32 v17, 1, v17
-; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v17
-; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:376
-; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:372
-; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:368
+; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:376
+; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:372
+; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:368
; CHECK-NEXT: buffer_load_dword a7, off, s[0:3], s32 offset:364
-; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:360
-; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:356
+; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:360
+; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:356
; CHECK-NEXT: buffer_load_dword a9, off, s[0:3], s32 offset:352
; CHECK-NEXT: buffer_load_dword a11, off, s[0:3], s32 offset:348
-; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:344
-; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:340
-; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:336
-; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:332
-; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:328
-; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:324
-; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:320
-; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:316
-; CHECK-NEXT: v_and_b32_e32 v16, 1, v16
+; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:344
+; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:340
+; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:336
+; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:332
+; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:328
+; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:324
+; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:320
+; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:316
; CHECK-NEXT: v_and_b32_e32 v13, 1, v13
-; CHECK-NEXT: v_cmp_eq_u32_e64 s[56:57], 1, v16
; CHECK-NEXT: v_cmp_eq_u32_e64 s[62:63], 1, v13
; CHECK-NEXT: s_mov_b64 s[50:51], 0
; CHECK-NEXT: s_mov_b64 s[52:53], 0
-; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1060 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1072 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1064 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1076 ; 4-byte Folded Spill
; CHECK-NEXT: v_mov_b32_e32 v30, v27
-; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1092 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1116 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1096 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1076 ; 4-byte Folded Spill
-; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1080 ; 4-byte Folded Spill
-; CHECK-NEXT: v_mov_b32_e32 v26, v25
+; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1120 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1100 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1104 ; 4-byte Folded Spill
+; CHECK-NEXT: v_mov_b32_e32 v26, v25
+; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1124 ; 4-byte Folded Spill
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1128 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1088 ; 4-byte Folded Spill
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1092 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:136
; CHECK-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:132
; CHECK-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:128
@@ -130,13 +133,13 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:116
; CHECK-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:112
; CHECK-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:108
-; CHECK-NEXT: s_nop 0
; CHECK-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:104
-; CHECK-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100
+; CHECK-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100
; CHECK-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:96
-; CHECK-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:92
-; CHECK-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88
-; CHECK-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84
+; CHECK-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:92
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:88
+; CHECK-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:84
; CHECK-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:80
; CHECK-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:76
; CHECK-NEXT: s_waitcnt vmcnt(15)
@@ -153,27 +156,21 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_and_b32_e32 v33, 1, v33
; CHECK-NEXT: v_cmp_eq_u32_e64 s[6:7], 1, v30
; CHECK-NEXT: s_waitcnt vmcnt(7)
-; CHECK-NEXT: v_and_b32_e32 v31, 1, v37
-; CHECK-NEXT: v_cmp_eq_u32_e64 s[44:45], 1, v31
-; CHECK-NEXT: v_and_b32_e32 v27, 1, v27
+; CHECK-NEXT: v_and_b32_e32 v30, 1, v36
; CHECK-NEXT: s_waitcnt vmcnt(6)
; CHECK-NEXT: v_and_b32_e32 v26, 1, v29
; CHECK-NEXT: s_waitcnt vmcnt(5)
-; CHECK-NEXT: v_and_b32_e32 v29, 1, v38
-; CHECK-NEXT: s_waitcnt vmcnt(4)
-; CHECK-NEXT: v_and_b32_e32 v30, 1, v36
-; CHECK-NEXT: s_waitcnt vmcnt(3)
-; CHECK-NEXT: v_and_b32_e32 v25, 1, v25
-; CHECK-NEXT: s_waitcnt vmcnt(1)
-; CHECK-NEXT: v_and_b32_e32 v21, 1, v21
+; CHECK-NEXT: v_and_b32_e32 v29, 1, v37
; CHECK-NEXT: v_cmp_eq_u32_e64 s[12:13], 1, v32
; CHECK-NEXT: v_cmp_eq_u32_e64 s[16:17], 1, v33
-; CHECK-NEXT: v_cmp_eq_u32_e64 s[40:41], 1, v27
-; CHECK-NEXT: v_cmp_eq_u32_e64 s[22:23], 1, v26
+; CHECK-NEXT: v_cmp_eq_u32_e64 s[44:45], 1, v30
+; CHECK-NEXT: s_waitcnt vmcnt(1)
+; CHECK-NEXT: v_and_b32_e32 v21, 1, v21
; CHECK-NEXT: v_cmp_eq_u32_e64 s[42:43], 1, v29
-; CHECK-NEXT: v_cmp_eq_u32_e64 s[20:21], 1, v30
-; CHECK-NEXT: v_cmp_eq_u32_e64 s[26:27], 1, v25
; CHECK-NEXT: v_cmp_eq_u32_e64 s[28:29], 1, v21
+; CHECK-NEXT: v_cmp_eq_u32_e64 s[22:23], 1, v26
+; CHECK-NEXT: v_and_b32_e32 v24, 1, v24
+; CHECK-NEXT: v_cmp_eq_u32_e64 s[26:27], 1, v24
; CHECK-NEXT: v_and_b32_e32 v22, 1, v22
; CHECK-NEXT: v_and_b32_e32 v34, 1, v34
; CHECK-NEXT: v_and_b32_e32 v35, 1, v35
@@ -187,127 +184,123 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:388
; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:384
; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:380
+; CHECK-NEXT: v_and_b32_e32 v27, 1, v27
+; CHECK-NEXT: v_and_b32_e32 v25, 1, v25
; CHECK-NEXT: v_and_b32_e32 v23, 1, v23
+; CHECK-NEXT: v_cmp_eq_u32_e64 s[40:41], 1, v27
+; CHECK-NEXT: v_cmp_eq_u32_e64 s[20:21], 1, v25
; CHECK-NEXT: v_cmp_eq_u32_e64 s[24:25], 1, v23
; CHECK-NEXT: s_waitcnt vmcnt(7)
; CHECK-NEXT: v_and_b32_e32 v2, 1, v19
; CHECK-NEXT: v_cmp_ne_u32_e64 s[46:47], 1, v2
-; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:312
-; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:308
-; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:304
-; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:300
-; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:296
-; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:292
-; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:288
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284
-; CHECK-NEXT: s_waitcnt vmcnt(12)
+; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:312
+; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:308
+; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:304
+; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:300
+; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:296
+; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:292
+; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:288
+; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:284
+; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:280
+; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:276
+; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:272
+; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:268
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264
+; CHECK-NEXT: s_waitcnt vmcnt(17)
; CHECK-NEXT: v_cmp_lt_i32_e64 s[38:39], 2, v22
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276
-; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:892 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:896 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:920 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:932 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:936 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:924 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:928 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:976 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:980 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1096 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:220
+; CHECK-NEXT: s_nop 0
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:940 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:208
-; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:204
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:944 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:208
; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:964 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:984 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:948 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:988 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:952 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1004 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:976 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1012 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:980 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:992 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:968 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:996 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:972 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1024 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:992 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1028 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1000 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1016 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:984 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1020 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:988 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1040 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1012 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1048 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1020 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1044 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:148
-; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1016 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:996 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1008 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1000 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1004 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:712
; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584
; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580
@@ -316,17 +309,17 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568
; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564
; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:560
-; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:556
+; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:556
; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:552
; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:548
; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:544
-; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:540
+; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:540
; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:536
; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:532
; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:528
; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:524
-; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:456
-; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8
+; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:456
+; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:8
; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4
; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32
; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:708
@@ -335,65 +328,82 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:696
; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:692
; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:688
-; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:684
+; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:684
; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:452
; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:448
; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:444
; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:436
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1052 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1064 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1056 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1068 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:432
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1032 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1056 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1036 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1060 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:428
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:968 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1048 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:972 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1052 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:424
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:912 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1040 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:916 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1044 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:420
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1032 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:908 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1036 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:416
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1024 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
-; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:412
-; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:408
-; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:404
-; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:400
-; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:680
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1028 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:412
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:956 ; 4-byte Folded Spill
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:960 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:408
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:900 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:676
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:904 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:404
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:884 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:888 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:400
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:876 ; 4-byte Folded Spill
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:880 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:680
+; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676
; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:672
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:668
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
; CHECK-NEXT: buffer_load_dword a4, off, s[0:3], s32 offset:664
; CHECK-NEXT: buffer_load_dword a2, off, s[0:3], s32 offset:660
; CHECK-NEXT: buffer_load_dword a0, off, s[0:3], s32 offset:656
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:652
-; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:396
+; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:396
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
; CHECK-NEXT: s_and_saveexec_b64 s[48:49], s[38:39]
; CHECK-NEXT: s_xor_b64 s[48:49], exec, s[48:49]
; CHECK-NEXT: s_cbranch_execz .LBB0_4
@@ -405,22 +415,21 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_cbranch_execz .LBB0_3
; CHECK-NEXT: ; %bb.2: ; %bb2
; CHECK-NEXT: v_xor_b32_e32 v22, v28, v28
-; CHECK-NEXT: v_xor_b32_e32 v16, v2, v9
-; CHECK-NEXT: v_accvgpr_write_b32 a1, v17
+; CHECK-NEXT: v_xor_b32_e32 v24, v2, v9
; CHECK-NEXT: v_xor_b32_e32 v13, v3, v8
-; CHECK-NEXT: v_and_b32_e32 v17, 0x7fffffff, v22
+; CHECK-NEXT: v_and_b32_e32 v25, 0x7fffffff, v22
; CHECK-NEXT: v_lshlrev_b32_e32 v22, 17, v13
-; CHECK-NEXT: v_lshrrev_b64 v[8:9], 14, v[16:17]
+; CHECK-NEXT: v_lshrrev_b64 v[8:9], 14, v[24:25]
; CHECK-NEXT: v_xor_b32_e32 v23, v26, v26
; CHECK-NEXT: v_or_b32_e32 v9, v9, v22
; CHECK-NEXT: v_xor_b32_e32 v22, v32, v7
; CHECK-NEXT: v_and_b32_e32 v23, 0x7fffffff, v23
; CHECK-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
-; CHECK-NEXT: v_lshlrev_b32_e32 v16, 18, v16
+; CHECK-NEXT: v_lshlrev_b32_e32 v24, 18, v24
; CHECK-NEXT: v_accvgpr_write_b32 a10, v6
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 13, v[22:23]
; CHECK-NEXT: v_writelane_b32 v62, s36, 0
-; CHECK-NEXT: v_or_b32_e32 v7, v7, v16
+; CHECK-NEXT: v_or_b32_e32 v7, v7, v24
; CHECK-NEXT: v_writelane_b32 v62, s37, 1
; CHECK-NEXT: s_mov_b64 s[36:37], s[34:35]
; CHECK-NEXT: s_mov_b64 s[34:35], s[30:31]
@@ -454,60 +463,54 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_mov_b64 s[8:9], s[6:7]
; CHECK-NEXT: s_mov_b64 s[6:7], s[4:5]
; CHECK-NEXT: s_mov_b64 s[4:5], s[38:39]
-; CHECK-NEXT: v_add_co_u32_e64 v16, s[38:39], 24, v34
-; CHECK-NEXT: v_addc_co_u32_e64 v17, s[38:39], 0, v35, s[38:39]
-; CHECK-NEXT: flat_store_dwordx4 v[16:17], v[6:9] offset:80
-; CHECK-NEXT: v_accvgpr_write_b32 a3, v58
+; CHECK-NEXT: v_add_co_u32_e64 v24, s[38:39], 24, v34
+; CHECK-NEXT: v_addc_co_u32_e64 v25, s[38:39], 0, v35, s[38:39]
+; CHECK-NEXT: flat_store_dwordx4 v[24:25], v[6:9] offset:80
+; CHECK-NEXT: v_mov_b32_e32 v27, v60
; CHECK-NEXT: v_xor_b32_e32 v7, v24, v24
; CHECK-NEXT: v_xor_b32_e32 v8, v54, v39
; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v7
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 19, v22
-; CHECK-NEXT: v_accvgpr_write_b32 a5, v59
-; CHECK-NEXT: v_lshrrev_b64 v[58:59], 12, v[8:9]
-; CHECK-NEXT: v_or_b32_e32 v59, v59, v7
+; CHECK-NEXT: v_accvgpr_write_b32 a1, v61
+; CHECK-NEXT: v_lshrrev_b64 v[60:61], 12, v[8:9]
+; CHECK-NEXT: v_or_b32_e32 v61, v61, v7
; CHECK-NEXT: v_xor_b32_e32 v7, v22, v22
; CHECK-NEXT: v_xor_b32_e32 v22, v52, v37
; CHECK-NEXT: v_and_b32_e32 v23, 0x7fffffff, v7
-; CHECK-NEXT: v_accvgpr_read_b32 v6, a10
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 20, v8
-; CHECK-NEXT: v_accvgpr_write_b32 a10, v56
-; CHECK-NEXT: v_mov_b32_e32 v39, v57
-; CHECK-NEXT: v_lshrrev_b64 v[56:57], 11, v[22:23]
-; CHECK-NEXT: v_or_b32_e32 v57, v57, v7
+; CHECK-NEXT: v_mov_b32_e32 v37, v58
+; CHECK-NEXT: v_mov_b32_e32 v39, v59
+; CHECK-NEXT: v_lshrrev_b64 v[58:59], 11, v[22:23]
+; CHECK-NEXT: v_or_b32_e32 v59, v59, v7
; CHECK-NEXT: v_xor_b32_e32 v7, v20, v20
; CHECK-NEXT: v_xor_b32_e32 v8, v50, v33
; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v7
-; CHECK-NEXT: flat_store_dwordx4 v[16:17], v[56:59] offset:64
+; CHECK-NEXT: flat_store_dwordx4 v[24:25], v[58:61] offset:64
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 21, v22
-; CHECK-NEXT: v_lshrrev_b64 v[58:59], 10, v[8:9]
-; CHECK-NEXT: v_or_b32_e32 v59, v59, v7
+; CHECK-NEXT: v_lshrrev_b64 v[60:61], 10, v[8:9]
+; CHECK-NEXT: v_or_b32_e32 v61, v61, v7
; CHECK-NEXT: v_xor_b32_e32 v7, v18, v18
+; CHECK-NEXT: v_xor_b32_e32 v22, v48, v12
; CHECK-NEXT: v_and_b32_e32 v23, 0x7fffffff, v7
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 22, v8
-; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
-; CHECK-NEXT: v_xor_b32_e32 v22, v48, v12
-; CHECK-NEXT: v_lshrrev_b64 v[56:57], 9, v[22:23]
-; CHECK-NEXT: v_or_b32_e32 v57, v57, v7
+; CHECK-NEXT: v_lshrrev_b64 v[58:59], 9, v[22:23]
+; CHECK-NEXT: v_or_b32_e32 v59, v59, v7
; CHECK-NEXT: v_xor_b32_e32 v7, v12, v12
; CHECK-NEXT: v_xor_b32_e32 v12, v38, v11
-; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_xor_b32_e32 v8, v26, v10
; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v7
-; CHECK-NEXT: flat_store_dwordx4 v[16:17], v[56:59] offset:48
+; CHECK-NEXT: flat_store_dwordx4 v[24:25], v[58:61] offset:48
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 25, v12
-; CHECK-NEXT: s_movk_i32 s38, 0x7c
-; CHECK-NEXT: v_accvgpr_read_b32 v36, a4
-; CHECK-NEXT: s_xor_b64 s[52:53], exec, -1
-; CHECK-NEXT: v_xor_b32_e32 v8, v8, v10
-; CHECK-NEXT: v_lshrrev_b64 v[58:59], 6, v[8:9]
-; CHECK-NEXT: v_or_b32_e32 v59, v59, v7
+; CHECK-NEXT: v_lshrrev_b64 v[60:61], 6, v[8:9]
+; CHECK-NEXT: v_or_b32_e32 v61, v61, v7
; CHECK-NEXT: v_xor_b32_e32 v7, v10, v10
; CHECK-NEXT: v_xor_b32_e32 v10, v14, v21
; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v7
+; CHECK-NEXT: s_movk_i32 s38, 0x7c
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 26, v8
-; CHECK-NEXT: v_lshrrev_b64 v[56:57], 5, v[10:11]
+; CHECK-NEXT: v_lshrrev_b64 v[58:59], 5, v[10:11]
; CHECK-NEXT: v_add_co_u32_e64 v8, s[38:39], s38, v34
-; CHECK-NEXT: v_or_b32_e32 v57, v57, v7
+; CHECK-NEXT: v_or_b32_e32 v59, v59, v7
; CHECK-NEXT: v_xor_b32_e32 v7, v30, v30
; CHECK-NEXT: v_addc_co_u32_e64 v9, s[38:39], 0, v35, s[38:39]
; CHECK-NEXT: v_lshrrev_b32_e32 v21, 15, v7
@@ -518,32 +521,34 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_addc_co_u32_e64 v9, s[38:39], 0, v35, s[38:39]
; CHECK-NEXT: flat_store_dword v[8:9], v7
; CHECK-NEXT: v_xor_b32_e32 v7, v16, v16
-; CHECK-NEXT: flat_store_dwordx4 v[16:17], v[56:59] offset:16
+; CHECK-NEXT: flat_store_dwordx4 v[24:25], v[58:61] offset:16
; CHECK-NEXT: v_xor_b32_e32 v9, v14, v14
-; CHECK-NEXT: v_xor_b32_e32 v56, v26, v25
-; CHECK-NEXT: v_and_b32_e32 v57, 0x7fffffff, v7
+; CHECK-NEXT: v_xor_b32_e32 v58, v36, v17
+; CHECK-NEXT: v_and_b32_e32 v59, 0x7fffffff, v7
; CHECK-NEXT: v_lshlrev_b32_e32 v7, 23, v22
-; CHECK-NEXT: v_lshrrev_b64 v[22:23], 8, v[56:57]
+; CHECK-NEXT: v_lshrrev_b64 v[22:23], 8, v[58:59]
; CHECK-NEXT: v_or_b32_e32 v23, v23, v7
; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[22:23] offset:64
; CHECK-NEXT: v_accvgpr_read_b32 v22, a2
+; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v9
; CHECK-NEXT: v_xor_b32_e32 v22, v22, v15
-; CHECK-NEXT: v_lshlrev_b32_e32 v15, 24, v56
-; CHECK-NEXT: v_xor_b32_e32 v56, v36, v29
-; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
+; CHECK-NEXT: v_lshlrev_b32_e32 v15, 24, v58
+; CHECK-NEXT: v_lshrrev_b64 v[60:61], 7, v[12:13]
+; CHECK-NEXT: v_or_b32_e32 v61, v61, v15
+; CHECK-NEXT: flat_store_dwordx2 v[24:25], v[60:61] offset:32
+; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
; CHECK-NEXT: v_accvgpr_read_b32 v8, a0
-; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v9
; CHECK-NEXT: v_xor_b32_e32 v8, v8, v19
-; CHECK-NEXT: v_lshrrev_b64 v[58:59], 7, v[12:13]
-; CHECK-NEXT: v_or_b32_e32 v59, v59, v15
; CHECK-NEXT: v_xor_b32_e32 v15, v8, v8
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_and_b32_e32 v37, 0x7fffffff, v15
+; CHECK-NEXT: v_accvgpr_read_b32 v6, a10
+; CHECK-NEXT: v_and_b32_e32 v17, 0x7fffffff, v15
; CHECK-NEXT: v_xor_b32_e32 v9, v6, v6
-; CHECK-NEXT: flat_store_dwordx2 v[16:17], v[58:59] offset:32
+; CHECK-NEXT: v_accvgpr_read_b32 v58, a4
; CHECK-NEXT: v_lshlrev_b32_e32 v11, 27, v10
-; CHECK-NEXT: v_and_b32_e32 v57, 0x7fffffff, v9
+; CHECK-NEXT: v_xor_b32_e32 v58, v58, v29
+; CHECK-NEXT: v_and_b32_e32 v59, 0x7fffffff, v9
; CHECK-NEXT: v_xor_b32_e32 v7, v4, v4
; CHECK-NEXT: v_xor_b32_e32 v10, v4, v5
; CHECK-NEXT: v_xor_b32_e32 v21, v2, v2
@@ -585,29 +590,30 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_mov_b64 s[34:35], s[36:37]
; CHECK-NEXT: v_readlane_b32 s36, v62, 0
; CHECK-NEXT: v_readlane_b32 s37, v62, 1
-; CHECK-NEXT: v_xor_b32_e32 v36, v36, v27
-; CHECK-NEXT: v_lshrrev_b64 v[58:59], 4, v[36:37]
-; CHECK-NEXT: v_or_b32_e32 v59, v59, v11
-; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[58:59] offset:32
-; CHECK-NEXT: v_lshrrev_b64 v[58:59], 3, v[56:57]
-; CHECK-NEXT: v_lshlrev_b32_e32 v5, 28, v36
-; CHECK-NEXT: v_or_b32_e32 v59, v59, v5
+; CHECK-NEXT: s_xor_b64 s[52:53], exec, -1
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_xor_b32_e32 v16, v60, v16
+; CHECK-NEXT: v_lshrrev_b64 v[60:61], 4, v[16:17]
+; CHECK-NEXT: v_or_b32_e32 v61, v61, v11
+; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[60:61] offset:32
+; CHECK-NEXT: v_lshrrev_b64 v[60:61], 3, v[58:59]
+; CHECK-NEXT: v_lshlrev_b32_e32 v5, 28, v16
+; CHECK-NEXT: v_or_b32_e32 v61, v61, v5
; CHECK-NEXT: v_lshlrev_b32_e32 v11, 31, v8
-; CHECK-NEXT: flat_store_dwordx2 v[16:17], v[58:59]
-; CHECK-NEXT: v_lshrrev_b64 v[16:17], 2, v[22:23]
-; CHECK-NEXT: v_lshlrev_b32_e32 v5, 29, v56
+; CHECK-NEXT: flat_store_dwordx2 v[24:25], v[60:61]
+; CHECK-NEXT: v_lshrrev_b64 v[24:25], 2, v[22:23]
+; CHECK-NEXT: v_lshlrev_b32_e32 v5, 29, v58
; CHECK-NEXT: v_or_b32_e32 v11, v13, v11
-; CHECK-NEXT: v_or_b32_e32 v17, v17, v5
+; CHECK-NEXT: v_or_b32_e32 v25, v25, v5
; CHECK-NEXT: v_lshrrev_b64 v[12:13], 1, v[8:9]
; CHECK-NEXT: v_lshlrev_b32_e32 v5, 30, v22
; CHECK-NEXT: v_or_b32_e32 v13, v13, v5
-; CHECK-NEXT: v_mov_b32_e32 v57, v39
-; CHECK-NEXT: v_accvgpr_read_b32 v59, a5
-; CHECK-NEXT: v_accvgpr_read_b32 v58, a3
-; CHECK-NEXT: v_accvgpr_read_b32 v56, a10
-; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[16:17] offset:16
+; CHECK-NEXT: v_mov_b32_e32 v59, v39
+; CHECK-NEXT: v_accvgpr_read_b32 v61, a1
+; CHECK-NEXT: v_mov_b32_e32 v60, v27
+; CHECK-NEXT: v_mov_b32_e32 v58, v37
+; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[24:25] offset:16
; CHECK-NEXT: flat_store_dwordx4 v[34:35], v[10:13]
-; CHECK-NEXT: v_accvgpr_read_b32 v17, a1
; CHECK-NEXT: .LBB0_3: ; %Flow52
; CHECK-NEXT: s_or_b64 exec, exec, s[38:39]
; CHECK-NEXT: s_and_b64 s[52:53], s[52:53], exec
@@ -637,25 +643,25 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: .LBB0_10: ; %else
; CHECK-NEXT: s_or_b64 exec, exec, s[52:53]
; CHECK-NEXT: s_mov_b64 s[36:37], exec
-; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:1100 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:1104 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:1092 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:1096 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1060 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1064 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1084 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1088 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1068 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1072 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1076 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1080 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:1124 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:1128 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:1116 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:1120 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1072 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1076 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1108 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1112 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1080 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1084 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1088 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1092 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1100 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1104 ; 4-byte Folded Reload
; CHECK-NEXT: s_and_b64 s[34:35], s[36:37], s[34:35]
; CHECK-NEXT: v_accvgpr_read_b32 v2, a8
; CHECK-NEXT: v_accvgpr_read_b32 v3, a9
-; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_accvgpr_read_b32 v4, a6
; CHECK-NEXT: v_accvgpr_read_b32 v5, a7
-; CHECK-NEXT: v_pk_mov_b32 v[36:37], v[24:25], v[24:25] op_sel:[0,1]
; CHECK-NEXT: s_mov_b64 exec, s[34:35]
; CHECK-NEXT: s_cbranch_execz .LBB0_12
; CHECK-NEXT: ; %bb.11: ; %cond.load1
@@ -665,6 +671,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_and_saveexec_b64 s[34:35], s[30:31]
; CHECK-NEXT: s_cbranch_execz .LBB0_14
; CHECK-NEXT: ; %bb.13: ; %cond.load4
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[38:39], v[0:1] offset:16
; CHECK-NEXT: .LBB0_14: ; %else5
; CHECK-NEXT: s_or_b64 exec, exec, s[34:35]
@@ -677,6 +684,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_and_saveexec_b64 s[94:95], s[92:93]
; CHECK-NEXT: s_cbranch_execz .LBB0_18
; CHECK-NEXT: ; %bb.17: ; %cond.load10
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[32:33], v[0:1] offset:32
; CHECK-NEXT: .LBB0_18: ; %else11
; CHECK-NEXT: s_or_b64 exec, exec, s[94:95]
@@ -689,24 +697,28 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_and_saveexec_b64 s[90:91], s[88:89]
; CHECK-NEXT: s_cbranch_execz .LBB0_22
; CHECK-NEXT: ; %bb.21: ; %cond.load16
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[36:37], v[0:1] offset:48
; CHECK-NEXT: .LBB0_22: ; %else17
; CHECK-NEXT: s_or_b64 exec, exec, s[90:91]
; CHECK-NEXT: s_and_saveexec_b64 s[88:89], s[78:79]
; CHECK-NEXT: s_cbranch_execz .LBB0_24
; CHECK-NEXT: ; %bb.23: ; %cond.load19
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[10:11], v[0:1] offset:56
; CHECK-NEXT: .LBB0_24: ; %else20
; CHECK-NEXT: s_or_b64 exec, exec, s[88:89]
; CHECK-NEXT: s_and_saveexec_b64 s[78:79], s[76:77]
; CHECK-NEXT: s_cbranch_execz .LBB0_26
; CHECK-NEXT: ; %bb.25: ; %cond.load22
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[26:27], v[0:1] offset:64
; CHECK-NEXT: .LBB0_26: ; %else23
; CHECK-NEXT: s_or_b64 exec, exec, s[78:79]
; CHECK-NEXT: s_and_saveexec_b64 s[76:77], s[74:75]
; CHECK-NEXT: s_cbranch_execz .LBB0_28
; CHECK-NEXT: ; %bb.27: ; %cond.load25
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[12:13], v[0:1] offset:72
; CHECK-NEXT: .LBB0_28: ; %else26
; CHECK-NEXT: s_or_b64 exec, exec, s[76:77]
@@ -719,6 +731,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_and_saveexec_b64 s[72:73], s[62:63]
; CHECK-NEXT: s_cbranch_execz .LBB0_32
; CHECK-NEXT: ; %bb.31: ; %cond.load31
+; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: flat_load_dwordx2 v[14:15], v[0:1] offset:88
; CHECK-NEXT: .LBB0_32: ; %else32
; CHECK-NEXT: s_or_b64 exec, exec, s[72:73]
@@ -727,9 +740,9 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: ; %bb.33: ; %cond.load34
; CHECK-NEXT: flat_load_dwordx2 v[8:9], v[0:1] offset:96
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:868 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:872 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
; CHECK-NEXT: .LBB0_34: ; %else35
; CHECK-NEXT: s_or_b64 exec, exec, s[62:63]
; CHECK-NEXT: s_and_saveexec_b64 s[60:61], s[58:59]
@@ -747,37 +760,35 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_and_saveexec_b64 s[56:57], vcc
; CHECK-NEXT: s_cbranch_execz .LBB0_40
; CHECK-NEXT: ; %bb.39: ; %cond.load43
-; CHECK-NEXT: flat_load_dwordx2 v[60:61], v[0:1] offset:120
+; CHECK-NEXT: flat_load_dwordx2 v[56:57], v[0:1] offset:120
; CHECK-NEXT: .LBB0_40: ; %else44
; CHECK-NEXT: s_or_b64 exec, exec, s[56:57]
+; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v34
; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; CHECK-NEXT: v_lshrrev_b32_e32 v8, 15, v61
+; CHECK-NEXT: v_lshrrev_b32_e32 v8, 15, v57
; CHECK-NEXT: flat_store_short v[0:1], v8
; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v34
-; CHECK-NEXT: v_alignbit_b32 v8, v61, v60, 15
+; CHECK-NEXT: v_alignbit_b32 v8, v57, v56, 15
; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
+; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7
; CHECK-NEXT: flat_store_dword v[0:1], v8
; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v20
; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v19
; CHECK-NEXT: v_and_b32_e32 v47, 0x7fffffff, v47
-; CHECK-NEXT: v_or_b32_e32 v19, v1, v0
-; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v60
-; CHECK-NEXT: v_lshrrev_b64 v[24:25], 14, v[46:47]
-; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7
-; CHECK-NEXT: v_or_b32_e32 v25, v25, v0
-; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v34
; CHECK-NEXT: v_lshlrev_b32_e32 v8, 18, v46
; CHECK-NEXT: v_lshrrev_b64 v[22:23], 13, v[6:7]
-; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
+; CHECK-NEXT: v_or_b32_e32 v19, v1, v0
+; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v56
+; CHECK-NEXT: v_lshrrev_b64 v[24:25], 14, v[46:47]
; CHECK-NEXT: v_or_b32_e32 v23, v23, v8
-; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[22:25] offset:80
-; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
-; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 19, v6
; CHECK-NEXT: v_and_b32_e32 v15, 0x7fffffff, v15
+; CHECK-NEXT: v_or_b32_e32 v25, v25, v0
+; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v34
+; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
; CHECK-NEXT: v_and_b32_e32 v29, 0x7fffffff, v29
; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v13
; CHECK-NEXT: v_and_b32_e32 v27, 0x7fffffff, v27
@@ -787,6 +798,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_and_b32_e32 v33, 0x7fffffff, v33
; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; CHECK-NEXT: v_and_b32_e32 v39, 0x7fffffff, v39
+; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[22:25] offset:80
; CHECK-NEXT: v_and_b32_e32 v21, 0x7fffffff, v21
; CHECK-NEXT: v_lshrrev_b64 v[20:21], 1, v[20:21]
; CHECK-NEXT: ; implicit-def: $vgpr54
@@ -796,11 +808,10 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: ; implicit-def: $agpr4
; CHECK-NEXT: ; implicit-def: $agpr2
; CHECK-NEXT: ; implicit-def: $agpr0
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_lshlrev_b32_e32 v16, 20, v22
-; CHECK-NEXT: v_and_b32_e32 v23, 0x7fffffff, v23
-; CHECK-NEXT: v_lshrrev_b64 v[8:9], 12, v[22:23]
+; CHECK-NEXT: v_and_b32_e32 v17, 0x7fffffff, v17
+; CHECK-NEXT: v_lshrrev_b64 v[8:9], 12, v[16:17]
; CHECK-NEXT: v_or_b32_e32 v9, v9, v6
+; CHECK-NEXT: v_lshlrev_b32_e32 v16, 20, v16
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 11, v[14:15]
; CHECK-NEXT: v_or_b32_e32 v7, v7, v16
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[6:9] offset:64
@@ -812,6 +823,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 9, v[12:13]
; CHECK-NEXT: v_or_b32_e32 v7, v7, v14
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[6:9] offset:48
+; CHECK-NEXT: ; implicit-def: $vgpr14
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: v_lshlrev_b32_e32 v8, 23, v12
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 8, v[26:27]
@@ -828,6 +840,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 5, v[4:5]
; CHECK-NEXT: v_or_b32_e32 v7, v7, v10
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[6:9] offset:16
+; CHECK-NEXT: ; implicit-def: $vgpr36
; CHECK-NEXT: ; implicit-def: $vgpr26
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 27, v4
@@ -850,14 +863,9 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: ; implicit-def: $vgpr2
; CHECK-NEXT: ; implicit-def: $vgpr32
; CHECK-NEXT: ; implicit-def: $vgpr38
-; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:864 ; 4-byte Folded Spill
-; CHECK-NEXT: ; implicit-def: $vgpr14
-; CHECK-NEXT: ; implicit-def: $vgpr0
-; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill
-; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill
+; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill
; CHECK-NEXT: ; implicit-def: $vgpr4
; CHECK-NEXT: .LBB0_41: ; %Flow
; CHECK-NEXT: s_andn2_saveexec_b64 s[56:57], s[50:51]
@@ -870,7 +878,6 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v34
; CHECK-NEXT: v_alignbit_b32 v5, v30, v3, 15
; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
-; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_accvgpr_read_b32 v10, a0
; CHECK-NEXT: flat_store_dword v[0:1], v5
; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v10
@@ -911,31 +918,28 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_lshlrev_b32_e32 v2, 22, v50
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 9, v[48:49]
; CHECK-NEXT: v_or_b32_e32 v7, v7, v2
-; CHECK-NEXT: v_and_b32_e32 v27, 0x7fffffff, v16
+; CHECK-NEXT: v_and_b32_e32 v37, 0x7fffffff, v16
; CHECK-NEXT: v_mov_b32_e32 v49, v3
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[6:9] offset:48
-; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[26:27]
+; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[36:37]
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 23, v48
; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
; CHECK-NEXT: v_and_b32_e32 v39, 0x7fffffff, v14
; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[2:3] offset:64
-; CHECK-NEXT: v_lshlrev_b32_e32 v6, 24, v26
+; CHECK-NEXT: v_lshlrev_b32_e32 v6, 24, v36
; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[38:39]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
-; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v12
+; CHECK-NEXT: v_and_b32_e32 v27, 0x7fffffff, v12
; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] offset:32
; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v38
+; CHECK-NEXT: v_lshrrev_b64 v[8:9], 6, v[26:27]
; CHECK-NEXT: v_and_b32_e32 v15, 0x7fffffff, v10
-; CHECK-NEXT: v_lshrrev_b64 v[8:9], 6, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v9, v9, v2
-; CHECK-NEXT: v_lshlrev_b32_e32 v2, 26, v6
+; CHECK-NEXT: v_lshlrev_b32_e32 v2, 26, v26
; CHECK-NEXT: v_lshrrev_b64 v[6:7], 5, v[14:15]
; CHECK-NEXT: v_or_b32_e32 v7, v7, v2
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[6:9] offset:16
; CHECK-NEXT: s_nop 0
@@ -975,110 +979,118 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_xor_b64 s[46:47], exec, s[58:59]
; CHECK-NEXT: s_cbranch_execz .LBB0_47
; CHECK-NEXT: ; %bb.46: ; %bb1b
+; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v34
; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v30
; CHECK-NEXT: flat_store_short v[0:1], v2
; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v34
-; CHECK-NEXT: v_alignbit_b32 v2, v30, v41, 15
+; CHECK-NEXT: v_alignbit_b32 v2, v30, v45, 15
; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
-; CHECK-NEXT: v_accvgpr_read_b32 v10, a14
; CHECK-NEXT: flat_store_dword v[0:1], v2
-; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v10
-; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v0
-; CHECK-NEXT: v_and_b32_e32 v45, 0x7fffffff, v28
-; CHECK-NEXT: v_or_b32_e32 v9, v1, v0
-; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v41
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_lshrrev_b64 v[4:5], 14, v[44:45]
+; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:864 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:868 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:872 ; 4-byte Folded Reload
; CHECK-NEXT: v_and_b32_e32 v43, 0x7fffffff, v26
-; CHECK-NEXT: v_or_b32_e32 v5, v5, v0
-; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v34
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 18, v44
; CHECK-NEXT: v_lshrrev_b64 v[2:3], 13, v[42:43]
-; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
; CHECK-NEXT: v_and_b32_e32 v41, 0x7fffffff, v24
-; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:80
; CHECK-NEXT: v_and_b32_e32 v31, 0x7fffffff, v22
-; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v42
-; CHECK-NEXT: v_lshrrev_b64 v[4:5], 12, v[40:41]
-; CHECK-NEXT: v_or_b32_e32 v5, v5, v2
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 20, v40
-; CHECK-NEXT: v_lshrrev_b64 v[2:3], 11, v[30:31]
-; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
-; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:64
-; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:1052 ; 4-byte Folded Reload
-; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:1056 ; 4-byte Folded Reload
; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v20
-; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v30
-; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v18
-; CHECK-NEXT: v_accvgpr_read_b32 v8, a12
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v18
; CHECK-NEXT: ; implicit-def: $vgpr49
; CHECK-NEXT: ; implicit-def: $vgpr51
; CHECK-NEXT: ; implicit-def: $vgpr53
; CHECK-NEXT: ; implicit-def: $vgpr55
-; CHECK-NEXT: ; implicit-def: $vgpr17
-; CHECK-NEXT: ; implicit-def: $vgpr56
-; CHECK-NEXT: ; implicit-def: $vgpr59
-; CHECK-NEXT: ; implicit-def: $agpr7
-; CHECK-NEXT: ; implicit-def: $vgpr57
; CHECK-NEXT: ; implicit-def: $vgpr58
+; CHECK-NEXT: ; implicit-def: $vgpr61
+; CHECK-NEXT: ; implicit-def: $agpr7
+; CHECK-NEXT: ; implicit-def: $vgpr59
+; CHECK-NEXT: ; implicit-def: $vgpr60
; CHECK-NEXT: ; implicit-def: $agpr9
; CHECK-NEXT: ; implicit-def: $agpr11
+; CHECK-NEXT: ; implicit-def: $agpr12
; CHECK-NEXT: ; implicit-def: $agpr13
+; CHECK-NEXT: ; implicit-def: $agpr16
+; CHECK-NEXT: ; implicit-def: $agpr17
+; CHECK-NEXT: ; implicit-def: $agpr14
; CHECK-NEXT: ; implicit-def: $agpr15
+; CHECK-NEXT: ; implicit-def: $agpr18
; CHECK-NEXT: ; implicit-def: $agpr19
; CHECK-NEXT: ; implicit-def: $agpr20
-; CHECK-NEXT: ; implicit-def: $agpr17
-; CHECK-NEXT: ; implicit-def: $agpr18
; CHECK-NEXT: ; implicit-def: $agpr21
; CHECK-NEXT: ; implicit-def: $agpr22
; CHECK-NEXT: ; implicit-def: $agpr23
+; CHECK-NEXT: ; implicit-def: $agpr24
; CHECK-NEXT: ; implicit-def: $agpr25
-; CHECK-NEXT: ; implicit-def: $agpr27
+; CHECK-NEXT: ; implicit-def: $agpr26
; CHECK-NEXT: ; implicit-def: $agpr28
+; CHECK-NEXT: ; implicit-def: $agpr27
; CHECK-NEXT: ; implicit-def: $agpr29
; CHECK-NEXT: ; implicit-def: $agpr30
; CHECK-NEXT: ; implicit-def: $agpr31
-; CHECK-NEXT: ; implicit-def: $vgpr45
-; CHECK-NEXT: ; implicit-def: $vgpr31
; CHECK-NEXT: ; implicit-def: $vgpr43
+; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v12
+; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v0
+; CHECK-NEXT: v_or_b32_e32 v9, v1, v0
+; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v45
+; CHECK-NEXT: v_and_b32_e32 v45, 0x7fffffff, v28
+; CHECK-NEXT: v_lshrrev_b64 v[4:5], 14, v[44:45]
+; CHECK-NEXT: v_or_b32_e32 v5, v5, v0
+; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v34
+; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc
+; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:80
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v42
+; CHECK-NEXT: v_lshrrev_b64 v[4:5], 12, v[40:41]
+; CHECK-NEXT: v_or_b32_e32 v5, v5, v2
+; CHECK-NEXT: v_lshrrev_b64 v[2:3], 11, v[30:31]
+; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
+; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:64
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:1064 ; 4-byte Folded Reload
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:1068 ; 4-byte Folded Reload
+; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v30
+; CHECK-NEXT: ; implicit-def: $vgpr41
+; CHECK-NEXT: ; implicit-def: $vgpr31
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v6, v4
; CHECK-NEXT: v_lshrrev_b64 v[4:5], 10, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v5, v5, v2
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1032 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1036 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1056 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1060 ; 4-byte Folded Reload
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 22, v6
; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v16
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_mov_b32_e32 v12, v2
-; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[12:13]
+; CHECK-NEXT: v_mov_b32_e32 v10, v2
+; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[10:11]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:48
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1048 ; 4-byte Folded Reload
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:972 ; 4-byte Folded Reload
-; CHECK-NEXT: v_lshlrev_b32_e32 v4, 23, v12
-; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v10
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1052 ; 4-byte Folded Reload
+; CHECK-NEXT: v_lshlrev_b32_e32 v4, 23, v10
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v6, v2
; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v4
; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[2:3] offset:64
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1040 ; 4-byte Folded Reload
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1044 ; 4-byte Folded Reload
; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v6
; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v14
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v6, v2
; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v4
-; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:1032 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:1036 ; 4-byte Folded Reload
; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v12
; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] offset:32
; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v6
@@ -1086,36 +1098,48 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_mov_b32_e32 v6, v4
; CHECK-NEXT: v_lshrrev_b64 v[4:5], 6, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v5, v5, v2
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:876 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:880 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1024 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1028 ; 4-byte Folded Reload
; CHECK-NEXT: v_lshlrev_b32_e32 v6, 26, v6
; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v8
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_mov_b32_e32 v12, v2
-; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[12:13]
+; CHECK-NEXT: v_mov_b32_e32 v10, v2
+; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v10
+; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[10:11]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v6
-; CHECK-NEXT: v_accvgpr_read_b32 v6, a26
; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:16
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
; CHECK-NEXT: s_nop 0
-; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v12
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
+; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v10
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_mov_b32_e32 v6, v2
; CHECK-NEXT: v_lshrrev_b64 v[2:3], 4, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v4
+; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[2:3] offset:32
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:904 ; 4-byte Folded Reload
; CHECK-NEXT: v_lshlrev_b32_e32 v4, 28, v6
-; CHECK-NEXT: v_accvgpr_read_b32 v6, a24
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_mov_b32_e32 v6, v2
; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v6
-; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[2:3] offset:32
; CHECK-NEXT: v_lshrrev_b64 v[2:3], 3, v[6:7]
; CHECK-NEXT: v_or_b32_e32 v3, v3, v4
-; CHECK-NEXT: v_accvgpr_read_b32 v4, a16
-; CHECK-NEXT: v_and_b32_e32 v5, 0x7fffffff, v4
; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
+; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
+; CHECK-NEXT: s_nop 0
+; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
; CHECK-NEXT: v_lshlrev_b32_e32 v2, 29, v6
+; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v2
+; CHECK-NEXT: v_lshrrev_b64 v[10:11], 1, v[12:13]
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_mov_b32_e32 v4, v0
+; CHECK-NEXT: v_and_b32_e32 v5, 0x7fffffff, v4
; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[4:5]
; CHECK-NEXT: v_or_b32_e32 v1, v1, v2
-; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v2
; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[0:1] offset:16
; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v4
-; CHECK-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11]
; CHECK-NEXT: v_or_b32_e32 v11, v11, v0
; CHECK-NEXT: ; implicit-def: $vgpr0
; CHECK-NEXT: ; kill: killed $vgpr0
@@ -1174,14 +1198,6 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: ; implicit-def: $vgpr0
; CHECK-NEXT: ; kill: killed $vgpr0
; CHECK-NEXT: ; implicit-def: $vgpr0
-; CHECK-NEXT: ; kill: killed $vgpr0
-; CHECK-NEXT: ; implicit-def: $vgpr0
-; CHECK-NEXT: ; kill: killed $vgpr0
-; CHECK-NEXT: ; implicit-def: $vgpr0
-; CHECK-NEXT: ; kill: killed $vgpr0
-; CHECK-NEXT: ; implicit-def: $vgpr0
-; CHECK-NEXT: ; kill: killed $vgpr0
-; CHECK-NEXT: ; implicit-def: $vgpr0
; CHECK-NEXT: flat_store_dwordx4 v[34:35], v[8:11]
; CHECK-NEXT: ; kill: killed $vgpr0
; CHECK-NEXT: ; implicit-def: $vgpr0
@@ -1191,96 +1207,93 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: s_andn2_saveexec_b64 s[46:47], s[46:47]
; CHECK-NEXT: s_cbranch_execz .LBB0_49
; CHECK-NEXT: ; %bb.48: ; %bb1a
-; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:976 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:980 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:1012 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:1024 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1016 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1020 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:956 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:916 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:936 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:952 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:964 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:968 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:976 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:980 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1000 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1012 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:972 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1020 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1016 ; 4-byte Folded Reload
+; CHECK-NEXT: v_accvgpr_read_b32 v12, a16
+; CHECK-NEXT: v_cndmask_b32_e64 v13, v12, v43, s[18:19]
+; CHECK-NEXT: v_accvgpr_read_b32 v12, a17
+; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:1096 ; 4-byte Folded Reload
; CHECK-NEXT: v_accvgpr_read_b32 v8, a9
-; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1028 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1040 ; 4-byte Folded Reload
-; CHECK-NEXT: v_accvgpr_read_b32 v14, a13
-; CHECK-NEXT: v_accvgpr_read_b32 v12, a19
-; CHECK-NEXT: v_cndmask_b32_e64 v13, v12, v45, s[18:19]
-; CHECK-NEXT: v_accvgpr_read_b32 v12, a20
-; CHECK-NEXT: v_cndmask_b32_e64 v12, v12, v31, s[18:19]
-; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:960 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cndmask_b32_e64 v9, v8, v9, s[16:17]
-; CHECK-NEXT: v_accvgpr_read_b32 v8, a11
-; CHECK-NEXT: v_cndmask_b32_e64 v8, v8, v10, s[16:17]
-; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:944 ; 4-byte Folded Reload
-; CHECK-NEXT: v_cndmask_b32_e64 v5, v59, v4, s[8:9]
+; CHECK-NEXT: v_cndmask_b32_e64 v5, v61, v4, s[8:9]
; CHECK-NEXT: v_accvgpr_read_b32 v4, a7
; CHECK-NEXT: v_cndmask_b32_e64 v4, v4, v6, s[8:9]
-; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:908 ; 4-byte Folded Reload
; CHECK-NEXT: v_cndmask_b32_e64 v1, v53, v0, s[10:11]
-; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:940 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:920 ; 4-byte Folded Reload
+; CHECK-NEXT: v_cndmask_b32_e64 v11, v59, v10, s[12:13]
+; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:928 ; 4-byte Folded Reload
+; CHECK-NEXT: v_cndmask_b32_e64 v12, v12, v14, s[18:19]
+; CHECK-NEXT: v_accvgpr_read_b32 v14, a12
+; CHECK-NEXT: v_cndmask_b32_e64 v3, v49, v2, s[4:5]
+; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
; CHECK-NEXT: v_cndmask_b32_e64 v15, v14, v15, s[14:15]
-; CHECK-NEXT: v_accvgpr_read_b32 v14, a15
+; CHECK-NEXT: v_accvgpr_read_b32 v14, a13
; CHECK-NEXT: v_cndmask_b32_e64 v14, v14, v16, s[14:15]
-; CHECK-NEXT: v_accvgpr_read_b32 v16, a21
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cndmask_b32_e64 v11, v57, v10, s[12:13]
-; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:948 ; 4-byte Folded Reload
-; CHECK-NEXT: v_cndmask_b32_e64 v7, v17, v6, s[6:7]
-; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:1004 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:932 ; 4-byte Folded Reload
-; CHECK-NEXT: v_cndmask_b32_e64 v0, v55, v0, s[10:11]
-; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cndmask_b32_e64 v10, v58, v10, s[12:13]
+; CHECK-NEXT: v_accvgpr_read_b32 v16, a18
; CHECK-NEXT: v_cndmask_b32_e64 v17, v16, v17, s[44:45]
-; CHECK-NEXT: v_accvgpr_read_b32 v16, a22
+; CHECK-NEXT: v_accvgpr_read_b32 v16, a19
; CHECK-NEXT: v_cndmask_b32_e64 v16, v16, v18, s[44:45]
-; CHECK-NEXT: v_accvgpr_read_b32 v18, a17
+; CHECK-NEXT: v_accvgpr_read_b32 v18, a14
; CHECK-NEXT: v_cndmask_b32_e64 v19, v18, v19, s[40:41]
-; CHECK-NEXT: v_accvgpr_read_b32 v18, a18
+; CHECK-NEXT: v_accvgpr_read_b32 v18, a15
; CHECK-NEXT: v_cndmask_b32_e64 v18, v18, v20, s[40:41]
-; CHECK-NEXT: v_accvgpr_read_b32 v20, a27
+; CHECK-NEXT: v_accvgpr_read_b32 v20, a22
; CHECK-NEXT: v_cndmask_b32_e64 v21, v20, v21, s[42:43]
-; CHECK-NEXT: v_accvgpr_read_b32 v20, a28
+; CHECK-NEXT: v_accvgpr_read_b32 v20, a23
; CHECK-NEXT: v_cndmask_b32_e64 v20, v20, v22, s[42:43]
-; CHECK-NEXT: v_accvgpr_read_b32 v22, a23
+; CHECK-NEXT: v_accvgpr_read_b32 v22, a20
; CHECK-NEXT: v_cndmask_b32_e64 v23, v22, v23, s[22:23]
-; CHECK-NEXT: v_accvgpr_read_b32 v22, a25
+; CHECK-NEXT: v_accvgpr_read_b32 v22, a21
; CHECK-NEXT: v_cndmask_b32_e64 v22, v22, v24, s[22:23]
-; CHECK-NEXT: v_accvgpr_read_b32 v24, a31
+; CHECK-NEXT: v_accvgpr_read_b32 v24, a26
; CHECK-NEXT: v_cndmask_b32_e64 v25, v24, v25, s[26:27]
-; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:888 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1048 ; 4-byte Folded Reload
-; CHECK-NEXT: v_cndmask_b32_e64 v6, v56, v6, s[6:7]
-; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_accvgpr_read_b32 v24, a28
; CHECK-NEXT: v_cndmask_b32_e64 v24, v24, v26, s[26:27]
-; CHECK-NEXT: v_accvgpr_read_b32 v26, a29
+; CHECK-NEXT: v_accvgpr_read_b32 v26, a24
; CHECK-NEXT: v_cndmask_b32_e64 v27, v26, v27, s[20:21]
-; CHECK-NEXT: v_accvgpr_read_b32 v26, a30
+; CHECK-NEXT: v_accvgpr_read_b32 v26, a25
; CHECK-NEXT: v_cndmask_b32_e64 v26, v26, v28, s[20:21]
-; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:884 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1044 ; 4-byte Folded Reload
-; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_accvgpr_read_b32 v28, a27
; CHECK-NEXT: v_cndmask_b32_e64 v33, v28, v29, s[24:25]
-; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:892 ; 4-byte Folded Reload
-; CHECK-NEXT: v_cndmask_b32_e64 v3, v49, v2, s[4:5]
-; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:924 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload
+; CHECK-NEXT: v_accvgpr_read_b32 v28, a29
+; CHECK-NEXT: v_cndmask_b32_e64 v9, v8, v9, s[16:17]
+; CHECK-NEXT: v_accvgpr_read_b32 v8, a11
+; CHECK-NEXT: v_cndmask_b32_e64 v8, v8, v31, s[16:17]
; CHECK-NEXT: s_waitcnt vmcnt(0)
-; CHECK-NEXT: v_cndmask_b32_e64 v32, v28, v43, s[24:25]
-; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:896 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1008 ; 4-byte Folded Reload
+; CHECK-NEXT: v_cndmask_b32_e64 v7, v41, v6, s[6:7]
+; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:912 ; 4-byte Folded Reload
+; CHECK-NEXT: v_cndmask_b32_e64 v0, v55, v0, s[10:11]
+; CHECK-NEXT: v_cndmask_b32_e64 v10, v60, v10, s[12:13]
; CHECK-NEXT: v_cndmask_b32_e64 v2, v51, v2, s[4:5]
+; CHECK-NEXT: v_cndmask_b32_e64 v32, v28, v29, s[24:25]
+; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1008 ; 4-byte Folded Reload
+; CHECK-NEXT: v_accvgpr_read_b32 v28, a30
; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: v_cndmask_b32_e64 v6, v58, v6, s[6:7]
; CHECK-NEXT: v_cndmask_b32_e64 v31, v28, v29, s[28:29]
-; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:900 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1000 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1004 ; 4-byte Folded Reload
+; CHECK-NEXT: v_accvgpr_read_b32 v28, a31
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_cndmask_b32_e64 v30, v28, v29, s[28:29]
; CHECK-NEXT: flat_store_dwordx4 v[34:35], v[30:33]
@@ -1311,8 +1324,6 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload
; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload
; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload
; CHECK-NEXT: v_readlane_b32 s30, v63, 16
; CHECK-NEXT: v_readlane_b32 s31, v63, 17
; CHECK-NEXT: v_readlane_b32 s65, v63, 15
@@ -1331,9 +1342,11 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc,
; CHECK-NEXT: v_readlane_b32 s36, v63, 2
; CHECK-NEXT: v_readlane_b32 s35, v63, 1
; CHECK-NEXT: v_readlane_b32 s34, v63, 0
+; CHECK-NEXT: v_accvgpr_read_b32 v41, a5 ; Reload Reuse
+; CHECK-NEXT: v_accvgpr_read_b32 v40, a3 ; Reload Reuse
; CHECK-NEXT: s_or_saveexec_b64 s[4:5], -1
-; CHECK-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:1108 ; 4-byte Folded Reload
-; CHECK-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:1112 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:1132 ; 4-byte Folded Reload
+; CHECK-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:1136 ; 4-byte Folded Reload
; CHECK-NEXT: s_mov_b64 exec, s[4:5]
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/srem64.ll b/llvm/test/CodeGen/AMDGPU/srem64.ll
index d9ec0d00e2aa7..c74e9c2103a62 100644
--- a/llvm/test/CodeGen/AMDGPU/srem64.ll
+++ b/llvm/test/CodeGen/AMDGPU/srem64.ll
@@ -2116,22 +2116,22 @@ define i64 @v_test_srem_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: v_add_i32_e64 v2, s[4:5], 32, v2
; GCN-IR-NEXT: v_ffbh_u32_e32 v3, v1
; GCN-IR-NEXT: v_min_u32_e32 v8, v2, v3
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 48, v8
-; GCN-IR-NEXT: v_subb_u32_e64 v3, s[4:5], 0, 0, s[4:5]
+; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 48, v8
+; GCN-IR-NEXT: v_subb_u32_e64 v5, s[4:5], 0, 0, s[4:5]
; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[2:3]
+; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[4:5]
; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
-; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[2:3]
+; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
-; GCN-IR-NEXT: v_cndmask_b32_e64 v5, v1, 0, s[4:5]
-; GCN-IR-NEXT: v_cndmask_b32_e64 v4, v0, 0, s[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v3, v1, 0, s[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v2, v0, 0, s[4:5]
; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; GCN-IR-NEXT: s_cbranch_execz .LBB13_6
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
-; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v2
-; GCN-IR-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v2
+; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v4
+; GCN-IR-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
+; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[0:1], v2
; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
@@ -2175,11 +2175,11 @@ define i64 @v_test_srem_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: .LBB13_5: ; %Flow4
; GCN-IR-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
-; GCN-IR-NEXT: v_or_b32_e32 v5, v5, v3
-; GCN-IR-NEXT: v_or_b32_e32 v4, v4, v2
+; GCN-IR-NEXT: v_or_b32_e32 v3, v5, v3
+; GCN-IR-NEXT: v_or_b32_e32 v2, v4, v2
; GCN-IR-NEXT: .LBB13_6: ; %Flow5
; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[4:5], 15
+; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 15
; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
; GCN-IR-NEXT: v_xor_b32_e32 v0, v0, v10
@@ -2476,22 +2476,22 @@ define i64 @v_test_srem24_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: v_add_i32_e64 v2, s[4:5], 32, v2
; GCN-IR-NEXT: v_ffbh_u32_e32 v3, v1
; GCN-IR-NEXT: v_min_u32_e32 v8, v2, v3
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 48, v8
-; GCN-IR-NEXT: v_subb_u32_e64 v3, s[4:5], 0, 0, s[4:5]
+; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 48, v8
+; GCN-IR-NEXT: v_subb_u32_e64 v5, s[4:5], 0, 0, s[4:5]
; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[2:3]
+; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[4:5]
; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
-; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[2:3]
+; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
-; GCN-IR-NEXT: v_cndmask_b32_e64 v5, v1, 0, s[4:5]
-; GCN-IR-NEXT: v_cndmask_b32_e64 v4, v0, 0, s[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v3, v1, 0, s[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v2, v0, 0, s[4:5]
; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; GCN-IR-NEXT: s_cbranch_execz .LBB18_6
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
-; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v2
-; GCN-IR-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v2
+; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v4
+; GCN-IR-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
+; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[0:1], v2
; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
@@ -2535,11 +2535,11 @@ define i64 @v_test_srem24_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: .LBB18_5: ; %Flow4
; GCN-IR-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
-; GCN-IR-NEXT: v_or_b32_e32 v5, v5, v3
-; GCN-IR-NEXT: v_or_b32_e32 v4, v4, v2
+; GCN-IR-NEXT: v_or_b32_e32 v3, v5, v3
+; GCN-IR-NEXT: v_or_b32_e32 v2, v4, v2
; GCN-IR-NEXT: .LBB18_6: ; %Flow5
; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[4:5], 15
+; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 15
; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
; GCN-IR-NEXT: v_xor_b32_e32 v0, v0, v10
diff --git a/llvm/test/CodeGen/AMDGPU/urem64.ll b/llvm/test/CodeGen/AMDGPU/urem64.ll
index 4b7f16f6bef51..b2bc59a3cee31 100644
--- a/llvm/test/CodeGen/AMDGPU/urem64.ll
+++ b/llvm/test/CodeGen/AMDGPU/urem64.ll
@@ -1359,22 +1359,22 @@ define i64 @v_test_urem_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: v_add_i32_e64 v2, s[4:5], 32, v2
; GCN-IR-NEXT: v_ffbh_u32_e32 v3, v1
; GCN-IR-NEXT: v_min_u32_e32 v8, v2, v3
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 48, v8
-; GCN-IR-NEXT: v_subb_u32_e64 v3, s[4:5], 0, 0, s[4:5]
+; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 48, v8
+; GCN-IR-NEXT: v_subb_u32_e64 v5, s[4:5], 0, 0, s[4:5]
; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[2:3]
+; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[4:5]
; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
-; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[2:3]
+; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
-; GCN-IR-NEXT: v_cndmask_b32_e64 v5, v1, 0, s[4:5]
-; GCN-IR-NEXT: v_cndmask_b32_e64 v4, v0, 0, s[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v3, v1, 0, s[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v2, v0, 0, s[4:5]
; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; GCN-IR-NEXT: s_cbranch_execz .LBB9_6
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
-; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v2
-; GCN-IR-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v2
+; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v4
+; GCN-IR-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
+; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[0:1], v2
; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
@@ -1418,11 +1418,11 @@ define i64 @v_test_urem_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: .LBB9_5: ; %Flow4
; GCN-IR-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
-; GCN-IR-NEXT: v_or_b32_e32 v5, v5, v3
-; GCN-IR-NEXT: v_or_b32_e32 v4, v4, v2
+; GCN-IR-NEXT: v_or_b32_e32 v3, v5, v3
+; GCN-IR-NEXT: v_or_b32_e32 v2, v4, v2
; GCN-IR-NEXT: .LBB9_6: ; %Flow5
; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[4:5], 15
+; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 15
; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
; GCN-IR-NEXT: s_setpc_b64 s[30:31]
@@ -1683,23 +1683,23 @@ define i64 @v_test_urem24_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: s_flbit_i32_b32 s4, 0
; GCN-IR-NEXT: v_min_u32_e32 v8, s4, v2
; GCN-IR-NEXT: s_mov_b32 s6, 0
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 48, v8
+; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 48, v8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s6
-; GCN-IR-NEXT: v_subb_u32_e64 v3, s[4:5], 0, 0, s[4:5]
+; GCN-IR-NEXT: v_subb_u32_e64 v5, s[4:5], 0, 0, s[4:5]
; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
-; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[2:3]
-; GCN-IR-NEXT: v_mov_b32_e32 v5, s6
+; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[4:5]
+; GCN-IR-NEXT: v_mov_b32_e32 v3, s6
; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
-; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[2:3]
-; GCN-IR-NEXT: v_cndmask_b32_e64 v4, v0, 0, s[4:5]
+; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
+; GCN-IR-NEXT: v_cndmask_b32_e64 v2, v0, 0, s[4:5]
; GCN-IR-NEXT: s_xor_b64 s[4:5], s[4:5], -1
; GCN-IR-NEXT: s_and_b64 s[4:5], s[4:5], vcc
; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
; GCN-IR-NEXT: s_cbranch_execz .LBB14_6
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
-; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v2
-; GCN-IR-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v2
+; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v4
+; GCN-IR-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
+; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[0:1], v2
; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
@@ -1743,11 +1743,11 @@ define i64 @v_test_urem24_pow2_k_den_i64(i64 %x) {
; GCN-IR-NEXT: .LBB14_5: ; %Flow4
; GCN-IR-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-IR-NEXT: v_lshl_b64 v[1:2], v[2:3], 1
-; GCN-IR-NEXT: v_or_b32_e32 v5, v5, v2
-; GCN-IR-NEXT: v_or_b32_e32 v4, v4, v1
+; GCN-IR-NEXT: v_or_b32_e32 v3, v5, v2
+; GCN-IR-NEXT: v_or_b32_e32 v2, v4, v1
; GCN-IR-NEXT: .LBB14_6: ; %Flow5
; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
-; GCN-IR-NEXT: v_lshl_b64 v[1:2], v[4:5], 15
+; GCN-IR-NEXT: v_lshl_b64 v[1:2], v[2:3], 15
; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, 0, v2, vcc
; GCN-IR-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll b/llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
index f4702bc2f8311..0c6fcde1de385 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
@@ -8,10 +8,10 @@ define amdgpu_ps float @else1(i32 %z, float %v) #0 {
; SI-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; SI-NEXT: liveins: $vgpr0, $vgpr1
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr1
- ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, killed [[COPY1]], implicit $exec
- ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF killed [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, [[COPY1]], implicit $exec
+ ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.3
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.Flow:
@@ -19,26 +19,26 @@ define amdgpu_ps float @else1(i32 %z, float %v) #0 {
; SI-NEXT: {{ $}}
; SI-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI undef %9:vgpr_32, %bb.0, %4, %bb.3
; SI-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, undef %14:vgpr_32, %bb.3
- ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE killed [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.2
; SI-NEXT: {{ $}}
; SI-NEXT: bb.2.if:
; SI-NEXT: successors: %bb.4(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, killed [[PHI1]], 0, [[PHI1]], 0, 0, implicit $mode, implicit $exec
+ ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[PHI1]], 0, [[PHI1]], 0, 0, implicit $mode, implicit $exec
; SI-NEXT: S_BRANCH %bb.4
; SI-NEXT: {{ $}}
; SI-NEXT: bb.3.else:
; SI-NEXT: successors: %bb.1(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e64 0, 1077936128, 0, killed [[COPY]], 0, 0, implicit $mode, implicit $exec
+ ; SI-NEXT: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e64 0, 1077936128, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; SI-NEXT: S_BRANCH %bb.1
; SI-NEXT: {{ $}}
; SI-NEXT: bb.4.end:
; SI-NEXT: [[PHI2:%[0-9]+]]:vgpr_32 = PHI [[PHI]], %bb.1, [[V_ADD_F32_e64_]], %bb.2
- ; SI-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; SI-NEXT: $vgpr0 = COPY killed [[PHI2]]
- ; SI-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0
+ ; SI-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: $vgpr0 = COPY [[PHI2]]
+ ; SI-NEXT: SI_RETURN_TO_EPILOG $vgpr0
main_body:
%cc = icmp sgt i32 %z, 5
br i1 %cc, label %if, label %else
@@ -64,23 +64,23 @@ define amdgpu_ps float @else2(i32 %z, float %v) #0 {
; SI-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; SI-NEXT: liveins: $vgpr0, $vgpr1
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr1
- ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, killed [[COPY1]], implicit $exec
- ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF killed [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, [[COPY1]], implicit $exec
+ ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.3
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.Flow:
; SI-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000)
; SI-NEXT: {{ $}}
; SI-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI undef %10:vgpr_32, %bb.0, %4, %bb.3
- ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE killed [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE [[SI_IF]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.2
; SI-NEXT: {{ $}}
; SI-NEXT: bb.2.if:
; SI-NEXT: successors: %bb.4(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, killed [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
+ ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; SI-NEXT: S_BRANCH %bb.4
; SI-NEXT: {{ $}}
; SI-NEXT: bb.3.else:
@@ -92,10 +92,10 @@ define amdgpu_ps float @else2(i32 %z, float %v) #0 {
; SI-NEXT: bb.4.end:
; SI-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.1, [[V_ADD_F32_e64_]], %bb.2
; SI-NEXT: [[PHI2:%[0-9]+]]:vgpr_32 = PHI [[PHI]], %bb.1, [[V_ADD_F32_e64_]], %bb.2
- ; SI-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; SI-NEXT: [[V_ADD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, killed [[PHI1]], 0, killed [[PHI2]], 0, 0, implicit $mode, implicit $exec
- ; SI-NEXT: $vgpr0 = COPY killed [[V_ADD_F32_e64_1]]
- ; SI-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0
+ ; SI-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[V_ADD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[PHI1]], 0, [[PHI2]], 0, 0, implicit $mode, implicit $exec
+ ; SI-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_1]]
+ ; SI-NEXT: SI_RETURN_TO_EPILOG $vgpr0
main_body:
%cc = icmp sgt i32 %z, 5
br i1 %cc, label %if, label %else
@@ -122,11 +122,11 @@ define amdgpu_ps float @else3(i32 %z, float %v, i32 inreg %bound, i32 %x0) #0 {
; SI-NEXT: successors: %bb.1(0x80000000)
; SI-NEXT: liveins: $vgpr0, $vgpr1, $sgpr0, $vgpr2
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr2
- ; SI-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY killed $sgpr0
- ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed $vgpr1
- ; SI-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, killed [[COPY3]], implicit $exec
+ ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; SI-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, [[COPY3]], implicit $exec
; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.for.body:
@@ -143,21 +143,21 @@ define amdgpu_ps float @else3(i32 %z, float %v, i32 inreg %bound, i32 %x0) #0 {
; SI-NEXT: [[PHI2:%[0-9]+]]:vgpr_32 = PHI undef %25:vgpr_32, %bb.1, %10, %bb.4
; SI-NEXT: [[PHI3:%[0-9]+]]:vgpr_32 = PHI undef %26:vgpr_32, %bb.1, %9, %bb.4
; SI-NEXT: [[PHI4:%[0-9]+]]:vgpr_32 = PHI [[PHI1]], %bb.1, undef %32:vgpr_32, %bb.4
- ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE killed [[SI_IF]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE [[SI_IF]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.3
; SI-NEXT: {{ $}}
; SI-NEXT: bb.3.if:
; SI-NEXT: successors: %bb.5(0x80000000)
; SI-NEXT: {{ $}}
; SI-NEXT: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[PHI]], 0, [[COPY2]], 0, 0, implicit $mode, implicit $exec
- ; SI-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 1, killed [[PHI4]], 0, implicit $exec
+ ; SI-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 1, [[PHI4]], 0, implicit $exec
; SI-NEXT: S_BRANCH %bb.5
; SI-NEXT: {{ $}}
; SI-NEXT: bb.4.else:
; SI-NEXT: successors: %bb.2(0x80000000)
; SI-NEXT: {{ $}}
; SI-NEXT: [[V_MUL_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY2]], 0, [[PHI1]], 0, 0, implicit $mode, implicit $exec
- ; SI-NEXT: [[V_LSHL_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_LSHL_ADD_U32_e64 killed [[PHI1]], 1, [[PHI1]], implicit $exec
+ ; SI-NEXT: [[V_LSHL_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_LSHL_ADD_U32_e64 [[PHI1]], 1, [[PHI1]], implicit $exec
; SI-NEXT: S_BRANCH %bb.2
; SI-NEXT: {{ $}}
; SI-NEXT: bb.5.if.end:
@@ -165,17 +165,17 @@ define amdgpu_ps float @else3(i32 %z, float %v, i32 inreg %bound, i32 %x0) #0 {
; SI-NEXT: {{ $}}
; SI-NEXT: [[PHI5:%[0-9]+]]:vgpr_32 = PHI [[PHI3]], %bb.2, [[V_MUL_F32_e64_]], %bb.3
; SI-NEXT: [[PHI6:%[0-9]+]]:vgpr_32 = PHI [[PHI2]], %bb.2, [[V_ADD_U32_e64_]], %bb.3
- ; SI-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 1, [[PHI6]], 0, implicit $exec
- ; SI-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 killed [[PHI]], 1, implicit-def dead $scc
+ ; SI-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI]], 1, implicit-def dead $scc
; SI-NEXT: S_CMP_LT_I32 [[S_ADD_I32_]], [[COPY1]], implicit-def $scc
; SI-NEXT: S_CBRANCH_SCC1 %bb.1, implicit killed $scc
; SI-NEXT: S_BRANCH %bb.6
; SI-NEXT: {{ $}}
; SI-NEXT: bb.6.for.end:
- ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, killed [[PHI6]], 0, killed [[PHI5]], 0, 0, implicit $mode, implicit $exec
- ; SI-NEXT: $vgpr0 = COPY killed [[V_ADD_F32_e64_]]
- ; SI-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0
+ ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[PHI6]], 0, [[PHI5]], 0, 0, implicit $mode, implicit $exec
+ ; SI-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
+ ; SI-NEXT: SI_RETURN_TO_EPILOG $vgpr0
entry:
br label %for.body
@@ -219,14 +219,14 @@ define amdgpu_ps float @loop(i32 %z, float %v, i32 inreg %bound, ptr %extern_fun
; SI-NEXT: successors: %bb.6(0x40000000), %bb.1(0x40000000)
; SI-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr5
- ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr4
- ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed $vgpr3
- ; SI-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed $vgpr2
- ; SI-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY killed $vgpr1
- ; SI-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, killed [[COPY5]], implicit $exec
- ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF killed [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr5
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr4
+ ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+ ; SI-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+ ; SI-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; SI-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, [[COPY5]], implicit $exec
+ ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.6
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.Flow:
@@ -236,13 +236,13 @@ define amdgpu_ps float @loop(i32 %z, float %v, i32 inreg %bound, ptr %extern_fun
; SI-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY4]], %bb.0, undef %50:vgpr_32, %bb.9
; SI-NEXT: [[PHI2:%[0-9]+]]:vgpr_32 = PHI [[COPY3]], %bb.0, undef %52:vgpr_32, %bb.9
; SI-NEXT: [[PHI3:%[0-9]+]]:vgpr_32 = PHI [[COPY2]], %bb.0, undef %54:vgpr_32, %bb.9
- ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE killed [[SI_IF]], %bb.10, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE [[SI_IF]], %bb.10, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.2
; SI-NEXT: {{ $}}
; SI-NEXT: bb.2.if:
; SI-NEXT: successors: %bb.3(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[PHI2]], %subreg.sub0, killed [[PHI3]], %subreg.sub1
+ ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[PHI2]], %subreg.sub0, [[PHI3]], %subreg.sub1
; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_MOV_B32 $exec_lo
; SI-NEXT: [[COPY6:%[0-9]+]]:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
; SI-NEXT: {{ $}}
@@ -254,33 +254,33 @@ define amdgpu_ps float @loop(i32 %z, float %v, i32 inreg %bound, ptr %extern_fun
; SI-NEXT: [[PHI6:%[0-9]+]]:vgpr_32 = PHI undef %58:vgpr_32, %bb.4, [[PHI1]], %bb.2
; SI-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI5]].sub0, implicit $exec
; SI-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI5]].sub1, implicit $exec
- ; SI-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE killed [[V_READFIRSTLANE_B32_]], %subreg.sub0, killed [[V_READFIRSTLANE_B32_1]], %subreg.sub1
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE1]], killed [[PHI5]], implicit-def $exec, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE1]], [[PHI5]], implicit-def $exec, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.4:
; SI-NEXT: successors: %bb.3(0x40000000), %bb.5(0x40000000)
; SI-NEXT: {{ $}}
; SI-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; SI-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY6]]
- ; SI-NEXT: $vgpr0 = COPY killed [[PHI6]]
- ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed [[REG_SEQUENCE1]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $vgpr0, implicit-def $vgpr0
+ ; SI-NEXT: $vgpr0 = COPY [[PHI6]]
+ ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[REG_SEQUENCE1]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $vgpr0, implicit-def $vgpr0
; SI-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
- ; SI-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 killed [[PHI4]], $exec_lo, implicit-def dead $scc
+ ; SI-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 [[PHI4]], $exec_lo, implicit-def dead $scc
; SI-NEXT: $exec_lo = S_MOV_B32_term [[S_ANDN2_B32_]]
; SI-NEXT: SI_WATERFALL_LOOP %bb.3, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.5:
; SI-NEXT: successors: %bb.10(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: $exec_lo = S_MOV_B32 killed [[S_MOV_B32_]]
- ; SI-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY killed [[COPY7]]
+ ; SI-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_]]
+ ; SI-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
; SI-NEXT: S_BRANCH %bb.10
; SI-NEXT: {{ $}}
; SI-NEXT: bb.6.else:
; SI-NEXT: successors: %bb.7(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY]], %subreg.sub1
+ ; SI-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY]], %subreg.sub1
; SI-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_MOV_B32 $exec_lo
; SI-NEXT: [[COPY9:%[0-9]+]]:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
; SI-NEXT: {{ $}}
@@ -292,34 +292,34 @@ define amdgpu_ps float @loop(i32 %z, float %v, i32 inreg %bound, ptr %extern_fun
; SI-NEXT: [[PHI9:%[0-9]+]]:vgpr_32 = PHI undef %62:vgpr_32, %bb.8, [[COPY4]], %bb.6
; SI-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI8]].sub0, implicit $exec
; SI-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI8]].sub1, implicit $exec
- ; SI-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sgpr_64 = REG_SEQUENCE killed [[V_READFIRSTLANE_B32_2]], %subreg.sub0, killed [[V_READFIRSTLANE_B32_3]], %subreg.sub1
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE3]], killed [[PHI8]], implicit-def $exec, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[V_READFIRSTLANE_B32_2]], %subreg.sub0, [[V_READFIRSTLANE_B32_3]], %subreg.sub1
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE3]], [[PHI8]], implicit-def $exec, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.8:
; SI-NEXT: successors: %bb.7(0x40000000), %bb.9(0x40000000)
; SI-NEXT: {{ $}}
; SI-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; SI-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY9]]
- ; SI-NEXT: $vgpr0 = COPY killed [[PHI9]]
- ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed [[REG_SEQUENCE3]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $vgpr0, implicit-def $vgpr0
+ ; SI-NEXT: $vgpr0 = COPY [[PHI9]]
+ ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[REG_SEQUENCE3]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $vgpr0, implicit-def $vgpr0
; SI-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
- ; SI-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 killed [[PHI7]], $exec_lo, implicit-def dead $scc
+ ; SI-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 [[PHI7]], $exec_lo, implicit-def dead $scc
; SI-NEXT: $exec_lo = S_MOV_B32_term [[S_ANDN2_B32_1]]
; SI-NEXT: SI_WATERFALL_LOOP %bb.7, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.9:
; SI-NEXT: successors: %bb.1(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: $exec_lo = S_MOV_B32 killed [[S_MOV_B32_1]]
- ; SI-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY killed [[COPY10]]
+ ; SI-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_1]]
+ ; SI-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[COPY10]]
; SI-NEXT: S_BRANCH %bb.1
; SI-NEXT: {{ $}}
; SI-NEXT: bb.10.end:
; SI-NEXT: [[PHI10:%[0-9]+]]:vgpr_32 = PHI [[PHI]], %bb.1, [[COPY8]], %bb.5
- ; SI-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; SI-NEXT: $vgpr0 = COPY killed [[PHI10]]
- ; SI-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0
+ ; SI-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: $vgpr0 = COPY [[PHI10]]
+ ; SI-NEXT: SI_RETURN_TO_EPILOG $vgpr0
main_body:
%cc = icmp sgt i32 %z, 5
br i1 %cc, label %if, label %else
@@ -344,14 +344,14 @@ define amdgpu_ps float @loop_with_use(i32 %z, float %v, i32 inreg %bound, ptr %e
; SI-NEXT: successors: %bb.6(0x40000000), %bb.1(0x40000000)
; SI-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr5
- ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr4
- ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed $vgpr3
- ; SI-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed $vgpr2
- ; SI-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY killed $vgpr1
- ; SI-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, killed [[COPY5]], implicit $exec
- ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF killed [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr5
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr4
+ ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+ ; SI-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+ ; SI-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; SI-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[V_CMP_GT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_I32_e64 6, [[COPY5]], implicit $exec
+ ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[V_CMP_GT_I32_e64_]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.6
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.Flow:
@@ -360,13 +360,13 @@ define amdgpu_ps float @loop_with_use(i32 %z, float %v, i32 inreg %bound, ptr %e
; SI-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI undef %16:vgpr_32, %bb.0, %4, %bb.9
; SI-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY3]], %bb.0, undef %51:vgpr_32, %bb.9
; SI-NEXT: [[PHI2:%[0-9]+]]:vgpr_32 = PHI [[COPY2]], %bb.0, undef %53:vgpr_32, %bb.9
- ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE killed [[SI_IF]], %bb.10, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE [[SI_IF]], %bb.10, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.2
; SI-NEXT: {{ $}}
; SI-NEXT: bb.2.if:
; SI-NEXT: successors: %bb.3(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[PHI1]], %subreg.sub0, killed [[PHI2]], %subreg.sub1
+ ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[PHI1]], %subreg.sub0, [[PHI2]], %subreg.sub1
; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_MOV_B32 $exec_lo
; SI-NEXT: [[COPY6:%[0-9]+]]:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
; SI-NEXT: {{ $}}
@@ -377,8 +377,8 @@ define amdgpu_ps float @loop_with_use(i32 %z, float %v, i32 inreg %bound, ptr %e
; SI-NEXT: [[PHI4:%[0-9]+]]:vreg_64 = PHI undef %55:vreg_64, %bb.4, [[REG_SEQUENCE]], %bb.2
; SI-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI4]].sub0, implicit $exec
; SI-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI4]].sub1, implicit $exec
- ; SI-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE killed [[V_READFIRSTLANE_B32_]], %subreg.sub0, killed [[V_READFIRSTLANE_B32_1]], %subreg.sub1
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE1]], killed [[PHI4]], implicit-def $exec, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE1]], [[PHI4]], implicit-def $exec, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.4:
; SI-NEXT: successors: %bb.3(0x40000000), %bb.5(0x40000000)
@@ -386,24 +386,24 @@ define amdgpu_ps float @loop_with_use(i32 %z, float %v, i32 inreg %bound, ptr %e
; SI-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; SI-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY6]]
; SI-NEXT: $vgpr0 = COPY [[COPY4]]
- ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed [[REG_SEQUENCE1]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $vgpr0, implicit-def $vgpr0
+ ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[REG_SEQUENCE1]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $vgpr0, implicit-def $vgpr0
; SI-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
- ; SI-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 killed [[PHI3]], $exec_lo, implicit-def dead $scc
+ ; SI-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 [[PHI3]], $exec_lo, implicit-def dead $scc
; SI-NEXT: $exec_lo = S_MOV_B32_term [[S_ANDN2_B32_]]
; SI-NEXT: SI_WATERFALL_LOOP %bb.3, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.5:
; SI-NEXT: successors: %bb.10(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: $exec_lo = S_MOV_B32 killed [[S_MOV_B32_]]
- ; SI-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY killed [[COPY7]]
+ ; SI-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_]]
+ ; SI-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
; SI-NEXT: S_BRANCH %bb.10
; SI-NEXT: {{ $}}
; SI-NEXT: bb.6.else:
; SI-NEXT: successors: %bb.7(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY]], %subreg.sub1
+ ; SI-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY]], %subreg.sub1
; SI-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_MOV_B32 $exec_lo
; SI-NEXT: [[COPY9:%[0-9]+]]:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
; SI-NEXT: {{ $}}
@@ -414,8 +414,8 @@ define amdgpu_ps float @loop_with_use(i32 %z, float %v, i32 inreg %bound, ptr %e
; SI-NEXT: [[PHI6:%[0-9]+]]:vreg_64 = PHI undef %57:vreg_64, %bb.8, [[REG_SEQUENCE2]], %bb.6
; SI-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI6]].sub0, implicit $exec
; SI-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[PHI6]].sub1, implicit $exec
- ; SI-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sgpr_64 = REG_SEQUENCE killed [[V_READFIRSTLANE_B32_2]], %subreg.sub0, killed [[V_READFIRSTLANE_B32_3]], %subreg.sub1
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE3]], killed [[PHI6]], implicit-def $exec, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[V_READFIRSTLANE_B32_2]], %subreg.sub0, [[V_READFIRSTLANE_B32_3]], %subreg.sub1
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE3]], [[PHI6]], implicit-def $exec, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.8:
; SI-NEXT: successors: %bb.7(0x40000000), %bb.9(0x40000000)
@@ -423,26 +423,26 @@ define amdgpu_ps float @loop_with_use(i32 %z, float %v, i32 inreg %bound, ptr %e
; SI-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; SI-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY9]]
; SI-NEXT: $vgpr0 = COPY [[COPY4]]
- ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed [[REG_SEQUENCE3]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $vgpr0, implicit-def $vgpr0
+ ; SI-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[REG_SEQUENCE3]], 0, csr_amdgpu_si_gfx, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $vgpr0, implicit-def $vgpr0
; SI-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
- ; SI-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
- ; SI-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 killed [[PHI5]], $exec_lo, implicit-def dead $scc
+ ; SI-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; SI-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 [[PHI5]], $exec_lo, implicit-def dead $scc
; SI-NEXT: $exec_lo = S_MOV_B32_term [[S_ANDN2_B32_1]]
; SI-NEXT: SI_WATERFALL_LOOP %bb.7, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.9:
; SI-NEXT: successors: %bb.1(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: $exec_lo = S_MOV_B32 killed [[S_MOV_B32_1]]
- ; SI-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY killed [[COPY10]]
+ ; SI-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_1]]
+ ; SI-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[COPY10]]
; SI-NEXT: S_BRANCH %bb.1
; SI-NEXT: {{ $}}
; SI-NEXT: bb.10.end:
; SI-NEXT: [[PHI7:%[0-9]+]]:vgpr_32 = PHI [[PHI]], %bb.1, [[COPY8]], %bb.5
- ; SI-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
- ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, killed [[PHI7]], 0, killed [[COPY4]], 0, 0, implicit $mode, implicit $exec
- ; SI-NEXT: $vgpr0 = COPY killed [[V_ADD_F32_e64_]]
- ; SI-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0
+ ; SI-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[PHI7]], 0, [[COPY4]], 0, 0, implicit $mode, implicit $exec
+ ; SI-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
+ ; SI-NEXT: SI_RETURN_TO_EPILOG $vgpr0
main_body:
%cc = icmp sgt i32 %z, 5
br i1 %cc, label %if, label %else
@@ -467,22 +467,22 @@ define amdgpu_kernel void @livevariables_update_missed_block(ptr addrspace(1) %s
; SI-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
; SI-NEXT: liveins: $vgpr0, $sgpr4_sgpr5
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY killed $sgpr4_sgpr5
- ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(i32) = COPY killed $vgpr0
+ ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr4_sgpr5
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(i32) = COPY $vgpr0
; SI-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[COPY1]](i32), implicit $exec
- ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF killed [[V_CMP_NE_U32_e64_]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[V_CMP_NE_U32_e64_]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.2
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.if.then:
; SI-NEXT: successors: %bb.7(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: early-clobber %34:sreg_64_xexec = S_LOAD_DWORDX2_IMM_ec killed [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64) from %ir.src1.kernarg.offset, align 4, addrspace 4)
- ; SI-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 %34.sub0, killed %52, 0, implicit $exec
- ; SI-NEXT: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADDC_U32_e64 0, killed %34.sub1, killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
- ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[V_ADD_CO_U32_e64_]], %subreg.sub0, killed [[V_ADDC_U32_e64_]], %subreg.sub1
- ; SI-NEXT: [[GLOBAL_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE killed [[REG_SEQUENCE]], 0, 0, implicit $exec :: (load (s8) from %ir.i10, addrspace 1)
+ ; SI-NEXT: early-clobber %34:sreg_64_xexec = S_LOAD_DWORDX2_IMM_ec [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64) from %ir.src1.kernarg.offset, align 4, addrspace 4)
+ ; SI-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 %34.sub0, %52, 0, implicit $exec
+ ; SI-NEXT: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADDC_U32_e64 0, %34.sub1, [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, [[V_ADDC_U32_e64_]], %subreg.sub1
+ ; SI-NEXT: [[GLOBAL_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE [[REG_SEQUENCE]], 0, 0, implicit $exec :: (load (s8) from %ir.i10, addrspace 1)
; SI-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
- ; SI-NEXT: GLOBAL_STORE_BYTE killed [[V_MOV_B]], killed [[GLOBAL_LOAD_UBYTE]], 0, 0, implicit $exec :: (store (s8) into `ptr addrspace(1) null`, addrspace 1)
+ ; SI-NEXT: GLOBAL_STORE_BYTE [[V_MOV_B]], [[GLOBAL_LOAD_UBYTE]], 0, 0, implicit $exec :: (store (s8) into `ptr addrspace(1) null`, addrspace 1)
; SI-NEXT: S_BRANCH %bb.7
; SI-NEXT: {{ $}}
; SI-NEXT: bb.2.if.then9:
@@ -499,14 +499,14 @@ define amdgpu_kernel void @livevariables_update_missed_block(ptr addrspace(1) %s
; SI-NEXT: successors: %bb.6(0x80000000)
; SI-NEXT: {{ $}}
; SI-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
- ; SI-NEXT: [[GLOBAL_LOAD_UBYTE1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE killed [[V_MOV_B1]], 0, 0, implicit $exec :: ("amdgpu-noclobber" load (s8) from `ptr addrspace(1) null`, addrspace 1)
+ ; SI-NEXT: [[GLOBAL_LOAD_UBYTE1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_UBYTE [[V_MOV_B1]], 0, 0, implicit $exec :: ("amdgpu-noclobber" load (s8) from `ptr addrspace(1) null`, addrspace 1)
; SI-NEXT: S_BRANCH %bb.6
; SI-NEXT: {{ $}}
; SI-NEXT: bb.5.Flow:
; SI-NEXT: successors: %bb.1(0x40000000), %bb.7(0x40000000)
; SI-NEXT: {{ $}}
; SI-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY1]](i32), %bb.0, undef %53:vgpr_32, %bb.6
- ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE killed [[SI_IF]], %bb.7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: [[SI_ELSE:%[0-9]+]]:sreg_32 = SI_ELSE [[SI_IF]], %bb.7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_BRANCH %bb.1
; SI-NEXT: {{ $}}
; SI-NEXT: bb.6.sw.bb18:
@@ -514,11 +514,11 @@ define amdgpu_kernel void @livevariables_update_missed_block(ptr addrspace(1) %s
; SI-NEXT: {{ $}}
; SI-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI undef %41:vgpr_32, %bb.3, [[GLOBAL_LOAD_UBYTE1]], %bb.4
; SI-NEXT: [[V_MOV_B2:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
- ; SI-NEXT: GLOBAL_STORE_BYTE killed [[V_MOV_B2]], killed [[PHI1]], 0, 0, implicit $exec :: (store (s8) into `ptr addrspace(1) null`, addrspace 1)
+ ; SI-NEXT: GLOBAL_STORE_BYTE [[V_MOV_B2]], [[PHI1]], 0, 0, implicit $exec :: (store (s8) into `ptr addrspace(1) null`, addrspace 1)
; SI-NEXT: S_BRANCH %bb.5
; SI-NEXT: {{ $}}
; SI-NEXT: bb.7.UnifiedReturnBlock:
- ; SI-NEXT: SI_END_CF killed [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; SI-NEXT: SI_END_CF [[SI_ELSE]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; SI-NEXT: S_ENDPGM 0
entry:
%i2 = tail call i32 @llvm.amdgcn.workitem.id.x()
@@ -568,19 +568,19 @@ define protected amdgpu_kernel void @nested_waterfalls(ptr addrspace(1) %tex.coe
; SI-NEXT: successors: %bb.1(0x80000000)
; SI-NEXT: liveins: $vgpr0, $sgpr4_sgpr5
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY killed $sgpr4_sgpr5
- ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(i32) = COPY killed $vgpr0
+ ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr4_sgpr5
+ ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(i32) = COPY $vgpr0
; SI-NEXT: {{ $}}
; SI-NEXT: bb.1.if.then:
; SI-NEXT: successors: %bb.2(0x80000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: early-clobber %11:sreg_64_xexec_xnull = S_LOAD_DWORDX2_IMM_ec killed [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64) from %ir.tex.coerce.kernarg.offset, align 4, addrspace 4)
- ; SI-NEXT: [[V_LSHLREV_B32_e64_:%[0-9]+]]:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 3, killed [[COPY1]](i32), implicit $exec
- ; SI-NEXT: [[GLOBAL_LOAD_DWORDX2_SADDR:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2_SADDR killed %11, killed [[V_LSHLREV_B32_e64_]], 0, 0, implicit $exec :: (load (s64) from %ir.idx, addrspace 1)
+ ; SI-NEXT: early-clobber %11:sreg_64_xexec_xnull = S_LOAD_DWORDX2_IMM_ec [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64) from %ir.tex.coerce.kernarg.offset, align 4, addrspace 4)
+ ; SI-NEXT: [[V_LSHLREV_B32_e64_:%[0-9]+]]:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 3, [[COPY1]](i32), implicit $exec
+ ; SI-NEXT: [[GLOBAL_LOAD_DWORDX2_SADDR:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2_SADDR %11, [[V_LSHLREV_B32_e64_]], 0, 0, implicit $exec :: (load (s64) from %ir.idx, addrspace 1)
; SI-NEXT: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[GLOBAL_LOAD_DWORDX2_SADDR]], 16, 0, implicit $exec :: (invariant load (s128) from %ir.3 + 16, addrspace 4)
; SI-NEXT: [[GLOBAL_LOAD_DWORDX4_1:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[GLOBAL_LOAD_DWORDX2_SADDR]], 0, 0, implicit $exec :: (invariant load (s128) from %ir.3, align 32, addrspace 4)
- ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_256 = REG_SEQUENCE killed [[GLOBAL_LOAD_DWORDX4_1]].sub0, %subreg.sub0, [[GLOBAL_LOAD_DWORDX4_1]].sub1, %subreg.sub1, [[GLOBAL_LOAD_DWORDX4_1]].sub2, %subreg.sub2, [[GLOBAL_LOAD_DWORDX4_1]].sub3, %subreg.sub3, killed [[GLOBAL_LOAD_DWORDX4_]].sub0, %subreg.sub4, [[GLOBAL_LOAD_DWORDX4_]].sub1, %subreg.sub5, [[GLOBAL_LOAD_DWORDX4_]].sub2, %subreg.sub6, [[GLOBAL_LOAD_DWORDX4_]].sub3, %subreg.sub7
- ; SI-NEXT: [[GLOBAL_LOAD_DWORDX4_2:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 killed [[GLOBAL_LOAD_DWORDX2_SADDR]], 48, 0, implicit $exec :: (invariant load (s128) from %ir.add.ptr.i, addrspace 4)
+ ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_256 = REG_SEQUENCE [[GLOBAL_LOAD_DWORDX4_1]].sub0, %subreg.sub0, [[GLOBAL_LOAD_DWORDX4_1]].sub1, %subreg.sub1, [[GLOBAL_LOAD_DWORDX4_1]].sub2, %subreg.sub2, [[GLOBAL_LOAD_DWORDX4_1]].sub3, %subreg.sub3, [[GLOBAL_LOAD_DWORDX4_]].sub0, %subreg.sub4, [[GLOBAL_LOAD_DWORDX4_]].sub1, %subreg.sub5, [[GLOBAL_LOAD_DWORDX4_]].sub2, %subreg.sub6, [[GLOBAL_LOAD_DWORDX4_]].sub3, %subreg.sub7
+ ; SI-NEXT: [[GLOBAL_LOAD_DWORDX4_2:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[GLOBAL_LOAD_DWORDX2_SADDR]], 48, 0, implicit $exec :: (invariant load (s128) from %ir.add.ptr.i, addrspace 4)
; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_MOV_B32 $exec_lo
; SI-NEXT: {{ $}}
; SI-NEXT: bb.2:
@@ -599,11 +599,11 @@ define protected amdgpu_kernel void @nested_waterfalls(ptr addrspace(1) %tex.coe
; SI-NEXT: [[V_READFIRSTLANE_B32_6:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[REG_SEQUENCE]].sub6, implicit $exec
; SI-NEXT: [[V_READFIRSTLANE_B32_7:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[REG_SEQUENCE]].sub7, implicit $exec
; SI-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[V_READFIRSTLANE_B32_6]], %subreg.sub0, [[V_READFIRSTLANE_B32_7]], %subreg.sub1
- ; SI-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:sgpr_256 = REG_SEQUENCE killed [[V_READFIRSTLANE_B32_]], %subreg.sub0, killed [[V_READFIRSTLANE_B32_1]], %subreg.sub1, killed [[V_READFIRSTLANE_B32_2]], %subreg.sub2, killed [[V_READFIRSTLANE_B32_3]], %subreg.sub3, killed [[V_READFIRSTLANE_B32_4]], %subreg.sub4, killed [[V_READFIRSTLANE_B32_5]], %subreg.sub5, killed [[V_READFIRSTLANE_B32_6]], %subreg.sub6, killed [[V_READFIRSTLANE_B32_7]], %subreg.sub7
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term killed [[REG_SEQUENCE1]], [[REG_SEQUENCE]].sub0_sub1, implicit-def $exec, implicit $exec
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term killed [[REG_SEQUENCE2]], [[REG_SEQUENCE]].sub2_sub3, implicit-def $exec, implicit $exec
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term killed [[REG_SEQUENCE3]], [[REG_SEQUENCE]].sub4_sub5, implicit-def $exec, implicit $exec
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term killed [[REG_SEQUENCE4]], [[REG_SEQUENCE]].sub6_sub7, implicit-def $exec, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:sgpr_256 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3, [[V_READFIRSTLANE_B32_4]], %subreg.sub4, [[V_READFIRSTLANE_B32_5]], %subreg.sub5, [[V_READFIRSTLANE_B32_6]], %subreg.sub6, [[V_READFIRSTLANE_B32_7]], %subreg.sub7
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE1]], [[REG_SEQUENCE]].sub0_sub1, implicit-def $exec, implicit $exec
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE2]], [[REG_SEQUENCE]].sub2_sub3, implicit-def $exec, implicit $exec
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE3]], [[REG_SEQUENCE]].sub4_sub5, implicit-def $exec, implicit $exec
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE4]], [[REG_SEQUENCE]].sub6_sub7, implicit-def $exec, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.3:
; SI-NEXT: successors: %bb.4(0x80000000)
@@ -620,29 +620,29 @@ define protected amdgpu_kernel void @nested_waterfalls(ptr addrspace(1) %tex.coe
; SI-NEXT: [[V_READFIRSTLANE_B32_10:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[GLOBAL_LOAD_DWORDX4_2]].sub2, implicit $exec
; SI-NEXT: [[V_READFIRSTLANE_B32_11:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[GLOBAL_LOAD_DWORDX4_2]].sub3, implicit $exec
; SI-NEXT: [[REG_SEQUENCE7:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[V_READFIRSTLANE_B32_10]], %subreg.sub0, [[V_READFIRSTLANE_B32_11]], %subreg.sub1
- ; SI-NEXT: [[REG_SEQUENCE8:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[V_READFIRSTLANE_B32_8]], %subreg.sub0, killed [[V_READFIRSTLANE_B32_9]], %subreg.sub1, killed [[V_READFIRSTLANE_B32_10]], %subreg.sub2, killed [[V_READFIRSTLANE_B32_11]], %subreg.sub3
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term killed [[REG_SEQUENCE6]], [[GLOBAL_LOAD_DWORDX4_2]].sub0_sub1, implicit-def $exec, implicit $exec
- ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term killed [[REG_SEQUENCE7]], [[GLOBAL_LOAD_DWORDX4_2]].sub2_sub3, implicit-def $exec, implicit $exec
+ ; SI-NEXT: [[REG_SEQUENCE8:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_8]], %subreg.sub0, [[V_READFIRSTLANE_B32_9]], %subreg.sub1, [[V_READFIRSTLANE_B32_10]], %subreg.sub2, [[V_READFIRSTLANE_B32_11]], %subreg.sub3
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE6]], [[GLOBAL_LOAD_DWORDX4_2]].sub0_sub1, implicit-def $exec, implicit $exec
+ ; SI-NEXT: V_CMPX_EQ_U64_nosdst_e32_term [[REG_SEQUENCE7]], [[GLOBAL_LOAD_DWORDX4_2]].sub2_sub3, implicit-def $exec, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.5:
; SI-NEXT: successors: %bb.4(0x40000000), %bb.6(0x40000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: [[IMAGE_SAMPLE_V1_V2_nsa_gfx10_:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_V1_V2_nsa_gfx10 undef %29:vgpr_32, undef %31:vgpr_32, [[REG_SEQUENCE5]], killed [[REG_SEQUENCE8]], 1, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)
- ; SI-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 killed [[PHI1]], $exec_lo, implicit-def dead $scc
+ ; SI-NEXT: [[IMAGE_SAMPLE_V1_V2_nsa_gfx10_:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_V1_V2_nsa_gfx10 undef %29:vgpr_32, undef %31:vgpr_32, [[REG_SEQUENCE5]], [[REG_SEQUENCE8]], 1, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)
+ ; SI-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 [[PHI1]], $exec_lo, implicit-def dead $scc
; SI-NEXT: $exec_lo = S_MOV_B32_term [[S_ANDN2_B32_]]
; SI-NEXT: SI_WATERFALL_LOOP %bb.4, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.6:
; SI-NEXT: successors: %bb.2(0x40000000), %bb.7(0x40000000)
; SI-NEXT: {{ $}}
- ; SI-NEXT: $exec_lo = S_MOV_B32 killed [[S_MOV_B32_1]]
- ; SI-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 killed [[PHI]], $exec_lo, implicit-def dead $scc
+ ; SI-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_1]]
+ ; SI-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32_xm0_xexec = S_ANDN2_B32 [[PHI]], $exec_lo, implicit-def dead $scc
; SI-NEXT: $exec_lo = S_MOV_B32_term [[S_ANDN2_B32_1]]
; SI-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec
; SI-NEXT: {{ $}}
; SI-NEXT: bb.7:
- ; SI-NEXT: $exec_lo = S_MOV_B32 killed [[S_MOV_B32_]]
- ; SI-NEXT: GLOBAL_STORE_DWORD undef %35:vreg_64, killed [[IMAGE_SAMPLE_V1_V2_nsa_gfx10_]], 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(1) poison`, addrspace 1)
+ ; SI-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_]]
+ ; SI-NEXT: GLOBAL_STORE_DWORD undef %35:vreg_64, [[IMAGE_SAMPLE_V1_V2_nsa_gfx10_]], 0, 0, implicit $exec :: (store (s32) into `ptr addrspace(1) poison`, addrspace 1)
; SI-NEXT: S_ENDPGM 0
entry:
%0 = tail call i32 @llvm.amdgcn.workitem.id.x()
diff --git a/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll b/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
index 036ddb70b8c9a..61d2b8458bf83 100644
--- a/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
+++ b/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
@@ -452,18 +452,18 @@ define amdgpu_kernel void @v8i8_phi_zeroinit(ptr addrspace(1) %src1, ptr addrspa
; GFX942-NEXT: v_cmp_lt_u32_e64 s[0:1], 14, v0
; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[8:9]
-; GFX942-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX942-NEXT: global_load_dwordx2 v[4:5], v1, s[8:9]
+; GFX942-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX942-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX942-NEXT: s_cbranch_execz .LBB9_2
; GFX942-NEXT: ; %bb.1: ; %bb.1
-; GFX942-NEXT: global_load_dwordx2 v[4:5], v1, s[10:11]
+; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[10:11]
; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 7, v0
; GFX942-NEXT: s_waitcnt vmcnt(1)
-; GFX942-NEXT: v_mov_b32_e32 v2, 0
+; GFX942-NEXT: v_mov_b32_e32 v4, 0
; GFX942-NEXT: s_andn2_b64 s[0:1], s[0:1], exec
; GFX942-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX942-NEXT: v_mov_b32_e32 v3, v2
+; GFX942-NEXT: v_mov_b32_e32 v5, v4
; GFX942-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]
; GFX942-NEXT: .LBB9_2: ; %Flow
; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]
@@ -472,13 +472,13 @@ define amdgpu_kernel void @v8i8_phi_zeroinit(ptr addrspace(1) %src1, ptr addrspa
; GFX942-NEXT: ; %bb.3: ; %bb.2
; GFX942-NEXT: v_mov_b32_e32 v0, 0
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
-; GFX942-NEXT: global_store_dwordx2 v0, v[2:3], s[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: global_store_dwordx2 v0, v[4:5], s[12:13]
; GFX942-NEXT: .LBB9_4: ; %bb.3
; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX942-NEXT: v_mov_b32_e32 v0, 0
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: global_store_dwordx2 v0, v[4:5], s[14:15]
+; GFX942-NEXT: global_store_dwordx2 v0, v[2:3], s[14:15]
; GFX942-NEXT: s_endpgm
entry:
%idx = call i32 @llvm.amdgcn.workitem.id.x()
@@ -662,28 +662,28 @@ define amdgpu_kernel void @v32i8_loop_carried(ptr addrspace(1) %src1, ptr addrsp
; GFX942-LABEL: v32i8_loop_carried:
; GFX942: ; %bb.0: ; %entry
; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX942-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX942-NEXT: v_lshlrev_b32_e32 v0, 5, v1
-; GFX942-NEXT: v_cmp_lt_u32_e32 vcc, 14, v1
+; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX942-NEXT: v_lshlrev_b32_e32 v1, 5, v0
+; GFX942-NEXT: v_cmp_lt_u32_e32 vcc, 14, v0
; GFX942-NEXT: s_mov_b32 s2, 0x2000604
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: global_load_dword v0, v0, s[0:1]
+; GFX942-NEXT: global_load_dword v1, v1, s[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], 0
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v1, v0
+; GFX942-NEXT: v_mov_b32_e32 v0, v1
; GFX942-NEXT: .LBB12_1: ; %bb.1
; GFX942-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX942-NEXT: s_and_b64 s[6:7], exec, vcc
; GFX942-NEXT: s_or_b64 s[0:1], s[6:7], s[0:1]
-; GFX942-NEXT: v_perm_b32 v1, v0, v1, s2
+; GFX942-NEXT: v_perm_b32 v0, v1, v0, s2
; GFX942-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX942-NEXT: s_cbranch_execnz .LBB12_1
; GFX942-NEXT: ; %bb.2: ; %bb.2.loopexit
; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34
-; GFX942-NEXT: v_mov_b32_e32 v0, 0
+; GFX942-NEXT: v_mov_b32_e32 v1, 0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: global_store_dword v0, v1, s[0:1]
+; GFX942-NEXT: global_store_dword v1, v0, s[0:1]
; GFX942-NEXT: s_endpgm
entry:
%idx = call i32 @llvm.amdgcn.workitem.id.x()
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