[llvm] [ARM] Use target constant for MVE fixed fp convert constant (PR #227250)

[David Green via llvm-commits]

https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/227250

If the constant already exists then we would reuse the constant in a register instead of using an immediate, as the instruction requires. Use a TargetConstant to make sure we generate an immediate.

Fixes #226592

>From ee290edcb2c6b26b82d4b3ebf81b2c0ed52da86b Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Tue, 29 Sep 2026 09:27:51 +0100
Subject: [PATCH 1/2] [ARM] extra test

---
 .../CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll    | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll b/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
index 38a2cfc1a579d..217a4d656d972 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
@@ -1029,3 +1029,19 @@ define arm_aapcs_vfpcc <4 x float> @vcvt_negative2(<4 x i32> %0) {
   %3 = fmul <4 x float> %2, <float 0xBE00000000000000, float 0xBE00000000000000, float 0xBE00000000000000, float 0xBE00000000000000>
   ret <4 x float> %3
 }
+
+define arm_aapcs_vfpcc <4 x float> @extra_4(<4 x i32> %2, ptr %p, i32 %i) {
+; CHECK-LABEL: extra_4:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    movs r2, #4
+; CHECK-NEXT:    eor r1, r1, #4
+; CHECK-NEXT:    vcvt.f32.s32 q0, q0, r2
+; CHECK-NEXT:    str r1, [r0]
+; CHECK-NEXT:    bx lr
+entry:
+  %3 = sitofp <4 x i32> %2 to <4 x float>
+  %4 = fmul nnan <4 x float> %3, splat (float 6.250000e-02)
+  %o = xor i32 %i, 4
+  store i32 %o, ptr %p
+  ret <4 x float> %4
+}

>From 271fd3626198ac66096e63a1bf8b14384b809a62 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Tue, 29 Sep 2026 10:53:41 +0100
Subject: [PATCH 2/2] [ARM] Use target constant for MVE fixed fp convert
 constant

If the constant already exists then we would reuse the constant in a register
instead of using an immediate, as the instruction requires. Use a
TargetConstant to make sure we generate an immediate.
---
 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp             | 2 +-
 llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 61b679d55fb47..b85cff2f8ae2b 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -3327,7 +3327,7 @@ bool ARMDAGToDAGISel::transformFixedFloatingPointConversion(SDNode *N,
     return false;
 
   SmallVector<SDValue, 3> Ops{
-      VecVal, CurDAG->getConstant(FracBits, SDLoc(N), MVT::i32)};
+      VecVal, CurDAG->getTargetConstant(FracBits, SDLoc(N), MVT::i32)};
   AddEmptyMVEPredicateToOps(Ops, SDLoc(N), Type);
 
   unsigned int Opcode;
diff --git a/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll b/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
index 217a4d656d972..08cc77da6afe7 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
@@ -1033,9 +1033,8 @@ define arm_aapcs_vfpcc <4 x float> @vcvt_negative2(<4 x i32> %0) {
 define arm_aapcs_vfpcc <4 x float> @extra_4(<4 x i32> %2, ptr %p, i32 %i) {
 ; CHECK-LABEL: extra_4:
 ; CHECK:       @ %bb.0: @ %entry
-; CHECK-NEXT:    movs r2, #4
+; CHECK-NEXT:    vcvt.f32.s32 q0, q0, #4
 ; CHECK-NEXT:    eor r1, r1, #4
-; CHECK-NEXT:    vcvt.f32.s32 q0, q0, r2
 ; CHECK-NEXT:    str r1, [r0]
 ; CHECK-NEXT:    bx lr
 entry: