[llvm] ARM: Mark __chkstk call's implicit LR def dead (PR #227218)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-arm

Author: Matt Arsenault (arsenm)

<details>
<summary>Changes</summary>

The WIN__CHKSTK custom inserter already marks the clobbered R12 and CPSR
defs dead, but left the call's implicit-def $lr for later inference.

Co-Authored-By: Claude Opus 5 <noreply@<!-- -->anthropic.com>

---
Full diff: https://github.com/llvm/llvm-project/pull/227218.diff


3 Files Affected:

- (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+2) 
- (added) llvm/test/CodeGen/ARM/Windows/chkstk-dead-lr.ll (+39) 
- (modified) llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 7e5f6134fc88b..2f4a4b47677c5 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -11751,6 +11751,7 @@ ARMTargetLowering::EmitLowered__chkstk(MachineInstr &MI,
     BuildMI(*MBB, MI, DL, TII.get(ARM::tBL))
         .add(predOps(ARMCC::AL))
         .addExternalSymbol(ChkStk)
+        .setOperandDead(3) // implicit-def $lr
         .addReg(ARM::R4, RegState::Implicit | RegState::Kill)
         .addReg(ARM::R4, RegState::Implicit | RegState::Define)
         .addReg(ARM::R12,
@@ -11767,6 +11768,7 @@ ARMTargetLowering::EmitLowered__chkstk(MachineInstr &MI,
     BuildMI(*MBB, MI, DL, TII.get(gettBLXrOpcode(*MBB->getParent())))
         .add(predOps(ARMCC::AL))
         .addReg(Reg, RegState::Kill)
+        .setOperandDead(3) // implicit-def $lr
         .addReg(ARM::R4, RegState::Implicit | RegState::Kill)
         .addReg(ARM::R4, RegState::Implicit | RegState::Define)
         .addReg(ARM::R12,
diff --git a/llvm/test/CodeGen/ARM/Windows/chkstk-dead-lr.ll b/llvm/test/CodeGen/ARM/Windows/chkstk-dead-lr.ll
new file mode 100644
index 0000000000000..6e315c8a4897d
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/Windows/chkstk-dead-lr.ll
@@ -0,0 +1,39 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=thumbv7-windows-itanium -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=SMALL %s
+; RUN: llc -mtriple=thumbv7-windows-itanium -code-model=large -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=LARGE %s
+
+define ptr @vla(i32 %n) {
+  ; SMALL-LABEL: name: vla
+  ; SMALL: bb.0.entry:
+  ; SMALL-NEXT:   liveins: $r0
+  ; SMALL-NEXT: {{  $}}
+  ; SMALL-NEXT:   [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+  ; SMALL-NEXT:   [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 7, 14 /* CC::al */, $noreg, $noreg
+  ; SMALL-NEXT:   [[t2BICri:%[0-9]+]]:rgpr = t2BICri killed [[t2ADDri]], 4, 14 /* CC::al */, $noreg, $noreg
+  ; SMALL-NEXT:   [[t2LSRri:%[0-9]+]]:rgpr = t2LSRri killed [[t2BICri]], 2, 14 /* CC::al */, $noreg, $noreg
+  ; SMALL-NEXT:   $r4 = COPY [[t2LSRri]]
+  ; SMALL-NEXT:   tBL 14 /* CC::al */, $noreg, &__chkstk, implicit-def dead $lr, implicit $sp, implicit killed $r4, implicit-def $r4, implicit-def dead $r12, implicit-def dead $cpsr
+  ; SMALL-NEXT:   $sp = frame-setup t2SUBrr killed $sp, killed $r4, 14 /* CC::al */, $noreg, $noreg
+  ; SMALL-NEXT:   [[COPY1:%[0-9]+]]:gpr = COPY $sp
+  ; SMALL-NEXT:   $r0 = COPY [[COPY1]]
+  ; SMALL-NEXT:   tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+  ;
+  ; LARGE-LABEL: name: vla
+  ; LARGE: bb.0.entry:
+  ; LARGE-NEXT:   liveins: $r0
+  ; LARGE-NEXT: {{  $}}
+  ; LARGE-NEXT:   [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+  ; LARGE-NEXT:   [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 7, 14 /* CC::al */, $noreg, $noreg
+  ; LARGE-NEXT:   [[t2BICri:%[0-9]+]]:rgpr = t2BICri killed [[t2ADDri]], 4, 14 /* CC::al */, $noreg, $noreg
+  ; LARGE-NEXT:   [[t2LSRri:%[0-9]+]]:rgpr = t2LSRri killed [[t2BICri]], 2, 14 /* CC::al */, $noreg, $noreg
+  ; LARGE-NEXT:   $r4 = COPY [[t2LSRri]]
+  ; LARGE-NEXT:   [[t2MOVi32imm:%[0-9]+]]:rgpr = t2MOVi32imm &__chkstk
+  ; LARGE-NEXT:   tBLXr 14 /* CC::al */, $noreg, killed [[t2MOVi32imm]], implicit-def dead $lr, implicit $sp, implicit killed $r4, implicit-def $r4, implicit-def dead $r12, implicit-def dead $cpsr
+  ; LARGE-NEXT:   $sp = frame-setup t2SUBrr killed $sp, killed $r4, 14 /* CC::al */, $noreg, $noreg
+  ; LARGE-NEXT:   [[COPY1:%[0-9]+]]:gpr = COPY $sp
+  ; LARGE-NEXT:   $r0 = COPY [[COPY1]]
+  ; LARGE-NEXT:   tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+entry:
+  %buffer = alloca i8, i32 %n, align 1
+  ret ptr %buffer
+}
diff --git a/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll b/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll
index 5d51775851ecd..444eae845ac92 100644
--- a/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll
+++ b/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll
@@ -9,5 +9,5 @@ entry:
   ret void
 }
 
-; CHECK: tBL 14, $noreg, &__chkstk, implicit-def $lr, implicit $sp, implicit killed $r4, implicit-def $r4, implicit-def dead $r12, implicit-def dead $cpsr
+; CHECK: tBL 14, $noreg, &__chkstk, implicit-def dead $lr, implicit $sp, implicit killed $r4, implicit-def $r4, implicit-def dead $r12, implicit-def dead $cpsr
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/227218