[llvm] [AMDGPU] Fold mul24 with an operand whose low 24 bits are zero (PR #224537)

[Matt Arsenault via llvm-commits]

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@@ -4087,23 +4087,26 @@ static SDValue simplifyMul24(SDNode *Node24,
 
   APInt Demanded = APInt::getLowBitsSet(LHS.getValueSizeInBits(), 24);
 
-  // First try to simplify using SimplifyMultipleUseDemandedBits which allows
-  // the operands to have other uses, but will only perform simplifications that
-  // involve bypassing some nodes for this user.
-  SDValue DemandedLHS = TLI.SimplifyMultipleUseDemandedBits(LHS, Demanded, DAG);
-  SDValue DemandedRHS = TLI.SimplifyMultipleUseDemandedBits(RHS, Demanded, DAG);
-  if (DemandedLHS || DemandedRHS)
-    return DAG.getNode(NewOpcode, SDLoc(Node24), Node24->getVTList(),
-                       DemandedLHS ? DemandedLHS : LHS,
-                       DemandedRHS ? DemandedRHS : RHS);
+  if (isNullConstant(LHS) || isNullConstant(RHS))
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arsenm wrote:

This will become trivially known below after the simplify call? 

https://github.com/llvm/llvm-project/pull/224537