[llvm] [SPIR-V] Sign extend narrow ints feeding sitofp (PR #222969)

[Marcos Maronas via llvm-commits]

================
@@ -634,22 +630,18 @@ static void widenSignSensitiveOps(MachineFunction &MF, SPIRVGlobalRegistry *GR,
   // TODO: when the same narrow vreg feeds multiple sign-sensitive ops (e.g.
   // sdiv %x, %y and srem %x, %y), emit one shared G_SEXT_INREG instead of one
   // per use.
+  const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
   for (MachineInstr *MI : Info.SignSensitiveWorklist) {
-    unsigned N = MI->getNumOperands();
-    MachineOperand &LHS = MI->getOperand(N - 2);
-    MachineOperand &RHS = MI->getOperand(N - 1);
-    Register LHSReg = LHS.getReg();
-    Register RHSReg = RHS.getReg();
-    if (auto It = Info.OrigWidth.find(LHSReg); It != Info.OrigWidth.end())
-      LHS.setReg(SignExtendReg(LHSReg, It->second, *MI));
-    // Same vreg on both sides (e.g. G_ICMP slt %x, %x): reuse the sext just
-    // emitted for LHS instead of emitting a second one.
-    if (RHSReg == LHSReg) {
-      RHS.setReg(LHS.getReg());
-      continue;
+    for (MachineOperand &MO : MI->all_uses()) {
----------------
maarquitos14 wrote:

```suggestion
    for (const MachineOperand &MO : MI->all_uses()) {
```

https://github.com/llvm/llvm-project/pull/222969