[llvm] [X86] Keep scalar bf16/f16 selects in vector registers (PR #224218)

[Phoebe Wang via llvm-commits]

================
@@ -2076,3 +2076,256 @@ define bfloat @PR115710(fp128 %0) nounwind {
   %2 = fptrunc fp128 %0 to bfloat
   ret bfloat %2
 }
+
+define bfloat @select_bf16(i1 %cond, bfloat %a, bfloat %b) nounwind {
+; X86-LABEL: select_bf16:
+; X86:       # %bb.0:
+; X86-NEXT:    vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+; X86-NEXT:    vmovsh {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    andl $1, %eax
+; X86-NEXT:    negl %eax
+; X86-NEXT:    vmovw %eax, %xmm2
+; X86-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
+; X86-NEXT:    retl
+;
+; SSE2-LABEL: select_bf16:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    andl $1, %edi
+; SSE2-NEXT:    negl %edi
+; SSE2-NEXT:    movd %edi, %xmm2
+; SSE2-NEXT:    pand %xmm2, %xmm0
+; SSE2-NEXT:    pandn %xmm1, %xmm2
+; SSE2-NEXT:    por %xmm2, %xmm0
+; SSE2-NEXT:    retq
+;
+; AVX512BF16-LABEL: select_bf16:
+; AVX512BF16:       # %bb.0:
+; AVX512BF16-NEXT:    andl $1, %edi
+; AVX512BF16-NEXT:    negl %edi
+; AVX512BF16-NEXT:    vmovd %edi, %xmm2
+; AVX512BF16-NEXT:    vpblendvb %xmm2, %xmm0, %xmm1, %xmm0
+; AVX512BF16-NEXT:    retq
+;
+; AVX512FP16-LABEL: select_bf16:
+; AVX512FP16:       # %bb.0:
+; AVX512FP16-NEXT:    andl $1, %edi
+; AVX512FP16-NEXT:    negl %edi
+; AVX512FP16-NEXT:    vmovw %edi, %xmm2
+; AVX512FP16-NEXT:    vpblendvb %xmm2, %xmm0, %xmm1, %xmm0
----------------
phoebewang wrote:

Is it better to use masked movsh instead? E.g.

```
movb %edi, %k1
vmovsh %xmm0, %xmm1, %xmm0 {%k1}
```

https://github.com/llvm/llvm-project/pull/224218