[llvm] a432c76 - [X86][NFC] Simplify definition of TMM registers (#226779)

[via llvm-commits]

Author: Ben Shi
Date: 2026-09-28T08:27:09+08:00
New Revision: a432c764f54c72f60bb1c2df0c050e5cc29db2dd

URL: https://github.com/llvm/llvm-project/commit/a432c764f54c72f60bb1c2df0c050e5cc29db2dd
DIFF: https://github.com/llvm/llvm-project/commit/a432c764f54c72f60bb1c2df0c050e5cc29db2dd.diff

LOG: [X86][NFC] Simplify definition of TMM registers (#226779)

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86RegisterInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td
index 63ad4b2bae5ac..397aeb4747290 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.td
+++ b/llvm/lib/Target/X86/X86RegisterInfo.td
@@ -419,17 +419,12 @@ def KPAIRS : RegisterTuples<[sub_mask_0, sub_mask_1],
 
 // TMM registers, used by AMX instructions.
 let PositionOrder = 3 in {
-// Tile config registers.
-def TMMCFG: X86Reg<"tmmcfg", 0>;
-// Tile "registers".
-def TMM0:  X86Reg<"tmm0",   0>;
-def TMM1:  X86Reg<"tmm1",   1>;
-def TMM2:  X86Reg<"tmm2",   2>;
-def TMM3:  X86Reg<"tmm3",   3>;
-def TMM4:  X86Reg<"tmm4",   4>;
-def TMM5:  X86Reg<"tmm5",   5>;
-def TMM6:  X86Reg<"tmm6",   6>;
-def TMM7:  X86Reg<"tmm7",   7>;
+  // Tile config registers.
+  def TMMCFG: X86Reg<"tmmcfg", 0>;
+  // Tile "registers".
+  foreach  Index = 0-7 in {
+    def TMM#Index : X86Reg<"tmm"#Index, Index>;
+  }
 }
 
 // Floating point stack registers. These don't map one-to-one to the FP