[llvm] [SLP][NFC]Add an extra test witj missing vectorization, NFC (PR #226802)

[Alexey Bataev via llvm-commits]

https://github.com/alexey-bataev created https://github.com/llvm/llvm-project/pull/226802

None

>From 16822482900c12e2eeaf4bc68fe945d8b0d5a9f6 Mon Sep 17 00:00:00 2001
From: Alexey Bataev <a.bataev at outlook.com>
Date: Sun, 27 Sep 2026 08:50:03 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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Created using spr 1.3.7
---
 .../X86/extracted-subfields-shifted-trunc.ll  | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll

diff --git a/llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll b/llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll
new file mode 100644
index 00000000000000..82e231326d0d1e
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll
@@ -0,0 +1,61 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s
+
+; Bytes stored to memory, the middle bytes of the low half are shifted after
+; the truncation of the source.
+
+define void @store_bytes_i64(i64 %x, ptr %out) {
+; CHECK-LABEL: define void @store_bytes_i64(
+; CHECK-SAME: i64 [[X:%.*]], ptr [[OUT:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[T:%.*]] = trunc i64 [[X]] to i32
+; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[T]], i64 0
+; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT:    [[TMP2:%.*]] = lshr <4 x i32> [[TMP10]], <i32 0, i32 8, i32 16, i32 24>
+; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <4 x i64> poison, i64 [[X]], i64 0
+; CHECK-NEXT:    [[TMP4:%.*]] = shufflevector <4 x i64> [[TMP3]], <4 x i64> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT:    [[TMP5:%.*]] = lshr <4 x i64> [[TMP4]], <i64 32, i64 40, i64 48, i64 56>
+; CHECK-NEXT:    [[TMP6:%.*]] = trunc <4 x i64> [[TMP5]] to <4 x i32>
+; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT:    [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT:    [[TMP9:%.*]] = shufflevector <8 x i32> [[TMP7]], <8 x i32> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
+; CHECK-NEXT:    [[TMP1:%.*]] = and <8 x i32> [[TMP9]], <i32 255, i32 255, i32 255, i32 -1, i32 255, i32 255, i32 255, i32 -1>
+; CHECK-NEXT:    store <8 x i32> [[TMP1]], ptr [[OUT]], align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  %t = trunc i64 %x to i32
+  %b0 = and i32 %t, 255
+  %s1 = lshr i32 %t, 8
+  %b1 = and i32 %s1, 255
+  %s2 = lshr i32 %t, 16
+  %b2 = and i32 %s2, 255
+  %b3 = lshr i32 %t, 24
+  %s4 = lshr i64 %x, 32
+  %t4 = trunc i64 %s4 to i32
+  %b4 = and i32 %t4, 255
+  %s5 = lshr i64 %x, 40
+  %t5 = trunc i64 %s5 to i32
+  %b5 = and i32 %t5, 255
+  %s6 = lshr i64 %x, 48
+  %t6 = trunc i64 %s6 to i32
+  %b6 = and i32 %t6, 255
+  %s7 = lshr i64 %x, 56
+  %b7 = trunc i64 %s7 to i32
+  store i32 %b0, ptr %out, align 4
+  %o1 = getelementptr i32, ptr %out, i64 1
+  store i32 %b1, ptr %o1, align 4
+  %o2 = getelementptr i32, ptr %out, i64 2
+  store i32 %b2, ptr %o2, align 4
+  %o3 = getelementptr i32, ptr %out, i64 3
+  store i32 %b3, ptr %o3, align 4
+  %o4 = getelementptr i32, ptr %out, i64 4
+  store i32 %b4, ptr %o4, align 4
+  %o5 = getelementptr i32, ptr %out, i64 5
+  store i32 %b5, ptr %o5, align 4
+  %o6 = getelementptr i32, ptr %out, i64 6
+  store i32 %b6, ptr %o6, align 4
+  %o7 = getelementptr i32, ptr %out, i64 7
+  store i32 %b7, ptr %o7, align 4
+  ret void
+}